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* some support for funny-endian 16/32-bit insn sets
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
81f6038f
FCE		 12001-07-11 Frank Ch. Eigler <fche@redhat.com>
2
3 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
4 (cgen_cpu_desc): Ditto.
5
32cfffe3
BE		 62001-07-07 Ben Elliston <bje@redhat.com>
7
8 * m88k.h: Clean up and reformat. Remove unused code.
9
3e890047
GK		 102001-06-14 Geoffrey Keating <geoffk@redhat.com>
11
12 * cgen.h (cgen_keyword): Add nonalpha_chars field.
13
d1cf510e
NC		 142001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
15
16 * mips.h (CPU_R12000): Define.
17
e281c457
JH		 182001-05-23 John Healy <jhealy@redhat.com>
19
20 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
21
aa5f19f2
NC		 222001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
23
24 * mips.h (INSN_ISA_MASK): Define.
25
67d6227d
AM		 262001-05-12 Alan Modra <amodra@one.net.au>
27
28 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
29 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
30 and use InvMem as these insns must have register operands.
31
992aaec9
AM		 322001-05-04 Alan Modra <amodra@one.net.au>
33
34 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
35 and pextrw to swap reg/rm assignments.
36
4ef7f0bf
HPN		 372001-04-05 Hans-Peter Nilsson <hp@axis.com>
38
39 * cris.h (enum cris_insn_version_usage): Correct comment for
40 cris_ver_v3p.
41
0f17484f
AM		 422001-03-24 Alan Modra <alan@linuxcare.com.au>
43
44 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
45 Add InvMem to first operand of "maskmovdqu".
46
7ccb5238
HPN		 472001-03-22 Hans-Peter Nilsson <hp@axis.com>
48
49 * cris.h (ADD_PC_INCR_OPCODE): New macro.
50
361bfa20
KH		 512001-03-21 Kazu Hirata <kazu@hxi.com>
52
53 * h8300.h: Fix formatting.
54
87890af0
AM		 552001-03-22 Alan Modra <alan@linuxcare.com.au>
56
57 * i386.h (i386_optab): Add paddq, psubq.
58
2e98d2de
AM		 592001-03-19 Alan Modra <alan@linuxcare.com.au>
60
61 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
62
80a523c2
NC		 632001-02-28 Igor Shevlyakov <igor@windriver.com>
64
65 * m68k.h: new defines for Coldfire V4. Update mcf to know
66 about mcf5407.
67
e135f41b
NC		 682001-02-18 lars brinkhoff <lars@nocrew.org>
69
70 * pdp11.h: New file.
71
722001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH		 73
74 * i386.h (i386_optab): SSE integer converison instructions have
75 64bit versions on x86-64.
76
8eaec934
NC		 772001-02-10 Nick Clifton <nickc@redhat.com>
78
79 * mips.h: Remove extraneous whitespace. Formating change to allow
80 for future contribution.
81
a85d7ed0
NC		 822001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
83
84 * s390.h: New file.
85
0715dc88
PM		 862001-02-02 Patrick Macdonald <patrickm@redhat.com>
87
88 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
89 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
90 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
91
296bc568
AM		 922001-01-24 Karsten Keil <kkeil@suse.de>
93
94 * i386.h (i386_optab): Fix swapgs
95
1328dc98
AM		 962001-01-14 Alan Modra <alan@linuxcare.com.au>
97
98 * hppa.h: Describe new '<' and '>' operand types, and tidy
99 existing comments.
100 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
101 Remove duplicate "ldw j(s,b),x". Sort some entries.
102
e135f41b 1032001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH		 104
105 * i386.h (i386_optab): Fix pusha and ret templates.
106
0d2bcfaf
NC		 1072001-01-11 Peter Targett <peter.targett@arccores.com>
108
109 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
110 definitions for masking cpu type.
111 (arc_ext_operand_value) New structure for storing extended
112 operands.
113 (ARC_OPERAND_*) Flags for operand values.
114
1152001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH		 116
117 * i386.h (pinsrw): Add.
118 (pshufw): Remove.
119 (cvttpd2dq): Fix operands.
120 (cvttps2dq): Likewise.
121 (movq2q): Rename to movdq2q.
122
079966a8
AM		 1232001-01-10 Richard Schaal <richard.schaal@intel.com>
124
125 * i386.h: Correct movnti instruction.
126
8c1f9e76
JJ		 1272001-01-09 Jeff Johnston <jjohnstn@redhat.com>
128
129 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
130 of operands (unsigned char or unsigned short).
131 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
132 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
133
0d2bcfaf 1342001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH		 135
136 * i386.h (i386_optab): Make [sml]fence template to use immext field.
137
0d2bcfaf 1382001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH		 139
140 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
141 introduced by Pentium4
142
0d2bcfaf 1432000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH		 144
145 * i386.h (i386_optab): Add "rex*" instructions;
146 add swapgs; disable jmp/call far direct instructions for
147 64bit mode; add syscall and sysret; disable registers for 0xc6
148 template. Add 'q' suffixes to extendable instructions, disable
079966a8 149 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH		 150 (i386_regtab): Add extended registers.
151 (*Suf): Add No_qSuf.
152 (q_Suf, wlq_Suf, bwlq_Suf): New.
153
0d2bcfaf 1542000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH		 155
156 * i386.h (i386_optab): Replace "Imm" with "EncImm".
157 (i386_regtab): Add flags field.
158
bf40d919
NC		 1592000-12-12 Nick Clifton <nickc@redhat.com>
160
161 * mips.h: Fix formatting.
162
4372b673
NC		 1632000-12-01 Chris Demetriou <cgd@sibyte.com>
164
165 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
166 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
167 OP_*_SYSCALL definitions.
168 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
169 19 bit wait codes.
170 (MIPS operand specifier comments): Remove 'm', add 'U' and
171 'J', and update the meaning of 'B' so that it's more general.
172
e7af610e
NC		 173 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
174 INSN_ISA5): Renumber, redefine to mean the ISA at which the
175 instruction was added.
176 (INSN_ISA32): New constant.
177 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
178 Renumber to avoid new and/or renumbered INSN_* constants.
179 (INSN_MIPS32): Delete.
180 (ISA_UNKNOWN): New constant to indicate unknown ISA.
181 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
182 ISA_MIPS32): New constants, defined to be the mask of INSN_*
183 constants available at that ISA level.
184 (CPU_UNKNOWN): New constant to indicate unknown CPU.
185 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
186 define it with a unique value.
187 (OPCODE_IS_MEMBER): Update for new ISA membership-related
188 constant meanings.
189
84ea6cf2
NC		 190 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
191 definitions.
192
c6c98b38
NC		 193 * mips.h (CPU_SB1): New constant.
194
19f7b010
JJ		 1952000-10-20 Jakub Jelinek <jakub@redhat.com>
196
197 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
198 Note that '3' is used for siam operand.
199
139368c9
JW		 2002000-09-22 Jim Wilson <wilson@cygnus.com>
201
202 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
203
156c2f8b
NC		 2042000-09-13 Anders Norlander <anorland@acc.umu.se>
205
206 * mips.h: Use defines instead of hard-coded processor numbers.
207 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
208 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
209 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
210 CPU_4KC, CPU_4KM, CPU_4KP): Define..
211 (OPCODE_IS_MEMBER): Use new defines.
212 (OP_MASK_SEL, OP_SH_SEL): Define.
213 (OP_MASK_CODE20, OP_SH_CODE20): Define.
214 Add 'P' to used characters.
215 Use 'H' for coprocessor select field.
216 Use 'm' for 20 bit breakpoint code.
217 Document new arg characters and add to used characters.
218 (INSN_MIPS32): New define for MIPS32 extensions.
219 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
220
3c5ce02e
AM		 2212000-09-05 Alan Modra <alan@linuxcare.com.au>
222
223 * hppa.h: Mention cz completer.
224
50b81f19
JW		 2252000-08-16 Jim Wilson <wilson@cygnus.com>
226
227 * ia64.h (IA64_OPCODE_POSTINC): New.
228
fc29466d
L		 2292000-08-15 H.J. Lu <hjl@gnu.org>
230
231 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
232 IgnoreSize change.
233
4f1d9bd8
NC		 2342000-08-08 Jason Eckhardt <jle@cygnus.com>
235
236 * i860.h: Small formatting adjustments.
237
45ee1401
DC		 2382000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
239
240 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
241 Move related opcodes closer to each other.
242 Minor changes in comments, list undefined opcodes.
243
9d551405
DB		 2442000-07-26 Dave Brolley <brolley@redhat.com>
245
246 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
247
4f1d9bd8
NC		 2482000-07-22 Jason Eckhardt <jle@cygnus.com>
249
250 * i860.h (btne, bte, bla): Changed these opcodes
251 to use sbroff ('r') instead of split16 ('s').
252 (J, K, L, M): New operand types for 16-bit aligned fields.
253 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
254 use I, J, K, L, M instead of just I.
255 (T, U): New operand types for split 16-bit aligned fields.
256 (st.x): Changed these opcodes to use S, T, U instead of just S.
257 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
258 exist on the i860.
259 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
260 (pfeq.ss, pfeq.dd): New opcodes.
261 (st.s): Fixed incorrect mask bits.
262 (fmlow): Fixed incorrect mask bits.
263 (fzchkl, pfzchkl): Fixed incorrect mask bits.
264 (faddz, pfaddz): Fixed incorrect mask bits.
265 (form, pform): Fixed incorrect mask bits.
266 (pfld.l): Fixed incorrect mask bits.
267 (fst.q): Fixed incorrect mask bits.
268 (all floating point opcodes): Fixed incorrect mask bits for
269 handling of dual bit.
270
c8488617
HPN		 2712000-07-20 Hans-Peter Nilsson <hp@axis.com>
272
273 cris.h: New file.
274
65aa24b6
NC		 2752000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
276
277 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
278 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
279 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
280 (AVR_ISA_M83): Define for ATmega83, ATmega85.
281 (espm): Remove, because ESPM removed in databook update.
282 (eicall, eijmp): Move to the end of opcode table.
283
60bcf0fa
NC		 2842000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
285
286 * m68hc11.h: New file for support of Motorola 68hc11.
287
60a2978a
DC		 288Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
289
290 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
291
68ab2dd9
DC		 292Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
293
294 * avr.h: New file with AVR opcodes.
295
f0662e27
DL		 296Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
297
298 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
299
b722f2be
AM		 3002000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
301
302 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
303
f9e0cf0b
AM		 3042000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
305
306 * i386.h: Use sl_FP, not sl_Suf for fild.
307
f660ee8b
FCE		 3082000-05-16 Frank Ch. Eigler <fche@redhat.com>
309
310 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
311 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
312 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
313 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
314
558b0a60
AM		 3152000-05-13 Alan Modra <alan@linuxcare.com.au>,
316
317 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
318
e413e4e9
AM		 3192000-05-13 Alan Modra <alan@linuxcare.com.au>,
320 Alexander Sokolov <robocop@netlink.ru>
321
322 * i386.h (i386_optab): Add cpu_flags for all instructions.
323
3242000-05-13 Alan Modra <alan@linuxcare.com.au>
325
326 From Gavin Romig-Koch <gavin@cygnus.com>
327 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
328
5c84d377
TW		 3292000-05-04 Timothy Wall <twall@cygnus.com>
330
331 * tic54x.h: New.
332
966f959b
C		 3332000-05-03 J.T. Conklin <jtc@redback.com>
334
335 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
336 (PPC_OPERAND_VR): New operand flag for vector registers.
337
c5d05dbb
JL		 3382000-05-01 Kazu Hirata <kazu@hxi.com>
339
340 * h8300.h (EOP): Add missing initializer.
341
a7fba0e0
JL		 342Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
343
344 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
345 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
346 New operand types l,y,&,fe,fE,fx added to support above forms.
347 (pa_opcodes): Replaced usage of 'x' as source/target for
348 floating point double-word loads/stores with 'fx'.
349
800eeca4
JW		 350Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
351 David Mosberger <davidm@hpl.hp.com>
352 Timothy Wall <twall@cygnus.com>
353 Jim Wilson <wilson@cygnus.com>
354
355 * ia64.h: New file.
356
ba23e138
NC		 3572000-03-27 Nick Clifton <nickc@cygnus.com>
358
359 * d30v.h (SHORT_A1): Fix value.
360 (SHORT_AR): Renumber so that it is at the end of the list of short
361 instructions, not the end of the list of long instructions.
362
d0b47220
AM		 3632000-03-26 Alan Modra <alan@linuxcare.com>
364
365 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
366 problem isn't really specific to Unixware.
367 (OLDGCC_COMPAT): Define.
368 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
369 destination %st(0).
370 Fix lots of comments.
371
866afedc
NC		 3722000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
373
374 * d30v.h:
375 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
376 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
377 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
378 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
379 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
380 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
381 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
382
cc5ca5ce
AM		 3832000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
384
385 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
386 fistpd without suffix.
387
68e324a2
NC		 3882000-02-24 Nick Clifton <nickc@cygnus.com>
389
390 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
391 'signed_overflow_ok_p'.
392 Delete prototypes for cgen_set_flags() and cgen_get_flags().
393
60f036a2
AH		 3942000-02-24 Andrew Haley <aph@cygnus.com>
395
396 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
397 (CGEN_CPU_TABLE): flags: new field.
398 Add prototypes for new functions.
399
9b9b5cd4
AM		 4002000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
401
402 * i386.h: Add some more UNIXWARE_COMPAT comments.
403
5b93d8bb
AM		 4042000-02-23 Linas Vepstas <linas@linas.org>
405
406 * i370.h: New file.
407
4f1d9bd8
NC		 4082000-02-22 Chandra Chavva <cchavva@cygnus.com>
409
410 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
411 cannot be combined in parallel with ADD/SUBppp.
412
87f398dd
AH		 4132000-02-22 Andrew Haley <aph@cygnus.com>
414
415 * mips.h: (OPCODE_IS_MEMBER): Add comment.
416
367c01af
AH		 4171999-12-30 Andrew Haley <aph@cygnus.com>
418
9a1e79ca
AH		 419 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
420 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
421 insns.
367c01af 422
add0c677
AM		 4232000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
424
425 * i386.h: Qualify intel mode far call and jmp with x_Suf.
426
3138f287
AM		 4271999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
428
429 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
430 indirect jumps and calls. Add FF/3 call for intel mode.
431
ccecd07b
JL		 432Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
433
434 * mn10300.h: Add new operand types. Add new instruction formats.
435
b37e19e9
JL		 436Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
437
438 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
439 instruction.
440
5fce5ddf
GRK		 4411999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
442
443 * mips.h (INSN_ISA5): New.
444
2bd7f1f3
GRK		 4451999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
446
447 * mips.h (OPCODE_IS_MEMBER): New.
448
4df2b5c5
NC		 4491999-10-29 Nick Clifton <nickc@cygnus.com>
450
451 * d30v.h (SHORT_AR): Define.
452
446a06c9
MM		 4531999-10-18 Michael Meissner <meissner@cygnus.com>
454
455 * alpha.h (alpha_num_opcodes): Convert to unsigned.
456 (alpha_num_operands): Ditto.
457
eca04c6a
JL		 458Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
459
460 * hppa.h (pa_opcodes): Add load and store cache control to
461 instructions. Add ordered access load and store.
462
463 * hppa.h (pa_opcode): Add new entries for addb and addib.
464
465 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
466
467 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
468
c43185de
DN		 469Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
470
471 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
472
ec3533da
JL		 473Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
474
390f858d
JL		 475 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
476 and "be" using completer prefixes.
477
8c47ebd9
JL		 478 * hppa.h (pa_opcodes): Add initializers to silence compiler.
479
ec3533da
JL		 480 * hppa.h: Update comments about character usage.
481
18369bea
JL		 482Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
483
484 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
485 up the new fstw & bve instructions.
486
c36efdd2
JL		 487Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
488
d3ffb032
JL		 489 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
490 instructions.
491
c49ec3da
JL		 492 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
493
5d2e7ecc
JL		 494 * hppa.h (pa_opcodes): Add long offset double word load/store
495 instructions.
496
6397d1a2
JL		 497 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
498 stores.
499
142f0fe0
JL		 500 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
501
f5a68b45
JL		 502 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
503
8235801e
JL		 504 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
505
35184366
JL		 506 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
507
f0bfde5e
JL		 508 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
509
27bbbb58
JL		 510 * hppa.h (pa_opcodes): Add support for "b,l".
511
c36efdd2
JL		 512 * hppa.h (pa_opcodes): Add support for "b,gate".
513
f2727d04
JL		 514Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
515
9392fb11
JL		 516 * hppa.h (pa_opcodes): Use 'fX' for first register operand
517 in xmpyu.
518
e0c52e99
JL		 519 * hppa.h (pa_opcodes): Fix mask for probe and probei.
520
f2727d04
JL		 521 * hppa.h (pa_opcodes): Fix mask for depwi.
522
52d836e2
JL		 523Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
524
525 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
526 an explicit output argument.
527
90765e3a
JL		 528Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
529
530 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
531 Add a few PA2.0 loads and store variants.
532
8340b17f
ILT		 5331999-09-04 Steve Chamberlain <sac@pobox.com>
534
535 * pj.h: New file.
536
5f47d35b
AM		 5371999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
538
539 * i386.h (i386_regtab): Move %st to top of table, and split off
540 other fp reg entries.
541 (i386_float_regtab): To here.
542
1c143202
JL		 543Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
544
7d8fdb64
JL		 545 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
546 by 'f'.
547
90927b9c
JL		 548 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
549 Add supporting args.
550
1d16bf9c
JL		 551 * hppa.h: Document new completers and args.
552 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
553 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
554 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
555 pmenb and pmdis.
556
96226a68
JL		 557 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
558 hshr, hsub, mixh, mixw, permh.
559
5d4ba527
JL		 560 * hppa.h (pa_opcodes): Change completers in instructions to
561 use 'c' prefix.
562
e9fc28c6
JL		 563 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
564 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
565
1c143202
JL		 566 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
567 fnegabs to use 'I' instead of 'F'.
568
9e525108
AM		 5691999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
570
571 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
572 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
573 Alphabetically sort PIII insns.
574
e8da1bf1
DE		 575Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
576
577 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
578
7d627258
JL		 579Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
580
5696871a
JL		 581 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
582 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
583
7d627258
JL		 584 * hppa.h: Document 64 bit condition completers.
585
c5e52916
JL		 586Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
587
588 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
589
eecb386c
AM		 5901999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
591
592 * i386.h (i386_optab): Add DefaultSize modifier to all insns
593 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
594 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
595
88a380f3
JL		 596Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
597 Jeff Law <law@cygnus.com>
598
599 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
600
601 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca
JL		 602
603 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
604 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
605
145cf1f0
AM		 6061999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
607
608 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
609
73826640
JL		 610Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
611
612 * hppa.h (struct pa_opcode): Add new field "flags".
613 (FLAGS_STRICT): Define.
614
b65db252
JL		 615Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
616 Jeff Law <law@cygnus.com>
617
f7fc668b
JL		 618 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
619
620 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 621
10084519
AM		 6221999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
623
624 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
625 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
626 flag to fcomi and friends.
627
cd8a80ba
JL		 628Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
629
630 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
631 integer logical instructions.
632
1fca749b
ILT		 6331999-05-28 Linus Nordberg <linus.nordberg@canit.se>
634
635 * m68k.h: Document new formats `E', `G', `H' and new places `N',
636 `n', `o'.
637
638 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
639 and new places `m', `M', `h'.
640
aa008907
JL		 641Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
642
643 * hppa.h (pa_opcodes): Add several processor specific system
644 instructions.
645
e26b85f0
JL		 646Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
647
648 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
649 "addb", and "addib" to be used by the disassembler.
650
c608c12e
AM		 6511999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
652
653 * i386.h (ReverseModrm): Remove all occurences.
654 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
655 movmskps, pextrw, pmovmskb, maskmovq.
656 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
657 ignore the data size prefix.
658
659 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
660 Mostly stolen from Doug Ledford <dledford@redhat.com>
661
45c18104
RH		 662Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
663
664 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
665
252b5132
RH		 6661999-04-14 Doug Evans <devans@casey.cygnus.com>
667
668 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
669 (CGEN_ATTR_TYPE): Update.
670 (CGEN_ATTR_MASK): Number booleans starting at 0.
671 (CGEN_ATTR_VALUE): Update.
672 (CGEN_INSN_ATTR): Update.
673
674Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
675
676 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
677 instructions.
678
679Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
680
681 * hppa.h (bb, bvb): Tweak opcode/mask.
682
683
6841999-03-22 Doug Evans <devans@casey.cygnus.com>
685
686 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
687 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
688 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
689 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
690 Delete member max_insn_size.
691 (enum cgen_cpu_open_arg): New enum.
692 (cpu_open): Update prototype.
693 (cpu_open_1): Declare.
694 (cgen_set_cpu): Delete.
695
6961999-03-11 Doug Evans <devans@casey.cygnus.com>
697
698 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
699 (CGEN_OPERAND_NIL): New macro.
700 (CGEN_OPERAND): New member `type'.
701 (@arch@_cgen_operand_table): Delete decl.
702 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
703 (CGEN_OPERAND_TABLE): New struct.
704 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
705 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
706 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
707 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
708 {get,set}_{int,vma}_operand.
709 (@arch@_cgen_cpu_open): New arg `isa'.
710 (cgen_set_cpu): Ditto.
711
712Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
713
714 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
715
7161999-02-25 Doug Evans <devans@casey.cygnus.com>
717
718 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
719 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
720 enum cgen_hw_type.
721 (CGEN_HW_TABLE): New struct.
722 (hw_table): Delete declaration.
723 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
724 to table entry to enum.
725 (CGEN_OPINST): Ditto.
726 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
727
728Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
729
730 * alpha.h (AXP_OPCODE_EV6): New.
731 (AXP_OPCODE_NOPAL): Include it.
732
7331999-02-09 Doug Evans <devans@casey.cygnus.com>
734
735 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
736 All uses updated. New members int_insn_p, max_insn_size,
737 parse_operand,insert_operand,extract_operand,print_operand,
738 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
739 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
740 extract_handlers,print_handlers.
741 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
742 (CGEN_ATTR_BOOL_OFFSET): New macro.
743 (CGEN_ATTR_MASK): Subtract it to compute bit number.
744 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
745 (cgen_opcode_handler): Renamed from cgen_base.
746 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
747 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
748 all uses updated.
749 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
750 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
751 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
752 (CGEN_OPCODE,CGEN_IBASE): New types.
753 (CGEN_INSN): Rewrite.
754 (CGEN_{ASM,DIS}_HASH*): Delete.
755 (init_opcode_table,init_ibld_table): Declare.
756 (CGEN_INSN_ATTR): New type.
757
758Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
759
760 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
761 (x_FP, d_FP, dls_FP, sldx_FP): Define.
762 Change *Suf definitions to include x and d suffixes.
763 (movsx): Use w_Suf and b_Suf.
764 (movzx): Likewise.
765 (movs): Use bwld_Suf.
766 (fld): Change ordering. Use sld_FP.
767 (fild): Add Intel Syntax equivalent of fildq.
768 (fst): Use sld_FP.
769 (fist): Use sld_FP.
770 (fstp): Use sld_FP. Add x_FP version.
771 (fistp): LLongMem version for Intel Syntax.
772 (fcom, fcomp): Use sld_FP.
773 (fadd, fiadd, fsub): Use sld_FP.
774 (fsubr): Use sld_FP.
775 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
776
7771999-01-27 Doug Evans <devans@casey.cygnus.com>
778
779 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
780 CGEN_MODE_UINT.
781
e135f41b 7821999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH		 783
784 * hppa.h (bv): Fix mask.
785
7861999-01-05 Doug Evans <devans@casey.cygnus.com>
787
788 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
789 (CGEN_ATTR): Use it.
790 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
791 (CGEN_ATTR_TABLE): New member dfault.
792
7931998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
794
795 * mips.h (MIPS16_INSN_BRANCH): New.
796
797Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
798
799 The following is part of a change made by Edith Epstein
800 <eepstein@sophia.cygnus.com> as part of a project to merge in
801 changes by HP; HP did not create ChangeLog entries.
802
803 * hppa.h (completer_chars): list of chars to not put a space
804 after.
805
806Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
807
808 * i386.h (i386_optab): Permit w suffix on processor control and
809 status word instructions.
810
8111998-11-30 Doug Evans <devans@casey.cygnus.com>
812
813 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
814 (struct cgen_keyword_entry): Ditto.
815 (struct cgen_operand): Ditto.
816 (CGEN_IFLD): New typedef, with associated access macros.
817 (CGEN_IFMT): New typedef, with associated access macros.
818 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
819 (CGEN_IVALUE): New typedef.
820 (struct cgen_insn): Delete const on syntax,attrs members.
821 `format' now points to format data. Type of `value' is now
822 CGEN_IVALUE.
823 (struct cgen_opcode_table): New member ifld_table.
824
8251998-11-18 Doug Evans <devans@casey.cygnus.com>
826
827 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
828 (CGEN_OPERAND_INSTANCE): New member `attrs'.
829 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
830 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
831 (cgen_opcode_table): Update type of dis_hash fn.
832 (extract_operand): Update type of `insn_value' arg.
833
834Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
835
836 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
837
838Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
839
840 * mips.h (INSN_MULT): Added.
841
842Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
843
844 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
845
846Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
847
848 * cgen.h (CGEN_INSN_INT): New typedef.
849 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
850 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
851 (CGEN_INSN_BYTES_PTR): New typedef.
852 (CGEN_EXTRACT_INFO): New typedef.
853 (cgen_insert_fn,cgen_extract_fn): Update.
854 (cgen_opcode_table): New member `insn_endian'.
855 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
856 (insert_operand,extract_operand): Update.
857 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
858
859Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
860
861 * cgen.h (CGEN_ATTR_BOOLS): New macro.
862 (struct CGEN_HW_ENTRY): New member `attrs'.
863 (CGEN_HW_ATTR): New macro.
864 (struct CGEN_OPERAND_INSTANCE): New member `name'.
865 (CGEN_INSN_INVALID_P): New macro.
866
867Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
868
869 * hppa.h: Add "fid".
870
871Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
872
873 From Robert Andrew Dale <rob@nb.net>
874 * i386.h (i386_optab): Add AMD 3DNow! instructions.
875 (AMD_3DNOW_OPCODE): Define.
876
877Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
878
879 * d30v.h (EITHER_BUT_PREFER_MU): Define.
880
881Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
882
883 * cgen.h (cgen_insn): #if 0 out element `cdx'.
884
885Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
886
887 Move all global state data into opcode table struct, and treat
888 opcode table as something that is "opened/closed".
889 * cgen.h (CGEN_OPCODE_DESC): New type.
890 (all fns): New first arg of opcode table descriptor.
891 (cgen_set_parse_operand_fn): Add prototype.
892 (cgen_current_machine,cgen_current_endian): Delete.
893 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
894 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
895 dis_hash_table,dis_hash_table_entries.
896 (opcode_open,opcode_close): Add prototypes.
897
898 * cgen.h (cgen_insn): New element `cdx'.
899
900Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
901
902 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
903
904Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
905
906 * mn10300.h: Add "no_match_operands" field for instructions.
907 (MN10300_MAX_OPERANDS): Define.
908
909Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
910
911 * cgen.h (cgen_macro_insn_count): Declare.
912
913Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
914
915 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
916 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
917 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
918 set_{int,vma}_operand.
919
920Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
921
922 * mn10300.h: Add "machine" field for instructions.
923 (MN103, AM30): Define machine types.
924
925Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
926
927 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
928
9291998-06-18 Ulrich Drepper <drepper@cygnus.com>
930
931 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
932
933Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
934
935 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
936 and ud2b.
937 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
938 those that happen to be implemented on pentiums.
939
940Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
941
942 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
943 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
944 with Size16|IgnoreSize or Size32|IgnoreSize.
945
946Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
947
948 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
949 (REPE): Rename to REPE_PREFIX_OPCODE.
950 (i386_regtab_end): Remove.
951 (i386_prefixtab, i386_prefixtab_end): Remove.
952 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
953 of md_begin.
954 (MAX_OPCODE_SIZE): Define.
955 (i386_optab_end): Remove.
956 (sl_Suf): Define.
957 (sl_FP): Use sl_Suf.
958
959 * i386.h (i386_optab): Allow 16 bit displacement for `mov
960 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
961 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
962 data32, dword, and adword prefixes.
963 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
964 regs.
965
966Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
967
968 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
969
970 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
971 register operands, because this is a common idiom. Flag them with
972 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
973 fdivrp because gcc erroneously generates them. Also flag with a
974 warning.
975
976 * i386.h: Add suffix modifiers to most insns, and tighter operand
977 checks in some cases. Fix a number of UnixWare compatibility
978 issues with float insns. Merge some floating point opcodes, using
979 new FloatMF modifier.
980 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
981 consistency.
982
983 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
984 IgnoreDataSize where appropriate.
985
986Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
987
988 * i386.h: (one_byte_segment_defaults): Remove.
989 (two_byte_segment_defaults): Remove.
990 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
991
992Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
993
994 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
995 (cgen_hw_lookup_by_num): Declare.
996
997Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
998
999 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1000 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1001
1002Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1003
1004 * cgen.h (cgen_asm_init_parse): Delete.
1005 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1006 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1007
1008Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1009
1010 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1011 (cgen_asm_finish_insn): Update prototype.
1012 (cgen_insn): New members num, data.
1013 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1014 dis_hash, dis_hash_table_size moved to ...
1015 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1016 All uses updated. New members asm_hash_p, dis_hash_p.
1017 (CGEN_MINSN_EXPANSION): New struct.
1018 (cgen_expand_macro_insn): Declare.
1019 (cgen_macro_insn_count): Declare.
1020 (get_insn_operands): Update prototype.
1021 (lookup_get_insn_operands): Declare.
1022
1023Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1024
1025 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1026 regKludge. Add operands types for string instructions.
1027
1028Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1029
1030 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1031 table.
1032
1033Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1034
1035 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1036 for `gettext'.
1037
1038Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1039
1040 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1041 Add IsString flag to string instructions.
1042 (IS_STRING): Don't define.
1043 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1044 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1045 (SS_PREFIX_OPCODE): Define.
1046
1047Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1048
1049 * i386.h: Revert March 24 patch; no more LinearAddress.
1050
1051Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1052
1053 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1054 instructions, and instead add FWait opcode modifier. Add short
1055 form of fldenv and fstenv.
1056 (FWAIT_OPCODE): Define.
1057
1058 * i386.h (i386_optab): Change second operand constraint of `mov
1059 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1060 allow legal instructions such as `movl %gs,%esi'
1061
1062Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1063
1064 * h8300.h: Various changes to fully bracket initializers.
1065
1066Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1067
1068 * i386.h: Set LinearAddress for lidt and lgdt.
1069
1070Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1071
1072 * cgen.h (CGEN_BOOL_ATTR): New macro.
1073
1074Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1075
1076 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1077
1078Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1079
1080 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1081 (cgen_insn): Record syntax and format entries here, rather than
1082 separately.
1083
1084Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1085
1086 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1087
1088Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1089
1090 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1091 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1092 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1093
1094Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1095
1096 * cgen.h (lookup_insn): New argument alias_p.
1097
1098Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1099
1100Fix rac to accept only a0:
1101 * d10v.h (OPERAND_ACC): Split into:
1102 (OPERAND_ACC0, OPERAND_ACC1) .
1103 (OPERAND_GPR): Define.
1104
1105Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1106
1107 * cgen.h (CGEN_FIELDS): Define here.
1108 (CGEN_HW_ENTRY): New member `type'.
1109 (hw_list): Delete decl.
1110 (enum cgen_mode): Declare.
1111 (CGEN_OPERAND): New member `hw'.
1112 (enum cgen_operand_instance_type): Declare.
1113 (CGEN_OPERAND_INSTANCE): New type.
1114 (CGEN_INSN): New member `operands'.
1115 (CGEN_OPCODE_DATA): Make hw_list const.
1116 (get_insn_operands,lookup_insn): Add prototypes for.
1117
1118Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1119
1120 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1121 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1122 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1123 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1124
1125Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1126
1127 * cgen.h: Correct typo in comment end marker.
1128
1129Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1130
1131 * tic30.h: New file.
1132
5a109b67 1133Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH		 1134
1135 * cgen.h: Add prototypes for cgen_save_fixups(),
1136 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1137 of cgen_asm_finish_insn() to return a char *.
1138
1139Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1140
1141 * cgen.h: Formatting changes to improve readability.
1142
1143Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1144
1145 * cgen.h (*): Clean up pass over `struct foo' usage.
1146 (CGEN_ATTR): Make unsigned char.
1147 (CGEN_ATTR_TYPE): Update.
1148 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1149 (cgen_base): Move member `attrs' to cgen_insn.
1150 (CGEN_KEYWORD): New member `null_entry'.
1151 (CGEN_{SYNTAX,FORMAT}): New types.
1152 (cgen_insn): Format and syntax separated from each other.
1153
1154Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1155
1156 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1157 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1158 flags_{used,set} long.
1159 (d30v_operand): Make flags field long.
1160
1161Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1162
1163 * m68k.h: Fix comment describing operand types.
1164
1165Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1166
1167 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1168 everything else after down.
1169
1170Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1171
1172 * d10v.h (OPERAND_FLAG): Split into:
1173 (OPERAND_FFLAG, OPERAND_CFLAG) .
1174
1175Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1176
1177 * mips.h (struct mips_opcode): Changed comments to reflect new
1178 field usage.
1179
1180Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1181
1182 * mips.h: Added to comments a quick-ref list of all assigned
1183 operand type characters.
1184 (OP_{MASK,SH}_PERFREG): New macros.
1185
1186Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1187
1188 * sparc.h: Add '_' and '/' for v9a asr's.
1189 Patch from David Miller <davem@vger.rutgers.edu>
1190
1191Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1192
1193 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1194 area are not available in the base model (H8/300).
1195
1196Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1197
1198 * m68k.h: Remove documentation of ` operand specifier.
1199
1200Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1201
1202 * m68k.h: Document q and v operand specifiers.
1203
1204Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1205
1206 * v850.h (struct v850_opcode): Add processors field.
1207 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1208 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1209 (PROCESSOR_V850EA): New bit constants.
1210
1211Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1212
1213 Merge changes from Martin Hunt:
1214
1215 * d30v.h: Allow up to 64 control registers. Add
1216 SHORT_A5S format.
1217
1218 * d30v.h (LONG_Db): New form for delayed branches.
1219
1220 * d30v.h: (LONG_Db): New form for repeati.
1221
1222 * d30v.h (SHORT_D2B): New form.
1223
1224 * d30v.h (SHORT_A2): New form.
1225
1226 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1227 registers are used. Needed for VLIW optimization.
1228
1229Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1230
1231 * cgen.h: Move assembler interface section
1232 up so cgen_parse_operand_result is defined for cgen_parse_address.
1233 (cgen_parse_address): Update prototype.
1234
1235Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1236
1237 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1238
1239Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1240
1241 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1242 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1243 <paubert@iram.es>.
1244
1245 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1246 <paubert@iram.es>.
1247
1248 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1249 <paubert@iram.es>.
1250
1251 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1252 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1253
1254Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1255
1256 * v850.h (V850_NOT_R0): New flag.
1257
1258Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1259
1260 * v850.h (struct v850_opcode): Remove flags field.
1261
1262Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1263
1264 * v850.h (struct v850_opcode): Add flags field.
1265 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1266 fields.
1267 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1268 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1269
1270Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1271
1272 * arc.h: New file.
1273
1274Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1275
1276 * sparc.h (sparc_opcodes): Declare as const.
1277
1278Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1279
1280 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1281 uses single or double precision floating point resources.
1282 (INSN_NO_ISA, INSN_ISA1): Define.
1283 (cpu specific INSN macros): Tweak into bitmasks outside the range
1284 of INSN_ISA field.
1285
1286Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1287
1288 * i386.h: Fix pand opcode.
1289
1290Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1291
1292 * mips.h: Widen INSN_ISA and move it to a more convenient
1293 bit position. Add INSN_3900.
1294
1295Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1296
1297 * mips.h (struct mips_opcode): added new field membership.
1298
1299Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1300
1301 * i386.h (movd): only Reg32 is allowed.
1302
1303 * i386.h: add fcomp and ud2. From Wayne Scott
1304 <wscott@ichips.intel.com>.
1305
1306Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1307
1308 * i386.h: Add MMX instructions.
1309
1310Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1311
1312 * i386.h: Remove W modifier from conditional move instructions.
1313
1314Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1315
1316 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1317 with no arguments to match that generated by the UnixWare
1318 assembler.
1319
1320Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1321
1322 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1323 (cgen_parse_operand_fn): Declare.
1324 (cgen_init_parse_operand): Declare.
1325 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1326 new argument `want'.
1327 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1328 (enum cgen_parse_operand_type): New enum.
1329
1330Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1331
1332 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1333
1334Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1335
1336 * cgen.h: New file.
1337
1338Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1339
1340 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1341 fdivrp.
1342
1343Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1344
1345 * v850.h (extract): Make unsigned.
1346
1347Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1348
1349 * i386.h: Add iclr.
1350
1351Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1352
1353 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1354 take a direction bit.
1355
1356Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1357
1358 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1359
1360Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1361
1362 * sparc.h: Include <ansidecl.h>. Update function declarations to
1363 use prototypes, and to use const when appropriate.
1364
1365Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1366
1367 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1368
1369Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1370
1371 * d10v.h: Change pre_defined_registers to
1372 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1373
1374Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1375
1376 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1377 Change mips_opcodes from const array to a pointer,
1378 and change bfd_mips_num_opcodes from const int to int,
1379 so that we can increase the size of the mips opcodes table
1380 dynamically.
1381
1382Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1383
1384 * d30v.h (FLAG_X): Remove unused flag.
1385
1386Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1387
1388 * d30v.h: New file.
1389
1390Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1391
1392 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1393 (PDS_VALUE): Macro to access value field of predefined symbols.
1394 (tic80_next_predefined_symbol): Add prototype.
1395
1396Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1397
1398 * tic80.h (tic80_symbol_to_value): Change prototype to match
1399 change in function, added class parameter.
1400
1401Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1402
1403 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1404 endmask fields, which are somewhat weird in that 0 and 32 are
1405 treated exactly the same.
1406
1407Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1408
1409 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1410 rather than a constant that is 2**X. Reorder them to put bits for
1411 operands that have symbolic names in the upper bits, so they can
1412 be packed into an int where the lower bits contain the value that
1413 corresponds to that symbolic name.
1414 (predefined_symbo): Add struct.
1415 (tic80_predefined_symbols): Declare array of translations.
1416 (tic80_num_predefined_symbols): Declare size of that array.
1417 (tic80_value_to_symbol): Declare function.
1418 (tic80_symbol_to_value): Declare function.
1419
1420Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1421
1422 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1423
1424Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1425
1426 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1427 be the destination register.
1428
1429Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1430
1431 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1432 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1433 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1434 that the opcode can have two vector instructions in a single
1435 32 bit word and we have to encode/decode both.
1436
1437Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1438
1439 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1440 TIC80_OPERAND_RELATIVE for PC relative.
1441 (TIC80_OPERAND_BASEREL): New flag bit for register
1442 base relative.
1443
1444Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1445
1446 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1447
1448Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1449
1450 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1451 ":s" modifier for scaling.
1452
1453Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1454
1455 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1456 (TIC80_OPERAND_M_LI): Ditto
1457
1458Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1459
1460 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1461 (TIC80_OPERAND_CC): New define for condition code operand.
1462 (TIC80_OPERAND_CR): New define for control register operand.
1463
1464Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1465
1466 * tic80.h (struct tic80_opcode): Name changed.
1467 (struct tic80_opcode): Remove format field.
1468 (struct tic80_operand): Add insertion and extraction functions.
1469 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1470 correct ones.
1471 (FMT_*): Ditto.
1472
1473Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1474
1475 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1476 type IV instruction offsets.
1477
1478Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1479
1480 * tic80.h: New file.
1481
1482Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1483
1484 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1485
1486Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1487
1488 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1489 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1490 * v850.h: Fix comment, v850_operand not powerpc_operand.
1491
1492Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1493
1494 * mn10200.h: Flesh out structures and definitions needed by
1495 the mn10200 assembler & disassembler.
1496
1497Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1498
1499 * mips.h: Add mips16 definitions.
1500
1501Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1502
1503 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1504
1505Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1506
1507 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1508 (MN10300_OPERAND_MEMADDR): Define.
1509
1510Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1511
1512 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1513
1514Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1515
1516 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1517
1518Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1519
1520 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1521
1522Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1523
1524 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1525
1526Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1527
1528 * alpha.h: Don't include "bfd.h"; private relocation types are now
1529 negative to minimize problems with shared libraries. Organize
1530 instruction subsets by AMASK extensions and PALcode
1531 implementation.
1532 (struct alpha_operand): Move flags slot for better packing.
1533
1534Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1535
1536 * v850.h (V850_OPERAND_RELAX): New operand flag.
1537
1538Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1539
1540 * mn10300.h (FMT_*): Move operand format definitions
1541 here.
1542
1543Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1544
1545 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1546
1547Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1548
1549 * mn10300.h (mn10300_opcode): Add "format" field.
1550 (MN10300_OPERAND_*): Define.
1551
1552Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1553
1554 * mn10x00.h: Delete.
1555 * mn10200.h, mn10300.h: New files.
1556
1557Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1558
1559 * mn10x00.h: New file.
1560
1561Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1562
1563 * v850.h: Add new flag to indicate this instruction uses a PC
1564 displacement.
1565
1566Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1567
1568 * h8300.h (stmac): Add missing instruction.
1569
1570Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1571
1572 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1573 field.
1574
1575Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1576
1577 * v850.h (V850_OPERAND_EP): Define.
1578
1579 * v850.h (v850_opcode): Add size field.
1580
1581Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1582
1583 * v850.h (v850_operands): Add insert and extract fields, pointers
1584 to functions used to handle unusual operand encoding.
1585 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1586 V850_OPERAND_SIGNED): Defined.
1587
1588Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1589
1590 * v850.h (v850_operands): Add flags field.
1591 (OPERAND_REG, OPERAND_NUM): Defined.
1592
1593Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1594
1595 * v850.h: New file.
1596
1597Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1598
1599 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1600 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1601 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1602 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1603 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1604 Defined.
1605
1606Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1607
1608 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1609 a 3 bit space id instead of a 2 bit space id.
1610
1611Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1612
1613 * d10v.h: Add some additional defines to support the
1614 assembler in determining which operations can be done in parallel.
1615
1616Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1617
1618 * h8300.h (SN): Define.
1619 (eepmov.b): Renamed from "eepmov"
1620 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1621 with them.
1622
1623Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1624
1625 * d10v.h (OPERAND_SHIFT): New operand flag.
1626
1627Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1628
1629 * d10v.h: Changes for divs, parallel-only instructions, and
1630 signed numbers.
1631
1632Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1633
1634 * d10v.h (pd_reg): Define. Putting the definition here allows
1635 the assembler and disassembler to share the same struct.
1636
1637Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1638
1639 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1640 Williams <steve@icarus.com>.
1641
1642Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1643
1644 * d10v.h: New file.
1645
1646Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1647
1648 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1649
1650Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1651
1652 * m68k.h (mcf5200): New macro.
1653 Document names of coldfire control registers.
1654
1655Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1656
1657 * h8300.h (SRC_IN_DST): Define.
1658
1659 * h8300.h (UNOP3): Mark the register operand in this insn
1660 as a source operand, not a destination operand.
1661 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1662 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1663 register operand with SRC_IN_DST.
1664
1665Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1666
1667 * alpha.h: New file.
1668
1669Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1670
1671 * rs6k.h: Remove obsolete file.
1672
1673Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1674
1675 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1676 fdivp, and fdivrp. Add ffreep.
1677
1678Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1679
1680 * h8300.h: Reorder various #defines for readability.
1681 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1682 (BITOP): Accept additional (unused) argument. All callers changed.
1683 (EBITOP): Likewise.
1684 (O_LAST): Bump.
1685 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1686
1687 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1688 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1689 (BITOP, EBITOP): Handle new H8/S addressing modes for
1690 bit insns.
1691 (UNOP3): Handle new shift/rotate insns on the H8/S.
1692 (insns using exr): New instructions.
1693 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1694
1695Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1696
1697 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1698 was incorrect.
1699
1700Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1701
1702 * h8300.h (START): Remove.
1703 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1704 and mov.l insns that can be relaxed.
1705
1706Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1707
1708 * i386.h: Remove Abs32 from lcall.
1709
1710Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1711
1712 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1713 (SLCPOP): New macro.
1714 Mark X,Y opcode letters as in use.
1715
1716Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1717
1718 * sparc.h (F_FLOAT, F_FBR): Define.
1719
1720Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1721
1722 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1723 from all insns.
1724 (ABS8SRC,ABS8DST): Add ABS8MEM.
1725 (add.l): Fix reg+reg variant.
1726 (eepmov.w): Renamed from eepmovw.
1727 (ldc,stc): Fix many cases.
1728
1729Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1730
1731 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1732
1733Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1734
1735 * sparc.h (O): Mark operand letter as in use.
1736
1737Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1738
1739 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1740 Mark operand letters uU as in use.
1741
1742Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1743
1744 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1745 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1746 (SPARC_OPCODE_SUPPORTED): New macro.
1747 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1748 (F_NOTV9): Delete.
1749
1750Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1751
1752 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1753 declaration consistent with return type in definition.
1754
1755Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1756
1757 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1758
1759Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1760
1761 * i386.h (i386_regtab): Add 80486 test registers.
1762
1763Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1764
1765 * i960.h (I_HX): Define.
1766 (i960_opcodes): Add HX instruction.
1767
1768Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1769
1770 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1771 and fclex.
1772
1773Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1774
1775 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1776 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1777 (bfd_* defines): Delete.
1778 (sparc_opcode_archs): Replaces architecture_pname.
1779 (sparc_opcode_lookup_arch): Declare.
1780 (NUMOPCODES): Delete.
1781
1782Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1783
1784 * sparc.h (enum sparc_architecture): Add v9a.
1785 (ARCHITECTURES_CONFLICT_P): Update.
1786
1787Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1788
1789 * i386.h: Added Pentium Pro instructions.
1790
1791Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1792
1793 * m68k.h: Document new 'W' operand place.
1794
1795Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1796
1797 * hppa.h: Add lci and syncdma instructions.
1798
1799Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1800
1801 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1802 instructions.
1803
1804Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1805
1806 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1807 assembler's -mcom and -many switches.
1808
1809Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1810
1811 * i386.h: Fix cmpxchg8b extension opcode description.
1812
1813Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1814
1815 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1816 and register cr4.
1817
1818Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1819
1820 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1821
1822Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1823
1824 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1825
1826Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1827
1828 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1829
1830Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1831
1832 * m68kmri.h: Remove.
1833
1834 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1835 declarations. Remove F_ALIAS and flag field of struct
1836 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1837 int. Make name and args fields of struct m68k_opcode const.
1838
1839Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1840
1841 * sparc.h (F_NOTV9): Define.
1842
1843Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1844
1845 * mips.h (INSN_4010): Define.
1846
1847Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1848
1849 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1850
1851 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1852 * m68k.h: Fix argument descriptions of coprocessor
1853 instructions to allow only alterable operands where appropriate.
1854 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1855 (m68k_opcode_aliases): Add more aliases.
1856
1857Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1858
1859 * m68k.h: Added explcitly short-sized conditional branches, and a
1860 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1861 svr4-based configurations.
1862
1863Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1864
1865 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1866 * i386.h: added missing Data16/Data32 flags to a few instructions.
1867
1868Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1869
1870 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1871 (OP_MASK_BCC, OP_SH_BCC): Define.
1872 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1873 (OP_MASK_CCC, OP_SH_CCC): Define.
1874 (INSN_READ_FPR_R): Define.
1875 (INSN_RFE): Delete.
1876
1877Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1878
1879 * m68k.h (enum m68k_architecture): Deleted.
1880 (struct m68k_opcode_alias): New type.
1881 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1882 matching constraints, values and flags. As a side effect of this,
1883 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1884 as I know were never used, now may need re-examining.
1885 (numopcodes): Now const.
1886 (m68k_opcode_aliases, numaliases): New variables.
1887 (endop): Deleted.
1888 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1889 m68k_opcode_aliases; update declaration of m68k_opcodes.
1890
1891Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1892
1893 * hppa.h (delay_type): Delete unused enumeration.
1894 (pa_opcode): Replace unused delayed field with an architecture
1895 field.
1896 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1897
1898Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1899
1900 * mips.h (INSN_ISA4): Define.
1901
1902Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1903
1904 * mips.h (M_DLA_AB, M_DLI): Define.
1905
1906Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1907
1908 * hppa.h (fstwx): Fix single-bit error.
1909
1910Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1911
1912 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1913
1914Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1915
1916 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1917 debug registers. From Charles Hannum (mycroft@netbsd.org).
1918
1919Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1920
1921 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1922 i386 support:
1923 * i386.h (MOV_AX_DISP32): New macro.
1924 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1925 of several call/return instructions.
1926 (ADDR_PREFIX_OPCODE): New macro.
1927
1928Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1929
1930 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1931
4f1d9bd8
NC		 1932 * vax.h (struct vot_wot, field `args'): Make it pointer to const
1933 char.
252b5132
RH		 1934 (struct vot, field `name'): ditto.
1935
1936Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1937
1938 * vax.h: Supply and properly group all values in end sentinel.
1939
1940Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1941
1942 * mips.h (INSN_ISA, INSN_4650): Define.
1943
1944Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1945
1946 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1947 systems with a separate instruction and data cache, such as the
1948 29040, these instructions take an optional argument.
1949
1950Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1951
1952 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1953 INSN_TRAP.
1954
1955Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1956
1957 * mips.h (INSN_STORE_MEMORY): Define.
1958
1959Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1960
1961 * sparc.h: Document new operand type 'x'.
1962
1963Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1964
1965 * i960.h (I_CX2): New instruction category. It includes
1966 instructions available on Cx and Jx processors.
1967 (I_JX): New instruction category, for JX-only instructions.
1968 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1969 Jx-only instructions, in I_JX category.
1970
1971Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1972
1973 * ns32k.h (endop): Made pointer const too.
1974
1975Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1976
1977 * ns32k.h: Drop Q operand type as there is no correct use
1978 for it. Add I and Z operand types which allow better checking.
1979
1980Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1981
1982 * h8300.h (xor.l) :fix bit pattern.
1983 (L_2): New size of operand.
1984 (trapa): Use it.
1985
1986Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1987
1988 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1989
1990Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1991
1992 * sparc.h: Include v9 definitions.
1993
1994Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1995
1996 * m68k.h (m68060): Defined.
1997 (m68040up, mfloat, mmmu): Include it.
1998 (struct m68k_opcode): Widen `arch' field.
1999 (m68k_opcodes): Updated for M68060. Removed comments that were
2000 instructions commented out by "JF" years ago.
2001
2002Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2003
2004 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2005 add a one-bit `flags' field.
2006 (F_ALIAS): New macro.
2007
2008Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2009
2010 * h8300.h (dec, inc): Get encoding right.
2011
2012Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2013
2014 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2015 a flag instead.
2016 (PPC_OPERAND_SIGNED): Define.
2017 (PPC_OPERAND_SIGNOPT): Define.
2018
2019Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2020
2021 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2022 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2023
2024Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2025
2026 * i386.h: Reverse last change. It'll be handled in gas instead.
2027
2028Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2029
2030 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2031 slower on the 486 and used the implicit shift count despite the
2032 explicit operand. The one-operand form is still available to get
2033 the shorter form with the implicit shift count.
2034
2035Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2036
2037 * hppa.h: Fix typo in fstws arg string.
2038
2039Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2040
2041 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2042
2043Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2044
2045 * ppc.h (PPC_OPCODE_601): Define.
2046
2047Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2048
2049 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2050 (so we can determine valid completers for both addb and addb[tf].)
2051
2052 * hppa.h (xmpyu): No floating point format specifier for the
2053 xmpyu instruction.
2054
2055Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2056
2057 * ppc.h (PPC_OPERAND_NEXT): Define.
2058 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2059 (struct powerpc_macro): Define.
2060 (powerpc_macros, powerpc_num_macros): Declare.
2061
2062Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2063
2064 * ppc.h: New file. Header file for PowerPC opcode table.
2065
2066Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2067
2068 * hppa.h: More minor template fixes for sfu and copr (to allow
2069 for easier disassembly).
2070
2071 * hppa.h: Fix templates for all the sfu and copr instructions.
2072
2073Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2074
2075 * i386.h (push): Permit Imm16 operand too.
2076
2077Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2078
2079 * h8300.h (andc): Exists in base arch.
2080
2081Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2082
2083 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2084 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2085
2086Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2087
2088 * hppa.h: Add FP quadword store instructions.
2089
2090Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2091
2092 * mips.h: (M_J_A): Added.
2093 (M_LA): Removed.
2094
2095Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2096
2097 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2098 <mellon@pepper.ncd.com>.
2099
2100Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2101
2102 * hppa.h: Immediate field in probei instructions is unsigned,
2103 not low-sign extended.
2104
2105Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2106
2107 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2108
2109Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2110
2111 * i386.h: Add "fxch" without operand.
2112
2113Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2114
2115 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2116
2117Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2118
2119 * hppa.h: Add gfw and gfr to the opcode table.
2120
2121Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2122
2123 * m88k.h: extended to handle m88110.
2124
2125Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2126
2127 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2128 addresses.
2129
2130Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2131
2132 * i960.h (i960_opcodes): Properly bracket initializers.
2133
2134Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2135
2136 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2137
2138Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2139
2140 * m68k.h (two): Protect second argument with parentheses.
2141
2142Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2143
2144 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2145 Deleted old in/out instructions in "#if 0" section.
2146
2147Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2148
2149 * i386.h (i386_optab): Properly bracket initializers.
2150
2151Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2152
2153 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2154 Jeff Law, law@cs.utah.edu).
2155
2156Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2157
2158 * i386.h (lcall): Accept Imm32 operand also.
2159
2160Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2161
2162 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2163 (M_DABS): Added.
2164
2165Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2166
2167 * mips.h (INSN_*): Changed values. Removed unused definitions.
2168 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2169 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2170 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2171 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2172 (M_*): Added new values for r6000 and r4000 macros.
2173 (ANY_DELAY): Removed.
2174
2175Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2176
2177 * mips.h: Added M_LI_S and M_LI_SS.
2178
2179Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2180
2181 * h8300.h: Get some rare mov.bs correct.
2182
2183Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2184
2185 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2186 been included.
2187
2188Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2189
2190 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2191 jump instructions, for use in disassemblers.
2192
2193Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2194
2195 * m88k.h: Make bitfields just unsigned, not unsigned long or
2196 unsigned short.
2197
2198Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2199
2200 * hppa.h: New argument type 'y'. Use in various float instructions.
2201
2202Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2203
2204 * hppa.h (break): First immediate field is unsigned.
2205
2206 * hppa.h: Add rfir instruction.
2207
2208Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2209
2210 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2211
2212Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2213
2214 * mips.h: Reworked the hazard information somewhat, and fixed some
2215 bugs in the instruction hazard descriptions.
2216
2217Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2218
2219 * m88k.h: Corrected a couple of opcodes.
2220
2221Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2222
2223 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2224 new version includes instruction hazard information, but is
2225 otherwise reasonably similar.
2226
2227Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2228
2229 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2230
2231Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2232
2233 Patches from Jeff Law, law@cs.utah.edu:
2234 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2235 Make the tables be the same for the following instructions:
2236 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2237 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2238 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2239 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2240 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2241 "fcmp", and "ftest".
2242
2243 * hppa.h: Make new and old tables the same for "break", "mtctl",
2244 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2245 Fix typo in last patch. Collapse several #ifdefs into a
2246 single #ifdef.
2247
2248 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2249 of the comments up-to-date.
2250
2251 * hppa.h: Update "free list" of letters and update
2252 comments describing each letter's function.
2253
4f1d9bd8
NC		 2254Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2255
2256 * h8300.h: Lots of little fixes for the h8/300h.
2257
2258Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2259
2260 Support for H8/300-H
2261 * h8300.h: Lots of new opcodes.
2262
252b5132
RH		 2263Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2264
2265 * h8300.h: checkpoint, includes H8/300-H opcodes.
2266
2267Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2268
2269 * Patches from Jeffrey Law <law@cs.utah.edu>.
2270 * hppa.h: Rework single precision FP
2271 instructions so that they correctly disassemble code
2272 PA1.1 code.
2273
2274Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2275
2276 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2277 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2278
2279Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2280
2281 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2282 gdb will define it for now.
2283
2284Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2285
2286 * sparc.h: Don't end enumerator list with comma.
2287
2288Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2289
2290 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2291 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2292 ("bc2t"): Correct typo.
2293 ("[ls]wc[023]"): Use T rather than t.
2294 ("c[0123]"): Define general coprocessor instructions.
2295
2296Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2297
2298 * m68k.h: Move split point for gcc compilation more towards
2299 middle.
2300
2301Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2302
2303 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2304 simply wrong, ics, rfi, & rfsvc were missing).
2305 Add "a" to opr_ext for "bb". Doc fix.
2306
2307Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2308
2309 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2310 * mips.h: Add casts, to suppress warnings about shifting too much.
2311 * m68k.h: Document the placement code '9'.
2312
2313Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2314
2315 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2316 allows callers to break up the large initialized struct full of
2317 opcodes into two half-sized ones. This permits GCC to compile
2318 this module, since it takes exponential space for initializers.
2319 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2320
2321Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2322
2323 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2324 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2325 initialized structs in it.
2326
2327Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2328
2329 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2330 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2331 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2332
2333Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2334
2335 * mips.h: document "i" and "j" operands correctly.
2336
2337Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2338
2339 * mips.h: Removed endianness dependency.
2340
2341Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2342
2343 * h8300.h: include info on number of cycles per instruction.
2344
2345Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2346
2347 * hppa.h: Move handy aliases to the front. Fix masks for extract
2348 and deposit instructions.
2349
2350Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2351
2352 * i386.h: accept shld and shrd both with and without the shift
2353 count argument, which is always %cl.
2354
2355Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2356
2357 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2358 (one_byte_segment_defaults, two_byte_segment_defaults,
2359 i386_prefixtab_end): Ditto.
2360
2361Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2362
2363 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2364 for operand 2; from John Carr, jfc@dsg.dec.com.
2365
2366Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2367
2368 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2369 always use 16-bit offsets. Makes calculated-size jump tables
2370 feasible.
2371
2372Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2373
2374 * i386.h: Fix one-operand forms of in* and out* patterns.
2375
2376Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2377
2378 * m68k.h: Added CPU32 support.
2379
2380Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2381
2382 * mips.h (break): Disassemble the argument. Patch from
2383 jonathan@cs.stanford.edu (Jonathan Stone).
2384
2385Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2386
2387 * m68k.h: merged Motorola and MIT syntax.
2388
2389Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2390
2391 * m68k.h (pmove): make the tests less strict, the 68k book is
2392 wrong.
2393
2394Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2395
2396 * m68k.h (m68ec030): Defined as alias for 68030.
2397 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2398 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2399 them. Tightened description of "fmovex" to distinguish it from
2400 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2401 up descriptions that claimed versions were available for chips not
2402 supporting them. Added "pmovefd".
2403
2404Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2405
2406 * m68k.h: fix where the . goes in divull
2407
2408Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2409
2410 * m68k.h: the cas2 instruction is supposed to be written with
2411 indirection on the last two operands, which can be either data or
2412 address registers. Added a new operand type 'r' which accepts
2413 either register type. Added new cases for cas2l and cas2w which
2414 use them. Corrected masks for cas2 which failed to recognize use
2415 of address register.
2416
2417Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2418
2419 * m68k.h: Merged in patches (mostly m68040-specific) from
2420 Colin Smith <colin@wrs.com>.
2421
2422 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2423 base). Also cleaned up duplicates, re-ordered instructions for
2424 the sake of dis-assembling (so aliases come after standard names).
2425 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2426
2427Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2428
2429 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2430 all missing .s
2431
2432Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2433
2434 * sparc.h: Moved tables to BFD library.
2435
2436 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2437
2438Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2439
2440 * h8300.h: Finish filling in all the holes in the opcode table,
2441 so that the Lucid C compiler can digest this as well...
2442
2443Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2444
2445 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2446 Fix opcodes on various sizes of fild/fist instructions
2447 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2448 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2449
2450Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2451
2452 * h8300.h: Fill in all the holes in the opcode table so that the
2453 losing HPUX C compiler can digest this...
2454
2455Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2456
2457 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2458 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2459
2460Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2461
2462 * sparc.h: Add new architecture variant sparclite; add its scan
2463 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2464
2465Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2466
2467 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2468 fy@lucid.com).
2469
2470Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2471
2472 * rs6k.h: New version from IBM (Metin).
2473
2474Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2475
2476 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2477 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2478
2479Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2480
2481 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2482
2483Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2484
2485 * m68k.h (one, two): Cast macro args to unsigned to suppress
2486 complaints from compiler and lint about integer overflow during
2487 shift.
2488
2489Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2490
2491 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2492
2493Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2494
2495 * mips.h: Make bitfield layout depend on the HOST compiler,
2496 not on the TARGET system.
2497
2498Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2499
2500 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2501 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2502 <TRANLE@INTELLICORP.COM>.
2503
2504Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2505
2506 * h8300.h: turned op_type enum into #define list
2507
2508Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2509
2510 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2511 similar instructions -- they've been renamed to "fitoq", etc.
2512 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2513 number of arguments.
2514 * h8300.h: Remove extra ; which produces compiler warning.
2515
2516Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2517
2518 * sparc.h: fix opcode for tsubcctv.
2519
2520Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2521
2522 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2523
2524Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2525
2526 * sparc.h (nop): Made the 'lose' field be even tighter,
2527 so only a standard 'nop' is disassembled as a nop.
2528
2529Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2530
2531 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2532 disassembled as a nop.
2533
4f1d9bd8
NC		 2534Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2535
2536 * m68k.h, sparc.h: ANSIfy enums.
2537
252b5132
RH		 2538Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2539
2540 * sparc.h: fix a typo.
2541
2542Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2543
2544 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2545 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 2546 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH		 2547
2548\f
2549Local Variables:
2550version-control: never
2551End:
GDB Binutils - Deliverables
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