2002-11-18 Klee Dienes <kdienes@apple.com>
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
84037f8c
KD
12002-11-18 Klee Dienes <kdienes@apple.com>
2
3 * arc.h (arc_ext_opcodes): Declare as extern.
4 (arc_ext_operands): Declare as extern.
5 * i860.h (i860_opcodes): Declare as const.
6
eb128449
SS
72002-11-18 Svein E. Seldal <Svein.Seldal@solidas.com>
8
9 * tic4x.h: File reordering. Added enhanced opcodes.
10
112002-11-16 Svein E. Seldal <Svein.Seldal@solidas.com>
12
13 * tic4x.h: Major rewrite of entire file. Define instruction
14 classes, and put each instruction into a class.
15
162002-11-11 Svein E. Seldal <Svein.Seldal@solidas.com>
17
18 * tic4x.h: Added new opcodes and corrected some bugs. Add support
19 for new DSP types.
20
ea6a213a
AM
212002-10-14 Alan Modra <amodra@bigpond.net.au>
22
23 * cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.
24
701b80cd 252002-09-30 Gavin Romig-Koch <gavin@redhat.com>
9752cf1b
RS
26 Ken Raeburn <raeburn@cygnus.com>
27 Aldy Hernandez <aldyh@redhat.com>
28 Eric Christopher <echristo@redhat.com>
29 Richard Sandiford <rsandifo@redhat.com>
30
31 * mips.h: Update comment for new opcodes.
32 (OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
33 (OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
34 (INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
35 (CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
36 (OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
37 Don't match CPU_R4111 with INSN_4100.
38
0449635d
EZ
392002-08-19 Elena Zannoni <ezannoni@redhat.com>
40
41 From matthew green <mrg@redhat.com>
42
43 * ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
44 instructions.
45 (PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
46 PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
47 e500x2 Integer select, branch locking, performance monitor,
48 cache locking and machine check APUs, respectively.
49 (PPC_OPCODE_EFS): New opcode type for efs* instructions.
50 (PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
51
030ad53b
SC
522002-08-13 Stephane Carrez <stcarrez@nerim.fr>
53
54 * m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
55 (M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
56 M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
57 memory banks.
58 (M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
59
aec421e0
TS
602002-07-09 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
61
62 * mips.h (INSN_MIPS16): New define.
63
cd61ebfe
AM
642002-07-08 Alan Modra <amodra@bigpond.net.au>
65
66 * i386.h: Remove IgnoreSize from movsx and movzx.
67
92007e40
AM
682002-06-08 Alan Modra <amodra@bigpond.net.au>
69
70 * a29k.h: Replace CONST with const.
71 (CONST): Don't define.
72 * convex.h: Replace CONST with const.
73 (CONST): Don't define.
74 * dlx.h: Replace CONST with const.
75 * or32.h (CONST): Don't define.
76
deec1734
CD
772002-05-30 Chris G. Demetriou <cgd@broadcom.com>
78
79 * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
80 (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
81 (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
82 (INSN_MDMX): New constants, for MDMX support.
83 (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
84
d172d4ba
NC
852002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
86
87 * dlx.h: New file.
88
b3f7d5fd
AM
892002-05-25 Alan Modra <amodra@bigpond.net.au>
90
91 * ia64.h: Use #include "" instead of <> for local header files.
92 * sparc.h: Likewise.
93
771c7ce4
TS
942002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
95
96 * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
97
b9c9142c
AV
982002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
99
100 * h8300.h: Corrected defs of all control regs
101 and eepmov instr.
102
cd47f4f1
AM
1032002-04-11 Alan Modra <amodra@bigpond.net.au>
104
105 * i386.h: Add intel mode cmpsd and movsd.
b9612d14 106 Put them before SSE2 insns, so that rep prefix works.
cd47f4f1 107
1f25f5d3
CD
1082002-03-15 Chris G. Demetriou <cgd@broadcom.com>
109
110 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
111 instructions.
112 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
113 may be passed along with the ISA bitmask.
114
e4b29ec6
AM
1152002-03-05 Paul Koning <pkoning@equallogic.com>
116
117 * pdp11.h: Add format codes for float instruction formats.
118
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AM
1192002-02-25 Alan Modra <amodra@bigpond.net.au>
120
121 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
122
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JH
123Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
124
125 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
126
85a33fe2
JH
127Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
128
129 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
130 (xchg): Fix.
131 (in, out): Disable 64bit operands.
132 (call, jmp): Avoid REX prefixes.
133 (jcxz): Prohibit in 64bit mode
134 (jrcxz, loop): Add 64bit variants.
135 (movq): Fix patterns.
136 (movmskps, pextrw, pinstrw): Add 64bit variants.
137
3b16e843
NC
1382002-01-31 Ivan Guzvinec <ivang@opencores.org>
139
140 * or32.h: New file.
141
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GH
1422002-01-22 Graydon Hoare <graydon@redhat.com>
143
144 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
145 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
146
7b45c6e1
AM
1472002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
148
149 * h8300.h: Comment typo fix.
150
a09cf9bd
MG
1512002-01-03 matthew green <mrg@redhat.com>
152
153 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
154 (PPC_OPCODE_BOOKE64): Likewise.
155
1befefea
JL
156Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
157
158 * hppa.h (call, ret): Move to end of table.
159 (addb, addib): PA2.0 variants should have been PA2.0W.
160 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
161 happy.
162 (fldw, fldd, fstw, fstd, bb): Likewise.
163 (short loads/stores): Tweak format specifier slightly to keep
164 disassembler happy.
165 (indexed loads/stores): Likewise.
166 (absolute loads/stores): Likewise.
167
124ddbb2
AO
1682001-12-04 Alexandre Oliva <aoliva@redhat.com>
169
170 * d10v.h (OPERAND_NOSP): New macro.
171
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AO
1722001-11-29 Alexandre Oliva <aoliva@redhat.com>
173
174 * d10v.h (OPERAND_SP): New macro.
175
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AM
1762001-11-15 Alan Modra <amodra@bigpond.net.au>
177
178 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
179
6e917903
TW
1802001-11-11 Timothy Wall <twall@alum.mit.edu>
181
182 * tic54x.h: Revise opcode layout; don't really need a separate
183 structure for parallel opcodes.
184
e5470cdc
AM
1852001-11-13 Zack Weinberg <zack@codesourcery.com>
186 Alan Modra <amodra@bigpond.net.au>
187
188 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
189 accept WordReg.
190
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CD
1912001-11-04 Chris Demetriou <cgd@broadcom.com>
192
193 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
194
3c3bdf30
NC
1952001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
196
197 * mmix.h: New file.
198
e4432525
CD
1992001-10-18 Chris Demetriou <cgd@broadcom.com>
200
201 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
202 of the expression, to make source code merging easier.
203
8ff529d8
CD
2042001-10-17 Chris Demetriou <cgd@broadcom.com>
205
206 * mips.h: Sort coprocessor instruction argument characters
207 in comment, add a few more words of description for "H".
208
2228315b
CD
2092001-10-17 Chris Demetriou <cgd@broadcom.com>
210
211 * mips.h (INSN_SB1): New cpu-specific instruction bit.
212 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
213 if cpu is CPU_SB1.
214
f5c120c5
MG
2152001-10-17 matthew green <mrg@redhat.com>
216
217 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
218
418c1742
MG
2192001-10-12 matthew green <mrg@redhat.com>
220
0716ce0d
MG
221 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
222 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
223 instructions, respectively.
418c1742 224
6ff2f2ba
NC
2252001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
226
227 * v850.h: Remove spurious comment.
228
015cf428
NC
2292001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
230
231 * h8300.h: Fix compile time warning messages
232
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RH
2332001-09-04 Richard Henderson <rth@redhat.com>
234
235 * alpha.h (struct alpha_operand): Pack elements into bitfields.
236
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EC
2372001-08-31 Eric Christopher <echristo@redhat.com>
238
239 * mips.h: Remove CPU_MIPS32_4K.
240
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AM
2412001-08-27 Torbjorn Granlund <tege@swox.com>
242
243 * ppc.h (PPC_OPERAND_DS): Define.
244
d83c6548
AJ
2452001-08-25 Andreas Jaeger <aj@suse.de>
246
247 * d30v.h: Fix declaration of reg_name_cnt.
248
249 * d10v.h: Fix declaration of d10v_reg_name_cnt.
250
251 * arc.h: Add prototypes from opcodes/arc-opc.c.
252
99c14723
TS
2532001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
254
255 * mips.h (INSN_10000): Define.
256 (OPCODE_IS_MEMBER): Check for INSN_10000.
257
11b37b7b
AM
2582001-08-10 Alan Modra <amodra@one.net.au>
259
260 * ppc.h: Revert 2001-08-08.
261
3b16e843
NC
2622001-08-10 Richard Sandiford <rsandifo@redhat.com>
263
264 * mips.h (INSN_GP32): Remove.
265 (OPCODE_IS_MEMBER): Remove gp32 parameter.
266 (M_MOVE): New macro identifier.
267
0f1bac05
AM
2682001-08-08 Alan Modra <amodra@one.net.au>
269
270 1999-10-25 Torbjorn Granlund <tege@swox.com>
271 * ppc.h (struct powerpc_operand): New field `reloc'.
272
3b16e843
NC
2732001-08-01 Aldy Hernandez <aldyh@redhat.com>
274
275 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
276
2772001-07-12 Jeff Johnston <jjohnstn@redhat.com>
278
279 * cgen.h (CGEN_INSN): Add regex support.
280 (build_insn_regex): Declare.
281
81f6038f
FCE
2822001-07-11 Frank Ch. Eigler <fche@redhat.com>
283
284 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
285 (cgen_cpu_desc): Ditto.
286
32cfffe3
BE
2872001-07-07 Ben Elliston <bje@redhat.com>
288
289 * m88k.h: Clean up and reformat. Remove unused code.
290
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GK
2912001-06-14 Geoffrey Keating <geoffk@redhat.com>
292
293 * cgen.h (cgen_keyword): Add nonalpha_chars field.
294
d1cf510e
NC
2952001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
296
297 * mips.h (CPU_R12000): Define.
298
e281c457
JH
2992001-05-23 John Healy <jhealy@redhat.com>
300
301 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
d83c6548 302
aa5f19f2
NC
3032001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
304
305 * mips.h (INSN_ISA_MASK): Define.
306
67d6227d
AM
3072001-05-12 Alan Modra <amodra@one.net.au>
308
309 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
310 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
311 and use InvMem as these insns must have register operands.
312
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AM
3132001-05-04 Alan Modra <amodra@one.net.au>
314
315 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
316 and pextrw to swap reg/rm assignments.
317
4ef7f0bf
HPN
3182001-04-05 Hans-Peter Nilsson <hp@axis.com>
319
320 * cris.h (enum cris_insn_version_usage): Correct comment for
321 cris_ver_v3p.
322
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AM
3232001-03-24 Alan Modra <alan@linuxcare.com.au>
324
325 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
326 Add InvMem to first operand of "maskmovdqu".
327
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HPN
3282001-03-22 Hans-Peter Nilsson <hp@axis.com>
329
330 * cris.h (ADD_PC_INCR_OPCODE): New macro.
331
361bfa20
KH
3322001-03-21 Kazu Hirata <kazu@hxi.com>
333
334 * h8300.h: Fix formatting.
335
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AM
3362001-03-22 Alan Modra <alan@linuxcare.com.au>
337
338 * i386.h (i386_optab): Add paddq, psubq.
339
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AM
3402001-03-19 Alan Modra <alan@linuxcare.com.au>
341
342 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
343
80a523c2
NC
3442001-02-28 Igor Shevlyakov <igor@windriver.com>
345
346 * m68k.h: new defines for Coldfire V4. Update mcf to know
347 about mcf5407.
348
e135f41b
NC
3492001-02-18 lars brinkhoff <lars@nocrew.org>
350
351 * pdp11.h: New file.
352
3532001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH
354
355 * i386.h (i386_optab): SSE integer converison instructions have
356 64bit versions on x86-64.
357
8eaec934
NC
3582001-02-10 Nick Clifton <nickc@redhat.com>
359
360 * mips.h: Remove extraneous whitespace. Formating change to allow
361 for future contribution.
362
a85d7ed0
NC
3632001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
364
365 * s390.h: New file.
366
0715dc88
PM
3672001-02-02 Patrick Macdonald <patrickm@redhat.com>
368
369 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
370 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
371 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
372
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AM
3732001-01-24 Karsten Keil <kkeil@suse.de>
374
375 * i386.h (i386_optab): Fix swapgs
376
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AM
3772001-01-14 Alan Modra <alan@linuxcare.com.au>
378
379 * hppa.h: Describe new '<' and '>' operand types, and tidy
380 existing comments.
381 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
382 Remove duplicate "ldw j(s,b),x". Sort some entries.
383
e135f41b 3842001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH
385
386 * i386.h (i386_optab): Fix pusha and ret templates.
387
0d2bcfaf
NC
3882001-01-11 Peter Targett <peter.targett@arccores.com>
389
390 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
391 definitions for masking cpu type.
392 (arc_ext_operand_value) New structure for storing extended
393 operands.
394 (ARC_OPERAND_*) Flags for operand values.
395
3962001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH
397
398 * i386.h (pinsrw): Add.
399 (pshufw): Remove.
400 (cvttpd2dq): Fix operands.
401 (cvttps2dq): Likewise.
402 (movq2q): Rename to movdq2q.
403
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AM
4042001-01-10 Richard Schaal <richard.schaal@intel.com>
405
406 * i386.h: Correct movnti instruction.
407
8c1f9e76
JJ
4082001-01-09 Jeff Johnston <jjohnstn@redhat.com>
409
410 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
411 of operands (unsigned char or unsigned short).
412 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
413 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
414
0d2bcfaf 4152001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH
416
417 * i386.h (i386_optab): Make [sml]fence template to use immext field.
418
0d2bcfaf 4192001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH
420
421 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
422 introduced by Pentium4
423
0d2bcfaf 4242000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH
425
426 * i386.h (i386_optab): Add "rex*" instructions;
427 add swapgs; disable jmp/call far direct instructions for
428 64bit mode; add syscall and sysret; disable registers for 0xc6
429 template. Add 'q' suffixes to extendable instructions, disable
079966a8 430 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH
431 (i386_regtab): Add extended registers.
432 (*Suf): Add No_qSuf.
433 (q_Suf, wlq_Suf, bwlq_Suf): New.
434
0d2bcfaf 4352000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH
436
437 * i386.h (i386_optab): Replace "Imm" with "EncImm".
438 (i386_regtab): Add flags field.
d83c6548 439
bf40d919
NC
4402000-12-12 Nick Clifton <nickc@redhat.com>
441
442 * mips.h: Fix formatting.
443
4372b673
NC
4442000-12-01 Chris Demetriou <cgd@sibyte.com>
445
446 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
447 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
448 OP_*_SYSCALL definitions.
449 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
450 19 bit wait codes.
451 (MIPS operand specifier comments): Remove 'm', add 'U' and
452 'J', and update the meaning of 'B' so that it's more general.
453
e7af610e
NC
454 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
455 INSN_ISA5): Renumber, redefine to mean the ISA at which the
456 instruction was added.
457 (INSN_ISA32): New constant.
458 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
459 Renumber to avoid new and/or renumbered INSN_* constants.
460 (INSN_MIPS32): Delete.
461 (ISA_UNKNOWN): New constant to indicate unknown ISA.
462 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
463 ISA_MIPS32): New constants, defined to be the mask of INSN_*
d83c6548 464 constants available at that ISA level.
e7af610e
NC
465 (CPU_UNKNOWN): New constant to indicate unknown CPU.
466 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
467 define it with a unique value.
468 (OPCODE_IS_MEMBER): Update for new ISA membership-related
469 constant meanings.
470
84ea6cf2 471 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
d83c6548 472 definitions.
84ea6cf2 473
c6c98b38
NC
474 * mips.h (CPU_SB1): New constant.
475
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JJ
4762000-10-20 Jakub Jelinek <jakub@redhat.com>
477
478 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
479 Note that '3' is used for siam operand.
480
139368c9
JW
4812000-09-22 Jim Wilson <wilson@cygnus.com>
482
483 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
484
156c2f8b 4852000-09-13 Anders Norlander <anorland@acc.umu.se>
d83c6548 486
156c2f8b
NC
487 * mips.h: Use defines instead of hard-coded processor numbers.
488 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
d83c6548 489 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
156c2f8b
NC
490 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
491 CPU_4KC, CPU_4KM, CPU_4KP): Define..
492 (OPCODE_IS_MEMBER): Use new defines.
d83c6548 493 (OP_MASK_SEL, OP_SH_SEL): Define.
156c2f8b 494 (OP_MASK_CODE20, OP_SH_CODE20): Define.
d83c6548
AJ
495 Add 'P' to used characters.
496 Use 'H' for coprocessor select field.
156c2f8b 497 Use 'm' for 20 bit breakpoint code.
d83c6548
AJ
498 Document new arg characters and add to used characters.
499 (INSN_MIPS32): New define for MIPS32 extensions.
500 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
156c2f8b 501
3c5ce02e
AM
5022000-09-05 Alan Modra <alan@linuxcare.com.au>
503
504 * hppa.h: Mention cz completer.
505
50b81f19
JW
5062000-08-16 Jim Wilson <wilson@cygnus.com>
507
508 * ia64.h (IA64_OPCODE_POSTINC): New.
509
fc29466d
L
5102000-08-15 H.J. Lu <hjl@gnu.org>
511
512 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
513 IgnoreSize change.
514
4f1d9bd8
NC
5152000-08-08 Jason Eckhardt <jle@cygnus.com>
516
517 * i860.h: Small formatting adjustments.
518
45ee1401
DC
5192000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
520
521 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
522 Move related opcodes closer to each other.
523 Minor changes in comments, list undefined opcodes.
524
9d551405
DB
5252000-07-26 Dave Brolley <brolley@redhat.com>
526
527 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
528
4f1d9bd8
NC
5292000-07-22 Jason Eckhardt <jle@cygnus.com>
530
531 * i860.h (btne, bte, bla): Changed these opcodes
532 to use sbroff ('r') instead of split16 ('s').
533 (J, K, L, M): New operand types for 16-bit aligned fields.
534 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
535 use I, J, K, L, M instead of just I.
536 (T, U): New operand types for split 16-bit aligned fields.
537 (st.x): Changed these opcodes to use S, T, U instead of just S.
538 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
539 exist on the i860.
540 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
541 (pfeq.ss, pfeq.dd): New opcodes.
542 (st.s): Fixed incorrect mask bits.
543 (fmlow): Fixed incorrect mask bits.
544 (fzchkl, pfzchkl): Fixed incorrect mask bits.
545 (faddz, pfaddz): Fixed incorrect mask bits.
546 (form, pform): Fixed incorrect mask bits.
547 (pfld.l): Fixed incorrect mask bits.
548 (fst.q): Fixed incorrect mask bits.
549 (all floating point opcodes): Fixed incorrect mask bits for
550 handling of dual bit.
551
c8488617
HPN
5522000-07-20 Hans-Peter Nilsson <hp@axis.com>
553
554 cris.h: New file.
555
65aa24b6
NC
5562000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
557
558 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
559 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
560 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
561 (AVR_ISA_M83): Define for ATmega83, ATmega85.
562 (espm): Remove, because ESPM removed in databook update.
563 (eicall, eijmp): Move to the end of opcode table.
564
60bcf0fa
NC
5652000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
566
567 * m68hc11.h: New file for support of Motorola 68hc11.
568
60a2978a
DC
569Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
570
571 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
572
68ab2dd9
DC
573Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
574
575 * avr.h: New file with AVR opcodes.
576
f0662e27
DL
577Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
578
579 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
580
b722f2be
AM
5812000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
582
583 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
584
f9e0cf0b
AM
5852000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
586
587 * i386.h: Use sl_FP, not sl_Suf for fild.
588
f660ee8b
FCE
5892000-05-16 Frank Ch. Eigler <fche@redhat.com>
590
591 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
592 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
593 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
594 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
595
558b0a60
AM
5962000-05-13 Alan Modra <alan@linuxcare.com.au>,
597
598 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
599
e413e4e9
AM
6002000-05-13 Alan Modra <alan@linuxcare.com.au>,
601 Alexander Sokolov <robocop@netlink.ru>
602
603 * i386.h (i386_optab): Add cpu_flags for all instructions.
604
6052000-05-13 Alan Modra <alan@linuxcare.com.au>
606
607 From Gavin Romig-Koch <gavin@cygnus.com>
608 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
609
5c84d377
TW
6102000-05-04 Timothy Wall <twall@cygnus.com>
611
612 * tic54x.h: New.
613
966f959b
C
6142000-05-03 J.T. Conklin <jtc@redback.com>
615
616 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
617 (PPC_OPERAND_VR): New operand flag for vector registers.
618
c5d05dbb
JL
6192000-05-01 Kazu Hirata <kazu@hxi.com>
620
621 * h8300.h (EOP): Add missing initializer.
622
a7fba0e0
JL
623Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
624
625 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
626 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
627 New operand types l,y,&,fe,fE,fx added to support above forms.
628 (pa_opcodes): Replaced usage of 'x' as source/target for
629 floating point double-word loads/stores with 'fx'.
630
800eeca4
JW
631Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
632 David Mosberger <davidm@hpl.hp.com>
633 Timothy Wall <twall@cygnus.com>
634 Jim Wilson <wilson@cygnus.com>
635
636 * ia64.h: New file.
637
ba23e138
NC
6382000-03-27 Nick Clifton <nickc@cygnus.com>
639
640 * d30v.h (SHORT_A1): Fix value.
641 (SHORT_AR): Renumber so that it is at the end of the list of short
642 instructions, not the end of the list of long instructions.
643
d0b47220
AM
6442000-03-26 Alan Modra <alan@linuxcare.com>
645
646 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
647 problem isn't really specific to Unixware.
648 (OLDGCC_COMPAT): Define.
649 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
650 destination %st(0).
651 Fix lots of comments.
652
866afedc
NC
6532000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
654
655 * d30v.h:
656 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
657 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
658 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
659 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
660 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
661 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
662 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
663
cc5ca5ce
AM
6642000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
665
666 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
667 fistpd without suffix.
668
68e324a2
NC
6692000-02-24 Nick Clifton <nickc@cygnus.com>
670
671 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
672 'signed_overflow_ok_p'.
673 Delete prototypes for cgen_set_flags() and cgen_get_flags().
674
60f036a2
AH
6752000-02-24 Andrew Haley <aph@cygnus.com>
676
677 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
678 (CGEN_CPU_TABLE): flags: new field.
679 Add prototypes for new functions.
d83c6548 680
9b9b5cd4
AM
6812000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
682
683 * i386.h: Add some more UNIXWARE_COMPAT comments.
684
5b93d8bb
AM
6852000-02-23 Linas Vepstas <linas@linas.org>
686
687 * i370.h: New file.
688
4f1d9bd8
NC
6892000-02-22 Chandra Chavva <cchavva@cygnus.com>
690
691 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
692 cannot be combined in parallel with ADD/SUBppp.
693
87f398dd
AH
6942000-02-22 Andrew Haley <aph@cygnus.com>
695
696 * mips.h: (OPCODE_IS_MEMBER): Add comment.
697
367c01af
AH
6981999-12-30 Andrew Haley <aph@cygnus.com>
699
9a1e79ca
AH
700 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
701 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
702 insns.
367c01af 703
add0c677
AM
7042000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
705
706 * i386.h: Qualify intel mode far call and jmp with x_Suf.
707
3138f287
AM
7081999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
709
710 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
711 indirect jumps and calls. Add FF/3 call for intel mode.
712
ccecd07b
JL
713Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
714
715 * mn10300.h: Add new operand types. Add new instruction formats.
716
b37e19e9
JL
717Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
718
719 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
720 instruction.
721
5fce5ddf
GRK
7221999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
723
724 * mips.h (INSN_ISA5): New.
725
2bd7f1f3
GRK
7261999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
727
728 * mips.h (OPCODE_IS_MEMBER): New.
729
4df2b5c5
NC
7301999-10-29 Nick Clifton <nickc@cygnus.com>
731
732 * d30v.h (SHORT_AR): Define.
733
446a06c9
MM
7341999-10-18 Michael Meissner <meissner@cygnus.com>
735
736 * alpha.h (alpha_num_opcodes): Convert to unsigned.
737 (alpha_num_operands): Ditto.
738
eca04c6a
JL
739Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
740
741 * hppa.h (pa_opcodes): Add load and store cache control to
742 instructions. Add ordered access load and store.
743
744 * hppa.h (pa_opcode): Add new entries for addb and addib.
745
746 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
747
748 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
749
c43185de
DN
750Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
751
752 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
753
ec3533da
JL
754Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
755
390f858d
JL
756 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
757 and "be" using completer prefixes.
758
8c47ebd9
JL
759 * hppa.h (pa_opcodes): Add initializers to silence compiler.
760
ec3533da
JL
761 * hppa.h: Update comments about character usage.
762
18369bea
JL
763Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
764
765 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
766 up the new fstw & bve instructions.
767
c36efdd2
JL
768Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
769
d3ffb032
JL
770 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
771 instructions.
772
c49ec3da
JL
773 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
774
5d2e7ecc
JL
775 * hppa.h (pa_opcodes): Add long offset double word load/store
776 instructions.
777
6397d1a2
JL
778 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
779 stores.
780
142f0fe0
JL
781 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
782
f5a68b45
JL
783 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
784
8235801e
JL
785 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
786
35184366
JL
787 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
788
f0bfde5e
JL
789 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
790
27bbbb58
JL
791 * hppa.h (pa_opcodes): Add support for "b,l".
792
c36efdd2
JL
793 * hppa.h (pa_opcodes): Add support for "b,gate".
794
f2727d04
JL
795Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
796
9392fb11 797 * hppa.h (pa_opcodes): Use 'fX' for first register operand
d83c6548 798 in xmpyu.
9392fb11 799
e0c52e99
JL
800 * hppa.h (pa_opcodes): Fix mask for probe and probei.
801
f2727d04
JL
802 * hppa.h (pa_opcodes): Fix mask for depwi.
803
52d836e2
JL
804Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
805
806 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
807 an explicit output argument.
808
90765e3a
JL
809Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
810
811 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
812 Add a few PA2.0 loads and store variants.
813
8340b17f
ILT
8141999-09-04 Steve Chamberlain <sac@pobox.com>
815
816 * pj.h: New file.
817
5f47d35b
AM
8181999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
819
820 * i386.h (i386_regtab): Move %st to top of table, and split off
821 other fp reg entries.
822 (i386_float_regtab): To here.
823
1c143202
JL
824Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
825
7d8fdb64
JL
826 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
827 by 'f'.
828
90927b9c
JL
829 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
830 Add supporting args.
831
1d16bf9c
JL
832 * hppa.h: Document new completers and args.
833 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
834 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
835 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
836 pmenb and pmdis.
837
96226a68
JL
838 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
839 hshr, hsub, mixh, mixw, permh.
840
5d4ba527
JL
841 * hppa.h (pa_opcodes): Change completers in instructions to
842 use 'c' prefix.
843
e9fc28c6
JL
844 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
845 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
846
1c143202
JL
847 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
848 fnegabs to use 'I' instead of 'F'.
849
9e525108
AM
8501999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
851
852 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
853 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
854 Alphabetically sort PIII insns.
855
e8da1bf1
DE
856Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
857
858 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
859
7d627258
JL
860Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
861
5696871a
JL
862 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
863 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
864
7d627258
JL
865 * hppa.h: Document 64 bit condition completers.
866
c5e52916
JL
867Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
868
869 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
870
eecb386c
AM
8711999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
872
873 * i386.h (i386_optab): Add DefaultSize modifier to all insns
874 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
875 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
876
88a380f3
JL
877Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
878 Jeff Law <law@cygnus.com>
879
880 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
881
882 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca 883
d83c6548 884 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
d60e8dca
JL
885 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
886
145cf1f0
AM
8871999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
888
889 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
890
73826640
JL
891Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
892
893 * hppa.h (struct pa_opcode): Add new field "flags".
894 (FLAGS_STRICT): Define.
895
b65db252
JL
896Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
897 Jeff Law <law@cygnus.com>
898
f7fc668b
JL
899 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
900
901 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 902
10084519
AM
9031999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
904
905 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
906 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
907 flag to fcomi and friends.
908
cd8a80ba
JL
909Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
910
911 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
d83c6548 912 integer logical instructions.
cd8a80ba 913
1fca749b
ILT
9141999-05-28 Linus Nordberg <linus.nordberg@canit.se>
915
916 * m68k.h: Document new formats `E', `G', `H' and new places `N',
917 `n', `o'.
918
919 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
920 and new places `m', `M', `h'.
921
aa008907
JL
922Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
923
924 * hppa.h (pa_opcodes): Add several processor specific system
925 instructions.
926
e26b85f0
JL
927Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
928
d83c6548 929 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
e26b85f0
JL
930 "addb", and "addib" to be used by the disassembler.
931
c608c12e
AM
9321999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
933
934 * i386.h (ReverseModrm): Remove all occurences.
935 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
936 movmskps, pextrw, pmovmskb, maskmovq.
937 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
938 ignore the data size prefix.
939
940 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
941 Mostly stolen from Doug Ledford <dledford@redhat.com>
942
45c18104
RH
943Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
944
945 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
946
252b5132
RH
9471999-04-14 Doug Evans <devans@casey.cygnus.com>
948
949 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
950 (CGEN_ATTR_TYPE): Update.
951 (CGEN_ATTR_MASK): Number booleans starting at 0.
952 (CGEN_ATTR_VALUE): Update.
953 (CGEN_INSN_ATTR): Update.
954
955Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
956
957 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
958 instructions.
959
960Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
961
962 * hppa.h (bb, bvb): Tweak opcode/mask.
963
964
9651999-03-22 Doug Evans <devans@casey.cygnus.com>
966
967 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
968 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
969 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
970 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
971 Delete member max_insn_size.
972 (enum cgen_cpu_open_arg): New enum.
973 (cpu_open): Update prototype.
974 (cpu_open_1): Declare.
975 (cgen_set_cpu): Delete.
976
9771999-03-11 Doug Evans <devans@casey.cygnus.com>
978
979 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
980 (CGEN_OPERAND_NIL): New macro.
981 (CGEN_OPERAND): New member `type'.
982 (@arch@_cgen_operand_table): Delete decl.
983 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
984 (CGEN_OPERAND_TABLE): New struct.
985 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
986 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
987 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
988 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
989 {get,set}_{int,vma}_operand.
990 (@arch@_cgen_cpu_open): New arg `isa'.
991 (cgen_set_cpu): Ditto.
992
993Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
994
995 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
996
9971999-02-25 Doug Evans <devans@casey.cygnus.com>
998
999 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
1000 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
1001 enum cgen_hw_type.
1002 (CGEN_HW_TABLE): New struct.
1003 (hw_table): Delete declaration.
1004 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
1005 to table entry to enum.
1006 (CGEN_OPINST): Ditto.
1007 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
1008
1009Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
1010
1011 * alpha.h (AXP_OPCODE_EV6): New.
1012 (AXP_OPCODE_NOPAL): Include it.
1013
10141999-02-09 Doug Evans <devans@casey.cygnus.com>
1015
1016 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
1017 All uses updated. New members int_insn_p, max_insn_size,
1018 parse_operand,insert_operand,extract_operand,print_operand,
1019 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
1020 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
1021 extract_handlers,print_handlers.
1022 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
1023 (CGEN_ATTR_BOOL_OFFSET): New macro.
1024 (CGEN_ATTR_MASK): Subtract it to compute bit number.
1025 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
1026 (cgen_opcode_handler): Renamed from cgen_base.
1027 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
1028 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
1029 all uses updated.
1030 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
1031 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
1032 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
1033 (CGEN_OPCODE,CGEN_IBASE): New types.
1034 (CGEN_INSN): Rewrite.
1035 (CGEN_{ASM,DIS}_HASH*): Delete.
1036 (init_opcode_table,init_ibld_table): Declare.
1037 (CGEN_INSN_ATTR): New type.
1038
1039Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
d83c6548 1040
252b5132
RH
1041 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
1042 (x_FP, d_FP, dls_FP, sldx_FP): Define.
1043 Change *Suf definitions to include x and d suffixes.
1044 (movsx): Use w_Suf and b_Suf.
1045 (movzx): Likewise.
1046 (movs): Use bwld_Suf.
1047 (fld): Change ordering. Use sld_FP.
1048 (fild): Add Intel Syntax equivalent of fildq.
1049 (fst): Use sld_FP.
1050 (fist): Use sld_FP.
1051 (fstp): Use sld_FP. Add x_FP version.
1052 (fistp): LLongMem version for Intel Syntax.
1053 (fcom, fcomp): Use sld_FP.
1054 (fadd, fiadd, fsub): Use sld_FP.
1055 (fsubr): Use sld_FP.
1056 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
1057
10581999-01-27 Doug Evans <devans@casey.cygnus.com>
1059
1060 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
1061 CGEN_MODE_UINT.
1062
e135f41b 10631999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH
1064
1065 * hppa.h (bv): Fix mask.
1066
10671999-01-05 Doug Evans <devans@casey.cygnus.com>
1068
1069 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
1070 (CGEN_ATTR): Use it.
1071 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
1072 (CGEN_ATTR_TABLE): New member dfault.
1073
10741998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
1075
1076 * mips.h (MIPS16_INSN_BRANCH): New.
1077
1078Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
1079
1080 The following is part of a change made by Edith Epstein
d83c6548
AJ
1081 <eepstein@sophia.cygnus.com> as part of a project to merge in
1082 changes by HP; HP did not create ChangeLog entries.
252b5132
RH
1083
1084 * hppa.h (completer_chars): list of chars to not put a space
d83c6548 1085 after.
252b5132
RH
1086
1087Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
1088
1089 * i386.h (i386_optab): Permit w suffix on processor control and
d83c6548 1090 status word instructions.
252b5132
RH
1091
10921998-11-30 Doug Evans <devans@casey.cygnus.com>
1093
1094 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1095 (struct cgen_keyword_entry): Ditto.
1096 (struct cgen_operand): Ditto.
1097 (CGEN_IFLD): New typedef, with associated access macros.
1098 (CGEN_IFMT): New typedef, with associated access macros.
1099 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1100 (CGEN_IVALUE): New typedef.
1101 (struct cgen_insn): Delete const on syntax,attrs members.
1102 `format' now points to format data. Type of `value' is now
1103 CGEN_IVALUE.
1104 (struct cgen_opcode_table): New member ifld_table.
1105
11061998-11-18 Doug Evans <devans@casey.cygnus.com>
1107
1108 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1109 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1110 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1111 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1112 (cgen_opcode_table): Update type of dis_hash fn.
1113 (extract_operand): Update type of `insn_value' arg.
1114
1115Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1116
1117 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1118
1119Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1120
1121 * mips.h (INSN_MULT): Added.
1122
1123Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1124
1125 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1126
1127Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1128
1129 * cgen.h (CGEN_INSN_INT): New typedef.
1130 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1131 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1132 (CGEN_INSN_BYTES_PTR): New typedef.
1133 (CGEN_EXTRACT_INFO): New typedef.
1134 (cgen_insert_fn,cgen_extract_fn): Update.
1135 (cgen_opcode_table): New member `insn_endian'.
1136 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1137 (insert_operand,extract_operand): Update.
1138 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1139
1140Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1141
1142 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1143 (struct CGEN_HW_ENTRY): New member `attrs'.
1144 (CGEN_HW_ATTR): New macro.
1145 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1146 (CGEN_INSN_INVALID_P): New macro.
1147
1148Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1149
1150 * hppa.h: Add "fid".
d83c6548 1151
252b5132
RH
1152Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1153
1154 From Robert Andrew Dale <rob@nb.net>
1155 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1156 (AMD_3DNOW_OPCODE): Define.
1157
1158Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1159
1160 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1161
1162Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1163
1164 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1165
1166Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1167
1168 Move all global state data into opcode table struct, and treat
1169 opcode table as something that is "opened/closed".
1170 * cgen.h (CGEN_OPCODE_DESC): New type.
1171 (all fns): New first arg of opcode table descriptor.
1172 (cgen_set_parse_operand_fn): Add prototype.
1173 (cgen_current_machine,cgen_current_endian): Delete.
1174 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1175 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1176 dis_hash_table,dis_hash_table_entries.
1177 (opcode_open,opcode_close): Add prototypes.
1178
1179 * cgen.h (cgen_insn): New element `cdx'.
1180
1181Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1182
1183 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1184
1185Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1186
1187 * mn10300.h: Add "no_match_operands" field for instructions.
1188 (MN10300_MAX_OPERANDS): Define.
1189
1190Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1191
1192 * cgen.h (cgen_macro_insn_count): Declare.
1193
1194Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1195
1196 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1197 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1198 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1199 set_{int,vma}_operand.
1200
1201Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1202
1203 * mn10300.h: Add "machine" field for instructions.
1204 (MN103, AM30): Define machine types.
d83c6548 1205
252b5132
RH
1206Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1207
1208 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1209
12101998-06-18 Ulrich Drepper <drepper@cygnus.com>
1211
1212 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1213
1214Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1215
1216 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1217 and ud2b.
1218 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1219 those that happen to be implemented on pentiums.
1220
1221Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1222
1223 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1224 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1225 with Size16|IgnoreSize or Size32|IgnoreSize.
1226
1227Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1228
1229 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1230 (REPE): Rename to REPE_PREFIX_OPCODE.
1231 (i386_regtab_end): Remove.
1232 (i386_prefixtab, i386_prefixtab_end): Remove.
1233 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1234 of md_begin.
1235 (MAX_OPCODE_SIZE): Define.
1236 (i386_optab_end): Remove.
1237 (sl_Suf): Define.
1238 (sl_FP): Use sl_Suf.
1239
1240 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1241 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1242 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1243 data32, dword, and adword prefixes.
1244 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1245 regs.
1246
1247Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1248
1249 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1250
1251 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1252 register operands, because this is a common idiom. Flag them with
1253 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1254 fdivrp because gcc erroneously generates them. Also flag with a
1255 warning.
1256
1257 * i386.h: Add suffix modifiers to most insns, and tighter operand
1258 checks in some cases. Fix a number of UnixWare compatibility
1259 issues with float insns. Merge some floating point opcodes, using
1260 new FloatMF modifier.
1261 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1262 consistency.
1263
1264 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1265 IgnoreDataSize where appropriate.
1266
1267Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1268
1269 * i386.h: (one_byte_segment_defaults): Remove.
1270 (two_byte_segment_defaults): Remove.
1271 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1272
1273Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1274
1275 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1276 (cgen_hw_lookup_by_num): Declare.
1277
1278Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1279
1280 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1281 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1282
1283Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1284
1285 * cgen.h (cgen_asm_init_parse): Delete.
1286 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1287 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1288
1289Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1290
1291 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1292 (cgen_asm_finish_insn): Update prototype.
1293 (cgen_insn): New members num, data.
1294 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1295 dis_hash, dis_hash_table_size moved to ...
1296 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1297 All uses updated. New members asm_hash_p, dis_hash_p.
1298 (CGEN_MINSN_EXPANSION): New struct.
1299 (cgen_expand_macro_insn): Declare.
1300 (cgen_macro_insn_count): Declare.
1301 (get_insn_operands): Update prototype.
1302 (lookup_get_insn_operands): Declare.
1303
1304Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1305
1306 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1307 regKludge. Add operands types for string instructions.
1308
1309Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1310
1311 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1312 table.
1313
1314Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1315
1316 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1317 for `gettext'.
1318
1319Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1320
1321 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1322 Add IsString flag to string instructions.
1323 (IS_STRING): Don't define.
1324 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1325 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1326 (SS_PREFIX_OPCODE): Define.
1327
1328Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1329
1330 * i386.h: Revert March 24 patch; no more LinearAddress.
1331
1332Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1333
1334 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1335 instructions, and instead add FWait opcode modifier. Add short
1336 form of fldenv and fstenv.
1337 (FWAIT_OPCODE): Define.
1338
1339 * i386.h (i386_optab): Change second operand constraint of `mov
1340 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1341 allow legal instructions such as `movl %gs,%esi'
1342
1343Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1344
1345 * h8300.h: Various changes to fully bracket initializers.
1346
1347Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1348
1349 * i386.h: Set LinearAddress for lidt and lgdt.
1350
1351Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1352
1353 * cgen.h (CGEN_BOOL_ATTR): New macro.
1354
1355Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1356
1357 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1358
1359Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1360
1361 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1362 (cgen_insn): Record syntax and format entries here, rather than
1363 separately.
1364
1365Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1366
1367 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1368
1369Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1370
1371 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1372 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1373 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1374
1375Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1376
1377 * cgen.h (lookup_insn): New argument alias_p.
1378
1379Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1380
1381Fix rac to accept only a0:
1382 * d10v.h (OPERAND_ACC): Split into:
1383 (OPERAND_ACC0, OPERAND_ACC1) .
1384 (OPERAND_GPR): Define.
1385
1386Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1387
1388 * cgen.h (CGEN_FIELDS): Define here.
1389 (CGEN_HW_ENTRY): New member `type'.
1390 (hw_list): Delete decl.
1391 (enum cgen_mode): Declare.
1392 (CGEN_OPERAND): New member `hw'.
1393 (enum cgen_operand_instance_type): Declare.
1394 (CGEN_OPERAND_INSTANCE): New type.
1395 (CGEN_INSN): New member `operands'.
1396 (CGEN_OPCODE_DATA): Make hw_list const.
1397 (get_insn_operands,lookup_insn): Add prototypes for.
1398
1399Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1400
1401 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1402 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1403 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1404 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1405
1406Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1407
1408 * cgen.h: Correct typo in comment end marker.
1409
1410Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1411
1412 * tic30.h: New file.
1413
5a109b67 1414Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH
1415
1416 * cgen.h: Add prototypes for cgen_save_fixups(),
1417 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1418 of cgen_asm_finish_insn() to return a char *.
1419
1420Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1421
1422 * cgen.h: Formatting changes to improve readability.
1423
1424Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1425
1426 * cgen.h (*): Clean up pass over `struct foo' usage.
1427 (CGEN_ATTR): Make unsigned char.
1428 (CGEN_ATTR_TYPE): Update.
1429 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1430 (cgen_base): Move member `attrs' to cgen_insn.
1431 (CGEN_KEYWORD): New member `null_entry'.
1432 (CGEN_{SYNTAX,FORMAT}): New types.
1433 (cgen_insn): Format and syntax separated from each other.
1434
1435Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1436
1437 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1438 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1439 flags_{used,set} long.
1440 (d30v_operand): Make flags field long.
1441
1442Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1443
1444 * m68k.h: Fix comment describing operand types.
1445
1446Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1447
1448 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1449 everything else after down.
1450
1451Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1452
1453 * d10v.h (OPERAND_FLAG): Split into:
1454 (OPERAND_FFLAG, OPERAND_CFLAG) .
1455
1456Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1457
1458 * mips.h (struct mips_opcode): Changed comments to reflect new
1459 field usage.
1460
1461Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1462
1463 * mips.h: Added to comments a quick-ref list of all assigned
1464 operand type characters.
1465 (OP_{MASK,SH}_PERFREG): New macros.
1466
1467Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1468
1469 * sparc.h: Add '_' and '/' for v9a asr's.
1470 Patch from David Miller <davem@vger.rutgers.edu>
1471
1472Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1473
1474 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1475 area are not available in the base model (H8/300).
1476
1477Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1478
1479 * m68k.h: Remove documentation of ` operand specifier.
1480
1481Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1482
1483 * m68k.h: Document q and v operand specifiers.
1484
1485Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1486
1487 * v850.h (struct v850_opcode): Add processors field.
1488 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1489 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1490 (PROCESSOR_V850EA): New bit constants.
1491
1492Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1493
1494 Merge changes from Martin Hunt:
1495
1496 * d30v.h: Allow up to 64 control registers. Add
1497 SHORT_A5S format.
1498
1499 * d30v.h (LONG_Db): New form for delayed branches.
1500
1501 * d30v.h: (LONG_Db): New form for repeati.
1502
1503 * d30v.h (SHORT_D2B): New form.
1504
1505 * d30v.h (SHORT_A2): New form.
1506
1507 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1508 registers are used. Needed for VLIW optimization.
1509
1510Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1511
1512 * cgen.h: Move assembler interface section
1513 up so cgen_parse_operand_result is defined for cgen_parse_address.
1514 (cgen_parse_address): Update prototype.
1515
1516Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1517
1518 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1519
1520Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1521
1522 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1523 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1524 <paubert@iram.es>.
1525
1526 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1527 <paubert@iram.es>.
1528
1529 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1530 <paubert@iram.es>.
1531
1532 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1533 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1534
1535Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1536
1537 * v850.h (V850_NOT_R0): New flag.
1538
1539Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1540
1541 * v850.h (struct v850_opcode): Remove flags field.
1542
1543Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1544
1545 * v850.h (struct v850_opcode): Add flags field.
1546 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1547 fields.
1548 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1549 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1550
1551Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1552
1553 * arc.h: New file.
1554
1555Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1556
1557 * sparc.h (sparc_opcodes): Declare as const.
1558
1559Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1560
1561 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1562 uses single or double precision floating point resources.
1563 (INSN_NO_ISA, INSN_ISA1): Define.
1564 (cpu specific INSN macros): Tweak into bitmasks outside the range
1565 of INSN_ISA field.
1566
1567Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1568
1569 * i386.h: Fix pand opcode.
1570
1571Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1572
1573 * mips.h: Widen INSN_ISA and move it to a more convenient
1574 bit position. Add INSN_3900.
1575
1576Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1577
1578 * mips.h (struct mips_opcode): added new field membership.
1579
1580Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1581
1582 * i386.h (movd): only Reg32 is allowed.
1583
1584 * i386.h: add fcomp and ud2. From Wayne Scott
1585 <wscott@ichips.intel.com>.
1586
1587Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1588
1589 * i386.h: Add MMX instructions.
1590
1591Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1592
1593 * i386.h: Remove W modifier from conditional move instructions.
1594
1595Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1596
1597 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1598 with no arguments to match that generated by the UnixWare
1599 assembler.
1600
1601Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1602
1603 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1604 (cgen_parse_operand_fn): Declare.
1605 (cgen_init_parse_operand): Declare.
1606 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1607 new argument `want'.
1608 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1609 (enum cgen_parse_operand_type): New enum.
1610
1611Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1612
1613 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1614
1615Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1616
1617 * cgen.h: New file.
1618
1619Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1620
1621 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1622 fdivrp.
1623
1624Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1625
1626 * v850.h (extract): Make unsigned.
1627
1628Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1629
1630 * i386.h: Add iclr.
1631
1632Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1633
1634 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1635 take a direction bit.
1636
1637Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1638
1639 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1640
1641Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1642
1643 * sparc.h: Include <ansidecl.h>. Update function declarations to
1644 use prototypes, and to use const when appropriate.
1645
1646Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1647
1648 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1649
1650Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1651
1652 * d10v.h: Change pre_defined_registers to
1653 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1654
1655Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1656
1657 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1658 Change mips_opcodes from const array to a pointer,
1659 and change bfd_mips_num_opcodes from const int to int,
1660 so that we can increase the size of the mips opcodes table
1661 dynamically.
1662
1663Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1664
1665 * d30v.h (FLAG_X): Remove unused flag.
1666
1667Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1668
1669 * d30v.h: New file.
1670
1671Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1672
1673 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1674 (PDS_VALUE): Macro to access value field of predefined symbols.
1675 (tic80_next_predefined_symbol): Add prototype.
1676
1677Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1678
1679 * tic80.h (tic80_symbol_to_value): Change prototype to match
1680 change in function, added class parameter.
1681
1682Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1683
1684 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1685 endmask fields, which are somewhat weird in that 0 and 32 are
1686 treated exactly the same.
1687
1688Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1689
1690 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1691 rather than a constant that is 2**X. Reorder them to put bits for
1692 operands that have symbolic names in the upper bits, so they can
1693 be packed into an int where the lower bits contain the value that
1694 corresponds to that symbolic name.
1695 (predefined_symbo): Add struct.
1696 (tic80_predefined_symbols): Declare array of translations.
1697 (tic80_num_predefined_symbols): Declare size of that array.
1698 (tic80_value_to_symbol): Declare function.
1699 (tic80_symbol_to_value): Declare function.
1700
1701Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1702
1703 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1704
1705Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1706
1707 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1708 be the destination register.
1709
1710Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1711
1712 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1713 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1714 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1715 that the opcode can have two vector instructions in a single
1716 32 bit word and we have to encode/decode both.
1717
1718Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1719
1720 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1721 TIC80_OPERAND_RELATIVE for PC relative.
1722 (TIC80_OPERAND_BASEREL): New flag bit for register
1723 base relative.
1724
1725Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1726
1727 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1728
1729Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1730
1731 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1732 ":s" modifier for scaling.
1733
1734Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1735
1736 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1737 (TIC80_OPERAND_M_LI): Ditto
1738
1739Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1740
1741 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1742 (TIC80_OPERAND_CC): New define for condition code operand.
1743 (TIC80_OPERAND_CR): New define for control register operand.
1744
1745Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1746
1747 * tic80.h (struct tic80_opcode): Name changed.
1748 (struct tic80_opcode): Remove format field.
1749 (struct tic80_operand): Add insertion and extraction functions.
1750 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1751 correct ones.
1752 (FMT_*): Ditto.
1753
1754Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1755
1756 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1757 type IV instruction offsets.
1758
1759Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1760
1761 * tic80.h: New file.
1762
1763Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1764
1765 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1766
1767Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1768
1769 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1770 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1771 * v850.h: Fix comment, v850_operand not powerpc_operand.
1772
1773Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1774
1775 * mn10200.h: Flesh out structures and definitions needed by
1776 the mn10200 assembler & disassembler.
1777
1778Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1779
1780 * mips.h: Add mips16 definitions.
1781
1782Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1783
1784 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1785
1786Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1787
1788 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1789 (MN10300_OPERAND_MEMADDR): Define.
1790
1791Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1792
1793 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1794
1795Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1796
1797 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1798
1799Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1800
1801 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1802
1803Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1804
1805 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1806
1807Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1808
1809 * alpha.h: Don't include "bfd.h"; private relocation types are now
d83c6548
AJ
1810 negative to minimize problems with shared libraries. Organize
1811 instruction subsets by AMASK extensions and PALcode
1812 implementation.
252b5132
RH
1813 (struct alpha_operand): Move flags slot for better packing.
1814
1815Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1816
1817 * v850.h (V850_OPERAND_RELAX): New operand flag.
1818
1819Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1820
1821 * mn10300.h (FMT_*): Move operand format definitions
1822 here.
1823
1824Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1825
1826 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1827
1828Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1829
1830 * mn10300.h (mn10300_opcode): Add "format" field.
1831 (MN10300_OPERAND_*): Define.
1832
1833Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1834
1835 * mn10x00.h: Delete.
1836 * mn10200.h, mn10300.h: New files.
1837
1838Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1839
1840 * mn10x00.h: New file.
1841
1842Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1843
1844 * v850.h: Add new flag to indicate this instruction uses a PC
1845 displacement.
1846
1847Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1848
1849 * h8300.h (stmac): Add missing instruction.
1850
1851Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1852
1853 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1854 field.
1855
1856Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1857
1858 * v850.h (V850_OPERAND_EP): Define.
1859
1860 * v850.h (v850_opcode): Add size field.
1861
1862Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1863
1864 * v850.h (v850_operands): Add insert and extract fields, pointers
d83c6548 1865 to functions used to handle unusual operand encoding.
252b5132 1866 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
d83c6548 1867 V850_OPERAND_SIGNED): Defined.
252b5132
RH
1868
1869Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1870
1871 * v850.h (v850_operands): Add flags field.
1872 (OPERAND_REG, OPERAND_NUM): Defined.
1873
1874Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1875
1876 * v850.h: New file.
1877
1878Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1879
1880 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
d83c6548
AJ
1881 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1882 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1883 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1884 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1885 Defined.
252b5132
RH
1886
1887Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1888
1889 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1890 a 3 bit space id instead of a 2 bit space id.
1891
1892Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1893
1894 * d10v.h: Add some additional defines to support the
d83c6548 1895 assembler in determining which operations can be done in parallel.
252b5132
RH
1896
1897Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1898
1899 * h8300.h (SN): Define.
1900 (eepmov.b): Renamed from "eepmov"
1901 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1902 with them.
1903
1904Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1905
1906 * d10v.h (OPERAND_SHIFT): New operand flag.
1907
1908Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1909
1910 * d10v.h: Changes for divs, parallel-only instructions, and
d83c6548 1911 signed numbers.
252b5132
RH
1912
1913Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1914
1915 * d10v.h (pd_reg): Define. Putting the definition here allows
1916 the assembler and disassembler to share the same struct.
1917
1918Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1919
1920 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1921 Williams <steve@icarus.com>.
1922
1923Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1924
1925 * d10v.h: New file.
1926
1927Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1928
1929 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1930
1931Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1932
d83c6548 1933 * m68k.h (mcf5200): New macro.
252b5132
RH
1934 Document names of coldfire control registers.
1935
1936Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1937
1938 * h8300.h (SRC_IN_DST): Define.
1939
1940 * h8300.h (UNOP3): Mark the register operand in this insn
1941 as a source operand, not a destination operand.
1942 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1943 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1944 register operand with SRC_IN_DST.
1945
1946Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1947
1948 * alpha.h: New file.
1949
1950Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1951
1952 * rs6k.h: Remove obsolete file.
1953
1954Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1955
1956 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1957 fdivp, and fdivrp. Add ffreep.
1958
1959Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1960
1961 * h8300.h: Reorder various #defines for readability.
1962 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1963 (BITOP): Accept additional (unused) argument. All callers changed.
1964 (EBITOP): Likewise.
1965 (O_LAST): Bump.
1966 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1967
1968 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1969 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1970 (BITOP, EBITOP): Handle new H8/S addressing modes for
1971 bit insns.
1972 (UNOP3): Handle new shift/rotate insns on the H8/S.
1973 (insns using exr): New instructions.
1974 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1975
1976Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1977
1978 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1979 was incorrect.
1980
1981Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1982
1983 * h8300.h (START): Remove.
1984 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1985 and mov.l insns that can be relaxed.
1986
1987Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1988
1989 * i386.h: Remove Abs32 from lcall.
1990
1991Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1992
1993 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1994 (SLCPOP): New macro.
1995 Mark X,Y opcode letters as in use.
1996
1997Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1998
1999 * sparc.h (F_FLOAT, F_FBR): Define.
2000
2001Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
2002
2003 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
2004 from all insns.
2005 (ABS8SRC,ABS8DST): Add ABS8MEM.
2006 (add.l): Fix reg+reg variant.
2007 (eepmov.w): Renamed from eepmovw.
2008 (ldc,stc): Fix many cases.
2009
2010Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
2011
2012 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
2013
2014Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
2015
2016 * sparc.h (O): Mark operand letter as in use.
2017
2018Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
2019
2020 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
2021 Mark operand letters uU as in use.
2022
2023Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
2024
2025 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
2026 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
2027 (SPARC_OPCODE_SUPPORTED): New macro.
2028 (SPARC_OPCODE_CONFLICT_P): Rewrite.
2029 (F_NOTV9): Delete.
2030
2031Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
2032
2033 * sparc.h (sparc_opcode_lookup_arch) Make return type in
2034 declaration consistent with return type in definition.
2035
2036Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
2037
2038 * i386.h (i386_optab): Remove Data32 from pushf and popf.
2039
2040Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
2041
2042 * i386.h (i386_regtab): Add 80486 test registers.
2043
2044Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
2045
2046 * i960.h (I_HX): Define.
2047 (i960_opcodes): Add HX instruction.
2048
2049Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
2050
2051 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
2052 and fclex.
2053
2054Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
2055
2056 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
2057 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
2058 (bfd_* defines): Delete.
2059 (sparc_opcode_archs): Replaces architecture_pname.
2060 (sparc_opcode_lookup_arch): Declare.
2061 (NUMOPCODES): Delete.
2062
2063Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
2064
2065 * sparc.h (enum sparc_architecture): Add v9a.
2066 (ARCHITECTURES_CONFLICT_P): Update.
2067
2068Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
2069
2070 * i386.h: Added Pentium Pro instructions.
2071
2072Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
2073
2074 * m68k.h: Document new 'W' operand place.
2075
2076Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
2077
2078 * hppa.h: Add lci and syncdma instructions.
2079
2080Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2081
2082 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
d83c6548 2083 instructions.
252b5132
RH
2084
2085Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
2086
2087 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2088 assembler's -mcom and -many switches.
2089
2090Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
2091
2092 * i386.h: Fix cmpxchg8b extension opcode description.
2093
2094Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2095
2096 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2097 and register cr4.
2098
2099Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2100
2101 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2102
2103Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2104
2105 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2106
2107Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2108
2109 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2110
2111Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2112
2113 * m68kmri.h: Remove.
2114
2115 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2116 declarations. Remove F_ALIAS and flag field of struct
2117 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2118 int. Make name and args fields of struct m68k_opcode const.
2119
2120Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2121
2122 * sparc.h (F_NOTV9): Define.
2123
2124Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2125
2126 * mips.h (INSN_4010): Define.
2127
2128Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2129
2130 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2131
2132 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2133 * m68k.h: Fix argument descriptions of coprocessor
2134 instructions to allow only alterable operands where appropriate.
2135 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2136 (m68k_opcode_aliases): Add more aliases.
2137
2138Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2139
2140 * m68k.h: Added explcitly short-sized conditional branches, and a
2141 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2142 svr4-based configurations.
2143
2144Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2145
2146 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2147 * i386.h: added missing Data16/Data32 flags to a few instructions.
2148
2149Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2150
2151 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2152 (OP_MASK_BCC, OP_SH_BCC): Define.
2153 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2154 (OP_MASK_CCC, OP_SH_CCC): Define.
2155 (INSN_READ_FPR_R): Define.
2156 (INSN_RFE): Delete.
2157
2158Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2159
2160 * m68k.h (enum m68k_architecture): Deleted.
2161 (struct m68k_opcode_alias): New type.
2162 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2163 matching constraints, values and flags. As a side effect of this,
2164 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2165 as I know were never used, now may need re-examining.
2166 (numopcodes): Now const.
2167 (m68k_opcode_aliases, numaliases): New variables.
2168 (endop): Deleted.
2169 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2170 m68k_opcode_aliases; update declaration of m68k_opcodes.
2171
2172Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2173
2174 * hppa.h (delay_type): Delete unused enumeration.
2175 (pa_opcode): Replace unused delayed field with an architecture
2176 field.
2177 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2178
2179Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2180
2181 * mips.h (INSN_ISA4): Define.
2182
2183Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2184
2185 * mips.h (M_DLA_AB, M_DLI): Define.
2186
2187Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2188
2189 * hppa.h (fstwx): Fix single-bit error.
2190
2191Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2192
2193 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2194
2195Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2196
2197 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2198 debug registers. From Charles Hannum (mycroft@netbsd.org).
2199
2200Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2201
2202 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2203 i386 support:
2204 * i386.h (MOV_AX_DISP32): New macro.
2205 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2206 of several call/return instructions.
2207 (ADDR_PREFIX_OPCODE): New macro.
2208
2209Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2210
2211 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2212
4f1d9bd8
NC
2213 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2214 char.
252b5132
RH
2215 (struct vot, field `name'): ditto.
2216
2217Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2218
2219 * vax.h: Supply and properly group all values in end sentinel.
2220
2221Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2222
2223 * mips.h (INSN_ISA, INSN_4650): Define.
2224
2225Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2226
2227 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2228 systems with a separate instruction and data cache, such as the
2229 29040, these instructions take an optional argument.
2230
2231Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2232
2233 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2234 INSN_TRAP.
2235
2236Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2237
2238 * mips.h (INSN_STORE_MEMORY): Define.
2239
2240Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2241
2242 * sparc.h: Document new operand type 'x'.
2243
2244Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2245
2246 * i960.h (I_CX2): New instruction category. It includes
2247 instructions available on Cx and Jx processors.
2248 (I_JX): New instruction category, for JX-only instructions.
2249 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2250 Jx-only instructions, in I_JX category.
2251
2252Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2253
2254 * ns32k.h (endop): Made pointer const too.
2255
2256Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2257
2258 * ns32k.h: Drop Q operand type as there is no correct use
2259 for it. Add I and Z operand types which allow better checking.
2260
2261Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2262
2263 * h8300.h (xor.l) :fix bit pattern.
2264 (L_2): New size of operand.
2265 (trapa): Use it.
2266
2267Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2268
2269 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2270
2271Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2272
2273 * sparc.h: Include v9 definitions.
2274
2275Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2276
2277 * m68k.h (m68060): Defined.
2278 (m68040up, mfloat, mmmu): Include it.
2279 (struct m68k_opcode): Widen `arch' field.
2280 (m68k_opcodes): Updated for M68060. Removed comments that were
2281 instructions commented out by "JF" years ago.
2282
2283Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2284
2285 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2286 add a one-bit `flags' field.
2287 (F_ALIAS): New macro.
2288
2289Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2290
2291 * h8300.h (dec, inc): Get encoding right.
2292
2293Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2294
2295 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2296 a flag instead.
2297 (PPC_OPERAND_SIGNED): Define.
2298 (PPC_OPERAND_SIGNOPT): Define.
2299
2300Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2301
2302 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2303 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2304
2305Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2306
2307 * i386.h: Reverse last change. It'll be handled in gas instead.
2308
2309Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2310
2311 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2312 slower on the 486 and used the implicit shift count despite the
2313 explicit operand. The one-operand form is still available to get
2314 the shorter form with the implicit shift count.
2315
2316Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2317
2318 * hppa.h: Fix typo in fstws arg string.
2319
2320Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2321
2322 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2323
2324Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2325
2326 * ppc.h (PPC_OPCODE_601): Define.
2327
2328Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2329
2330 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2331 (so we can determine valid completers for both addb and addb[tf].)
2332
2333 * hppa.h (xmpyu): No floating point format specifier for the
2334 xmpyu instruction.
2335
2336Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2337
2338 * ppc.h (PPC_OPERAND_NEXT): Define.
2339 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2340 (struct powerpc_macro): Define.
2341 (powerpc_macros, powerpc_num_macros): Declare.
2342
2343Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2344
2345 * ppc.h: New file. Header file for PowerPC opcode table.
2346
2347Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2348
2349 * hppa.h: More minor template fixes for sfu and copr (to allow
2350 for easier disassembly).
2351
2352 * hppa.h: Fix templates for all the sfu and copr instructions.
2353
2354Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2355
2356 * i386.h (push): Permit Imm16 operand too.
2357
2358Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2359
2360 * h8300.h (andc): Exists in base arch.
2361
2362Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2363
2364 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2365 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2366
2367Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2368
2369 * hppa.h: Add FP quadword store instructions.
2370
2371Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2372
2373 * mips.h: (M_J_A): Added.
2374 (M_LA): Removed.
2375
2376Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2377
2378 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2379 <mellon@pepper.ncd.com>.
2380
2381Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2382
2383 * hppa.h: Immediate field in probei instructions is unsigned,
2384 not low-sign extended.
2385
2386Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2387
2388 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2389
2390Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2391
2392 * i386.h: Add "fxch" without operand.
2393
2394Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2395
2396 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2397
2398Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2399
2400 * hppa.h: Add gfw and gfr to the opcode table.
2401
2402Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2403
2404 * m88k.h: extended to handle m88110.
2405
2406Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2407
2408 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2409 addresses.
2410
2411Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2412
2413 * i960.h (i960_opcodes): Properly bracket initializers.
2414
2415Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2416
2417 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2418
2419Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2420
2421 * m68k.h (two): Protect second argument with parentheses.
2422
2423Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2424
2425 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2426 Deleted old in/out instructions in "#if 0" section.
2427
2428Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2429
2430 * i386.h (i386_optab): Properly bracket initializers.
2431
2432Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2433
2434 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2435 Jeff Law, law@cs.utah.edu).
2436
2437Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2438
2439 * i386.h (lcall): Accept Imm32 operand also.
2440
2441Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2442
2443 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2444 (M_DABS): Added.
2445
2446Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2447
2448 * mips.h (INSN_*): Changed values. Removed unused definitions.
2449 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2450 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2451 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2452 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2453 (M_*): Added new values for r6000 and r4000 macros.
2454 (ANY_DELAY): Removed.
2455
2456Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2457
2458 * mips.h: Added M_LI_S and M_LI_SS.
2459
2460Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2461
2462 * h8300.h: Get some rare mov.bs correct.
2463
2464Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2465
2466 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2467 been included.
2468
2469Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2470
2471 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2472 jump instructions, for use in disassemblers.
2473
2474Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2475
2476 * m88k.h: Make bitfields just unsigned, not unsigned long or
2477 unsigned short.
2478
2479Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2480
2481 * hppa.h: New argument type 'y'. Use in various float instructions.
2482
2483Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2484
2485 * hppa.h (break): First immediate field is unsigned.
2486
2487 * hppa.h: Add rfir instruction.
2488
2489Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2490
2491 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2492
2493Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2494
2495 * mips.h: Reworked the hazard information somewhat, and fixed some
2496 bugs in the instruction hazard descriptions.
2497
2498Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2499
2500 * m88k.h: Corrected a couple of opcodes.
2501
2502Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2503
2504 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2505 new version includes instruction hazard information, but is
2506 otherwise reasonably similar.
2507
2508Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2509
2510 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2511
2512Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2513
2514 Patches from Jeff Law, law@cs.utah.edu:
2515 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2516 Make the tables be the same for the following instructions:
2517 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2518 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2519 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2520 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2521 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2522 "fcmp", and "ftest".
2523
2524 * hppa.h: Make new and old tables the same for "break", "mtctl",
2525 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2526 Fix typo in last patch. Collapse several #ifdefs into a
2527 single #ifdef.
2528
2529 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2530 of the comments up-to-date.
2531
2532 * hppa.h: Update "free list" of letters and update
2533 comments describing each letter's function.
2534
4f1d9bd8
NC
2535Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2536
2537 * h8300.h: Lots of little fixes for the h8/300h.
2538
2539Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2540
2541 Support for H8/300-H
2542 * h8300.h: Lots of new opcodes.
2543
252b5132
RH
2544Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2545
2546 * h8300.h: checkpoint, includes H8/300-H opcodes.
2547
2548Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2549
2550 * Patches from Jeffrey Law <law@cs.utah.edu>.
2551 * hppa.h: Rework single precision FP
2552 instructions so that they correctly disassemble code
2553 PA1.1 code.
2554
2555Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2556
2557 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2558 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2559
2560Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2561
2562 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2563 gdb will define it for now.
2564
2565Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2566
2567 * sparc.h: Don't end enumerator list with comma.
2568
2569Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2570
2571 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2572 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2573 ("bc2t"): Correct typo.
2574 ("[ls]wc[023]"): Use T rather than t.
2575 ("c[0123]"): Define general coprocessor instructions.
2576
2577Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2578
2579 * m68k.h: Move split point for gcc compilation more towards
2580 middle.
2581
2582Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2583
2584 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2585 simply wrong, ics, rfi, & rfsvc were missing).
2586 Add "a" to opr_ext for "bb". Doc fix.
2587
2588Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2589
2590 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2591 * mips.h: Add casts, to suppress warnings about shifting too much.
2592 * m68k.h: Document the placement code '9'.
2593
2594Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2595
2596 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2597 allows callers to break up the large initialized struct full of
2598 opcodes into two half-sized ones. This permits GCC to compile
2599 this module, since it takes exponential space for initializers.
2600 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2601
2602Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2603
2604 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2605 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2606 initialized structs in it.
2607
2608Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2609
2610 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2611 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2612 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2613
2614Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2615
2616 * mips.h: document "i" and "j" operands correctly.
2617
2618Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2619
2620 * mips.h: Removed endianness dependency.
2621
2622Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2623
2624 * h8300.h: include info on number of cycles per instruction.
2625
2626Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2627
2628 * hppa.h: Move handy aliases to the front. Fix masks for extract
2629 and deposit instructions.
2630
2631Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2632
2633 * i386.h: accept shld and shrd both with and without the shift
2634 count argument, which is always %cl.
2635
2636Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2637
2638 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2639 (one_byte_segment_defaults, two_byte_segment_defaults,
2640 i386_prefixtab_end): Ditto.
2641
2642Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2643
2644 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2645 for operand 2; from John Carr, jfc@dsg.dec.com.
2646
2647Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2648
2649 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2650 always use 16-bit offsets. Makes calculated-size jump tables
2651 feasible.
2652
2653Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2654
2655 * i386.h: Fix one-operand forms of in* and out* patterns.
2656
2657Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2658
2659 * m68k.h: Added CPU32 support.
2660
2661Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2662
2663 * mips.h (break): Disassemble the argument. Patch from
2664 jonathan@cs.stanford.edu (Jonathan Stone).
2665
2666Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2667
2668 * m68k.h: merged Motorola and MIT syntax.
2669
2670Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2671
2672 * m68k.h (pmove): make the tests less strict, the 68k book is
2673 wrong.
2674
2675Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2676
2677 * m68k.h (m68ec030): Defined as alias for 68030.
2678 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2679 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2680 them. Tightened description of "fmovex" to distinguish it from
2681 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2682 up descriptions that claimed versions were available for chips not
2683 supporting them. Added "pmovefd".
2684
2685Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2686
2687 * m68k.h: fix where the . goes in divull
2688
2689Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2690
2691 * m68k.h: the cas2 instruction is supposed to be written with
2692 indirection on the last two operands, which can be either data or
2693 address registers. Added a new operand type 'r' which accepts
2694 either register type. Added new cases for cas2l and cas2w which
2695 use them. Corrected masks for cas2 which failed to recognize use
2696 of address register.
2697
2698Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2699
2700 * m68k.h: Merged in patches (mostly m68040-specific) from
2701 Colin Smith <colin@wrs.com>.
2702
2703 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2704 base). Also cleaned up duplicates, re-ordered instructions for
2705 the sake of dis-assembling (so aliases come after standard names).
2706 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2707
2708Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2709
2710 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2711 all missing .s
2712
2713Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2714
2715 * sparc.h: Moved tables to BFD library.
2716
2717 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2718
2719Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2720
2721 * h8300.h: Finish filling in all the holes in the opcode table,
2722 so that the Lucid C compiler can digest this as well...
2723
2724Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2725
2726 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2727 Fix opcodes on various sizes of fild/fist instructions
2728 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2729 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2730
2731Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2732
2733 * h8300.h: Fill in all the holes in the opcode table so that the
2734 losing HPUX C compiler can digest this...
2735
2736Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2737
2738 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2739 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2740
2741Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2742
2743 * sparc.h: Add new architecture variant sparclite; add its scan
2744 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2745
2746Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2747
2748 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2749 fy@lucid.com).
2750
2751Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2752
2753 * rs6k.h: New version from IBM (Metin).
2754
2755Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2756
2757 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2758 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2759
2760Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2761
2762 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2763
2764Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2765
2766 * m68k.h (one, two): Cast macro args to unsigned to suppress
2767 complaints from compiler and lint about integer overflow during
2768 shift.
2769
2770Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2771
2772 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2773
2774Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2775
2776 * mips.h: Make bitfield layout depend on the HOST compiler,
2777 not on the TARGET system.
2778
2779Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2780
2781 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2782 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2783 <TRANLE@INTELLICORP.COM>.
2784
2785Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2786
2787 * h8300.h: turned op_type enum into #define list
2788
2789Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2790
2791 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2792 similar instructions -- they've been renamed to "fitoq", etc.
2793 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2794 number of arguments.
2795 * h8300.h: Remove extra ; which produces compiler warning.
2796
2797Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2798
2799 * sparc.h: fix opcode for tsubcctv.
2800
2801Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2802
2803 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2804
2805Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2806
2807 * sparc.h (nop): Made the 'lose' field be even tighter,
2808 so only a standard 'nop' is disassembled as a nop.
2809
2810Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2811
2812 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2813 disassembled as a nop.
2814
4f1d9bd8
NC
2815Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2816
2817 * m68k.h, sparc.h: ANSIfy enums.
2818
252b5132
RH
2819Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2820
2821 * sparc.h: fix a typo.
2822
2823Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2824
2825 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2826 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 2827 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH
2828
2829\f
2830Local Variables:
2831version-control: never
2832End:
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