2002-11-11 Klee Dienes <kdienes@apple.com>
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
a3e64b75
KD
12002-11-18 Klee Dienes <kdienes@apple.com>
2
3 * h8300.h (h8_opcode): Remove 'length' field.
4 (h8_opcodes): Mark as 'const' (both the declaration and
5 definition). Modify initializer and initializer macros to no
6 longer initialize the length field.
7
84037f8c
KD
82002-11-18 Klee Dienes <kdienes@apple.com>
9
10 * arc.h (arc_ext_opcodes): Declare as extern.
11 (arc_ext_operands): Declare as extern.
12 * i860.h (i860_opcodes): Declare as const.
13
eb128449
SS
142002-11-18 Svein E. Seldal <Svein.Seldal@solidas.com>
15
16 * tic4x.h: File reordering. Added enhanced opcodes.
17
182002-11-16 Svein E. Seldal <Svein.Seldal@solidas.com>
19
20 * tic4x.h: Major rewrite of entire file. Define instruction
21 classes, and put each instruction into a class.
22
232002-11-11 Svein E. Seldal <Svein.Seldal@solidas.com>
24
25 * tic4x.h: Added new opcodes and corrected some bugs. Add support
26 for new DSP types.
27
ea6a213a
AM
282002-10-14 Alan Modra <amodra@bigpond.net.au>
29
30 * cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.
31
701b80cd 322002-09-30 Gavin Romig-Koch <gavin@redhat.com>
9752cf1b
RS
33 Ken Raeburn <raeburn@cygnus.com>
34 Aldy Hernandez <aldyh@redhat.com>
35 Eric Christopher <echristo@redhat.com>
36 Richard Sandiford <rsandifo@redhat.com>
37
38 * mips.h: Update comment for new opcodes.
39 (OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
40 (OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
41 (INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
42 (CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
43 (OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
44 Don't match CPU_R4111 with INSN_4100.
45
0449635d
EZ
462002-08-19 Elena Zannoni <ezannoni@redhat.com>
47
48 From matthew green <mrg@redhat.com>
49
50 * ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
51 instructions.
52 (PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
53 PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
54 e500x2 Integer select, branch locking, performance monitor,
55 cache locking and machine check APUs, respectively.
56 (PPC_OPCODE_EFS): New opcode type for efs* instructions.
57 (PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
58
030ad53b
SC
592002-08-13 Stephane Carrez <stcarrez@nerim.fr>
60
61 * m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
62 (M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
63 M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
64 memory banks.
65 (M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
66
aec421e0
TS
672002-07-09 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
68
69 * mips.h (INSN_MIPS16): New define.
70
cd61ebfe
AM
712002-07-08 Alan Modra <amodra@bigpond.net.au>
72
73 * i386.h: Remove IgnoreSize from movsx and movzx.
74
92007e40
AM
752002-06-08 Alan Modra <amodra@bigpond.net.au>
76
77 * a29k.h: Replace CONST with const.
78 (CONST): Don't define.
79 * convex.h: Replace CONST with const.
80 (CONST): Don't define.
81 * dlx.h: Replace CONST with const.
82 * or32.h (CONST): Don't define.
83
deec1734
CD
842002-05-30 Chris G. Demetriou <cgd@broadcom.com>
85
86 * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
87 (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
88 (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
89 (INSN_MDMX): New constants, for MDMX support.
90 (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
91
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922002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
93
94 * dlx.h: New file.
95
b3f7d5fd
AM
962002-05-25 Alan Modra <amodra@bigpond.net.au>
97
98 * ia64.h: Use #include "" instead of <> for local header files.
99 * sparc.h: Likewise.
100
771c7ce4
TS
1012002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
102
103 * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
104
b9c9142c
AV
1052002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
106
107 * h8300.h: Corrected defs of all control regs
108 and eepmov instr.
109
cd47f4f1
AM
1102002-04-11 Alan Modra <amodra@bigpond.net.au>
111
112 * i386.h: Add intel mode cmpsd and movsd.
b9612d14 113 Put them before SSE2 insns, so that rep prefix works.
cd47f4f1 114
1f25f5d3
CD
1152002-03-15 Chris G. Demetriou <cgd@broadcom.com>
116
117 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
118 instructions.
119 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
120 may be passed along with the ISA bitmask.
121
e4b29ec6
AM
1222002-03-05 Paul Koning <pkoning@equallogic.com>
123
124 * pdp11.h: Add format codes for float instruction formats.
125
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AM
1262002-02-25 Alan Modra <amodra@bigpond.net.au>
127
128 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
129
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JH
130Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
131
132 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
133
85a33fe2
JH
134Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
135
136 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
137 (xchg): Fix.
138 (in, out): Disable 64bit operands.
139 (call, jmp): Avoid REX prefixes.
140 (jcxz): Prohibit in 64bit mode
141 (jrcxz, loop): Add 64bit variants.
142 (movq): Fix patterns.
143 (movmskps, pextrw, pinstrw): Add 64bit variants.
144
3b16e843
NC
1452002-01-31 Ivan Guzvinec <ivang@opencores.org>
146
147 * or32.h: New file.
148
9a2e995d
GH
1492002-01-22 Graydon Hoare <graydon@redhat.com>
150
151 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
152 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
153
7b45c6e1
AM
1542002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
155
156 * h8300.h: Comment typo fix.
157
a09cf9bd
MG
1582002-01-03 matthew green <mrg@redhat.com>
159
160 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
161 (PPC_OPCODE_BOOKE64): Likewise.
162
1befefea
JL
163Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
164
165 * hppa.h (call, ret): Move to end of table.
166 (addb, addib): PA2.0 variants should have been PA2.0W.
167 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
168 happy.
169 (fldw, fldd, fstw, fstd, bb): Likewise.
170 (short loads/stores): Tweak format specifier slightly to keep
171 disassembler happy.
172 (indexed loads/stores): Likewise.
173 (absolute loads/stores): Likewise.
174
124ddbb2
AO
1752001-12-04 Alexandre Oliva <aoliva@redhat.com>
176
177 * d10v.h (OPERAND_NOSP): New macro.
178
9b21d49b
AO
1792001-11-29 Alexandre Oliva <aoliva@redhat.com>
180
181 * d10v.h (OPERAND_SP): New macro.
182
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AM
1832001-11-15 Alan Modra <amodra@bigpond.net.au>
184
185 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
186
6e917903
TW
1872001-11-11 Timothy Wall <twall@alum.mit.edu>
188
189 * tic54x.h: Revise opcode layout; don't really need a separate
190 structure for parallel opcodes.
191
e5470cdc
AM
1922001-11-13 Zack Weinberg <zack@codesourcery.com>
193 Alan Modra <amodra@bigpond.net.au>
194
195 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
196 accept WordReg.
197
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CD
1982001-11-04 Chris Demetriou <cgd@broadcom.com>
199
200 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
201
3c3bdf30
NC
2022001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
203
204 * mmix.h: New file.
205
e4432525
CD
2062001-10-18 Chris Demetriou <cgd@broadcom.com>
207
208 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
209 of the expression, to make source code merging easier.
210
8ff529d8
CD
2112001-10-17 Chris Demetriou <cgd@broadcom.com>
212
213 * mips.h: Sort coprocessor instruction argument characters
214 in comment, add a few more words of description for "H".
215
2228315b
CD
2162001-10-17 Chris Demetriou <cgd@broadcom.com>
217
218 * mips.h (INSN_SB1): New cpu-specific instruction bit.
219 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
220 if cpu is CPU_SB1.
221
f5c120c5
MG
2222001-10-17 matthew green <mrg@redhat.com>
223
224 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
225
418c1742
MG
2262001-10-12 matthew green <mrg@redhat.com>
227
0716ce0d
MG
228 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
229 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
230 instructions, respectively.
418c1742 231
6ff2f2ba
NC
2322001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
233
234 * v850.h: Remove spurious comment.
235
015cf428
NC
2362001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
237
238 * h8300.h: Fix compile time warning messages
239
847b8b31
RH
2402001-09-04 Richard Henderson <rth@redhat.com>
241
242 * alpha.h (struct alpha_operand): Pack elements into bitfields.
243
a98b9439
EC
2442001-08-31 Eric Christopher <echristo@redhat.com>
245
246 * mips.h: Remove CPU_MIPS32_4K.
247
a6959011
AM
2482001-08-27 Torbjorn Granlund <tege@swox.com>
249
250 * ppc.h (PPC_OPERAND_DS): Define.
251
d83c6548
AJ
2522001-08-25 Andreas Jaeger <aj@suse.de>
253
254 * d30v.h: Fix declaration of reg_name_cnt.
255
256 * d10v.h: Fix declaration of d10v_reg_name_cnt.
257
258 * arc.h: Add prototypes from opcodes/arc-opc.c.
259
99c14723
TS
2602001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
261
262 * mips.h (INSN_10000): Define.
263 (OPCODE_IS_MEMBER): Check for INSN_10000.
264
11b37b7b
AM
2652001-08-10 Alan Modra <amodra@one.net.au>
266
267 * ppc.h: Revert 2001-08-08.
268
3b16e843
NC
2692001-08-10 Richard Sandiford <rsandifo@redhat.com>
270
271 * mips.h (INSN_GP32): Remove.
272 (OPCODE_IS_MEMBER): Remove gp32 parameter.
273 (M_MOVE): New macro identifier.
274
0f1bac05
AM
2752001-08-08 Alan Modra <amodra@one.net.au>
276
277 1999-10-25 Torbjorn Granlund <tege@swox.com>
278 * ppc.h (struct powerpc_operand): New field `reloc'.
279
3b16e843
NC
2802001-08-01 Aldy Hernandez <aldyh@redhat.com>
281
282 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
283
2842001-07-12 Jeff Johnston <jjohnstn@redhat.com>
285
286 * cgen.h (CGEN_INSN): Add regex support.
287 (build_insn_regex): Declare.
288
81f6038f
FCE
2892001-07-11 Frank Ch. Eigler <fche@redhat.com>
290
291 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
292 (cgen_cpu_desc): Ditto.
293
32cfffe3
BE
2942001-07-07 Ben Elliston <bje@redhat.com>
295
296 * m88k.h: Clean up and reformat. Remove unused code.
297
3e890047
GK
2982001-06-14 Geoffrey Keating <geoffk@redhat.com>
299
300 * cgen.h (cgen_keyword): Add nonalpha_chars field.
301
d1cf510e
NC
3022001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
303
304 * mips.h (CPU_R12000): Define.
305
e281c457
JH
3062001-05-23 John Healy <jhealy@redhat.com>
307
308 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
d83c6548 309
aa5f19f2
NC
3102001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
311
312 * mips.h (INSN_ISA_MASK): Define.
313
67d6227d
AM
3142001-05-12 Alan Modra <amodra@one.net.au>
315
316 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
317 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
318 and use InvMem as these insns must have register operands.
319
992aaec9
AM
3202001-05-04 Alan Modra <amodra@one.net.au>
321
322 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
323 and pextrw to swap reg/rm assignments.
324
4ef7f0bf
HPN
3252001-04-05 Hans-Peter Nilsson <hp@axis.com>
326
327 * cris.h (enum cris_insn_version_usage): Correct comment for
328 cris_ver_v3p.
329
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AM
3302001-03-24 Alan Modra <alan@linuxcare.com.au>
331
332 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
333 Add InvMem to first operand of "maskmovdqu".
334
7ccb5238
HPN
3352001-03-22 Hans-Peter Nilsson <hp@axis.com>
336
337 * cris.h (ADD_PC_INCR_OPCODE): New macro.
338
361bfa20
KH
3392001-03-21 Kazu Hirata <kazu@hxi.com>
340
341 * h8300.h: Fix formatting.
342
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AM
3432001-03-22 Alan Modra <alan@linuxcare.com.au>
344
345 * i386.h (i386_optab): Add paddq, psubq.
346
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AM
3472001-03-19 Alan Modra <alan@linuxcare.com.au>
348
349 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
350
80a523c2
NC
3512001-02-28 Igor Shevlyakov <igor@windriver.com>
352
353 * m68k.h: new defines for Coldfire V4. Update mcf to know
354 about mcf5407.
355
e135f41b
NC
3562001-02-18 lars brinkhoff <lars@nocrew.org>
357
358 * pdp11.h: New file.
359
3602001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH
361
362 * i386.h (i386_optab): SSE integer converison instructions have
363 64bit versions on x86-64.
364
8eaec934
NC
3652001-02-10 Nick Clifton <nickc@redhat.com>
366
367 * mips.h: Remove extraneous whitespace. Formating change to allow
368 for future contribution.
369
a85d7ed0
NC
3702001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
371
372 * s390.h: New file.
373
0715dc88
PM
3742001-02-02 Patrick Macdonald <patrickm@redhat.com>
375
376 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
377 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
378 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
379
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AM
3802001-01-24 Karsten Keil <kkeil@suse.de>
381
382 * i386.h (i386_optab): Fix swapgs
383
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AM
3842001-01-14 Alan Modra <alan@linuxcare.com.au>
385
386 * hppa.h: Describe new '<' and '>' operand types, and tidy
387 existing comments.
388 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
389 Remove duplicate "ldw j(s,b),x". Sort some entries.
390
e135f41b 3912001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH
392
393 * i386.h (i386_optab): Fix pusha and ret templates.
394
0d2bcfaf
NC
3952001-01-11 Peter Targett <peter.targett@arccores.com>
396
397 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
398 definitions for masking cpu type.
399 (arc_ext_operand_value) New structure for storing extended
400 operands.
401 (ARC_OPERAND_*) Flags for operand values.
402
4032001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH
404
405 * i386.h (pinsrw): Add.
406 (pshufw): Remove.
407 (cvttpd2dq): Fix operands.
408 (cvttps2dq): Likewise.
409 (movq2q): Rename to movdq2q.
410
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AM
4112001-01-10 Richard Schaal <richard.schaal@intel.com>
412
413 * i386.h: Correct movnti instruction.
414
8c1f9e76
JJ
4152001-01-09 Jeff Johnston <jjohnstn@redhat.com>
416
417 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
418 of operands (unsigned char or unsigned short).
419 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
420 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
421
0d2bcfaf 4222001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH
423
424 * i386.h (i386_optab): Make [sml]fence template to use immext field.
425
0d2bcfaf 4262001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH
427
428 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
429 introduced by Pentium4
430
0d2bcfaf 4312000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH
432
433 * i386.h (i386_optab): Add "rex*" instructions;
434 add swapgs; disable jmp/call far direct instructions for
435 64bit mode; add syscall and sysret; disable registers for 0xc6
436 template. Add 'q' suffixes to extendable instructions, disable
079966a8 437 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH
438 (i386_regtab): Add extended registers.
439 (*Suf): Add No_qSuf.
440 (q_Suf, wlq_Suf, bwlq_Suf): New.
441
0d2bcfaf 4422000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH
443
444 * i386.h (i386_optab): Replace "Imm" with "EncImm".
445 (i386_regtab): Add flags field.
d83c6548 446
bf40d919
NC
4472000-12-12 Nick Clifton <nickc@redhat.com>
448
449 * mips.h: Fix formatting.
450
4372b673
NC
4512000-12-01 Chris Demetriou <cgd@sibyte.com>
452
453 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
454 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
455 OP_*_SYSCALL definitions.
456 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
457 19 bit wait codes.
458 (MIPS operand specifier comments): Remove 'm', add 'U' and
459 'J', and update the meaning of 'B' so that it's more general.
460
e7af610e
NC
461 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
462 INSN_ISA5): Renumber, redefine to mean the ISA at which the
463 instruction was added.
464 (INSN_ISA32): New constant.
465 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
466 Renumber to avoid new and/or renumbered INSN_* constants.
467 (INSN_MIPS32): Delete.
468 (ISA_UNKNOWN): New constant to indicate unknown ISA.
469 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
470 ISA_MIPS32): New constants, defined to be the mask of INSN_*
d83c6548 471 constants available at that ISA level.
e7af610e
NC
472 (CPU_UNKNOWN): New constant to indicate unknown CPU.
473 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
474 define it with a unique value.
475 (OPCODE_IS_MEMBER): Update for new ISA membership-related
476 constant meanings.
477
84ea6cf2 478 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
d83c6548 479 definitions.
84ea6cf2 480
c6c98b38
NC
481 * mips.h (CPU_SB1): New constant.
482
19f7b010
JJ
4832000-10-20 Jakub Jelinek <jakub@redhat.com>
484
485 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
486 Note that '3' is used for siam operand.
487
139368c9
JW
4882000-09-22 Jim Wilson <wilson@cygnus.com>
489
490 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
491
156c2f8b 4922000-09-13 Anders Norlander <anorland@acc.umu.se>
d83c6548 493
156c2f8b
NC
494 * mips.h: Use defines instead of hard-coded processor numbers.
495 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
d83c6548 496 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
156c2f8b
NC
497 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
498 CPU_4KC, CPU_4KM, CPU_4KP): Define..
499 (OPCODE_IS_MEMBER): Use new defines.
d83c6548 500 (OP_MASK_SEL, OP_SH_SEL): Define.
156c2f8b 501 (OP_MASK_CODE20, OP_SH_CODE20): Define.
d83c6548
AJ
502 Add 'P' to used characters.
503 Use 'H' for coprocessor select field.
156c2f8b 504 Use 'm' for 20 bit breakpoint code.
d83c6548
AJ
505 Document new arg characters and add to used characters.
506 (INSN_MIPS32): New define for MIPS32 extensions.
507 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
156c2f8b 508
3c5ce02e
AM
5092000-09-05 Alan Modra <alan@linuxcare.com.au>
510
511 * hppa.h: Mention cz completer.
512
50b81f19
JW
5132000-08-16 Jim Wilson <wilson@cygnus.com>
514
515 * ia64.h (IA64_OPCODE_POSTINC): New.
516
fc29466d
L
5172000-08-15 H.J. Lu <hjl@gnu.org>
518
519 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
520 IgnoreSize change.
521
4f1d9bd8
NC
5222000-08-08 Jason Eckhardt <jle@cygnus.com>
523
524 * i860.h: Small formatting adjustments.
525
45ee1401
DC
5262000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
527
528 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
529 Move related opcodes closer to each other.
530 Minor changes in comments, list undefined opcodes.
531
9d551405
DB
5322000-07-26 Dave Brolley <brolley@redhat.com>
533
534 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
535
4f1d9bd8
NC
5362000-07-22 Jason Eckhardt <jle@cygnus.com>
537
538 * i860.h (btne, bte, bla): Changed these opcodes
539 to use sbroff ('r') instead of split16 ('s').
540 (J, K, L, M): New operand types for 16-bit aligned fields.
541 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
542 use I, J, K, L, M instead of just I.
543 (T, U): New operand types for split 16-bit aligned fields.
544 (st.x): Changed these opcodes to use S, T, U instead of just S.
545 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
546 exist on the i860.
547 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
548 (pfeq.ss, pfeq.dd): New opcodes.
549 (st.s): Fixed incorrect mask bits.
550 (fmlow): Fixed incorrect mask bits.
551 (fzchkl, pfzchkl): Fixed incorrect mask bits.
552 (faddz, pfaddz): Fixed incorrect mask bits.
553 (form, pform): Fixed incorrect mask bits.
554 (pfld.l): Fixed incorrect mask bits.
555 (fst.q): Fixed incorrect mask bits.
556 (all floating point opcodes): Fixed incorrect mask bits for
557 handling of dual bit.
558
c8488617
HPN
5592000-07-20 Hans-Peter Nilsson <hp@axis.com>
560
561 cris.h: New file.
562
65aa24b6
NC
5632000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
564
565 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
566 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
567 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
568 (AVR_ISA_M83): Define for ATmega83, ATmega85.
569 (espm): Remove, because ESPM removed in databook update.
570 (eicall, eijmp): Move to the end of opcode table.
571
60bcf0fa
NC
5722000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
573
574 * m68hc11.h: New file for support of Motorola 68hc11.
575
60a2978a
DC
576Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
577
578 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
579
68ab2dd9
DC
580Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
581
582 * avr.h: New file with AVR opcodes.
583
f0662e27
DL
584Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
585
586 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
587
b722f2be
AM
5882000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
589
590 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
591
f9e0cf0b
AM
5922000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
593
594 * i386.h: Use sl_FP, not sl_Suf for fild.
595
f660ee8b
FCE
5962000-05-16 Frank Ch. Eigler <fche@redhat.com>
597
598 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
599 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
600 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
601 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
602
558b0a60
AM
6032000-05-13 Alan Modra <alan@linuxcare.com.au>,
604
605 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
606
e413e4e9
AM
6072000-05-13 Alan Modra <alan@linuxcare.com.au>,
608 Alexander Sokolov <robocop@netlink.ru>
609
610 * i386.h (i386_optab): Add cpu_flags for all instructions.
611
6122000-05-13 Alan Modra <alan@linuxcare.com.au>
613
614 From Gavin Romig-Koch <gavin@cygnus.com>
615 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
616
5c84d377
TW
6172000-05-04 Timothy Wall <twall@cygnus.com>
618
619 * tic54x.h: New.
620
966f959b
C
6212000-05-03 J.T. Conklin <jtc@redback.com>
622
623 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
624 (PPC_OPERAND_VR): New operand flag for vector registers.
625
c5d05dbb
JL
6262000-05-01 Kazu Hirata <kazu@hxi.com>
627
628 * h8300.h (EOP): Add missing initializer.
629
a7fba0e0
JL
630Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
631
632 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
633 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
634 New operand types l,y,&,fe,fE,fx added to support above forms.
635 (pa_opcodes): Replaced usage of 'x' as source/target for
636 floating point double-word loads/stores with 'fx'.
637
800eeca4
JW
638Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
639 David Mosberger <davidm@hpl.hp.com>
640 Timothy Wall <twall@cygnus.com>
641 Jim Wilson <wilson@cygnus.com>
642
643 * ia64.h: New file.
644
ba23e138
NC
6452000-03-27 Nick Clifton <nickc@cygnus.com>
646
647 * d30v.h (SHORT_A1): Fix value.
648 (SHORT_AR): Renumber so that it is at the end of the list of short
649 instructions, not the end of the list of long instructions.
650
d0b47220
AM
6512000-03-26 Alan Modra <alan@linuxcare.com>
652
653 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
654 problem isn't really specific to Unixware.
655 (OLDGCC_COMPAT): Define.
656 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
657 destination %st(0).
658 Fix lots of comments.
659
866afedc
NC
6602000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
661
662 * d30v.h:
663 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
664 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
665 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
666 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
667 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
668 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
669 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
670
cc5ca5ce
AM
6712000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
672
673 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
674 fistpd without suffix.
675
68e324a2
NC
6762000-02-24 Nick Clifton <nickc@cygnus.com>
677
678 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
679 'signed_overflow_ok_p'.
680 Delete prototypes for cgen_set_flags() and cgen_get_flags().
681
60f036a2
AH
6822000-02-24 Andrew Haley <aph@cygnus.com>
683
684 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
685 (CGEN_CPU_TABLE): flags: new field.
686 Add prototypes for new functions.
d83c6548 687
9b9b5cd4
AM
6882000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
689
690 * i386.h: Add some more UNIXWARE_COMPAT comments.
691
5b93d8bb
AM
6922000-02-23 Linas Vepstas <linas@linas.org>
693
694 * i370.h: New file.
695
4f1d9bd8
NC
6962000-02-22 Chandra Chavva <cchavva@cygnus.com>
697
698 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
699 cannot be combined in parallel with ADD/SUBppp.
700
87f398dd
AH
7012000-02-22 Andrew Haley <aph@cygnus.com>
702
703 * mips.h: (OPCODE_IS_MEMBER): Add comment.
704
367c01af
AH
7051999-12-30 Andrew Haley <aph@cygnus.com>
706
9a1e79ca
AH
707 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
708 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
709 insns.
367c01af 710
add0c677
AM
7112000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
712
713 * i386.h: Qualify intel mode far call and jmp with x_Suf.
714
3138f287
AM
7151999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
716
717 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
718 indirect jumps and calls. Add FF/3 call for intel mode.
719
ccecd07b
JL
720Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
721
722 * mn10300.h: Add new operand types. Add new instruction formats.
723
b37e19e9
JL
724Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
725
726 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
727 instruction.
728
5fce5ddf
GRK
7291999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
730
731 * mips.h (INSN_ISA5): New.
732
2bd7f1f3
GRK
7331999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
734
735 * mips.h (OPCODE_IS_MEMBER): New.
736
4df2b5c5
NC
7371999-10-29 Nick Clifton <nickc@cygnus.com>
738
739 * d30v.h (SHORT_AR): Define.
740
446a06c9
MM
7411999-10-18 Michael Meissner <meissner@cygnus.com>
742
743 * alpha.h (alpha_num_opcodes): Convert to unsigned.
744 (alpha_num_operands): Ditto.
745
eca04c6a
JL
746Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
747
748 * hppa.h (pa_opcodes): Add load and store cache control to
749 instructions. Add ordered access load and store.
750
751 * hppa.h (pa_opcode): Add new entries for addb and addib.
752
753 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
754
755 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
756
c43185de
DN
757Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
758
759 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
760
ec3533da
JL
761Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
762
390f858d
JL
763 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
764 and "be" using completer prefixes.
765
8c47ebd9
JL
766 * hppa.h (pa_opcodes): Add initializers to silence compiler.
767
ec3533da
JL
768 * hppa.h: Update comments about character usage.
769
18369bea
JL
770Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
771
772 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
773 up the new fstw & bve instructions.
774
c36efdd2
JL
775Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
776
d3ffb032
JL
777 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
778 instructions.
779
c49ec3da
JL
780 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
781
5d2e7ecc
JL
782 * hppa.h (pa_opcodes): Add long offset double word load/store
783 instructions.
784
6397d1a2
JL
785 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
786 stores.
787
142f0fe0
JL
788 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
789
f5a68b45
JL
790 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
791
8235801e
JL
792 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
793
35184366
JL
794 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
795
f0bfde5e
JL
796 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
797
27bbbb58
JL
798 * hppa.h (pa_opcodes): Add support for "b,l".
799
c36efdd2
JL
800 * hppa.h (pa_opcodes): Add support for "b,gate".
801
f2727d04
JL
802Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
803
9392fb11 804 * hppa.h (pa_opcodes): Use 'fX' for first register operand
d83c6548 805 in xmpyu.
9392fb11 806
e0c52e99
JL
807 * hppa.h (pa_opcodes): Fix mask for probe and probei.
808
f2727d04
JL
809 * hppa.h (pa_opcodes): Fix mask for depwi.
810
52d836e2
JL
811Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
812
813 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
814 an explicit output argument.
815
90765e3a
JL
816Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
817
818 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
819 Add a few PA2.0 loads and store variants.
820
8340b17f
ILT
8211999-09-04 Steve Chamberlain <sac@pobox.com>
822
823 * pj.h: New file.
824
5f47d35b
AM
8251999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
826
827 * i386.h (i386_regtab): Move %st to top of table, and split off
828 other fp reg entries.
829 (i386_float_regtab): To here.
830
1c143202
JL
831Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
832
7d8fdb64
JL
833 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
834 by 'f'.
835
90927b9c
JL
836 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
837 Add supporting args.
838
1d16bf9c
JL
839 * hppa.h: Document new completers and args.
840 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
841 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
842 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
843 pmenb and pmdis.
844
96226a68
JL
845 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
846 hshr, hsub, mixh, mixw, permh.
847
5d4ba527
JL
848 * hppa.h (pa_opcodes): Change completers in instructions to
849 use 'c' prefix.
850
e9fc28c6
JL
851 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
852 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
853
1c143202
JL
854 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
855 fnegabs to use 'I' instead of 'F'.
856
9e525108
AM
8571999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
858
859 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
860 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
861 Alphabetically sort PIII insns.
862
e8da1bf1
DE
863Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
864
865 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
866
7d627258
JL
867Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
868
5696871a
JL
869 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
870 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
871
7d627258
JL
872 * hppa.h: Document 64 bit condition completers.
873
c5e52916
JL
874Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
875
876 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
877
eecb386c
AM
8781999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
879
880 * i386.h (i386_optab): Add DefaultSize modifier to all insns
881 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
882 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
883
88a380f3
JL
884Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
885 Jeff Law <law@cygnus.com>
886
887 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
888
889 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca 890
d83c6548 891 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
d60e8dca
JL
892 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
893
145cf1f0
AM
8941999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
895
896 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
897
73826640
JL
898Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
899
900 * hppa.h (struct pa_opcode): Add new field "flags".
901 (FLAGS_STRICT): Define.
902
b65db252
JL
903Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
904 Jeff Law <law@cygnus.com>
905
f7fc668b
JL
906 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
907
908 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 909
10084519
AM
9101999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
911
912 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
913 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
914 flag to fcomi and friends.
915
cd8a80ba
JL
916Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
917
918 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
d83c6548 919 integer logical instructions.
cd8a80ba 920
1fca749b
ILT
9211999-05-28 Linus Nordberg <linus.nordberg@canit.se>
922
923 * m68k.h: Document new formats `E', `G', `H' and new places `N',
924 `n', `o'.
925
926 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
927 and new places `m', `M', `h'.
928
aa008907
JL
929Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
930
931 * hppa.h (pa_opcodes): Add several processor specific system
932 instructions.
933
e26b85f0
JL
934Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
935
d83c6548 936 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
e26b85f0
JL
937 "addb", and "addib" to be used by the disassembler.
938
c608c12e
AM
9391999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
940
941 * i386.h (ReverseModrm): Remove all occurences.
942 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
943 movmskps, pextrw, pmovmskb, maskmovq.
944 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
945 ignore the data size prefix.
946
947 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
948 Mostly stolen from Doug Ledford <dledford@redhat.com>
949
45c18104
RH
950Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
951
952 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
953
252b5132
RH
9541999-04-14 Doug Evans <devans@casey.cygnus.com>
955
956 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
957 (CGEN_ATTR_TYPE): Update.
958 (CGEN_ATTR_MASK): Number booleans starting at 0.
959 (CGEN_ATTR_VALUE): Update.
960 (CGEN_INSN_ATTR): Update.
961
962Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
963
964 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
965 instructions.
966
967Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
968
969 * hppa.h (bb, bvb): Tweak opcode/mask.
970
971
9721999-03-22 Doug Evans <devans@casey.cygnus.com>
973
974 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
975 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
976 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
977 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
978 Delete member max_insn_size.
979 (enum cgen_cpu_open_arg): New enum.
980 (cpu_open): Update prototype.
981 (cpu_open_1): Declare.
982 (cgen_set_cpu): Delete.
983
9841999-03-11 Doug Evans <devans@casey.cygnus.com>
985
986 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
987 (CGEN_OPERAND_NIL): New macro.
988 (CGEN_OPERAND): New member `type'.
989 (@arch@_cgen_operand_table): Delete decl.
990 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
991 (CGEN_OPERAND_TABLE): New struct.
992 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
993 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
994 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
995 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
996 {get,set}_{int,vma}_operand.
997 (@arch@_cgen_cpu_open): New arg `isa'.
998 (cgen_set_cpu): Ditto.
999
1000Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
1001
1002 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
1003
10041999-02-25 Doug Evans <devans@casey.cygnus.com>
1005
1006 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
1007 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
1008 enum cgen_hw_type.
1009 (CGEN_HW_TABLE): New struct.
1010 (hw_table): Delete declaration.
1011 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
1012 to table entry to enum.
1013 (CGEN_OPINST): Ditto.
1014 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
1015
1016Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
1017
1018 * alpha.h (AXP_OPCODE_EV6): New.
1019 (AXP_OPCODE_NOPAL): Include it.
1020
10211999-02-09 Doug Evans <devans@casey.cygnus.com>
1022
1023 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
1024 All uses updated. New members int_insn_p, max_insn_size,
1025 parse_operand,insert_operand,extract_operand,print_operand,
1026 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
1027 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
1028 extract_handlers,print_handlers.
1029 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
1030 (CGEN_ATTR_BOOL_OFFSET): New macro.
1031 (CGEN_ATTR_MASK): Subtract it to compute bit number.
1032 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
1033 (cgen_opcode_handler): Renamed from cgen_base.
1034 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
1035 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
1036 all uses updated.
1037 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
1038 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
1039 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
1040 (CGEN_OPCODE,CGEN_IBASE): New types.
1041 (CGEN_INSN): Rewrite.
1042 (CGEN_{ASM,DIS}_HASH*): Delete.
1043 (init_opcode_table,init_ibld_table): Declare.
1044 (CGEN_INSN_ATTR): New type.
1045
1046Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
d83c6548 1047
252b5132
RH
1048 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
1049 (x_FP, d_FP, dls_FP, sldx_FP): Define.
1050 Change *Suf definitions to include x and d suffixes.
1051 (movsx): Use w_Suf and b_Suf.
1052 (movzx): Likewise.
1053 (movs): Use bwld_Suf.
1054 (fld): Change ordering. Use sld_FP.
1055 (fild): Add Intel Syntax equivalent of fildq.
1056 (fst): Use sld_FP.
1057 (fist): Use sld_FP.
1058 (fstp): Use sld_FP. Add x_FP version.
1059 (fistp): LLongMem version for Intel Syntax.
1060 (fcom, fcomp): Use sld_FP.
1061 (fadd, fiadd, fsub): Use sld_FP.
1062 (fsubr): Use sld_FP.
1063 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
1064
10651999-01-27 Doug Evans <devans@casey.cygnus.com>
1066
1067 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
1068 CGEN_MODE_UINT.
1069
e135f41b 10701999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH
1071
1072 * hppa.h (bv): Fix mask.
1073
10741999-01-05 Doug Evans <devans@casey.cygnus.com>
1075
1076 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
1077 (CGEN_ATTR): Use it.
1078 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
1079 (CGEN_ATTR_TABLE): New member dfault.
1080
10811998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
1082
1083 * mips.h (MIPS16_INSN_BRANCH): New.
1084
1085Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
1086
1087 The following is part of a change made by Edith Epstein
d83c6548
AJ
1088 <eepstein@sophia.cygnus.com> as part of a project to merge in
1089 changes by HP; HP did not create ChangeLog entries.
252b5132
RH
1090
1091 * hppa.h (completer_chars): list of chars to not put a space
d83c6548 1092 after.
252b5132
RH
1093
1094Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
1095
1096 * i386.h (i386_optab): Permit w suffix on processor control and
d83c6548 1097 status word instructions.
252b5132
RH
1098
10991998-11-30 Doug Evans <devans@casey.cygnus.com>
1100
1101 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1102 (struct cgen_keyword_entry): Ditto.
1103 (struct cgen_operand): Ditto.
1104 (CGEN_IFLD): New typedef, with associated access macros.
1105 (CGEN_IFMT): New typedef, with associated access macros.
1106 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1107 (CGEN_IVALUE): New typedef.
1108 (struct cgen_insn): Delete const on syntax,attrs members.
1109 `format' now points to format data. Type of `value' is now
1110 CGEN_IVALUE.
1111 (struct cgen_opcode_table): New member ifld_table.
1112
11131998-11-18 Doug Evans <devans@casey.cygnus.com>
1114
1115 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1116 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1117 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1118 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1119 (cgen_opcode_table): Update type of dis_hash fn.
1120 (extract_operand): Update type of `insn_value' arg.
1121
1122Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1123
1124 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1125
1126Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1127
1128 * mips.h (INSN_MULT): Added.
1129
1130Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1131
1132 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1133
1134Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1135
1136 * cgen.h (CGEN_INSN_INT): New typedef.
1137 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1138 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1139 (CGEN_INSN_BYTES_PTR): New typedef.
1140 (CGEN_EXTRACT_INFO): New typedef.
1141 (cgen_insert_fn,cgen_extract_fn): Update.
1142 (cgen_opcode_table): New member `insn_endian'.
1143 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1144 (insert_operand,extract_operand): Update.
1145 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1146
1147Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1148
1149 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1150 (struct CGEN_HW_ENTRY): New member `attrs'.
1151 (CGEN_HW_ATTR): New macro.
1152 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1153 (CGEN_INSN_INVALID_P): New macro.
1154
1155Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1156
1157 * hppa.h: Add "fid".
d83c6548 1158
252b5132
RH
1159Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1160
1161 From Robert Andrew Dale <rob@nb.net>
1162 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1163 (AMD_3DNOW_OPCODE): Define.
1164
1165Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1166
1167 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1168
1169Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1170
1171 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1172
1173Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1174
1175 Move all global state data into opcode table struct, and treat
1176 opcode table as something that is "opened/closed".
1177 * cgen.h (CGEN_OPCODE_DESC): New type.
1178 (all fns): New first arg of opcode table descriptor.
1179 (cgen_set_parse_operand_fn): Add prototype.
1180 (cgen_current_machine,cgen_current_endian): Delete.
1181 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1182 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1183 dis_hash_table,dis_hash_table_entries.
1184 (opcode_open,opcode_close): Add prototypes.
1185
1186 * cgen.h (cgen_insn): New element `cdx'.
1187
1188Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1189
1190 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1191
1192Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1193
1194 * mn10300.h: Add "no_match_operands" field for instructions.
1195 (MN10300_MAX_OPERANDS): Define.
1196
1197Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1198
1199 * cgen.h (cgen_macro_insn_count): Declare.
1200
1201Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1202
1203 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1204 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1205 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1206 set_{int,vma}_operand.
1207
1208Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1209
1210 * mn10300.h: Add "machine" field for instructions.
1211 (MN103, AM30): Define machine types.
d83c6548 1212
252b5132
RH
1213Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1214
1215 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1216
12171998-06-18 Ulrich Drepper <drepper@cygnus.com>
1218
1219 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1220
1221Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1222
1223 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1224 and ud2b.
1225 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1226 those that happen to be implemented on pentiums.
1227
1228Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1229
1230 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1231 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1232 with Size16|IgnoreSize or Size32|IgnoreSize.
1233
1234Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1235
1236 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1237 (REPE): Rename to REPE_PREFIX_OPCODE.
1238 (i386_regtab_end): Remove.
1239 (i386_prefixtab, i386_prefixtab_end): Remove.
1240 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1241 of md_begin.
1242 (MAX_OPCODE_SIZE): Define.
1243 (i386_optab_end): Remove.
1244 (sl_Suf): Define.
1245 (sl_FP): Use sl_Suf.
1246
1247 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1248 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1249 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1250 data32, dword, and adword prefixes.
1251 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1252 regs.
1253
1254Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1255
1256 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1257
1258 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1259 register operands, because this is a common idiom. Flag them with
1260 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1261 fdivrp because gcc erroneously generates them. Also flag with a
1262 warning.
1263
1264 * i386.h: Add suffix modifiers to most insns, and tighter operand
1265 checks in some cases. Fix a number of UnixWare compatibility
1266 issues with float insns. Merge some floating point opcodes, using
1267 new FloatMF modifier.
1268 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1269 consistency.
1270
1271 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1272 IgnoreDataSize where appropriate.
1273
1274Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1275
1276 * i386.h: (one_byte_segment_defaults): Remove.
1277 (two_byte_segment_defaults): Remove.
1278 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1279
1280Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1281
1282 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1283 (cgen_hw_lookup_by_num): Declare.
1284
1285Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1286
1287 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1288 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1289
1290Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1291
1292 * cgen.h (cgen_asm_init_parse): Delete.
1293 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1294 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1295
1296Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1297
1298 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1299 (cgen_asm_finish_insn): Update prototype.
1300 (cgen_insn): New members num, data.
1301 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1302 dis_hash, dis_hash_table_size moved to ...
1303 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1304 All uses updated. New members asm_hash_p, dis_hash_p.
1305 (CGEN_MINSN_EXPANSION): New struct.
1306 (cgen_expand_macro_insn): Declare.
1307 (cgen_macro_insn_count): Declare.
1308 (get_insn_operands): Update prototype.
1309 (lookup_get_insn_operands): Declare.
1310
1311Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1312
1313 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1314 regKludge. Add operands types for string instructions.
1315
1316Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1317
1318 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1319 table.
1320
1321Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1322
1323 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1324 for `gettext'.
1325
1326Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1327
1328 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1329 Add IsString flag to string instructions.
1330 (IS_STRING): Don't define.
1331 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1332 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1333 (SS_PREFIX_OPCODE): Define.
1334
1335Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1336
1337 * i386.h: Revert March 24 patch; no more LinearAddress.
1338
1339Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1340
1341 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1342 instructions, and instead add FWait opcode modifier. Add short
1343 form of fldenv and fstenv.
1344 (FWAIT_OPCODE): Define.
1345
1346 * i386.h (i386_optab): Change second operand constraint of `mov
1347 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1348 allow legal instructions such as `movl %gs,%esi'
1349
1350Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1351
1352 * h8300.h: Various changes to fully bracket initializers.
1353
1354Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1355
1356 * i386.h: Set LinearAddress for lidt and lgdt.
1357
1358Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1359
1360 * cgen.h (CGEN_BOOL_ATTR): New macro.
1361
1362Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1363
1364 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1365
1366Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1367
1368 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1369 (cgen_insn): Record syntax and format entries here, rather than
1370 separately.
1371
1372Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1373
1374 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1375
1376Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1377
1378 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1379 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1380 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1381
1382Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1383
1384 * cgen.h (lookup_insn): New argument alias_p.
1385
1386Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1387
1388Fix rac to accept only a0:
1389 * d10v.h (OPERAND_ACC): Split into:
1390 (OPERAND_ACC0, OPERAND_ACC1) .
1391 (OPERAND_GPR): Define.
1392
1393Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1394
1395 * cgen.h (CGEN_FIELDS): Define here.
1396 (CGEN_HW_ENTRY): New member `type'.
1397 (hw_list): Delete decl.
1398 (enum cgen_mode): Declare.
1399 (CGEN_OPERAND): New member `hw'.
1400 (enum cgen_operand_instance_type): Declare.
1401 (CGEN_OPERAND_INSTANCE): New type.
1402 (CGEN_INSN): New member `operands'.
1403 (CGEN_OPCODE_DATA): Make hw_list const.
1404 (get_insn_operands,lookup_insn): Add prototypes for.
1405
1406Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1407
1408 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1409 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1410 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1411 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1412
1413Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1414
1415 * cgen.h: Correct typo in comment end marker.
1416
1417Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1418
1419 * tic30.h: New file.
1420
5a109b67 1421Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH
1422
1423 * cgen.h: Add prototypes for cgen_save_fixups(),
1424 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1425 of cgen_asm_finish_insn() to return a char *.
1426
1427Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1428
1429 * cgen.h: Formatting changes to improve readability.
1430
1431Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1432
1433 * cgen.h (*): Clean up pass over `struct foo' usage.
1434 (CGEN_ATTR): Make unsigned char.
1435 (CGEN_ATTR_TYPE): Update.
1436 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1437 (cgen_base): Move member `attrs' to cgen_insn.
1438 (CGEN_KEYWORD): New member `null_entry'.
1439 (CGEN_{SYNTAX,FORMAT}): New types.
1440 (cgen_insn): Format and syntax separated from each other.
1441
1442Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1443
1444 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1445 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1446 flags_{used,set} long.
1447 (d30v_operand): Make flags field long.
1448
1449Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1450
1451 * m68k.h: Fix comment describing operand types.
1452
1453Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1454
1455 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1456 everything else after down.
1457
1458Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1459
1460 * d10v.h (OPERAND_FLAG): Split into:
1461 (OPERAND_FFLAG, OPERAND_CFLAG) .
1462
1463Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1464
1465 * mips.h (struct mips_opcode): Changed comments to reflect new
1466 field usage.
1467
1468Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1469
1470 * mips.h: Added to comments a quick-ref list of all assigned
1471 operand type characters.
1472 (OP_{MASK,SH}_PERFREG): New macros.
1473
1474Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1475
1476 * sparc.h: Add '_' and '/' for v9a asr's.
1477 Patch from David Miller <davem@vger.rutgers.edu>
1478
1479Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1480
1481 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1482 area are not available in the base model (H8/300).
1483
1484Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1485
1486 * m68k.h: Remove documentation of ` operand specifier.
1487
1488Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1489
1490 * m68k.h: Document q and v operand specifiers.
1491
1492Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1493
1494 * v850.h (struct v850_opcode): Add processors field.
1495 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1496 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1497 (PROCESSOR_V850EA): New bit constants.
1498
1499Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1500
1501 Merge changes from Martin Hunt:
1502
1503 * d30v.h: Allow up to 64 control registers. Add
1504 SHORT_A5S format.
1505
1506 * d30v.h (LONG_Db): New form for delayed branches.
1507
1508 * d30v.h: (LONG_Db): New form for repeati.
1509
1510 * d30v.h (SHORT_D2B): New form.
1511
1512 * d30v.h (SHORT_A2): New form.
1513
1514 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1515 registers are used. Needed for VLIW optimization.
1516
1517Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1518
1519 * cgen.h: Move assembler interface section
1520 up so cgen_parse_operand_result is defined for cgen_parse_address.
1521 (cgen_parse_address): Update prototype.
1522
1523Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1524
1525 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1526
1527Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1528
1529 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1530 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1531 <paubert@iram.es>.
1532
1533 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1534 <paubert@iram.es>.
1535
1536 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1537 <paubert@iram.es>.
1538
1539 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1540 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1541
1542Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1543
1544 * v850.h (V850_NOT_R0): New flag.
1545
1546Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1547
1548 * v850.h (struct v850_opcode): Remove flags field.
1549
1550Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1551
1552 * v850.h (struct v850_opcode): Add flags field.
1553 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1554 fields.
1555 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1556 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1557
1558Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1559
1560 * arc.h: New file.
1561
1562Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1563
1564 * sparc.h (sparc_opcodes): Declare as const.
1565
1566Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1567
1568 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1569 uses single or double precision floating point resources.
1570 (INSN_NO_ISA, INSN_ISA1): Define.
1571 (cpu specific INSN macros): Tweak into bitmasks outside the range
1572 of INSN_ISA field.
1573
1574Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1575
1576 * i386.h: Fix pand opcode.
1577
1578Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1579
1580 * mips.h: Widen INSN_ISA and move it to a more convenient
1581 bit position. Add INSN_3900.
1582
1583Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1584
1585 * mips.h (struct mips_opcode): added new field membership.
1586
1587Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1588
1589 * i386.h (movd): only Reg32 is allowed.
1590
1591 * i386.h: add fcomp and ud2. From Wayne Scott
1592 <wscott@ichips.intel.com>.
1593
1594Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1595
1596 * i386.h: Add MMX instructions.
1597
1598Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1599
1600 * i386.h: Remove W modifier from conditional move instructions.
1601
1602Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1603
1604 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1605 with no arguments to match that generated by the UnixWare
1606 assembler.
1607
1608Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1609
1610 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1611 (cgen_parse_operand_fn): Declare.
1612 (cgen_init_parse_operand): Declare.
1613 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1614 new argument `want'.
1615 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1616 (enum cgen_parse_operand_type): New enum.
1617
1618Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1619
1620 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1621
1622Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1623
1624 * cgen.h: New file.
1625
1626Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1627
1628 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1629 fdivrp.
1630
1631Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1632
1633 * v850.h (extract): Make unsigned.
1634
1635Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1636
1637 * i386.h: Add iclr.
1638
1639Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1640
1641 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1642 take a direction bit.
1643
1644Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1645
1646 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1647
1648Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1649
1650 * sparc.h: Include <ansidecl.h>. Update function declarations to
1651 use prototypes, and to use const when appropriate.
1652
1653Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1654
1655 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1656
1657Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1658
1659 * d10v.h: Change pre_defined_registers to
1660 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1661
1662Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1663
1664 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1665 Change mips_opcodes from const array to a pointer,
1666 and change bfd_mips_num_opcodes from const int to int,
1667 so that we can increase the size of the mips opcodes table
1668 dynamically.
1669
1670Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1671
1672 * d30v.h (FLAG_X): Remove unused flag.
1673
1674Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1675
1676 * d30v.h: New file.
1677
1678Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1679
1680 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1681 (PDS_VALUE): Macro to access value field of predefined symbols.
1682 (tic80_next_predefined_symbol): Add prototype.
1683
1684Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1685
1686 * tic80.h (tic80_symbol_to_value): Change prototype to match
1687 change in function, added class parameter.
1688
1689Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1690
1691 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1692 endmask fields, which are somewhat weird in that 0 and 32 are
1693 treated exactly the same.
1694
1695Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1696
1697 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1698 rather than a constant that is 2**X. Reorder them to put bits for
1699 operands that have symbolic names in the upper bits, so they can
1700 be packed into an int where the lower bits contain the value that
1701 corresponds to that symbolic name.
1702 (predefined_symbo): Add struct.
1703 (tic80_predefined_symbols): Declare array of translations.
1704 (tic80_num_predefined_symbols): Declare size of that array.
1705 (tic80_value_to_symbol): Declare function.
1706 (tic80_symbol_to_value): Declare function.
1707
1708Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1709
1710 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1711
1712Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1713
1714 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1715 be the destination register.
1716
1717Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1718
1719 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1720 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1721 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1722 that the opcode can have two vector instructions in a single
1723 32 bit word and we have to encode/decode both.
1724
1725Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1726
1727 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1728 TIC80_OPERAND_RELATIVE for PC relative.
1729 (TIC80_OPERAND_BASEREL): New flag bit for register
1730 base relative.
1731
1732Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1733
1734 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1735
1736Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1737
1738 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1739 ":s" modifier for scaling.
1740
1741Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1742
1743 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1744 (TIC80_OPERAND_M_LI): Ditto
1745
1746Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1747
1748 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1749 (TIC80_OPERAND_CC): New define for condition code operand.
1750 (TIC80_OPERAND_CR): New define for control register operand.
1751
1752Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1753
1754 * tic80.h (struct tic80_opcode): Name changed.
1755 (struct tic80_opcode): Remove format field.
1756 (struct tic80_operand): Add insertion and extraction functions.
1757 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1758 correct ones.
1759 (FMT_*): Ditto.
1760
1761Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1762
1763 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1764 type IV instruction offsets.
1765
1766Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1767
1768 * tic80.h: New file.
1769
1770Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1771
1772 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1773
1774Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1775
1776 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1777 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1778 * v850.h: Fix comment, v850_operand not powerpc_operand.
1779
1780Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1781
1782 * mn10200.h: Flesh out structures and definitions needed by
1783 the mn10200 assembler & disassembler.
1784
1785Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1786
1787 * mips.h: Add mips16 definitions.
1788
1789Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1790
1791 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1792
1793Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1794
1795 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1796 (MN10300_OPERAND_MEMADDR): Define.
1797
1798Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1799
1800 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1801
1802Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1803
1804 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1805
1806Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1807
1808 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1809
1810Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1811
1812 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1813
1814Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1815
1816 * alpha.h: Don't include "bfd.h"; private relocation types are now
d83c6548
AJ
1817 negative to minimize problems with shared libraries. Organize
1818 instruction subsets by AMASK extensions and PALcode
1819 implementation.
252b5132
RH
1820 (struct alpha_operand): Move flags slot for better packing.
1821
1822Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1823
1824 * v850.h (V850_OPERAND_RELAX): New operand flag.
1825
1826Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1827
1828 * mn10300.h (FMT_*): Move operand format definitions
1829 here.
1830
1831Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1832
1833 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1834
1835Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1836
1837 * mn10300.h (mn10300_opcode): Add "format" field.
1838 (MN10300_OPERAND_*): Define.
1839
1840Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1841
1842 * mn10x00.h: Delete.
1843 * mn10200.h, mn10300.h: New files.
1844
1845Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1846
1847 * mn10x00.h: New file.
1848
1849Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1850
1851 * v850.h: Add new flag to indicate this instruction uses a PC
1852 displacement.
1853
1854Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1855
1856 * h8300.h (stmac): Add missing instruction.
1857
1858Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1859
1860 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1861 field.
1862
1863Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1864
1865 * v850.h (V850_OPERAND_EP): Define.
1866
1867 * v850.h (v850_opcode): Add size field.
1868
1869Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1870
1871 * v850.h (v850_operands): Add insert and extract fields, pointers
d83c6548 1872 to functions used to handle unusual operand encoding.
252b5132 1873 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
d83c6548 1874 V850_OPERAND_SIGNED): Defined.
252b5132
RH
1875
1876Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1877
1878 * v850.h (v850_operands): Add flags field.
1879 (OPERAND_REG, OPERAND_NUM): Defined.
1880
1881Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1882
1883 * v850.h: New file.
1884
1885Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1886
1887 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
d83c6548
AJ
1888 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1889 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1890 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1891 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1892 Defined.
252b5132
RH
1893
1894Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1895
1896 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1897 a 3 bit space id instead of a 2 bit space id.
1898
1899Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1900
1901 * d10v.h: Add some additional defines to support the
d83c6548 1902 assembler in determining which operations can be done in parallel.
252b5132
RH
1903
1904Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1905
1906 * h8300.h (SN): Define.
1907 (eepmov.b): Renamed from "eepmov"
1908 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1909 with them.
1910
1911Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1912
1913 * d10v.h (OPERAND_SHIFT): New operand flag.
1914
1915Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1916
1917 * d10v.h: Changes for divs, parallel-only instructions, and
d83c6548 1918 signed numbers.
252b5132
RH
1919
1920Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1921
1922 * d10v.h (pd_reg): Define. Putting the definition here allows
1923 the assembler and disassembler to share the same struct.
1924
1925Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1926
1927 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1928 Williams <steve@icarus.com>.
1929
1930Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1931
1932 * d10v.h: New file.
1933
1934Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1935
1936 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1937
1938Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1939
d83c6548 1940 * m68k.h (mcf5200): New macro.
252b5132
RH
1941 Document names of coldfire control registers.
1942
1943Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1944
1945 * h8300.h (SRC_IN_DST): Define.
1946
1947 * h8300.h (UNOP3): Mark the register operand in this insn
1948 as a source operand, not a destination operand.
1949 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1950 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1951 register operand with SRC_IN_DST.
1952
1953Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1954
1955 * alpha.h: New file.
1956
1957Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1958
1959 * rs6k.h: Remove obsolete file.
1960
1961Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1962
1963 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1964 fdivp, and fdivrp. Add ffreep.
1965
1966Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1967
1968 * h8300.h: Reorder various #defines for readability.
1969 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1970 (BITOP): Accept additional (unused) argument. All callers changed.
1971 (EBITOP): Likewise.
1972 (O_LAST): Bump.
1973 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1974
1975 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1976 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1977 (BITOP, EBITOP): Handle new H8/S addressing modes for
1978 bit insns.
1979 (UNOP3): Handle new shift/rotate insns on the H8/S.
1980 (insns using exr): New instructions.
1981 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1982
1983Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1984
1985 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1986 was incorrect.
1987
1988Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1989
1990 * h8300.h (START): Remove.
1991 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1992 and mov.l insns that can be relaxed.
1993
1994Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1995
1996 * i386.h: Remove Abs32 from lcall.
1997
1998Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1999
2000 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
2001 (SLCPOP): New macro.
2002 Mark X,Y opcode letters as in use.
2003
2004Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
2005
2006 * sparc.h (F_FLOAT, F_FBR): Define.
2007
2008Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
2009
2010 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
2011 from all insns.
2012 (ABS8SRC,ABS8DST): Add ABS8MEM.
2013 (add.l): Fix reg+reg variant.
2014 (eepmov.w): Renamed from eepmovw.
2015 (ldc,stc): Fix many cases.
2016
2017Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
2018
2019 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
2020
2021Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
2022
2023 * sparc.h (O): Mark operand letter as in use.
2024
2025Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
2026
2027 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
2028 Mark operand letters uU as in use.
2029
2030Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
2031
2032 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
2033 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
2034 (SPARC_OPCODE_SUPPORTED): New macro.
2035 (SPARC_OPCODE_CONFLICT_P): Rewrite.
2036 (F_NOTV9): Delete.
2037
2038Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
2039
2040 * sparc.h (sparc_opcode_lookup_arch) Make return type in
2041 declaration consistent with return type in definition.
2042
2043Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
2044
2045 * i386.h (i386_optab): Remove Data32 from pushf and popf.
2046
2047Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
2048
2049 * i386.h (i386_regtab): Add 80486 test registers.
2050
2051Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
2052
2053 * i960.h (I_HX): Define.
2054 (i960_opcodes): Add HX instruction.
2055
2056Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
2057
2058 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
2059 and fclex.
2060
2061Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
2062
2063 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
2064 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
2065 (bfd_* defines): Delete.
2066 (sparc_opcode_archs): Replaces architecture_pname.
2067 (sparc_opcode_lookup_arch): Declare.
2068 (NUMOPCODES): Delete.
2069
2070Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
2071
2072 * sparc.h (enum sparc_architecture): Add v9a.
2073 (ARCHITECTURES_CONFLICT_P): Update.
2074
2075Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
2076
2077 * i386.h: Added Pentium Pro instructions.
2078
2079Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
2080
2081 * m68k.h: Document new 'W' operand place.
2082
2083Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
2084
2085 * hppa.h: Add lci and syncdma instructions.
2086
2087Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2088
2089 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
d83c6548 2090 instructions.
252b5132
RH
2091
2092Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
2093
2094 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2095 assembler's -mcom and -many switches.
2096
2097Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
2098
2099 * i386.h: Fix cmpxchg8b extension opcode description.
2100
2101Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2102
2103 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2104 and register cr4.
2105
2106Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2107
2108 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2109
2110Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2111
2112 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2113
2114Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2115
2116 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2117
2118Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2119
2120 * m68kmri.h: Remove.
2121
2122 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2123 declarations. Remove F_ALIAS and flag field of struct
2124 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2125 int. Make name and args fields of struct m68k_opcode const.
2126
2127Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2128
2129 * sparc.h (F_NOTV9): Define.
2130
2131Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2132
2133 * mips.h (INSN_4010): Define.
2134
2135Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2136
2137 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2138
2139 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2140 * m68k.h: Fix argument descriptions of coprocessor
2141 instructions to allow only alterable operands where appropriate.
2142 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2143 (m68k_opcode_aliases): Add more aliases.
2144
2145Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2146
2147 * m68k.h: Added explcitly short-sized conditional branches, and a
2148 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2149 svr4-based configurations.
2150
2151Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2152
2153 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2154 * i386.h: added missing Data16/Data32 flags to a few instructions.
2155
2156Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2157
2158 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2159 (OP_MASK_BCC, OP_SH_BCC): Define.
2160 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2161 (OP_MASK_CCC, OP_SH_CCC): Define.
2162 (INSN_READ_FPR_R): Define.
2163 (INSN_RFE): Delete.
2164
2165Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2166
2167 * m68k.h (enum m68k_architecture): Deleted.
2168 (struct m68k_opcode_alias): New type.
2169 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2170 matching constraints, values and flags. As a side effect of this,
2171 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2172 as I know were never used, now may need re-examining.
2173 (numopcodes): Now const.
2174 (m68k_opcode_aliases, numaliases): New variables.
2175 (endop): Deleted.
2176 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2177 m68k_opcode_aliases; update declaration of m68k_opcodes.
2178
2179Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2180
2181 * hppa.h (delay_type): Delete unused enumeration.
2182 (pa_opcode): Replace unused delayed field with an architecture
2183 field.
2184 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2185
2186Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2187
2188 * mips.h (INSN_ISA4): Define.
2189
2190Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2191
2192 * mips.h (M_DLA_AB, M_DLI): Define.
2193
2194Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2195
2196 * hppa.h (fstwx): Fix single-bit error.
2197
2198Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2199
2200 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2201
2202Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2203
2204 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2205 debug registers. From Charles Hannum (mycroft@netbsd.org).
2206
2207Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2208
2209 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2210 i386 support:
2211 * i386.h (MOV_AX_DISP32): New macro.
2212 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2213 of several call/return instructions.
2214 (ADDR_PREFIX_OPCODE): New macro.
2215
2216Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2217
2218 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2219
4f1d9bd8
NC
2220 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2221 char.
252b5132
RH
2222 (struct vot, field `name'): ditto.
2223
2224Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2225
2226 * vax.h: Supply and properly group all values in end sentinel.
2227
2228Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2229
2230 * mips.h (INSN_ISA, INSN_4650): Define.
2231
2232Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2233
2234 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2235 systems with a separate instruction and data cache, such as the
2236 29040, these instructions take an optional argument.
2237
2238Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2239
2240 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2241 INSN_TRAP.
2242
2243Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2244
2245 * mips.h (INSN_STORE_MEMORY): Define.
2246
2247Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2248
2249 * sparc.h: Document new operand type 'x'.
2250
2251Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2252
2253 * i960.h (I_CX2): New instruction category. It includes
2254 instructions available on Cx and Jx processors.
2255 (I_JX): New instruction category, for JX-only instructions.
2256 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2257 Jx-only instructions, in I_JX category.
2258
2259Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2260
2261 * ns32k.h (endop): Made pointer const too.
2262
2263Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2264
2265 * ns32k.h: Drop Q operand type as there is no correct use
2266 for it. Add I and Z operand types which allow better checking.
2267
2268Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2269
2270 * h8300.h (xor.l) :fix bit pattern.
2271 (L_2): New size of operand.
2272 (trapa): Use it.
2273
2274Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2275
2276 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2277
2278Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2279
2280 * sparc.h: Include v9 definitions.
2281
2282Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2283
2284 * m68k.h (m68060): Defined.
2285 (m68040up, mfloat, mmmu): Include it.
2286 (struct m68k_opcode): Widen `arch' field.
2287 (m68k_opcodes): Updated for M68060. Removed comments that were
2288 instructions commented out by "JF" years ago.
2289
2290Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2291
2292 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2293 add a one-bit `flags' field.
2294 (F_ALIAS): New macro.
2295
2296Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2297
2298 * h8300.h (dec, inc): Get encoding right.
2299
2300Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2301
2302 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2303 a flag instead.
2304 (PPC_OPERAND_SIGNED): Define.
2305 (PPC_OPERAND_SIGNOPT): Define.
2306
2307Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2308
2309 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2310 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2311
2312Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2313
2314 * i386.h: Reverse last change. It'll be handled in gas instead.
2315
2316Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2317
2318 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2319 slower on the 486 and used the implicit shift count despite the
2320 explicit operand. The one-operand form is still available to get
2321 the shorter form with the implicit shift count.
2322
2323Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2324
2325 * hppa.h: Fix typo in fstws arg string.
2326
2327Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2328
2329 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2330
2331Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2332
2333 * ppc.h (PPC_OPCODE_601): Define.
2334
2335Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2336
2337 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2338 (so we can determine valid completers for both addb and addb[tf].)
2339
2340 * hppa.h (xmpyu): No floating point format specifier for the
2341 xmpyu instruction.
2342
2343Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2344
2345 * ppc.h (PPC_OPERAND_NEXT): Define.
2346 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2347 (struct powerpc_macro): Define.
2348 (powerpc_macros, powerpc_num_macros): Declare.
2349
2350Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2351
2352 * ppc.h: New file. Header file for PowerPC opcode table.
2353
2354Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2355
2356 * hppa.h: More minor template fixes for sfu and copr (to allow
2357 for easier disassembly).
2358
2359 * hppa.h: Fix templates for all the sfu and copr instructions.
2360
2361Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2362
2363 * i386.h (push): Permit Imm16 operand too.
2364
2365Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2366
2367 * h8300.h (andc): Exists in base arch.
2368
2369Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2370
2371 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2372 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2373
2374Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2375
2376 * hppa.h: Add FP quadword store instructions.
2377
2378Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2379
2380 * mips.h: (M_J_A): Added.
2381 (M_LA): Removed.
2382
2383Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2384
2385 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2386 <mellon@pepper.ncd.com>.
2387
2388Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2389
2390 * hppa.h: Immediate field in probei instructions is unsigned,
2391 not low-sign extended.
2392
2393Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2394
2395 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2396
2397Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2398
2399 * i386.h: Add "fxch" without operand.
2400
2401Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2402
2403 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2404
2405Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2406
2407 * hppa.h: Add gfw and gfr to the opcode table.
2408
2409Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2410
2411 * m88k.h: extended to handle m88110.
2412
2413Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2414
2415 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2416 addresses.
2417
2418Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2419
2420 * i960.h (i960_opcodes): Properly bracket initializers.
2421
2422Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2423
2424 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2425
2426Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2427
2428 * m68k.h (two): Protect second argument with parentheses.
2429
2430Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2431
2432 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2433 Deleted old in/out instructions in "#if 0" section.
2434
2435Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2436
2437 * i386.h (i386_optab): Properly bracket initializers.
2438
2439Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2440
2441 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2442 Jeff Law, law@cs.utah.edu).
2443
2444Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2445
2446 * i386.h (lcall): Accept Imm32 operand also.
2447
2448Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2449
2450 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2451 (M_DABS): Added.
2452
2453Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2454
2455 * mips.h (INSN_*): Changed values. Removed unused definitions.
2456 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2457 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2458 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2459 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2460 (M_*): Added new values for r6000 and r4000 macros.
2461 (ANY_DELAY): Removed.
2462
2463Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2464
2465 * mips.h: Added M_LI_S and M_LI_SS.
2466
2467Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2468
2469 * h8300.h: Get some rare mov.bs correct.
2470
2471Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2472
2473 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2474 been included.
2475
2476Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2477
2478 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2479 jump instructions, for use in disassemblers.
2480
2481Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2482
2483 * m88k.h: Make bitfields just unsigned, not unsigned long or
2484 unsigned short.
2485
2486Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2487
2488 * hppa.h: New argument type 'y'. Use in various float instructions.
2489
2490Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2491
2492 * hppa.h (break): First immediate field is unsigned.
2493
2494 * hppa.h: Add rfir instruction.
2495
2496Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2497
2498 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2499
2500Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2501
2502 * mips.h: Reworked the hazard information somewhat, and fixed some
2503 bugs in the instruction hazard descriptions.
2504
2505Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2506
2507 * m88k.h: Corrected a couple of opcodes.
2508
2509Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2510
2511 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2512 new version includes instruction hazard information, but is
2513 otherwise reasonably similar.
2514
2515Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2516
2517 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2518
2519Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2520
2521 Patches from Jeff Law, law@cs.utah.edu:
2522 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2523 Make the tables be the same for the following instructions:
2524 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2525 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2526 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2527 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2528 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2529 "fcmp", and "ftest".
2530
2531 * hppa.h: Make new and old tables the same for "break", "mtctl",
2532 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2533 Fix typo in last patch. Collapse several #ifdefs into a
2534 single #ifdef.
2535
2536 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2537 of the comments up-to-date.
2538
2539 * hppa.h: Update "free list" of letters and update
2540 comments describing each letter's function.
2541
4f1d9bd8
NC
2542Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2543
2544 * h8300.h: Lots of little fixes for the h8/300h.
2545
2546Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2547
2548 Support for H8/300-H
2549 * h8300.h: Lots of new opcodes.
2550
252b5132
RH
2551Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2552
2553 * h8300.h: checkpoint, includes H8/300-H opcodes.
2554
2555Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2556
2557 * Patches from Jeffrey Law <law@cs.utah.edu>.
2558 * hppa.h: Rework single precision FP
2559 instructions so that they correctly disassemble code
2560 PA1.1 code.
2561
2562Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2563
2564 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2565 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2566
2567Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2568
2569 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2570 gdb will define it for now.
2571
2572Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2573
2574 * sparc.h: Don't end enumerator list with comma.
2575
2576Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2577
2578 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2579 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2580 ("bc2t"): Correct typo.
2581 ("[ls]wc[023]"): Use T rather than t.
2582 ("c[0123]"): Define general coprocessor instructions.
2583
2584Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2585
2586 * m68k.h: Move split point for gcc compilation more towards
2587 middle.
2588
2589Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2590
2591 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2592 simply wrong, ics, rfi, & rfsvc were missing).
2593 Add "a" to opr_ext for "bb". Doc fix.
2594
2595Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2596
2597 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2598 * mips.h: Add casts, to suppress warnings about shifting too much.
2599 * m68k.h: Document the placement code '9'.
2600
2601Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2602
2603 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2604 allows callers to break up the large initialized struct full of
2605 opcodes into two half-sized ones. This permits GCC to compile
2606 this module, since it takes exponential space for initializers.
2607 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2608
2609Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2610
2611 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2612 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2613 initialized structs in it.
2614
2615Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2616
2617 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2618 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2619 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2620
2621Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2622
2623 * mips.h: document "i" and "j" operands correctly.
2624
2625Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2626
2627 * mips.h: Removed endianness dependency.
2628
2629Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2630
2631 * h8300.h: include info on number of cycles per instruction.
2632
2633Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2634
2635 * hppa.h: Move handy aliases to the front. Fix masks for extract
2636 and deposit instructions.
2637
2638Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2639
2640 * i386.h: accept shld and shrd both with and without the shift
2641 count argument, which is always %cl.
2642
2643Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2644
2645 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2646 (one_byte_segment_defaults, two_byte_segment_defaults,
2647 i386_prefixtab_end): Ditto.
2648
2649Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2650
2651 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2652 for operand 2; from John Carr, jfc@dsg.dec.com.
2653
2654Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2655
2656 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2657 always use 16-bit offsets. Makes calculated-size jump tables
2658 feasible.
2659
2660Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2661
2662 * i386.h: Fix one-operand forms of in* and out* patterns.
2663
2664Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2665
2666 * m68k.h: Added CPU32 support.
2667
2668Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2669
2670 * mips.h (break): Disassemble the argument. Patch from
2671 jonathan@cs.stanford.edu (Jonathan Stone).
2672
2673Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2674
2675 * m68k.h: merged Motorola and MIT syntax.
2676
2677Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2678
2679 * m68k.h (pmove): make the tests less strict, the 68k book is
2680 wrong.
2681
2682Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2683
2684 * m68k.h (m68ec030): Defined as alias for 68030.
2685 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2686 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2687 them. Tightened description of "fmovex" to distinguish it from
2688 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2689 up descriptions that claimed versions were available for chips not
2690 supporting them. Added "pmovefd".
2691
2692Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2693
2694 * m68k.h: fix where the . goes in divull
2695
2696Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2697
2698 * m68k.h: the cas2 instruction is supposed to be written with
2699 indirection on the last two operands, which can be either data or
2700 address registers. Added a new operand type 'r' which accepts
2701 either register type. Added new cases for cas2l and cas2w which
2702 use them. Corrected masks for cas2 which failed to recognize use
2703 of address register.
2704
2705Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2706
2707 * m68k.h: Merged in patches (mostly m68040-specific) from
2708 Colin Smith <colin@wrs.com>.
2709
2710 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2711 base). Also cleaned up duplicates, re-ordered instructions for
2712 the sake of dis-assembling (so aliases come after standard names).
2713 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2714
2715Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2716
2717 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2718 all missing .s
2719
2720Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2721
2722 * sparc.h: Moved tables to BFD library.
2723
2724 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2725
2726Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2727
2728 * h8300.h: Finish filling in all the holes in the opcode table,
2729 so that the Lucid C compiler can digest this as well...
2730
2731Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2732
2733 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2734 Fix opcodes on various sizes of fild/fist instructions
2735 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2736 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2737
2738Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2739
2740 * h8300.h: Fill in all the holes in the opcode table so that the
2741 losing HPUX C compiler can digest this...
2742
2743Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2744
2745 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2746 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2747
2748Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2749
2750 * sparc.h: Add new architecture variant sparclite; add its scan
2751 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2752
2753Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2754
2755 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2756 fy@lucid.com).
2757
2758Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2759
2760 * rs6k.h: New version from IBM (Metin).
2761
2762Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2763
2764 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2765 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2766
2767Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2768
2769 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2770
2771Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2772
2773 * m68k.h (one, two): Cast macro args to unsigned to suppress
2774 complaints from compiler and lint about integer overflow during
2775 shift.
2776
2777Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2778
2779 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2780
2781Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2782
2783 * mips.h: Make bitfield layout depend on the HOST compiler,
2784 not on the TARGET system.
2785
2786Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2787
2788 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2789 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2790 <TRANLE@INTELLICORP.COM>.
2791
2792Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2793
2794 * h8300.h: turned op_type enum into #define list
2795
2796Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2797
2798 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2799 similar instructions -- they've been renamed to "fitoq", etc.
2800 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2801 number of arguments.
2802 * h8300.h: Remove extra ; which produces compiler warning.
2803
2804Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2805
2806 * sparc.h: fix opcode for tsubcctv.
2807
2808Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2809
2810 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2811
2812Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2813
2814 * sparc.h (nop): Made the 'lose' field be even tighter,
2815 so only a standard 'nop' is disassembled as a nop.
2816
2817Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2818
2819 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2820 disassembled as a nop.
2821
4f1d9bd8
NC
2822Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2823
2824 * m68k.h, sparc.h: ANSIfy enums.
2825
252b5132
RH
2826Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2827
2828 * sparc.h: fix a typo.
2829
2830Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2831
2832 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2833 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 2834 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH
2835
2836\f
2837Local Variables:
2838version-control: never
2839End:
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