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* configure.in: Add support for x86_64 and x86_64-*-linux-gnu*
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
c0d8940f
JH		 1Sat Dec 30 19:03:15 MET 2000 Jan hubicka <jh@suse.cz>
2
3 * i386.h (i386_optab): Add "rex*" instructions;
4 add swapgs; disable jmp/call far direct instructions for
5 64bit mode; add syscall and sysret; disable registers for 0xc6
6 template. Add 'q' suffixes to extendable instructions, disable
7 obsoletted instructions, add new sign/zero extension ones.
8 (i386_regtab): Add extended registers.
9 (*Suf): Add No_qSuf.
10 (q_Suf, wlq_Suf, bwlq_Suf): New.
11
3e73aa7c
JH		 12Wed Dec 20 14:22:03 MET 2000 Jan Hubicka <jh@suse.cz>
13
14 * i386.h (i386_optab): Replace "Imm" with "EncImm".
15 (i386_regtab): Add flags field.
16
bf40d919
NC		 172000-12-12 Nick Clifton <nickc@redhat.com>
18
19 * mips.h: Fix formatting.
20
4372b673
NC		 212000-12-01 Chris Demetriou <cgd@sibyte.com>
22
23 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
24 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
25 OP_*_SYSCALL definitions.
26 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
27 19 bit wait codes.
28 (MIPS operand specifier comments): Remove 'm', add 'U' and
29 'J', and update the meaning of 'B' so that it's more general.
30
e7af610e
NC		 31 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
32 INSN_ISA5): Renumber, redefine to mean the ISA at which the
33 instruction was added.
34 (INSN_ISA32): New constant.
35 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
36 Renumber to avoid new and/or renumbered INSN_* constants.
37 (INSN_MIPS32): Delete.
38 (ISA_UNKNOWN): New constant to indicate unknown ISA.
39 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
40 ISA_MIPS32): New constants, defined to be the mask of INSN_*
41 constants available at that ISA level.
42 (CPU_UNKNOWN): New constant to indicate unknown CPU.
43 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
44 define it with a unique value.
45 (OPCODE_IS_MEMBER): Update for new ISA membership-related
46 constant meanings.
47
84ea6cf2
NC		 48 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
49 definitions.
50
c6c98b38
NC		 51 * mips.h (CPU_SB1): New constant.
52
19f7b010
JJ		 532000-10-20 Jakub Jelinek <jakub@redhat.com>
54
55 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
56 Note that '3' is used for siam operand.
57
139368c9
JW		 582000-09-22 Jim Wilson <wilson@cygnus.com>
59
60 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
61
156c2f8b
NC		 622000-09-13 Anders Norlander <anorland@acc.umu.se>
63
64 * mips.h: Use defines instead of hard-coded processor numbers.
65 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
66 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
67 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
68 CPU_4KC, CPU_4KM, CPU_4KP): Define..
69 (OPCODE_IS_MEMBER): Use new defines.
70 (OP_MASK_SEL, OP_SH_SEL): Define.
71 (OP_MASK_CODE20, OP_SH_CODE20): Define.
72 Add 'P' to used characters.
73 Use 'H' for coprocessor select field.
74 Use 'm' for 20 bit breakpoint code.
75 Document new arg characters and add to used characters.
76 (INSN_MIPS32): New define for MIPS32 extensions.
77 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
78
3c5ce02e
AM		 792000-09-05 Alan Modra <alan@linuxcare.com.au>
80
81 * hppa.h: Mention cz completer.
82
50b81f19
JW		 832000-08-16 Jim Wilson <wilson@cygnus.com>
84
85 * ia64.h (IA64_OPCODE_POSTINC): New.
86
fc29466d
L		 872000-08-15 H.J. Lu <hjl@gnu.org>
88
89 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
90 IgnoreSize change.
91
45ee1401
DC		 922000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
93
94 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
95 Move related opcodes closer to each other.
96 Minor changes in comments, list undefined opcodes.
97
9d551405
DB		 982000-07-26 Dave Brolley <brolley@redhat.com>
99
100 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
101
c8488617
HPN		 1022000-07-20 Hans-Peter Nilsson <hp@axis.com>
103
104 cris.h: New file.
105
65aa24b6
NC		 1062000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
107
108 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
109 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
110 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
111 (AVR_ISA_M83): Define for ATmega83, ATmega85.
112 (espm): Remove, because ESPM removed in databook update.
113 (eicall, eijmp): Move to the end of opcode table.
114
60bcf0fa
NC		 1152000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
116
117 * m68hc11.h: New file for support of Motorola 68hc11.
118
60a2978a
DC		 119Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
120
121 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
122
68ab2dd9
DC		 123Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
124
125 * avr.h: New file with AVR opcodes.
126
f0662e27
DL		 127Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
128
129 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
130
b722f2be
AM		 1312000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
132
133 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
134
f9e0cf0b
AM		 1352000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
136
137 * i386.h: Use sl_FP, not sl_Suf for fild.
138
f660ee8b
FCE		 1392000-05-16 Frank Ch. Eigler <fche@redhat.com>
140
141 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
142 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
143 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
144 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
145
558b0a60
AM		 1462000-05-13 Alan Modra <alan@linuxcare.com.au>,
147
148 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
149
e413e4e9
AM		 1502000-05-13 Alan Modra <alan@linuxcare.com.au>,
151 Alexander Sokolov <robocop@netlink.ru>
152
153 * i386.h (i386_optab): Add cpu_flags for all instructions.
154
1552000-05-13 Alan Modra <alan@linuxcare.com.au>
156
157 From Gavin Romig-Koch <gavin@cygnus.com>
158 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
159
5c84d377
TW		 1602000-05-04 Timothy Wall <twall@cygnus.com>
161
162 * tic54x.h: New.
163
966f959b
C		 1642000-05-03 J.T. Conklin <jtc@redback.com>
165
166 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
167 (PPC_OPERAND_VR): New operand flag for vector registers.
168
c5d05dbb
JL		 1692000-05-01 Kazu Hirata <kazu@hxi.com>
170
171 * h8300.h (EOP): Add missing initializer.
172
a7fba0e0
JL		 173Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
174
175 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
176 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
177 New operand types l,y,&,fe,fE,fx added to support above forms.
178 (pa_opcodes): Replaced usage of 'x' as source/target for
179 floating point double-word loads/stores with 'fx'.
180
800eeca4
JW		 181Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
182 David Mosberger <davidm@hpl.hp.com>
183 Timothy Wall <twall@cygnus.com>
184 Jim Wilson <wilson@cygnus.com>
185
186 * ia64.h: New file.
187
ba23e138
NC		 1882000-03-27 Nick Clifton <nickc@cygnus.com>
189
190 * d30v.h (SHORT_A1): Fix value.
191 (SHORT_AR): Renumber so that it is at the end of the list of short
192 instructions, not the end of the list of long instructions.
193
d0b47220
AM		 1942000-03-26 Alan Modra <alan@linuxcare.com>
195
196 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
197 problem isn't really specific to Unixware.
198 (OLDGCC_COMPAT): Define.
199 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
200 destination %st(0).
201 Fix lots of comments.
202
866afedc
NC		 2032000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
204
205 * d30v.h:
206 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
207 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
208 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
209 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
210 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
211 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
212 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
213
cc5ca5ce
AM		 2142000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
215
216 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
217 fistpd without suffix.
218
68e324a2
NC		 2192000-02-24 Nick Clifton <nickc@cygnus.com>
220
221 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
222 'signed_overflow_ok_p'.
223 Delete prototypes for cgen_set_flags() and cgen_get_flags().
224
60f036a2
AH		 2252000-02-24 Andrew Haley <aph@cygnus.com>
226
227 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
228 (CGEN_CPU_TABLE): flags: new field.
229 Add prototypes for new functions.
230
9b9b5cd4
AM		 2312000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
232
233 * i386.h: Add some more UNIXWARE_COMPAT comments.
234
5b93d8bb
AM		 2352000-02-23 Linas Vepstas <linas@linas.org>
236
237 * i370.h: New file.
238
87f398dd
AH		 2392000-02-22 Andrew Haley <aph@cygnus.com>
240
241 * mips.h: (OPCODE_IS_MEMBER): Add comment.
242
367c01af
AH		 2431999-12-30 Andrew Haley <aph@cygnus.com>
244
9a1e79ca
AH		 245 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
246 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
247 insns.
367c01af 248
add0c677
AM		 2492000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
250
251 * i386.h: Qualify intel mode far call and jmp with x_Suf.
252
3138f287
AM		 2531999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
254
255 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
256 indirect jumps and calls. Add FF/3 call for intel mode.
257
ccecd07b
JL		 258Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
259
260 * mn10300.h: Add new operand types. Add new instruction formats.
261
b37e19e9
JL		 262Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
263
264 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
265 instruction.
266
5fce5ddf
GRK		 2671999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
268
269 * mips.h (INSN_ISA5): New.
270
2bd7f1f3
GRK		 2711999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
272
273 * mips.h (OPCODE_IS_MEMBER): New.
274
4df2b5c5
NC		 2751999-10-29 Nick Clifton <nickc@cygnus.com>
276
277 * d30v.h (SHORT_AR): Define.
278
446a06c9
MM		 2791999-10-18 Michael Meissner <meissner@cygnus.com>
280
281 * alpha.h (alpha_num_opcodes): Convert to unsigned.
282 (alpha_num_operands): Ditto.
283
eca04c6a
JL		 284Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
285
286 * hppa.h (pa_opcodes): Add load and store cache control to
287 instructions. Add ordered access load and store.
288
289 * hppa.h (pa_opcode): Add new entries for addb and addib.
290
291 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
292
293 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
294
c43185de
DN		 295Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
296
297 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
298
ec3533da
JL		 299Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
300
390f858d
JL		 301 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
302 and "be" using completer prefixes.
303
8c47ebd9
JL		 304 * hppa.h (pa_opcodes): Add initializers to silence compiler.
305
ec3533da
JL		 306 * hppa.h: Update comments about character usage.
307
18369bea
JL		 308Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
309
310 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
311 up the new fstw & bve instructions.
312
c36efdd2
JL		 313Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
314
d3ffb032
JL		 315 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
316 instructions.
317
c49ec3da
JL		 318 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
319
5d2e7ecc
JL		 320 * hppa.h (pa_opcodes): Add long offset double word load/store
321 instructions.
322
6397d1a2
JL		 323 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
324 stores.
325
142f0fe0
JL		 326 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
327
f5a68b45
JL		 328 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
329
8235801e
JL		 330 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
331
35184366
JL		 332 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
333
f0bfde5e
JL		 334 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
335
27bbbb58
JL		 336 * hppa.h (pa_opcodes): Add support for "b,l".
337
c36efdd2
JL		 338 * hppa.h (pa_opcodes): Add support for "b,gate".
339
f2727d04
JL		 340Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
341
9392fb11
JL		 342 * hppa.h (pa_opcodes): Use 'fX' for first register operand
343 in xmpyu.
344
e0c52e99
JL		 345 * hppa.h (pa_opcodes): Fix mask for probe and probei.
346
f2727d04
JL		 347 * hppa.h (pa_opcodes): Fix mask for depwi.
348
52d836e2
JL		 349Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
350
351 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
352 an explicit output argument.
353
90765e3a
JL		 354Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
355
356 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
357 Add a few PA2.0 loads and store variants.
358
8340b17f
ILT		 3591999-09-04 Steve Chamberlain <sac@pobox.com>
360
361 * pj.h: New file.
362
5f47d35b
AM		 3631999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
364
365 * i386.h (i386_regtab): Move %st to top of table, and split off
366 other fp reg entries.
367 (i386_float_regtab): To here.
368
1c143202
JL		 369Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
370
7d8fdb64
JL		 371 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
372 by 'f'.
373
90927b9c
JL		 374 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
375 Add supporting args.
376
1d16bf9c
JL		 377 * hppa.h: Document new completers and args.
378 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
379 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
380 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
381 pmenb and pmdis.
382
96226a68
JL		 383 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
384 hshr, hsub, mixh, mixw, permh.
385
5d4ba527
JL		 386 * hppa.h (pa_opcodes): Change completers in instructions to
387 use 'c' prefix.
388
e9fc28c6
JL		 389 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
390 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
391
1c143202
JL		 392 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
393 fnegabs to use 'I' instead of 'F'.
394
9e525108
AM		 3951999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
396
397 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
398 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
399 Alphabetically sort PIII insns.
400
e8da1bf1
DE		 401Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
402
403 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
404
7d627258
JL		 405Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
406
5696871a
JL		 407 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
408 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
409
7d627258
JL		 410 * hppa.h: Document 64 bit condition completers.
411
c5e52916
JL		 412Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
413
414 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
415
eecb386c
AM		 4161999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
417
418 * i386.h (i386_optab): Add DefaultSize modifier to all insns
419 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
420 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
421
88a380f3
JL		 422Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
423 Jeff Law <law@cygnus.com>
424
425 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
426
427 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca
JL		 428
429 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
430 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
431
145cf1f0
AM		 4321999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
433
434 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
435
73826640
JL		 436Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
437
438 * hppa.h (struct pa_opcode): Add new field "flags".
439 (FLAGS_STRICT): Define.
440
b65db252
JL		 441Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
442 Jeff Law <law@cygnus.com>
443
f7fc668b
JL		 444 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
445
446 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 447
10084519
AM		 4481999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
449
450 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
451 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
452 flag to fcomi and friends.
453
cd8a80ba
JL		 454Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
455
456 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
457 integer logical instructions.
458
1fca749b
ILT		 4591999-05-28 Linus Nordberg <linus.nordberg@canit.se>
460
461 * m68k.h: Document new formats `E', `G', `H' and new places `N',
462 `n', `o'.
463
464 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
465 and new places `m', `M', `h'.
466
aa008907
JL		 467Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
468
469 * hppa.h (pa_opcodes): Add several processor specific system
470 instructions.
471
e26b85f0
JL		 472Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
473
474 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
475 "addb", and "addib" to be used by the disassembler.
476
c608c12e
AM		 4771999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
478
479 * i386.h (ReverseModrm): Remove all occurences.
480 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
481 movmskps, pextrw, pmovmskb, maskmovq.
482 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
483 ignore the data size prefix.
484
485 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
486 Mostly stolen from Doug Ledford <dledford@redhat.com>
487
45c18104
RH		 488Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
489
490 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
491
252b5132
RH		 4921999-04-14 Doug Evans <devans@casey.cygnus.com>
493
494 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
495 (CGEN_ATTR_TYPE): Update.
496 (CGEN_ATTR_MASK): Number booleans starting at 0.
497 (CGEN_ATTR_VALUE): Update.
498 (CGEN_INSN_ATTR): Update.
499
500Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
501
502 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
503 instructions.
504
505Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
506
507 * hppa.h (bb, bvb): Tweak opcode/mask.
508
509
5101999-03-22 Doug Evans <devans@casey.cygnus.com>
511
512 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
513 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
514 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
515 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
516 Delete member max_insn_size.
517 (enum cgen_cpu_open_arg): New enum.
518 (cpu_open): Update prototype.
519 (cpu_open_1): Declare.
520 (cgen_set_cpu): Delete.
521
5221999-03-11 Doug Evans <devans@casey.cygnus.com>
523
524 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
525 (CGEN_OPERAND_NIL): New macro.
526 (CGEN_OPERAND): New member `type'.
527 (@arch@_cgen_operand_table): Delete decl.
528 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
529 (CGEN_OPERAND_TABLE): New struct.
530 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
531 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
532 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
533 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
534 {get,set}_{int,vma}_operand.
535 (@arch@_cgen_cpu_open): New arg `isa'.
536 (cgen_set_cpu): Ditto.
537
538Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
539
540 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
541
5421999-02-25 Doug Evans <devans@casey.cygnus.com>
543
544 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
545 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
546 enum cgen_hw_type.
547 (CGEN_HW_TABLE): New struct.
548 (hw_table): Delete declaration.
549 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
550 to table entry to enum.
551 (CGEN_OPINST): Ditto.
552 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
553
554Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
555
556 * alpha.h (AXP_OPCODE_EV6): New.
557 (AXP_OPCODE_NOPAL): Include it.
558
5591999-02-09 Doug Evans <devans@casey.cygnus.com>
560
561 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
562 All uses updated. New members int_insn_p, max_insn_size,
563 parse_operand,insert_operand,extract_operand,print_operand,
564 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
565 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
566 extract_handlers,print_handlers.
567 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
568 (CGEN_ATTR_BOOL_OFFSET): New macro.
569 (CGEN_ATTR_MASK): Subtract it to compute bit number.
570 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
571 (cgen_opcode_handler): Renamed from cgen_base.
572 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
573 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
574 all uses updated.
575 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
576 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
577 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
578 (CGEN_OPCODE,CGEN_IBASE): New types.
579 (CGEN_INSN): Rewrite.
580 (CGEN_{ASM,DIS}_HASH*): Delete.
581 (init_opcode_table,init_ibld_table): Declare.
582 (CGEN_INSN_ATTR): New type.
583
584Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
585
586 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
587 (x_FP, d_FP, dls_FP, sldx_FP): Define.
588 Change *Suf definitions to include x and d suffixes.
589 (movsx): Use w_Suf and b_Suf.
590 (movzx): Likewise.
591 (movs): Use bwld_Suf.
592 (fld): Change ordering. Use sld_FP.
593 (fild): Add Intel Syntax equivalent of fildq.
594 (fst): Use sld_FP.
595 (fist): Use sld_FP.
596 (fstp): Use sld_FP. Add x_FP version.
597 (fistp): LLongMem version for Intel Syntax.
598 (fcom, fcomp): Use sld_FP.
599 (fadd, fiadd, fsub): Use sld_FP.
600 (fsubr): Use sld_FP.
601 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
602
6031999-01-27 Doug Evans <devans@casey.cygnus.com>
604
605 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
606 CGEN_MODE_UINT.
607
608Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
609
610 * hppa.h (bv): Fix mask.
611
6121999-01-05 Doug Evans <devans@casey.cygnus.com>
613
614 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
615 (CGEN_ATTR): Use it.
616 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
617 (CGEN_ATTR_TABLE): New member dfault.
618
6191998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
620
621 * mips.h (MIPS16_INSN_BRANCH): New.
622
623Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
624
625 The following is part of a change made by Edith Epstein
626 <eepstein@sophia.cygnus.com> as part of a project to merge in
627 changes by HP; HP did not create ChangeLog entries.
628
629 * hppa.h (completer_chars): list of chars to not put a space
630 after.
631
632Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
633
634 * i386.h (i386_optab): Permit w suffix on processor control and
635 status word instructions.
636
6371998-11-30 Doug Evans <devans@casey.cygnus.com>
638
639 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
640 (struct cgen_keyword_entry): Ditto.
641 (struct cgen_operand): Ditto.
642 (CGEN_IFLD): New typedef, with associated access macros.
643 (CGEN_IFMT): New typedef, with associated access macros.
644 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
645 (CGEN_IVALUE): New typedef.
646 (struct cgen_insn): Delete const on syntax,attrs members.
647 `format' now points to format data. Type of `value' is now
648 CGEN_IVALUE.
649 (struct cgen_opcode_table): New member ifld_table.
650
6511998-11-18 Doug Evans <devans@casey.cygnus.com>
652
653 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
654 (CGEN_OPERAND_INSTANCE): New member `attrs'.
655 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
656 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
657 (cgen_opcode_table): Update type of dis_hash fn.
658 (extract_operand): Update type of `insn_value' arg.
659
660Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
661
662 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
663
664Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
665
666 * mips.h (INSN_MULT): Added.
667
668Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
669
670 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
671
672Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
673
674 * cgen.h (CGEN_INSN_INT): New typedef.
675 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
676 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
677 (CGEN_INSN_BYTES_PTR): New typedef.
678 (CGEN_EXTRACT_INFO): New typedef.
679 (cgen_insert_fn,cgen_extract_fn): Update.
680 (cgen_opcode_table): New member `insn_endian'.
681 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
682 (insert_operand,extract_operand): Update.
683 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
684
685Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
686
687 * cgen.h (CGEN_ATTR_BOOLS): New macro.
688 (struct CGEN_HW_ENTRY): New member `attrs'.
689 (CGEN_HW_ATTR): New macro.
690 (struct CGEN_OPERAND_INSTANCE): New member `name'.
691 (CGEN_INSN_INVALID_P): New macro.
692
693Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
694
695 * hppa.h: Add "fid".
696
697Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
698
699 From Robert Andrew Dale <rob@nb.net>
700 * i386.h (i386_optab): Add AMD 3DNow! instructions.
701 (AMD_3DNOW_OPCODE): Define.
702
703Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
704
705 * d30v.h (EITHER_BUT_PREFER_MU): Define.
706
707Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
708
709 * cgen.h (cgen_insn): #if 0 out element `cdx'.
710
711Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
712
713 Move all global state data into opcode table struct, and treat
714 opcode table as something that is "opened/closed".
715 * cgen.h (CGEN_OPCODE_DESC): New type.
716 (all fns): New first arg of opcode table descriptor.
717 (cgen_set_parse_operand_fn): Add prototype.
718 (cgen_current_machine,cgen_current_endian): Delete.
719 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
720 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
721 dis_hash_table,dis_hash_table_entries.
722 (opcode_open,opcode_close): Add prototypes.
723
724 * cgen.h (cgen_insn): New element `cdx'.
725
726Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
727
728 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
729
730Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
731
732 * mn10300.h: Add "no_match_operands" field for instructions.
733 (MN10300_MAX_OPERANDS): Define.
734
735Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
736
737 * cgen.h (cgen_macro_insn_count): Declare.
738
739Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
740
741 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
742 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
743 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
744 set_{int,vma}_operand.
745
746Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
747
748 * mn10300.h: Add "machine" field for instructions.
749 (MN103, AM30): Define machine types.
750
751Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
752
753 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
754
7551998-06-18 Ulrich Drepper <drepper@cygnus.com>
756
757 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
758
759Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
760
761 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
762 and ud2b.
763 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
764 those that happen to be implemented on pentiums.
765
766Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
767
768 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
769 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
770 with Size16|IgnoreSize or Size32|IgnoreSize.
771
772Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
773
774 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
775 (REPE): Rename to REPE_PREFIX_OPCODE.
776 (i386_regtab_end): Remove.
777 (i386_prefixtab, i386_prefixtab_end): Remove.
778 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
779 of md_begin.
780 (MAX_OPCODE_SIZE): Define.
781 (i386_optab_end): Remove.
782 (sl_Suf): Define.
783 (sl_FP): Use sl_Suf.
784
785 * i386.h (i386_optab): Allow 16 bit displacement for `mov
786 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
787 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
788 data32, dword, and adword prefixes.
789 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
790 regs.
791
792Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
793
794 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
795
796 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
797 register operands, because this is a common idiom. Flag them with
798 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
799 fdivrp because gcc erroneously generates them. Also flag with a
800 warning.
801
802 * i386.h: Add suffix modifiers to most insns, and tighter operand
803 checks in some cases. Fix a number of UnixWare compatibility
804 issues with float insns. Merge some floating point opcodes, using
805 new FloatMF modifier.
806 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
807 consistency.
808
809 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
810 IgnoreDataSize where appropriate.
811
812Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
813
814 * i386.h: (one_byte_segment_defaults): Remove.
815 (two_byte_segment_defaults): Remove.
816 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
817
818Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
819
820 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
821 (cgen_hw_lookup_by_num): Declare.
822
823Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
824
825 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
826 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
827
828Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
829
830 * cgen.h (cgen_asm_init_parse): Delete.
831 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
832 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
833
834Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
835
836 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
837 (cgen_asm_finish_insn): Update prototype.
838 (cgen_insn): New members num, data.
839 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
840 dis_hash, dis_hash_table_size moved to ...
841 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
842 All uses updated. New members asm_hash_p, dis_hash_p.
843 (CGEN_MINSN_EXPANSION): New struct.
844 (cgen_expand_macro_insn): Declare.
845 (cgen_macro_insn_count): Declare.
846 (get_insn_operands): Update prototype.
847 (lookup_get_insn_operands): Declare.
848
849Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
850
851 * i386.h (i386_optab): Change iclrKludge and imulKludge to
852 regKludge. Add operands types for string instructions.
853
854Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
855
856 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
857 table.
858
859Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
860
861 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
862 for `gettext'.
863
864Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
865
866 * i386.h: Remove NoModrm flag from all insns: it's never checked.
867 Add IsString flag to string instructions.
868 (IS_STRING): Don't define.
869 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
870 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
871 (SS_PREFIX_OPCODE): Define.
872
873Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
874
875 * i386.h: Revert March 24 patch; no more LinearAddress.
876
877Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
878
879 * i386.h (i386_optab): Remove fwait (9b) from all floating point
880 instructions, and instead add FWait opcode modifier. Add short
881 form of fldenv and fstenv.
882 (FWAIT_OPCODE): Define.
883
884 * i386.h (i386_optab): Change second operand constraint of `mov
885 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
886 allow legal instructions such as `movl %gs,%esi'
887
888Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
889
890 * h8300.h: Various changes to fully bracket initializers.
891
892Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
893
894 * i386.h: Set LinearAddress for lidt and lgdt.
895
896Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
897
898 * cgen.h (CGEN_BOOL_ATTR): New macro.
899
900Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
901
902 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
903
904Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
905
906 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
907 (cgen_insn): Record syntax and format entries here, rather than
908 separately.
909
910Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
911
912 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
913
914Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
915
916 * cgen.h (cgen_insert_fn): Change type of result to const char *.
917 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
918 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
919
920Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
921
922 * cgen.h (lookup_insn): New argument alias_p.
923
924Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
925
926Fix rac to accept only a0:
927 * d10v.h (OPERAND_ACC): Split into:
928 (OPERAND_ACC0, OPERAND_ACC1) .
929 (OPERAND_GPR): Define.
930
931Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
932
933 * cgen.h (CGEN_FIELDS): Define here.
934 (CGEN_HW_ENTRY): New member `type'.
935 (hw_list): Delete decl.
936 (enum cgen_mode): Declare.
937 (CGEN_OPERAND): New member `hw'.
938 (enum cgen_operand_instance_type): Declare.
939 (CGEN_OPERAND_INSTANCE): New type.
940 (CGEN_INSN): New member `operands'.
941 (CGEN_OPCODE_DATA): Make hw_list const.
942 (get_insn_operands,lookup_insn): Add prototypes for.
943
944Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
945
946 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
947 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
948 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
949 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
950
951Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
952
953 * cgen.h: Correct typo in comment end marker.
954
955Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
956
957 * tic30.h: New file.
958
959Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
960
961 * cgen.h: Add prototypes for cgen_save_fixups(),
962 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
963 of cgen_asm_finish_insn() to return a char *.
964
965Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
966
967 * cgen.h: Formatting changes to improve readability.
968
969Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
970
971 * cgen.h (*): Clean up pass over `struct foo' usage.
972 (CGEN_ATTR): Make unsigned char.
973 (CGEN_ATTR_TYPE): Update.
974 (CGEN_ATTR_{ENTRY,TABLE}): New types.
975 (cgen_base): Move member `attrs' to cgen_insn.
976 (CGEN_KEYWORD): New member `null_entry'.
977 (CGEN_{SYNTAX,FORMAT}): New types.
978 (cgen_insn): Format and syntax separated from each other.
979
980Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
981
982 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
983 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
984 flags_{used,set} long.
985 (d30v_operand): Make flags field long.
986
987Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
988
989 * m68k.h: Fix comment describing operand types.
990
991Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
992
993 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
994 everything else after down.
995
996Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
997
998 * d10v.h (OPERAND_FLAG): Split into:
999 (OPERAND_FFLAG, OPERAND_CFLAG) .
1000
1001Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1002
1003 * mips.h (struct mips_opcode): Changed comments to reflect new
1004 field usage.
1005
1006Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1007
1008 * mips.h: Added to comments a quick-ref list of all assigned
1009 operand type characters.
1010 (OP_{MASK,SH}_PERFREG): New macros.
1011
1012Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1013
1014 * sparc.h: Add '_' and '/' for v9a asr's.
1015 Patch from David Miller <davem@vger.rutgers.edu>
1016
1017Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1018
1019 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1020 area are not available in the base model (H8/300).
1021
1022Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1023
1024 * m68k.h: Remove documentation of ` operand specifier.
1025
1026Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1027
1028 * m68k.h: Document q and v operand specifiers.
1029
1030Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1031
1032 * v850.h (struct v850_opcode): Add processors field.
1033 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1034 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1035 (PROCESSOR_V850EA): New bit constants.
1036
1037Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1038
1039 Merge changes from Martin Hunt:
1040
1041 * d30v.h: Allow up to 64 control registers. Add
1042 SHORT_A5S format.
1043
1044 * d30v.h (LONG_Db): New form for delayed branches.
1045
1046 * d30v.h: (LONG_Db): New form for repeati.
1047
1048 * d30v.h (SHORT_D2B): New form.
1049
1050 * d30v.h (SHORT_A2): New form.
1051
1052 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1053 registers are used. Needed for VLIW optimization.
1054
1055Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1056
1057 * cgen.h: Move assembler interface section
1058 up so cgen_parse_operand_result is defined for cgen_parse_address.
1059 (cgen_parse_address): Update prototype.
1060
1061Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1062
1063 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1064
1065Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1066
1067 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1068 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1069 <paubert@iram.es>.
1070
1071 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1072 <paubert@iram.es>.
1073
1074 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1075 <paubert@iram.es>.
1076
1077 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1078 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1079
1080Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1081
1082 * v850.h (V850_NOT_R0): New flag.
1083
1084Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1085
1086 * v850.h (struct v850_opcode): Remove flags field.
1087
1088Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1089
1090 * v850.h (struct v850_opcode): Add flags field.
1091 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1092 fields.
1093 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1094 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1095
1096Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1097
1098 * arc.h: New file.
1099
1100Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1101
1102 * sparc.h (sparc_opcodes): Declare as const.
1103
1104Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1105
1106 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1107 uses single or double precision floating point resources.
1108 (INSN_NO_ISA, INSN_ISA1): Define.
1109 (cpu specific INSN macros): Tweak into bitmasks outside the range
1110 of INSN_ISA field.
1111
1112Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1113
1114 * i386.h: Fix pand opcode.
1115
1116Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1117
1118 * mips.h: Widen INSN_ISA and move it to a more convenient
1119 bit position. Add INSN_3900.
1120
1121Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1122
1123 * mips.h (struct mips_opcode): added new field membership.
1124
1125Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1126
1127 * i386.h (movd): only Reg32 is allowed.
1128
1129 * i386.h: add fcomp and ud2. From Wayne Scott
1130 <wscott@ichips.intel.com>.
1131
1132Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1133
1134 * i386.h: Add MMX instructions.
1135
1136Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1137
1138 * i386.h: Remove W modifier from conditional move instructions.
1139
1140Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1141
1142 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1143 with no arguments to match that generated by the UnixWare
1144 assembler.
1145
1146Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1147
1148 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1149 (cgen_parse_operand_fn): Declare.
1150 (cgen_init_parse_operand): Declare.
1151 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1152 new argument `want'.
1153 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1154 (enum cgen_parse_operand_type): New enum.
1155
1156Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1157
1158 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1159
1160Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1161
1162 * cgen.h: New file.
1163
1164Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1165
1166 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1167 fdivrp.
1168
1169Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1170
1171 * v850.h (extract): Make unsigned.
1172
1173Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1174
1175 * i386.h: Add iclr.
1176
1177Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1178
1179 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1180 take a direction bit.
1181
1182Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1183
1184 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1185
1186Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1187
1188 * sparc.h: Include <ansidecl.h>. Update function declarations to
1189 use prototypes, and to use const when appropriate.
1190
1191Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1192
1193 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1194
1195Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1196
1197 * d10v.h: Change pre_defined_registers to
1198 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1199
1200Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1201
1202 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1203 Change mips_opcodes from const array to a pointer,
1204 and change bfd_mips_num_opcodes from const int to int,
1205 so that we can increase the size of the mips opcodes table
1206 dynamically.
1207
1208Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1209
1210 * d30v.h (FLAG_X): Remove unused flag.
1211
1212Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1213
1214 * d30v.h: New file.
1215
1216Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1217
1218 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1219 (PDS_VALUE): Macro to access value field of predefined symbols.
1220 (tic80_next_predefined_symbol): Add prototype.
1221
1222Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1223
1224 * tic80.h (tic80_symbol_to_value): Change prototype to match
1225 change in function, added class parameter.
1226
1227Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1228
1229 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1230 endmask fields, which are somewhat weird in that 0 and 32 are
1231 treated exactly the same.
1232
1233Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1234
1235 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1236 rather than a constant that is 2**X. Reorder them to put bits for
1237 operands that have symbolic names in the upper bits, so they can
1238 be packed into an int where the lower bits contain the value that
1239 corresponds to that symbolic name.
1240 (predefined_symbo): Add struct.
1241 (tic80_predefined_symbols): Declare array of translations.
1242 (tic80_num_predefined_symbols): Declare size of that array.
1243 (tic80_value_to_symbol): Declare function.
1244 (tic80_symbol_to_value): Declare function.
1245
1246Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1247
1248 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1249
1250Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1251
1252 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1253 be the destination register.
1254
1255Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1256
1257 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1258 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1259 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1260 that the opcode can have two vector instructions in a single
1261 32 bit word and we have to encode/decode both.
1262
1263Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1264
1265 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1266 TIC80_OPERAND_RELATIVE for PC relative.
1267 (TIC80_OPERAND_BASEREL): New flag bit for register
1268 base relative.
1269
1270Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1271
1272 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1273
1274Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1275
1276 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1277 ":s" modifier for scaling.
1278
1279Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1280
1281 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1282 (TIC80_OPERAND_M_LI): Ditto
1283
1284Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1285
1286 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1287 (TIC80_OPERAND_CC): New define for condition code operand.
1288 (TIC80_OPERAND_CR): New define for control register operand.
1289
1290Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1291
1292 * tic80.h (struct tic80_opcode): Name changed.
1293 (struct tic80_opcode): Remove format field.
1294 (struct tic80_operand): Add insertion and extraction functions.
1295 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1296 correct ones.
1297 (FMT_*): Ditto.
1298
1299Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1300
1301 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1302 type IV instruction offsets.
1303
1304Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1305
1306 * tic80.h: New file.
1307
1308Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1309
1310 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1311
1312Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1313
1314 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1315 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1316 * v850.h: Fix comment, v850_operand not powerpc_operand.
1317
1318Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1319
1320 * mn10200.h: Flesh out structures and definitions needed by
1321 the mn10200 assembler & disassembler.
1322
1323Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1324
1325 * mips.h: Add mips16 definitions.
1326
1327Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1328
1329 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1330
1331Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1332
1333 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1334 (MN10300_OPERAND_MEMADDR): Define.
1335
1336Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1337
1338 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1339
1340Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1341
1342 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1343
1344Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1345
1346 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1347
1348Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1349
1350 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1351
1352Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1353
1354 * alpha.h: Don't include "bfd.h"; private relocation types are now
1355 negative to minimize problems with shared libraries. Organize
1356 instruction subsets by AMASK extensions and PALcode
1357 implementation.
1358 (struct alpha_operand): Move flags slot for better packing.
1359
1360Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1361
1362 * v850.h (V850_OPERAND_RELAX): New operand flag.
1363
1364Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1365
1366 * mn10300.h (FMT_*): Move operand format definitions
1367 here.
1368
1369Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1370
1371 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1372
1373Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1374
1375 * mn10300.h (mn10300_opcode): Add "format" field.
1376 (MN10300_OPERAND_*): Define.
1377
1378Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1379
1380 * mn10x00.h: Delete.
1381 * mn10200.h, mn10300.h: New files.
1382
1383Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1384
1385 * mn10x00.h: New file.
1386
1387Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1388
1389 * v850.h: Add new flag to indicate this instruction uses a PC
1390 displacement.
1391
1392Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1393
1394 * h8300.h (stmac): Add missing instruction.
1395
1396Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1397
1398 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1399 field.
1400
1401Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1402
1403 * v850.h (V850_OPERAND_EP): Define.
1404
1405 * v850.h (v850_opcode): Add size field.
1406
1407Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1408
1409 * v850.h (v850_operands): Add insert and extract fields, pointers
1410 to functions used to handle unusual operand encoding.
1411 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1412 V850_OPERAND_SIGNED): Defined.
1413
1414Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1415
1416 * v850.h (v850_operands): Add flags field.
1417 (OPERAND_REG, OPERAND_NUM): Defined.
1418
1419Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1420
1421 * v850.h: New file.
1422
1423Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1424
1425 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1426 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1427 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1428 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1429 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1430 Defined.
1431
1432Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1433
1434 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1435 a 3 bit space id instead of a 2 bit space id.
1436
1437Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1438
1439 * d10v.h: Add some additional defines to support the
1440 assembler in determining which operations can be done in parallel.
1441
1442Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1443
1444 * h8300.h (SN): Define.
1445 (eepmov.b): Renamed from "eepmov"
1446 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1447 with them.
1448
1449Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1450
1451 * d10v.h (OPERAND_SHIFT): New operand flag.
1452
1453Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1454
1455 * d10v.h: Changes for divs, parallel-only instructions, and
1456 signed numbers.
1457
1458Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1459
1460 * d10v.h (pd_reg): Define. Putting the definition here allows
1461 the assembler and disassembler to share the same struct.
1462
1463Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1464
1465 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1466 Williams <steve@icarus.com>.
1467
1468Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1469
1470 * d10v.h: New file.
1471
1472Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1473
1474 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1475
1476Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1477
1478 * m68k.h (mcf5200): New macro.
1479 Document names of coldfire control registers.
1480
1481Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1482
1483 * h8300.h (SRC_IN_DST): Define.
1484
1485 * h8300.h (UNOP3): Mark the register operand in this insn
1486 as a source operand, not a destination operand.
1487 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1488 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1489 register operand with SRC_IN_DST.
1490
1491Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1492
1493 * alpha.h: New file.
1494
1495Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1496
1497 * rs6k.h: Remove obsolete file.
1498
1499Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1500
1501 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1502 fdivp, and fdivrp. Add ffreep.
1503
1504Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1505
1506 * h8300.h: Reorder various #defines for readability.
1507 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1508 (BITOP): Accept additional (unused) argument. All callers changed.
1509 (EBITOP): Likewise.
1510 (O_LAST): Bump.
1511 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1512
1513 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1514 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1515 (BITOP, EBITOP): Handle new H8/S addressing modes for
1516 bit insns.
1517 (UNOP3): Handle new shift/rotate insns on the H8/S.
1518 (insns using exr): New instructions.
1519 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1520
1521Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1522
1523 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1524 was incorrect.
1525
1526Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1527
1528 * h8300.h (START): Remove.
1529 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1530 and mov.l insns that can be relaxed.
1531
1532Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1533
1534 * i386.h: Remove Abs32 from lcall.
1535
1536Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1537
1538 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1539 (SLCPOP): New macro.
1540 Mark X,Y opcode letters as in use.
1541
1542Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1543
1544 * sparc.h (F_FLOAT, F_FBR): Define.
1545
1546Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1547
1548 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1549 from all insns.
1550 (ABS8SRC,ABS8DST): Add ABS8MEM.
1551 (add.l): Fix reg+reg variant.
1552 (eepmov.w): Renamed from eepmovw.
1553 (ldc,stc): Fix many cases.
1554
1555Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1556
1557 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1558
1559Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1560
1561 * sparc.h (O): Mark operand letter as in use.
1562
1563Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1564
1565 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1566 Mark operand letters uU as in use.
1567
1568Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1569
1570 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1571 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1572 (SPARC_OPCODE_SUPPORTED): New macro.
1573 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1574 (F_NOTV9): Delete.
1575
1576Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1577
1578 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1579 declaration consistent with return type in definition.
1580
1581Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1582
1583 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1584
1585Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1586
1587 * i386.h (i386_regtab): Add 80486 test registers.
1588
1589Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1590
1591 * i960.h (I_HX): Define.
1592 (i960_opcodes): Add HX instruction.
1593
1594Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1595
1596 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1597 and fclex.
1598
1599Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1600
1601 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1602 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1603 (bfd_* defines): Delete.
1604 (sparc_opcode_archs): Replaces architecture_pname.
1605 (sparc_opcode_lookup_arch): Declare.
1606 (NUMOPCODES): Delete.
1607
1608Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1609
1610 * sparc.h (enum sparc_architecture): Add v9a.
1611 (ARCHITECTURES_CONFLICT_P): Update.
1612
1613Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1614
1615 * i386.h: Added Pentium Pro instructions.
1616
1617Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1618
1619 * m68k.h: Document new 'W' operand place.
1620
1621Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1622
1623 * hppa.h: Add lci and syncdma instructions.
1624
1625Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1626
1627 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1628 instructions.
1629
1630Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1631
1632 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1633 assembler's -mcom and -many switches.
1634
1635Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1636
1637 * i386.h: Fix cmpxchg8b extension opcode description.
1638
1639Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1640
1641 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1642 and register cr4.
1643
1644Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1645
1646 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1647
1648Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1649
1650 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1651
1652Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1653
1654 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1655
1656Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1657
1658 * m68kmri.h: Remove.
1659
1660 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1661 declarations. Remove F_ALIAS and flag field of struct
1662 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1663 int. Make name and args fields of struct m68k_opcode const.
1664
1665Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1666
1667 * sparc.h (F_NOTV9): Define.
1668
1669Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1670
1671 * mips.h (INSN_4010): Define.
1672
1673Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1674
1675 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1676
1677 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1678 * m68k.h: Fix argument descriptions of coprocessor
1679 instructions to allow only alterable operands where appropriate.
1680 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1681 (m68k_opcode_aliases): Add more aliases.
1682
1683Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1684
1685 * m68k.h: Added explcitly short-sized conditional branches, and a
1686 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1687 svr4-based configurations.
1688
1689Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1690
1691 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1692 * i386.h: added missing Data16/Data32 flags to a few instructions.
1693
1694Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1695
1696 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1697 (OP_MASK_BCC, OP_SH_BCC): Define.
1698 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1699 (OP_MASK_CCC, OP_SH_CCC): Define.
1700 (INSN_READ_FPR_R): Define.
1701 (INSN_RFE): Delete.
1702
1703Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1704
1705 * m68k.h (enum m68k_architecture): Deleted.
1706 (struct m68k_opcode_alias): New type.
1707 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1708 matching constraints, values and flags. As a side effect of this,
1709 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1710 as I know were never used, now may need re-examining.
1711 (numopcodes): Now const.
1712 (m68k_opcode_aliases, numaliases): New variables.
1713 (endop): Deleted.
1714 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1715 m68k_opcode_aliases; update declaration of m68k_opcodes.
1716
1717Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1718
1719 * hppa.h (delay_type): Delete unused enumeration.
1720 (pa_opcode): Replace unused delayed field with an architecture
1721 field.
1722 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1723
1724Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1725
1726 * mips.h (INSN_ISA4): Define.
1727
1728Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1729
1730 * mips.h (M_DLA_AB, M_DLI): Define.
1731
1732Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1733
1734 * hppa.h (fstwx): Fix single-bit error.
1735
1736Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1737
1738 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1739
1740Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1741
1742 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1743 debug registers. From Charles Hannum (mycroft@netbsd.org).
1744
1745Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1746
1747 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1748 i386 support:
1749 * i386.h (MOV_AX_DISP32): New macro.
1750 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1751 of several call/return instructions.
1752 (ADDR_PREFIX_OPCODE): New macro.
1753
1754Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1755
1756 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1757
1758 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1759 it pointer to const char;
1760 (struct vot, field `name'): ditto.
1761
1762Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1763
1764 * vax.h: Supply and properly group all values in end sentinel.
1765
1766Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1767
1768 * mips.h (INSN_ISA, INSN_4650): Define.
1769
1770Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1771
1772 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1773 systems with a separate instruction and data cache, such as the
1774 29040, these instructions take an optional argument.
1775
1776Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1777
1778 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1779 INSN_TRAP.
1780
1781Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1782
1783 * mips.h (INSN_STORE_MEMORY): Define.
1784
1785Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1786
1787 * sparc.h: Document new operand type 'x'.
1788
1789Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1790
1791 * i960.h (I_CX2): New instruction category. It includes
1792 instructions available on Cx and Jx processors.
1793 (I_JX): New instruction category, for JX-only instructions.
1794 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1795 Jx-only instructions, in I_JX category.
1796
1797Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1798
1799 * ns32k.h (endop): Made pointer const too.
1800
1801Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1802
1803 * ns32k.h: Drop Q operand type as there is no correct use
1804 for it. Add I and Z operand types which allow better checking.
1805
1806Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1807
1808 * h8300.h (xor.l) :fix bit pattern.
1809 (L_2): New size of operand.
1810 (trapa): Use it.
1811
1812Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1813
1814 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1815
1816Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1817
1818 * sparc.h: Include v9 definitions.
1819
1820Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1821
1822 * m68k.h (m68060): Defined.
1823 (m68040up, mfloat, mmmu): Include it.
1824 (struct m68k_opcode): Widen `arch' field.
1825 (m68k_opcodes): Updated for M68060. Removed comments that were
1826 instructions commented out by "JF" years ago.
1827
1828Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1829
1830 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1831 add a one-bit `flags' field.
1832 (F_ALIAS): New macro.
1833
1834Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1835
1836 * h8300.h (dec, inc): Get encoding right.
1837
1838Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1839
1840 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1841 a flag instead.
1842 (PPC_OPERAND_SIGNED): Define.
1843 (PPC_OPERAND_SIGNOPT): Define.
1844
1845Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1846
1847 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1848 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1849
1850Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1851
1852 * i386.h: Reverse last change. It'll be handled in gas instead.
1853
1854Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1855
1856 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1857 slower on the 486 and used the implicit shift count despite the
1858 explicit operand. The one-operand form is still available to get
1859 the shorter form with the implicit shift count.
1860
1861Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1862
1863 * hppa.h: Fix typo in fstws arg string.
1864
1865Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1866
1867 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1868
1869Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1870
1871 * ppc.h (PPC_OPCODE_601): Define.
1872
1873Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1874
1875 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1876 (so we can determine valid completers for both addb and addb[tf].)
1877
1878 * hppa.h (xmpyu): No floating point format specifier for the
1879 xmpyu instruction.
1880
1881Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1882
1883 * ppc.h (PPC_OPERAND_NEXT): Define.
1884 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1885 (struct powerpc_macro): Define.
1886 (powerpc_macros, powerpc_num_macros): Declare.
1887
1888Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1889
1890 * ppc.h: New file. Header file for PowerPC opcode table.
1891
1892Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1893
1894 * hppa.h: More minor template fixes for sfu and copr (to allow
1895 for easier disassembly).
1896
1897 * hppa.h: Fix templates for all the sfu and copr instructions.
1898
1899Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1900
1901 * i386.h (push): Permit Imm16 operand too.
1902
1903Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1904
1905 * h8300.h (andc): Exists in base arch.
1906
1907Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1908
1909 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1910 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1911
1912Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1913
1914 * hppa.h: Add FP quadword store instructions.
1915
1916Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1917
1918 * mips.h: (M_J_A): Added.
1919 (M_LA): Removed.
1920
1921Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1922
1923 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1924 <mellon@pepper.ncd.com>.
1925
1926Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1927
1928 * hppa.h: Immediate field in probei instructions is unsigned,
1929 not low-sign extended.
1930
1931Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1932
1933 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1934
1935Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1936
1937 * i386.h: Add "fxch" without operand.
1938
1939Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1940
1941 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1942
1943Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1944
1945 * hppa.h: Add gfw and gfr to the opcode table.
1946
1947Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1948
1949 * m88k.h: extended to handle m88110.
1950
1951Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1952
1953 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1954 addresses.
1955
1956Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1957
1958 * i960.h (i960_opcodes): Properly bracket initializers.
1959
1960Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1961
1962 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1963
1964Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1965
1966 * m68k.h (two): Protect second argument with parentheses.
1967
1968Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1969
1970 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1971 Deleted old in/out instructions in "#if 0" section.
1972
1973Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1974
1975 * i386.h (i386_optab): Properly bracket initializers.
1976
1977Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1978
1979 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1980 Jeff Law, law@cs.utah.edu).
1981
1982Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1983
1984 * i386.h (lcall): Accept Imm32 operand also.
1985
1986Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1987
1988 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1989 (M_DABS): Added.
1990
1991Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1992
1993 * mips.h (INSN_*): Changed values. Removed unused definitions.
1994 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1995 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1996 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1997 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1998 (M_*): Added new values for r6000 and r4000 macros.
1999 (ANY_DELAY): Removed.
2000
2001Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2002
2003 * mips.h: Added M_LI_S and M_LI_SS.
2004
2005Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2006
2007 * h8300.h: Get some rare mov.bs correct.
2008
2009Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2010
2011 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2012 been included.
2013
2014Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2015
2016 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2017 jump instructions, for use in disassemblers.
2018
2019Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2020
2021 * m88k.h: Make bitfields just unsigned, not unsigned long or
2022 unsigned short.
2023
2024Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2025
2026 * hppa.h: New argument type 'y'. Use in various float instructions.
2027
2028Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2029
2030 * hppa.h (break): First immediate field is unsigned.
2031
2032 * hppa.h: Add rfir instruction.
2033
2034Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2035
2036 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2037
2038Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2039
2040 * mips.h: Reworked the hazard information somewhat, and fixed some
2041 bugs in the instruction hazard descriptions.
2042
2043Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2044
2045 * m88k.h: Corrected a couple of opcodes.
2046
2047Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2048
2049 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2050 new version includes instruction hazard information, but is
2051 otherwise reasonably similar.
2052
2053Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2054
2055 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2056
2057Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2058
2059 Patches from Jeff Law, law@cs.utah.edu:
2060 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2061 Make the tables be the same for the following instructions:
2062 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2063 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2064 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2065 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2066 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2067 "fcmp", and "ftest".
2068
2069 * hppa.h: Make new and old tables the same for "break", "mtctl",
2070 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2071 Fix typo in last patch. Collapse several #ifdefs into a
2072 single #ifdef.
2073
2074 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2075 of the comments up-to-date.
2076
2077 * hppa.h: Update "free list" of letters and update
2078 comments describing each letter's function.
2079
2080Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2081
2082 * h8300.h: checkpoint, includes H8/300-H opcodes.
2083
2084Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2085
2086 * Patches from Jeffrey Law <law@cs.utah.edu>.
2087 * hppa.h: Rework single precision FP
2088 instructions so that they correctly disassemble code
2089 PA1.1 code.
2090
2091Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2092
2093 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2094 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2095
2096Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2097
2098 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2099 gdb will define it for now.
2100
2101Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2102
2103 * sparc.h: Don't end enumerator list with comma.
2104
2105Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2106
2107 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2108 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2109 ("bc2t"): Correct typo.
2110 ("[ls]wc[023]"): Use T rather than t.
2111 ("c[0123]"): Define general coprocessor instructions.
2112
2113Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2114
2115 * m68k.h: Move split point for gcc compilation more towards
2116 middle.
2117
2118Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2119
2120 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2121 simply wrong, ics, rfi, & rfsvc were missing).
2122 Add "a" to opr_ext for "bb". Doc fix.
2123
2124Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2125
2126 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2127 * mips.h: Add casts, to suppress warnings about shifting too much.
2128 * m68k.h: Document the placement code '9'.
2129
2130Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2131
2132 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2133 allows callers to break up the large initialized struct full of
2134 opcodes into two half-sized ones. This permits GCC to compile
2135 this module, since it takes exponential space for initializers.
2136 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2137
2138Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2139
2140 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2141 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2142 initialized structs in it.
2143
2144Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2145
2146 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2147 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2148 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2149
2150Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2151
2152 * mips.h: document "i" and "j" operands correctly.
2153
2154Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2155
2156 * mips.h: Removed endianness dependency.
2157
2158Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2159
2160 * h8300.h: include info on number of cycles per instruction.
2161
2162Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2163
2164 * hppa.h: Move handy aliases to the front. Fix masks for extract
2165 and deposit instructions.
2166
2167Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2168
2169 * i386.h: accept shld and shrd both with and without the shift
2170 count argument, which is always %cl.
2171
2172Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2173
2174 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2175 (one_byte_segment_defaults, two_byte_segment_defaults,
2176 i386_prefixtab_end): Ditto.
2177
2178Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2179
2180 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2181 for operand 2; from John Carr, jfc@dsg.dec.com.
2182
2183Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2184
2185 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2186 always use 16-bit offsets. Makes calculated-size jump tables
2187 feasible.
2188
2189Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2190
2191 * i386.h: Fix one-operand forms of in* and out* patterns.
2192
2193Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2194
2195 * m68k.h: Added CPU32 support.
2196
2197Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2198
2199 * mips.h (break): Disassemble the argument. Patch from
2200 jonathan@cs.stanford.edu (Jonathan Stone).
2201
2202Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2203
2204 * m68k.h: merged Motorola and MIT syntax.
2205
2206Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2207
2208 * m68k.h (pmove): make the tests less strict, the 68k book is
2209 wrong.
2210
2211Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2212
2213 * m68k.h (m68ec030): Defined as alias for 68030.
2214 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2215 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2216 them. Tightened description of "fmovex" to distinguish it from
2217 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2218 up descriptions that claimed versions were available for chips not
2219 supporting them. Added "pmovefd".
2220
2221Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2222
2223 * m68k.h: fix where the . goes in divull
2224
2225Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2226
2227 * m68k.h: the cas2 instruction is supposed to be written with
2228 indirection on the last two operands, which can be either data or
2229 address registers. Added a new operand type 'r' which accepts
2230 either register type. Added new cases for cas2l and cas2w which
2231 use them. Corrected masks for cas2 which failed to recognize use
2232 of address register.
2233
2234Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2235
2236 * m68k.h: Merged in patches (mostly m68040-specific) from
2237 Colin Smith <colin@wrs.com>.
2238
2239 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2240 base). Also cleaned up duplicates, re-ordered instructions for
2241 the sake of dis-assembling (so aliases come after standard names).
2242 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2243
2244Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2245
2246 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2247 all missing .s
2248
2249Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2250
2251 * sparc.h: Moved tables to BFD library.
2252
2253 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2254
2255Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2256
2257 * h8300.h: Finish filling in all the holes in the opcode table,
2258 so that the Lucid C compiler can digest this as well...
2259
2260Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2261
2262 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2263 Fix opcodes on various sizes of fild/fist instructions
2264 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2265 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2266
2267Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2268
2269 * h8300.h: Fill in all the holes in the opcode table so that the
2270 losing HPUX C compiler can digest this...
2271
2272Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2273
2274 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2275 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2276
2277Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2278
2279 * sparc.h: Add new architecture variant sparclite; add its scan
2280 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2281
2282Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2283
2284 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2285 fy@lucid.com).
2286
2287Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2288
2289 * rs6k.h: New version from IBM (Metin).
2290
2291Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2292
2293 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2294 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2295
2296Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2297
2298 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2299
2300Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2301
2302 * m68k.h (one, two): Cast macro args to unsigned to suppress
2303 complaints from compiler and lint about integer overflow during
2304 shift.
2305
2306Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2307
2308 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2309
2310Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2311
2312 * mips.h: Make bitfield layout depend on the HOST compiler,
2313 not on the TARGET system.
2314
2315Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2316
2317 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2318 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2319 <TRANLE@INTELLICORP.COM>.
2320
2321Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2322
2323 * h8300.h: turned op_type enum into #define list
2324
2325Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2326
2327 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2328 similar instructions -- they've been renamed to "fitoq", etc.
2329 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2330 number of arguments.
2331 * h8300.h: Remove extra ; which produces compiler warning.
2332
2333Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2334
2335 * sparc.h: fix opcode for tsubcctv.
2336
2337Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2338
2339 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2340
2341Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2342
2343 * sparc.h (nop): Made the 'lose' field be even tighter,
2344 so only a standard 'nop' is disassembled as a nop.
2345
2346Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2347
2348 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2349 disassembled as a nop.
2350
2351Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2352
2353 * sparc.h: fix a typo.
2354
2355Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2356
2357 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2358 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2359 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2360
2361\f
2362Local Variables:
2363version-control: never
2364End:
GDB Binutils - Deliverables
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