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[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
f5c120c5
MG		 12001-10-17 matthew green <mrg@redhat.com>
2
3 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
4
418c1742
MG		 52001-10-12 matthew green <mrg@redhat.com>
6
0716ce0d
MG		 7 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
8 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
9 instructions, respectively.
418c1742 10
6ff2f2ba
NC		 112001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
12
13 * v850.h: Remove spurious comment.
14
015cf428
NC		 152001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
16
17 * h8300.h: Fix compile time warning messages
18
847b8b31
RH		 192001-09-04 Richard Henderson <rth@redhat.com>
20
21 * alpha.h (struct alpha_operand): Pack elements into bitfields.
22
a98b9439
EC		 232001-08-31 Eric Christopher <echristo@redhat.com>
24
25 * mips.h: Remove CPU_MIPS32_4K.
26
a6959011
AM		 272001-08-27 Torbjorn Granlund <tege@swox.com>
28
29 * ppc.h (PPC_OPERAND_DS): Define.
30
d83c6548
AJ		 312001-08-25 Andreas Jaeger <aj@suse.de>
32
33 * d30v.h: Fix declaration of reg_name_cnt.
34
35 * d10v.h: Fix declaration of d10v_reg_name_cnt.
36
37 * arc.h: Add prototypes from opcodes/arc-opc.c.
38
99c14723
TS		 392001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
40
41 * mips.h (INSN_10000): Define.
42 (OPCODE_IS_MEMBER): Check for INSN_10000.
43
11b37b7b
AM		 442001-08-10 Alan Modra <amodra@one.net.au>
45
46 * ppc.h: Revert 2001-08-08.
47
0f1bac05
AM		 482001-08-08 Alan Modra <amodra@one.net.au>
49
50 1999-10-25 Torbjorn Granlund <tege@swox.com>
51 * ppc.h (struct powerpc_operand): New field `reloc'.
52
81f6038f
FCE		 532001-07-11 Frank Ch. Eigler <fche@redhat.com>
54
55 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
56 (cgen_cpu_desc): Ditto.
57
32cfffe3
BE		 582001-07-07 Ben Elliston <bje@redhat.com>
59
60 * m88k.h: Clean up and reformat. Remove unused code.
61
3e890047
GK		 622001-06-14 Geoffrey Keating <geoffk@redhat.com>
63
64 * cgen.h (cgen_keyword): Add nonalpha_chars field.
65
d1cf510e
NC		 662001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
67
68 * mips.h (CPU_R12000): Define.
69
e281c457
JH		 702001-05-23 John Healy <jhealy@redhat.com>
71
72 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
d83c6548 73
aa5f19f2
NC		 742001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
75
76 * mips.h (INSN_ISA_MASK): Define.
77
67d6227d
AM		 782001-05-12 Alan Modra <amodra@one.net.au>
79
80 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
81 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
82 and use InvMem as these insns must have register operands.
83
992aaec9
AM		 842001-05-04 Alan Modra <amodra@one.net.au>
85
86 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
87 and pextrw to swap reg/rm assignments.
88
4ef7f0bf
HPN		 892001-04-05 Hans-Peter Nilsson <hp@axis.com>
90
91 * cris.h (enum cris_insn_version_usage): Correct comment for
92 cris_ver_v3p.
93
0f17484f
AM		 942001-03-24 Alan Modra <alan@linuxcare.com.au>
95
96 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
97 Add InvMem to first operand of "maskmovdqu".
98
7ccb5238
HPN		 992001-03-22 Hans-Peter Nilsson <hp@axis.com>
100
101 * cris.h (ADD_PC_INCR_OPCODE): New macro.
102
361bfa20
KH		 1032001-03-21 Kazu Hirata <kazu@hxi.com>
104
105 * h8300.h: Fix formatting.
106
87890af0
AM		 1072001-03-22 Alan Modra <alan@linuxcare.com.au>
108
109 * i386.h (i386_optab): Add paddq, psubq.
110
2e98d2de
AM		 1112001-03-19 Alan Modra <alan@linuxcare.com.au>
112
113 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
114
80a523c2
NC		 1152001-02-28 Igor Shevlyakov <igor@windriver.com>
116
117 * m68k.h: new defines for Coldfire V4. Update mcf to know
118 about mcf5407.
119
e135f41b
NC		 1202001-02-18 lars brinkhoff <lars@nocrew.org>
121
122 * pdp11.h: New file.
123
1242001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH		 125
126 * i386.h (i386_optab): SSE integer converison instructions have
127 64bit versions on x86-64.
128
8eaec934
NC		 1292001-02-10 Nick Clifton <nickc@redhat.com>
130
131 * mips.h: Remove extraneous whitespace. Formating change to allow
132 for future contribution.
133
a85d7ed0
NC		 1342001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
135
136 * s390.h: New file.
137
0715dc88
PM		 1382001-02-02 Patrick Macdonald <patrickm@redhat.com>
139
140 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
141 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
142 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
143
296bc568
AM		 1442001-01-24 Karsten Keil <kkeil@suse.de>
145
146 * i386.h (i386_optab): Fix swapgs
147
1328dc98
AM		 1482001-01-14 Alan Modra <alan@linuxcare.com.au>
149
150 * hppa.h: Describe new '<' and '>' operand types, and tidy
151 existing comments.
152 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
153 Remove duplicate "ldw j(s,b),x". Sort some entries.
154
e135f41b 1552001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH		 156
157 * i386.h (i386_optab): Fix pusha and ret templates.
158
0d2bcfaf
NC		 1592001-01-11 Peter Targett <peter.targett@arccores.com>
160
161 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
162 definitions for masking cpu type.
163 (arc_ext_operand_value) New structure for storing extended
164 operands.
165 (ARC_OPERAND_*) Flags for operand values.
166
1672001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH		 168
169 * i386.h (pinsrw): Add.
170 (pshufw): Remove.
171 (cvttpd2dq): Fix operands.
172 (cvttps2dq): Likewise.
173 (movq2q): Rename to movdq2q.
174
079966a8
AM		 1752001-01-10 Richard Schaal <richard.schaal@intel.com>
176
177 * i386.h: Correct movnti instruction.
178
8c1f9e76
JJ		 1792001-01-09 Jeff Johnston <jjohnstn@redhat.com>
180
181 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
182 of operands (unsigned char or unsigned short).
183 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
184 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
185
0d2bcfaf 1862001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH		 187
188 * i386.h (i386_optab): Make [sml]fence template to use immext field.
189
0d2bcfaf 1902001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH		 191
192 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
193 introduced by Pentium4
194
0d2bcfaf 1952000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH		 196
197 * i386.h (i386_optab): Add "rex*" instructions;
198 add swapgs; disable jmp/call far direct instructions for
199 64bit mode; add syscall and sysret; disable registers for 0xc6
200 template. Add 'q' suffixes to extendable instructions, disable
079966a8 201 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH		 202 (i386_regtab): Add extended registers.
203 (*Suf): Add No_qSuf.
204 (q_Suf, wlq_Suf, bwlq_Suf): New.
205
0d2bcfaf 2062000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH		 207
208 * i386.h (i386_optab): Replace "Imm" with "EncImm".
209 (i386_regtab): Add flags field.
d83c6548 210
bf40d919
NC		 2112000-12-12 Nick Clifton <nickc@redhat.com>
212
213 * mips.h: Fix formatting.
214
4372b673
NC		 2152000-12-01 Chris Demetriou <cgd@sibyte.com>
216
217 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
218 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
219 OP_*_SYSCALL definitions.
220 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
221 19 bit wait codes.
222 (MIPS operand specifier comments): Remove 'm', add 'U' and
223 'J', and update the meaning of 'B' so that it's more general.
224
e7af610e
NC		 225 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
226 INSN_ISA5): Renumber, redefine to mean the ISA at which the
227 instruction was added.
228 (INSN_ISA32): New constant.
229 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
230 Renumber to avoid new and/or renumbered INSN_* constants.
231 (INSN_MIPS32): Delete.
232 (ISA_UNKNOWN): New constant to indicate unknown ISA.
233 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
234 ISA_MIPS32): New constants, defined to be the mask of INSN_*
d83c6548 235 constants available at that ISA level.
e7af610e
NC		 236 (CPU_UNKNOWN): New constant to indicate unknown CPU.
237 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
238 define it with a unique value.
239 (OPCODE_IS_MEMBER): Update for new ISA membership-related
240 constant meanings.
241
84ea6cf2 242 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
d83c6548 243 definitions.
84ea6cf2 244
c6c98b38
NC		 245 * mips.h (CPU_SB1): New constant.
246
19f7b010
JJ		 2472000-10-20 Jakub Jelinek <jakub@redhat.com>
248
249 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
250 Note that '3' is used for siam operand.
251
139368c9
JW		 2522000-09-22 Jim Wilson <wilson@cygnus.com>
253
254 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
255
156c2f8b 2562000-09-13 Anders Norlander <anorland@acc.umu.se>
d83c6548 257
156c2f8b
NC		 258 * mips.h: Use defines instead of hard-coded processor numbers.
259 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
d83c6548 260 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
156c2f8b
NC		 261 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
262 CPU_4KC, CPU_4KM, CPU_4KP): Define..
263 (OPCODE_IS_MEMBER): Use new defines.
d83c6548 264 (OP_MASK_SEL, OP_SH_SEL): Define.
156c2f8b 265 (OP_MASK_CODE20, OP_SH_CODE20): Define.
d83c6548
AJ		 266 Add 'P' to used characters.
267 Use 'H' for coprocessor select field.
156c2f8b 268 Use 'm' for 20 bit breakpoint code.
d83c6548
AJ		 269 Document new arg characters and add to used characters.
270 (INSN_MIPS32): New define for MIPS32 extensions.
271 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
156c2f8b 272
3c5ce02e
AM		 2732000-09-05 Alan Modra <alan@linuxcare.com.au>
274
275 * hppa.h: Mention cz completer.
276
50b81f19
JW		 2772000-08-16 Jim Wilson <wilson@cygnus.com>
278
279 * ia64.h (IA64_OPCODE_POSTINC): New.
280
fc29466d
L		 2812000-08-15 H.J. Lu <hjl@gnu.org>
282
283 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
284 IgnoreSize change.
285
4f1d9bd8
NC		 2862000-08-08 Jason Eckhardt <jle@cygnus.com>
287
288 * i860.h: Small formatting adjustments.
289
45ee1401
DC		 2902000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
291
292 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
293 Move related opcodes closer to each other.
294 Minor changes in comments, list undefined opcodes.
295
9d551405
DB		 2962000-07-26 Dave Brolley <brolley@redhat.com>
297
298 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
299
4f1d9bd8
NC		 3002000-07-22 Jason Eckhardt <jle@cygnus.com>
301
302 * i860.h (btne, bte, bla): Changed these opcodes
303 to use sbroff ('r') instead of split16 ('s').
304 (J, K, L, M): New operand types for 16-bit aligned fields.
305 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
306 use I, J, K, L, M instead of just I.
307 (T, U): New operand types for split 16-bit aligned fields.
308 (st.x): Changed these opcodes to use S, T, U instead of just S.
309 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
310 exist on the i860.
311 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
312 (pfeq.ss, pfeq.dd): New opcodes.
313 (st.s): Fixed incorrect mask bits.
314 (fmlow): Fixed incorrect mask bits.
315 (fzchkl, pfzchkl): Fixed incorrect mask bits.
316 (faddz, pfaddz): Fixed incorrect mask bits.
317 (form, pform): Fixed incorrect mask bits.
318 (pfld.l): Fixed incorrect mask bits.
319 (fst.q): Fixed incorrect mask bits.
320 (all floating point opcodes): Fixed incorrect mask bits for
321 handling of dual bit.
322
c8488617
HPN		 3232000-07-20 Hans-Peter Nilsson <hp@axis.com>
324
325 cris.h: New file.
326
65aa24b6
NC		 3272000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
328
329 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
330 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
331 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
332 (AVR_ISA_M83): Define for ATmega83, ATmega85.
333 (espm): Remove, because ESPM removed in databook update.
334 (eicall, eijmp): Move to the end of opcode table.
335
60bcf0fa
NC		 3362000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
337
338 * m68hc11.h: New file for support of Motorola 68hc11.
339
60a2978a
DC		 340Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
341
342 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
343
68ab2dd9
DC		 344Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
345
346 * avr.h: New file with AVR opcodes.
347
f0662e27
DL		 348Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
349
350 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
351
b722f2be
AM		 3522000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
353
354 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
355
f9e0cf0b
AM		 3562000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
357
358 * i386.h: Use sl_FP, not sl_Suf for fild.
359
f660ee8b
FCE		 3602000-05-16 Frank Ch. Eigler <fche@redhat.com>
361
362 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
363 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
364 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
365 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
366
558b0a60
AM		 3672000-05-13 Alan Modra <alan@linuxcare.com.au>,
368
369 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
370
e413e4e9
AM		 3712000-05-13 Alan Modra <alan@linuxcare.com.au>,
372 Alexander Sokolov <robocop@netlink.ru>
373
374 * i386.h (i386_optab): Add cpu_flags for all instructions.
375
3762000-05-13 Alan Modra <alan@linuxcare.com.au>
377
378 From Gavin Romig-Koch <gavin@cygnus.com>
379 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
380
5c84d377
TW		 3812000-05-04 Timothy Wall <twall@cygnus.com>
382
383 * tic54x.h: New.
384
966f959b
C		 3852000-05-03 J.T. Conklin <jtc@redback.com>
386
387 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
388 (PPC_OPERAND_VR): New operand flag for vector registers.
389
c5d05dbb
JL		 3902000-05-01 Kazu Hirata <kazu@hxi.com>
391
392 * h8300.h (EOP): Add missing initializer.
393
a7fba0e0
JL		 394Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
395
396 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
397 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
398 New operand types l,y,&,fe,fE,fx added to support above forms.
399 (pa_opcodes): Replaced usage of 'x' as source/target for
400 floating point double-word loads/stores with 'fx'.
401
800eeca4
JW		 402Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
403 David Mosberger <davidm@hpl.hp.com>
404 Timothy Wall <twall@cygnus.com>
405 Jim Wilson <wilson@cygnus.com>
406
407 * ia64.h: New file.
408
ba23e138
NC		 4092000-03-27 Nick Clifton <nickc@cygnus.com>
410
411 * d30v.h (SHORT_A1): Fix value.
412 (SHORT_AR): Renumber so that it is at the end of the list of short
413 instructions, not the end of the list of long instructions.
414
d0b47220
AM		 4152000-03-26 Alan Modra <alan@linuxcare.com>
416
417 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
418 problem isn't really specific to Unixware.
419 (OLDGCC_COMPAT): Define.
420 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
421 destination %st(0).
422 Fix lots of comments.
423
866afedc
NC		 4242000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
425
426 * d30v.h:
427 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
428 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
429 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
430 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
431 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
432 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
433 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
434
cc5ca5ce
AM		 4352000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
436
437 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
438 fistpd without suffix.
439
68e324a2
NC		 4402000-02-24 Nick Clifton <nickc@cygnus.com>
441
442 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
443 'signed_overflow_ok_p'.
444 Delete prototypes for cgen_set_flags() and cgen_get_flags().
445
60f036a2
AH		 4462000-02-24 Andrew Haley <aph@cygnus.com>
447
448 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
449 (CGEN_CPU_TABLE): flags: new field.
450 Add prototypes for new functions.
d83c6548 451
9b9b5cd4
AM		 4522000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
453
454 * i386.h: Add some more UNIXWARE_COMPAT comments.
455
5b93d8bb
AM		 4562000-02-23 Linas Vepstas <linas@linas.org>
457
458 * i370.h: New file.
459
4f1d9bd8
NC		 4602000-02-22 Chandra Chavva <cchavva@cygnus.com>
461
462 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
463 cannot be combined in parallel with ADD/SUBppp.
464
87f398dd
AH		 4652000-02-22 Andrew Haley <aph@cygnus.com>
466
467 * mips.h: (OPCODE_IS_MEMBER): Add comment.
468
367c01af
AH		 4691999-12-30 Andrew Haley <aph@cygnus.com>
470
9a1e79ca
AH		 471 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
472 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
473 insns.
367c01af 474
add0c677
AM		 4752000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
476
477 * i386.h: Qualify intel mode far call and jmp with x_Suf.
478
3138f287
AM		 4791999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
480
481 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
482 indirect jumps and calls. Add FF/3 call for intel mode.
483
ccecd07b
JL		 484Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
485
486 * mn10300.h: Add new operand types. Add new instruction formats.
487
b37e19e9
JL		 488Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
489
490 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
491 instruction.
492
5fce5ddf
GRK		 4931999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
494
495 * mips.h (INSN_ISA5): New.
496
2bd7f1f3
GRK		 4971999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
498
499 * mips.h (OPCODE_IS_MEMBER): New.
500
4df2b5c5
NC		 5011999-10-29 Nick Clifton <nickc@cygnus.com>
502
503 * d30v.h (SHORT_AR): Define.
504
446a06c9
MM		 5051999-10-18 Michael Meissner <meissner@cygnus.com>
506
507 * alpha.h (alpha_num_opcodes): Convert to unsigned.
508 (alpha_num_operands): Ditto.
509
eca04c6a
JL		 510Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
511
512 * hppa.h (pa_opcodes): Add load and store cache control to
513 instructions. Add ordered access load and store.
514
515 * hppa.h (pa_opcode): Add new entries for addb and addib.
516
517 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
518
519 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
520
c43185de
DN		 521Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
522
523 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
524
ec3533da
JL		 525Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
526
390f858d
JL		 527 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
528 and "be" using completer prefixes.
529
8c47ebd9
JL		 530 * hppa.h (pa_opcodes): Add initializers to silence compiler.
531
ec3533da
JL		 532 * hppa.h: Update comments about character usage.
533
18369bea
JL		 534Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
535
536 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
537 up the new fstw & bve instructions.
538
c36efdd2
JL		 539Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
540
d3ffb032
JL		 541 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
542 instructions.
543
c49ec3da
JL		 544 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
545
5d2e7ecc
JL		 546 * hppa.h (pa_opcodes): Add long offset double word load/store
547 instructions.
548
6397d1a2
JL		 549 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
550 stores.
551
142f0fe0
JL		 552 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
553
f5a68b45
JL		 554 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
555
8235801e
JL		 556 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
557
35184366
JL		 558 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
559
f0bfde5e
JL		 560 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
561
27bbbb58
JL		 562 * hppa.h (pa_opcodes): Add support for "b,l".
563
c36efdd2
JL		 564 * hppa.h (pa_opcodes): Add support for "b,gate".
565
f2727d04
JL		 566Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
567
9392fb11 568 * hppa.h (pa_opcodes): Use 'fX' for first register operand
d83c6548 569 in xmpyu.
9392fb11 570
e0c52e99
JL		 571 * hppa.h (pa_opcodes): Fix mask for probe and probei.
572
f2727d04
JL		 573 * hppa.h (pa_opcodes): Fix mask for depwi.
574
52d836e2
JL		 575Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
576
577 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
578 an explicit output argument.
579
90765e3a
JL		 580Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
581
582 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
583 Add a few PA2.0 loads and store variants.
584
8340b17f
ILT		 5851999-09-04 Steve Chamberlain <sac@pobox.com>
586
587 * pj.h: New file.
588
5f47d35b
AM		 5891999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
590
591 * i386.h (i386_regtab): Move %st to top of table, and split off
592 other fp reg entries.
593 (i386_float_regtab): To here.
594
1c143202
JL		 595Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
596
7d8fdb64
JL		 597 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
598 by 'f'.
599
90927b9c
JL		 600 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
601 Add supporting args.
602
1d16bf9c
JL		 603 * hppa.h: Document new completers and args.
604 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
605 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
606 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
607 pmenb and pmdis.
608
96226a68
JL		 609 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
610 hshr, hsub, mixh, mixw, permh.
611
5d4ba527
JL		 612 * hppa.h (pa_opcodes): Change completers in instructions to
613 use 'c' prefix.
614
e9fc28c6
JL		 615 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
616 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
617
1c143202
JL		 618 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
619 fnegabs to use 'I' instead of 'F'.
620
9e525108
AM		 6211999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
622
623 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
624 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
625 Alphabetically sort PIII insns.
626
e8da1bf1
DE		 627Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
628
629 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
630
7d627258
JL		 631Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
632
5696871a
JL		 633 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
634 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
635
7d627258
JL		 636 * hppa.h: Document 64 bit condition completers.
637
c5e52916
JL		 638Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
639
640 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
641
eecb386c
AM		 6421999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
643
644 * i386.h (i386_optab): Add DefaultSize modifier to all insns
645 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
646 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
647
88a380f3
JL		 648Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
649 Jeff Law <law@cygnus.com>
650
651 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
652
653 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca 654
d83c6548 655 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
d60e8dca
JL		 656 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
657
145cf1f0
AM		 6581999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
659
660 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
661
73826640
JL		 662Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
663
664 * hppa.h (struct pa_opcode): Add new field "flags".
665 (FLAGS_STRICT): Define.
666
b65db252
JL		 667Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
668 Jeff Law <law@cygnus.com>
669
f7fc668b
JL		 670 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
671
672 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 673
10084519
AM		 6741999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
675
676 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
677 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
678 flag to fcomi and friends.
679
cd8a80ba
JL		 680Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
681
682 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
d83c6548 683 integer logical instructions.
cd8a80ba 684
1fca749b
ILT		 6851999-05-28 Linus Nordberg <linus.nordberg@canit.se>
686
687 * m68k.h: Document new formats `E', `G', `H' and new places `N',
688 `n', `o'.
689
690 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
691 and new places `m', `M', `h'.
692
aa008907
JL		 693Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
694
695 * hppa.h (pa_opcodes): Add several processor specific system
696 instructions.
697
e26b85f0
JL		 698Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
699
d83c6548 700 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
e26b85f0
JL		 701 "addb", and "addib" to be used by the disassembler.
702
c608c12e
AM		 7031999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
704
705 * i386.h (ReverseModrm): Remove all occurences.
706 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
707 movmskps, pextrw, pmovmskb, maskmovq.
708 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
709 ignore the data size prefix.
710
711 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
712 Mostly stolen from Doug Ledford <dledford@redhat.com>
713
45c18104
RH		 714Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
715
716 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
717
252b5132
RH		 7181999-04-14 Doug Evans <devans@casey.cygnus.com>
719
720 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
721 (CGEN_ATTR_TYPE): Update.
722 (CGEN_ATTR_MASK): Number booleans starting at 0.
723 (CGEN_ATTR_VALUE): Update.
724 (CGEN_INSN_ATTR): Update.
725
726Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
727
728 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
729 instructions.
730
731Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
732
733 * hppa.h (bb, bvb): Tweak opcode/mask.
734
735
7361999-03-22 Doug Evans <devans@casey.cygnus.com>
737
738 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
739 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
740 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
741 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
742 Delete member max_insn_size.
743 (enum cgen_cpu_open_arg): New enum.
744 (cpu_open): Update prototype.
745 (cpu_open_1): Declare.
746 (cgen_set_cpu): Delete.
747
7481999-03-11 Doug Evans <devans@casey.cygnus.com>
749
750 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
751 (CGEN_OPERAND_NIL): New macro.
752 (CGEN_OPERAND): New member `type'.
753 (@arch@_cgen_operand_table): Delete decl.
754 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
755 (CGEN_OPERAND_TABLE): New struct.
756 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
757 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
758 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
759 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
760 {get,set}_{int,vma}_operand.
761 (@arch@_cgen_cpu_open): New arg `isa'.
762 (cgen_set_cpu): Ditto.
763
764Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
765
766 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
767
7681999-02-25 Doug Evans <devans@casey.cygnus.com>
769
770 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
771 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
772 enum cgen_hw_type.
773 (CGEN_HW_TABLE): New struct.
774 (hw_table): Delete declaration.
775 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
776 to table entry to enum.
777 (CGEN_OPINST): Ditto.
778 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
779
780Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
781
782 * alpha.h (AXP_OPCODE_EV6): New.
783 (AXP_OPCODE_NOPAL): Include it.
784
7851999-02-09 Doug Evans <devans@casey.cygnus.com>
786
787 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
788 All uses updated. New members int_insn_p, max_insn_size,
789 parse_operand,insert_operand,extract_operand,print_operand,
790 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
791 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
792 extract_handlers,print_handlers.
793 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
794 (CGEN_ATTR_BOOL_OFFSET): New macro.
795 (CGEN_ATTR_MASK): Subtract it to compute bit number.
796 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
797 (cgen_opcode_handler): Renamed from cgen_base.
798 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
799 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
800 all uses updated.
801 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
802 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
803 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
804 (CGEN_OPCODE,CGEN_IBASE): New types.
805 (CGEN_INSN): Rewrite.
806 (CGEN_{ASM,DIS}_HASH*): Delete.
807 (init_opcode_table,init_ibld_table): Declare.
808 (CGEN_INSN_ATTR): New type.
809
810Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
d83c6548 811
252b5132
RH		 812 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
813 (x_FP, d_FP, dls_FP, sldx_FP): Define.
814 Change *Suf definitions to include x and d suffixes.
815 (movsx): Use w_Suf and b_Suf.
816 (movzx): Likewise.
817 (movs): Use bwld_Suf.
818 (fld): Change ordering. Use sld_FP.
819 (fild): Add Intel Syntax equivalent of fildq.
820 (fst): Use sld_FP.
821 (fist): Use sld_FP.
822 (fstp): Use sld_FP. Add x_FP version.
823 (fistp): LLongMem version for Intel Syntax.
824 (fcom, fcomp): Use sld_FP.
825 (fadd, fiadd, fsub): Use sld_FP.
826 (fsubr): Use sld_FP.
827 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
828
8291999-01-27 Doug Evans <devans@casey.cygnus.com>
830
831 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
832 CGEN_MODE_UINT.
833
e135f41b 8341999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH		 835
836 * hppa.h (bv): Fix mask.
837
8381999-01-05 Doug Evans <devans@casey.cygnus.com>
839
840 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
841 (CGEN_ATTR): Use it.
842 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
843 (CGEN_ATTR_TABLE): New member dfault.
844
8451998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
846
847 * mips.h (MIPS16_INSN_BRANCH): New.
848
849Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
850
851 The following is part of a change made by Edith Epstein
d83c6548
AJ		 852 <eepstein@sophia.cygnus.com> as part of a project to merge in
853 changes by HP; HP did not create ChangeLog entries.
252b5132
RH		 854
855 * hppa.h (completer_chars): list of chars to not put a space
d83c6548 856 after.
252b5132
RH		 857
858Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
859
860 * i386.h (i386_optab): Permit w suffix on processor control and
d83c6548 861 status word instructions.
252b5132
RH		 862
8631998-11-30 Doug Evans <devans@casey.cygnus.com>
864
865 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
866 (struct cgen_keyword_entry): Ditto.
867 (struct cgen_operand): Ditto.
868 (CGEN_IFLD): New typedef, with associated access macros.
869 (CGEN_IFMT): New typedef, with associated access macros.
870 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
871 (CGEN_IVALUE): New typedef.
872 (struct cgen_insn): Delete const on syntax,attrs members.
873 `format' now points to format data. Type of `value' is now
874 CGEN_IVALUE.
875 (struct cgen_opcode_table): New member ifld_table.
876
8771998-11-18 Doug Evans <devans@casey.cygnus.com>
878
879 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
880 (CGEN_OPERAND_INSTANCE): New member `attrs'.
881 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
882 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
883 (cgen_opcode_table): Update type of dis_hash fn.
884 (extract_operand): Update type of `insn_value' arg.
885
886Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
887
888 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
889
890Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
891
892 * mips.h (INSN_MULT): Added.
893
894Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
895
896 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
897
898Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
899
900 * cgen.h (CGEN_INSN_INT): New typedef.
901 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
902 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
903 (CGEN_INSN_BYTES_PTR): New typedef.
904 (CGEN_EXTRACT_INFO): New typedef.
905 (cgen_insert_fn,cgen_extract_fn): Update.
906 (cgen_opcode_table): New member `insn_endian'.
907 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
908 (insert_operand,extract_operand): Update.
909 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
910
911Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
912
913 * cgen.h (CGEN_ATTR_BOOLS): New macro.
914 (struct CGEN_HW_ENTRY): New member `attrs'.
915 (CGEN_HW_ATTR): New macro.
916 (struct CGEN_OPERAND_INSTANCE): New member `name'.
917 (CGEN_INSN_INVALID_P): New macro.
918
919Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
920
921 * hppa.h: Add "fid".
d83c6548 922
252b5132
RH		 923Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
924
925 From Robert Andrew Dale <rob@nb.net>
926 * i386.h (i386_optab): Add AMD 3DNow! instructions.
927 (AMD_3DNOW_OPCODE): Define.
928
929Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
930
931 * d30v.h (EITHER_BUT_PREFER_MU): Define.
932
933Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
934
935 * cgen.h (cgen_insn): #if 0 out element `cdx'.
936
937Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
938
939 Move all global state data into opcode table struct, and treat
940 opcode table as something that is "opened/closed".
941 * cgen.h (CGEN_OPCODE_DESC): New type.
942 (all fns): New first arg of opcode table descriptor.
943 (cgen_set_parse_operand_fn): Add prototype.
944 (cgen_current_machine,cgen_current_endian): Delete.
945 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
946 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
947 dis_hash_table,dis_hash_table_entries.
948 (opcode_open,opcode_close): Add prototypes.
949
950 * cgen.h (cgen_insn): New element `cdx'.
951
952Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
953
954 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
955
956Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
957
958 * mn10300.h: Add "no_match_operands" field for instructions.
959 (MN10300_MAX_OPERANDS): Define.
960
961Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
962
963 * cgen.h (cgen_macro_insn_count): Declare.
964
965Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
966
967 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
968 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
969 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
970 set_{int,vma}_operand.
971
972Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
973
974 * mn10300.h: Add "machine" field for instructions.
975 (MN103, AM30): Define machine types.
d83c6548 976
252b5132
RH		 977Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
978
979 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
980
9811998-06-18 Ulrich Drepper <drepper@cygnus.com>
982
983 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
984
985Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
986
987 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
988 and ud2b.
989 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
990 those that happen to be implemented on pentiums.
991
992Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
993
994 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
995 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
996 with Size16|IgnoreSize or Size32|IgnoreSize.
997
998Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
999
1000 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1001 (REPE): Rename to REPE_PREFIX_OPCODE.
1002 (i386_regtab_end): Remove.
1003 (i386_prefixtab, i386_prefixtab_end): Remove.
1004 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1005 of md_begin.
1006 (MAX_OPCODE_SIZE): Define.
1007 (i386_optab_end): Remove.
1008 (sl_Suf): Define.
1009 (sl_FP): Use sl_Suf.
1010
1011 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1012 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1013 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1014 data32, dword, and adword prefixes.
1015 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1016 regs.
1017
1018Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1019
1020 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1021
1022 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1023 register operands, because this is a common idiom. Flag them with
1024 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1025 fdivrp because gcc erroneously generates them. Also flag with a
1026 warning.
1027
1028 * i386.h: Add suffix modifiers to most insns, and tighter operand
1029 checks in some cases. Fix a number of UnixWare compatibility
1030 issues with float insns. Merge some floating point opcodes, using
1031 new FloatMF modifier.
1032 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1033 consistency.
1034
1035 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1036 IgnoreDataSize where appropriate.
1037
1038Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1039
1040 * i386.h: (one_byte_segment_defaults): Remove.
1041 (two_byte_segment_defaults): Remove.
1042 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1043
1044Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1045
1046 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1047 (cgen_hw_lookup_by_num): Declare.
1048
1049Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1050
1051 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1052 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1053
1054Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1055
1056 * cgen.h (cgen_asm_init_parse): Delete.
1057 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1058 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1059
1060Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1061
1062 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1063 (cgen_asm_finish_insn): Update prototype.
1064 (cgen_insn): New members num, data.
1065 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1066 dis_hash, dis_hash_table_size moved to ...
1067 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1068 All uses updated. New members asm_hash_p, dis_hash_p.
1069 (CGEN_MINSN_EXPANSION): New struct.
1070 (cgen_expand_macro_insn): Declare.
1071 (cgen_macro_insn_count): Declare.
1072 (get_insn_operands): Update prototype.
1073 (lookup_get_insn_operands): Declare.
1074
1075Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1076
1077 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1078 regKludge. Add operands types for string instructions.
1079
1080Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1081
1082 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1083 table.
1084
1085Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1086
1087 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1088 for `gettext'.
1089
1090Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1091
1092 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1093 Add IsString flag to string instructions.
1094 (IS_STRING): Don't define.
1095 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1096 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1097 (SS_PREFIX_OPCODE): Define.
1098
1099Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1100
1101 * i386.h: Revert March 24 patch; no more LinearAddress.
1102
1103Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1104
1105 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1106 instructions, and instead add FWait opcode modifier. Add short
1107 form of fldenv and fstenv.
1108 (FWAIT_OPCODE): Define.
1109
1110 * i386.h (i386_optab): Change second operand constraint of `mov
1111 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1112 allow legal instructions such as `movl %gs,%esi'
1113
1114Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1115
1116 * h8300.h: Various changes to fully bracket initializers.
1117
1118Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1119
1120 * i386.h: Set LinearAddress for lidt and lgdt.
1121
1122Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1123
1124 * cgen.h (CGEN_BOOL_ATTR): New macro.
1125
1126Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1127
1128 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1129
1130Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1131
1132 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1133 (cgen_insn): Record syntax and format entries here, rather than
1134 separately.
1135
1136Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1137
1138 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1139
1140Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1141
1142 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1143 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1144 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1145
1146Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1147
1148 * cgen.h (lookup_insn): New argument alias_p.
1149
1150Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1151
1152Fix rac to accept only a0:
1153 * d10v.h (OPERAND_ACC): Split into:
1154 (OPERAND_ACC0, OPERAND_ACC1) .
1155 (OPERAND_GPR): Define.
1156
1157Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1158
1159 * cgen.h (CGEN_FIELDS): Define here.
1160 (CGEN_HW_ENTRY): New member `type'.
1161 (hw_list): Delete decl.
1162 (enum cgen_mode): Declare.
1163 (CGEN_OPERAND): New member `hw'.
1164 (enum cgen_operand_instance_type): Declare.
1165 (CGEN_OPERAND_INSTANCE): New type.
1166 (CGEN_INSN): New member `operands'.
1167 (CGEN_OPCODE_DATA): Make hw_list const.
1168 (get_insn_operands,lookup_insn): Add prototypes for.
1169
1170Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1171
1172 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1173 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1174 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1175 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1176
1177Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1178
1179 * cgen.h: Correct typo in comment end marker.
1180
1181Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1182
1183 * tic30.h: New file.
1184
5a109b67 1185Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH		 1186
1187 * cgen.h: Add prototypes for cgen_save_fixups(),
1188 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1189 of cgen_asm_finish_insn() to return a char *.
1190
1191Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1192
1193 * cgen.h: Formatting changes to improve readability.
1194
1195Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1196
1197 * cgen.h (*): Clean up pass over `struct foo' usage.
1198 (CGEN_ATTR): Make unsigned char.
1199 (CGEN_ATTR_TYPE): Update.
1200 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1201 (cgen_base): Move member `attrs' to cgen_insn.
1202 (CGEN_KEYWORD): New member `null_entry'.
1203 (CGEN_{SYNTAX,FORMAT}): New types.
1204 (cgen_insn): Format and syntax separated from each other.
1205
1206Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1207
1208 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1209 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1210 flags_{used,set} long.
1211 (d30v_operand): Make flags field long.
1212
1213Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1214
1215 * m68k.h: Fix comment describing operand types.
1216
1217Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1218
1219 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1220 everything else after down.
1221
1222Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1223
1224 * d10v.h (OPERAND_FLAG): Split into:
1225 (OPERAND_FFLAG, OPERAND_CFLAG) .
1226
1227Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1228
1229 * mips.h (struct mips_opcode): Changed comments to reflect new
1230 field usage.
1231
1232Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1233
1234 * mips.h: Added to comments a quick-ref list of all assigned
1235 operand type characters.
1236 (OP_{MASK,SH}_PERFREG): New macros.
1237
1238Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1239
1240 * sparc.h: Add '_' and '/' for v9a asr's.
1241 Patch from David Miller <davem@vger.rutgers.edu>
1242
1243Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1244
1245 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1246 area are not available in the base model (H8/300).
1247
1248Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1249
1250 * m68k.h: Remove documentation of ` operand specifier.
1251
1252Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1253
1254 * m68k.h: Document q and v operand specifiers.
1255
1256Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1257
1258 * v850.h (struct v850_opcode): Add processors field.
1259 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1260 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1261 (PROCESSOR_V850EA): New bit constants.
1262
1263Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1264
1265 Merge changes from Martin Hunt:
1266
1267 * d30v.h: Allow up to 64 control registers. Add
1268 SHORT_A5S format.
1269
1270 * d30v.h (LONG_Db): New form for delayed branches.
1271
1272 * d30v.h: (LONG_Db): New form for repeati.
1273
1274 * d30v.h (SHORT_D2B): New form.
1275
1276 * d30v.h (SHORT_A2): New form.
1277
1278 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1279 registers are used. Needed for VLIW optimization.
1280
1281Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1282
1283 * cgen.h: Move assembler interface section
1284 up so cgen_parse_operand_result is defined for cgen_parse_address.
1285 (cgen_parse_address): Update prototype.
1286
1287Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1288
1289 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1290
1291Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1292
1293 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1294 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1295 <paubert@iram.es>.
1296
1297 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1298 <paubert@iram.es>.
1299
1300 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1301 <paubert@iram.es>.
1302
1303 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1304 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1305
1306Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1307
1308 * v850.h (V850_NOT_R0): New flag.
1309
1310Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1311
1312 * v850.h (struct v850_opcode): Remove flags field.
1313
1314Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1315
1316 * v850.h (struct v850_opcode): Add flags field.
1317 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1318 fields.
1319 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1320 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1321
1322Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1323
1324 * arc.h: New file.
1325
1326Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1327
1328 * sparc.h (sparc_opcodes): Declare as const.
1329
1330Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1331
1332 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1333 uses single or double precision floating point resources.
1334 (INSN_NO_ISA, INSN_ISA1): Define.
1335 (cpu specific INSN macros): Tweak into bitmasks outside the range
1336 of INSN_ISA field.
1337
1338Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1339
1340 * i386.h: Fix pand opcode.
1341
1342Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1343
1344 * mips.h: Widen INSN_ISA and move it to a more convenient
1345 bit position. Add INSN_3900.
1346
1347Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1348
1349 * mips.h (struct mips_opcode): added new field membership.
1350
1351Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1352
1353 * i386.h (movd): only Reg32 is allowed.
1354
1355 * i386.h: add fcomp and ud2. From Wayne Scott
1356 <wscott@ichips.intel.com>.
1357
1358Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1359
1360 * i386.h: Add MMX instructions.
1361
1362Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1363
1364 * i386.h: Remove W modifier from conditional move instructions.
1365
1366Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1367
1368 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1369 with no arguments to match that generated by the UnixWare
1370 assembler.
1371
1372Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1373
1374 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1375 (cgen_parse_operand_fn): Declare.
1376 (cgen_init_parse_operand): Declare.
1377 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1378 new argument `want'.
1379 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1380 (enum cgen_parse_operand_type): New enum.
1381
1382Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1383
1384 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1385
1386Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1387
1388 * cgen.h: New file.
1389
1390Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1391
1392 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1393 fdivrp.
1394
1395Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1396
1397 * v850.h (extract): Make unsigned.
1398
1399Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1400
1401 * i386.h: Add iclr.
1402
1403Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1404
1405 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1406 take a direction bit.
1407
1408Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1409
1410 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1411
1412Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1413
1414 * sparc.h: Include <ansidecl.h>. Update function declarations to
1415 use prototypes, and to use const when appropriate.
1416
1417Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1418
1419 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1420
1421Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1422
1423 * d10v.h: Change pre_defined_registers to
1424 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1425
1426Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1427
1428 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1429 Change mips_opcodes from const array to a pointer,
1430 and change bfd_mips_num_opcodes from const int to int,
1431 so that we can increase the size of the mips opcodes table
1432 dynamically.
1433
1434Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1435
1436 * d30v.h (FLAG_X): Remove unused flag.
1437
1438Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1439
1440 * d30v.h: New file.
1441
1442Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1443
1444 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1445 (PDS_VALUE): Macro to access value field of predefined symbols.
1446 (tic80_next_predefined_symbol): Add prototype.
1447
1448Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1449
1450 * tic80.h (tic80_symbol_to_value): Change prototype to match
1451 change in function, added class parameter.
1452
1453Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1454
1455 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1456 endmask fields, which are somewhat weird in that 0 and 32 are
1457 treated exactly the same.
1458
1459Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1460
1461 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1462 rather than a constant that is 2**X. Reorder them to put bits for
1463 operands that have symbolic names in the upper bits, so they can
1464 be packed into an int where the lower bits contain the value that
1465 corresponds to that symbolic name.
1466 (predefined_symbo): Add struct.
1467 (tic80_predefined_symbols): Declare array of translations.
1468 (tic80_num_predefined_symbols): Declare size of that array.
1469 (tic80_value_to_symbol): Declare function.
1470 (tic80_symbol_to_value): Declare function.
1471
1472Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1473
1474 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1475
1476Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1477
1478 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1479 be the destination register.
1480
1481Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1482
1483 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1484 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1485 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1486 that the opcode can have two vector instructions in a single
1487 32 bit word and we have to encode/decode both.
1488
1489Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1490
1491 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1492 TIC80_OPERAND_RELATIVE for PC relative.
1493 (TIC80_OPERAND_BASEREL): New flag bit for register
1494 base relative.
1495
1496Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1497
1498 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1499
1500Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1501
1502 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1503 ":s" modifier for scaling.
1504
1505Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1506
1507 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1508 (TIC80_OPERAND_M_LI): Ditto
1509
1510Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1511
1512 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1513 (TIC80_OPERAND_CC): New define for condition code operand.
1514 (TIC80_OPERAND_CR): New define for control register operand.
1515
1516Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1517
1518 * tic80.h (struct tic80_opcode): Name changed.
1519 (struct tic80_opcode): Remove format field.
1520 (struct tic80_operand): Add insertion and extraction functions.
1521 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1522 correct ones.
1523 (FMT_*): Ditto.
1524
1525Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1526
1527 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1528 type IV instruction offsets.
1529
1530Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1531
1532 * tic80.h: New file.
1533
1534Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1535
1536 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1537
1538Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1539
1540 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1541 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1542 * v850.h: Fix comment, v850_operand not powerpc_operand.
1543
1544Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1545
1546 * mn10200.h: Flesh out structures and definitions needed by
1547 the mn10200 assembler & disassembler.
1548
1549Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1550
1551 * mips.h: Add mips16 definitions.
1552
1553Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1554
1555 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1556
1557Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1558
1559 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1560 (MN10300_OPERAND_MEMADDR): Define.
1561
1562Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1563
1564 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1565
1566Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1567
1568 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1569
1570Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1571
1572 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1573
1574Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1575
1576 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1577
1578Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1579
1580 * alpha.h: Don't include "bfd.h"; private relocation types are now
d83c6548
AJ		 1581 negative to minimize problems with shared libraries. Organize
1582 instruction subsets by AMASK extensions and PALcode
1583 implementation.
252b5132
RH		 1584 (struct alpha_operand): Move flags slot for better packing.
1585
1586Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1587
1588 * v850.h (V850_OPERAND_RELAX): New operand flag.
1589
1590Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1591
1592 * mn10300.h (FMT_*): Move operand format definitions
1593 here.
1594
1595Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1596
1597 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1598
1599Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1600
1601 * mn10300.h (mn10300_opcode): Add "format" field.
1602 (MN10300_OPERAND_*): Define.
1603
1604Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1605
1606 * mn10x00.h: Delete.
1607 * mn10200.h, mn10300.h: New files.
1608
1609Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1610
1611 * mn10x00.h: New file.
1612
1613Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1614
1615 * v850.h: Add new flag to indicate this instruction uses a PC
1616 displacement.
1617
1618Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1619
1620 * h8300.h (stmac): Add missing instruction.
1621
1622Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1623
1624 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1625 field.
1626
1627Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1628
1629 * v850.h (V850_OPERAND_EP): Define.
1630
1631 * v850.h (v850_opcode): Add size field.
1632
1633Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1634
1635 * v850.h (v850_operands): Add insert and extract fields, pointers
d83c6548 1636 to functions used to handle unusual operand encoding.
252b5132 1637 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
d83c6548 1638 V850_OPERAND_SIGNED): Defined.
252b5132
RH		 1639
1640Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1641
1642 * v850.h (v850_operands): Add flags field.
1643 (OPERAND_REG, OPERAND_NUM): Defined.
1644
1645Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1646
1647 * v850.h: New file.
1648
1649Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1650
1651 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
d83c6548
AJ		 1652 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1653 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1654 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1655 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1656 Defined.
252b5132
RH		 1657
1658Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1659
1660 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1661 a 3 bit space id instead of a 2 bit space id.
1662
1663Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1664
1665 * d10v.h: Add some additional defines to support the
d83c6548 1666 assembler in determining which operations can be done in parallel.
252b5132
RH		 1667
1668Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1669
1670 * h8300.h (SN): Define.
1671 (eepmov.b): Renamed from "eepmov"
1672 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1673 with them.
1674
1675Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1676
1677 * d10v.h (OPERAND_SHIFT): New operand flag.
1678
1679Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1680
1681 * d10v.h: Changes for divs, parallel-only instructions, and
d83c6548 1682 signed numbers.
252b5132
RH		 1683
1684Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1685
1686 * d10v.h (pd_reg): Define. Putting the definition here allows
1687 the assembler and disassembler to share the same struct.
1688
1689Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1690
1691 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1692 Williams <steve@icarus.com>.
1693
1694Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1695
1696 * d10v.h: New file.
1697
1698Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1699
1700 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1701
1702Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1703
d83c6548 1704 * m68k.h (mcf5200): New macro.
252b5132
RH		 1705 Document names of coldfire control registers.
1706
1707Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1708
1709 * h8300.h (SRC_IN_DST): Define.
1710
1711 * h8300.h (UNOP3): Mark the register operand in this insn
1712 as a source operand, not a destination operand.
1713 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1714 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1715 register operand with SRC_IN_DST.
1716
1717Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1718
1719 * alpha.h: New file.
1720
1721Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1722
1723 * rs6k.h: Remove obsolete file.
1724
1725Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1726
1727 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1728 fdivp, and fdivrp. Add ffreep.
1729
1730Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1731
1732 * h8300.h: Reorder various #defines for readability.
1733 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1734 (BITOP): Accept additional (unused) argument. All callers changed.
1735 (EBITOP): Likewise.
1736 (O_LAST): Bump.
1737 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1738
1739 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1740 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1741 (BITOP, EBITOP): Handle new H8/S addressing modes for
1742 bit insns.
1743 (UNOP3): Handle new shift/rotate insns on the H8/S.
1744 (insns using exr): New instructions.
1745 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1746
1747Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1748
1749 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1750 was incorrect.
1751
1752Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1753
1754 * h8300.h (START): Remove.
1755 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1756 and mov.l insns that can be relaxed.
1757
1758Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1759
1760 * i386.h: Remove Abs32 from lcall.
1761
1762Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1763
1764 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1765 (SLCPOP): New macro.
1766 Mark X,Y opcode letters as in use.
1767
1768Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1769
1770 * sparc.h (F_FLOAT, F_FBR): Define.
1771
1772Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1773
1774 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1775 from all insns.
1776 (ABS8SRC,ABS8DST): Add ABS8MEM.
1777 (add.l): Fix reg+reg variant.
1778 (eepmov.w): Renamed from eepmovw.
1779 (ldc,stc): Fix many cases.
1780
1781Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1782
1783 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1784
1785Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1786
1787 * sparc.h (O): Mark operand letter as in use.
1788
1789Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1790
1791 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1792 Mark operand letters uU as in use.
1793
1794Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1795
1796 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1797 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1798 (SPARC_OPCODE_SUPPORTED): New macro.
1799 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1800 (F_NOTV9): Delete.
1801
1802Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1803
1804 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1805 declaration consistent with return type in definition.
1806
1807Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1808
1809 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1810
1811Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1812
1813 * i386.h (i386_regtab): Add 80486 test registers.
1814
1815Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1816
1817 * i960.h (I_HX): Define.
1818 (i960_opcodes): Add HX instruction.
1819
1820Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1821
1822 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1823 and fclex.
1824
1825Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1826
1827 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1828 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1829 (bfd_* defines): Delete.
1830 (sparc_opcode_archs): Replaces architecture_pname.
1831 (sparc_opcode_lookup_arch): Declare.
1832 (NUMOPCODES): Delete.
1833
1834Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1835
1836 * sparc.h (enum sparc_architecture): Add v9a.
1837 (ARCHITECTURES_CONFLICT_P): Update.
1838
1839Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1840
1841 * i386.h: Added Pentium Pro instructions.
1842
1843Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1844
1845 * m68k.h: Document new 'W' operand place.
1846
1847Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1848
1849 * hppa.h: Add lci and syncdma instructions.
1850
1851Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1852
1853 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
d83c6548 1854 instructions.
252b5132
RH		 1855
1856Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1857
1858 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1859 assembler's -mcom and -many switches.
1860
1861Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1862
1863 * i386.h: Fix cmpxchg8b extension opcode description.
1864
1865Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1866
1867 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1868 and register cr4.
1869
1870Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1871
1872 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1873
1874Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1875
1876 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1877
1878Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1879
1880 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1881
1882Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1883
1884 * m68kmri.h: Remove.
1885
1886 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1887 declarations. Remove F_ALIAS and flag field of struct
1888 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1889 int. Make name and args fields of struct m68k_opcode const.
1890
1891Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1892
1893 * sparc.h (F_NOTV9): Define.
1894
1895Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1896
1897 * mips.h (INSN_4010): Define.
1898
1899Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1900
1901 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1902
1903 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1904 * m68k.h: Fix argument descriptions of coprocessor
1905 instructions to allow only alterable operands where appropriate.
1906 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1907 (m68k_opcode_aliases): Add more aliases.
1908
1909Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1910
1911 * m68k.h: Added explcitly short-sized conditional branches, and a
1912 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1913 svr4-based configurations.
1914
1915Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1916
1917 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1918 * i386.h: added missing Data16/Data32 flags to a few instructions.
1919
1920Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1921
1922 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1923 (OP_MASK_BCC, OP_SH_BCC): Define.
1924 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1925 (OP_MASK_CCC, OP_SH_CCC): Define.
1926 (INSN_READ_FPR_R): Define.
1927 (INSN_RFE): Delete.
1928
1929Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1930
1931 * m68k.h (enum m68k_architecture): Deleted.
1932 (struct m68k_opcode_alias): New type.
1933 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1934 matching constraints, values and flags. As a side effect of this,
1935 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1936 as I know were never used, now may need re-examining.
1937 (numopcodes): Now const.
1938 (m68k_opcode_aliases, numaliases): New variables.
1939 (endop): Deleted.
1940 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1941 m68k_opcode_aliases; update declaration of m68k_opcodes.
1942
1943Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1944
1945 * hppa.h (delay_type): Delete unused enumeration.
1946 (pa_opcode): Replace unused delayed field with an architecture
1947 field.
1948 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1949
1950Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1951
1952 * mips.h (INSN_ISA4): Define.
1953
1954Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1955
1956 * mips.h (M_DLA_AB, M_DLI): Define.
1957
1958Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1959
1960 * hppa.h (fstwx): Fix single-bit error.
1961
1962Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1963
1964 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1965
1966Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1967
1968 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1969 debug registers. From Charles Hannum (mycroft@netbsd.org).
1970
1971Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1972
1973 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1974 i386 support:
1975 * i386.h (MOV_AX_DISP32): New macro.
1976 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1977 of several call/return instructions.
1978 (ADDR_PREFIX_OPCODE): New macro.
1979
1980Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1981
1982 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1983
4f1d9bd8
NC		 1984 * vax.h (struct vot_wot, field `args'): Make it pointer to const
1985 char.
252b5132
RH		 1986 (struct vot, field `name'): ditto.
1987
1988Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1989
1990 * vax.h: Supply and properly group all values in end sentinel.
1991
1992Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1993
1994 * mips.h (INSN_ISA, INSN_4650): Define.
1995
1996Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1997
1998 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1999 systems with a separate instruction and data cache, such as the
2000 29040, these instructions take an optional argument.
2001
2002Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2003
2004 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2005 INSN_TRAP.
2006
2007Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2008
2009 * mips.h (INSN_STORE_MEMORY): Define.
2010
2011Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2012
2013 * sparc.h: Document new operand type 'x'.
2014
2015Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2016
2017 * i960.h (I_CX2): New instruction category. It includes
2018 instructions available on Cx and Jx processors.
2019 (I_JX): New instruction category, for JX-only instructions.
2020 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2021 Jx-only instructions, in I_JX category.
2022
2023Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2024
2025 * ns32k.h (endop): Made pointer const too.
2026
2027Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2028
2029 * ns32k.h: Drop Q operand type as there is no correct use
2030 for it. Add I and Z operand types which allow better checking.
2031
2032Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2033
2034 * h8300.h (xor.l) :fix bit pattern.
2035 (L_2): New size of operand.
2036 (trapa): Use it.
2037
2038Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2039
2040 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2041
2042Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2043
2044 * sparc.h: Include v9 definitions.
2045
2046Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2047
2048 * m68k.h (m68060): Defined.
2049 (m68040up, mfloat, mmmu): Include it.
2050 (struct m68k_opcode): Widen `arch' field.
2051 (m68k_opcodes): Updated for M68060. Removed comments that were
2052 instructions commented out by "JF" years ago.
2053
2054Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2055
2056 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2057 add a one-bit `flags' field.
2058 (F_ALIAS): New macro.
2059
2060Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2061
2062 * h8300.h (dec, inc): Get encoding right.
2063
2064Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2065
2066 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2067 a flag instead.
2068 (PPC_OPERAND_SIGNED): Define.
2069 (PPC_OPERAND_SIGNOPT): Define.
2070
2071Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2072
2073 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2074 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2075
2076Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2077
2078 * i386.h: Reverse last change. It'll be handled in gas instead.
2079
2080Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2081
2082 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2083 slower on the 486 and used the implicit shift count despite the
2084 explicit operand. The one-operand form is still available to get
2085 the shorter form with the implicit shift count.
2086
2087Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2088
2089 * hppa.h: Fix typo in fstws arg string.
2090
2091Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2092
2093 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2094
2095Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2096
2097 * ppc.h (PPC_OPCODE_601): Define.
2098
2099Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2100
2101 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2102 (so we can determine valid completers for both addb and addb[tf].)
2103
2104 * hppa.h (xmpyu): No floating point format specifier for the
2105 xmpyu instruction.
2106
2107Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2108
2109 * ppc.h (PPC_OPERAND_NEXT): Define.
2110 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2111 (struct powerpc_macro): Define.
2112 (powerpc_macros, powerpc_num_macros): Declare.
2113
2114Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2115
2116 * ppc.h: New file. Header file for PowerPC opcode table.
2117
2118Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2119
2120 * hppa.h: More minor template fixes for sfu and copr (to allow
2121 for easier disassembly).
2122
2123 * hppa.h: Fix templates for all the sfu and copr instructions.
2124
2125Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2126
2127 * i386.h (push): Permit Imm16 operand too.
2128
2129Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2130
2131 * h8300.h (andc): Exists in base arch.
2132
2133Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2134
2135 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2136 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2137
2138Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2139
2140 * hppa.h: Add FP quadword store instructions.
2141
2142Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2143
2144 * mips.h: (M_J_A): Added.
2145 (M_LA): Removed.
2146
2147Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2148
2149 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2150 <mellon@pepper.ncd.com>.
2151
2152Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2153
2154 * hppa.h: Immediate field in probei instructions is unsigned,
2155 not low-sign extended.
2156
2157Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2158
2159 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2160
2161Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2162
2163 * i386.h: Add "fxch" without operand.
2164
2165Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2166
2167 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2168
2169Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2170
2171 * hppa.h: Add gfw and gfr to the opcode table.
2172
2173Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2174
2175 * m88k.h: extended to handle m88110.
2176
2177Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2178
2179 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2180 addresses.
2181
2182Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2183
2184 * i960.h (i960_opcodes): Properly bracket initializers.
2185
2186Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2187
2188 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2189
2190Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2191
2192 * m68k.h (two): Protect second argument with parentheses.
2193
2194Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2195
2196 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2197 Deleted old in/out instructions in "#if 0" section.
2198
2199Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2200
2201 * i386.h (i386_optab): Properly bracket initializers.
2202
2203Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2204
2205 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2206 Jeff Law, law@cs.utah.edu).
2207
2208Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2209
2210 * i386.h (lcall): Accept Imm32 operand also.
2211
2212Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2213
2214 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2215 (M_DABS): Added.
2216
2217Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2218
2219 * mips.h (INSN_*): Changed values. Removed unused definitions.
2220 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2221 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2222 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2223 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2224 (M_*): Added new values for r6000 and r4000 macros.
2225 (ANY_DELAY): Removed.
2226
2227Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2228
2229 * mips.h: Added M_LI_S and M_LI_SS.
2230
2231Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2232
2233 * h8300.h: Get some rare mov.bs correct.
2234
2235Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2236
2237 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2238 been included.
2239
2240Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2241
2242 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2243 jump instructions, for use in disassemblers.
2244
2245Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2246
2247 * m88k.h: Make bitfields just unsigned, not unsigned long or
2248 unsigned short.
2249
2250Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2251
2252 * hppa.h: New argument type 'y'. Use in various float instructions.
2253
2254Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2255
2256 * hppa.h (break): First immediate field is unsigned.
2257
2258 * hppa.h: Add rfir instruction.
2259
2260Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2261
2262 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2263
2264Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2265
2266 * mips.h: Reworked the hazard information somewhat, and fixed some
2267 bugs in the instruction hazard descriptions.
2268
2269Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2270
2271 * m88k.h: Corrected a couple of opcodes.
2272
2273Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2274
2275 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2276 new version includes instruction hazard information, but is
2277 otherwise reasonably similar.
2278
2279Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2280
2281 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2282
2283Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2284
2285 Patches from Jeff Law, law@cs.utah.edu:
2286 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2287 Make the tables be the same for the following instructions:
2288 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2289 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2290 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2291 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2292 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2293 "fcmp", and "ftest".
2294
2295 * hppa.h: Make new and old tables the same for "break", "mtctl",
2296 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2297 Fix typo in last patch. Collapse several #ifdefs into a
2298 single #ifdef.
2299
2300 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2301 of the comments up-to-date.
2302
2303 * hppa.h: Update "free list" of letters and update
2304 comments describing each letter's function.
2305
4f1d9bd8
NC		 2306Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2307
2308 * h8300.h: Lots of little fixes for the h8/300h.
2309
2310Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2311
2312 Support for H8/300-H
2313 * h8300.h: Lots of new opcodes.
2314
252b5132
RH		 2315Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2316
2317 * h8300.h: checkpoint, includes H8/300-H opcodes.
2318
2319Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2320
2321 * Patches from Jeffrey Law <law@cs.utah.edu>.
2322 * hppa.h: Rework single precision FP
2323 instructions so that they correctly disassemble code
2324 PA1.1 code.
2325
2326Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2327
2328 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2329 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2330
2331Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2332
2333 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2334 gdb will define it for now.
2335
2336Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2337
2338 * sparc.h: Don't end enumerator list with comma.
2339
2340Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2341
2342 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2343 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2344 ("bc2t"): Correct typo.
2345 ("[ls]wc[023]"): Use T rather than t.
2346 ("c[0123]"): Define general coprocessor instructions.
2347
2348Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2349
2350 * m68k.h: Move split point for gcc compilation more towards
2351 middle.
2352
2353Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2354
2355 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2356 simply wrong, ics, rfi, & rfsvc were missing).
2357 Add "a" to opr_ext for "bb". Doc fix.
2358
2359Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2360
2361 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2362 * mips.h: Add casts, to suppress warnings about shifting too much.
2363 * m68k.h: Document the placement code '9'.
2364
2365Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2366
2367 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2368 allows callers to break up the large initialized struct full of
2369 opcodes into two half-sized ones. This permits GCC to compile
2370 this module, since it takes exponential space for initializers.
2371 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2372
2373Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2374
2375 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2376 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2377 initialized structs in it.
2378
2379Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2380
2381 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2382 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2383 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2384
2385Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2386
2387 * mips.h: document "i" and "j" operands correctly.
2388
2389Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2390
2391 * mips.h: Removed endianness dependency.
2392
2393Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2394
2395 * h8300.h: include info on number of cycles per instruction.
2396
2397Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2398
2399 * hppa.h: Move handy aliases to the front. Fix masks for extract
2400 and deposit instructions.
2401
2402Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2403
2404 * i386.h: accept shld and shrd both with and without the shift
2405 count argument, which is always %cl.
2406
2407Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2408
2409 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2410 (one_byte_segment_defaults, two_byte_segment_defaults,
2411 i386_prefixtab_end): Ditto.
2412
2413Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2414
2415 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2416 for operand 2; from John Carr, jfc@dsg.dec.com.
2417
2418Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2419
2420 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2421 always use 16-bit offsets. Makes calculated-size jump tables
2422 feasible.
2423
2424Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2425
2426 * i386.h: Fix one-operand forms of in* and out* patterns.
2427
2428Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2429
2430 * m68k.h: Added CPU32 support.
2431
2432Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2433
2434 * mips.h (break): Disassemble the argument. Patch from
2435 jonathan@cs.stanford.edu (Jonathan Stone).
2436
2437Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2438
2439 * m68k.h: merged Motorola and MIT syntax.
2440
2441Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2442
2443 * m68k.h (pmove): make the tests less strict, the 68k book is
2444 wrong.
2445
2446Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2447
2448 * m68k.h (m68ec030): Defined as alias for 68030.
2449 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2450 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2451 them. Tightened description of "fmovex" to distinguish it from
2452 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2453 up descriptions that claimed versions were available for chips not
2454 supporting them. Added "pmovefd".
2455
2456Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2457
2458 * m68k.h: fix where the . goes in divull
2459
2460Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2461
2462 * m68k.h: the cas2 instruction is supposed to be written with
2463 indirection on the last two operands, which can be either data or
2464 address registers. Added a new operand type 'r' which accepts
2465 either register type. Added new cases for cas2l and cas2w which
2466 use them. Corrected masks for cas2 which failed to recognize use
2467 of address register.
2468
2469Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2470
2471 * m68k.h: Merged in patches (mostly m68040-specific) from
2472 Colin Smith <colin@wrs.com>.
2473
2474 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2475 base). Also cleaned up duplicates, re-ordered instructions for
2476 the sake of dis-assembling (so aliases come after standard names).
2477 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2478
2479Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2480
2481 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2482 all missing .s
2483
2484Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2485
2486 * sparc.h: Moved tables to BFD library.
2487
2488 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2489
2490Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2491
2492 * h8300.h: Finish filling in all the holes in the opcode table,
2493 so that the Lucid C compiler can digest this as well...
2494
2495Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2496
2497 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2498 Fix opcodes on various sizes of fild/fist instructions
2499 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2500 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2501
2502Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2503
2504 * h8300.h: Fill in all the holes in the opcode table so that the
2505 losing HPUX C compiler can digest this...
2506
2507Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2508
2509 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2510 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2511
2512Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2513
2514 * sparc.h: Add new architecture variant sparclite; add its scan
2515 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2516
2517Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2518
2519 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2520 fy@lucid.com).
2521
2522Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2523
2524 * rs6k.h: New version from IBM (Metin).
2525
2526Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2527
2528 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2529 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2530
2531Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2532
2533 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2534
2535Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2536
2537 * m68k.h (one, two): Cast macro args to unsigned to suppress
2538 complaints from compiler and lint about integer overflow during
2539 shift.
2540
2541Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2542
2543 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2544
2545Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2546
2547 * mips.h: Make bitfield layout depend on the HOST compiler,
2548 not on the TARGET system.
2549
2550Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2551
2552 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2553 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2554 <TRANLE@INTELLICORP.COM>.
2555
2556Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2557
2558 * h8300.h: turned op_type enum into #define list
2559
2560Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2561
2562 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2563 similar instructions -- they've been renamed to "fitoq", etc.
2564 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2565 number of arguments.
2566 * h8300.h: Remove extra ; which produces compiler warning.
2567
2568Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2569
2570 * sparc.h: fix opcode for tsubcctv.
2571
2572Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2573
2574 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2575
2576Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2577
2578 * sparc.h (nop): Made the 'lose' field be even tighter,
2579 so only a standard 'nop' is disassembled as a nop.
2580
2581Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2582
2583 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2584 disassembled as a nop.
2585
4f1d9bd8
NC		 2586Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2587
2588 * m68k.h, sparc.h: ANSIfy enums.
2589
252b5132
RH		 2590Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2591
2592 * sparc.h: fix a typo.
2593
2594Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2595
2596 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2597 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 2598 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH		 2599
2600\f
2601Local Variables:
2602version-control: never
2603End:
GDB Binutils - Deliverables
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