Commit | Line | Data |
---|---|---|
df8b2c02 DE |
1 | /* Header file for targets using CGEN: Cpu tools GENerator. |
2 | ||
f1ffcb32 | 3 | Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. |
df8b2c02 DE |
4 | |
5 | This file is part of GDB, the GNU debugger, and the GNU Binutils. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
19d45995 DE |
17 | You should have received a copy of the GNU General Public License along |
18 | with this program; if not, write to the Free Software Foundation, Inc., | |
19 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
df8b2c02 DE |
20 | |
21 | #ifndef CGEN_H | |
22 | #define CGEN_H | |
23 | ||
f1ffcb32 DE |
24 | /* ??? This file requires bfd.h but only to get bfd_vma. |
25 | Seems like an awful lot to require just to get such a fundamental type. | |
26 | Perhaps the definition of bfd_vma can be moved outside of bfd.h. | |
27 | Or perhaps one could duplicate its definition in another file. | |
28 | Until such time, this file conditionally compiles definitions that require | |
29 | bfd_vma using BFD_VERSION. */ | |
30 | ||
31 | /* Enums must be defined before they can be used. | |
32 | Allow them to be used in struct definitions, even though the enum must | |
33 | be defined elsewhere. | |
b1673d72 DE |
34 | If CGEN_ARCH isn't defined, this file is being included by something other |
35 | than <arch>-desc.h. */ | |
f1ffcb32 | 36 | |
b1673d72 | 37 | /* Prepend the arch name, defined in <arch>-desc.h, and _cgen_ to symbol S. |
df8b2c02 | 38 | The lack of spaces in the arg list is important for non-stdc systems. |
b1673d72 DE |
39 | This file is included by <arch>-desc.h. |
40 | It can be included independently of <arch>-desc.h, in which case the arch | |
df8b2c02 DE |
41 | dependent portions will be declared as "unknown_cgen_foo". */ |
42 | ||
43 | #ifndef CGEN_SYM | |
a2f256c4 | 44 | #define CGEN_SYM(s) CONCAT3 (unknown,_cgen_,s) |
df8b2c02 DE |
45 | #endif |
46 | ||
47 | /* This file contains the static (unchanging) pieces and as much other stuff | |
48 | as we can reasonably put here. It's generally cleaner to put stuff here | |
49 | rather than having it machine generated if possible. */ | |
50 | ||
51 | /* The assembler syntax is made up of expressions (duh...). | |
52 | At the lowest level the values are mnemonics, register names, numbers, etc. | |
53 | Above that are subexpressions, if any (an example might be the | |
f1ffcb32 DE |
54 | "effective address" in m68k cpus). Subexpressions are wip. |
55 | At the second highest level are the insns themselves. Above that are | |
56 | pseudo-insns, synthetic insns, and macros, if any. */ | |
df8b2c02 DE |
57 | \f |
58 | /* Lots of cpu's have a fixed insn size, or one which rarely changes, | |
59 | and it's generally easier to handle these by treating the insn as an | |
60 | integer type, rather than an array of characters. So we allow targets | |
3d9044e2 DE |
61 | to control this. When an integer type the value is in host byte order, |
62 | when an array of characters the value is in target byte order. */ | |
df8b2c02 | 63 | |
3d9044e2 DE |
64 | typedef unsigned int CGEN_INSN_INT; |
65 | #if CGEN_INT_INSN_P | |
66 | typedef CGEN_INSN_INT CGEN_INSN_BYTES; | |
67 | typedef CGEN_INSN_INT *CGEN_INSN_BYTES_PTR; | |
df8b2c02 | 68 | #else |
3d9044e2 DE |
69 | typedef unsigned char *CGEN_INSN_BYTES; |
70 | typedef unsigned char *CGEN_INSN_BYTES_PTR; | |
df8b2c02 DE |
71 | #endif |
72 | ||
73 | #ifdef __GNUC__ | |
f1ffcb32 | 74 | #define CGEN_INLINE __inline__ |
df8b2c02 DE |
75 | #else |
76 | #define CGEN_INLINE | |
77 | #endif | |
78 | ||
b61df026 NC |
79 | enum cgen_endian |
80 | { | |
df8b2c02 DE |
81 | CGEN_ENDIAN_UNKNOWN, |
82 | CGEN_ENDIAN_LITTLE, | |
83 | CGEN_ENDIAN_BIG | |
84 | }; | |
ca2b987f | 85 | |
ca2b987f | 86 | /* Forward decl. */ |
f1ffcb32 | 87 | |
ca2b987f | 88 | typedef struct cgen_insn CGEN_INSN; |
329af459 DE |
89 | |
90 | /* Opaque pointer version for use by external world. */ | |
f1ffcb32 DE |
91 | |
92 | typedef struct cgen_cpu_desc *CGEN_CPU_DESC; | |
df8b2c02 DE |
93 | \f |
94 | /* Attributes. | |
f1ffcb32 DE |
95 | Attributes are used to describe various random things associated with |
96 | an object (ifield, hardware, operand, insn, whatever) and are specified | |
97 | as name/value pairs. | |
98 | Integer attributes computed at compile time are currently all that's | |
99 | supported, though adding string attributes and run-time computation is | |
100 | straightforward. Integer attribute values are always host int's | |
101 | (signed or unsigned). For portability, this means 32 bits. | |
102 | Integer attributes are further categorized as boolean, bitset, integer, | |
103 | and enum types. Boolean attributes appear frequently enough that they're | |
104 | recorded in one host int. This limits the maximum number of boolean | |
105 | attributes to 32, though that's a *lot* of attributes. */ | |
106 | ||
107 | /* Type of attribute values. */ | |
108 | ||
109 | typedef int CGEN_ATTR_VALUE_TYPE; | |
df8b2c02 DE |
110 | |
111 | /* Struct to record attribute information. */ | |
f1ffcb32 | 112 | |
b61df026 NC |
113 | typedef struct |
114 | { | |
f1ffcb32 DE |
115 | /* Number of non-boolean attributes. */ |
116 | unsigned int num_nonbools; | |
117 | /* Boolean attributes. */ | |
df8b2c02 | 118 | unsigned int bool; |
f1ffcb32 DE |
119 | /* Non-boolean integer attributes. */ |
120 | CGEN_ATTR_VALUE_TYPE nonbool[1]; | |
df8b2c02 DE |
121 | } CGEN_ATTR; |
122 | ||
123 | /* Define a structure member for attributes with N non-boolean entries. | |
124 | The attributes are sorted so that the non-boolean ones come first. | |
f1ffcb32 DE |
125 | There is no maximum number of non-boolean attributes. |
126 | There is a maximum of 32 boolean attributes (since they are all recorded | |
127 | in one host int). */ | |
128 | ||
df8b2c02 | 129 | #define CGEN_ATTR_TYPE(n) \ |
f1ffcb32 DE |
130 | struct { unsigned int num_nonbools; \ |
131 | unsigned int bool; \ | |
132 | CGEN_ATTR_VALUE_TYPE nonbool[(n) ? (n) : 1]; } | |
df8b2c02 | 133 | |
3d9044e2 | 134 | /* Return the boolean attributes. */ |
f1ffcb32 | 135 | |
3d9044e2 DE |
136 | #define CGEN_ATTR_BOOLS(a) ((a)->bool) |
137 | ||
f1ffcb32 DE |
138 | /* Boolean attribute numbers are offset by this much. */ |
139 | ||
140 | #define CGEN_ATTR_BOOL_OFFSET 32 | |
141 | ||
142 | /* Given a boolean attribute number, return its mask. */ | |
143 | ||
144 | #define CGEN_ATTR_MASK(attr) (1 << ((attr) - CGEN_ATTR_BOOL_OFFSET)) | |
df8b2c02 | 145 | |
030f419b | 146 | /* Return the value of boolean attribute ATTR in ATTRS. */ |
f1ffcb32 DE |
147 | |
148 | #define CGEN_BOOL_ATTR(attrs, attr) ((CGEN_ATTR_MASK (attr) & (attrs)) != 0) | |
030f419b | 149 | |
df8b2c02 | 150 | /* Return value of attribute ATTR in ATTR_TABLE for OBJ. |
f1ffcb32 DE |
151 | OBJ is a pointer to the entity that has the attributes (not used at present |
152 | but is reserved for future purposes). */ | |
153 | ||
df8b2c02 | 154 | #define CGEN_ATTR_VALUE(obj, attr_table, attr) \ |
f1ffcb32 | 155 | ((unsigned int) (attr) < CGEN_ATTR_BOOL_OFFSET \ |
df8b2c02 | 156 | ? ((attr_table)->nonbool[attr]) \ |
f1ffcb32 | 157 | : ((CGEN_ATTR_BOOLS (attr_table) & CGEN_ATTR_MASK (attr)) != 0)) |
19d45995 DE |
158 | |
159 | /* Attribute name/value tables. | |
f1ffcb32 | 160 | These are used to assist parsing of descriptions at run-time. */ |
19d45995 | 161 | |
b61df026 NC |
162 | typedef struct |
163 | { | |
164 | const char * name; | |
f1ffcb32 | 165 | CGEN_ATTR_VALUE_TYPE value; |
19d45995 DE |
166 | } CGEN_ATTR_ENTRY; |
167 | ||
f1ffcb32 | 168 | /* For each domain (ifld,hw,operand,insn), list of attributes. */ |
19d45995 | 169 | |
b61df026 NC |
170 | typedef struct |
171 | { | |
030f419b | 172 | const char * name; |
f1ffcb32 | 173 | const CGEN_ATTR_ENTRY * dfault; |
b61df026 | 174 | const CGEN_ATTR_ENTRY * vals; |
19d45995 | 175 | } CGEN_ATTR_TABLE; |
df8b2c02 DE |
176 | \f |
177 | /* Parse result (also extraction result). | |
178 | ||
179 | The result of parsing an insn is stored here. | |
180 | To generate the actual insn, this is passed to the insert handler. | |
181 | When printing an insn, the result of extraction is stored here. | |
182 | To print the insn, this is passed to the print handler. | |
183 | ||
184 | It is machine generated so we don't define it here, | |
185 | but we do need a forward decl for the handler fns. | |
186 | ||
187 | There is one member for each possible field in the insn. | |
188 | The type depends on the field. | |
189 | Also recorded here is the computed length of the insn for architectures | |
190 | where it varies. | |
191 | */ | |
192 | ||
42d56c40 | 193 | typedef struct cgen_fields CGEN_FIELDS; |
df8b2c02 DE |
194 | |
195 | /* Total length of the insn, as recorded in the `fields' struct. */ | |
196 | /* ??? The field insert handler has lots of opportunities for optimization | |
197 | if it ever gets inlined. On architectures where insns all have the same | |
198 | size, may wish to detect that and make this macro a constant - to allow | |
199 | further optimizations. */ | |
f1ffcb32 | 200 | |
df8b2c02 DE |
201 | #define CGEN_FIELDS_BITSIZE(fields) ((fields)->length) |
202 | \f | |
3d9044e2 DE |
203 | /* Extraction support for variable length insn sets. */ |
204 | ||
205 | /* When disassembling we don't know the number of bytes to read at the start. | |
f1ffcb32 | 206 | So the first CGEN_BASE_INSN_SIZE bytes are read at the start and the rest |
3d9044e2 DE |
207 | are read when needed. This struct controls this. It is basically the |
208 | disassemble_info stuff, except that we provide a cache for values already | |
209 | read (since bytes can typically be read several times to fetch multiple | |
210 | operands that may be in them), and that extraction of fields is needed | |
211 | in contexts other than disassembly. */ | |
212 | ||
213 | typedef struct { | |
214 | /* A pointer to the disassemble_info struct. | |
215 | We don't require dis-asm.h so we use PTR for the type here. | |
216 | If NULL, BYTES is full of valid data (VALID == -1). */ | |
217 | PTR dis_info; | |
218 | /* Points to a working buffer of sufficient size. */ | |
f1ffcb32 DE |
219 | unsigned char *insn_bytes; |
220 | /* Mask of bytes that are valid in INSN_BYTES. */ | |
3d9044e2 DE |
221 | unsigned int valid; |
222 | } CGEN_EXTRACT_INFO; | |
223 | \f | |
df8b2c02 | 224 | /* Associated with each insn or expression is a set of "handlers" for |
ca2b987f DE |
225 | performing operations like parsing, printing, etc. These require a bfd_vma |
226 | value to be passed around but we don't want all applications to need bfd.h. | |
227 | So this stuff is only provided if bfd.h has been included. */ | |
df8b2c02 | 228 | |
df8b2c02 | 229 | /* Parse handler. |
f1ffcb32 | 230 | CD is a cpu table descriptor. |
329af459 DE |
231 | INSN is a pointer to a struct describing the insn being parsed. |
232 | STRP is a pointer to a pointer to the text being parsed. | |
233 | FIELDS is a pointer to a cgen_fields struct in which the results are placed. | |
234 | If the expression is successfully parsed, *STRP is updated. | |
235 | If not it is left alone. | |
df8b2c02 | 236 | The result is NULL if success or an error message. */ |
329af459 | 237 | typedef const char * (cgen_parse_fn) |
f1ffcb32 DE |
238 | PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *insn_, |
239 | const char **strp_, CGEN_FIELDS *fields_)); | |
df8b2c02 DE |
240 | |
241 | /* Insert handler. | |
f1ffcb32 | 242 | CD is a cpu table descriptor. |
329af459 DE |
243 | INSN is a pointer to a struct describing the insn being parsed. |
244 | FIELDS is a pointer to a cgen_fields struct from which the values | |
245 | are fetched. | |
246 | INSNP is a pointer to a buffer in which to place the insn. | |
247 | PC is the pc value of the insn. | |
652af042 | 248 | The result is an error message or NULL if success. */ |
f1ffcb32 DE |
249 | |
250 | #ifdef BFD_VERSION | |
329af459 | 251 | typedef const char * (cgen_insert_fn) |
f1ffcb32 DE |
252 | PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *insn_, |
253 | CGEN_FIELDS *fields_, CGEN_INSN_BYTES_PTR insnp_, | |
254 | bfd_vma pc_)); | |
255 | #else | |
256 | typedef const char * (cgen_insert_fn) (); | |
257 | #endif | |
df8b2c02 DE |
258 | |
259 | /* Extract handler. | |
f1ffcb32 | 260 | CD is a cpu table descriptor. |
329af459 | 261 | INSN is a pointer to a struct describing the insn being parsed. |
df8b2c02 DE |
262 | The second argument is a pointer to a struct controlling extraction |
263 | (only used for variable length insns). | |
3d9044e2 | 264 | EX_INFO is a pointer to a struct for controlling reading of further |
329af459 | 265 | bytes for the insn. |
3d9044e2 | 266 | BASE_INSN is the first CGEN_BASE_INSN_SIZE bytes (host order). |
329af459 DE |
267 | FIELDS is a pointer to a cgen_fields struct in which the results are placed. |
268 | PC is the pc value of the insn. | |
269 | The result is the length of the insn in bits or zero if not recognized. */ | |
f1ffcb32 DE |
270 | |
271 | #ifdef BFD_VERSION | |
329af459 | 272 | typedef int (cgen_extract_fn) |
f1ffcb32 DE |
273 | PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *insn_, |
274 | CGEN_EXTRACT_INFO *ex_info_, CGEN_INSN_INT base_insn_, | |
275 | CGEN_FIELDS *fields_, bfd_vma pc_)); | |
276 | #else | |
277 | typedef int (cgen_extract_fn) (); | |
278 | #endif | |
329af459 DE |
279 | |
280 | /* Print handler. | |
f1ffcb32 | 281 | CD is a cpu table descriptor. |
329af459 DE |
282 | INFO is a pointer to the disassembly info. |
283 | Eg: disassemble_info. It's defined as `PTR' so this file can be included | |
284 | without dis-asm.h. | |
285 | INSN is a pointer to a struct describing the insn being printed. | |
286 | FIELDS is a pointer to a cgen_fields struct. | |
287 | PC is the pc value of the insn. | |
288 | LEN is the length of the insn, in bits. */ | |
f1ffcb32 DE |
289 | |
290 | #ifdef BFD_VERSION | |
329af459 | 291 | typedef void (cgen_print_fn) |
f1ffcb32 DE |
292 | PARAMS ((CGEN_CPU_DESC, PTR info_, const CGEN_INSN *insn_, |
293 | CGEN_FIELDS *fields_, bfd_vma pc_, int len_)); | |
294 | #else | |
295 | typedef void (cgen_print_fn) (); | |
296 | #endif | |
df8b2c02 | 297 | |
f1ffcb32 | 298 | /* Parse/insert/extract/print handlers. |
df8b2c02 | 299 | |
f1ffcb32 DE |
300 | Indices into the handler tables. |
301 | We could use pointers here instead, but 90% of them are generally identical | |
302 | and that's a lot of redundant data. Making these unsigned char indices | |
303 | into tables of pointers saves a bit of space. | |
304 | Using indices also keeps assembler code out of the disassembler and | |
305 | vice versa. */ | |
306 | ||
307 | struct cgen_opcode_handler | |
b61df026 | 308 | { |
df8b2c02 | 309 | unsigned char parse, insert, extract, print; |
df8b2c02 DE |
310 | }; |
311 | \f | |
19d45995 | 312 | /* Assembler interface. |
df8b2c02 | 313 | |
19d45995 DE |
314 | The interface to the assembler is intended to be clean in the sense that |
315 | libopcodes.a is a standalone entity and could be used with any assembler. | |
316 | Not that one would necessarily want to do that but rather that it helps | |
317 | keep a clean interface. The interface will obviously be slanted towards | |
318 | GAS, but at least it's a start. | |
f1ffcb32 | 319 | ??? Note that one possible user of the assembler besides GAS is GDB. |
df8b2c02 | 320 | |
19d45995 DE |
321 | Parsing is controlled by the assembler which calls |
322 | CGEN_SYM (assemble_insn). If it can parse and build the entire insn | |
323 | it doesn't call back to the assembler. If it needs/wants to call back | |
329af459 | 324 | to the assembler, cgen_parse_operand_fn is called which can either |
df8b2c02 | 325 | |
19d45995 DE |
326 | - return a number to be inserted in the insn |
327 | - return a "register" value to be inserted | |
328 | (the register might not be a register per pe) | |
329 | - queue the argument and return a marker saying the expression has been | |
330 | queued (eg: a fix-up) | |
331 | - return an error message indicating the expression wasn't recognizable | |
332 | ||
333 | The result is an error message or NULL for success. | |
334 | The parsed value is stored in the bfd_vma *. */ | |
df8b2c02 | 335 | |
19d45995 | 336 | /* Values for indicating what the caller wants. */ |
f1ffcb32 | 337 | |
b61df026 NC |
338 | enum cgen_parse_operand_type |
339 | { | |
340 | CGEN_PARSE_OPERAND_INIT, | |
341 | CGEN_PARSE_OPERAND_INTEGER, | |
19d45995 DE |
342 | CGEN_PARSE_OPERAND_ADDRESS |
343 | }; | |
df8b2c02 | 344 | |
ca2b987f | 345 | /* Values for indicating what was parsed. */ |
f1ffcb32 | 346 | |
b61df026 NC |
347 | enum cgen_parse_operand_result |
348 | { | |
349 | CGEN_PARSE_OPERAND_RESULT_NUMBER, | |
350 | CGEN_PARSE_OPERAND_RESULT_REGISTER, | |
351 | CGEN_PARSE_OPERAND_RESULT_QUEUED, | |
352 | CGEN_PARSE_OPERAND_RESULT_ERROR | |
19d45995 | 353 | }; |
df8b2c02 | 354 | |
ca2b987f | 355 | #ifdef BFD_VERSION /* Don't require bfd.h unnecessarily. */ |
329af459 | 356 | typedef const char * (cgen_parse_operand_fn) |
f1ffcb32 | 357 | PARAMS ((CGEN_CPU_DESC, |
329af459 | 358 | enum cgen_parse_operand_type, const char **, int, int, |
19d45995 | 359 | enum cgen_parse_operand_result *, bfd_vma *)); |
329af459 DE |
360 | #else |
361 | typedef const char * (cgen_parse_operand_fn) (); | |
df8b2c02 DE |
362 | #endif |
363 | ||
329af459 | 364 | /* Set the cgen_parse_operand_fn callback. */ |
f1ffcb32 | 365 | |
329af459 | 366 | extern void cgen_set_parse_operand_fn |
f1ffcb32 | 367 | PARAMS ((CGEN_CPU_DESC, cgen_parse_operand_fn)); |
df8b2c02 | 368 | |
329af459 | 369 | /* Called before trying to match a table entry with the insn. */ |
f1ffcb32 DE |
370 | |
371 | extern void cgen_init_parse_operand PARAMS ((CGEN_CPU_DESC)); | |
df8b2c02 DE |
372 | \f |
373 | /* Operand values (keywords, integers, symbols, etc.) */ | |
374 | ||
375 | /* Types of assembler elements. */ | |
376 | ||
b61df026 NC |
377 | enum cgen_asm_type |
378 | { | |
df8b2c02 DE |
379 | CGEN_ASM_KEYWORD, CGEN_ASM_MAX |
380 | }; | |
381 | ||
382 | /* List of hardware elements. */ | |
383 | ||
b61df026 NC |
384 | typedef struct cgen_hw_entry |
385 | { | |
42d56c40 DE |
386 | /* The type of this entry, one of `enum hw_type'. |
387 | This is an int and not the enum as the latter may not be declared yet. */ | |
030f419b | 388 | int type; |
42d56c40 | 389 | const struct cgen_hw_entry * next; |
030f419b DE |
390 | char * name; |
391 | enum cgen_asm_type asm_type; | |
392 | PTR asm_data; | |
3d9044e2 DE |
393 | #ifndef CGEN_HW_NBOOL_ATTRS |
394 | #define CGEN_HW_NBOOL_ATTRS 1 | |
395 | #endif | |
f1ffcb32 | 396 | CGEN_ATTR_TYPE (CGEN_HW_NBOOL_ATTRS) attrs; |
3d9044e2 | 397 | #define CGEN_HW_ATTRS(hw) (&(hw)->attrs) |
df8b2c02 DE |
398 | } CGEN_HW_ENTRY; |
399 | ||
3d9044e2 | 400 | /* Return value of attribute ATTR in HW. */ |
f1ffcb32 DE |
401 | |
402 | #define CGEN_HW_ATTR_VALUE(hw, attr) \ | |
403 | CGEN_ATTR_VALUE ((hw), CGEN_HW_ATTRS (hw), (attr)) | |
3d9044e2 | 404 | |
329af459 | 405 | extern const CGEN_HW_ENTRY * cgen_hw_lookup_by_name |
f1ffcb32 | 406 | PARAMS ((CGEN_CPU_DESC, const char *)); |
329af459 | 407 | extern const CGEN_HW_ENTRY * cgen_hw_lookup_by_num |
f1ffcb32 DE |
408 | PARAMS ((CGEN_CPU_DESC, int)); |
409 | ||
410 | /* The operand instance table refers to this directly. */ | |
411 | extern const CGEN_HW_ENTRY CGEN_SYM (hw_table)[]; | |
df8b2c02 | 412 | |
df8b2c02 DE |
413 | /* This struct is used to describe things like register names, etc. */ |
414 | ||
b61df026 NC |
415 | typedef struct cgen_keyword_entry |
416 | { | |
df8b2c02 | 417 | /* Name (as in register name). */ |
b61df026 | 418 | char * name; |
df8b2c02 DE |
419 | |
420 | /* Value (as in register number). | |
421 | The value cannot be -1 as that is used to indicate "not found". | |
422 | IDEA: Have "FUNCTION" attribute? [function is called to fetch value]. */ | |
423 | int value; | |
424 | ||
19d45995 DE |
425 | /* Attributes. |
426 | This should, but technically needn't, appear last. It is a variable sized | |
427 | array in that one architecture may have 1 nonbool attribute and another | |
428 | may have more. Having this last means the non-architecture specific code | |
f1ffcb32 DE |
429 | needn't care. The goal is to eventually record |
430 | attributes in their raw form, evaluate them at run-time, and cache the | |
431 | values, so this worry will go away anyway. */ | |
19d45995 DE |
432 | /* ??? Moving this last should be done by treating keywords like insn lists |
433 | and moving the `next' fields into a CGEN_KEYWORD_LIST struct. */ | |
df8b2c02 | 434 | /* FIXME: Not used yet. */ |
a2f256c4 DE |
435 | #ifndef CGEN_KEYWORD_NBOOL_ATTRS |
436 | #define CGEN_KEYWORD_NBOOL_ATTRS 1 | |
437 | #endif | |
f1ffcb32 | 438 | CGEN_ATTR_TYPE (CGEN_KEYWORD_NBOOL_ATTRS) attrs; |
df8b2c02 DE |
439 | |
440 | /* Next name hash table entry. */ | |
441 | struct cgen_keyword_entry *next_name; | |
442 | /* Next value hash table entry. */ | |
443 | struct cgen_keyword_entry *next_value; | |
444 | } CGEN_KEYWORD_ENTRY; | |
445 | ||
446 | /* Top level struct for describing a set of related keywords | |
447 | (e.g. register names). | |
448 | ||
f1ffcb32 | 449 | This struct supports run-time entry of new values, and hashed lookups. */ |
df8b2c02 | 450 | |
b61df026 NC |
451 | typedef struct cgen_keyword |
452 | { | |
df8b2c02 | 453 | /* Pointer to initial [compiled in] values. */ |
f1ffcb32 | 454 | CGEN_KEYWORD_ENTRY *init_entries; |
b61df026 | 455 | |
df8b2c02 DE |
456 | /* Number of entries in `init_entries'. */ |
457 | unsigned int num_init_entries; | |
b61df026 | 458 | |
df8b2c02 | 459 | /* Hash table used for name lookup. */ |
f1ffcb32 | 460 | CGEN_KEYWORD_ENTRY **name_hash_table; |
b61df026 | 461 | |
df8b2c02 | 462 | /* Hash table used for value lookup. */ |
f1ffcb32 | 463 | CGEN_KEYWORD_ENTRY **value_hash_table; |
b61df026 | 464 | |
df8b2c02 DE |
465 | /* Number of entries in the hash_tables. */ |
466 | unsigned int hash_table_size; | |
b61df026 | 467 | |
19d45995 | 468 | /* Pointer to null keyword "" entry if present. */ |
f1ffcb32 | 469 | const CGEN_KEYWORD_ENTRY *null_entry; |
df8b2c02 DE |
470 | } CGEN_KEYWORD; |
471 | ||
472 | /* Structure used for searching. */ | |
473 | ||
b61df026 NC |
474 | typedef struct |
475 | { | |
df8b2c02 | 476 | /* Table being searched. */ |
f1ffcb32 | 477 | const CGEN_KEYWORD *table; |
b61df026 | 478 | |
df8b2c02 | 479 | /* Specification of what is being searched for. */ |
f1ffcb32 | 480 | const char *spec; |
b61df026 | 481 | |
df8b2c02 DE |
482 | /* Current index in hash table. */ |
483 | unsigned int current_hash; | |
b61df026 | 484 | |
df8b2c02 | 485 | /* Current element in current hash chain. */ |
f1ffcb32 | 486 | CGEN_KEYWORD_ENTRY *current_entry; |
df8b2c02 DE |
487 | } CGEN_KEYWORD_SEARCH; |
488 | ||
489 | /* Lookup a keyword from its name. */ | |
f1ffcb32 DE |
490 | |
491 | const CGEN_KEYWORD_ENTRY *cgen_keyword_lookup_name | |
19d45995 | 492 | PARAMS ((CGEN_KEYWORD *, const char *)); |
f1ffcb32 | 493 | |
df8b2c02 | 494 | /* Lookup a keyword from its value. */ |
f1ffcb32 DE |
495 | |
496 | const CGEN_KEYWORD_ENTRY *cgen_keyword_lookup_value | |
19d45995 | 497 | PARAMS ((CGEN_KEYWORD *, int)); |
f1ffcb32 | 498 | |
df8b2c02 | 499 | /* Add a keyword. */ |
f1ffcb32 | 500 | |
19d45995 | 501 | void cgen_keyword_add PARAMS ((CGEN_KEYWORD *, CGEN_KEYWORD_ENTRY *)); |
f1ffcb32 | 502 | |
df8b2c02 DE |
503 | /* Keyword searching. |
504 | This can be used to retrieve every keyword, or a subset. */ | |
f1ffcb32 | 505 | |
19d45995 DE |
506 | CGEN_KEYWORD_SEARCH cgen_keyword_search_init |
507 | PARAMS ((CGEN_KEYWORD *, const char *)); | |
508 | const CGEN_KEYWORD_ENTRY *cgen_keyword_search_next | |
509 | PARAMS ((CGEN_KEYWORD_SEARCH *)); | |
df8b2c02 DE |
510 | |
511 | /* Operand value support routines. */ | |
329af459 | 512 | |
f1ffcb32 DE |
513 | extern const char *cgen_parse_keyword |
514 | PARAMS ((CGEN_CPU_DESC, const char **, CGEN_KEYWORD *, long *)); | |
329af459 | 515 | #ifdef BFD_VERSION /* Don't require bfd.h unnecessarily. */ |
f1ffcb32 DE |
516 | extern const char *cgen_parse_signed_integer |
517 | PARAMS ((CGEN_CPU_DESC, const char **, int, long *)); | |
518 | extern const char *cgen_parse_unsigned_integer | |
519 | PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); | |
520 | extern const char *cgen_parse_address | |
521 | PARAMS ((CGEN_CPU_DESC, const char **, int, int, | |
329af459 | 522 | enum cgen_parse_operand_result *, bfd_vma *)); |
f1ffcb32 | 523 | extern const char *cgen_validate_signed_integer |
329af459 | 524 | PARAMS ((long, long, long)); |
f1ffcb32 | 525 | extern const char *cgen_validate_unsigned_integer |
329af459 DE |
526 | PARAMS ((unsigned long, unsigned long, unsigned long)); |
527 | #endif | |
df8b2c02 | 528 | \f |
42d56c40 DE |
529 | /* Operand modes. */ |
530 | ||
531 | /* ??? This duplicates the values in arch.h. Revisit. | |
532 | These however need the CGEN_ prefix [as does everything in this file]. */ | |
533 | /* ??? Targets may need to add their own modes so we may wish to move this | |
534 | to <arch>-opc.h, or add a hook. */ | |
535 | ||
536 | enum cgen_mode { | |
f1ffcb32 | 537 | CGEN_MODE_VOID, /* ??? rename simulator's VM to VOID? */ |
42d56c40 DE |
538 | CGEN_MODE_BI, CGEN_MODE_QI, CGEN_MODE_HI, CGEN_MODE_SI, CGEN_MODE_DI, |
539 | CGEN_MODE_UBI, CGEN_MODE_UQI, CGEN_MODE_UHI, CGEN_MODE_USI, CGEN_MODE_UDI, | |
540 | CGEN_MODE_SF, CGEN_MODE_DF, CGEN_MODE_XF, CGEN_MODE_TF, | |
f1ffcb32 DE |
541 | CGEN_MODE_TARGET_MAX, |
542 | CGEN_MODE_INT, CGEN_MODE_UINT, | |
42d56c40 DE |
543 | CGEN_MODE_MAX |
544 | }; | |
545 | ||
546 | /* FIXME: Until simulator is updated. */ | |
f1ffcb32 | 547 | |
42d56c40 DE |
548 | #define CGEN_MODE_VM CGEN_MODE_VOID |
549 | \f | |
df8b2c02 DE |
550 | /* This struct defines each entry in the operand table. */ |
551 | ||
b61df026 NC |
552 | typedef struct cgen_operand |
553 | { | |
19d45995 | 554 | /* Name as it appears in the syntax string. */ |
f1ffcb32 | 555 | char *name; |
df8b2c02 | 556 | |
42d56c40 DE |
557 | /* The hardware element associated with this operand. */ |
558 | const CGEN_HW_ENTRY *hw; | |
559 | ||
560 | /* FIXME: We don't yet record ifield definitions, which we should. | |
561 | When we do it might make sense to delete start/length (since they will | |
562 | be duplicated in the ifield's definition) and replace them with a | |
563 | pointer to the ifield entry. Note that as more complicated situations | |
564 | need to be handled, going more and more with an OOP paradigm will help | |
565 | keep the complication under control. Of course, this was the goal from | |
566 | the start, but getting there in one step was too much too soon. */ | |
567 | ||
f1ffcb32 | 568 | /* Bit position. |
19d45995 | 569 | This is just a hint, and may be unused in more complex operands. |
df8b2c02 DE |
570 | May be unused for a modifier. */ |
571 | unsigned char start; | |
572 | ||
573 | /* The number of bits in the operand. | |
19d45995 | 574 | This is just a hint, and may be unused in more complex operands. |
df8b2c02 DE |
575 | May be unused for a modifier. */ |
576 | unsigned char length; | |
577 | ||
19d45995 DE |
578 | #if 0 /* ??? Interesting idea but relocs tend to get too complicated, |
579 | and ABI dependent, for simple table lookups to work. */ | |
df8b2c02 DE |
580 | /* Ideally this would be the internal (external?) reloc type. */ |
581 | int reloc_type; | |
582 | #endif | |
19d45995 DE |
583 | |
584 | /* Attributes. | |
585 | This should, but technically needn't, appear last. It is a variable sized | |
586 | array in that one architecture may have 1 nonbool attribute and another | |
587 | may have more. Having this last means the non-architecture specific code | |
f1ffcb32 DE |
588 | needn't care, now or tomorrow. The goal is to eventually record |
589 | attributes in their raw form, evaluate them at run-time, and cache the | |
590 | values, so this worry will go away anyway. */ | |
a2f256c4 DE |
591 | #ifndef CGEN_OPERAND_NBOOL_ATTRS |
592 | #define CGEN_OPERAND_NBOOL_ATTRS 1 | |
593 | #endif | |
f1ffcb32 | 594 | CGEN_ATTR_TYPE (CGEN_OPERAND_NBOOL_ATTRS) attrs; |
19d45995 | 595 | #define CGEN_OPERAND_ATTRS(operand) (&(operand)->attrs) |
df8b2c02 DE |
596 | } CGEN_OPERAND; |
597 | ||
598 | /* Return value of attribute ATTR in OPERAND. */ | |
df8b2c02 | 599 | |
f1ffcb32 DE |
600 | #define CGEN_OPERAND_ATTR_VALUE(operand, attr) \ |
601 | CGEN_ATTR_VALUE ((operand), CGEN_OPERAND_ATTRS (operand), (attr)) | |
602 | ||
603 | /* The operand instance table refers to this directly. */ | |
df8b2c02 DE |
604 | extern const CGEN_OPERAND CGEN_SYM (operand_table)[]; |
605 | ||
606 | enum cgen_operand_type; | |
607 | ||
f1ffcb32 | 608 | #define CGEN_OPERAND_INDEX(cd, operand) ((operand) - (cd)->operand_table) |
b1673d72 | 609 | /* FIXME: Rename, arch-desc.h defines this as the typedef of the enum. */ |
f1ffcb32 DE |
610 | #define CGEN_OPERAND_TYPE(cd, operand) \ |
611 | ((enum cgen_operand_type) CGEN_OPERAND_INDEX ((cd), (operand))) | |
612 | #define CGEN_OPERAND_ENTRY(cd, n) (& (cd)->operand_table[n]) | |
df8b2c02 | 613 | \f |
42d56c40 DE |
614 | /* Instruction operand instances. |
615 | ||
616 | For each instruction, a list of the hardware elements that are read and | |
617 | written are recorded. */ | |
618 | ||
619 | /* The type of the instance. */ | |
f1ffcb32 DE |
620 | |
621 | enum cgen_opinst_type { | |
42d56c40 | 622 | /* End of table marker. */ |
f1ffcb32 DE |
623 | CGEN_OPINST_END = 0, |
624 | CGEN_OPINST_INPUT, CGEN_OPINST_OUTPUT | |
42d56c40 DE |
625 | }; |
626 | ||
627 | typedef struct | |
628 | { | |
629 | /* The type of this operand. */ | |
f1ffcb32 | 630 | enum cgen_opinst_type type; |
42d56c40 | 631 | |
3d9044e2 DE |
632 | /* Name of operand. */ |
633 | const char *name; | |
3d9044e2 | 634 | |
42d56c40 DE |
635 | /* The hardware element referenced. */ |
636 | const CGEN_HW_ENTRY *hw; | |
42d56c40 DE |
637 | |
638 | /* The mode in which the operand is being used. */ | |
639 | enum cgen_mode mode; | |
42d56c40 DE |
640 | |
641 | /* The operand table entry or NULL if there is none (i.e. an explicit | |
642 | hardware reference). */ | |
643 | const CGEN_OPERAND *operand; | |
42d56c40 DE |
644 | |
645 | /* If `operand' is NULL, the index (e.g. into array of registers). */ | |
646 | int index; | |
f1ffcb32 DE |
647 | |
648 | /* Attributes. | |
649 | ??? This perhaps should be a real attribute struct but there's | |
650 | no current need, so we save a bit of space and just have a set of | |
651 | flags. The interface is such that this can easily be made attributes | |
652 | should it prove useful. */ | |
653 | unsigned int attrs; | |
654 | #define CGEN_OPINST_ATTRS(opinst) ((opinst)->attrs) | |
655 | /* Return value of attribute ATTR in OPINST. */ | |
656 | #define CGEN_OPINST_ATTR(opinst, attr) \ | |
657 | ((CGEN_OPINST_ATTRS (opinst) & (attr)) != 0) | |
658 | /* Operand is conditionally referenced (read/written). */ | |
659 | #define CGEN_OPINST_COND_REF 1 | |
660 | } CGEN_OPINST; | |
42d56c40 | 661 | \f |
19d45995 DE |
662 | /* Syntax string. |
663 | ||
664 | Each insn format and subexpression has one of these. | |
665 | ||
666 | The syntax "string" consists of characters (n > 0 && n < 128), and operand | |
667 | values (n >= 128), and is terminated by 0. Operand values are 128 + index | |
668 | into the operand table. The operand table doesn't exist in C, per se, as | |
669 | the data is recorded in the parse/insert/extract/print switch statements. */ | |
670 | ||
671 | #ifndef CGEN_MAX_SYNTAX_BYTES | |
672 | #define CGEN_MAX_SYNTAX_BYTES 16 | |
673 | #endif | |
674 | ||
b61df026 NC |
675 | typedef struct |
676 | { | |
19d45995 DE |
677 | unsigned char syntax[CGEN_MAX_SYNTAX_BYTES]; |
678 | } CGEN_SYNTAX; | |
679 | ||
680 | #define CGEN_SYNTAX_STRING(syn) (syn->syntax) | |
681 | #define CGEN_SYNTAX_CHAR_P(c) ((c) < 128) | |
682 | #define CGEN_SYNTAX_CHAR(c) (c) | |
683 | #define CGEN_SYNTAX_FIELD(c) ((c) - 128) | |
deaa0585 | 684 | #define CGEN_SYNTAX_MAKE_FIELD(c) ((c) + 128) |
19d45995 DE |
685 | |
686 | /* ??? I can't currently think of any case where the mnemonic doesn't come | |
687 | first [and if one ever doesn't building the hash tables will be tricky]. | |
688 | However, we treat mnemonics as just another operand of the instruction. | |
689 | A value of 1 means "this is where the mnemonic appears". 1 isn't | |
690 | special other than it's a non-printable ASCII char. */ | |
f1ffcb32 | 691 | |
a2f256c4 DE |
692 | #define CGEN_SYNTAX_MNEMONIC 1 |
693 | #define CGEN_SYNTAX_MNEMONIC_P(ch) ((ch) == CGEN_SYNTAX_MNEMONIC) | |
19d45995 | 694 | \f |
f1ffcb32 DE |
695 | /* Instruction fields. |
696 | ||
697 | ??? We currently don't allow adding fields at run-time. | |
698 | Easy to fix when needed. */ | |
699 | ||
700 | typedef struct cgen_ifld { | |
701 | /* Enum of ifield. */ | |
702 | int num; | |
703 | #define CGEN_IFLD_NUM(f) ((f)->num) | |
704 | ||
705 | /* Name of the field, distinguishes it from all other fields. */ | |
706 | const char *name; | |
707 | #define CGEN_IFLD_NAME(f) ((f)->name) | |
708 | ||
709 | /* Default offset, in bits, from the start of the insn to the word | |
710 | containing the field. */ | |
711 | int word_offset; | |
712 | #define CGEN_IFLD_WORD_OFFSET(f) ((f)->word_offset) | |
713 | ||
714 | /* Default length of the word containing the field. */ | |
715 | int word_size; | |
716 | #define CGEN_IFLD_WORD_SIZE(f) ((f)->word_size) | |
717 | ||
718 | /* Default starting bit number. | |
719 | Whether lsb=0 or msb=0 is determined by CGEN_INSN_LSB0_P. */ | |
720 | int start; | |
721 | #define CGEN_IFLD_START(f) ((f)->start) | |
722 | ||
723 | /* Length of the field, in bits. */ | |
724 | int length; | |
725 | #define CGEN_IFLD_LENGTH(f) ((f)->length) | |
726 | ||
727 | #ifndef CGEN_IFLD_NBOOL_ATTRS | |
728 | #define CGEN_IFLD_NBOOL_ATTRS 1 | |
729 | #endif | |
730 | CGEN_ATTR_TYPE (CGEN_IFLD_NBOOL_ATTRS) attrs; | |
731 | #define CGEN_IFLD_ATTRS(f) (&(f)->attrs) | |
732 | } CGEN_IFLD; | |
733 | ||
734 | /* Return value of attribute ATTR in IFLD. */ | |
735 | #define CGEN_IFLD_ATTR_VALUE(ifld, attr) \ | |
736 | CGEN_ATTR_VALUE ((ifld), CGEN_IFLD_ATTRS (ifld), (attr)) | |
737 | \f | |
738 | /* Instruction data. */ | |
739 | ||
19d45995 DE |
740 | /* Instruction formats. |
741 | ||
742 | Instructions are grouped by format. Associated with an instruction is its | |
f1ffcb32 | 743 | format. Each insn's opcode table entry contains a format table entry. |
a2f256c4 DE |
744 | ??? There is usually very few formats compared with the number of insns, |
745 | so one can reduce the size of the opcode table by recording the format table | |
746 | as a separate entity. Given that we currently don't, format table entries | |
747 | are also distinguished by their operands. This increases the size of the | |
748 | table, but reduces the number of tables. It's all minutiae anyway so it | |
749 | doesn't really matter [at this point in time]. | |
750 | ||
751 | ??? Support for variable length ISA's is wip. */ | |
19d45995 | 752 | |
f1ffcb32 DE |
753 | /* Accompanying each iformat description is a list of its fields. */ |
754 | ||
755 | typedef struct { | |
756 | const CGEN_IFLD *ifld; | |
757 | #define CGEN_IFMT_IFLD_IFLD(ii) ((ii)->ifld) | |
758 | } CGEN_IFMT_IFLD; | |
759 | ||
760 | #ifndef CGEN_MAX_IFMT_OPERANDS | |
761 | #define CGEN_MAX_IFMT_OPERANDS 1 | |
762 | #endif | |
763 | ||
b61df026 NC |
764 | typedef struct |
765 | { | |
19d45995 DE |
766 | /* Length that MASK and VALUE have been calculated to |
767 | [VALUE is recorded elsewhere]. | |
768 | Normally it is CGEN_BASE_INSN_BITSIZE. On [V]LIW architectures where | |
769 | the base insn size may be larger than the size of an insn, this field is | |
770 | less than CGEN_BASE_INSN_BITSIZE. */ | |
771 | unsigned char mask_length; | |
f1ffcb32 | 772 | #define CGEN_IFMT_MASK_LENGTH(ifmt) ((ifmt)->mask_length) |
19d45995 | 773 | |
a2f256c4 | 774 | /* Total length of instruction, in bits. */ |
19d45995 | 775 | unsigned char length; |
f1ffcb32 | 776 | #define CGEN_IFMT_LENGTH(ifmt) ((ifmt)->length) |
19d45995 | 777 | |
a2f256c4 | 778 | /* Mask to apply to the first MASK_LENGTH bits. |
19d45995 DE |
779 | Each insn's value is stored with the insn. |
780 | The first step in recognizing an insn for disassembly is | |
781 | (opcode & mask) == value. */ | |
f1ffcb32 DE |
782 | CGEN_INSN_INT mask; |
783 | #define CGEN_IFMT_MASK(ifmt) ((ifmt)->mask) | |
df8b2c02 | 784 | |
f1ffcb32 DE |
785 | /* Instruction fields. |
786 | +1 for trailing NULL. */ | |
787 | CGEN_IFMT_IFLD iflds[CGEN_MAX_IFMT_OPERANDS + 1]; | |
788 | #define CGEN_IFMT_IFLDS(ifmt) ((ifmt)->iflds) | |
789 | } CGEN_IFMT; | |
790 | ||
791 | /* Instruction values. */ | |
792 | ||
793 | typedef struct | |
b61df026 | 794 | { |
f1ffcb32 DE |
795 | /* The opcode portion of the base insn. */ |
796 | CGEN_INSN_INT base_value; | |
df8b2c02 | 797 | |
f1ffcb32 DE |
798 | #ifdef CGEN_MAX_EXTRA_OPCODE_OPERANDS |
799 | /* Extra opcode values beyond base_value. */ | |
800 | unsigned long ifield_values[CGEN_MAX_EXTRA_OPCODE_OPERANDS]; | |
801 | #endif | |
802 | } CGEN_IVALUE; | |
030f419b | 803 | |
f1ffcb32 DE |
804 | /* Instruction opcode table. |
805 | This contains the syntax and format data of an instruction. */ | |
19d45995 | 806 | |
f1ffcb32 DE |
807 | /* ??? Some ports already have an opcode table yet still need to use the rest |
808 | of what cgen_insn has. Plus keeping the opcode data with the operand | |
809 | instance data can create a pretty big file. So we keep them separately. | |
810 | Not sure this is a good idea in the long run. */ | |
811 | ||
812 | typedef struct | |
813 | { | |
814 | /* Indices into parse/insert/extract/print handler tables. */ | |
815 | struct cgen_opcode_handler handlers; | |
816 | #define CGEN_OPCODE_HANDLERS(opc) (& (opc)->handlers) | |
19d45995 | 817 | |
a2f256c4 | 818 | /* Syntax string. */ |
f1ffcb32 DE |
819 | CGEN_SYNTAX syntax; |
820 | #define CGEN_OPCODE_SYNTAX(opc) (& (opc)->syntax) | |
19d45995 | 821 | |
a2f256c4 | 822 | /* Format entry. */ |
f1ffcb32 DE |
823 | const CGEN_IFMT *format; |
824 | #define CGEN_OPCODE_FORMAT(opc) ((opc)->format) | |
825 | #define CGEN_OPCODE_MASK_BITSIZE(opc) CGEN_IFMT_MASK_LENGTH (CGEN_OPCODE_FORMAT (opc)) | |
826 | #define CGEN_OPCODE_BITSIZE(opc) CGEN_IFMT_LENGTH (CGEN_OPCODE_FORMAT (opc)) | |
827 | #define CGEN_OPCODE_IFLDS(opc) CGEN_IFMT_IFLDS (CGEN_OPCODE_FORMAT (opc)) | |
19d45995 DE |
828 | |
829 | /* Instruction opcode value. */ | |
f1ffcb32 DE |
830 | CGEN_IVALUE value; |
831 | #define CGEN_OPCODE_VALUE(opc) (& (opc)->value) | |
832 | #define CGEN_OPCODE_BASE_VALUE(opc) (CGEN_OPCODE_VALUE (opc)->base_value) | |
833 | #define CGEN_OPCODE_BASE_MASK(opc) CGEN_IFMT_MASK (CGEN_OPCODE_FORMAT (opc)) | |
834 | } CGEN_OPCODE; | |
835 | ||
836 | /* Instruction attributes. | |
837 | This is made a published type as applications can cache a pointer to | |
838 | the attributes for speed. */ | |
839 | ||
840 | #ifndef CGEN_INSN_NBOOL_ATTRS | |
841 | #define CGEN_INSN_NBOOL_ATTRS 1 | |
842 | #endif | |
843 | typedef CGEN_ATTR_TYPE (CGEN_INSN_NBOOL_ATTRS) CGEN_INSN_ATTR_TYPE; | |
844 | ||
b1673d72 DE |
845 | /* Enum of architecture independent attributes. */ |
846 | ||
847 | #ifndef CGEN_ARCH | |
848 | /* ??? Numbers here are recorded in two places. */ | |
849 | typedef enum cgen_insn_attr { | |
850 | CGEN_INSN_ALIAS = 32 | |
851 | } CGEN_INSN_ATTR; | |
852 | #endif | |
853 | ||
f1ffcb32 DE |
854 | /* This struct defines each entry in the instruction table. */ |
855 | ||
856 | typedef struct | |
857 | { | |
858 | /* Each real instruction is enumerated. */ | |
859 | /* ??? This may go away in time. */ | |
860 | int num; | |
861 | #define CGEN_INSN_NUM(insn) ((insn)->base->num) | |
862 | ||
863 | /* Name of entry (that distinguishes it from all other entries). */ | |
864 | /* ??? If mnemonics have operands, try to print full mnemonic. */ | |
865 | const char *name; | |
866 | #define CGEN_INSN_NAME(insn) ((insn)->base->name) | |
867 | ||
868 | /* Mnemonic. This is used when parsing and printing the insn. | |
869 | In the case of insns that have operands on the mnemonics, this is | |
870 | only the constant part. E.g. for conditional execution of an `add' insn, | |
871 | where the full mnemonic is addeq, addne, etc., and the condition is | |
872 | treated as an operand, this is only "add". */ | |
873 | const char *mnemonic; | |
874 | #define CGEN_INSN_MNEMONIC(insn) ((insn)->base->mnemonic) | |
875 | ||
876 | /* Total length of instruction, in bits. */ | |
877 | int bitsize; | |
878 | #define CGEN_INSN_BITSIZE(insn) ((insn)->base->bitsize) | |
19d45995 | 879 | |
3d9044e2 DE |
880 | #if 0 /* ??? Disabled for now as there is a problem with embedded newlines |
881 | and the table is already pretty big. Should perhaps be moved | |
882 | to a file of its own. */ | |
f1ffcb32 DE |
883 | /* Semantics, as RTL. */ |
884 | /* ??? Plain text or bytecodes? */ | |
885 | /* ??? Note that the operand instance table could be computed at run-time | |
886 | if we parse this and cache the results. Something to eventually do. */ | |
887 | const char *rtx; | |
888 | #define CGEN_INSN_RTX(insn) ((insn)->base->rtx) | |
3d9044e2 | 889 | #endif |
329af459 | 890 | |
19d45995 DE |
891 | /* Attributes. |
892 | This must appear last. It is a variable sized array in that one | |
893 | architecture may have 1 nonbool attribute and another may have more. | |
894 | Having this last means the non-architecture specific code needn't | |
f1ffcb32 DE |
895 | care. The goal is to eventually record attributes in their raw form, |
896 | evaluate them at run-time, and cache the values, so this worry will go | |
897 | away anyway. */ | |
898 | CGEN_INSN_ATTR_TYPE attrs; | |
899 | #define CGEN_INSN_ATTRS(insn) (&(insn)->base->attrs) | |
df8b2c02 | 900 | /* Return value of attribute ATTR in INSN. */ |
f1ffcb32 DE |
901 | #define CGEN_INSN_ATTR_VALUE(insn, attr) \ |
902 | CGEN_ATTR_VALUE ((insn), CGEN_INSN_ATTRS (insn), (attr)) | |
903 | } CGEN_IBASE; | |
df8b2c02 | 904 | |
3d9044e2 | 905 | /* Return non-zero if INSN is the "invalid" insn marker. */ |
f1ffcb32 | 906 | |
3d9044e2 DE |
907 | #define CGEN_INSN_INVALID_P(insn) (CGEN_INSN_MNEMONIC (insn) == 0) |
908 | ||
f1ffcb32 DE |
909 | /* Main struct contain instruction information. |
910 | BASE is always present, the rest is present only if asked for. */ | |
911 | ||
912 | struct cgen_insn | |
913 | { | |
914 | /* ??? May be of use to put a type indicator here. | |
915 | Then this struct could different info for different classes of insns. */ | |
916 | /* ??? A speedup can be had by moving `base' into this struct. | |
917 | Maybe later. */ | |
918 | const CGEN_IBASE *base; | |
919 | const CGEN_OPCODE *opcode; | |
920 | const CGEN_OPINST *opinst; | |
921 | }; | |
922 | ||
df8b2c02 DE |
923 | /* Instruction lists. |
924 | This is used for adding new entries and for creating the hash lists. */ | |
925 | ||
b61df026 NC |
926 | typedef struct cgen_insn_list |
927 | { | |
f1ffcb32 DE |
928 | struct cgen_insn_list *next; |
929 | const CGEN_INSN *insn; | |
df8b2c02 DE |
930 | } CGEN_INSN_LIST; |
931 | ||
f1ffcb32 | 932 | /* Table of instructions. */ |
df8b2c02 | 933 | |
b61df026 NC |
934 | typedef struct |
935 | { | |
f1ffcb32 DE |
936 | const CGEN_INSN *init_entries; |
937 | unsigned int entry_size; /* since the attribute member is variable sized */ | |
df8b2c02 | 938 | unsigned int num_init_entries; |
f1ffcb32 | 939 | CGEN_INSN_LIST *new_entries; |
df8b2c02 DE |
940 | } CGEN_INSN_TABLE; |
941 | ||
f1ffcb32 DE |
942 | /* Return number of instructions. This includes any added at run-time. */ |
943 | ||
944 | extern int cgen_insn_count PARAMS ((CGEN_CPU_DESC)); | |
945 | extern int cgen_macro_insn_count PARAMS ((CGEN_CPU_DESC)); | |
946 | ||
947 | /* Macros to access the other insn elements not recorded in CGEN_IBASE. */ | |
948 | ||
949 | /* Fetch INSN's operand instance table. */ | |
950 | /* ??? Doesn't handle insns added at runtime. */ | |
951 | #define CGEN_INSN_OPERANDS(insn) ((insn)->opinst) | |
952 | ||
953 | /* Return INSN's opcode table entry. */ | |
954 | #define CGEN_INSN_OPCODE(insn) ((insn)->opcode) | |
df8b2c02 | 955 | |
f1ffcb32 DE |
956 | /* Return INSN's handler data. */ |
957 | #define CGEN_INSN_HANDLERS(insn) CGEN_OPCODE_HANDLERS (CGEN_INSN_OPCODE (insn)) | |
df8b2c02 | 958 | |
f1ffcb32 DE |
959 | /* Return INSN's syntax. */ |
960 | #define CGEN_INSN_SYNTAX(insn) CGEN_OPCODE_SYNTAX (CGEN_INSN_OPCODE (insn)) | |
961 | ||
962 | /* Return size of base mask in bits. */ | |
963 | #define CGEN_INSN_MASK_BITSIZE(insn) \ | |
964 | CGEN_OPCODE_MASK_BITSIZE (CGEN_INSN_OPCODE (insn)) | |
965 | ||
966 | /* Return mask of base part of INSN. */ | |
967 | #define CGEN_INSN_BASE_MASK(insn) \ | |
968 | CGEN_OPCODE_BASE_MASK (CGEN_INSN_OPCODE (insn)) | |
969 | ||
970 | /* Return value of base part of INSN. */ | |
971 | #define CGEN_INSN_BASE_VALUE(insn) \ | |
972 | CGEN_OPCODE_BASE_VALUE (CGEN_INSN_OPCODE (insn)) | |
030f419b DE |
973 | \f |
974 | /* Macro instructions. | |
975 | Macro insns aren't real insns, they map to one or more real insns. | |
976 | E.g. An architecture's "nop" insn may actually be an "mv r0,r0" or | |
977 | some such. | |
978 | ||
979 | Macro insns can expand to nothing (e.g. a nop that is optimized away). | |
980 | This is useful in multi-insn macros that build a constant in a register. | |
981 | Of course this isn't the default behaviour and must be explicitly enabled. | |
982 | ||
983 | Assembly of macro-insns is relatively straightforward. Disassembly isn't. | |
984 | However, disassembly of at least some kinds of macro insns is important | |
985 | in order that the disassembled code preserve the readability of the original | |
986 | insn. What is attempted here is to disassemble all "simple" macro-insns, | |
987 | where "simple" is currently defined to mean "expands to one real insn". | |
988 | ||
989 | Simple macro-insns are handled specially. They are emitted as ALIAS's | |
990 | of real insns. This simplifies their handling since there's usually more | |
991 | of them than any other kind of macro-insn, and proper disassembly of them | |
992 | falls out for free. */ | |
993 | ||
994 | /* For each macro-insn there may be multiple expansion possibilities, | |
995 | depending on the arguments. This structure is accessed via the `data' | |
996 | member of CGEN_INSN. */ | |
997 | ||
998 | typedef struct cgen_minsn_expansion { | |
999 | /* Function to do the expansion. | |
1000 | If the expansion fails (e.g. "no match") NULL is returned. | |
1001 | Space for the expansion is obtained with malloc. | |
1002 | It is up to the caller to free it. */ | |
1003 | const char * (* fn) PARAMS ((const struct cgen_minsn_expansion *, | |
f1ffcb32 DE |
1004 | const char *, const char **, int *, |
1005 | CGEN_OPERAND **)); | |
030f419b DE |
1006 | #define CGEN_MIEXPN_FN(ex) ((ex)->fn) |
1007 | ||
1008 | /* Instruction(s) the macro expands to. | |
1009 | The format of STR is defined by FN. | |
1010 | It is typically the assembly code of the real insn, but it could also be | |
1011 | the original Scheme expression or a tokenized form of it (with FN being | |
1012 | an appropriate interpreter). */ | |
1013 | const char * str; | |
1014 | #define CGEN_MIEXPN_STR(ex) ((ex)->str) | |
1015 | } CGEN_MINSN_EXPANSION; | |
1016 | ||
1017 | /* Normal expander. | |
1018 | When supported, this function will convert the input string to another | |
1019 | string and the parser will be invoked recursively. The output string | |
1020 | may contain further macro invocations. */ | |
1021 | ||
1022 | extern const char * cgen_expand_macro_insn | |
f1ffcb32 | 1023 | PARAMS ((CGEN_CPU_DESC, const struct cgen_minsn_expansion *, |
030f419b DE |
1024 | const char *, const char **, int *, CGEN_OPERAND **)); |
1025 | \f | |
df8b2c02 DE |
1026 | /* The assembler insn table is hashed based on some function of the mnemonic |
1027 | (the actually hashing done is up to the target, but we provide a few | |
030f419b DE |
1028 | examples like the first letter or a function of the entire mnemonic). */ |
1029 | ||
329af459 | 1030 | extern CGEN_INSN_LIST * cgen_asm_lookup_insn |
f1ffcb32 DE |
1031 | PARAMS ((CGEN_CPU_DESC, const char *)); |
1032 | #define CGEN_ASM_LOOKUP_INSN(cd, string) cgen_asm_lookup_insn ((cd), (string)) | |
df8b2c02 DE |
1033 | #define CGEN_ASM_NEXT_INSN(insn) ((insn)->next) |
1034 | ||
1035 | /* The disassembler insn table is hashed based on some function of machine | |
1036 | instruction (the actually hashing done is up to the target). */ | |
1037 | ||
329af459 | 1038 | extern CGEN_INSN_LIST * cgen_dis_lookup_insn |
f1ffcb32 DE |
1039 | PARAMS ((CGEN_CPU_DESC, const char *, CGEN_INSN_INT)); |
1040 | /* FIXME: delete these two */ | |
1041 | #define CGEN_DIS_LOOKUP_INSN(cd, buf, value) cgen_dis_lookup_insn ((cd), (buf), (value)) | |
df8b2c02 DE |
1042 | #define CGEN_DIS_NEXT_INSN(insn) ((insn)->next) |
1043 | \f | |
f1ffcb32 DE |
1044 | /* The CPU description. |
1045 | A copy of this is created when the cpu table is "opened". | |
1046 | All global state information is recorded here. | |
1047 | Access macros are provided for "public" members. */ | |
1048 | ||
1049 | typedef struct cgen_cpu_desc | |
b61df026 | 1050 | { |
f1ffcb32 DE |
1051 | /* Current machine (a la BFD machine number). */ |
1052 | int mach; | |
1053 | ||
1054 | /* Current endian. */ | |
1055 | enum cgen_endian endian; | |
1056 | #define CGEN_CPU_ENDIAN(cd) ((cd)->endian) | |
1057 | ||
1058 | /* Current insn endian. */ | |
1059 | enum cgen_endian insn_endian; | |
1060 | #define CGEN_CPU_INSN_ENDIAN(cd) ((cd)->insn_endian) | |
1061 | ||
1062 | /* Hardware elements. */ | |
1063 | const CGEN_HW_ENTRY *hw_list; | |
030f419b | 1064 | |
f1ffcb32 DE |
1065 | /* Instruction fields. */ |
1066 | const CGEN_IFLD *ifld_table; | |
030f419b | 1067 | |
f1ffcb32 DE |
1068 | /* Operands. */ |
1069 | const CGEN_OPERAND *operand_table; | |
1070 | #define CGEN_CPU_OPERAND_TABLE(cd) ((cd)->operand_table) | |
1071 | ||
1072 | /* Main instruction table. */ | |
329af459 | 1073 | CGEN_INSN_TABLE insn_table; |
f1ffcb32 | 1074 | #define CGEN_CPU_INSN_TABLE(cd) (& (cd)->insn_table) |
030f419b DE |
1075 | |
1076 | /* Macro instructions are defined separately and are combined with real | |
1077 | insns during hash table computation. */ | |
329af459 | 1078 | CGEN_INSN_TABLE macro_insn_table; |
f1ffcb32 DE |
1079 | |
1080 | /* Copy of CGEN_INT_INSN_P. */ | |
1081 | int int_insn_p; | |
1082 | ||
1083 | /* Maximum length of any insn, in bytes. */ | |
1084 | unsigned int max_insn_size; | |
1085 | ||
1086 | /* Operand parser callback. */ | |
1087 | cgen_parse_operand_fn * parse_operand_fn; | |
1088 | ||
1089 | /* Parse/insert/extract/print cover fns for operands. */ | |
1090 | const char * (*parse_operand) | |
1091 | PARAMS ((CGEN_CPU_DESC, int opindex_, const char **, | |
1092 | CGEN_FIELDS *fields_)); | |
1093 | #ifdef BFD_VERSION | |
1094 | const char * (*insert_operand) | |
1095 | PARAMS ((CGEN_CPU_DESC, int opindex_, CGEN_FIELDS *fields_, | |
1096 | CGEN_INSN_BYTES_PTR, bfd_vma pc_)); | |
1097 | int (*extract_operand) | |
1098 | PARAMS ((CGEN_CPU_DESC, int opindex_, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, | |
1099 | CGEN_FIELDS *fields_, bfd_vma pc_)); | |
1100 | void (*print_operand) | |
1101 | PARAMS ((CGEN_CPU_DESC, int opindex_, PTR info_, CGEN_FIELDS * fields_, | |
1102 | void const *attrs_, bfd_vma pc_, int length_)); | |
1103 | #else | |
1104 | const char * (*insert_operand) (); | |
1105 | int (*extract_operand) (); | |
1106 | void (*print_operand) (); | |
1107 | #endif | |
1108 | #define CGEN_CPU_PARSE_OPERAND(cd) ((cd)->parse_operand) | |
1109 | #define CGEN_CPU_INSERT_OPERAND(cd) ((cd)->insert_operand) | |
1110 | #define CGEN_CPU_EXTRACT_OPERAND(cd) ((cd)->extract_operand) | |
1111 | #define CGEN_CPU_PRINT_OPERAND(cd) ((cd)->print_operand) | |
1112 | ||
1113 | /* Size of CGEN_FIELDS struct. */ | |
1114 | unsigned int sizeof_fields; | |
1115 | #define CGEN_CPU_SIZEOF_FIELDS(cd) ((cd)->sizeof_fields) | |
1116 | ||
1117 | /* Set the bitsize field. */ | |
1118 | void (*set_fields_bitsize) PARAMS ((CGEN_FIELDS *fields_, int size_)); | |
1119 | #define CGEN_CPU_SET_FIELDS_BITSIZE(cd) ((cd)->set_fields_bitsize) | |
1120 | ||
1121 | /* CGEN_FIELDS accessors. */ | |
1122 | int (*get_int_operand) | |
1123 | PARAMS ((int opindex_, const CGEN_FIELDS *fields_)); | |
1124 | void (*set_int_operand) | |
1125 | PARAMS ((int opindex_, CGEN_FIELDS *fields_, int value_)); | |
1126 | #ifdef BFD_VERSION | |
1127 | bfd_vma (*get_vma_operand) | |
1128 | PARAMS ((int opindex_, const CGEN_FIELDS *fields_)); | |
1129 | void (*set_vma_operand) | |
1130 | PARAMS ((int opindex_, CGEN_FIELDS *fields_, bfd_vma value_)); | |
1131 | #else | |
1132 | long (*get_vma_operand) (); | |
1133 | void (*set_vma_operand) (); | |
1134 | #endif | |
1135 | #define CGEN_CPU_GET_INT_OPERAND(cd) ((cd)->get_int_operand) | |
1136 | #define CGEN_CPU_SET_INT_OPERAND(cd) ((cd)->set_int_operand) | |
1137 | #define CGEN_CPU_GET_VMA_OPERAND(cd) ((cd)->get_vma_operand) | |
1138 | #define CGEN_CPU_SET_VMA_OPERAND(cd) ((cd)->set_vma_operand) | |
1139 | ||
1140 | /* Instruction parse/insert/extract/print handlers. */ | |
1141 | /* FIXME: make these types uppercase. */ | |
1142 | cgen_parse_fn * const *parse_handlers; | |
1143 | cgen_insert_fn * const *insert_handlers; | |
1144 | cgen_extract_fn * const *extract_handlers; | |
1145 | cgen_print_fn * const *print_handlers; | |
1146 | #define CGEN_PARSE_FN(cd, insn) (cd->parse_handlers[(insn)->opcode->handlers.parse]) | |
1147 | #define CGEN_INSERT_FN(cd, insn) (cd->insert_handlers[(insn)->opcode->handlers.insert]) | |
1148 | #define CGEN_EXTRACT_FN(cd, insn) (cd->extract_handlers[(insn)->opcode->handlers.extract]) | |
1149 | #define CGEN_PRINT_FN(cd, insn) (cd->print_handlers[(insn)->opcode->handlers.print]) | |
030f419b DE |
1150 | |
1151 | /* Return non-zero if insn should be added to hash table. */ | |
1152 | int (* asm_hash_p) PARAMS ((const CGEN_INSN *)); | |
1153 | ||
1154 | /* Assembler hash function. */ | |
1155 | unsigned int (* asm_hash) PARAMS ((const char *)); | |
1156 | ||
1157 | /* Number of entries in assembler hash table. */ | |
329af459 | 1158 | unsigned int asm_hash_size; |
030f419b DE |
1159 | |
1160 | /* Return non-zero if insn should be added to hash table. */ | |
1161 | int (* dis_hash_p) PARAMS ((const CGEN_INSN *)); | |
1162 | ||
1163 | /* Disassembler hash function. */ | |
f1ffcb32 | 1164 | unsigned int (* dis_hash) PARAMS ((const char *, CGEN_INSN_INT)); |
030f419b DE |
1165 | |
1166 | /* Number of entries in disassembler hash table. */ | |
329af459 | 1167 | unsigned int dis_hash_size; |
3d9044e2 | 1168 | |
329af459 DE |
1169 | /* Assembler instruction hash table. */ |
1170 | CGEN_INSN_LIST **asm_hash_table; | |
329af459 | 1171 | CGEN_INSN_LIST *asm_hash_table_entries; |
df8b2c02 | 1172 | |
329af459 | 1173 | /* Disassembler instruction hash table. */ |
f1ffcb32 DE |
1174 | CGEN_INSN_LIST **dis_hash_table; |
1175 | CGEN_INSN_LIST *dis_hash_table_entries; | |
1176 | } CGEN_CPU_TABLE; | |
df8b2c02 | 1177 | |
f1ffcb32 DE |
1178 | /* wip */ |
1179 | #ifndef CGEN_WORD_ENDIAN | |
1180 | #define CGEN_WORD_ENDIAN(cd) CGEN_CPU_ENDIAN (cd) | |
1181 | #endif | |
1182 | #ifndef CGEN_INSN_WORD_ENDIAN | |
1183 | #define CGEN_INSN_WORD_ENDIAN(cd) CGEN_CPU_INSN_ENDIAN (cd) | |
1184 | #endif | |
329af459 DE |
1185 | \f |
1186 | /* Prototypes of major functions. */ | |
f1ffcb32 DE |
1187 | /* FIXME: Move more CGEN_SYM-defined functions into CGEN_CPU_DESC. |
1188 | Note the init fns though, as that would drag in things that mightn't be | |
1189 | used and might not even exist. */ | |
1190 | ||
1191 | /* Open an ISA table for use. */ | |
1192 | ||
1193 | extern CGEN_CPU_DESC CGEN_SYM (cpu_open) PARAMS ((int, enum cgen_endian)); | |
df8b2c02 | 1194 | |
329af459 | 1195 | /* Close it. */ |
df8b2c02 | 1196 | |
f1ffcb32 DE |
1197 | extern void CGEN_SYM (cpu_close) PARAMS ((CGEN_CPU_DESC)); |
1198 | ||
1199 | /* Initialize the opcode table for use. | |
1200 | Called by init_asm/init_dis. */ | |
329af459 | 1201 | |
f1ffcb32 DE |
1202 | extern void CGEN_SYM (init_opcode_table) PARAMS ((CGEN_CPU_DESC cd_)); |
1203 | ||
1204 | /* Initialize the ibld table for use. | |
1205 | Called by init_asm/init_dis. */ | |
1206 | ||
1207 | extern void CGEN_SYM (init_ibld_table) PARAMS ((CGEN_CPU_DESC cd_)); | |
1208 | ||
1209 | /* Initialize an cpu table for assembler or disassembler use. | |
1210 | These must be called immediately after cpu_open. */ | |
1211 | ||
1212 | extern void CGEN_SYM (init_asm) PARAMS ((CGEN_CPU_DESC)); | |
1213 | extern void CGEN_SYM (init_dis) PARAMS ((CGEN_CPU_DESC)); | |
1214 | ||
1215 | /* Initialize the operand instance table for use. */ | |
1216 | ||
1217 | extern void CGEN_SYM (init_opinst_table) PARAMS ((CGEN_CPU_DESC cd_)); | |
329af459 DE |
1218 | |
1219 | /* Change the mach and/or endianness. */ | |
f1ffcb32 DE |
1220 | |
1221 | extern void cgen_set_cpu PARAMS ((CGEN_CPU_DESC, int, enum cgen_endian)); | |
42d56c40 | 1222 | |
329af459 | 1223 | extern const CGEN_INSN * CGEN_SYM (assemble_insn) |
f1ffcb32 | 1224 | PARAMS ((CGEN_CPU_DESC, const char *, CGEN_FIELDS *, |
3d9044e2 | 1225 | CGEN_INSN_BYTES_PTR, char **)); |
df8b2c02 | 1226 | |
329af459 | 1227 | extern const CGEN_KEYWORD CGEN_SYM (operand_mach); |
030f419b | 1228 | extern int CGEN_SYM (get_mach) PARAMS ((const char *)); |
df8b2c02 | 1229 | |
f1ffcb32 DE |
1230 | /* Operand index computation. */ |
1231 | extern const CGEN_INSN * cgen_lookup_insn | |
1232 | PARAMS ((CGEN_CPU_DESC, const CGEN_INSN * insn_, | |
1233 | CGEN_INSN_INT int_value_, unsigned char *bytes_value_, | |
1234 | int length_, CGEN_FIELDS *fields_, int alias_p_)); | |
1235 | extern void cgen_get_insn_operands | |
1236 | PARAMS ((CGEN_CPU_DESC, const CGEN_INSN * insn_, | |
1237 | const CGEN_FIELDS *fields_, int *indices_)); | |
1238 | extern const CGEN_INSN * cgen_lookup_get_insn_operands | |
1239 | PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *insn_, | |
1240 | CGEN_INSN_INT int_value_, unsigned char *bytes_value_, | |
1241 | int length_, int *indices_, CGEN_FIELDS *fields_)); | |
42d56c40 | 1242 | |
ca2b987f | 1243 | /* Get/set fields in the CGEN_FIELDS struct. */ |
f1ffcb32 DE |
1244 | |
1245 | extern int CGEN_SYM (get_int_operand) | |
1246 | PARAMS ((int opindex_, const CGEN_FIELDS *fields_)); | |
1247 | extern void CGEN_SYM (set_int_operand) | |
1248 | PARAMS ((int opindex_, CGEN_FIELDS *fields_, int value_)); | |
ca2b987f | 1249 | #ifdef BFD_VERSION /* Don't require bfd.h unnecessarily. */ |
f1ffcb32 DE |
1250 | extern bfd_vma CGEN_SYM (get_vma_operand) |
1251 | PARAMS ((int opindex_, const CGEN_FIELDS *fields_)); | |
1252 | extern void CGEN_SYM (set_vma_operand) | |
1253 | PARAMS ((int opindex_, CGEN_FIELDS *fields_, bfd_vma value_)); | |
ca2b987f | 1254 | #endif |
df8b2c02 | 1255 | |
329af459 | 1256 | extern const char * CGEN_SYM (parse_operand) |
f1ffcb32 | 1257 | PARAMS ((CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *)); |
df8b2c02 | 1258 | |
ca2b987f | 1259 | #ifdef BFD_VERSION /* Don't require bfd.h unnecessarily. */ |
329af459 | 1260 | extern const char * CGEN_SYM (insert_operand) |
f1ffcb32 | 1261 | PARAMS ((CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, |
3d9044e2 DE |
1262 | bfd_vma)); |
1263 | extern int CGEN_SYM (extract_operand) | |
f1ffcb32 | 1264 | PARAMS ((CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, |
3d9044e2 | 1265 | CGEN_FIELDS *, bfd_vma)); |
f1ffcb32 DE |
1266 | extern void CGEN_SYM (print_operand) |
1267 | PARAMS ((CGEN_CPU_DESC, int opindex_, PTR info_, CGEN_FIELDS * fields_, | |
1268 | void const *attrs_, bfd_vma pc_, int length_)); | |
1269 | #else | |
1270 | extern const char * CGEN_SYM (insert_operand) (); | |
1271 | extern int CGEN_SYM (extract_operand) (); | |
1272 | extern void CGEN_SYM (print_operand) (); | |
ca2b987f | 1273 | #endif |
df8b2c02 | 1274 | |
3d9044e2 | 1275 | /* Cover fns to bfd_get/set. */ |
f1ffcb32 | 1276 | |
3d9044e2 | 1277 | extern CGEN_INSN_INT cgen_get_insn_value |
f1ffcb32 | 1278 | PARAMS ((CGEN_CPU_DESC, unsigned char *, int)); |
3d9044e2 | 1279 | extern void cgen_put_insn_value |
f1ffcb32 DE |
1280 | PARAMS ((CGEN_CPU_DESC, unsigned char *, int, CGEN_INSN_INT)); |
1281 | ||
1282 | /* Read in a cpu description file. | |
1283 | ??? For future concerns, including adding instructions to the assembler/ | |
1284 | disassembler at run-time. */ | |
3d9044e2 | 1285 | |
329af459 | 1286 | extern const char * cgen_read_cpu_file |
f1ffcb32 | 1287 | PARAMS ((CGEN_CPU_DESC, const char * filename_)); |
df8b2c02 DE |
1288 | |
1289 | #endif /* CGEN_H */ |