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1 | /* d30v.h -- Header file for D30V opcode table |
2 | Copyright 1997 Free Software Foundation, Inc. | |
3 | Written by Martin Hunt (hunt@cygnus.com), Cygnus Solutions | |
4 | ||
5 | This file is part of GDB, GAS, and the GNU binutils. | |
6 | ||
7 | GDB, GAS, and the GNU binutils are free software; you can redistribute | |
8 | them and/or modify them under the terms of the GNU General Public | |
9 | License as published by the Free Software Foundation; either version | |
10 | 1, or (at your option) any later version. | |
11 | ||
12 | GDB, GAS, and the GNU binutils are distributed in the hope that they | |
13 | will be useful, but WITHOUT ANY WARRANTY; without even the implied | |
14 | warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See | |
15 | the GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this file; see the file COPYING. If not, write to the Free | |
19 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
20 | ||
21 | #ifndef D30V_H | |
22 | #define D30V_H | |
23 | ||
24 | #define NOP 0x00F00000 | |
25 | ||
26 | /* Structure to hold information about predefined registers. */ | |
27 | struct pd_reg | |
28 | { | |
29 | char *name; /* name to recognize */ | |
30 | char *pname; /* name to print for this register */ | |
31 | int value; | |
32 | }; | |
33 | ||
34 | extern const struct pd_reg pre_defined_registers[]; | |
35 | int reg_name_cnt(); | |
36 | ||
37 | /* the number of control registers */ | |
38 | #define MAX_CONTROL_REG 16 | |
39 | ||
40 | /* define the format specifiers */ | |
41 | #define FM00 0 | |
42 | #define FM01 0x80000000 | |
43 | #define FM10 0x8000000000000000LL | |
44 | #define FM11 0x8000000080000000LL | |
45 | ||
46 | /* define the opcode classes */ | |
47 | #define BRA 0 | |
48 | #define LOGIC 1 | |
49 | #define IMEM 2 | |
50 | #define IALU1 4 | |
51 | #define IALU2 5 | |
52 | ||
53 | /* define the execution condition codes */ | |
54 | #define ECC_AL 0 /* ALways (default) */ | |
55 | #define ECC_TX 1 /* F0=True, F1=Don't care */ | |
56 | #define ECC_FX 2 /* F0=False, F1=Don't care */ | |
57 | #define ECC_XT 3 /* F0=Don't care, F1=True */ | |
58 | #define ECC_XF 4 /* F0=Don't care, F1=False */ | |
59 | #define ECC_TT 5 /* F0=True, F1=True */ | |
60 | #define ECC_TF 6 /* F0=True, F1=False */ | |
61 | #define ECC_RESERVED 7 /* reserved */ | |
62 | #define ECC_MAX ECC_RESERVED | |
63 | ||
64 | extern const char *d30v_ecc_names[]; | |
65 | ||
66 | /* condition code table for CMP and CMPU */ | |
67 | extern const char *d30v_cc_names[]; | |
68 | ||
69 | /* The opcode table is an array of struct d30v_opcode. */ | |
70 | struct d30v_opcode | |
71 | { | |
72 | /* The opcode name. */ | |
73 | const char *name; | |
74 | ||
75 | /* the opcode */ | |
76 | int op1; /* first part, "IALU1" for example */ | |
77 | int op2; /* the rest of the opcode */ | |
78 | ||
79 | /* opcode format(s). These numbers correspond to entries */ | |
80 | /* in the d30v_format_table */ | |
81 | unsigned char format[4]; | |
82 | ||
83 | #define SHORT_M 1 | |
84 | #define SHORT_A 5 | |
85 | #define SHORT_B1 7 | |
86 | #define SHORT_B2 8 | |
87 | #define SHORT_B3 9 | |
88 | #define SHORT_B3b 11 | |
89 | #define SHORT_D1 13 | |
90 | #define SHORT_D2 15 | |
91 | #define SHORT_U 17 /* unary SHORT_A. ABS for example */ | |
92 | #define SHORT_F 19 /* SHORT_A with flag registers */ | |
93 | #define SHORT_AF 21 /* SHORT_A with only the first register a flag register */ | |
94 | #define SHORT_T 23 /* for trap instruction */ | |
95 | #define SHORT_A5 24 /* SHORT_A with a 5-bit immediate instead of 6 */ | |
96 | #define SHORT_CMP 25 /* special form for CMPcc and CMPUcc */ | |
97 | #define SHORT_A1 27 /* special form of SHORT_A for MACa opcodes where a=1 */ | |
98 | #define SHORT_AA 29 /* SHORT_A with the first register an accumulator */ | |
99 | #define SHORT_RA 31 /* SHORT_A with the second register an accumulator */ | |
100 | #define SHORT_MODINC 33 | |
101 | #define SHORT_MODDEC 34 | |
102 | #define SHORT_C1 35 | |
103 | #define SHORT_C2 36 | |
104 | #define SHORT_UF 37 | |
105 | #define SHORT_NONE 38 /* no operands */ | |
106 | #define LONG 39 | |
107 | #define LONG_U 40 /* unary LONG */ | |
108 | #define LONG_AF 41 /* LONG with the first register a flag register */ | |
109 | #define LONG_CMP 42 /* special form for CMPcc and CMPUcc */ | |
110 | #define LONG_M 43 /* Memory long for ldb, stb */ | |
111 | #define LONG_2 44 /* LONG with 2 operands; bratnz */ | |
112 | #define LONG_2b 45 /* LONG_2 with modifier of 3 */ | |
113 | #define LONG_D 46 /* for DBRAI*/ | |
114 | ||
115 | /* the execution unit(s) used */ | |
116 | int unit; | |
117 | #define EITHER 0 | |
118 | #define IU 1 | |
119 | #define MU 2 | |
120 | ||
121 | /* this field is used to decide if two instructions */ | |
122 | /* can be executed in parallel */ | |
123 | int flags_used; | |
124 | int flags_set; | |
125 | #define FLAG_0 (1<<0) | |
126 | #define FLAG_1 (1<<1) | |
127 | #define FLAG_2 (1<<2) | |
128 | #define FLAG_3 (1<<3) | |
129 | #define FLAG_4 (1<<4) /* S (saturation) */ | |
130 | #define FLAG_5 (1<<5) /* V (overflow) */ | |
131 | #define FLAG_6 (1<<6) /* VA (accumulated overflow) */ | |
132 | #define FLAG_7 (1<<7) /* C (carry/borrow) */ | |
133 | #define FLAG_SM (1<<8) /* SM (stack mode) */ | |
134 | #define FLAG_RP (1<<9) /* RP (repeat emable) */ | |
135 | #define FLAG_JMP (1<<10) /* instruction is a branch */ | |
136 | #define FLAG_JSR (1<<11) /* subroutine call. must be aligned */ | |
137 | #define FLAG_MEM (1<<12) /* reads/writes memory */ | |
138 | #define FLAG_X (1<<12) /* flag used/set depends on register contents */ | |
139 | #define FLAG_CVVA (FLAG_5|FLAG_6|FLAG_7) | |
140 | #define FLAG_C FLAG_7 | |
141 | #define FLAG_ALL 0xffffffff | |
142 | ||
143 | int reloc_flag; | |
144 | #define RELOC_PCREL 1 | |
145 | #define RELOC_ABS 2 | |
146 | }; | |
147 | ||
148 | extern const struct d30v_opcode d30v_opcode_table[]; | |
149 | extern const int d30v_num_opcodes; | |
150 | ||
151 | /* The operands table is an array of struct d30v_operand. */ | |
152 | struct d30v_operand | |
153 | { | |
154 | /* the length of the field */ | |
155 | int length; | |
156 | ||
157 | /* The number of significant bits in the operand. */ | |
158 | int bits; | |
159 | ||
160 | /* position relative to Ra */ | |
161 | int position; | |
162 | ||
163 | /* syntax flags. */ | |
164 | int flags; | |
165 | }; | |
166 | extern const struct d30v_operand d30v_operand_table[]; | |
167 | ||
168 | /* Values defined for the flags field of a struct d30v_operand. */ | |
169 | ||
170 | /* this is the destination register; it will be modified */ | |
171 | /* this is used by the optimizer */ | |
172 | #define OPERAND_DEST (1) | |
173 | ||
174 | /* number or symbol */ | |
175 | #define OPERAND_NUM (2) | |
176 | ||
177 | /* address or label */ | |
178 | #define OPERAND_ADDR (4) | |
179 | ||
180 | /* register */ | |
181 | #define OPERAND_REG (8) | |
182 | ||
183 | /* postincrement + */ | |
184 | #define OPERAND_PLUS (0x10) | |
185 | ||
186 | /* postdecrement - */ | |
187 | #define OPERAND_MINUS (0x20) | |
188 | ||
189 | /* signed number */ | |
190 | #define OPERAND_SIGNED (0x40) | |
191 | ||
192 | /* this operand must be shifted left by 3 */ | |
193 | #define OPERAND_SHIFT (0x80) | |
194 | ||
195 | /* flag register */ | |
196 | #define OPERAND_FLAG (0x100) | |
197 | ||
198 | /* control register */ | |
199 | #define OPERAND_CONTROL (0x200) | |
200 | ||
201 | /* accumulator */ | |
202 | #define OPERAND_ACC (0x400) | |
203 | ||
204 | /* @ */ | |
205 | #define OPERAND_ATSIGN (0x800) | |
206 | ||
207 | /* @( */ | |
208 | #define OPERAND_ATPAR (0x1000) | |
209 | ||
210 | /* predecrement mode '@-sp' */ | |
211 | #define OPERAND_ATMINUS (0x2000) | |
212 | ||
213 | /* this operand changes the instruction name */ | |
214 | /* for example, CPMcc, CMPUcc */ | |
215 | #define OPERAND_NAME (0x4000) | |
216 | ||
217 | /* fake operand for mvtsys and mvfsys */ | |
218 | #define OPERAND_SPECIAL (0x8000) | |
219 | ||
220 | /* The format table is an array of struct d30v_format. */ | |
221 | struct d30v_format | |
222 | { | |
223 | int form; /* SHORT_A, LONG, etc */ | |
224 | int modifier; /* two bit modifier following opcode */ | |
225 | unsigned char operands[5]; | |
226 | }; | |
227 | extern const struct d30v_format d30v_format_table[]; | |
228 | ||
229 | ||
230 | /* an instruction is defined by an opcode and a format */ | |
231 | /* for example, "add" has one opcode, but three different */ | |
232 | /* formats, 2 SHORT_A forms and a LONG form. */ | |
233 | struct d30v_insn | |
234 | { | |
235 | struct d30v_opcode *op; /* pointer to an entry in the opcode table */ | |
236 | struct d30v_format *form; /* pointer to an entry in the format table */ | |
237 | int ecc; /* execution condition code */ | |
238 | }; | |
239 | ||
240 | /* an expressionS only has one register type, so we fake it */ | |
241 | /* by setting high bits to indicate type */ | |
242 | #define REGISTER_MASK 0xFF | |
243 | ||
244 | #endif /* D30V_H */ |