Commit | Line | Data |
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252b5132 | 1 | /* Table of opcodes for the PA-RISC. |
4f1d9bd8 | 2 | Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, |
761e0242 | 3 | 2001, 2002, 2003, 2004, 2005 |
3c5ce02e | 4 | Free Software Foundation, Inc. |
252b5132 RH |
5 | |
6 | Contributed by the Center for Software Science at the | |
7 | University of Utah (pa-gdb-bugs@cs.utah.edu). | |
8 | ||
9 | This file is part of GAS, the GNU Assembler, and GDB, the GNU disassembler. | |
10 | ||
11 | GAS/GDB is free software; you can redistribute it and/or modify | |
12 | it under the terms of the GNU General Public License as published by | |
13 | the Free Software Foundation; either version 1, or (at your option) | |
14 | any later version. | |
15 | ||
16 | GAS/GDB is distributed in the hope that it will be useful, | |
17 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | GNU General Public License for more details. | |
20 | ||
21 | You should have received a copy of the GNU General Public License | |
22 | along with GAS or GDB; see the file COPYING. If not, write to | |
e172dbf8 | 23 | the Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ |
252b5132 RH |
24 | |
25 | #if !defined(__STDC__) && !defined(const) | |
26 | #define const | |
27 | #endif | |
28 | ||
29 | /* | |
30 | * Structure of an opcode table entry. | |
31 | */ | |
32 | ||
33 | /* There are two kinds of delay slot nullification: normal which is | |
34 | * controled by the nullification bit, and conditional, which depends | |
35 | * on the direction of the branch and its success or failure. | |
36 | * | |
37 | * NONE is unfortunately #defined in the hiux system include files. | |
38 | * #undef it away. | |
39 | */ | |
40 | #undef NONE | |
41 | struct pa_opcode | |
42 | { | |
43 | const char *name; | |
44 | unsigned long int match; /* Bits that must be set... */ | |
45 | unsigned long int mask; /* ... in these bits. */ | |
46 | char *args; | |
47 | enum pa_arch arch; | |
73826640 | 48 | char flags; |
252b5132 RH |
49 | }; |
50 | ||
f0a3b40f DA |
51 | /* Enables strict matching. Opcodes with match errors are skipped |
52 | when this bit is set. */ | |
73826640 | 53 | #define FLAG_STRICT 0x1 |
252b5132 RH |
54 | |
55 | /* | |
56 | All hppa opcodes are 32 bits. | |
57 | ||
58 | The match component is a mask saying which bits must match a | |
59 | particular opcode in order for an instruction to be an instance | |
60 | of that opcode. | |
61 | ||
c5e52916 JL |
62 | The args component is a string containing one character for each operand of |
63 | the instruction. Characters used as a prefix allow any second character to | |
64 | be used without conflicting with the main operand characters. | |
252b5132 RH |
65 | |
66 | Bit positions in this description follow HP usage of lsb = 31, | |
67 | "at" is lsb of field. | |
68 | ||
69 | In the args field, the following characters must match exactly: | |
70 | ||
71 | '+,() ' | |
72 | ||
73 | In the args field, the following characters are unused: | |
74 | ||
1328dc98 AM |
75 | ' " - / 34 6789:; ' |
76 | '@ C M [\] ' | |
77 | '` e g } ' | |
252b5132 RH |
78 | |
79 | Here are all the characters: | |
80 | ||
1328dc98 AM |
81 | ' !"#$%&'()*+-,./0123456789:;<=>?' |
82 | '@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_' | |
83 | '`abcdefghijklmnopqrstuvwxyz{|}~ ' | |
252b5132 RH |
84 | |
85 | Kinds of operands: | |
86 | x integer register field at 15. | |
87 | b integer register field at 10. | |
88 | t integer register field at 31. | |
96226a68 | 89 | a integer register field at 10 and 15 (for PERMH) |
252b5132 RH |
90 | 5 5 bit immediate at 15. |
91 | s 2 bit space specifier at 17. | |
92 | S 3 bit space specifier at 18. | |
252b5132 RH |
93 | V 5 bit immediate value at 31 |
94 | i 11 bit immediate value at 31 | |
95 | j 14 bit immediate value at 31 | |
96 | k 21 bit immediate value at 31 | |
a7fba0e0 | 97 | l 16 bit immediate value at 31 (wide mode only, unusual encoding). |
252b5132 RH |
98 | n nullification for branch instructions |
99 | N nullification for spop and copr instructions | |
100 | w 12 bit branch displacement | |
101 | W 17 bit branch displacement (PC relative) | |
f5a68b45 | 102 | X 22 bit branch displacement (PC relative) |
252b5132 RH |
103 | z 17 bit branch displacement (just a number, not an address) |
104 | ||
7d8fdb64 JL |
105 | Also these: |
106 | ||
107 | . 2 bit shift amount at 25 | |
108 | * 4 bit shift amount at 25 | |
109 | p 5 bit shift count at 26 (to support the SHD instruction) encoded as | |
110 | 31-p | |
111 | ~ 6 bit shift count at 20,22:26 encoded as 63-~. | |
112 | P 5 bit bit position at 26 | |
ec3533da | 113 | q 6 bit bit position at 20,22:26 |
7d8fdb64 | 114 | T 5 bit field length at 31 (encoded as 32-T) |
ec3533da JL |
115 | % 6 bit field length at 23,27:31 (variable extract/deposit) |
116 | | 6 bit field length at 19,27:31 (fixed extract/deposit) | |
7d8fdb64 JL |
117 | A 13 bit immediate at 18 (to support the BREAK instruction) |
118 | ^ like b, but describes a control register | |
119 | ! sar (cr11) register | |
120 | D 26 bit immediate at 31 (to support the DIAG instruction) | |
121 | $ 9 bit immediate at 28 (to support POPBTS) | |
122 | ||
123 | v 3 bit Special Function Unit identifier at 25 | |
124 | O 20 bit Special Function Unit operation split between 15 bits at 20 | |
125 | and 5 bits at 31 | |
126 | o 15 bit Special Function Unit operation at 20 | |
127 | 2 22 bit Special Function Unit operation split between 17 bits at 20 | |
128 | and 5 bits at 31 | |
129 | 1 15 bit Special Function Unit operation split between 10 bits at 20 | |
130 | and 5 bits at 31 | |
131 | 0 10 bit Special Function Unit operation split between 5 bits at 20 | |
132 | and 5 bits at 31 | |
133 | u 3 bit coprocessor unit identifier at 25 | |
134 | F Source Floating Point Operand Format Completer encoded 2 bits at 20 | |
135 | I Source Floating Point Operand Format Completer encoded 1 bits at 20 | |
136 | (for 0xe format FP instructions) | |
137 | G Destination Floating Point Operand Format Completer encoded 2 bits at 18 | |
138 | H Floating Point Operand Format at 26 for 'fmpyadd' and 'fmpysub' | |
139 | (very similar to 'F') | |
140 | ||
141 | r 5 bit immediate value at 31 (for the break instruction) | |
142 | (very similar to V above, except the value is unsigned instead of | |
143 | low_sign_ext) | |
144 | R 5 bit immediate value at 15 (for the ssm, rsm, probei instructions) | |
145 | (same as r above, except the value is in a different location) | |
146 | U 10 bit immediate value at 15 (for SSM, RSM on pa2.0) | |
147 | Q 5 bit immediate value at 10 (a bit position specified in | |
148 | the bb instruction. It's the same as r above, except the | |
149 | value is in a different location) | |
b37e19e9 | 150 | B 5 bit immediate value at 10 (a bit position specified in |
1328dc98 | 151 | the bb instruction. Similar to Q, but 64 bit handling is |
b37e19e9 | 152 | different. |
52d836e2 | 153 | Z %r1 -- implicit target of addil instruction. |
f0bfde5e | 154 | L ,%r2 completer for new syntax branch |
142f0fe0 JL |
155 | { Source format completer for fcnv |
156 | _ Destination format completer for fcnv | |
157 | h cbit for fcmp | |
158 | = gfx tests for ftest | |
1328dc98 AM |
159 | d 14 bit offset for single precision FP long load/store. |
160 | # 14 bit offset for double precision FP load long/store. | |
161 | J Yet another 14 bit offset for load/store with ma,mb completers. | |
162 | K Yet another 14 bit offset for load/store with ma,mb completers. | |
163 | y 16 bit offset for word aligned load/store (PA2.0 wide). | |
164 | & 16 bit offset for dword aligned load/store (PA2.0 wide). | |
165 | < 16 bit offset for load/store with ma,mb completers (PA2.0 wide). | |
166 | > 16 bit offset for load/store with ma,mb completers (PA2.0 wide). | |
390f858d | 167 | Y %sr0,%r31 -- implicit target of be,l instruction. |
eca04c6a | 168 | @ implicit immediate value of 0 |
7d8fdb64 | 169 | |
5d4ba527 JL |
170 | Completer operands all have 'c' as the prefix: |
171 | ||
f0a3b40f DA |
172 | cx indexed load and store completer. |
173 | cX indexed load and store completer. Like cx, but emits a space | |
174 | after in disassembler. | |
5d4ba527 | 175 | cm short load and store completer. |
1befefea JL |
176 | cM short load and store completer. Like cm, but emits a space |
177 | after in disassembler. | |
eca04c6a | 178 | cq long load and store completer (like cm, but inserted into a |
5d2e7ecc | 179 | different location in the target instruction). |
5d4ba527 | 180 | cs store bytes short completer. |
1befefea JL |
181 | cA store bytes short completer. Like cs, but emits a space |
182 | after in disassembler. | |
caa05036 DA |
183 | ce long load/store completer for LDW/STW with a different encoding |
184 | than the others | |
eca04c6a JL |
185 | cc load cache control hint |
186 | cd load and clear cache control hint | |
187 | cC store cache control hint | |
188 | co ordered access | |
1d16bf9c | 189 | |
390f858d JL |
190 | cp branch link and push completer |
191 | cP branch pop completer | |
192 | cl branch link completer | |
193 | cg branch gate completer | |
194 | ||
1d16bf9c JL |
195 | cw read/write completer for PROBE |
196 | cW wide completer for MFCTL | |
197 | cL local processor completer for cache control | |
5d4ba527 | 198 | cZ System Control Completer (to support LPA, LHA, etc.) |
1d16bf9c JL |
199 | |
200 | ci correction completer for DCOR | |
201 | ca add completer | |
202 | cy 32 bit add carry completer | |
203 | cY 64 bit add carry completer | |
204 | cv signed overflow trap completer | |
205 | ct trap on condition completer for ADDI, SUB | |
206 | cT trap on condition completer for UADDCM | |
207 | cb 32 bit borrow completer for SUB | |
208 | cB 64 bit borrow completer for SUB | |
209 | ||
96226a68 JL |
210 | ch left/right half completer |
211 | cH signed/unsigned saturation completer | |
212 | cS signed/unsigned completer at 21 | |
3c5ce02e | 213 | cz zero/sign extension completer. |
96226a68 | 214 | c* permutation completer |
5d4ba527 | 215 | |
c5e52916 JL |
216 | Condition operands all have '?' as the prefix: |
217 | ||
218 | ?f Floating point compare conditions (encoded as 5 bits at 31) | |
219 | ||
220 | ?a add conditions | |
7d627258 | 221 | ?A 64 bit add conditions |
c5e52916 | 222 | ?@ add branch conditions followed by nullify |
7d627258 JL |
223 | ?d non-negated add branch conditions |
224 | ?D negated add branch conditions | |
225 | ?w wide mode non-negated add branch conditions | |
226 | ?W wide mode negated add branch conditions | |
c5e52916 JL |
227 | |
228 | ?s compare/subtract conditions | |
7d627258 | 229 | ?S 64 bit compare/subtract conditions |
eca04c6a JL |
230 | ?t non-negated compare and branch conditions |
231 | ?n 32 bit compare and branch conditions followed by nullify | |
232 | ?N 64 bit compare and branch conditions followed by nullify | |
233 | ?Q 64 bit compare and branch conditions for CMPIB instruction | |
c5e52916 JL |
234 | |
235 | ?l logical conditions | |
7d627258 JL |
236 | ?L 64 bit logical conditions |
237 | ||
c5e52916 | 238 | ?b branch on bit conditions |
7d627258 | 239 | ?B 64 bit branch on bit conditions |
c5e52916 JL |
240 | |
241 | ?x shift/extract/deposit conditions | |
7d627258 | 242 | ?X 64 bit shift/extract/deposit conditions |
c5e52916 JL |
243 | ?y shift/extract/deposit conditions followed by nullify for conditional |
244 | branches | |
245 | ||
246 | ?u unit conditions | |
7d627258 | 247 | ?U 64 bit unit conditions |
c5e52916 | 248 | |
7d8fdb64 | 249 | Floating point registers all have 'f' as a prefix: |
ec3533da | 250 | |
7d8fdb64 JL |
251 | ft target register at 31 |
252 | fT target register with L/R halves at 31 | |
253 | fa operand 1 register at 10 | |
254 | fA operand 1 register with L/R halves at 10 | |
9392fb11 | 255 | fX Same as fA, except prints a space before register during disasm |
7d8fdb64 JL |
256 | fb operand 2 register at 15 |
257 | fB operand 2 register with L/R halves at 15 | |
258 | fC operand 3 register with L/R halves at 16:18,21:23 | |
c49ec3da | 259 | fe Like fT, but encoding is different. |
a7fba0e0 JL |
260 | fE Same as fe, except prints a space before register during disasm. |
261 | fx target register at 15 (only for PA 2.0 long format FLDD/FSTD). | |
7d8fdb64 JL |
262 | |
263 | Float registers for fmpyadd and fmpysub: | |
264 | ||
265 | fi mult operand 1 register at 10 | |
266 | fj mult operand 2 register at 15 | |
267 | fk mult target register at 20 | |
268 | fl add/sub operand register at 25 | |
269 | fm add/sub target register at 31 | |
252b5132 | 270 | |
7d627258 | 271 | */ |
252b5132 RH |
272 | |
273 | ||
3f2a9fb7 | 274 | #if 0 |
252b5132 RH |
275 | /* List of characters not to put a space after. Note that |
276 | "," is included, as the "spopN" operations use literal | |
a7fba0e0 | 277 | commas in their completer sections. */ |
252b5132 | 278 | static const char *const completer_chars = ",CcY<>?!@+&U~FfGHINnOoZMadu|/=0123%e$m}"; |
3f2a9fb7 | 279 | #endif |
252b5132 RH |
280 | |
281 | /* The order of the opcodes in this table is significant: | |
282 | ||
f417d200 DA |
283 | * The assembler requires that all instances of the same mnemonic be |
284 | consecutive. If they aren't, the assembler will bomb at runtime. | |
252b5132 | 285 | |
f0a3b40f DA |
286 | * Immediate fields use pa_get_absolute_expression to parse the |
287 | string. It will generate a "bad expression" error if passed | |
288 | a register name. Thus, register index variants of an opcode | |
289 | need to precede immediate variants. | |
290 | ||
f417d200 DA |
291 | * The disassembler does not care about the order of the opcodes |
292 | except in cases where implicit addressing is used. | |
252b5132 | 293 | |
f417d200 DA |
294 | Here are the rules for ordering the opcodes of a mnemonic: |
295 | ||
f0a3b40f DA |
296 | 1) Opcodes with FLAG_STRICT should precede opcodes without |
297 | FLAG_STRICT. | |
f417d200 DA |
298 | |
299 | 2) Opcodes with FLAG_STRICT should be ordered as follows: | |
300 | register index opcodes, short immediate opcodes, and finally | |
f0a3b40f DA |
301 | long immediate opcodes. When both pa10 and pa11 variants |
302 | of the same opcode are available, the pa10 opcode should | |
303 | come first for correct architectural promotion. | |
f417d200 | 304 | |
f0a3b40f DA |
305 | 3) When implicit addressing is available for an opcode, the |
306 | implicit opcode should precede the explicit opcode. | |
f417d200 | 307 | |
f0a3b40f DA |
308 | 4) Opcodes without FLAG_STRICT should be ordered as follows: |
309 | register index opcodes, long immediate opcodes, and finally | |
310 | short immediate opcodes. */ | |
f417d200 | 311 | |
252b5132 RH |
312 | static const struct pa_opcode pa_opcodes[] = |
313 | { | |
314 | ||
a7fba0e0 | 315 | /* Pseudo-instructions. */ |
252b5132 | 316 | |
1328dc98 | 317 | { "ldi", 0x34000000, 0xffe00000, "l,x", pa20w, 0},/* ldo val(r0),r */ |
8c47ebd9 | 318 | { "ldi", 0x34000000, 0xffe0c000, "j,x", pa10, 0},/* ldo val(r0),r */ |
390f858d | 319 | |
caa05036 | 320 | { "cmpib", 0xec000000, 0xfc000000, "?Qn5,b,w", pa20, FLAG_STRICT}, |
eca04c6a | 321 | { "cmpib", 0x84000000, 0xf4000000, "?nn5,b,w", pa10, FLAG_STRICT}, |
8c47ebd9 | 322 | { "comib", 0x84000000, 0xfc000000, "?nn5,b,w", pa10, 0}, /* comib{tf}*/ |
e26b85f0 JL |
323 | /* This entry is for the disassembler only. It will never be used by |
324 | assembler. */ | |
8c47ebd9 | 325 | { "comib", 0x8c000000, 0xfc000000, "?nn5,b,w", pa10, 0}, /* comib{tf}*/ |
eca04c6a JL |
326 | { "cmpb", 0x9c000000, 0xdc000000, "?Nnx,b,w", pa20, FLAG_STRICT}, |
327 | { "cmpb", 0x80000000, 0xf4000000, "?nnx,b,w", pa10, FLAG_STRICT}, | |
8c47ebd9 | 328 | { "comb", 0x80000000, 0xfc000000, "?nnx,b,w", pa10, 0}, /* comb{tf} */ |
e26b85f0 JL |
329 | /* This entry is for the disassembler only. It will never be used by |
330 | assembler. */ | |
8c47ebd9 | 331 | { "comb", 0x88000000, 0xfc000000, "?nnx,b,w", pa10, 0}, /* comb{tf} */ |
1befefea | 332 | { "addb", 0xa0000000, 0xf4000000, "?Wnx,b,w", pa20w, FLAG_STRICT}, |
8c47ebd9 | 333 | { "addb", 0xa0000000, 0xfc000000, "?@nx,b,w", pa10, 0}, /* addb{tf} */ |
e26b85f0 JL |
334 | /* This entry is for the disassembler only. It will never be used by |
335 | assembler. */ | |
8c47ebd9 | 336 | { "addb", 0xa8000000, 0xfc000000, "?@nx,b,w", pa10, 0}, |
1befefea | 337 | { "addib", 0xa4000000, 0xf4000000, "?Wn5,b,w", pa20w, FLAG_STRICT}, |
8c47ebd9 | 338 | { "addib", 0xa4000000, 0xfc000000, "?@n5,b,w", pa10, 0}, /* addib{tf}*/ |
e26b85f0 JL |
339 | /* This entry is for the disassembler only. It will never be used by |
340 | assembler. */ | |
8c47ebd9 | 341 | { "addib", 0xac000000, 0xfc000000, "?@n5,b,w", pa10, 0}, /* addib{tf}*/ |
caa05036 DA |
342 | { "nop", 0x08000240, 0xffffffff, "", pa10, 0}, /* or 0,0,0 */ |
343 | { "copy", 0x08000240, 0xffe0ffe0, "x,t", pa10, 0}, /* or r,0,t */ | |
344 | { "mtsar", 0x01601840, 0xffe0ffff, "x", pa10, 0}, /* mtctl r,cr11 */ | |
252b5132 RH |
345 | |
346 | /* Loads and Stores for integer registers. */ | |
eca04c6a | 347 | |
f417d200 | 348 | { "ldd", 0x0c0000c0, 0xfc00d3c0, "cxccx(b),t", pa20, FLAG_STRICT}, |
caa05036 | 349 | { "ldd", 0x0c0000c0, 0xfc0013c0, "cxccx(s,b),t", pa20, FLAG_STRICT}, |
f417d200 DA |
350 | { "ldd", 0x0c0010e0, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT}, |
351 | { "ldd", 0x0c0010e0, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT}, | |
352 | { "ldd", 0x0c0010c0, 0xfc00d3c0, "cmcc5(b),t", pa20, FLAG_STRICT}, | |
eca04c6a | 353 | { "ldd", 0x0c0010c0, 0xfc0013c0, "cmcc5(s,b),t", pa20, FLAG_STRICT}, |
caa05036 | 354 | { "ldd", 0x50000000, 0xfc000002, "cq&(b),x", pa20w, FLAG_STRICT}, |
f417d200 DA |
355 | { "ldd", 0x50000000, 0xfc00c002, "cq#(b),x", pa20, FLAG_STRICT}, |
356 | { "ldd", 0x50000000, 0xfc000002, "cq#(s,b),x", pa20, FLAG_STRICT}, | |
f0a3b40f DA |
357 | { "ldw", 0x0c000080, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT}, |
358 | { "ldw", 0x0c000080, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT}, | |
f417d200 | 359 | { "ldw", 0x0c000080, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT}, |
caa05036 | 360 | { "ldw", 0x0c000080, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT}, |
f417d200 | 361 | { "ldw", 0x0c0010a0, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT}, |
1befefea | 362 | { "ldw", 0x0c0010a0, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT}, |
f0a3b40f DA |
363 | { "ldw", 0x0c001080, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT}, |
364 | { "ldw", 0x0c001080, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT}, | |
f417d200 DA |
365 | { "ldw", 0x0c001080, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT}, |
366 | { "ldw", 0x0c001080, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT}, | |
caa05036 | 367 | { "ldw", 0x4c000000, 0xfc000000, "ce<(b),x", pa20w, FLAG_STRICT}, |
caa05036 | 368 | { "ldw", 0x5c000004, 0xfc000006, "ce>(b),x", pa20w, FLAG_STRICT}, |
caa05036 | 369 | { "ldw", 0x48000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT}, |
f417d200 DA |
370 | { "ldw", 0x5c000004, 0xfc00c006, "ceK(b),x", pa20, FLAG_STRICT}, |
371 | { "ldw", 0x5c000004, 0xfc000006, "ceK(s,b),x", pa20, FLAG_STRICT}, | |
f0a3b40f DA |
372 | { "ldw", 0x4c000000, 0xfc00c000, "ceJ(b),x", pa10, FLAG_STRICT}, |
373 | { "ldw", 0x4c000000, 0xfc000000, "ceJ(s,b),x", pa10, FLAG_STRICT}, | |
f417d200 | 374 | { "ldw", 0x48000000, 0xfc00c000, "j(b),x", pa10, 0}, |
caa05036 | 375 | { "ldw", 0x48000000, 0xfc000000, "j(s,b),x", pa10, 0}, |
f0a3b40f DA |
376 | { "ldh", 0x0c000040, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT}, |
377 | { "ldh", 0x0c000040, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT}, | |
f417d200 | 378 | { "ldh", 0x0c000040, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT}, |
caa05036 | 379 | { "ldh", 0x0c000040, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT}, |
f417d200 | 380 | { "ldh", 0x0c001060, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT}, |
1befefea | 381 | { "ldh", 0x0c001060, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT}, |
f0a3b40f DA |
382 | { "ldh", 0x0c001040, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT}, |
383 | { "ldh", 0x0c001040, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT}, | |
f417d200 DA |
384 | { "ldh", 0x0c001040, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT}, |
385 | { "ldh", 0x0c001040, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT}, | |
caa05036 | 386 | { "ldh", 0x44000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT}, |
f417d200 | 387 | { "ldh", 0x44000000, 0xfc00c000, "j(b),x", pa10, 0}, |
caa05036 | 388 | { "ldh", 0x44000000, 0xfc000000, "j(s,b),x", pa10, 0}, |
f0a3b40f DA |
389 | { "ldb", 0x0c000000, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT}, |
390 | { "ldb", 0x0c000000, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT}, | |
f417d200 | 391 | { "ldb", 0x0c000000, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT}, |
caa05036 | 392 | { "ldb", 0x0c000000, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT}, |
f417d200 | 393 | { "ldb", 0x0c001020, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT}, |
1befefea | 394 | { "ldb", 0x0c001020, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT}, |
f0a3b40f DA |
395 | { "ldb", 0x0c001000, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT}, |
396 | { "ldb", 0x0c001000, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT}, | |
f417d200 DA |
397 | { "ldb", 0x0c001000, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT}, |
398 | { "ldb", 0x0c001000, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT}, | |
caa05036 | 399 | { "ldb", 0x40000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT}, |
f417d200 | 400 | { "ldb", 0x40000000, 0xfc00c000, "j(b),x", pa10, 0}, |
caa05036 | 401 | { "ldb", 0x40000000, 0xfc000000, "j(s,b),x", pa10, 0}, |
f417d200 | 402 | { "std", 0x0c0012e0, 0xfc00f3ff, "cocCx,@(b)", pa20, FLAG_STRICT}, |
eca04c6a | 403 | { "std", 0x0c0012e0, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT}, |
f417d200 | 404 | { "std", 0x0c0012c0, 0xfc00d3c0, "cmcCx,V(b)", pa20, FLAG_STRICT}, |
eca04c6a | 405 | { "std", 0x0c0012c0, 0xfc0013c0, "cmcCx,V(s,b)", pa20, FLAG_STRICT}, |
caa05036 | 406 | { "std", 0x70000000, 0xfc000002, "cqx,&(b)", pa20w, FLAG_STRICT}, |
f417d200 DA |
407 | { "std", 0x70000000, 0xfc00c002, "cqx,#(b)", pa20, FLAG_STRICT}, |
408 | { "std", 0x70000000, 0xfc000002, "cqx,#(s,b)", pa20, FLAG_STRICT}, | |
409 | { "stw", 0x0c0012a0, 0xfc00f3ff, "cocCx,@(b)", pa20, FLAG_STRICT}, | |
410 | { "stw", 0x0c0012a0, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT}, | |
f0a3b40f DA |
411 | { "stw", 0x0c001280, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT}, |
412 | { "stw", 0x0c001280, 0xfc001fc0, "cMx,V(s,b)", pa10, FLAG_STRICT}, | |
f417d200 | 413 | { "stw", 0x0c001280, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, |
caa05036 | 414 | { "stw", 0x0c001280, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT}, |
caa05036 | 415 | { "stw", 0x6c000000, 0xfc000000, "cex,<(b)", pa20w, FLAG_STRICT}, |
caa05036 | 416 | { "stw", 0x7c000004, 0xfc000006, "cex,>(b)", pa20w, FLAG_STRICT}, |
caa05036 | 417 | { "stw", 0x68000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT}, |
f417d200 DA |
418 | { "stw", 0x7c000004, 0xfc00c006, "cex,K(b)", pa20, FLAG_STRICT}, |
419 | { "stw", 0x7c000004, 0xfc000006, "cex,K(s,b)", pa20, FLAG_STRICT}, | |
f0a3b40f DA |
420 | { "stw", 0x6c000000, 0xfc00c000, "cex,J(b)", pa10, FLAG_STRICT}, |
421 | { "stw", 0x6c000000, 0xfc000000, "cex,J(s,b)", pa10, FLAG_STRICT}, | |
f417d200 | 422 | { "stw", 0x68000000, 0xfc00c000, "x,j(b)", pa10, 0}, |
caa05036 | 423 | { "stw", 0x68000000, 0xfc000000, "x,j(s,b)", pa10, 0}, |
f417d200 | 424 | { "sth", 0x0c001260, 0xfc00f3ff, "cocCx,@(b)", pa20, FLAG_STRICT}, |
1befefea | 425 | { "sth", 0x0c001260, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT}, |
f0a3b40f DA |
426 | { "sth", 0x0c001240, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT}, |
427 | { "sth", 0x0c001240, 0xfc001fc0, "cMx,V(s,b)", pa10, FLAG_STRICT}, | |
f417d200 DA |
428 | { "sth", 0x0c001240, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, |
429 | { "sth", 0x0c001240, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT}, | |
caa05036 | 430 | { "sth", 0x64000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT}, |
f417d200 | 431 | { "sth", 0x64000000, 0xfc00c000, "x,j(b)", pa10, 0}, |
caa05036 | 432 | { "sth", 0x64000000, 0xfc000000, "x,j(s,b)", pa10, 0}, |
f417d200 | 433 | { "stb", 0x0c001220, 0xfc00f3ff, "cocCx,@(b)", pa20, FLAG_STRICT}, |
1befefea | 434 | { "stb", 0x0c001220, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT}, |
f0a3b40f DA |
435 | { "stb", 0x0c001200, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT}, |
436 | { "stb", 0x0c001200, 0xfc001fc0, "cMx,V(s,b)", pa10, FLAG_STRICT}, | |
f417d200 DA |
437 | { "stb", 0x0c001200, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, |
438 | { "stb", 0x0c001200, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT}, | |
caa05036 | 439 | { "stb", 0x60000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT}, |
f417d200 | 440 | { "stb", 0x60000000, 0xfc00c000, "x,j(b)", pa10, 0}, |
caa05036 | 441 | { "stb", 0x60000000, 0xfc000000, "x,j(s,b)", pa10, 0}, |
f417d200 | 442 | { "ldwm", 0x4c000000, 0xfc00c000, "j(b),x", pa10, 0}, |
caa05036 | 443 | { "ldwm", 0x4c000000, 0xfc000000, "j(s,b),x", pa10, 0}, |
f417d200 | 444 | { "stwm", 0x6c000000, 0xfc00c000, "x,j(b)", pa10, 0}, |
caa05036 | 445 | { "stwm", 0x6c000000, 0xfc000000, "x,j(s,b)", pa10, 0}, |
f0a3b40f DA |
446 | { "ldwx", 0x0c000080, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT}, |
447 | { "ldwx", 0x0c000080, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT}, | |
f417d200 | 448 | { "ldwx", 0x0c000080, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT}, |
caa05036 | 449 | { "ldwx", 0x0c000080, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT}, |
f417d200 | 450 | { "ldwx", 0x0c000080, 0xfc00dfc0, "cXx(b),t", pa10, 0}, |
48f130a8 | 451 | { "ldwx", 0x0c000080, 0xfc001fc0, "cXx(s,b),t", pa10, 0}, |
f0a3b40f DA |
452 | { "ldhx", 0x0c000040, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT}, |
453 | { "ldhx", 0x0c000040, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT}, | |
f417d200 | 454 | { "ldhx", 0x0c000040, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT}, |
caa05036 | 455 | { "ldhx", 0x0c000040, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT}, |
f417d200 | 456 | { "ldhx", 0x0c000040, 0xfc00dfc0, "cXx(b),t", pa10, 0}, |
48f130a8 | 457 | { "ldhx", 0x0c000040, 0xfc001fc0, "cXx(s,b),t", pa10, 0}, |
f0a3b40f DA |
458 | { "ldbx", 0x0c000000, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT}, |
459 | { "ldbx", 0x0c000000, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT}, | |
f417d200 | 460 | { "ldbx", 0x0c000000, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT}, |
caa05036 | 461 | { "ldbx", 0x0c000000, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT}, |
f417d200 | 462 | { "ldbx", 0x0c000000, 0xfc00dfc0, "cXx(b),t", pa10, 0}, |
48f130a8 | 463 | { "ldbx", 0x0c000000, 0xfc001fc0, "cXx(s,b),t", pa10, 0}, |
f0a3b40f | 464 | { "ldwa", 0x0c000180, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT}, |
caa05036 | 465 | { "ldwa", 0x0c000180, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT}, |
974a8e9c | 466 | { "ldwa", 0x0c0011a0, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT}, |
f0a3b40f | 467 | { "ldwa", 0x0c001180, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT}, |
f417d200 | 468 | { "ldwa", 0x0c001180, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT}, |
f0a3b40f DA |
469 | { "ldcw", 0x0c0001c0, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT}, |
470 | { "ldcw", 0x0c0001c0, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT}, | |
f417d200 | 471 | { "ldcw", 0x0c0001c0, 0xfc00d3c0, "cxcdx(b),t", pa11, FLAG_STRICT}, |
caa05036 | 472 | { "ldcw", 0x0c0001c0, 0xfc0013c0, "cxcdx(s,b),t", pa11, FLAG_STRICT}, |
f0a3b40f DA |
473 | { "ldcw", 0x0c0011c0, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT}, |
474 | { "ldcw", 0x0c0011c0, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT}, | |
f417d200 | 475 | { "ldcw", 0x0c0011c0, 0xfc00d3c0, "cmcd5(b),t", pa11, FLAG_STRICT}, |
caa05036 | 476 | { "ldcw", 0x0c0011c0, 0xfc0013c0, "cmcd5(s,b),t", pa11, FLAG_STRICT}, |
1befefea | 477 | { "stwa", 0x0c0013a0, 0xfc00d3ff, "cocCx,@(b)", pa20, FLAG_STRICT}, |
f0a3b40f | 478 | { "stwa", 0x0c001380, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT}, |
f417d200 | 479 | { "stwa", 0x0c001380, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, |
f0a3b40f DA |
480 | { "stby", 0x0c001300, 0xfc00dfc0, "cAx,V(b)", pa10, FLAG_STRICT}, |
481 | { "stby", 0x0c001300, 0xfc001fc0, "cAx,V(s,b)", pa10, FLAG_STRICT}, | |
f417d200 | 482 | { "stby", 0x0c001300, 0xfc00d3c0, "cscCx,V(b)", pa11, FLAG_STRICT}, |
caa05036 | 483 | { "stby", 0x0c001300, 0xfc0013c0, "cscCx,V(s,b)", pa11, FLAG_STRICT}, |
caa05036 | 484 | { "ldda", 0x0c000100, 0xfc00d3c0, "cxccx(b),t", pa20, FLAG_STRICT}, |
974a8e9c | 485 | { "ldda", 0x0c001120, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT}, |
f417d200 DA |
486 | { "ldda", 0x0c001100, 0xfc00d3c0, "cmcc5(b),t", pa20, FLAG_STRICT}, |
487 | { "ldcd", 0x0c000140, 0xfc00d3c0, "cxcdx(b),t", pa20, FLAG_STRICT}, | |
caa05036 | 488 | { "ldcd", 0x0c000140, 0xfc0013c0, "cxcdx(s,b),t", pa20, FLAG_STRICT}, |
f417d200 | 489 | { "ldcd", 0x0c001140, 0xfc00d3c0, "cmcd5(b),t", pa20, FLAG_STRICT}, |
eca04c6a | 490 | { "ldcd", 0x0c001140, 0xfc0013c0, "cmcd5(s,b),t", pa20, FLAG_STRICT}, |
f417d200 DA |
491 | { "stda", 0x0c0013e0, 0xfc00f3ff, "cocCx,@(b)", pa20, FLAG_STRICT}, |
492 | { "stda", 0x0c0013c0, 0xfc00d3c0, "cmcCx,V(b)", pa20, FLAG_STRICT}, | |
f0a3b40f | 493 | { "ldwax", 0x0c000180, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT}, |
caa05036 | 494 | { "ldwax", 0x0c000180, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT}, |
48f130a8 | 495 | { "ldwax", 0x0c000180, 0xfc00dfc0, "cXx(b),t", pa10, 0}, |
f0a3b40f DA |
496 | { "ldcwx", 0x0c0001c0, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT}, |
497 | { "ldcwx", 0x0c0001c0, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT}, | |
f417d200 | 498 | { "ldcwx", 0x0c0001c0, 0xfc00d3c0, "cxcdx(b),t", pa11, FLAG_STRICT}, |
caa05036 | 499 | { "ldcwx", 0x0c0001c0, 0xfc0013c0, "cxcdx(s,b),t", pa11, FLAG_STRICT}, |
f417d200 | 500 | { "ldcwx", 0x0c0001c0, 0xfc00dfc0, "cXx(b),t", pa10, 0}, |
48f130a8 | 501 | { "ldcwx", 0x0c0001c0, 0xfc001fc0, "cXx(s,b),t", pa10, 0}, |
f0a3b40f DA |
502 | { "ldws", 0x0c001080, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT}, |
503 | { "ldws", 0x0c001080, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT}, | |
f417d200 | 504 | { "ldws", 0x0c001080, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT}, |
caa05036 | 505 | { "ldws", 0x0c001080, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT}, |
f417d200 | 506 | { "ldws", 0x0c001080, 0xfc00dfc0, "cM5(b),t", pa10, 0}, |
48f130a8 | 507 | { "ldws", 0x0c001080, 0xfc001fc0, "cM5(s,b),t", pa10, 0}, |
f0a3b40f DA |
508 | { "ldhs", 0x0c001040, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT}, |
509 | { "ldhs", 0x0c001040, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT}, | |
f417d200 | 510 | { "ldhs", 0x0c001040, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT}, |
caa05036 | 511 | { "ldhs", 0x0c001040, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT}, |
f417d200 | 512 | { "ldhs", 0x0c001040, 0xfc00dfc0, "cM5(b),t", pa10, 0}, |
48f130a8 | 513 | { "ldhs", 0x0c001040, 0xfc001fc0, "cM5(s,b),t", pa10, 0}, |
f0a3b40f DA |
514 | { "ldbs", 0x0c001000, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT}, |
515 | { "ldbs", 0x0c001000, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT}, | |
f417d200 | 516 | { "ldbs", 0x0c001000, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT}, |
caa05036 | 517 | { "ldbs", 0x0c001000, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT}, |
f417d200 | 518 | { "ldbs", 0x0c001000, 0xfc00dfc0, "cM5(b),t", pa10, 0}, |
48f130a8 | 519 | { "ldbs", 0x0c001000, 0xfc001fc0, "cM5(s,b),t", pa10, 0}, |
f0a3b40f | 520 | { "ldwas", 0x0c001180, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT}, |
caa05036 | 521 | { "ldwas", 0x0c001180, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT}, |
48f130a8 | 522 | { "ldwas", 0x0c001180, 0xfc00dfc0, "cM5(b),t", pa10, 0}, |
f0a3b40f DA |
523 | { "ldcws", 0x0c0011c0, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT}, |
524 | { "ldcws", 0x0c0011c0, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT}, | |
f417d200 | 525 | { "ldcws", 0x0c0011c0, 0xfc00d3c0, "cmcd5(b),t", pa11, FLAG_STRICT}, |
caa05036 | 526 | { "ldcws", 0x0c0011c0, 0xfc0013c0, "cmcd5(s,b),t", pa11, FLAG_STRICT}, |
f417d200 | 527 | { "ldcws", 0x0c0011c0, 0xfc00dfc0, "cM5(b),t", pa10, 0}, |
48f130a8 | 528 | { "ldcws", 0x0c0011c0, 0xfc001fc0, "cM5(s,b),t", pa10, 0}, |
f0a3b40f DA |
529 | { "stws", 0x0c001280, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT}, |
530 | { "stws", 0x0c001280, 0xfc001fc0, "cMx,V(s,b)", pa10, FLAG_STRICT}, | |
f417d200 | 531 | { "stws", 0x0c001280, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, |
caa05036 | 532 | { "stws", 0x0c001280, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT}, |
f417d200 | 533 | { "stws", 0x0c001280, 0xfc00dfc0, "cMx,V(b)", pa10, 0}, |
48f130a8 | 534 | { "stws", 0x0c001280, 0xfc001fc0, "cMx,V(s,b)", pa10, 0}, |
f0a3b40f DA |
535 | { "sths", 0x0c001240, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT}, |
536 | { "sths", 0x0c001240, 0xfc001fc0, "cMx,V(s,b)", pa10, FLAG_STRICT}, | |
f417d200 | 537 | { "sths", 0x0c001240, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, |
caa05036 | 538 | { "sths", 0x0c001240, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT}, |
f417d200 | 539 | { "sths", 0x0c001240, 0xfc00dfc0, "cMx,V(b)", pa10, 0}, |
48f130a8 | 540 | { "sths", 0x0c001240, 0xfc001fc0, "cMx,V(s,b)", pa10, 0}, |
f0a3b40f DA |
541 | { "stbs", 0x0c001200, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT}, |
542 | { "stbs", 0x0c001200, 0xfc001fc0, "cMx,V(s,b)", pa10, FLAG_STRICT}, | |
f417d200 | 543 | { "stbs", 0x0c001200, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, |
caa05036 | 544 | { "stbs", 0x0c001200, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT}, |
f417d200 | 545 | { "stbs", 0x0c001200, 0xfc00dfc0, "cMx,V(b)", pa10, 0}, |
48f130a8 | 546 | { "stbs", 0x0c001200, 0xfc001fc0, "cMx,V(s,b)", pa10, 0}, |
f0a3b40f | 547 | { "stwas", 0x0c001380, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT}, |
caa05036 | 548 | { "stwas", 0x0c001380, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, |
48f130a8 | 549 | { "stwas", 0x0c001380, 0xfc00dfc0, "cMx,V(b)", pa10, 0}, |
f417d200 | 550 | { "stdby", 0x0c001340, 0xfc00d3c0, "cscCx,V(b)", pa20, FLAG_STRICT}, |
eca04c6a | 551 | { "stdby", 0x0c001340, 0xfc0013c0, "cscCx,V(s,b)", pa20, FLAG_STRICT}, |
f0a3b40f DA |
552 | { "stbys", 0x0c001300, 0xfc00dfc0, "cAx,V(b)", pa10, FLAG_STRICT}, |
553 | { "stbys", 0x0c001300, 0xfc001fc0, "cAx,V(s,b)", pa10, FLAG_STRICT}, | |
f417d200 | 554 | { "stbys", 0x0c001300, 0xfc00d3c0, "cscCx,V(b)", pa11, FLAG_STRICT}, |
caa05036 | 555 | { "stbys", 0x0c001300, 0xfc0013c0, "cscCx,V(s,b)", pa11, FLAG_STRICT}, |
f417d200 | 556 | { "stbys", 0x0c001300, 0xfc00dfc0, "cAx,V(b)", pa10, 0}, |
48f130a8 | 557 | { "stbys", 0x0c001300, 0xfc001fc0, "cAx,V(s,b)", pa10, 0}, |
252b5132 RH |
558 | |
559 | /* Immediate instructions. */ | |
1328dc98 | 560 | { "ldo", 0x34000000, 0xfc000000, "l(b),x", pa20w, 0}, |
8c47ebd9 JL |
561 | { "ldo", 0x34000000, 0xfc00c000, "j(b),x", pa10, 0}, |
562 | { "ldil", 0x20000000, 0xfc000000, "k,b", pa10, 0}, | |
563 | { "addil", 0x28000000, 0xfc000000, "k,b,Z", pa10, 0}, | |
564 | { "addil", 0x28000000, 0xfc000000, "k,b", pa10, 0}, | |
252b5132 | 565 | |
a7fba0e0 | 566 | /* Branching instructions. */ |
390f858d JL |
567 | { "b", 0xe8008000, 0xfc00e000, "cpnXL", pa20, FLAG_STRICT}, |
568 | { "b", 0xe800a000, 0xfc00e000, "clnXL", pa20, FLAG_STRICT}, | |
569 | { "b", 0xe8000000, 0xfc00e000, "clnW,b", pa10, FLAG_STRICT}, | |
570 | { "b", 0xe8002000, 0xfc00e000, "cgnW,b", pa10, FLAG_STRICT}, | |
146e763a | 571 | { "b", 0xe8000000, 0xffe0e000, "nW", pa10, 0}, /* b,l foo,r0 */ |
8c47ebd9 JL |
572 | { "bl", 0xe8000000, 0xfc00e000, "nW,b", pa10, 0}, |
573 | { "gate", 0xe8002000, 0xfc00e000, "nW,b", pa10, 0}, | |
574 | { "blr", 0xe8004000, 0xfc00e001, "nx,b", pa10, 0}, | |
575 | { "bv", 0xe800c000, 0xfc00fffd, "nx(b)", pa10, 0}, | |
576 | { "bv", 0xe800c000, 0xfc00fffd, "n(b)", pa10, 0}, | |
390f858d JL |
577 | { "bve", 0xe800f001, 0xfc1ffffd, "cpn(b)L", pa20, FLAG_STRICT}, |
578 | { "bve", 0xe800f000, 0xfc1ffffd, "cln(b)L", pa20, FLAG_STRICT}, | |
579 | { "bve", 0xe800d001, 0xfc1ffffd, "cPn(b)", pa20, FLAG_STRICT}, | |
580 | { "bve", 0xe800d000, 0xfc1ffffd, "n(b)", pa20, FLAG_STRICT}, | |
581 | { "be", 0xe4000000, 0xfc000000, "clnz(S,b),Y", pa10, FLAG_STRICT}, | |
582 | { "be", 0xe4000000, 0xfc000000, "clnz(b),Y", pa10, FLAG_STRICT}, | |
8c47ebd9 | 583 | { "be", 0xe0000000, 0xfc000000, "nz(S,b)", pa10, 0}, |
390f858d | 584 | { "be", 0xe0000000, 0xfc000000, "nz(b)", pa10, 0}, |
8c47ebd9 JL |
585 | { "ble", 0xe4000000, 0xfc000000, "nz(S,b)", pa10, 0}, |
586 | { "movb", 0xc8000000, 0xfc000000, "?ynx,b,w", pa10, 0}, | |
587 | { "movib", 0xcc000000, 0xfc000000, "?yn5,b,w", pa10, 0}, | |
588 | { "combt", 0x80000000, 0xfc000000, "?tnx,b,w", pa10, 0}, | |
589 | { "combf", 0x88000000, 0xfc000000, "?tnx,b,w", pa10, 0}, | |
590 | { "comibt", 0x84000000, 0xfc000000, "?tn5,b,w", pa10, 0}, | |
591 | { "comibf", 0x8c000000, 0xfc000000, "?tn5,b,w", pa10, 0}, | |
592 | { "addbt", 0xa0000000, 0xfc000000, "?dnx,b,w", pa10, 0}, | |
593 | { "addbf", 0xa8000000, 0xfc000000, "?dnx,b,w", pa10, 0}, | |
594 | { "addibt", 0xa4000000, 0xfc000000, "?dn5,b,w", pa10, 0}, | |
595 | { "addibf", 0xac000000, 0xfc000000, "?dn5,b,w", pa10, 0}, | |
34bdd094 | 596 | { "bb", 0xc0004000, 0xffe06000, "?bnx,!,w", pa10, FLAG_STRICT}, |
1befefea | 597 | { "bb", 0xc0006000, 0xffe06000, "?Bnx,!,w", pa20, FLAG_STRICT}, |
34bdd094 | 598 | { "bb", 0xc4004000, 0xfc006000, "?bnx,Q,w", pa10, FLAG_STRICT}, |
1befefea | 599 | { "bb", 0xc4004000, 0xfc004000, "?Bnx,B,w", pa20, FLAG_STRICT}, |
8c47ebd9 | 600 | { "bvb", 0xc0004000, 0xffe04000, "?bnx,w", pa10, 0}, |
88a380f3 | 601 | { "clrbts", 0xe8004005, 0xffffffff, "", pa20, FLAG_STRICT}, |
e9fc28c6 | 602 | { "popbts", 0xe8004005, 0xfffff007, "$", pa20, FLAG_STRICT}, |
88a380f3 JL |
603 | { "pushnom", 0xe8004001, 0xffffffff, "", pa20, FLAG_STRICT}, |
604 | { "pushbts", 0xe8004001, 0xffe0ffff, "x", pa20, FLAG_STRICT}, | |
252b5132 | 605 | |
a7fba0e0 | 606 | /* Computation Instructions. */ |
252b5132 | 607 | |
caa05036 DA |
608 | { "cmpclr", 0x080008a0, 0xfc000fe0, "?Sx,b,t", pa20, FLAG_STRICT}, |
609 | { "cmpclr", 0x08000880, 0xfc000fe0, "?sx,b,t", pa10, FLAG_STRICT}, | |
610 | { "comclr", 0x08000880, 0xfc000fe0, "?sx,b,t", pa10, 0}, | |
611 | { "or", 0x08000260, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT}, | |
612 | { "or", 0x08000240, 0xfc000fe0, "?lx,b,t", pa10, 0}, | |
613 | { "xor", 0x080002a0, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT}, | |
614 | { "xor", 0x08000280, 0xfc000fe0, "?lx,b,t", pa10, 0}, | |
615 | { "and", 0x08000220, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT}, | |
616 | { "and", 0x08000200, 0xfc000fe0, "?lx,b,t", pa10, 0}, | |
617 | { "andcm", 0x08000020, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT}, | |
618 | { "andcm", 0x08000000, 0xfc000fe0, "?lx,b,t", pa10, 0}, | |
619 | { "uxor", 0x080003a0, 0xfc000fe0, "?Ux,b,t", pa20, FLAG_STRICT}, | |
620 | { "uxor", 0x08000380, 0xfc000fe0, "?ux,b,t", pa10, 0}, | |
621 | { "uaddcm", 0x080009a0, 0xfc000fa0, "cT?Ux,b,t", pa20, FLAG_STRICT}, | |
622 | { "uaddcm", 0x08000980, 0xfc000fa0, "cT?ux,b,t", pa10, FLAG_STRICT}, | |
623 | { "uaddcm", 0x08000980, 0xfc000fe0, "?ux,b,t", pa10, 0}, | |
624 | { "uaddcmt", 0x080009c0, 0xfc000fe0, "?ux,b,t", pa10, 0}, | |
625 | { "dcor", 0x08000ba0, 0xfc1f0fa0, "ci?Ub,t", pa20, FLAG_STRICT}, | |
626 | { "dcor", 0x08000b80, 0xfc1f0fa0, "ci?ub,t", pa10, FLAG_STRICT}, | |
627 | { "dcor", 0x08000b80, 0xfc1f0fe0, "?ub,t", pa10, 0}, | |
628 | { "idcor", 0x08000bc0, 0xfc1f0fe0, "?ub,t", pa10, 0}, | |
629 | { "addi", 0xb0000000, 0xfc000000, "ct?ai,b,x", pa10, FLAG_STRICT}, | |
630 | { "addi", 0xb4000000, 0xfc000000, "cv?ai,b,x", pa10, FLAG_STRICT}, | |
631 | { "addi", 0xb4000000, 0xfc000800, "?ai,b,x", pa10, 0}, | |
632 | { "addio", 0xb4000800, 0xfc000800, "?ai,b,x", pa10, 0}, | |
633 | { "addit", 0xb0000000, 0xfc000800, "?ai,b,x", pa10, 0}, | |
634 | { "addito", 0xb0000800, 0xfc000800, "?ai,b,x", pa10, 0}, | |
635 | { "add", 0x08000720, 0xfc0007e0, "cY?Ax,b,t", pa20, FLAG_STRICT}, | |
636 | { "add", 0x08000700, 0xfc0007e0, "cy?ax,b,t", pa10, FLAG_STRICT}, | |
637 | { "add", 0x08000220, 0xfc0003e0, "ca?Ax,b,t", pa20, FLAG_STRICT}, | |
638 | { "add", 0x08000200, 0xfc0003e0, "ca?ax,b,t", pa10, FLAG_STRICT}, | |
639 | { "add", 0x08000600, 0xfc000fe0, "?ax,b,t", pa10, 0}, | |
640 | { "addl", 0x08000a00, 0xfc000fe0, "?ax,b,t", pa10, 0}, | |
641 | { "addo", 0x08000e00, 0xfc000fe0, "?ax,b,t", pa10, 0}, | |
642 | { "addc", 0x08000700, 0xfc000fe0, "?ax,b,t", pa10, 0}, | |
643 | { "addco", 0x08000f00, 0xfc000fe0, "?ax,b,t", pa10, 0}, | |
644 | { "sub", 0x080004e0, 0xfc0007e0, "ct?Sx,b,t", pa20, FLAG_STRICT}, | |
645 | { "sub", 0x080004c0, 0xfc0007e0, "ct?sx,b,t", pa10, FLAG_STRICT}, | |
646 | { "sub", 0x08000520, 0xfc0007e0, "cB?Sx,b,t", pa20, FLAG_STRICT}, | |
647 | { "sub", 0x08000500, 0xfc0007e0, "cb?sx,b,t", pa10, FLAG_STRICT}, | |
648 | { "sub", 0x08000420, 0xfc0007e0, "cv?Sx,b,t", pa20, FLAG_STRICT}, | |
649 | { "sub", 0x08000400, 0xfc0007e0, "cv?sx,b,t", pa10, FLAG_STRICT}, | |
650 | { "sub", 0x08000400, 0xfc000fe0, "?sx,b,t", pa10, 0}, | |
651 | { "subo", 0x08000c00, 0xfc000fe0, "?sx,b,t", pa10, 0}, | |
652 | { "subb", 0x08000500, 0xfc000fe0, "?sx,b,t", pa10, 0}, | |
653 | { "subbo", 0x08000d00, 0xfc000fe0, "?sx,b,t", pa10, 0}, | |
654 | { "subt", 0x080004c0, 0xfc000fe0, "?sx,b,t", pa10, 0}, | |
655 | { "subto", 0x08000cc0, 0xfc000fe0, "?sx,b,t", pa10, 0}, | |
656 | { "ds", 0x08000440, 0xfc000fe0, "?sx,b,t", pa10, 0}, | |
657 | { "subi", 0x94000000, 0xfc000000, "cv?si,b,x", pa10, FLAG_STRICT}, | |
658 | { "subi", 0x94000000, 0xfc000800, "?si,b,x", pa10, 0}, | |
659 | { "subio", 0x94000800, 0xfc000800, "?si,b,x", pa10, 0}, | |
660 | { "cmpiclr", 0x90000800, 0xfc000800, "?Si,b,x", pa20, FLAG_STRICT}, | |
661 | { "cmpiclr", 0x90000000, 0xfc000800, "?si,b,x", pa10, FLAG_STRICT}, | |
662 | { "comiclr", 0x90000000, 0xfc000800, "?si,b,x", pa10, 0}, | |
663 | { "shladd", 0x08000220, 0xfc000320, "ca?Ax,.,b,t", pa20, FLAG_STRICT}, | |
664 | { "shladd", 0x08000200, 0xfc000320, "ca?ax,.,b,t", pa10, FLAG_STRICT}, | |
665 | { "sh1add", 0x08000640, 0xfc000fe0, "?ax,b,t", pa10, 0}, | |
666 | { "sh1addl", 0x08000a40, 0xfc000fe0, "?ax,b,t", pa10, 0}, | |
667 | { "sh1addo", 0x08000e40, 0xfc000fe0, "?ax,b,t", pa10, 0}, | |
668 | { "sh2add", 0x08000680, 0xfc000fe0, "?ax,b,t", pa10, 0}, | |
669 | { "sh2addl", 0x08000a80, 0xfc000fe0, "?ax,b,t", pa10, 0}, | |
670 | { "sh2addo", 0x08000e80, 0xfc000fe0, "?ax,b,t", pa10, 0}, | |
671 | { "sh3add", 0x080006c0, 0xfc000fe0, "?ax,b,t", pa10, 0}, | |
672 | { "sh3addl", 0x08000ac0, 0xfc000fe0, "?ax,b,t", pa10, 0}, | |
673 | { "sh3addo", 0x08000ec0, 0xfc000fe0, "?ax,b,t", pa10, 0}, | |
252b5132 | 674 | |
a7fba0e0 | 675 | /* Subword Operation Instructions. */ |
e9fc28c6 | 676 | |
caa05036 DA |
677 | { "hadd", 0x08000300, 0xfc00ff20, "cHx,b,t", pa20, FLAG_STRICT}, |
678 | { "havg", 0x080002c0, 0xfc00ffe0, "x,b,t", pa20, FLAG_STRICT}, | |
679 | { "hshl", 0xf8008800, 0xffe0fc20, "x,*,t", pa20, FLAG_STRICT}, | |
680 | { "hshladd", 0x08000700, 0xfc00ff20, "x,.,b,t", pa20, FLAG_STRICT}, | |
681 | { "hshr", 0xf800c800, 0xfc1ff820, "cSb,*,t", pa20, FLAG_STRICT}, | |
682 | { "hshradd", 0x08000500, 0xfc00ff20, "x,.,b,t", pa20, FLAG_STRICT}, | |
683 | { "hsub", 0x08000100, 0xfc00ff20, "cHx,b,t", pa20, FLAG_STRICT}, | |
684 | { "mixh", 0xf8008400, 0xfc009fe0, "chx,b,t", pa20, FLAG_STRICT}, | |
685 | { "mixw", 0xf8008000, 0xfc009fe0, "chx,b,t", pa20, FLAG_STRICT}, | |
686 | { "permh", 0xf8000000, 0xfc009020, "c*a,t", pa20, FLAG_STRICT}, | |
e9fc28c6 JL |
687 | |
688 | ||
a7fba0e0 | 689 | /* Extract and Deposit Instructions. */ |
252b5132 | 690 | |
caa05036 DA |
691 | { "shrpd", 0xd0000200, 0xfc001fe0, "?Xx,b,!,t", pa20, FLAG_STRICT}, |
692 | { "shrpd", 0xd0000400, 0xfc001400, "?Xx,b,~,t", pa20, FLAG_STRICT}, | |
693 | { "shrpw", 0xd0000000, 0xfc001fe0, "?xx,b,!,t", pa10, FLAG_STRICT}, | |
694 | { "shrpw", 0xd0000800, 0xfc001c00, "?xx,b,p,t", pa10, FLAG_STRICT}, | |
695 | { "vshd", 0xd0000000, 0xfc001fe0, "?xx,b,t", pa10, 0}, | |
696 | { "shd", 0xd0000800, 0xfc001c00, "?xx,b,p,t", pa10, 0}, | |
697 | { "extrd", 0xd0001200, 0xfc001ae0, "cS?Xb,!,%,x", pa20, FLAG_STRICT}, | |
698 | { "extrd", 0xd8000000, 0xfc000000, "cS?Xb,q,|,x", pa20, FLAG_STRICT}, | |
699 | { "extrw", 0xd0001000, 0xfc001be0, "cS?xb,!,T,x", pa10, FLAG_STRICT}, | |
700 | { "extrw", 0xd0001800, 0xfc001800, "cS?xb,P,T,x", pa10, FLAG_STRICT}, | |
701 | { "vextru", 0xd0001000, 0xfc001fe0, "?xb,T,x", pa10, 0}, | |
702 | { "vextrs", 0xd0001400, 0xfc001fe0, "?xb,T,x", pa10, 0}, | |
703 | { "extru", 0xd0001800, 0xfc001c00, "?xb,P,T,x", pa10, 0}, | |
704 | { "extrs", 0xd0001c00, 0xfc001c00, "?xb,P,T,x", pa10, 0}, | |
705 | { "depd", 0xd4000200, 0xfc001ae0, "cz?Xx,!,%,b", pa20, FLAG_STRICT}, | |
706 | { "depd", 0xf0000000, 0xfc000000, "cz?Xx,~,|,b", pa20, FLAG_STRICT}, | |
707 | { "depdi", 0xd4001200, 0xfc001ae0, "cz?X5,!,%,b", pa20, FLAG_STRICT}, | |
708 | { "depdi", 0xf4000000, 0xfc000000, "cz?X5,~,|,b", pa20, FLAG_STRICT}, | |
709 | { "depw", 0xd4000000, 0xfc001be0, "cz?xx,!,T,b", pa10, FLAG_STRICT}, | |
710 | { "depw", 0xd4000800, 0xfc001800, "cz?xx,p,T,b", pa10, FLAG_STRICT}, | |
711 | { "depwi", 0xd4001000, 0xfc001be0, "cz?x5,!,T,b", pa10, FLAG_STRICT}, | |
712 | { "depwi", 0xd4001800, 0xfc001800, "cz?x5,p,T,b", pa10, FLAG_STRICT}, | |
713 | { "zvdep", 0xd4000000, 0xfc001fe0, "?xx,T,b", pa10, 0}, | |
714 | { "vdep", 0xd4000400, 0xfc001fe0, "?xx,T,b", pa10, 0}, | |
715 | { "zdep", 0xd4000800, 0xfc001c00, "?xx,p,T,b", pa10, 0}, | |
716 | { "dep", 0xd4000c00, 0xfc001c00, "?xx,p,T,b", pa10, 0}, | |
717 | { "zvdepi", 0xd4001000, 0xfc001fe0, "?x5,T,b", pa10, 0}, | |
718 | { "vdepi", 0xd4001400, 0xfc001fe0, "?x5,T,b", pa10, 0}, | |
719 | { "zdepi", 0xd4001800, 0xfc001c00, "?x5,p,T,b", pa10, 0}, | |
720 | { "depi", 0xd4001c00, 0xfc001c00, "?x5,p,T,b", pa10, 0}, | |
252b5132 | 721 | |
a7fba0e0 | 722 | /* System Control Instructions. */ |
252b5132 | 723 | |
caa05036 DA |
724 | { "break", 0x00000000, 0xfc001fe0, "r,A", pa10, 0}, |
725 | { "rfi", 0x00000c00, 0xffffff1f, "cr", pa10, FLAG_STRICT}, | |
726 | { "rfi", 0x00000c00, 0xffffffff, "", pa10, 0}, | |
727 | { "rfir", 0x00000ca0, 0xffffffff, "", pa11, 0}, | |
728 | { "ssm", 0x00000d60, 0xfc00ffe0, "U,t", pa20, FLAG_STRICT}, | |
729 | { "ssm", 0x00000d60, 0xffe0ffe0, "R,t", pa10, 0}, | |
730 | { "rsm", 0x00000e60, 0xfc00ffe0, "U,t", pa20, FLAG_STRICT}, | |
731 | { "rsm", 0x00000e60, 0xffe0ffe0, "R,t", pa10, 0}, | |
732 | { "mtsm", 0x00001860, 0xffe0ffff, "x", pa10, 0}, | |
f417d200 | 733 | { "ldsid", 0x000010a0, 0xfc1fffe0, "(b),t", pa10, 0}, |
caa05036 | 734 | { "ldsid", 0x000010a0, 0xfc1f3fe0, "(s,b),t", pa10, 0}, |
caa05036 DA |
735 | { "mtsp", 0x00001820, 0xffe01fff, "x,S", pa10, 0}, |
736 | { "mtctl", 0x00001840, 0xfc00ffff, "x,^", pa10, 0}, | |
737 | { "mtsarcm", 0x016018C0, 0xffe0ffff, "x", pa20, FLAG_STRICT}, | |
738 | { "mfia", 0x000014A0, 0xffffffe0, "t", pa20, FLAG_STRICT}, | |
739 | { "mfsp", 0x000004a0, 0xffff1fe0, "S,t", pa10, 0}, | |
740 | { "mfctl", 0x016048a0, 0xffffffe0, "cW!,t", pa20, FLAG_STRICT}, | |
741 | { "mfctl", 0x000008a0, 0xfc1fffe0, "^,t", pa10, 0}, | |
742 | { "sync", 0x00000400, 0xffffffff, "", pa10, 0}, | |
743 | { "syncdma", 0x00100400, 0xffffffff, "", pa10, 0}, | |
f417d200 | 744 | { "probe", 0x04001180, 0xfc00ffa0, "cw(b),x,t", pa10, FLAG_STRICT}, |
caa05036 | 745 | { "probe", 0x04001180, 0xfc003fa0, "cw(s,b),x,t", pa10, FLAG_STRICT}, |
f417d200 | 746 | { "probei", 0x04003180, 0xfc00ffa0, "cw(b),R,t", pa10, FLAG_STRICT}, |
caa05036 | 747 | { "probei", 0x04003180, 0xfc003fa0, "cw(s,b),R,t", pa10, FLAG_STRICT}, |
f417d200 | 748 | { "prober", 0x04001180, 0xfc00ffe0, "(b),x,t", pa10, 0}, |
caa05036 | 749 | { "prober", 0x04001180, 0xfc003fe0, "(s,b),x,t", pa10, 0}, |
f417d200 | 750 | { "proberi", 0x04003180, 0xfc00ffe0, "(b),R,t", pa10, 0}, |
caa05036 | 751 | { "proberi", 0x04003180, 0xfc003fe0, "(s,b),R,t", pa10, 0}, |
f417d200 | 752 | { "probew", 0x040011c0, 0xfc00ffe0, "(b),x,t", pa10, 0}, |
caa05036 | 753 | { "probew", 0x040011c0, 0xfc003fe0, "(s,b),x,t", pa10, 0}, |
f417d200 | 754 | { "probewi", 0x040031c0, 0xfc00ffe0, "(b),R,t", pa10, 0}, |
caa05036 | 755 | { "probewi", 0x040031c0, 0xfc003fe0, "(s,b),R,t", pa10, 0}, |
f417d200 | 756 | { "lpa", 0x04001340, 0xfc00ffc0, "cZx(b),t", pa10, 0}, |
caa05036 | 757 | { "lpa", 0x04001340, 0xfc003fc0, "cZx(s,b),t", pa10, 0}, |
4d443107 DA |
758 | { "lci", 0x04001300, 0xfc00ffe0, "x(b),t", pa11, 0}, |
759 | { "lci", 0x04001300, 0xfc003fe0, "x(s,b),t", pa11, 0}, | |
f417d200 | 760 | { "pdtlb", 0x04001600, 0xfc00ffdf, "cLcZx(b)", pa20, FLAG_STRICT}, |
caa05036 | 761 | { "pdtlb", 0x04001600, 0xfc003fdf, "cLcZx(s,b)", pa20, FLAG_STRICT}, |
f7b8cccc DA |
762 | { "pdtlb", 0x04001600, 0xfc1fffdf, "cLcZ@(b)", pa20, FLAG_STRICT}, |
763 | { "pdtlb", 0x04001600, 0xfc1f3fdf, "cLcZ@(s,b)", pa20, FLAG_STRICT}, | |
f417d200 | 764 | { "pdtlb", 0x04001200, 0xfc00ffdf, "cZx(b)", pa10, 0}, |
caa05036 | 765 | { "pdtlb", 0x04001200, 0xfc003fdf, "cZx(s,b)", pa10, 0}, |
caa05036 | 766 | { "pitlb", 0x04000600, 0xfc001fdf, "cLcZx(S,b)", pa20, FLAG_STRICT}, |
f7b8cccc | 767 | { "pitlb", 0x04000600, 0xfc1f1fdf, "cLcZ@(S,b)", pa20, FLAG_STRICT}, |
caa05036 | 768 | { "pitlb", 0x04000200, 0xfc001fdf, "cZx(S,b)", pa10, 0}, |
f417d200 | 769 | { "pdtlbe", 0x04001240, 0xfc00ffdf, "cZx(b)", pa10, 0}, |
caa05036 | 770 | { "pdtlbe", 0x04001240, 0xfc003fdf, "cZx(s,b)", pa10, 0}, |
caa05036 | 771 | { "pitlbe", 0x04000240, 0xfc001fdf, "cZx(S,b)", pa10, 0}, |
f417d200 | 772 | { "idtlba", 0x04001040, 0xfc00ffff, "x,(b)", pa10, 0}, |
caa05036 | 773 | { "idtlba", 0x04001040, 0xfc003fff, "x,(s,b)", pa10, 0}, |
caa05036 | 774 | { "iitlba", 0x04000040, 0xfc001fff, "x,(S,b)", pa10, 0}, |
f417d200 | 775 | { "idtlbp", 0x04001000, 0xfc00ffff, "x,(b)", pa10, 0}, |
caa05036 | 776 | { "idtlbp", 0x04001000, 0xfc003fff, "x,(s,b)", pa10, 0}, |
caa05036 | 777 | { "iitlbp", 0x04000000, 0xfc001fff, "x,(S,b)", pa10, 0}, |
f417d200 | 778 | { "pdc", 0x04001380, 0xfc00ffdf, "cZx(b)", pa10, 0}, |
caa05036 | 779 | { "pdc", 0x04001380, 0xfc003fdf, "cZx(s,b)", pa10, 0}, |
f0a3b40f DA |
780 | { "fdc", 0x04001280, 0xfc00ffdf, "cZx(b)", pa10, FLAG_STRICT}, |
781 | { "fdc", 0x04001280, 0xfc003fdf, "cZx(s,b)", pa10, FLAG_STRICT}, | |
1b7e1362 DA |
782 | { "fdc", 0x04003280, 0xfc00ffff, "5(b)", pa20, FLAG_STRICT}, |
783 | { "fdc", 0x04003280, 0xfc003fff, "5(s,b)", pa20, FLAG_STRICT}, | |
f417d200 | 784 | { "fdc", 0x04001280, 0xfc00ffdf, "cZx(b)", pa10, 0}, |
caa05036 | 785 | { "fdc", 0x04001280, 0xfc003fdf, "cZx(s,b)", pa10, 0}, |
1b7e1362 | 786 | { "fic", 0x040013c0, 0xfc00dfdf, "cZx(b)", pa20, FLAG_STRICT}, |
caa05036 | 787 | { "fic", 0x04000280, 0xfc001fdf, "cZx(S,b)", pa10, 0}, |
f417d200 | 788 | { "fdce", 0x040012c0, 0xfc00ffdf, "cZx(b)", pa10, 0}, |
caa05036 | 789 | { "fdce", 0x040012c0, 0xfc003fdf, "cZx(s,b)", pa10, 0}, |
caa05036 | 790 | { "fice", 0x040002c0, 0xfc001fdf, "cZx(S,b)", pa10, 0}, |
caa05036 DA |
791 | { "diag", 0x14000000, 0xfc000000, "D", pa10, 0}, |
792 | { "idtlbt", 0x04001800, 0xfc00ffff, "x,b", pa20, FLAG_STRICT}, | |
793 | { "iitlbt", 0x04000800, 0xfc00ffff, "x,b", pa20, FLAG_STRICT}, | |
252b5132 | 794 | |
aa008907 JL |
795 | /* These may be specific to certain versions of the PA. Joel claimed |
796 | they were 72000 (7200?) specific. However, I'm almost certain the | |
797 | mtcpu/mfcpu were undocumented, but available in the older 700 machines. */ | |
caa05036 DA |
798 | { "mtcpu", 0x14001600, 0xfc00ffff, "x,^", pa10, 0}, |
799 | { "mfcpu", 0x14001A00, 0xfc00ffff, "^,x", pa10, 0}, | |
800 | { "tocen", 0x14403600, 0xffffffff, "", pa10, 0}, | |
801 | { "tocdis", 0x14401620, 0xffffffff, "", pa10, 0}, | |
802 | { "shdwgr", 0x14402600, 0xffffffff, "", pa10, 0}, | |
803 | { "grshdw", 0x14400620, 0xffffffff, "", pa10, 0}, | |
aa008907 | 804 | |
252b5132 RH |
805 | /* gfw and gfr are not in the HP PA 1.1 manual, but they are in either |
806 | the Timex FPU or the Mustang ERS (not sure which) manual. */ | |
f417d200 | 807 | { "gfw", 0x04001680, 0xfc00ffdf, "cZx(b)", pa11, 0}, |
8c47ebd9 | 808 | { "gfw", 0x04001680, 0xfc003fdf, "cZx(s,b)", pa11, 0}, |
f417d200 | 809 | { "gfr", 0x04001a80, 0xfc00ffdf, "cZx(b)", pa11, 0}, |
8c47ebd9 | 810 | { "gfr", 0x04001a80, 0xfc003fdf, "cZx(s,b)", pa11, 0}, |
252b5132 | 811 | |
a7fba0e0 | 812 | /* Floating Point Coprocessor Instructions. */ |
6397d1a2 | 813 | |
f0a3b40f DA |
814 | { "fldw", 0x24000000, 0xfc00df80, "cXx(b),fT", pa10, FLAG_STRICT}, |
815 | { "fldw", 0x24000000, 0xfc001f80, "cXx(s,b),fT", pa10, FLAG_STRICT}, | |
f417d200 | 816 | { "fldw", 0x24000000, 0xfc00d380, "cxccx(b),fT", pa11, FLAG_STRICT}, |
caa05036 | 817 | { "fldw", 0x24000000, 0xfc001380, "cxccx(s,b),fT", pa11, FLAG_STRICT}, |
f417d200 | 818 | { "fldw", 0x24001020, 0xfc1ff3a0, "cocc@(b),fT", pa20, FLAG_STRICT}, |
caa05036 | 819 | { "fldw", 0x24001020, 0xfc1f33a0, "cocc@(s,b),fT", pa20, FLAG_STRICT}, |
f0a3b40f DA |
820 | { "fldw", 0x24001000, 0xfc00df80, "cM5(b),fT", pa10, FLAG_STRICT}, |
821 | { "fldw", 0x24001000, 0xfc001f80, "cM5(s,b),fT", pa10, FLAG_STRICT}, | |
f417d200 DA |
822 | { "fldw", 0x24001000, 0xfc00d380, "cmcc5(b),fT", pa11, FLAG_STRICT}, |
823 | { "fldw", 0x24001000, 0xfc001380, "cmcc5(s,b),fT", pa11, FLAG_STRICT}, | |
caa05036 DA |
824 | { "fldw", 0x5c000000, 0xfc000004, "y(b),fe", pa20w, FLAG_STRICT}, |
825 | { "fldw", 0x58000000, 0xfc000000, "cJy(b),fe", pa20w, FLAG_STRICT}, | |
f417d200 DA |
826 | { "fldw", 0x5c000000, 0xfc00c004, "d(b),fe", pa20, FLAG_STRICT}, |
827 | { "fldw", 0x5c000000, 0xfc000004, "d(s,b),fe", pa20, FLAG_STRICT}, | |
828 | { "fldw", 0x58000000, 0xfc00c000, "cJd(b),fe", pa20, FLAG_STRICT}, | |
829 | { "fldw", 0x58000000, 0xfc000000, "cJd(s,b),fe", pa20, FLAG_STRICT}, | |
f0a3b40f DA |
830 | { "fldd", 0x2c000000, 0xfc00dfc0, "cXx(b),ft", pa10, FLAG_STRICT}, |
831 | { "fldd", 0x2c000000, 0xfc001fc0, "cXx(s,b),ft", pa10, FLAG_STRICT}, | |
f417d200 | 832 | { "fldd", 0x2c000000, 0xfc00d3c0, "cxccx(b),ft", pa11, FLAG_STRICT}, |
caa05036 | 833 | { "fldd", 0x2c000000, 0xfc0013c0, "cxccx(s,b),ft", pa11, FLAG_STRICT}, |
f417d200 | 834 | { "fldd", 0x2c001020, 0xfc1ff3e0, "cocc@(b),ft", pa20, FLAG_STRICT}, |
caa05036 | 835 | { "fldd", 0x2c001020, 0xfc1f33e0, "cocc@(s,b),ft", pa20, FLAG_STRICT}, |
f0a3b40f DA |
836 | { "fldd", 0x2c001000, 0xfc00dfc0, "cM5(b),ft", pa10, FLAG_STRICT}, |
837 | { "fldd", 0x2c001000, 0xfc001fc0, "cM5(s,b),ft", pa10, FLAG_STRICT}, | |
f417d200 DA |
838 | { "fldd", 0x2c001000, 0xfc00d3c0, "cmcc5(b),ft", pa11, FLAG_STRICT}, |
839 | { "fldd", 0x2c001000, 0xfc0013c0, "cmcc5(s,b),ft", pa11, FLAG_STRICT}, | |
caa05036 | 840 | { "fldd", 0x50000002, 0xfc000002, "cq&(b),fx", pa20w, FLAG_STRICT}, |
f417d200 DA |
841 | { "fldd", 0x50000002, 0xfc00c002, "cq#(b),fx", pa20, FLAG_STRICT}, |
842 | { "fldd", 0x50000002, 0xfc000002, "cq#(s,b),fx", pa20, FLAG_STRICT}, | |
f0a3b40f DA |
843 | { "fstw", 0x24000200, 0xfc00df80, "cXfT,x(b)", pa10, FLAG_STRICT}, |
844 | { "fstw", 0x24000200, 0xfc001f80, "cXfT,x(s,b)", pa10, FLAG_STRICT}, | |
f417d200 | 845 | { "fstw", 0x24000200, 0xfc00d380, "cxcCfT,x(b)", pa11, FLAG_STRICT}, |
caa05036 | 846 | { "fstw", 0x24000200, 0xfc001380, "cxcCfT,x(s,b)", pa11, FLAG_STRICT}, |
f417d200 | 847 | { "fstw", 0x24001220, 0xfc1ff3a0, "cocCfT,@(b)", pa20, FLAG_STRICT}, |
caa05036 | 848 | { "fstw", 0x24001220, 0xfc1f33a0, "cocCfT,@(s,b)", pa20, FLAG_STRICT}, |
f417d200 DA |
849 | { "fstw", 0x24001200, 0xfc00df80, "cMfT,5(b)", pa10, FLAG_STRICT}, |
850 | { "fstw", 0x24001200, 0xfc001f80, "cMfT,5(s,b)", pa10, FLAG_STRICT}, | |
f0a3b40f DA |
851 | { "fstw", 0x24001200, 0xfc00df80, "cMfT,5(b)", pa10, FLAG_STRICT}, |
852 | { "fstw", 0x24001200, 0xfc001f80, "cMfT,5(s,b)", pa10, FLAG_STRICT}, | |
caa05036 | 853 | { "fstw", 0x7c000000, 0xfc000004, "fE,y(b)", pa20w, FLAG_STRICT}, |
f417d200 DA |
854 | { "fstw", 0x78000000, 0xfc000000, "cJfE,y(b)", pa20w, FLAG_STRICT}, |
855 | { "fstw", 0x7c000000, 0xfc00c004, "fE,d(b)", pa20, FLAG_STRICT}, | |
856 | { "fstw", 0x7c000000, 0xfc000004, "fE,d(s,b)", pa20, FLAG_STRICT}, | |
857 | { "fstw", 0x78000000, 0xfc00c000, "cJfE,d(b)", pa20, FLAG_STRICT}, | |
858 | { "fstw", 0x78000000, 0xfc000000, "cJfE,d(s,b)", pa20, FLAG_STRICT}, | |
f0a3b40f DA |
859 | { "fstd", 0x2c000200, 0xfc00dfc0, "cXft,x(b)", pa10, FLAG_STRICT}, |
860 | { "fstd", 0x2c000200, 0xfc001fc0, "cXft,x(s,b)", pa10, FLAG_STRICT}, | |
f417d200 | 861 | { "fstd", 0x2c000200, 0xfc00d3c0, "cxcCft,x(b)", pa11, FLAG_STRICT}, |
caa05036 | 862 | { "fstd", 0x2c000200, 0xfc0013c0, "cxcCft,x(s,b)", pa11, FLAG_STRICT}, |
f417d200 | 863 | { "fstd", 0x2c001220, 0xfc1ff3e0, "cocCft,@(b)", pa20, FLAG_STRICT}, |
caa05036 | 864 | { "fstd", 0x2c001220, 0xfc1f33e0, "cocCft,@(s,b)", pa20, FLAG_STRICT}, |
f0a3b40f DA |
865 | { "fstd", 0x2c001200, 0xfc00dfc0, "cMft,5(b)", pa10, FLAG_STRICT}, |
866 | { "fstd", 0x2c001200, 0xfc001fc0, "cMft,5(s,b)", pa10, FLAG_STRICT}, | |
f417d200 DA |
867 | { "fstd", 0x2c001200, 0xfc00d3c0, "cmcCft,5(b)", pa11, FLAG_STRICT}, |
868 | { "fstd", 0x2c001200, 0xfc0013c0, "cmcCft,5(s,b)", pa11, FLAG_STRICT}, | |
caa05036 | 869 | { "fstd", 0x70000002, 0xfc000002, "cqfx,&(b)", pa20w, FLAG_STRICT}, |
f417d200 DA |
870 | { "fstd", 0x70000002, 0xfc00c002, "cqfx,#(b)", pa20, FLAG_STRICT}, |
871 | { "fstd", 0x70000002, 0xfc000002, "cqfx,#(s,b)", pa20, FLAG_STRICT}, | |
f0a3b40f DA |
872 | { "fldwx", 0x24000000, 0xfc00df80, "cXx(b),fT", pa10, FLAG_STRICT}, |
873 | { "fldwx", 0x24000000, 0xfc001f80, "cXx(s,b),fT", pa10, FLAG_STRICT}, | |
f417d200 | 874 | { "fldwx", 0x24000000, 0xfc00d380, "cxccx(b),fT", pa11, FLAG_STRICT}, |
caa05036 | 875 | { "fldwx", 0x24000000, 0xfc001380, "cxccx(s,b),fT", pa11, FLAG_STRICT}, |
f417d200 | 876 | { "fldwx", 0x24000000, 0xfc00df80, "cXx(b),fT", pa10, 0}, |
48f130a8 | 877 | { "fldwx", 0x24000000, 0xfc001f80, "cXx(s,b),fT", pa10, 0}, |
f0a3b40f DA |
878 | { "flddx", 0x2c000000, 0xfc00dfc0, "cXx(b),ft", pa10, FLAG_STRICT}, |
879 | { "flddx", 0x2c000000, 0xfc001fc0, "cXx(s,b),ft", pa10, FLAG_STRICT}, | |
f417d200 | 880 | { "flddx", 0x2c000000, 0xfc00d3c0, "cxccx(b),ft", pa11, FLAG_STRICT}, |
caa05036 | 881 | { "flddx", 0x2c000000, 0xfc0013c0, "cxccx(s,b),ft", pa11, FLAG_STRICT}, |
f417d200 | 882 | { "flddx", 0x2c000000, 0xfc00dfc0, "cXx(b),ft", pa10, 0}, |
48f130a8 | 883 | { "flddx", 0x2c000000, 0xfc001fc0, "cXx(s,b),ft", pa10, 0}, |
f0a3b40f DA |
884 | { "fstwx", 0x24000200, 0xfc00df80, "cxfT,x(b)", pa10, FLAG_STRICT}, |
885 | { "fstwx", 0x24000200, 0xfc001f80, "cxfT,x(s,b)", pa10, FLAG_STRICT}, | |
f417d200 | 886 | { "fstwx", 0x24000200, 0xfc00d380, "cxcCfT,x(b)", pa11, FLAG_STRICT}, |
caa05036 | 887 | { "fstwx", 0x24000200, 0xfc001380, "cxcCfT,x(s,b)", pa11, FLAG_STRICT}, |
f417d200 | 888 | { "fstwx", 0x24000200, 0xfc00df80, "cxfT,x(b)", pa10, 0}, |
48f130a8 | 889 | { "fstwx", 0x24000200, 0xfc001f80, "cxfT,x(s,b)", pa10, 0}, |
f0a3b40f DA |
890 | { "fstdx", 0x2c000200, 0xfc00dfc0, "cxft,x(b)", pa10, FLAG_STRICT}, |
891 | { "fstdx", 0x2c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, FLAG_STRICT}, | |
f417d200 | 892 | { "fstdx", 0x2c000200, 0xfc00d3c0, "cxcCft,x(b)", pa11, FLAG_STRICT}, |
caa05036 | 893 | { "fstdx", 0x2c000200, 0xfc0013c0, "cxcCft,x(s,b)", pa11, FLAG_STRICT}, |
f417d200 | 894 | { "fstdx", 0x2c000200, 0xfc00dfc0, "cxft,x(b)", pa10, 0}, |
48f130a8 | 895 | { "fstdx", 0x2c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, 0}, |
f417d200 | 896 | { "fstqx", 0x3c000200, 0xfc00dfc0, "cxft,x(b)", pa10, 0}, |
caa05036 | 897 | { "fstqx", 0x3c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, 0}, |
f0a3b40f DA |
898 | { "fldws", 0x24001000, 0xfc00df80, "cm5(b),fT", pa10, FLAG_STRICT}, |
899 | { "fldws", 0x24001000, 0xfc001f80, "cm5(s,b),fT", pa10, FLAG_STRICT}, | |
f417d200 | 900 | { "fldws", 0x24001000, 0xfc00d380, "cmcc5(b),fT", pa11, FLAG_STRICT}, |
caa05036 | 901 | { "fldws", 0x24001000, 0xfc001380, "cmcc5(s,b),fT", pa11, FLAG_STRICT}, |
f417d200 | 902 | { "fldws", 0x24001000, 0xfc00df80, "cm5(b),fT", pa10, 0}, |
48f130a8 | 903 | { "fldws", 0x24001000, 0xfc001f80, "cm5(s,b),fT", pa10, 0}, |
f0a3b40f DA |
904 | { "fldds", 0x2c001000, 0xfc00dfc0, "cm5(b),ft", pa10, FLAG_STRICT}, |
905 | { "fldds", 0x2c001000, 0xfc001fc0, "cm5(s,b),ft", pa10, FLAG_STRICT}, | |
f417d200 | 906 | { "fldds", 0x2c001000, 0xfc00d3c0, "cmcc5(b),ft", pa11, FLAG_STRICT}, |
caa05036 | 907 | { "fldds", 0x2c001000, 0xfc0013c0, "cmcc5(s,b),ft", pa11, FLAG_STRICT}, |
f417d200 | 908 | { "fldds", 0x2c001000, 0xfc00dfc0, "cm5(b),ft", pa10, 0}, |
48f130a8 | 909 | { "fldds", 0x2c001000, 0xfc001fc0, "cm5(s,b),ft", pa10, 0}, |
f0a3b40f DA |
910 | { "fstws", 0x24001200, 0xfc00df80, "cmfT,5(b)", pa10, FLAG_STRICT}, |
911 | { "fstws", 0x24001200, 0xfc001f80, "cmfT,5(s,b)", pa10, FLAG_STRICT}, | |
f417d200 | 912 | { "fstws", 0x24001200, 0xfc00d380, "cmcCfT,5(b)", pa11, FLAG_STRICT}, |
caa05036 | 913 | { "fstws", 0x24001200, 0xfc001380, "cmcCfT,5(s,b)", pa11, FLAG_STRICT}, |
f417d200 | 914 | { "fstws", 0x24001200, 0xfc00df80, "cmfT,5(b)", pa10, 0}, |
48f130a8 | 915 | { "fstws", 0x24001200, 0xfc001f80, "cmfT,5(s,b)", pa10, 0}, |
f0a3b40f DA |
916 | { "fstds", 0x2c001200, 0xfc00dfc0, "cmft,5(b)", pa10, FLAG_STRICT}, |
917 | { "fstds", 0x2c001200, 0xfc001fc0, "cmft,5(s,b)", pa10, FLAG_STRICT}, | |
f417d200 | 918 | { "fstds", 0x2c001200, 0xfc00d3c0, "cmcCft,5(b)", pa11, FLAG_STRICT}, |
caa05036 | 919 | { "fstds", 0x2c001200, 0xfc0013c0, "cmcCft,5(s,b)", pa11, FLAG_STRICT}, |
f417d200 | 920 | { "fstds", 0x2c001200, 0xfc00dfc0, "cmft,5(b)", pa10, 0}, |
48f130a8 | 921 | { "fstds", 0x2c001200, 0xfc001fc0, "cmft,5(s,b)", pa10, 0}, |
f417d200 | 922 | { "fstqs", 0x3c001200, 0xfc00dfc0, "cmft,5(b)", pa10, 0}, |
caa05036 | 923 | { "fstqs", 0x3c001200, 0xfc001fc0, "cmft,5(s,b)", pa10, 0}, |
caa05036 DA |
924 | { "fadd", 0x30000600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0}, |
925 | { "fadd", 0x38000600, 0xfc00e720, "IfA,fB,fT", pa10, 0}, | |
926 | { "fsub", 0x30002600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0}, | |
927 | { "fsub", 0x38002600, 0xfc00e720, "IfA,fB,fT", pa10, 0}, | |
928 | { "fmpy", 0x30004600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0}, | |
929 | { "fmpy", 0x38004600, 0xfc00e720, "IfA,fB,fT", pa10, 0}, | |
930 | { "fdiv", 0x30006600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0}, | |
931 | { "fdiv", 0x38006600, 0xfc00e720, "IfA,fB,fT", pa10, 0}, | |
932 | { "fsqrt", 0x30008000, 0xfc1fe7e0, "Ffa,fT", pa10, 0}, | |
933 | { "fsqrt", 0x38008000, 0xfc1fe720, "FfA,fT", pa10, 0}, | |
934 | { "fabs", 0x30006000, 0xfc1fe7e0, "Ffa,fT", pa10, 0}, | |
935 | { "fabs", 0x38006000, 0xfc1fe720, "FfA,fT", pa10, 0}, | |
936 | { "frem", 0x30008600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0}, | |
937 | { "frem", 0x38008600, 0xfc00e720, "FfA,fB,fT", pa10, 0}, | |
938 | { "frnd", 0x3000a000, 0xfc1fe7e0, "Ffa,fT", pa10, 0}, | |
939 | { "frnd", 0x3800a000, 0xfc1fe720, "FfA,fT", pa10, 0}, | |
940 | { "fcpy", 0x30004000, 0xfc1fe7e0, "Ffa,fT", pa10, 0}, | |
941 | { "fcpy", 0x38004000, 0xfc1fe720, "FfA,fT", pa10, 0}, | |
942 | { "fcnvff", 0x30000200, 0xfc1f87e0, "FGfa,fT", pa10, 0}, | |
943 | { "fcnvff", 0x38000200, 0xfc1f8720, "FGfA,fT", pa10, 0}, | |
944 | { "fcnvxf", 0x30008200, 0xfc1f87e0, "FGfa,fT", pa10, 0}, | |
945 | { "fcnvxf", 0x38008200, 0xfc1f8720, "FGfA,fT", pa10, 0}, | |
946 | { "fcnvfx", 0x30010200, 0xfc1f87e0, "FGfa,fT", pa10, 0}, | |
947 | { "fcnvfx", 0x38010200, 0xfc1f8720, "FGfA,fT", pa10, 0}, | |
948 | { "fcnvfxt", 0x30018200, 0xfc1f87e0, "FGfa,fT", pa10, 0}, | |
949 | { "fcnvfxt", 0x38018200, 0xfc1f8720, "FGfA,fT", pa10, 0}, | |
950 | { "fmpyfadd", 0xb8000000, 0xfc000020, "IfA,fB,fC,fT", pa20, FLAG_STRICT}, | |
951 | { "fmpynfadd", 0xb8000020, 0xfc000020, "IfA,fB,fC,fT", pa20, FLAG_STRICT}, | |
952 | { "fneg", 0x3000c000, 0xfc1fe7e0, "Ffa,fT", pa20, FLAG_STRICT}, | |
953 | { "fneg", 0x3800c000, 0xfc1fe720, "IfA,fT", pa20, FLAG_STRICT}, | |
954 | { "fnegabs", 0x3000e000, 0xfc1fe7e0, "Ffa,fT", pa20, FLAG_STRICT}, | |
955 | { "fnegabs", 0x3800e000, 0xfc1fe720, "IfA,fT", pa20, FLAG_STRICT}, | |
956 | { "fcnv", 0x30000200, 0xfc1c0720, "{_fa,fT", pa20, FLAG_STRICT}, | |
957 | { "fcnv", 0x38000200, 0xfc1c0720, "FGfA,fT", pa20, FLAG_STRICT}, | |
c06a12f8 DA |
958 | { "fcmp", 0x30000400, 0xfc00e7e0, "F?ffa,fb", pa10, FLAG_STRICT}, |
959 | { "fcmp", 0x38000400, 0xfc00e720, "I?ffA,fB", pa10, FLAG_STRICT}, | |
caa05036 DA |
960 | { "fcmp", 0x30000400, 0xfc0007e0, "F?ffa,fb,h", pa20, FLAG_STRICT}, |
961 | { "fcmp", 0x38000400, 0xfc000720, "I?ffA,fB,h", pa20, FLAG_STRICT}, | |
962 | { "fcmp", 0x30000400, 0xfc00e7e0, "F?ffa,fb", pa10, 0}, | |
963 | { "fcmp", 0x38000400, 0xfc00e720, "I?ffA,fB", pa10, 0}, | |
8c47ebd9 JL |
964 | { "xmpyu", 0x38004700, 0xfc00e720, "fX,fB,fT", pa11, 0}, |
965 | { "fmpyadd", 0x18000000, 0xfc000000, "Hfi,fj,fk,fl,fm", pa11, 0}, | |
966 | { "fmpysub", 0x98000000, 0xfc000000, "Hfi,fj,fk,fl,fm", pa11, 0}, | |
c06a12f8 | 967 | { "ftest", 0x30002420, 0xffffffff, "", pa10, FLAG_STRICT}, |
caa05036 DA |
968 | { "ftest", 0x30002420, 0xffffffe0, ",=", pa20, FLAG_STRICT}, |
969 | { "ftest", 0x30000420, 0xffff1fff, "m", pa20, FLAG_STRICT}, | |
caa05036 | 970 | { "fid", 0x30000000, 0xffffffff, "", pa11, 0}, |
252b5132 | 971 | |
a7fba0e0 | 972 | /* Performance Monitor Instructions. */ |
1d16bf9c JL |
973 | |
974 | { "pmdis", 0x30000280, 0xffffffdf, "N", pa20, FLAG_STRICT}, | |
975 | { "pmenb", 0x30000680, 0xffffffff, "", pa20, FLAG_STRICT}, | |
252b5132 | 976 | |
a7fba0e0 | 977 | /* Assist Instructions. */ |
252b5132 | 978 | |
caa05036 DA |
979 | { "spop0", 0x10000000, 0xfc000600, "v,ON", pa10, 0}, |
980 | { "spop1", 0x10000200, 0xfc000600, "v,oNt", pa10, 0}, | |
981 | { "spop2", 0x10000400, 0xfc000600, "v,1Nb", pa10, 0}, | |
982 | { "spop3", 0x10000600, 0xfc000600, "v,0Nx,b", pa10, 0}, | |
983 | { "copr", 0x30000000, 0xfc000000, "u,2N", pa10, 0}, | |
f0a3b40f DA |
984 | { "cldw", 0x24000000, 0xfc00de00, "ucXx(b),t", pa10, FLAG_STRICT}, |
985 | { "cldw", 0x24000000, 0xfc001e00, "ucXx(s,b),t", pa10, FLAG_STRICT}, | |
f417d200 | 986 | { "cldw", 0x24000000, 0xfc00d200, "ucxccx(b),t", pa11, FLAG_STRICT}, |
caa05036 | 987 | { "cldw", 0x24000000, 0xfc001200, "ucxccx(s,b),t", pa11, FLAG_STRICT}, |
f417d200 | 988 | { "cldw", 0x24001000, 0xfc00d200, "ucocc@(b),t", pa20, FLAG_STRICT}, |
caa05036 | 989 | { "cldw", 0x24001000, 0xfc001200, "ucocc@(s,b),t", pa20, FLAG_STRICT}, |
f0a3b40f DA |
990 | { "cldw", 0x24001000, 0xfc00de00, "ucM5(b),t", pa10, FLAG_STRICT}, |
991 | { "cldw", 0x24001000, 0xfc001e00, "ucM5(s,b),t", pa10, FLAG_STRICT}, | |
f417d200 DA |
992 | { "cldw", 0x24001000, 0xfc00d200, "ucmcc5(b),t", pa11, FLAG_STRICT}, |
993 | { "cldw", 0x24001000, 0xfc001200, "ucmcc5(s,b),t", pa11, FLAG_STRICT}, | |
f0a3b40f DA |
994 | { "cldd", 0x2c000000, 0xfc00de00, "ucXx(b),t", pa10, FLAG_STRICT}, |
995 | { "cldd", 0x2c000000, 0xfc001e00, "ucXx(s,b),t", pa10, FLAG_STRICT}, | |
f417d200 | 996 | { "cldd", 0x2c000000, 0xfc00d200, "ucxccx(b),t", pa11, FLAG_STRICT}, |
caa05036 | 997 | { "cldd", 0x2c000000, 0xfc001200, "ucxccx(s,b),t", pa11, FLAG_STRICT}, |
f417d200 | 998 | { "cldd", 0x2c001000, 0xfc00d200, "ucocc@(b),t", pa20, FLAG_STRICT}, |
caa05036 | 999 | { "cldd", 0x2c001000, 0xfc001200, "ucocc@(s,b),t", pa20, FLAG_STRICT}, |
f0a3b40f DA |
1000 | { "cldd", 0x2c001000, 0xfc00de00, "ucM5(b),t", pa10, FLAG_STRICT}, |
1001 | { "cldd", 0x2c001000, 0xfc001e00, "ucM5(s,b),t", pa10, FLAG_STRICT}, | |
f417d200 DA |
1002 | { "cldd", 0x2c001000, 0xfc00d200, "ucmcc5(b),t", pa11, FLAG_STRICT}, |
1003 | { "cldd", 0x2c001000, 0xfc001200, "ucmcc5(s,b),t", pa11, FLAG_STRICT}, | |
f0a3b40f DA |
1004 | { "cstw", 0x24000200, 0xfc00de00, "ucXt,x(b)", pa10, FLAG_STRICT}, |
1005 | { "cstw", 0x24000200, 0xfc001e00, "ucXt,x(s,b)", pa10, FLAG_STRICT}, | |
f417d200 | 1006 | { "cstw", 0x24000200, 0xfc00d200, "ucxcCt,x(b)", pa11, FLAG_STRICT}, |
caa05036 | 1007 | { "cstw", 0x24000200, 0xfc001200, "ucxcCt,x(s,b)", pa11, FLAG_STRICT}, |
f417d200 | 1008 | { "cstw", 0x24001200, 0xfc00d200, "ucocCt,@(b)", pa20, FLAG_STRICT}, |
caa05036 | 1009 | { "cstw", 0x24001200, 0xfc001200, "ucocCt,@(s,b)", pa20, FLAG_STRICT}, |
f0a3b40f DA |
1010 | { "cstw", 0x24001200, 0xfc00de00, "ucMt,5(b)", pa10, FLAG_STRICT}, |
1011 | { "cstw", 0x24001200, 0xfc001e00, "ucMt,5(s,b)", pa10, FLAG_STRICT}, | |
f417d200 DA |
1012 | { "cstw", 0x24001200, 0xfc00d200, "ucmcCt,5(b)", pa11, FLAG_STRICT}, |
1013 | { "cstw", 0x24001200, 0xfc001200, "ucmcCt,5(s,b)", pa11, FLAG_STRICT}, | |
f0a3b40f DA |
1014 | { "cstd", 0x2c000200, 0xfc00de00, "ucXt,x(b)", pa10, FLAG_STRICT}, |
1015 | { "cstd", 0x2c000200, 0xfc001e00, "ucXt,x(s,b)", pa10, FLAG_STRICT}, | |
f417d200 | 1016 | { "cstd", 0x2c000200, 0xfc00d200, "ucxcCt,x(b)", pa11, FLAG_STRICT}, |
caa05036 | 1017 | { "cstd", 0x2c000200, 0xfc001200, "ucxcCt,x(s,b)", pa11, FLAG_STRICT}, |
f417d200 | 1018 | { "cstd", 0x2c001200, 0xfc00d200, "ucocCt,@(b)", pa20, FLAG_STRICT}, |
caa05036 | 1019 | { "cstd", 0x2c001200, 0xfc001200, "ucocCt,@(s,b)", pa20, FLAG_STRICT}, |
f0a3b40f DA |
1020 | { "cstd", 0x2c001200, 0xfc00de00, "ucMt,5(b)", pa10, FLAG_STRICT}, |
1021 | { "cstd", 0x2c001200, 0xfc001e00, "ucMt,5(s,b)", pa10, FLAG_STRICT}, | |
f417d200 DA |
1022 | { "cstd", 0x2c001200, 0xfc00d200, "ucmcCt,5(b)", pa11, FLAG_STRICT}, |
1023 | { "cstd", 0x2c001200, 0xfc001200, "ucmcCt,5(s,b)", pa11, FLAG_STRICT}, | |
f0a3b40f DA |
1024 | { "cldwx", 0x24000000, 0xfc00de00, "ucXx(b),t", pa10, FLAG_STRICT}, |
1025 | { "cldwx", 0x24000000, 0xfc001e00, "ucXx(s,b),t", pa10, FLAG_STRICT}, | |
f417d200 | 1026 | { "cldwx", 0x24000000, 0xfc00d200, "ucxccx(b),t", pa11, FLAG_STRICT}, |
caa05036 | 1027 | { "cldwx", 0x24000000, 0xfc001200, "ucxccx(s,b),t", pa11, FLAG_STRICT}, |
f417d200 | 1028 | { "cldwx", 0x24000000, 0xfc00de00, "ucXx(b),t", pa10, 0}, |
48f130a8 | 1029 | { "cldwx", 0x24000000, 0xfc001e00, "ucXx(s,b),t", pa10, 0}, |
f0a3b40f DA |
1030 | { "clddx", 0x2c000000, 0xfc00de00, "ucXx(b),t", pa10, FLAG_STRICT}, |
1031 | { "clddx", 0x2c000000, 0xfc001e00, "ucXx(s,b),t", pa10, FLAG_STRICT}, | |
f417d200 | 1032 | { "clddx", 0x2c000000, 0xfc00d200, "ucxccx(b),t", pa11, FLAG_STRICT}, |
caa05036 | 1033 | { "clddx", 0x2c000000, 0xfc001200, "ucxccx(s,b),t", pa11, FLAG_STRICT}, |
f417d200 | 1034 | { "clddx", 0x2c000000, 0xfc00de00, "ucXx(b),t", pa10, 0}, |
48f130a8 | 1035 | { "clddx", 0x2c000000, 0xfc001e00, "ucXx(s,b),t", pa10, 0}, |
f0a3b40f DA |
1036 | { "cstwx", 0x24000200, 0xfc00de00, "ucXt,x(b)", pa10, FLAG_STRICT}, |
1037 | { "cstwx", 0x24000200, 0xfc001e00, "ucXt,x(s,b)", pa10, FLAG_STRICT}, | |
f417d200 | 1038 | { "cstwx", 0x24000200, 0xfc00d200, "ucxcCt,x(b)", pa11, FLAG_STRICT}, |
caa05036 | 1039 | { "cstwx", 0x24000200, 0xfc001200, "ucxcCt,x(s,b)", pa11, FLAG_STRICT}, |
f417d200 | 1040 | { "cstwx", 0x24000200, 0xfc00de00, "ucXt,x(b)", pa10, 0}, |
48f130a8 | 1041 | { "cstwx", 0x24000200, 0xfc001e00, "ucXt,x(s,b)", pa10, 0}, |
f0a3b40f DA |
1042 | { "cstdx", 0x2c000200, 0xfc00de00, "ucXt,x(b)", pa10, FLAG_STRICT}, |
1043 | { "cstdx", 0x2c000200, 0xfc001e00, "ucXt,x(s,b)", pa10, FLAG_STRICT}, | |
f417d200 | 1044 | { "cstdx", 0x2c000200, 0xfc00d200, "ucxcCt,x(b)", pa11, FLAG_STRICT}, |
48f130a8 | 1045 | { "cstdx", 0x2c000200, 0xfc001200, "ucxcCt,x(s,b)", pa11, FLAG_STRICT}, |
f417d200 | 1046 | { "cstdx", 0x2c000200, 0xfc00de00, "ucXt,x(b)", pa10, 0}, |
48f130a8 | 1047 | { "cstdx", 0x2c000200, 0xfc001e00, "ucXt,x(s,b)", pa10, 0}, |
f0a3b40f DA |
1048 | { "cldws", 0x24001000, 0xfc00de00, "ucM5(b),t", pa10, FLAG_STRICT}, |
1049 | { "cldws", 0x24001000, 0xfc001e00, "ucM5(s,b),t", pa10, FLAG_STRICT}, | |
f417d200 | 1050 | { "cldws", 0x24001000, 0xfc00d200, "ucmcc5(b),t", pa11, FLAG_STRICT}, |
caa05036 | 1051 | { "cldws", 0x24001000, 0xfc001200, "ucmcc5(s,b),t", pa11, FLAG_STRICT}, |
f417d200 | 1052 | { "cldws", 0x24001000, 0xfc00de00, "ucM5(b),t", pa10, 0}, |
48f130a8 | 1053 | { "cldws", 0x24001000, 0xfc001e00, "ucM5(s,b),t", pa10, 0}, |
f0a3b40f DA |
1054 | { "cldds", 0x2c001000, 0xfc00de00, "ucM5(b),t", pa10, FLAG_STRICT}, |
1055 | { "cldds", 0x2c001000, 0xfc001e00, "ucM5(s,b),t", pa10, FLAG_STRICT}, | |
f417d200 | 1056 | { "cldds", 0x2c001000, 0xfc00d200, "ucmcc5(b),t", pa11, FLAG_STRICT}, |
caa05036 | 1057 | { "cldds", 0x2c001000, 0xfc001200, "ucmcc5(s,b),t", pa11, FLAG_STRICT}, |
f417d200 | 1058 | { "cldds", 0x2c001000, 0xfc00de00, "ucM5(b),t", pa10, 0}, |
48f130a8 | 1059 | { "cldds", 0x2c001000, 0xfc001e00, "ucM5(s,b),t", pa10, 0}, |
f0a3b40f DA |
1060 | { "cstws", 0x24001200, 0xfc00de00, "ucMt,5(b)", pa10, FLAG_STRICT}, |
1061 | { "cstws", 0x24001200, 0xfc001e00, "ucMt,5(s,b)", pa10, FLAG_STRICT}, | |
f417d200 | 1062 | { "cstws", 0x24001200, 0xfc00d200, "ucmcCt,5(b)", pa11, FLAG_STRICT}, |
caa05036 | 1063 | { "cstws", 0x24001200, 0xfc001200, "ucmcCt,5(s,b)", pa11, FLAG_STRICT}, |
f417d200 | 1064 | { "cstws", 0x24001200, 0xfc00de00, "ucMt,5(b)", pa10, 0}, |
48f130a8 | 1065 | { "cstws", 0x24001200, 0xfc001e00, "ucMt,5(s,b)", pa10, 0}, |
f0a3b40f DA |
1066 | { "cstds", 0x2c001200, 0xfc00de00, "ucMt,5(b)", pa10, FLAG_STRICT}, |
1067 | { "cstds", 0x2c001200, 0xfc001e00, "ucMt,5(s,b)", pa10, FLAG_STRICT}, | |
f417d200 | 1068 | { "cstds", 0x2c001200, 0xfc00d200, "ucmcCt,5(b)", pa11, FLAG_STRICT}, |
caa05036 | 1069 | { "cstds", 0x2c001200, 0xfc001200, "ucmcCt,5(s,b)", pa11, FLAG_STRICT}, |
f417d200 | 1070 | { "cstds", 0x2c001200, 0xfc00de00, "ucMt,5(b)", pa10, 0}, |
48f130a8 | 1071 | { "cstds", 0x2c001200, 0xfc001e00, "ucMt,5(s,b)", pa10, 0}, |
1befefea JL |
1072 | |
1073 | /* More pseudo instructions which must follow the main table. */ | |
1074 | { "call", 0xe800f000, 0xfc1ffffd, "n(b)", pa20, FLAG_STRICT}, | |
1075 | { "call", 0xe800a000, 0xffe0e000, "nW", pa10, FLAG_STRICT}, | |
1076 | { "ret", 0xe840d000, 0xfffffffd, "n", pa20, FLAG_STRICT}, | |
1077 | ||
252b5132 RH |
1078 | }; |
1079 | ||
1080 | #define NUMOPCODES ((sizeof pa_opcodes)/(sizeof pa_opcodes[0])) | |
1081 | ||
a7fba0e0 | 1082 | /* SKV 12/18/92. Added some denotations for various operands. */ |
252b5132 RH |
1083 | |
1084 | #define PA_IMM11_AT_31 'i' | |
1085 | #define PA_IMM14_AT_31 'j' | |
1086 | #define PA_IMM21_AT_31 'k' | |
1087 | #define PA_DISP12 'w' | |
1088 | #define PA_DISP17 'W' | |
1089 | ||
1090 | #define N_HPPA_OPERAND_FORMATS 5 |