Commit | Line | Data |
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252b5132 | 1 | /* Table of opcodes for the PA-RISC. |
4f1d9bd8 | 2 | Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, |
c3aa17e9 | 3 | 2001, 2002, 2003 |
3c5ce02e | 4 | Free Software Foundation, Inc. |
252b5132 RH |
5 | |
6 | Contributed by the Center for Software Science at the | |
7 | University of Utah (pa-gdb-bugs@cs.utah.edu). | |
8 | ||
9 | This file is part of GAS, the GNU Assembler, and GDB, the GNU disassembler. | |
10 | ||
11 | GAS/GDB is free software; you can redistribute it and/or modify | |
12 | it under the terms of the GNU General Public License as published by | |
13 | the Free Software Foundation; either version 1, or (at your option) | |
14 | any later version. | |
15 | ||
16 | GAS/GDB is distributed in the hope that it will be useful, | |
17 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | GNU General Public License for more details. | |
20 | ||
21 | You should have received a copy of the GNU General Public License | |
22 | along with GAS or GDB; see the file COPYING. If not, write to | |
e172dbf8 | 23 | the Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ |
252b5132 RH |
24 | |
25 | #if !defined(__STDC__) && !defined(const) | |
26 | #define const | |
27 | #endif | |
28 | ||
29 | /* | |
30 | * Structure of an opcode table entry. | |
31 | */ | |
32 | ||
33 | /* There are two kinds of delay slot nullification: normal which is | |
34 | * controled by the nullification bit, and conditional, which depends | |
35 | * on the direction of the branch and its success or failure. | |
36 | * | |
37 | * NONE is unfortunately #defined in the hiux system include files. | |
38 | * #undef it away. | |
39 | */ | |
40 | #undef NONE | |
41 | struct pa_opcode | |
42 | { | |
43 | const char *name; | |
44 | unsigned long int match; /* Bits that must be set... */ | |
45 | unsigned long int mask; /* ... in these bits. */ | |
46 | char *args; | |
47 | enum pa_arch arch; | |
73826640 | 48 | char flags; |
252b5132 RH |
49 | }; |
50 | ||
48f130a8 DA |
51 | /* Enable/disable strict syntax checking. When strict syntax checking |
52 | isn't used, out-of-range immediate fields can result in an error, | |
53 | depending on the specific immediate range being matched. An immediate | |
54 | value of zero is also accepted as equivalent to index register 0. | |
55 | As a result, non-strict opcode entries must be ordered from largest | |
56 | to smallest immediate range. */ | |
73826640 | 57 | #define FLAG_STRICT 0x1 |
252b5132 RH |
58 | |
59 | /* | |
60 | All hppa opcodes are 32 bits. | |
61 | ||
62 | The match component is a mask saying which bits must match a | |
63 | particular opcode in order for an instruction to be an instance | |
64 | of that opcode. | |
65 | ||
c5e52916 JL |
66 | The args component is a string containing one character for each operand of |
67 | the instruction. Characters used as a prefix allow any second character to | |
68 | be used without conflicting with the main operand characters. | |
252b5132 RH |
69 | |
70 | Bit positions in this description follow HP usage of lsb = 31, | |
71 | "at" is lsb of field. | |
72 | ||
73 | In the args field, the following characters must match exactly: | |
74 | ||
75 | '+,() ' | |
76 | ||
77 | In the args field, the following characters are unused: | |
78 | ||
1328dc98 AM |
79 | ' " - / 34 6789:; ' |
80 | '@ C M [\] ' | |
81 | '` e g } ' | |
252b5132 RH |
82 | |
83 | Here are all the characters: | |
84 | ||
1328dc98 AM |
85 | ' !"#$%&'()*+-,./0123456789:;<=>?' |
86 | '@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_' | |
87 | '`abcdefghijklmnopqrstuvwxyz{|}~ ' | |
252b5132 RH |
88 | |
89 | Kinds of operands: | |
90 | x integer register field at 15. | |
91 | b integer register field at 10. | |
92 | t integer register field at 31. | |
96226a68 | 93 | a integer register field at 10 and 15 (for PERMH) |
252b5132 RH |
94 | 5 5 bit immediate at 15. |
95 | s 2 bit space specifier at 17. | |
96 | S 3 bit space specifier at 18. | |
252b5132 RH |
97 | V 5 bit immediate value at 31 |
98 | i 11 bit immediate value at 31 | |
99 | j 14 bit immediate value at 31 | |
100 | k 21 bit immediate value at 31 | |
a7fba0e0 | 101 | l 16 bit immediate value at 31 (wide mode only, unusual encoding). |
252b5132 RH |
102 | n nullification for branch instructions |
103 | N nullification for spop and copr instructions | |
104 | w 12 bit branch displacement | |
105 | W 17 bit branch displacement (PC relative) | |
f5a68b45 | 106 | X 22 bit branch displacement (PC relative) |
252b5132 RH |
107 | z 17 bit branch displacement (just a number, not an address) |
108 | ||
7d8fdb64 JL |
109 | Also these: |
110 | ||
111 | . 2 bit shift amount at 25 | |
112 | * 4 bit shift amount at 25 | |
113 | p 5 bit shift count at 26 (to support the SHD instruction) encoded as | |
114 | 31-p | |
115 | ~ 6 bit shift count at 20,22:26 encoded as 63-~. | |
116 | P 5 bit bit position at 26 | |
ec3533da | 117 | q 6 bit bit position at 20,22:26 |
7d8fdb64 | 118 | T 5 bit field length at 31 (encoded as 32-T) |
ec3533da JL |
119 | % 6 bit field length at 23,27:31 (variable extract/deposit) |
120 | | 6 bit field length at 19,27:31 (fixed extract/deposit) | |
7d8fdb64 JL |
121 | A 13 bit immediate at 18 (to support the BREAK instruction) |
122 | ^ like b, but describes a control register | |
123 | ! sar (cr11) register | |
124 | D 26 bit immediate at 31 (to support the DIAG instruction) | |
125 | $ 9 bit immediate at 28 (to support POPBTS) | |
126 | ||
127 | v 3 bit Special Function Unit identifier at 25 | |
128 | O 20 bit Special Function Unit operation split between 15 bits at 20 | |
129 | and 5 bits at 31 | |
130 | o 15 bit Special Function Unit operation at 20 | |
131 | 2 22 bit Special Function Unit operation split between 17 bits at 20 | |
132 | and 5 bits at 31 | |
133 | 1 15 bit Special Function Unit operation split between 10 bits at 20 | |
134 | and 5 bits at 31 | |
135 | 0 10 bit Special Function Unit operation split between 5 bits at 20 | |
136 | and 5 bits at 31 | |
137 | u 3 bit coprocessor unit identifier at 25 | |
138 | F Source Floating Point Operand Format Completer encoded 2 bits at 20 | |
139 | I Source Floating Point Operand Format Completer encoded 1 bits at 20 | |
140 | (for 0xe format FP instructions) | |
141 | G Destination Floating Point Operand Format Completer encoded 2 bits at 18 | |
142 | H Floating Point Operand Format at 26 for 'fmpyadd' and 'fmpysub' | |
143 | (very similar to 'F') | |
144 | ||
145 | r 5 bit immediate value at 31 (for the break instruction) | |
146 | (very similar to V above, except the value is unsigned instead of | |
147 | low_sign_ext) | |
148 | R 5 bit immediate value at 15 (for the ssm, rsm, probei instructions) | |
149 | (same as r above, except the value is in a different location) | |
150 | U 10 bit immediate value at 15 (for SSM, RSM on pa2.0) | |
151 | Q 5 bit immediate value at 10 (a bit position specified in | |
152 | the bb instruction. It's the same as r above, except the | |
153 | value is in a different location) | |
b37e19e9 | 154 | B 5 bit immediate value at 10 (a bit position specified in |
1328dc98 | 155 | the bb instruction. Similar to Q, but 64 bit handling is |
b37e19e9 | 156 | different. |
52d836e2 | 157 | Z %r1 -- implicit target of addil instruction. |
f0bfde5e | 158 | L ,%r2 completer for new syntax branch |
142f0fe0 JL |
159 | { Source format completer for fcnv |
160 | _ Destination format completer for fcnv | |
161 | h cbit for fcmp | |
162 | = gfx tests for ftest | |
1328dc98 AM |
163 | d 14 bit offset for single precision FP long load/store. |
164 | # 14 bit offset for double precision FP load long/store. | |
165 | J Yet another 14 bit offset for load/store with ma,mb completers. | |
166 | K Yet another 14 bit offset for load/store with ma,mb completers. | |
167 | y 16 bit offset for word aligned load/store (PA2.0 wide). | |
168 | & 16 bit offset for dword aligned load/store (PA2.0 wide). | |
169 | < 16 bit offset for load/store with ma,mb completers (PA2.0 wide). | |
170 | > 16 bit offset for load/store with ma,mb completers (PA2.0 wide). | |
390f858d | 171 | Y %sr0,%r31 -- implicit target of be,l instruction. |
eca04c6a | 172 | @ implicit immediate value of 0 |
7d8fdb64 | 173 | |
5d4ba527 JL |
174 | Completer operands all have 'c' as the prefix: |
175 | ||
176 | cx indexed load completer. | |
1befefea JL |
177 | cX indexed load completer. Like cx, but emits a space after |
178 | in disassembler. | |
5d4ba527 | 179 | cm short load and store completer. |
1befefea JL |
180 | cM short load and store completer. Like cm, but emits a space |
181 | after in disassembler. | |
eca04c6a | 182 | cq long load and store completer (like cm, but inserted into a |
5d2e7ecc | 183 | different location in the target instruction). |
5d4ba527 | 184 | cs store bytes short completer. |
1befefea JL |
185 | cA store bytes short completer. Like cs, but emits a space |
186 | after in disassembler. | |
caa05036 DA |
187 | ce long load/store completer for LDW/STW with a different encoding |
188 | than the others | |
eca04c6a JL |
189 | cc load cache control hint |
190 | cd load and clear cache control hint | |
191 | cC store cache control hint | |
192 | co ordered access | |
1d16bf9c | 193 | |
390f858d JL |
194 | cp branch link and push completer |
195 | cP branch pop completer | |
196 | cl branch link completer | |
197 | cg branch gate completer | |
198 | ||
1d16bf9c JL |
199 | cw read/write completer for PROBE |
200 | cW wide completer for MFCTL | |
201 | cL local processor completer for cache control | |
5d4ba527 | 202 | cZ System Control Completer (to support LPA, LHA, etc.) |
1d16bf9c JL |
203 | |
204 | ci correction completer for DCOR | |
205 | ca add completer | |
206 | cy 32 bit add carry completer | |
207 | cY 64 bit add carry completer | |
208 | cv signed overflow trap completer | |
209 | ct trap on condition completer for ADDI, SUB | |
210 | cT trap on condition completer for UADDCM | |
211 | cb 32 bit borrow completer for SUB | |
212 | cB 64 bit borrow completer for SUB | |
213 | ||
96226a68 JL |
214 | ch left/right half completer |
215 | cH signed/unsigned saturation completer | |
216 | cS signed/unsigned completer at 21 | |
3c5ce02e | 217 | cz zero/sign extension completer. |
96226a68 | 218 | c* permutation completer |
5d4ba527 | 219 | |
c5e52916 JL |
220 | Condition operands all have '?' as the prefix: |
221 | ||
222 | ?f Floating point compare conditions (encoded as 5 bits at 31) | |
223 | ||
224 | ?a add conditions | |
7d627258 | 225 | ?A 64 bit add conditions |
c5e52916 | 226 | ?@ add branch conditions followed by nullify |
7d627258 JL |
227 | ?d non-negated add branch conditions |
228 | ?D negated add branch conditions | |
229 | ?w wide mode non-negated add branch conditions | |
230 | ?W wide mode negated add branch conditions | |
c5e52916 JL |
231 | |
232 | ?s compare/subtract conditions | |
7d627258 | 233 | ?S 64 bit compare/subtract conditions |
eca04c6a JL |
234 | ?t non-negated compare and branch conditions |
235 | ?n 32 bit compare and branch conditions followed by nullify | |
236 | ?N 64 bit compare and branch conditions followed by nullify | |
237 | ?Q 64 bit compare and branch conditions for CMPIB instruction | |
c5e52916 JL |
238 | |
239 | ?l logical conditions | |
7d627258 JL |
240 | ?L 64 bit logical conditions |
241 | ||
c5e52916 | 242 | ?b branch on bit conditions |
7d627258 | 243 | ?B 64 bit branch on bit conditions |
c5e52916 JL |
244 | |
245 | ?x shift/extract/deposit conditions | |
7d627258 | 246 | ?X 64 bit shift/extract/deposit conditions |
c5e52916 JL |
247 | ?y shift/extract/deposit conditions followed by nullify for conditional |
248 | branches | |
249 | ||
250 | ?u unit conditions | |
7d627258 | 251 | ?U 64 bit unit conditions |
c5e52916 | 252 | |
7d8fdb64 | 253 | Floating point registers all have 'f' as a prefix: |
ec3533da | 254 | |
7d8fdb64 JL |
255 | ft target register at 31 |
256 | fT target register with L/R halves at 31 | |
257 | fa operand 1 register at 10 | |
258 | fA operand 1 register with L/R halves at 10 | |
9392fb11 | 259 | fX Same as fA, except prints a space before register during disasm |
7d8fdb64 JL |
260 | fb operand 2 register at 15 |
261 | fB operand 2 register with L/R halves at 15 | |
262 | fC operand 3 register with L/R halves at 16:18,21:23 | |
c49ec3da | 263 | fe Like fT, but encoding is different. |
a7fba0e0 JL |
264 | fE Same as fe, except prints a space before register during disasm. |
265 | fx target register at 15 (only for PA 2.0 long format FLDD/FSTD). | |
7d8fdb64 JL |
266 | |
267 | Float registers for fmpyadd and fmpysub: | |
268 | ||
269 | fi mult operand 1 register at 10 | |
270 | fj mult operand 2 register at 15 | |
271 | fk mult target register at 20 | |
272 | fl add/sub operand register at 25 | |
273 | fm add/sub target register at 31 | |
252b5132 | 274 | |
7d627258 | 275 | */ |
252b5132 RH |
276 | |
277 | ||
3f2a9fb7 | 278 | #if 0 |
252b5132 RH |
279 | /* List of characters not to put a space after. Note that |
280 | "," is included, as the "spopN" operations use literal | |
a7fba0e0 | 281 | commas in their completer sections. */ |
252b5132 | 282 | static const char *const completer_chars = ",CcY<>?!@+&U~FfGHINnOoZMadu|/=0123%e$m}"; |
3f2a9fb7 | 283 | #endif |
252b5132 RH |
284 | |
285 | /* The order of the opcodes in this table is significant: | |
286 | ||
287 | * The assembler requires that all instances of the same mnemonic must be | |
288 | consecutive. If they aren't, the assembler will bomb at runtime. | |
289 | ||
290 | * The disassembler should not care about the order of the opcodes. */ | |
291 | ||
292 | static const struct pa_opcode pa_opcodes[] = | |
293 | { | |
294 | ||
a7fba0e0 | 295 | /* Pseudo-instructions. */ |
252b5132 | 296 | |
1328dc98 | 297 | { "ldi", 0x34000000, 0xffe00000, "l,x", pa20w, 0},/* ldo val(r0),r */ |
8c47ebd9 | 298 | { "ldi", 0x34000000, 0xffe0c000, "j,x", pa10, 0},/* ldo val(r0),r */ |
390f858d | 299 | |
caa05036 | 300 | { "cmpib", 0xec000000, 0xfc000000, "?Qn5,b,w", pa20, FLAG_STRICT}, |
eca04c6a | 301 | { "cmpib", 0x84000000, 0xf4000000, "?nn5,b,w", pa10, FLAG_STRICT}, |
8c47ebd9 | 302 | { "comib", 0x84000000, 0xfc000000, "?nn5,b,w", pa10, 0}, /* comib{tf}*/ |
e26b85f0 JL |
303 | /* This entry is for the disassembler only. It will never be used by |
304 | assembler. */ | |
8c47ebd9 | 305 | { "comib", 0x8c000000, 0xfc000000, "?nn5,b,w", pa10, 0}, /* comib{tf}*/ |
eca04c6a JL |
306 | { "cmpb", 0x9c000000, 0xdc000000, "?Nnx,b,w", pa20, FLAG_STRICT}, |
307 | { "cmpb", 0x80000000, 0xf4000000, "?nnx,b,w", pa10, FLAG_STRICT}, | |
8c47ebd9 | 308 | { "comb", 0x80000000, 0xfc000000, "?nnx,b,w", pa10, 0}, /* comb{tf} */ |
e26b85f0 JL |
309 | /* This entry is for the disassembler only. It will never be used by |
310 | assembler. */ | |
8c47ebd9 | 311 | { "comb", 0x88000000, 0xfc000000, "?nnx,b,w", pa10, 0}, /* comb{tf} */ |
1befefea | 312 | { "addb", 0xa0000000, 0xf4000000, "?Wnx,b,w", pa20w, FLAG_STRICT}, |
8c47ebd9 | 313 | { "addb", 0xa0000000, 0xfc000000, "?@nx,b,w", pa10, 0}, /* addb{tf} */ |
e26b85f0 JL |
314 | /* This entry is for the disassembler only. It will never be used by |
315 | assembler. */ | |
8c47ebd9 | 316 | { "addb", 0xa8000000, 0xfc000000, "?@nx,b,w", pa10, 0}, |
1befefea | 317 | { "addib", 0xa4000000, 0xf4000000, "?Wn5,b,w", pa20w, FLAG_STRICT}, |
8c47ebd9 | 318 | { "addib", 0xa4000000, 0xfc000000, "?@n5,b,w", pa10, 0}, /* addib{tf}*/ |
e26b85f0 JL |
319 | /* This entry is for the disassembler only. It will never be used by |
320 | assembler. */ | |
8c47ebd9 | 321 | { "addib", 0xac000000, 0xfc000000, "?@n5,b,w", pa10, 0}, /* addib{tf}*/ |
caa05036 DA |
322 | { "nop", 0x08000240, 0xffffffff, "", pa10, 0}, /* or 0,0,0 */ |
323 | { "copy", 0x08000240, 0xffe0ffe0, "x,t", pa10, 0}, /* or r,0,t */ | |
324 | { "mtsar", 0x01601840, 0xffe0ffff, "x", pa10, 0}, /* mtctl r,cr11 */ | |
252b5132 RH |
325 | |
326 | /* Loads and Stores for integer registers. */ | |
eca04c6a JL |
327 | |
328 | { "ldd", 0x0c0010e0, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT}, | |
329 | { "ldd", 0x0c0010e0, 0xfc1f33e0, "cocc@(b),t", pa20, FLAG_STRICT}, | |
caa05036 DA |
330 | { "ldd", 0x0c0000c0, 0xfc0013c0, "cxccx(s,b),t", pa20, FLAG_STRICT}, |
331 | { "ldd", 0x0c0000c0, 0xfc0013c0, "cxccx(b),t", pa20, FLAG_STRICT}, | |
eca04c6a JL |
332 | { "ldd", 0x0c0010c0, 0xfc0013c0, "cmcc5(s,b),t", pa20, FLAG_STRICT}, |
333 | { "ldd", 0x0c0010c0, 0xfc0013c0, "cmcc5(b),t", pa20, FLAG_STRICT}, | |
caa05036 DA |
334 | { "ldd", 0x50000000, 0xfc000002, "cq&(b),x", pa20w, FLAG_STRICT}, |
335 | { "ldd", 0x50000000, 0xfc000002, "cq#(b),x", pa20, FLAG_STRICT}, | |
caa05036 DA |
336 | { "ldw", 0x0c000080, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT}, |
337 | { "ldw", 0x0c000080, 0xfc0013c0, "cxccx(b),t", pa11, FLAG_STRICT}, | |
caa05036 DA |
338 | { "ldw", 0x0c001080, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT}, |
339 | { "ldw", 0x0c001080, 0xfc0013c0, "cmcc5(b),t", pa11, FLAG_STRICT}, | |
1befefea JL |
340 | { "ldw", 0x0c0010a0, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT}, |
341 | { "ldw", 0x0c0010a0, 0xfc1f33e0, "cocc@(b),t", pa20, FLAG_STRICT}, | |
caa05036 | 342 | { "ldw", 0x4c000000, 0xfc000000, "ce<(b),x", pa20w, FLAG_STRICT}, |
caa05036 DA |
343 | { "ldw", 0x5c000004, 0xfc000006, "ce>(b),x", pa20w, FLAG_STRICT}, |
344 | { "ldw", 0x5c000004, 0xfc000006, "ceK(s,b),x", pa20, FLAG_STRICT}, | |
345 | { "ldw", 0x5c000004, 0xfc000006, "ceK(b),x", pa20, FLAG_STRICT}, | |
346 | { "ldw", 0x48000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT}, | |
48f130a8 DA |
347 | { "ldw", 0x4c000000, 0xfc000000, "ceJ(s,b),x", pa10, 0}, |
348 | { "ldw", 0x4c000000, 0xfc000000, "ceJ(b),x", pa10, 0}, | |
caa05036 DA |
349 | { "ldw", 0x48000000, 0xfc000000, "j(s,b),x", pa10, 0}, |
350 | { "ldw", 0x48000000, 0xfc000000, "j(b),x", pa10, 0}, | |
48f130a8 DA |
351 | { "ldw", 0x0c001080, 0xfc001fc0, "cM5(s,b),t", pa10, 0}, |
352 | { "ldw", 0x0c001080, 0xfc001fc0, "cM5(b),t", pa10, 0}, | |
353 | { "ldw", 0x0c000080, 0xfc001fc0, "cXx(s,b),t", pa10, 0}, | |
354 | { "ldw", 0x0c000080, 0xfc001fc0, "cXx(b),t", pa10, 0}, | |
caa05036 DA |
355 | { "ldh", 0x0c000040, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT}, |
356 | { "ldh", 0x0c000040, 0xfc0013c0, "cxccx(b),t", pa11, FLAG_STRICT}, | |
caa05036 DA |
357 | { "ldh", 0x0c001040, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT}, |
358 | { "ldh", 0x0c001040, 0xfc0013c0, "cmcc5(b),t", pa11, FLAG_STRICT}, | |
1befefea JL |
359 | { "ldh", 0x0c001060, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT}, |
360 | { "ldh", 0x0c001060, 0xfc1f33e0, "cocc@(b),t", pa20, FLAG_STRICT}, | |
caa05036 DA |
361 | { "ldh", 0x44000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT}, |
362 | { "ldh", 0x44000000, 0xfc000000, "j(s,b),x", pa10, 0}, | |
363 | { "ldh", 0x44000000, 0xfc000000, "j(b),x", pa10, 0}, | |
48f130a8 DA |
364 | { "ldh", 0x0c001040, 0xfc001fc0, "cM5(s,b),t", pa10, 0}, |
365 | { "ldh", 0x0c001040, 0xfc001fc0, "cM5(b),t", pa10, 0}, | |
366 | { "ldh", 0x0c000040, 0xfc001fc0, "cXx(s,b),t", pa10, 0}, | |
367 | { "ldh", 0x0c000040, 0xfc001fc0, "cXx(b),t", pa10, 0}, | |
caa05036 DA |
368 | { "ldb", 0x0c000000, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT}, |
369 | { "ldb", 0x0c000000, 0xfc0013c0, "cxccx(b),t", pa11, FLAG_STRICT}, | |
caa05036 DA |
370 | { "ldb", 0x0c001000, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT}, |
371 | { "ldb", 0x0c001000, 0xfc0013c0, "cmcc5(b),t", pa11, FLAG_STRICT}, | |
1befefea JL |
372 | { "ldb", 0x0c001020, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT}, |
373 | { "ldb", 0x0c001020, 0xfc1f33e0, "cocc@(b),t", pa20, FLAG_STRICT}, | |
caa05036 DA |
374 | { "ldb", 0x40000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT}, |
375 | { "ldb", 0x40000000, 0xfc000000, "j(s,b),x", pa10, 0}, | |
376 | { "ldb", 0x40000000, 0xfc000000, "j(b),x", pa10, 0}, | |
48f130a8 DA |
377 | { "ldb", 0x0c001000, 0xfc001fc0, "cM5(s,b),t", pa10, 0}, |
378 | { "ldb", 0x0c001000, 0xfc001fc0, "cM5(b),t", pa10, 0}, | |
379 | { "ldb", 0x0c000000, 0xfc001fc0, "cXx(s,b),t", pa10, 0}, | |
380 | { "ldb", 0x0c000000, 0xfc001fc0, "cXx(b),t", pa10, 0}, | |
eca04c6a JL |
381 | { "std", 0x0c0012e0, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT}, |
382 | { "std", 0x0c0012e0, 0xfc0033ff, "cocCx,@(b)", pa20, FLAG_STRICT}, | |
383 | { "std", 0x0c0012c0, 0xfc0013c0, "cmcCx,V(s,b)", pa20, FLAG_STRICT}, | |
384 | { "std", 0x0c0012c0, 0xfc0013c0, "cmcCx,V(b)", pa20, FLAG_STRICT}, | |
caa05036 DA |
385 | { "std", 0x70000000, 0xfc000002, "cqx,&(b)", pa20w, FLAG_STRICT}, |
386 | { "std", 0x70000000, 0xfc000002, "cqx,#(b)", pa20, FLAG_STRICT}, | |
caa05036 DA |
387 | { "stw", 0x0c001280, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT}, |
388 | { "stw", 0x0c001280, 0xfc0013c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, | |
1befefea JL |
389 | { "stw", 0x0c0012a0, 0xfc0013ff, "cocCx,@(s,b)", pa20, FLAG_STRICT}, |
390 | { "stw", 0x0c0012a0, 0xfc0013ff, "cocCx,@(b)", pa20, FLAG_STRICT}, | |
caa05036 | 391 | { "stw", 0x6c000000, 0xfc000000, "cex,<(b)", pa20w, FLAG_STRICT}, |
caa05036 DA |
392 | { "stw", 0x7c000004, 0xfc000006, "cex,>(b)", pa20w, FLAG_STRICT}, |
393 | { "stw", 0x7c000004, 0xfc000006, "cex,K(s,b)", pa20, FLAG_STRICT}, | |
394 | { "stw", 0x7c000004, 0xfc000006, "cex,K(b)", pa20, FLAG_STRICT}, | |
395 | { "stw", 0x68000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT}, | |
48f130a8 DA |
396 | { "stw", 0x6c000000, 0xfc000000, "cex,J(s,b)", pa10, 0}, |
397 | { "stw", 0x6c000000, 0xfc000000, "cex,J(b)", pa10, 0}, | |
caa05036 DA |
398 | { "stw", 0x68000000, 0xfc000000, "x,j(s,b)", pa10, 0}, |
399 | { "stw", 0x68000000, 0xfc000000, "x,j(b)", pa10, 0}, | |
48f130a8 DA |
400 | { "stw", 0x0c001280, 0xfc001fc0, "cMx,V(s,b)", pa10, 0}, |
401 | { "stw", 0x0c001280, 0xfc001fc0, "cMx,V(b)", pa10, 0}, | |
caa05036 DA |
402 | { "sth", 0x0c001240, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT}, |
403 | { "sth", 0x0c001240, 0xfc0013c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, | |
1befefea JL |
404 | { "sth", 0x0c001260, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT}, |
405 | { "sth", 0x0c001260, 0xfc0033ff, "cocCx,@(b)", pa20, FLAG_STRICT}, | |
caa05036 DA |
406 | { "sth", 0x64000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT}, |
407 | { "sth", 0x64000000, 0xfc000000, "x,j(s,b)", pa10, 0}, | |
408 | { "sth", 0x64000000, 0xfc000000, "x,j(b)", pa10, 0}, | |
48f130a8 DA |
409 | { "sth", 0x0c001240, 0xfc001fc0, "cMx,V(s,b)", pa10, 0}, |
410 | { "sth", 0x0c001240, 0xfc001fc0, "cMx,V(b)", pa10, 0}, | |
caa05036 DA |
411 | { "stb", 0x0c001200, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT}, |
412 | { "stb", 0x0c001200, 0xfc0013c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, | |
1befefea JL |
413 | { "stb", 0x0c001220, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT}, |
414 | { "stb", 0x0c001220, 0xfc0033ff, "cocCx,@(b)", pa20, FLAG_STRICT}, | |
caa05036 DA |
415 | { "stb", 0x60000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT}, |
416 | { "stb", 0x60000000, 0xfc000000, "x,j(s,b)", pa10, 0}, | |
417 | { "stb", 0x60000000, 0xfc000000, "x,j(b)", pa10, 0}, | |
48f130a8 DA |
418 | { "stb", 0x0c001200, 0xfc001fc0, "cMx,V(s,b)", pa10, 0}, |
419 | { "stb", 0x0c001200, 0xfc001fc0, "cMx,V(b)", pa10, 0}, | |
caa05036 DA |
420 | { "ldwm", 0x4c000000, 0xfc000000, "j(s,b),x", pa10, 0}, |
421 | { "ldwm", 0x4c000000, 0xfc000000, "j(b),x", pa10, 0}, | |
422 | { "stwm", 0x6c000000, 0xfc000000, "x,j(s,b)", pa10, 0}, | |
423 | { "stwm", 0x6c000000, 0xfc000000, "x,j(b)", pa10, 0}, | |
caa05036 DA |
424 | { "ldwx", 0x0c000080, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT}, |
425 | { "ldwx", 0x0c000080, 0xfc0013c0, "cxccx(b),t", pa11, FLAG_STRICT}, | |
48f130a8 DA |
426 | { "ldwx", 0x0c000080, 0xfc001fc0, "cXx(s,b),t", pa10, 0}, |
427 | { "ldwx", 0x0c000080, 0xfc001fc0, "cXx(b),t", pa10, 0}, | |
caa05036 DA |
428 | { "ldhx", 0x0c000040, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT}, |
429 | { "ldhx", 0x0c000040, 0xfc0013c0, "cxccx(b),t", pa11, FLAG_STRICT}, | |
48f130a8 DA |
430 | { "ldhx", 0x0c000040, 0xfc001fc0, "cXx(s,b),t", pa10, 0}, |
431 | { "ldhx", 0x0c000040, 0xfc001fc0, "cXx(b),t", pa10, 0}, | |
caa05036 DA |
432 | { "ldbx", 0x0c000000, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT}, |
433 | { "ldbx", 0x0c000000, 0xfc0013c0, "cxccx(b),t", pa11, FLAG_STRICT}, | |
48f130a8 DA |
434 | { "ldbx", 0x0c000000, 0xfc001fc0, "cXx(s,b),t", pa10, 0}, |
435 | { "ldbx", 0x0c000000, 0xfc001fc0, "cXx(b),t", pa10, 0}, | |
caa05036 | 436 | { "ldwa", 0x0c000180, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT}, |
caa05036 | 437 | { "ldwa", 0x0c001180, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT}, |
974a8e9c | 438 | { "ldwa", 0x0c0011a0, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT}, |
48f130a8 DA |
439 | { "ldwa", 0x0c001180, 0xfc00dfc0, "cM5(b),t", pa10, 0}, |
440 | { "ldwa", 0x0c000180, 0xfc00dfc0, "cXx(b),t", pa10, 0}, | |
caa05036 DA |
441 | { "ldcw", 0x0c0001c0, 0xfc0013c0, "cxcdx(s,b),t", pa11, FLAG_STRICT}, |
442 | { "ldcw", 0x0c0001c0, 0xfc0013c0, "cxcdx(b),t", pa11, FLAG_STRICT}, | |
caa05036 DA |
443 | { "ldcw", 0x0c0011c0, 0xfc0013c0, "cmcd5(s,b),t", pa11, FLAG_STRICT}, |
444 | { "ldcw", 0x0c0011c0, 0xfc0013c0, "cmcd5(b),t", pa11, FLAG_STRICT}, | |
48f130a8 DA |
445 | { "ldcw", 0x0c0011c0, 0xfc001fc0, "cM5(s,b),t", pa10, 0}, |
446 | { "ldcw", 0x0c0011c0, 0xfc001fc0, "cM5(b),t", pa10, 0}, | |
447 | { "ldcw", 0x0c0001c0, 0xfc001fc0, "cXx(s,b),t", pa10, 0}, | |
448 | { "ldcw", 0x0c0001c0, 0xfc001fc0, "cXx(b),t", pa10, 0}, | |
caa05036 | 449 | { "stwa", 0x0c001380, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, |
1befefea | 450 | { "stwa", 0x0c0013a0, 0xfc00d3ff, "cocCx,@(b)", pa20, FLAG_STRICT}, |
48f130a8 | 451 | { "stwa", 0x0c001380, 0xfc00dfc0, "cMx,V(b)", pa10, 0}, |
caa05036 DA |
452 | { "stby", 0x0c001300, 0xfc0013c0, "cscCx,V(s,b)", pa11, FLAG_STRICT}, |
453 | { "stby", 0x0c001300, 0xfc0013c0, "cscCx,V(b)", pa11, FLAG_STRICT}, | |
48f130a8 DA |
454 | { "stby", 0x0c001300, 0xfc001fc0, "cAx,V(s,b)", pa10, 0}, |
455 | { "stby", 0x0c001300, 0xfc001fc0, "cAx,V(b)", pa10, 0}, | |
caa05036 | 456 | { "ldda", 0x0c000100, 0xfc00d3c0, "cxccx(b),t", pa20, FLAG_STRICT}, |
eca04c6a | 457 | { "ldda", 0x0c001100, 0xfc00d3c0, "cmcc5(b),t", pa20, FLAG_STRICT}, |
974a8e9c | 458 | { "ldda", 0x0c001120, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT}, |
caa05036 DA |
459 | { "ldcd", 0x0c000140, 0xfc0013c0, "cxcdx(s,b),t", pa20, FLAG_STRICT}, |
460 | { "ldcd", 0x0c000140, 0xfc0013c0, "cxcdx(b),t", pa20, FLAG_STRICT}, | |
eca04c6a JL |
461 | { "ldcd", 0x0c001140, 0xfc0013c0, "cmcd5(s,b),t", pa20, FLAG_STRICT}, |
462 | { "ldcd", 0x0c001140, 0xfc0013c0, "cmcd5(b),t", pa20, FLAG_STRICT}, | |
463 | { "stda", 0x0c0013e0, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT}, | |
464 | { "stda", 0x0c0013e0, 0xfc0033ff, "cocCx,@(b)", pa20, FLAG_STRICT}, | |
465 | { "stda", 0x0c0013c0, 0xfc0013c0, "cmcCx,V(s,b)", pa20, FLAG_STRICT}, | |
466 | { "stda", 0x0c0013c0, 0xfc0013c0, "cmcCx,V(b)", pa20, FLAG_STRICT}, | |
caa05036 | 467 | { "ldwax", 0x0c000180, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT}, |
48f130a8 | 468 | { "ldwax", 0x0c000180, 0xfc00dfc0, "cXx(b),t", pa10, 0}, |
caa05036 DA |
469 | { "ldcwx", 0x0c0001c0, 0xfc0013c0, "cxcdx(s,b),t", pa11, FLAG_STRICT}, |
470 | { "ldcwx", 0x0c0001c0, 0xfc0013c0, "cxcdx(b),t", pa11, FLAG_STRICT}, | |
48f130a8 DA |
471 | { "ldcwx", 0x0c0001c0, 0xfc001fc0, "cXx(s,b),t", pa10, 0}, |
472 | { "ldcwx", 0x0c0001c0, 0xfc001fc0, "cXx(b),t", pa10, 0}, | |
caa05036 DA |
473 | { "ldws", 0x0c001080, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT}, |
474 | { "ldws", 0x0c001080, 0xfc0013c0, "cmcc5(b),t", pa11, FLAG_STRICT}, | |
48f130a8 DA |
475 | { "ldws", 0x0c001080, 0xfc001fc0, "cM5(s,b),t", pa10, 0}, |
476 | { "ldws", 0x0c001080, 0xfc001fc0, "cM5(b),t", pa10, 0}, | |
caa05036 DA |
477 | { "ldhs", 0x0c001040, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT}, |
478 | { "ldhs", 0x0c001040, 0xfc0013c0, "cmcc5(b),t", pa11, FLAG_STRICT}, | |
48f130a8 DA |
479 | { "ldhs", 0x0c001040, 0xfc001fc0, "cM5(s,b),t", pa10, 0}, |
480 | { "ldhs", 0x0c001040, 0xfc001fc0, "cM5(b),t", pa10, 0}, | |
caa05036 DA |
481 | { "ldbs", 0x0c001000, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT}, |
482 | { "ldbs", 0x0c001000, 0xfc0013c0, "cmcc5(b),t", pa11, FLAG_STRICT}, | |
48f130a8 DA |
483 | { "ldbs", 0x0c001000, 0xfc001fc0, "cM5(s,b),t", pa10, 0}, |
484 | { "ldbs", 0x0c001000, 0xfc001fc0, "cM5(b),t", pa10, 0}, | |
caa05036 | 485 | { "ldwas", 0x0c001180, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT}, |
48f130a8 | 486 | { "ldwas", 0x0c001180, 0xfc00dfc0, "cM5(b),t", pa10, 0}, |
caa05036 DA |
487 | { "ldcws", 0x0c0011c0, 0xfc0013c0, "cmcd5(s,b),t", pa11, FLAG_STRICT}, |
488 | { "ldcws", 0x0c0011c0, 0xfc0013c0, "cmcd5(b),t", pa11, FLAG_STRICT}, | |
48f130a8 DA |
489 | { "ldcws", 0x0c0011c0, 0xfc001fc0, "cM5(s,b),t", pa10, 0}, |
490 | { "ldcws", 0x0c0011c0, 0xfc001fc0, "cM5(b),t", pa10, 0}, | |
caa05036 DA |
491 | { "stws", 0x0c001280, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT}, |
492 | { "stws", 0x0c001280, 0xfc0013c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, | |
48f130a8 DA |
493 | { "stws", 0x0c001280, 0xfc001fc0, "cMx,V(s,b)", pa10, 0}, |
494 | { "stws", 0x0c001280, 0xfc001fc0, "cMx,V(b)", pa10, 0}, | |
caa05036 DA |
495 | { "sths", 0x0c001240, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT}, |
496 | { "sths", 0x0c001240, 0xfc0013c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, | |
48f130a8 DA |
497 | { "sths", 0x0c001240, 0xfc001fc0, "cMx,V(s,b)", pa10, 0}, |
498 | { "sths", 0x0c001240, 0xfc001fc0, "cMx,V(b)", pa10, 0}, | |
caa05036 DA |
499 | { "stbs", 0x0c001200, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT}, |
500 | { "stbs", 0x0c001200, 0xfc0013c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, | |
48f130a8 DA |
501 | { "stbs", 0x0c001200, 0xfc001fc0, "cMx,V(s,b)", pa10, 0}, |
502 | { "stbs", 0x0c001200, 0xfc001fc0, "cMx,V(b)", pa10, 0}, | |
caa05036 | 503 | { "stwas", 0x0c001380, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, |
48f130a8 | 504 | { "stwas", 0x0c001380, 0xfc00dfc0, "cMx,V(b)", pa10, 0}, |
eca04c6a JL |
505 | { "stdby", 0x0c001340, 0xfc0013c0, "cscCx,V(s,b)", pa20, FLAG_STRICT}, |
506 | { "stdby", 0x0c001340, 0xfc0013c0, "cscCx,V(b)", pa20, FLAG_STRICT}, | |
caa05036 DA |
507 | { "stbys", 0x0c001300, 0xfc0013c0, "cscCx,V(s,b)", pa11, FLAG_STRICT}, |
508 | { "stbys", 0x0c001300, 0xfc0013c0, "cscCx,V(b)", pa11, FLAG_STRICT}, | |
48f130a8 DA |
509 | { "stbys", 0x0c001300, 0xfc001fc0, "cAx,V(s,b)", pa10, 0}, |
510 | { "stbys", 0x0c001300, 0xfc001fc0, "cAx,V(b)", pa10, 0}, | |
252b5132 RH |
511 | |
512 | /* Immediate instructions. */ | |
1328dc98 | 513 | { "ldo", 0x34000000, 0xfc000000, "l(b),x", pa20w, 0}, |
8c47ebd9 JL |
514 | { "ldo", 0x34000000, 0xfc00c000, "j(b),x", pa10, 0}, |
515 | { "ldil", 0x20000000, 0xfc000000, "k,b", pa10, 0}, | |
516 | { "addil", 0x28000000, 0xfc000000, "k,b,Z", pa10, 0}, | |
517 | { "addil", 0x28000000, 0xfc000000, "k,b", pa10, 0}, | |
252b5132 | 518 | |
a7fba0e0 | 519 | /* Branching instructions. */ |
390f858d JL |
520 | { "b", 0xe8008000, 0xfc00e000, "cpnXL", pa20, FLAG_STRICT}, |
521 | { "b", 0xe800a000, 0xfc00e000, "clnXL", pa20, FLAG_STRICT}, | |
522 | { "b", 0xe8000000, 0xfc00e000, "clnW,b", pa10, FLAG_STRICT}, | |
523 | { "b", 0xe8002000, 0xfc00e000, "cgnW,b", pa10, FLAG_STRICT}, | |
146e763a | 524 | { "b", 0xe8000000, 0xffe0e000, "nW", pa10, 0}, /* b,l foo,r0 */ |
8c47ebd9 JL |
525 | { "bl", 0xe8000000, 0xfc00e000, "nW,b", pa10, 0}, |
526 | { "gate", 0xe8002000, 0xfc00e000, "nW,b", pa10, 0}, | |
527 | { "blr", 0xe8004000, 0xfc00e001, "nx,b", pa10, 0}, | |
528 | { "bv", 0xe800c000, 0xfc00fffd, "nx(b)", pa10, 0}, | |
529 | { "bv", 0xe800c000, 0xfc00fffd, "n(b)", pa10, 0}, | |
390f858d JL |
530 | { "bve", 0xe800f001, 0xfc1ffffd, "cpn(b)L", pa20, FLAG_STRICT}, |
531 | { "bve", 0xe800f000, 0xfc1ffffd, "cln(b)L", pa20, FLAG_STRICT}, | |
532 | { "bve", 0xe800d001, 0xfc1ffffd, "cPn(b)", pa20, FLAG_STRICT}, | |
533 | { "bve", 0xe800d000, 0xfc1ffffd, "n(b)", pa20, FLAG_STRICT}, | |
534 | { "be", 0xe4000000, 0xfc000000, "clnz(S,b),Y", pa10, FLAG_STRICT}, | |
535 | { "be", 0xe4000000, 0xfc000000, "clnz(b),Y", pa10, FLAG_STRICT}, | |
8c47ebd9 | 536 | { "be", 0xe0000000, 0xfc000000, "nz(S,b)", pa10, 0}, |
390f858d | 537 | { "be", 0xe0000000, 0xfc000000, "nz(b)", pa10, 0}, |
8c47ebd9 JL |
538 | { "ble", 0xe4000000, 0xfc000000, "nz(S,b)", pa10, 0}, |
539 | { "movb", 0xc8000000, 0xfc000000, "?ynx,b,w", pa10, 0}, | |
540 | { "movib", 0xcc000000, 0xfc000000, "?yn5,b,w", pa10, 0}, | |
541 | { "combt", 0x80000000, 0xfc000000, "?tnx,b,w", pa10, 0}, | |
542 | { "combf", 0x88000000, 0xfc000000, "?tnx,b,w", pa10, 0}, | |
543 | { "comibt", 0x84000000, 0xfc000000, "?tn5,b,w", pa10, 0}, | |
544 | { "comibf", 0x8c000000, 0xfc000000, "?tn5,b,w", pa10, 0}, | |
545 | { "addbt", 0xa0000000, 0xfc000000, "?dnx,b,w", pa10, 0}, | |
546 | { "addbf", 0xa8000000, 0xfc000000, "?dnx,b,w", pa10, 0}, | |
547 | { "addibt", 0xa4000000, 0xfc000000, "?dn5,b,w", pa10, 0}, | |
548 | { "addibf", 0xac000000, 0xfc000000, "?dn5,b,w", pa10, 0}, | |
96226a68 | 549 | { "bb", 0xc0004000, 0xffe06000, "?bnx,!,w", pa10, FLAG_STRICT}, |
8c47ebd9 | 550 | { "bb", 0xc4004000, 0xfc004000, "?bnx,Q,w", pa10, 0}, |
1befefea JL |
551 | { "bb", 0xc0006000, 0xffe06000, "?Bnx,!,w", pa20, FLAG_STRICT}, |
552 | { "bb", 0xc4004000, 0xfc004000, "?Bnx,B,w", pa20, FLAG_STRICT}, | |
8c47ebd9 | 553 | { "bvb", 0xc0004000, 0xffe04000, "?bnx,w", pa10, 0}, |
88a380f3 | 554 | { "clrbts", 0xe8004005, 0xffffffff, "", pa20, FLAG_STRICT}, |
e9fc28c6 | 555 | { "popbts", 0xe8004005, 0xfffff007, "$", pa20, FLAG_STRICT}, |
88a380f3 JL |
556 | { "pushnom", 0xe8004001, 0xffffffff, "", pa20, FLAG_STRICT}, |
557 | { "pushbts", 0xe8004001, 0xffe0ffff, "x", pa20, FLAG_STRICT}, | |
252b5132 | 558 | |
a7fba0e0 | 559 | /* Computation Instructions. */ |
252b5132 | 560 | |
caa05036 DA |
561 | { "cmpclr", 0x080008a0, 0xfc000fe0, "?Sx,b,t", pa20, FLAG_STRICT}, |
562 | { "cmpclr", 0x08000880, 0xfc000fe0, "?sx,b,t", pa10, FLAG_STRICT}, | |
563 | { "comclr", 0x08000880, 0xfc000fe0, "?sx,b,t", pa10, 0}, | |
564 | { "or", 0x08000260, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT}, | |
565 | { "or", 0x08000240, 0xfc000fe0, "?lx,b,t", pa10, 0}, | |
566 | { "xor", 0x080002a0, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT}, | |
567 | { "xor", 0x08000280, 0xfc000fe0, "?lx,b,t", pa10, 0}, | |
568 | { "and", 0x08000220, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT}, | |
569 | { "and", 0x08000200, 0xfc000fe0, "?lx,b,t", pa10, 0}, | |
570 | { "andcm", 0x08000020, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT}, | |
571 | { "andcm", 0x08000000, 0xfc000fe0, "?lx,b,t", pa10, 0}, | |
572 | { "uxor", 0x080003a0, 0xfc000fe0, "?Ux,b,t", pa20, FLAG_STRICT}, | |
573 | { "uxor", 0x08000380, 0xfc000fe0, "?ux,b,t", pa10, 0}, | |
574 | { "uaddcm", 0x080009a0, 0xfc000fa0, "cT?Ux,b,t", pa20, FLAG_STRICT}, | |
575 | { "uaddcm", 0x08000980, 0xfc000fa0, "cT?ux,b,t", pa10, FLAG_STRICT}, | |
576 | { "uaddcm", 0x08000980, 0xfc000fe0, "?ux,b,t", pa10, 0}, | |
577 | { "uaddcmt", 0x080009c0, 0xfc000fe0, "?ux,b,t", pa10, 0}, | |
578 | { "dcor", 0x08000ba0, 0xfc1f0fa0, "ci?Ub,t", pa20, FLAG_STRICT}, | |
579 | { "dcor", 0x08000b80, 0xfc1f0fa0, "ci?ub,t", pa10, FLAG_STRICT}, | |
580 | { "dcor", 0x08000b80, 0xfc1f0fe0, "?ub,t", pa10, 0}, | |
581 | { "idcor", 0x08000bc0, 0xfc1f0fe0, "?ub,t", pa10, 0}, | |
582 | { "addi", 0xb0000000, 0xfc000000, "ct?ai,b,x", pa10, FLAG_STRICT}, | |
583 | { "addi", 0xb4000000, 0xfc000000, "cv?ai,b,x", pa10, FLAG_STRICT}, | |
584 | { "addi", 0xb4000000, 0xfc000800, "?ai,b,x", pa10, 0}, | |
585 | { "addio", 0xb4000800, 0xfc000800, "?ai,b,x", pa10, 0}, | |
586 | { "addit", 0xb0000000, 0xfc000800, "?ai,b,x", pa10, 0}, | |
587 | { "addito", 0xb0000800, 0xfc000800, "?ai,b,x", pa10, 0}, | |
588 | { "add", 0x08000720, 0xfc0007e0, "cY?Ax,b,t", pa20, FLAG_STRICT}, | |
589 | { "add", 0x08000700, 0xfc0007e0, "cy?ax,b,t", pa10, FLAG_STRICT}, | |
590 | { "add", 0x08000220, 0xfc0003e0, "ca?Ax,b,t", pa20, FLAG_STRICT}, | |
591 | { "add", 0x08000200, 0xfc0003e0, "ca?ax,b,t", pa10, FLAG_STRICT}, | |
592 | { "add", 0x08000600, 0xfc000fe0, "?ax,b,t", pa10, 0}, | |
593 | { "addl", 0x08000a00, 0xfc000fe0, "?ax,b,t", pa10, 0}, | |
594 | { "addo", 0x08000e00, 0xfc000fe0, "?ax,b,t", pa10, 0}, | |
595 | { "addc", 0x08000700, 0xfc000fe0, "?ax,b,t", pa10, 0}, | |
596 | { "addco", 0x08000f00, 0xfc000fe0, "?ax,b,t", pa10, 0}, | |
597 | { "sub", 0x080004e0, 0xfc0007e0, "ct?Sx,b,t", pa20, FLAG_STRICT}, | |
598 | { "sub", 0x080004c0, 0xfc0007e0, "ct?sx,b,t", pa10, FLAG_STRICT}, | |
599 | { "sub", 0x08000520, 0xfc0007e0, "cB?Sx,b,t", pa20, FLAG_STRICT}, | |
600 | { "sub", 0x08000500, 0xfc0007e0, "cb?sx,b,t", pa10, FLAG_STRICT}, | |
601 | { "sub", 0x08000420, 0xfc0007e0, "cv?Sx,b,t", pa20, FLAG_STRICT}, | |
602 | { "sub", 0x08000400, 0xfc0007e0, "cv?sx,b,t", pa10, FLAG_STRICT}, | |
603 | { "sub", 0x08000400, 0xfc000fe0, "?sx,b,t", pa10, 0}, | |
604 | { "subo", 0x08000c00, 0xfc000fe0, "?sx,b,t", pa10, 0}, | |
605 | { "subb", 0x08000500, 0xfc000fe0, "?sx,b,t", pa10, 0}, | |
606 | { "subbo", 0x08000d00, 0xfc000fe0, "?sx,b,t", pa10, 0}, | |
607 | { "subt", 0x080004c0, 0xfc000fe0, "?sx,b,t", pa10, 0}, | |
608 | { "subto", 0x08000cc0, 0xfc000fe0, "?sx,b,t", pa10, 0}, | |
609 | { "ds", 0x08000440, 0xfc000fe0, "?sx,b,t", pa10, 0}, | |
610 | { "subi", 0x94000000, 0xfc000000, "cv?si,b,x", pa10, FLAG_STRICT}, | |
611 | { "subi", 0x94000000, 0xfc000800, "?si,b,x", pa10, 0}, | |
612 | { "subio", 0x94000800, 0xfc000800, "?si,b,x", pa10, 0}, | |
613 | { "cmpiclr", 0x90000800, 0xfc000800, "?Si,b,x", pa20, FLAG_STRICT}, | |
614 | { "cmpiclr", 0x90000000, 0xfc000800, "?si,b,x", pa10, FLAG_STRICT}, | |
615 | { "comiclr", 0x90000000, 0xfc000800, "?si,b,x", pa10, 0}, | |
616 | { "shladd", 0x08000220, 0xfc000320, "ca?Ax,.,b,t", pa20, FLAG_STRICT}, | |
617 | { "shladd", 0x08000200, 0xfc000320, "ca?ax,.,b,t", pa10, FLAG_STRICT}, | |
618 | { "sh1add", 0x08000640, 0xfc000fe0, "?ax,b,t", pa10, 0}, | |
619 | { "sh1addl", 0x08000a40, 0xfc000fe0, "?ax,b,t", pa10, 0}, | |
620 | { "sh1addo", 0x08000e40, 0xfc000fe0, "?ax,b,t", pa10, 0}, | |
621 | { "sh2add", 0x08000680, 0xfc000fe0, "?ax,b,t", pa10, 0}, | |
622 | { "sh2addl", 0x08000a80, 0xfc000fe0, "?ax,b,t", pa10, 0}, | |
623 | { "sh2addo", 0x08000e80, 0xfc000fe0, "?ax,b,t", pa10, 0}, | |
624 | { "sh3add", 0x080006c0, 0xfc000fe0, "?ax,b,t", pa10, 0}, | |
625 | { "sh3addl", 0x08000ac0, 0xfc000fe0, "?ax,b,t", pa10, 0}, | |
626 | { "sh3addo", 0x08000ec0, 0xfc000fe0, "?ax,b,t", pa10, 0}, | |
252b5132 | 627 | |
a7fba0e0 | 628 | /* Subword Operation Instructions. */ |
e9fc28c6 | 629 | |
caa05036 DA |
630 | { "hadd", 0x08000300, 0xfc00ff20, "cHx,b,t", pa20, FLAG_STRICT}, |
631 | { "havg", 0x080002c0, 0xfc00ffe0, "x,b,t", pa20, FLAG_STRICT}, | |
632 | { "hshl", 0xf8008800, 0xffe0fc20, "x,*,t", pa20, FLAG_STRICT}, | |
633 | { "hshladd", 0x08000700, 0xfc00ff20, "x,.,b,t", pa20, FLAG_STRICT}, | |
634 | { "hshr", 0xf800c800, 0xfc1ff820, "cSb,*,t", pa20, FLAG_STRICT}, | |
635 | { "hshradd", 0x08000500, 0xfc00ff20, "x,.,b,t", pa20, FLAG_STRICT}, | |
636 | { "hsub", 0x08000100, 0xfc00ff20, "cHx,b,t", pa20, FLAG_STRICT}, | |
637 | { "mixh", 0xf8008400, 0xfc009fe0, "chx,b,t", pa20, FLAG_STRICT}, | |
638 | { "mixw", 0xf8008000, 0xfc009fe0, "chx,b,t", pa20, FLAG_STRICT}, | |
639 | { "permh", 0xf8000000, 0xfc009020, "c*a,t", pa20, FLAG_STRICT}, | |
e9fc28c6 JL |
640 | |
641 | ||
a7fba0e0 | 642 | /* Extract and Deposit Instructions. */ |
252b5132 | 643 | |
caa05036 DA |
644 | { "shrpd", 0xd0000200, 0xfc001fe0, "?Xx,b,!,t", pa20, FLAG_STRICT}, |
645 | { "shrpd", 0xd0000400, 0xfc001400, "?Xx,b,~,t", pa20, FLAG_STRICT}, | |
646 | { "shrpw", 0xd0000000, 0xfc001fe0, "?xx,b,!,t", pa10, FLAG_STRICT}, | |
647 | { "shrpw", 0xd0000800, 0xfc001c00, "?xx,b,p,t", pa10, FLAG_STRICT}, | |
648 | { "vshd", 0xd0000000, 0xfc001fe0, "?xx,b,t", pa10, 0}, | |
649 | { "shd", 0xd0000800, 0xfc001c00, "?xx,b,p,t", pa10, 0}, | |
650 | { "extrd", 0xd0001200, 0xfc001ae0, "cS?Xb,!,%,x", pa20, FLAG_STRICT}, | |
651 | { "extrd", 0xd8000000, 0xfc000000, "cS?Xb,q,|,x", pa20, FLAG_STRICT}, | |
652 | { "extrw", 0xd0001000, 0xfc001be0, "cS?xb,!,T,x", pa10, FLAG_STRICT}, | |
653 | { "extrw", 0xd0001800, 0xfc001800, "cS?xb,P,T,x", pa10, FLAG_STRICT}, | |
654 | { "vextru", 0xd0001000, 0xfc001fe0, "?xb,T,x", pa10, 0}, | |
655 | { "vextrs", 0xd0001400, 0xfc001fe0, "?xb,T,x", pa10, 0}, | |
656 | { "extru", 0xd0001800, 0xfc001c00, "?xb,P,T,x", pa10, 0}, | |
657 | { "extrs", 0xd0001c00, 0xfc001c00, "?xb,P,T,x", pa10, 0}, | |
658 | { "depd", 0xd4000200, 0xfc001ae0, "cz?Xx,!,%,b", pa20, FLAG_STRICT}, | |
659 | { "depd", 0xf0000000, 0xfc000000, "cz?Xx,~,|,b", pa20, FLAG_STRICT}, | |
660 | { "depdi", 0xd4001200, 0xfc001ae0, "cz?X5,!,%,b", pa20, FLAG_STRICT}, | |
661 | { "depdi", 0xf4000000, 0xfc000000, "cz?X5,~,|,b", pa20, FLAG_STRICT}, | |
662 | { "depw", 0xd4000000, 0xfc001be0, "cz?xx,!,T,b", pa10, FLAG_STRICT}, | |
663 | { "depw", 0xd4000800, 0xfc001800, "cz?xx,p,T,b", pa10, FLAG_STRICT}, | |
664 | { "depwi", 0xd4001000, 0xfc001be0, "cz?x5,!,T,b", pa10, FLAG_STRICT}, | |
665 | { "depwi", 0xd4001800, 0xfc001800, "cz?x5,p,T,b", pa10, FLAG_STRICT}, | |
666 | { "zvdep", 0xd4000000, 0xfc001fe0, "?xx,T,b", pa10, 0}, | |
667 | { "vdep", 0xd4000400, 0xfc001fe0, "?xx,T,b", pa10, 0}, | |
668 | { "zdep", 0xd4000800, 0xfc001c00, "?xx,p,T,b", pa10, 0}, | |
669 | { "dep", 0xd4000c00, 0xfc001c00, "?xx,p,T,b", pa10, 0}, | |
670 | { "zvdepi", 0xd4001000, 0xfc001fe0, "?x5,T,b", pa10, 0}, | |
671 | { "vdepi", 0xd4001400, 0xfc001fe0, "?x5,T,b", pa10, 0}, | |
672 | { "zdepi", 0xd4001800, 0xfc001c00, "?x5,p,T,b", pa10, 0}, | |
673 | { "depi", 0xd4001c00, 0xfc001c00, "?x5,p,T,b", pa10, 0}, | |
252b5132 | 674 | |
a7fba0e0 | 675 | /* System Control Instructions. */ |
252b5132 | 676 | |
caa05036 DA |
677 | { "break", 0x00000000, 0xfc001fe0, "r,A", pa10, 0}, |
678 | { "rfi", 0x00000c00, 0xffffff1f, "cr", pa10, FLAG_STRICT}, | |
679 | { "rfi", 0x00000c00, 0xffffffff, "", pa10, 0}, | |
680 | { "rfir", 0x00000ca0, 0xffffffff, "", pa11, 0}, | |
681 | { "ssm", 0x00000d60, 0xfc00ffe0, "U,t", pa20, FLAG_STRICT}, | |
682 | { "ssm", 0x00000d60, 0xffe0ffe0, "R,t", pa10, 0}, | |
683 | { "rsm", 0x00000e60, 0xfc00ffe0, "U,t", pa20, FLAG_STRICT}, | |
684 | { "rsm", 0x00000e60, 0xffe0ffe0, "R,t", pa10, 0}, | |
685 | { "mtsm", 0x00001860, 0xffe0ffff, "x", pa10, 0}, | |
686 | { "ldsid", 0x000010a0, 0xfc1f3fe0, "(s,b),t", pa10, 0}, | |
687 | { "ldsid", 0x000010a0, 0xfc1f3fe0, "(b),t", pa10, 0}, | |
688 | { "mtsp", 0x00001820, 0xffe01fff, "x,S", pa10, 0}, | |
689 | { "mtctl", 0x00001840, 0xfc00ffff, "x,^", pa10, 0}, | |
690 | { "mtsarcm", 0x016018C0, 0xffe0ffff, "x", pa20, FLAG_STRICT}, | |
691 | { "mfia", 0x000014A0, 0xffffffe0, "t", pa20, FLAG_STRICT}, | |
692 | { "mfsp", 0x000004a0, 0xffff1fe0, "S,t", pa10, 0}, | |
693 | { "mfctl", 0x016048a0, 0xffffffe0, "cW!,t", pa20, FLAG_STRICT}, | |
694 | { "mfctl", 0x000008a0, 0xfc1fffe0, "^,t", pa10, 0}, | |
695 | { "sync", 0x00000400, 0xffffffff, "", pa10, 0}, | |
696 | { "syncdma", 0x00100400, 0xffffffff, "", pa10, 0}, | |
697 | { "probe", 0x04001180, 0xfc003fa0, "cw(s,b),x,t", pa10, FLAG_STRICT}, | |
698 | { "probe", 0x04001180, 0xfc003fa0, "cw(b),x,t", pa10, FLAG_STRICT}, | |
699 | { "probei", 0x04003180, 0xfc003fa0, "cw(s,b),R,t", pa10, FLAG_STRICT}, | |
700 | { "probei", 0x04003180, 0xfc003fa0, "cw(b),R,t", pa10, FLAG_STRICT}, | |
701 | { "prober", 0x04001180, 0xfc003fe0, "(s,b),x,t", pa10, 0}, | |
702 | { "prober", 0x04001180, 0xfc003fe0, "(b),x,t", pa10, 0}, | |
703 | { "proberi", 0x04003180, 0xfc003fe0, "(s,b),R,t", pa10, 0}, | |
704 | { "proberi", 0x04003180, 0xfc003fe0, "(b),R,t", pa10, 0}, | |
705 | { "probew", 0x040011c0, 0xfc003fe0, "(s,b),x,t", pa10, 0}, | |
706 | { "probew", 0x040011c0, 0xfc003fe0, "(b),x,t", pa10, 0}, | |
707 | { "probewi", 0x040031c0, 0xfc003fe0, "(s,b),R,t", pa10, 0}, | |
708 | { "probewi", 0x040031c0, 0xfc003fe0, "(b),R,t", pa10, 0}, | |
709 | { "lpa", 0x04001340, 0xfc003fc0, "cZx(s,b),t", pa10, 0}, | |
710 | { "lpa", 0x04001340, 0xfc003fc0, "cZx(b),t", pa10, 0}, | |
711 | { "lha", 0x04001300, 0xfc003fc0, "cZx(s,b),t", pa10, 0}, | |
712 | { "lha", 0x04001300, 0xfc003fc0, "cZx(b),t", pa10, 0}, | |
713 | { "lci", 0x04001300, 0xfc003fe0, "x(s,b),t", pa10, 0}, | |
714 | { "lci", 0x04001300, 0xfc003fe0, "x(b),t", pa10, 0}, | |
715 | { "pdtlb", 0x04001600, 0xfc003fdf, "cLcZx(s,b)", pa20, FLAG_STRICT}, | |
716 | { "pdtlb", 0x04001600, 0xfc003fdf, "cLcZx(b)", pa20, FLAG_STRICT}, | |
717 | { "pdtlb", 0x04001200, 0xfc003fdf, "cZx(s,b)", pa10, 0}, | |
718 | { "pdtlb", 0x04001200, 0xfc003fdf, "cZx(b)", pa10, 0}, | |
719 | { "pitlb", 0x04000600, 0xfc001fdf, "cLcZx(S,b)", pa20, FLAG_STRICT}, | |
720 | { "pitlb", 0x04000600, 0xfc001fdf, "cLcZx(b)", pa20, FLAG_STRICT}, | |
721 | { "pitlb", 0x04000200, 0xfc001fdf, "cZx(S,b)", pa10, 0}, | |
722 | { "pitlb", 0x04000200, 0xfc001fdf, "cZx(b)", pa10, 0}, | |
723 | { "pdtlbe", 0x04001240, 0xfc003fdf, "cZx(s,b)", pa10, 0}, | |
724 | { "pdtlbe", 0x04001240, 0xfc003fdf, "cZx(b)", pa10, 0}, | |
725 | { "pitlbe", 0x04000240, 0xfc001fdf, "cZx(S,b)", pa10, 0}, | |
726 | { "pitlbe", 0x04000240, 0xfc001fdf, "cZx(b)", pa10, 0}, | |
727 | { "idtlba", 0x04001040, 0xfc003fff, "x,(s,b)", pa10, 0}, | |
728 | { "idtlba", 0x04001040, 0xfc003fff, "x,(b)", pa10, 0}, | |
729 | { "iitlba", 0x04000040, 0xfc001fff, "x,(S,b)", pa10, 0}, | |
730 | { "iitlba", 0x04000040, 0xfc001fff, "x,(b)", pa10, 0}, | |
731 | { "idtlbp", 0x04001000, 0xfc003fff, "x,(s,b)", pa10, 0}, | |
732 | { "idtlbp", 0x04001000, 0xfc003fff, "x,(b)", pa10, 0}, | |
733 | { "iitlbp", 0x04000000, 0xfc001fff, "x,(S,b)", pa10, 0}, | |
734 | { "iitlbp", 0x04000000, 0xfc001fff, "x,(b)", pa10, 0}, | |
735 | { "pdc", 0x04001380, 0xfc003fdf, "cZx(s,b)", pa10, 0}, | |
736 | { "pdc", 0x04001380, 0xfc003fdf, "cZx(b)", pa10, 0}, | |
737 | { "fdc", 0x04001280, 0xfc003fdf, "cZx(s,b)", pa10, 0}, | |
738 | { "fdc", 0x04001280, 0xfc003fdf, "cZx(b)", pa10, 0}, | |
739 | { "fic", 0x04000280, 0xfc001fdf, "cZx(S,b)", pa10, 0}, | |
740 | { "fic", 0x04000280, 0xfc001fdf, "cZx(b)", pa10, 0}, | |
741 | { "fdce", 0x040012c0, 0xfc003fdf, "cZx(s,b)", pa10, 0}, | |
742 | { "fdce", 0x040012c0, 0xfc003fdf, "cZx(b)", pa10, 0}, | |
743 | { "fice", 0x040002c0, 0xfc001fdf, "cZx(S,b)", pa10, 0}, | |
744 | { "fice", 0x040002c0, 0xfc001fdf, "cZx(b)", pa10, 0}, | |
745 | { "diag", 0x14000000, 0xfc000000, "D", pa10, 0}, | |
746 | { "idtlbt", 0x04001800, 0xfc00ffff, "x,b", pa20, FLAG_STRICT}, | |
747 | { "iitlbt", 0x04000800, 0xfc00ffff, "x,b", pa20, FLAG_STRICT}, | |
252b5132 | 748 | |
aa008907 JL |
749 | /* These may be specific to certain versions of the PA. Joel claimed |
750 | they were 72000 (7200?) specific. However, I'm almost certain the | |
751 | mtcpu/mfcpu were undocumented, but available in the older 700 machines. */ | |
caa05036 DA |
752 | { "mtcpu", 0x14001600, 0xfc00ffff, "x,^", pa10, 0}, |
753 | { "mfcpu", 0x14001A00, 0xfc00ffff, "^,x", pa10, 0}, | |
754 | { "tocen", 0x14403600, 0xffffffff, "", pa10, 0}, | |
755 | { "tocdis", 0x14401620, 0xffffffff, "", pa10, 0}, | |
756 | { "shdwgr", 0x14402600, 0xffffffff, "", pa10, 0}, | |
757 | { "grshdw", 0x14400620, 0xffffffff, "", pa10, 0}, | |
aa008907 | 758 | |
252b5132 RH |
759 | /* gfw and gfr are not in the HP PA 1.1 manual, but they are in either |
760 | the Timex FPU or the Mustang ERS (not sure which) manual. */ | |
8c47ebd9 JL |
761 | { "gfw", 0x04001680, 0xfc003fdf, "cZx(s,b)", pa11, 0}, |
762 | { "gfw", 0x04001680, 0xfc003fdf, "cZx(b)", pa11, 0}, | |
763 | { "gfr", 0x04001a80, 0xfc003fdf, "cZx(s,b)", pa11, 0}, | |
764 | { "gfr", 0x04001a80, 0xfc003fdf, "cZx(b)", pa11, 0}, | |
252b5132 | 765 | |
a7fba0e0 | 766 | /* Floating Point Coprocessor Instructions. */ |
6397d1a2 | 767 | |
caa05036 DA |
768 | { "fldw", 0x24000000, 0xfc001380, "cxccx(s,b),fT", pa11, FLAG_STRICT}, |
769 | { "fldw", 0x24000000, 0xfc001380, "cxccx(b),fT", pa11, FLAG_STRICT}, | |
caa05036 DA |
770 | { "fldw", 0x24001000, 0xfc001380, "cmcc5(s,b),fT", pa11, FLAG_STRICT}, |
771 | { "fldw", 0x24001000, 0xfc001380, "cmcc5(b),fT", pa11, FLAG_STRICT}, | |
772 | { "fldw", 0x24001020, 0xfc1f33a0, "cocc@(s,b),fT", pa20, FLAG_STRICT}, | |
773 | { "fldw", 0x24001020, 0xfc1f33a0, "cocc@(b),fT", pa20, FLAG_STRICT}, | |
774 | { "fldw", 0x5c000000, 0xfc000004, "y(b),fe", pa20w, FLAG_STRICT}, | |
775 | { "fldw", 0x58000000, 0xfc000000, "cJy(b),fe", pa20w, FLAG_STRICT}, | |
776 | { "fldw", 0x5c000000, 0xfc000004, "d(b),fe", pa20, FLAG_STRICT}, | |
777 | { "fldw", 0x58000000, 0xfc000000, "cJd(b),fe", pa20, FLAG_STRICT}, | |
48f130a8 DA |
778 | { "fldw", 0x24001000, 0xfc001f80, "cM5(s,b),fT", pa10, 0}, |
779 | { "fldw", 0x24001000, 0xfc001f80, "cM5(b),fT", pa10, 0}, | |
780 | { "fldw", 0x24000000, 0xfc001f80, "cXx(s,b),fT", pa10, 0}, | |
781 | { "fldw", 0x24000000, 0xfc001f80, "cXx(b),fT", pa10, 0}, | |
caa05036 DA |
782 | { "fldd", 0x2c000000, 0xfc0013c0, "cxccx(s,b),ft", pa11, FLAG_STRICT}, |
783 | { "fldd", 0x2c000000, 0xfc0013c0, "cxccx(b),ft", pa11, FLAG_STRICT}, | |
caa05036 DA |
784 | { "fldd", 0x2c001000, 0xfc0013c0, "cmcc5(s,b),ft", pa11, FLAG_STRICT}, |
785 | { "fldd", 0x2c001000, 0xfc0013c0, "cmcc5(b),ft", pa11, FLAG_STRICT}, | |
786 | { "fldd", 0x2c001020, 0xfc1f33e0, "cocc@(s,b),ft", pa20, FLAG_STRICT}, | |
787 | { "fldd", 0x2c001020, 0xfc1f33e0, "cocc@(b),ft", pa20, FLAG_STRICT}, | |
788 | { "fldd", 0x50000002, 0xfc000002, "cq&(b),fx", pa20w, FLAG_STRICT}, | |
789 | { "fldd", 0x50000002, 0xfc000002, "cq#(b),fx", pa20, FLAG_STRICT}, | |
48f130a8 DA |
790 | { "fldd", 0x2c001000, 0xfc001fc0, "cM5(s,b),ft", pa10, 0}, |
791 | { "fldd", 0x2c001000, 0xfc001fc0, "cM5(b),ft", pa10, 0}, | |
792 | { "fldd", 0x2c000000, 0xfc001fc0, "cXx(s,b),ft", pa10, 0}, | |
793 | { "fldd", 0x2c000000, 0xfc001fc0, "cXx(b),ft", pa10, 0}, | |
caa05036 DA |
794 | { "fstw", 0x24000200, 0xfc001380, "cxcCfT,x(s,b)", pa11, FLAG_STRICT}, |
795 | { "fstw", 0x24000200, 0xfc001380, "cxcCfT,x(b)", pa11, FLAG_STRICT}, | |
2db495be DA |
796 | { "fstw", 0x24001200, 0xfc001f80, "cMfT,5(s,b)", pa10, FLAG_STRICT}, |
797 | { "fstw", 0x24001200, 0xfc001f80, "cMfT,5(b)", pa10, FLAG_STRICT}, | |
caa05036 DA |
798 | { "fstw", 0x24001220, 0xfc1f33a0, "cocCfT,@(s,b)", pa20, FLAG_STRICT}, |
799 | { "fstw", 0x24001220, 0xfc1f33a0, "cocCfT,@(b)", pa20, FLAG_STRICT}, | |
800 | { "fstw", 0x7c000000, 0xfc000004, "fE,y(b)", pa20w, FLAG_STRICT}, | |
801 | { "fstw", 0x78000000, 0xfc000000, "cJfe,y(b)", pa20w, FLAG_STRICT}, | |
802 | { "fstw", 0x7c000000, 0xfc000004, "fe,d(b)", pa20, FLAG_STRICT}, | |
803 | { "fstw", 0x78000000, 0xfc000000, "cJfe,d(b)", pa20, FLAG_STRICT}, | |
48f130a8 DA |
804 | { "fstw", 0x24001200, 0xfc001f80, "cMfT,5(s,b)", pa10, 0}, |
805 | { "fstw", 0x24001200, 0xfc001f80, "cMfT,5(b)", pa10, 0}, | |
806 | { "fstw", 0x24000200, 0xfc001f80, "cXfT,x(s,b)", pa10, 0}, | |
807 | { "fstw", 0x24000200, 0xfc001f80, "cXfT,x(b)", pa10, 0}, | |
caa05036 DA |
808 | { "fstd", 0x2c000200, 0xfc0013c0, "cxcCft,x(s,b)", pa11, FLAG_STRICT}, |
809 | { "fstd", 0x2c000200, 0xfc0013c0, "cxcCft,x(b)", pa11, FLAG_STRICT}, | |
caa05036 DA |
810 | { "fstd", 0x2c001200, 0xfc0013c0, "cmcCft,5(s,b)", pa11, FLAG_STRICT}, |
811 | { "fstd", 0x2c001200, 0xfc0013c0, "cmcCft,5(b)", pa11, FLAG_STRICT}, | |
812 | { "fstd", 0x2c001220, 0xfc1f33e0, "cocCft,@(s,b)", pa20, FLAG_STRICT}, | |
813 | { "fstd", 0x2c001220, 0xfc1f33e0, "cocCft,@(b)", pa20, FLAG_STRICT}, | |
814 | { "fstd", 0x70000002, 0xfc000002, "cqfx,&(b)", pa20w, FLAG_STRICT}, | |
815 | { "fstd", 0x70000002, 0xfc000002, "cqfx,#(b)", pa20, FLAG_STRICT}, | |
48f130a8 DA |
816 | { "fstd", 0x2c001200, 0xfc001fc0, "cMft,5(s,b)", pa10, 0}, |
817 | { "fstd", 0x2c001200, 0xfc001fc0, "cMft,5(b)", pa10, 0}, | |
818 | { "fstd", 0x2c000200, 0xfc001fc0, "cXft,x(s,b)", pa10, 0}, | |
819 | { "fstd", 0x2c000200, 0xfc001fc0, "cXft,x(b)", pa10, 0}, | |
caa05036 DA |
820 | { "fldwx", 0x24000000, 0xfc001380, "cxccx(s,b),fT", pa11, FLAG_STRICT}, |
821 | { "fldwx", 0x24000000, 0xfc001380, "cxccx(b),fT", pa11, FLAG_STRICT}, | |
48f130a8 DA |
822 | { "fldwx", 0x24000000, 0xfc001f80, "cXx(s,b),fT", pa10, 0}, |
823 | { "fldwx", 0x24000000, 0xfc001f80, "cXx(b),fT", pa10, 0}, | |
caa05036 DA |
824 | { "flddx", 0x2c000000, 0xfc0013c0, "cxccx(s,b),ft", pa11, FLAG_STRICT}, |
825 | { "flddx", 0x2c000000, 0xfc0013c0, "cxccx(b),ft", pa11, FLAG_STRICT}, | |
48f130a8 DA |
826 | { "flddx", 0x2c000000, 0xfc001fc0, "cXx(s,b),ft", pa10, 0}, |
827 | { "flddx", 0x2c000000, 0xfc001fc0, "cXx(b),ft", pa10, 0}, | |
caa05036 DA |
828 | { "fstwx", 0x24000200, 0xfc001380, "cxcCfT,x(s,b)", pa11, FLAG_STRICT}, |
829 | { "fstwx", 0x24000200, 0xfc001380, "cxcCfT,x(b)", pa11, FLAG_STRICT}, | |
48f130a8 DA |
830 | { "fstwx", 0x24000200, 0xfc001f80, "cxfT,x(s,b)", pa10, 0}, |
831 | { "fstwx", 0x24000200, 0xfc001f80, "cxfT,x(b)", pa10, 0}, | |
caa05036 DA |
832 | { "fstdx", 0x2c000200, 0xfc0013c0, "cxcCft,x(s,b)", pa11, FLAG_STRICT}, |
833 | { "fstdx", 0x2c000200, 0xfc0013c0, "cxcCft,x(b)", pa11, FLAG_STRICT}, | |
48f130a8 DA |
834 | { "fstdx", 0x2c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, 0}, |
835 | { "fstdx", 0x2c000200, 0xfc001fc0, "cxft,x(b)", pa10, 0}, | |
caa05036 DA |
836 | { "fstqx", 0x3c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, 0}, |
837 | { "fstqx", 0x3c000200, 0xfc001fc0, "cxft,x(b)", pa10, 0}, | |
caa05036 DA |
838 | { "fldws", 0x24001000, 0xfc001380, "cmcc5(s,b),fT", pa11, FLAG_STRICT}, |
839 | { "fldws", 0x24001000, 0xfc001380, "cmcc5(b),fT", pa11, FLAG_STRICT}, | |
48f130a8 DA |
840 | { "fldws", 0x24001000, 0xfc001f80, "cm5(s,b),fT", pa10, 0}, |
841 | { "fldws", 0x24001000, 0xfc001f80, "cm5(b),fT", pa10, 0}, | |
caa05036 DA |
842 | { "fldds", 0x2c001000, 0xfc0013c0, "cmcc5(s,b),ft", pa11, FLAG_STRICT}, |
843 | { "fldds", 0x2c001000, 0xfc0013c0, "cmcc5(b),ft", pa11, FLAG_STRICT}, | |
48f130a8 DA |
844 | { "fldds", 0x2c001000, 0xfc001fc0, "cm5(s,b),ft", pa10, 0}, |
845 | { "fldds", 0x2c001000, 0xfc001fc0, "cm5(b),ft", pa10, 0}, | |
caa05036 DA |
846 | { "fstws", 0x24001200, 0xfc001380, "cmcCfT,5(s,b)", pa11, FLAG_STRICT}, |
847 | { "fstws", 0x24001200, 0xfc001380, "cmcCfT,5(b)", pa11, FLAG_STRICT}, | |
48f130a8 DA |
848 | { "fstws", 0x24001200, 0xfc001f80, "cmfT,5(s,b)", pa10, 0}, |
849 | { "fstws", 0x24001200, 0xfc001f80, "cmfT,5(b)", pa10, 0}, | |
caa05036 DA |
850 | { "fstds", 0x2c001200, 0xfc0013c0, "cmcCft,5(s,b)", pa11, FLAG_STRICT}, |
851 | { "fstds", 0x2c001200, 0xfc0013c0, "cmcCft,5(b)", pa11, FLAG_STRICT}, | |
48f130a8 DA |
852 | { "fstds", 0x2c001200, 0xfc001fc0, "cmft,5(s,b)", pa10, 0}, |
853 | { "fstds", 0x2c001200, 0xfc001fc0, "cmft,5(b)", pa10, 0}, | |
caa05036 DA |
854 | { "fstqs", 0x3c001200, 0xfc001fc0, "cmft,5(s,b)", pa10, 0}, |
855 | { "fstqs", 0x3c001200, 0xfc001fc0, "cmft,5(b)", pa10, 0}, | |
856 | { "fadd", 0x30000600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0}, | |
857 | { "fadd", 0x38000600, 0xfc00e720, "IfA,fB,fT", pa10, 0}, | |
858 | { "fsub", 0x30002600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0}, | |
859 | { "fsub", 0x38002600, 0xfc00e720, "IfA,fB,fT", pa10, 0}, | |
860 | { "fmpy", 0x30004600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0}, | |
861 | { "fmpy", 0x38004600, 0xfc00e720, "IfA,fB,fT", pa10, 0}, | |
862 | { "fdiv", 0x30006600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0}, | |
863 | { "fdiv", 0x38006600, 0xfc00e720, "IfA,fB,fT", pa10, 0}, | |
864 | { "fsqrt", 0x30008000, 0xfc1fe7e0, "Ffa,fT", pa10, 0}, | |
865 | { "fsqrt", 0x38008000, 0xfc1fe720, "FfA,fT", pa10, 0}, | |
866 | { "fabs", 0x30006000, 0xfc1fe7e0, "Ffa,fT", pa10, 0}, | |
867 | { "fabs", 0x38006000, 0xfc1fe720, "FfA,fT", pa10, 0}, | |
868 | { "frem", 0x30008600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0}, | |
869 | { "frem", 0x38008600, 0xfc00e720, "FfA,fB,fT", pa10, 0}, | |
870 | { "frnd", 0x3000a000, 0xfc1fe7e0, "Ffa,fT", pa10, 0}, | |
871 | { "frnd", 0x3800a000, 0xfc1fe720, "FfA,fT", pa10, 0}, | |
872 | { "fcpy", 0x30004000, 0xfc1fe7e0, "Ffa,fT", pa10, 0}, | |
873 | { "fcpy", 0x38004000, 0xfc1fe720, "FfA,fT", pa10, 0}, | |
874 | { "fcnvff", 0x30000200, 0xfc1f87e0, "FGfa,fT", pa10, 0}, | |
875 | { "fcnvff", 0x38000200, 0xfc1f8720, "FGfA,fT", pa10, 0}, | |
876 | { "fcnvxf", 0x30008200, 0xfc1f87e0, "FGfa,fT", pa10, 0}, | |
877 | { "fcnvxf", 0x38008200, 0xfc1f8720, "FGfA,fT", pa10, 0}, | |
878 | { "fcnvfx", 0x30010200, 0xfc1f87e0, "FGfa,fT", pa10, 0}, | |
879 | { "fcnvfx", 0x38010200, 0xfc1f8720, "FGfA,fT", pa10, 0}, | |
880 | { "fcnvfxt", 0x30018200, 0xfc1f87e0, "FGfa,fT", pa10, 0}, | |
881 | { "fcnvfxt", 0x38018200, 0xfc1f8720, "FGfA,fT", pa10, 0}, | |
882 | { "fmpyfadd", 0xb8000000, 0xfc000020, "IfA,fB,fC,fT", pa20, FLAG_STRICT}, | |
883 | { "fmpynfadd", 0xb8000020, 0xfc000020, "IfA,fB,fC,fT", pa20, FLAG_STRICT}, | |
884 | { "fneg", 0x3000c000, 0xfc1fe7e0, "Ffa,fT", pa20, FLAG_STRICT}, | |
885 | { "fneg", 0x3800c000, 0xfc1fe720, "IfA,fT", pa20, FLAG_STRICT}, | |
886 | { "fnegabs", 0x3000e000, 0xfc1fe7e0, "Ffa,fT", pa20, FLAG_STRICT}, | |
887 | { "fnegabs", 0x3800e000, 0xfc1fe720, "IfA,fT", pa20, FLAG_STRICT}, | |
888 | { "fcnv", 0x30000200, 0xfc1c0720, "{_fa,fT", pa20, FLAG_STRICT}, | |
889 | { "fcnv", 0x38000200, 0xfc1c0720, "FGfA,fT", pa20, FLAG_STRICT}, | |
890 | { "fcmp", 0x30000400, 0xfc0007e0, "F?ffa,fb,h", pa20, FLAG_STRICT}, | |
891 | { "fcmp", 0x38000400, 0xfc000720, "I?ffA,fB,h", pa20, FLAG_STRICT}, | |
892 | { "fcmp", 0x30000400, 0xfc00e7e0, "F?ffa,fb", pa10, 0}, | |
893 | { "fcmp", 0x38000400, 0xfc00e720, "I?ffA,fB", pa10, 0}, | |
8c47ebd9 JL |
894 | { "xmpyu", 0x38004700, 0xfc00e720, "fX,fB,fT", pa11, 0}, |
895 | { "fmpyadd", 0x18000000, 0xfc000000, "Hfi,fj,fk,fl,fm", pa11, 0}, | |
896 | { "fmpysub", 0x98000000, 0xfc000000, "Hfi,fj,fk,fl,fm", pa11, 0}, | |
caa05036 DA |
897 | { "ftest", 0x30002420, 0xffffffe0, ",=", pa20, FLAG_STRICT}, |
898 | { "ftest", 0x30000420, 0xffff1fff, "m", pa20, FLAG_STRICT}, | |
899 | { "ftest", 0x30002420, 0xffffffff, "", pa10, 0}, | |
900 | { "fid", 0x30000000, 0xffffffff, "", pa11, 0}, | |
252b5132 | 901 | |
a7fba0e0 | 902 | /* Performance Monitor Instructions. */ |
1d16bf9c JL |
903 | |
904 | { "pmdis", 0x30000280, 0xffffffdf, "N", pa20, FLAG_STRICT}, | |
905 | { "pmenb", 0x30000680, 0xffffffff, "", pa20, FLAG_STRICT}, | |
252b5132 | 906 | |
a7fba0e0 | 907 | /* Assist Instructions. */ |
252b5132 | 908 | |
caa05036 DA |
909 | { "spop0", 0x10000000, 0xfc000600, "v,ON", pa10, 0}, |
910 | { "spop1", 0x10000200, 0xfc000600, "v,oNt", pa10, 0}, | |
911 | { "spop2", 0x10000400, 0xfc000600, "v,1Nb", pa10, 0}, | |
912 | { "spop3", 0x10000600, 0xfc000600, "v,0Nx,b", pa10, 0}, | |
913 | { "copr", 0x30000000, 0xfc000000, "u,2N", pa10, 0}, | |
caa05036 DA |
914 | { "cldw", 0x24000000, 0xfc001200, "ucxccx(s,b),t", pa11, FLAG_STRICT}, |
915 | { "cldw", 0x24000000, 0xfc001200, "ucxccx(b),t", pa11, FLAG_STRICT}, | |
caa05036 DA |
916 | { "cldw", 0x24001000, 0xfc001200, "ucmcc5(s,b),t", pa11, FLAG_STRICT}, |
917 | { "cldw", 0x24001000, 0xfc001200, "ucmcc5(b),t", pa11, FLAG_STRICT}, | |
918 | { "cldw", 0x24001000, 0xfc001200, "ucocc@(s,b),t", pa20, FLAG_STRICT}, | |
919 | { "cldw", 0x24001000, 0xfc001200, "ucocc@(b),t", pa20, FLAG_STRICT}, | |
48f130a8 DA |
920 | { "cldw", 0x24001000, 0xfc001e00, "ucM5(s,b),t", pa10, 0}, |
921 | { "cldw", 0x24001000, 0xfc001e00, "ucM5(b),t", pa10, 0}, | |
922 | { "cldw", 0x24000000, 0xfc001e00, "ucXx(s,b),t", pa10, 0}, | |
923 | { "cldw", 0x24000000, 0xfc001e00, "ucXx(b),t", pa10, 0}, | |
caa05036 DA |
924 | { "cldd", 0x2c000000, 0xfc001200, "ucxccx(s,b),t", pa11, FLAG_STRICT}, |
925 | { "cldd", 0x2c000000, 0xfc001200, "ucxccx(b),t", pa11, FLAG_STRICT}, | |
caa05036 DA |
926 | { "cldd", 0x2c001000, 0xfc001200, "ucmcc5(s,b),t", pa11, FLAG_STRICT}, |
927 | { "cldd", 0x2c001000, 0xfc001200, "ucmcc5(b),t", pa11, FLAG_STRICT}, | |
928 | { "cldd", 0x2c001000, 0xfc001200, "ucocc@(s,b),t", pa20, FLAG_STRICT}, | |
929 | { "cldd", 0x2c001000, 0xfc001200, "ucocc@(b),t", pa20, FLAG_STRICT}, | |
48f130a8 DA |
930 | { "cldd", 0x2c001000, 0xfc001e00, "ucM5(s,b),t", pa10, 0}, |
931 | { "cldd", 0x2c001000, 0xfc001e00, "ucM5(b),t", pa10, 0}, | |
932 | { "cldd", 0x2c000000, 0xfc001e00, "ucXx(s,b),t", pa10, 0}, | |
933 | { "cldd", 0x2c000000, 0xfc001e00, "ucXx(b),t", pa10, 0}, | |
caa05036 DA |
934 | { "cstw", 0x24000200, 0xfc001200, "ucxcCt,x(s,b)", pa11, FLAG_STRICT}, |
935 | { "cstw", 0x24000200, 0xfc001200, "ucxcCt,x(b)", pa11, FLAG_STRICT}, | |
caa05036 DA |
936 | { "cstw", 0x24001200, 0xfc001200, "ucmcCt,5(s,b)", pa11, FLAG_STRICT}, |
937 | { "cstw", 0x24001200, 0xfc001200, "ucmcCt,5(b)", pa11, FLAG_STRICT}, | |
938 | { "cstw", 0x24001200, 0xfc001200, "ucocCt,@(s,b)", pa20, FLAG_STRICT}, | |
939 | { "cstw", 0x24001200, 0xfc001200, "ucocCt,@(b)", pa20, FLAG_STRICT}, | |
48f130a8 DA |
940 | { "cstw", 0x24001200, 0xfc001e00, "ucMt,5(s,b)", pa10, 0}, |
941 | { "cstw", 0x24001200, 0xfc001e00, "ucMt,5(b)", pa10, 0}, | |
942 | { "cstw", 0x24000200, 0xfc001e00, "ucXt,x(s,b)", pa10, 0}, | |
943 | { "cstw", 0x24000200, 0xfc001e00, "ucXt,x(b)", pa10, 0}, | |
caa05036 DA |
944 | { "cstd", 0x2c000200, 0xfc001200, "ucxcCt,x(s,b)", pa11, FLAG_STRICT}, |
945 | { "cstd", 0x2c000200, 0xfc001200, "ucxcCt,x(b)", pa11, FLAG_STRICT}, | |
caa05036 DA |
946 | { "cstd", 0x2c001200, 0xfc001200, "ucmcCt,5(s,b)", pa11, FLAG_STRICT}, |
947 | { "cstd", 0x2c001200, 0xfc001200, "ucmcCt,5(b)", pa11, FLAG_STRICT}, | |
948 | { "cstd", 0x2c001200, 0xfc001200, "ucocCt,@(s,b)", pa20, FLAG_STRICT}, | |
949 | { "cstd", 0x2c001200, 0xfc001200, "ucocCt,@(b)", pa20, FLAG_STRICT}, | |
48f130a8 DA |
950 | { "cstd", 0x2c001200, 0xfc001e00, "ucMt,5(s,b)", pa10, 0}, |
951 | { "cstd", 0x2c001200, 0xfc001e00, "ucMt,5(b)", pa10, 0}, | |
952 | { "cstd", 0x2c000200, 0xfc001e00, "ucXt,x(s,b)", pa10, 0}, | |
953 | { "cstd", 0x2c000200, 0xfc001e00, "ucXt,x(b)", pa10, 0}, | |
caa05036 DA |
954 | { "cldwx", 0x24000000, 0xfc001200, "ucxccx(s,b),t", pa11, FLAG_STRICT}, |
955 | { "cldwx", 0x24000000, 0xfc001200, "ucxccx(b),t", pa11, FLAG_STRICT}, | |
48f130a8 DA |
956 | { "cldwx", 0x24000000, 0xfc001e00, "ucXx(s,b),t", pa10, 0}, |
957 | { "cldwx", 0x24000000, 0xfc001e00, "ucXx(b),t", pa10, 0}, | |
caa05036 DA |
958 | { "clddx", 0x2c000000, 0xfc001200, "ucxccx(s,b),t", pa11, FLAG_STRICT}, |
959 | { "clddx", 0x2c000000, 0xfc001200, "ucxccx(b),t", pa11, FLAG_STRICT}, | |
48f130a8 DA |
960 | { "clddx", 0x2c000000, 0xfc001e00, "ucXx(s,b),t", pa10, 0}, |
961 | { "clddx", 0x2c000000, 0xfc001e00, "ucXx(b),t", pa10, 0}, | |
caa05036 DA |
962 | { "cstwx", 0x24000200, 0xfc001200, "ucxcCt,x(s,b)", pa11, FLAG_STRICT}, |
963 | { "cstwx", 0x24000200, 0xfc001200, "ucxcCt,x(b)", pa11, FLAG_STRICT}, | |
48f130a8 DA |
964 | { "cstwx", 0x24000200, 0xfc001e00, "ucXt,x(s,b)", pa10, 0}, |
965 | { "cstwx", 0x24000200, 0xfc001e00, "ucXt,x(b)", pa10, 0}, | |
966 | { "cstdx", 0x2c000200, 0xfc001200, "ucxcCt,x(s,b)", pa11, FLAG_STRICT}, | |
967 | { "cstdx", 0x2c000200, 0xfc001200, "ucxcCt,x(b)", pa11, FLAG_STRICT}, | |
968 | { "cstdx", 0x2c000200, 0xfc001e00, "ucXt,x(s,b)", pa10, 0}, | |
969 | { "cstdx", 0x2c000200, 0xfc001e00, "ucXt,x(b)", pa10, 0}, | |
caa05036 DA |
970 | { "cldws", 0x24001000, 0xfc001200, "ucmcc5(s,b),t", pa11, FLAG_STRICT}, |
971 | { "cldws", 0x24001000, 0xfc001200, "ucmcc5(b),t", pa11, FLAG_STRICT}, | |
48f130a8 DA |
972 | { "cldws", 0x24001000, 0xfc001e00, "ucM5(s,b),t", pa10, 0}, |
973 | { "cldws", 0x24001000, 0xfc001e00, "ucM5(b),t", pa10, 0}, | |
caa05036 DA |
974 | { "cldds", 0x2c001000, 0xfc001200, "ucmcc5(s,b),t", pa11, FLAG_STRICT}, |
975 | { "cldds", 0x2c001000, 0xfc001200, "ucmcc5(b),t", pa11, FLAG_STRICT}, | |
48f130a8 DA |
976 | { "cldds", 0x2c001000, 0xfc001e00, "ucM5(s,b),t", pa10, 0}, |
977 | { "cldds", 0x2c001000, 0xfc001e00, "ucM5(b),t", pa10, 0}, | |
caa05036 DA |
978 | { "cstws", 0x24001200, 0xfc001200, "ucmcCt,5(s,b)", pa11, FLAG_STRICT}, |
979 | { "cstws", 0x24001200, 0xfc001200, "ucmcCt,5(b)", pa11, FLAG_STRICT}, | |
48f130a8 DA |
980 | { "cstws", 0x24001200, 0xfc001e00, "ucMt,5(s,b)", pa10, 0}, |
981 | { "cstws", 0x24001200, 0xfc001e00, "ucMt,5(b)", pa10, 0}, | |
caa05036 DA |
982 | { "cstds", 0x2c001200, 0xfc001200, "ucmcCt,5(s,b)", pa11, FLAG_STRICT}, |
983 | { "cstds", 0x2c001200, 0xfc001200, "ucmcCt,5(b)", pa11, FLAG_STRICT}, | |
48f130a8 DA |
984 | { "cstds", 0x2c001200, 0xfc001e00, "ucMt,5(s,b)", pa10, 0}, |
985 | { "cstds", 0x2c001200, 0xfc001e00, "ucMt,5(b)", pa10, 0}, | |
1befefea JL |
986 | |
987 | /* More pseudo instructions which must follow the main table. */ | |
988 | { "call", 0xe800f000, 0xfc1ffffd, "n(b)", pa20, FLAG_STRICT}, | |
989 | { "call", 0xe800a000, 0xffe0e000, "nW", pa10, FLAG_STRICT}, | |
990 | { "ret", 0xe840d000, 0xfffffffd, "n", pa20, FLAG_STRICT}, | |
991 | ||
252b5132 RH |
992 | }; |
993 | ||
994 | #define NUMOPCODES ((sizeof pa_opcodes)/(sizeof pa_opcodes[0])) | |
995 | ||
a7fba0e0 | 996 | /* SKV 12/18/92. Added some denotations for various operands. */ |
252b5132 RH |
997 | |
998 | #define PA_IMM11_AT_31 'i' | |
999 | #define PA_IMM14_AT_31 'j' | |
1000 | #define PA_IMM21_AT_31 'k' | |
1001 | #define PA_DISP12 'w' | |
1002 | #define PA_DISP17 'W' | |
1003 | ||
1004 | #define N_HPPA_OPERAND_FORMATS 5 |