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36591ba1 | 1 | /* Nios II opcode list for GAS, the GNU assembler. |
4b95cf5c | 2 | Copyright (C) 2012-2014 Free Software Foundation, Inc. |
36591ba1 SL |
3 | Contributed by Nigel Gray (ngray@altera.com). |
4 | Contributed by Mentor Graphics, Inc. | |
5 | ||
6 | This file is part of GAS, the GNU Assembler, and GDB, the GNU disassembler. | |
7 | ||
8 | GAS/GDB is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 3, or (at your option) | |
11 | any later version. | |
12 | ||
13 | GAS/GDB is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GAS or GDB; see the file COPYING3. If not, write to | |
20 | the Free Software Foundation, 51 Franklin Street - Fifth Floor, | |
21 | Boston, MA 02110-1301, USA. */ | |
22 | ||
23 | #ifndef _NIOS2_H_ | |
24 | #define _NIOS2_H_ | |
25 | ||
26 | #include "bfd.h" | |
27 | ||
28 | /**************************************************************************** | |
29 | * This file contains structures, bit masks and shift counts used | |
30 | * by the GNU toolchain to define the Nios II instruction set and | |
31 | * access various opcode fields. | |
32 | ****************************************************************************/ | |
33 | ||
96ba4233 SL |
34 | /* Instruction encoding formats. */ |
35 | enum iw_format_type { | |
36 | /* R1 formats */ | |
37 | iw_i_type, | |
38 | iw_r_type, | |
39 | iw_j_type, | |
40 | iw_custom_type | |
41 | }; | |
42 | ||
36591ba1 SL |
43 | /* Identify different overflow situations for error messages. */ |
44 | enum overflow_type | |
45 | { | |
46 | call_target_overflow = 0, | |
47 | branch_target_overflow, | |
48 | address_offset_overflow, | |
49 | signed_immed16_overflow, | |
50 | unsigned_immed16_overflow, | |
51 | unsigned_immed5_overflow, | |
52 | custom_opcode_overflow, | |
53 | no_overflow | |
54 | }; | |
55 | ||
56 | /* This structure holds information for a particular instruction. | |
57 | ||
58 | The args field is a string describing the operands. The following | |
59 | letters can appear in the args: | |
531a94fd | 60 | c - a 5-bit control register index |
36591ba1 SL |
61 | d - a 5-bit destination register index |
62 | s - a 5-bit left source register index | |
63 | t - a 5-bit right source register index | |
64 | i - a 16-bit signed immediate | |
65 | u - a 16-bit unsigned immediate | |
531a94fd | 66 | o - a 16-bit signed program counter relative offset |
36591ba1 | 67 | j - a 5-bit unsigned immediate |
531a94fd | 68 | l - a 8-bit custom instruction constant |
36591ba1 SL |
69 | m - a 26-bit unsigned immediate |
70 | Literal ',', '(', and ')' characters may also appear in the args as | |
71 | delimiters. | |
72 | ||
96ba4233 SL |
73 | Note that the args describe the semantics and assembly-language syntax |
74 | of the operands, not their encoding into the instruction word. | |
75 | ||
36591ba1 SL |
76 | The pinfo field is INSN_MACRO for a macro. Otherwise, it is a collection |
77 | of bits describing the instruction, notably any relevant hazard | |
78 | information. | |
79 | ||
80 | When assembling, the match field contains the opcode template, which | |
81 | is modified by the arguments to produce the actual opcode | |
82 | that is emitted. If pinfo is INSN_MACRO, then this is 0. | |
83 | ||
84 | If pinfo is INSN_MACRO, the mask field stores the macro identifier. | |
85 | Otherwise this is a bit mask for the relevant portions of the opcode | |
86 | when disassembling. If the actual opcode anded with the match field | |
87 | equals the opcode field, then we have found the correct instruction. */ | |
88 | ||
89 | struct nios2_opcode | |
90 | { | |
91 | const char *name; /* The name of the instruction. */ | |
92 | const char *args; /* A string describing the arguments for this | |
93 | instruction. */ | |
94 | const char *args_test; /* Like args, but with an extra argument for | |
95 | the expected opcode. */ | |
96 | unsigned long num_args; /* The number of arguments the instruction | |
97 | takes. */ | |
96ba4233 SL |
98 | unsigned size; /* Size in bytes of the instruction. */ |
99 | enum iw_format_type format; /* Instruction format. */ | |
36591ba1 SL |
100 | unsigned long match; /* The basic opcode for the instruction. */ |
101 | unsigned long mask; /* Mask for the opcode field of the | |
102 | instruction. */ | |
103 | unsigned long pinfo; /* Is this a real instruction or instruction | |
104 | macro? */ | |
105 | enum overflow_type overflow_msg; /* Used to generate informative | |
106 | message when fixup overflows. */ | |
107 | }; | |
108 | ||
109 | /* This value is used in the nios2_opcode.pinfo field to indicate that the | |
110 | instruction is a macro or pseudo-op. This requires special treatment by | |
111 | the assembler, and is used by the disassembler to determine whether to | |
112 | check for a nop. */ | |
113 | #define NIOS2_INSN_MACRO 0x80000000 | |
114 | #define NIOS2_INSN_MACRO_MOV 0x80000001 | |
115 | #define NIOS2_INSN_MACRO_MOVI 0x80000002 | |
116 | #define NIOS2_INSN_MACRO_MOVIA 0x80000004 | |
117 | ||
118 | #define NIOS2_INSN_RELAXABLE 0x40000000 | |
119 | #define NIOS2_INSN_UBRANCH 0x00000010 | |
120 | #define NIOS2_INSN_CBRANCH 0x00000020 | |
121 | #define NIOS2_INSN_CALL 0x00000040 | |
122 | ||
123 | #define NIOS2_INSN_ADDI 0x00000080 | |
124 | #define NIOS2_INSN_ANDI 0x00000100 | |
125 | #define NIOS2_INSN_ORI 0x00000200 | |
126 | #define NIOS2_INSN_XORI 0x00000400 | |
127 | ||
96ba4233 SL |
128 | #define NIOS2_INSN_OPTARG 0x00000800 |
129 | ||
130 | /* Register attributes. */ | |
131 | #define REG_NORMAL (1<<0) /* Normal registers. */ | |
132 | #define REG_CONTROL (1<<1) /* Control registers. */ | |
133 | #define REG_COPROCESSOR (1<<2) /* For custom instructions. */ | |
36591ba1 | 134 | |
36591ba1 SL |
135 | struct nios2_reg |
136 | { | |
137 | const char *name; | |
138 | const int index; | |
96ba4233 | 139 | unsigned long regtype; |
36591ba1 SL |
140 | }; |
141 | ||
96ba4233 SL |
142 | /* Pull in the instruction field accessors, opcodes, and masks. */ |
143 | #include "nios2r1.h" | |
36591ba1 | 144 | |
96ba4233 SL |
145 | /* These are the data structures used to hold the instruction information. */ |
146 | extern const struct nios2_opcode nios2_r1_opcodes[]; | |
147 | extern const int nios2_num_r1_opcodes; | |
36591ba1 | 148 | extern struct nios2_opcode *nios2_opcodes; |
96ba4233 | 149 | extern int nios2_num_opcodes; |
36591ba1 SL |
150 | |
151 | /* These are the data structures used to hold the register information. */ | |
152 | extern const struct nios2_reg nios2_builtin_regs[]; | |
153 | extern struct nios2_reg *nios2_regs; | |
154 | extern const int nios2_num_builtin_regs; | |
155 | extern int nios2_num_regs; | |
156 | ||
36591ba1 SL |
157 | /* This is made extern so that the assembler can use it to find out |
158 | what instruction caused an error. */ | |
159 | extern const struct nios2_opcode *nios2_find_opcode_hash (unsigned long); | |
160 | ||
161 | #endif /* _NIOS2_H */ |