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3b16e843 | 1 | /* Table of opcodes for the OpenRISC 1000 ISA. |
e4e42b45 | 2 | Copyright 2002, 2003, 2010 Free Software Foundation, Inc. |
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3 | Contributed by Damjan Lampret (lampret@opencores.org). |
4 | ||
5 | This file is part of or1k_gen_isa, or1ksim, GDB and GAS. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
e4e42b45 | 9 | the Free Software Foundation; either version 3 of the License, or |
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10 | (at your option) any later version. |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
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19 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, |
20 | MA 02110-1301, USA. */ | |
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21 | |
22 | /* We treat all letters the same in encode/decode routines so | |
23 | we need to assign some characteristics to them like signess etc. */ | |
24 | ||
25 | #ifndef OR32_H_ISA | |
26 | #define OR32_H_ISA | |
27 | ||
28 | #define NUM_UNSIGNED (0) | |
29 | #define NUM_SIGNED (1) | |
30 | ||
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31 | #define MAX_GPRS 32 |
32 | #define PAGE_SIZE 4096 | |
33 | #undef __HALF_WORD_INSN__ | |
34 | ||
35 | #define OPERAND_DELIM (',') | |
36 | ||
37 | #define OR32_IF_DELAY (1) | |
38 | #define OR32_W_FLAG (2) | |
39 | #define OR32_R_FLAG (4) | |
40 | ||
41 | struct or32_letter | |
42 | { | |
43 | char letter; | |
44 | int sign; | |
45 | /* int reloc; relocation per letter ?? */ | |
46 | }; | |
47 | ||
48 | /* Main instruction specification array. */ | |
49 | struct or32_opcode | |
50 | { | |
51 | /* Name of the instruction. */ | |
52 | char *name; | |
53 | ||
54 | /* A string of characters which describe the operands. | |
55 | Valid characters are: | |
56 | ,() Itself. Characters appears in the assembly code. | |
57 | rA Register operand. | |
58 | rB Register operand. | |
59 | rD Register operand. | |
60 | I An immediate operand, range -32768 to 32767. | |
61 | J An immediate operand, range . (unused) | |
62 | K An immediate operand, range 0 to 65535. | |
63 | L An immediate operand, range 0 to 63. | |
64 | M An immediate operand, range . (unused) | |
65 | N An immediate operand, range -33554432 to 33554431. | |
66 | O An immediate operand, range . (unused). */ | |
67 | char *args; | |
68 | ||
69 | /* Opcode and operand encoding. */ | |
70 | char *encoding; | |
8cf3f354 | 71 | void (*exec) (void); |
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72 | unsigned int flags; |
73 | }; | |
74 | ||
75 | #define OPTYPE_LAST (0x80000000) | |
76 | #define OPTYPE_OP (0x40000000) | |
77 | #define OPTYPE_REG (0x20000000) | |
78 | #define OPTYPE_SIG (0x10000000) | |
79 | #define OPTYPE_DIS (0x08000000) | |
80 | #define OPTYPE_DST (0x04000000) | |
81 | #define OPTYPE_SBIT (0x00001F00) | |
82 | #define OPTYPE_SHR (0x0000001F) | |
83 | #define OPTYPE_SBIT_SHR (8) | |
84 | ||
85 | /* MM: Data how to decode operands. */ | |
86 | extern struct insn_op_struct | |
87 | { | |
88 | unsigned long type; | |
89 | unsigned long data; | |
90 | } **op_start; | |
91 | ||
92 | #ifdef HAS_EXECUTION | |
8cf3f354 AM |
93 | extern void l_invalid (void); |
94 | extern void l_sfne (void); | |
95 | extern void l_bf (void); | |
96 | extern void l_add (void); | |
97 | extern void l_sw (void); | |
98 | extern void l_sb (void); | |
99 | extern void l_sh (void); | |
100 | extern void l_lwz (void); | |
101 | extern void l_lbs (void); | |
102 | extern void l_lbz (void); | |
103 | extern void l_lhs (void); | |
104 | extern void l_lhz (void); | |
105 | extern void l_movhi (void); | |
106 | extern void l_and (void); | |
107 | extern void l_or (void); | |
108 | extern void l_xor (void); | |
109 | extern void l_sub (void); | |
110 | extern void l_mul (void); | |
111 | extern void l_div (void); | |
112 | extern void l_divu (void); | |
113 | extern void l_sll (void); | |
114 | extern void l_sra (void); | |
115 | extern void l_srl (void); | |
116 | extern void l_j (void); | |
117 | extern void l_jal (void); | |
118 | extern void l_jalr (void); | |
119 | extern void l_jr (void); | |
120 | extern void l_rfe (void); | |
121 | extern void l_nop (void); | |
122 | extern void l_bnf (void); | |
123 | extern void l_sfeq (void); | |
124 | extern void l_sfgts (void); | |
125 | extern void l_sfges (void); | |
126 | extern void l_sflts (void); | |
127 | extern void l_sfles (void); | |
128 | extern void l_sfgtu (void); | |
129 | extern void l_sfgeu (void); | |
130 | extern void l_sfltu (void); | |
131 | extern void l_sfleu (void); | |
132 | extern void l_mtspr (void); | |
133 | extern void l_mfspr (void); | |
134 | extern void l_sys (void); | |
135 | extern void l_trap (void); /* CZ 21/06/01. */ | |
136 | extern void l_macrc (void); | |
137 | extern void l_mac (void); | |
138 | extern void l_msb (void); | |
139 | extern void l_invalid (void); | |
140 | extern void l_cust1 (void); | |
141 | extern void l_cust2 (void); | |
142 | extern void l_cust3 (void); | |
143 | extern void l_cust4 (void); | |
3b16e843 | 144 | #endif |
8cf3f354 | 145 | extern void l_none (void); |
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146 | |
147 | extern const struct or32_letter or32_letters[]; | |
148 | ||
149 | extern const struct or32_opcode or32_opcodes[]; | |
150 | ||
151 | extern const unsigned int or32_num_opcodes; | |
152 | ||
153 | /* Calculates instruction length in bytes. Always 4 for OR32. */ | |
8cf3f354 | 154 | extern int insn_len (int); |
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155 | |
156 | /* Is individual insn's operand signed or unsigned? */ | |
8cf3f354 | 157 | extern int letter_signed (char); |
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158 | |
159 | /* Number of letters in the individual lettered operand. */ | |
8cf3f354 | 160 | extern int letter_range (char); |
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161 | |
162 | /* MM: Returns index of given instruction name. */ | |
8cf3f354 | 163 | extern int insn_index (char *); |
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164 | |
165 | /* MM: Returns instruction name from index. */ | |
8cf3f354 | 166 | extern const char *insn_name (int); |
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167 | |
168 | /* MM: Constructs new FSM, based on or32_opcodes. */ | |
8cf3f354 | 169 | extern void build_automata (void); |
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170 | |
171 | /* MM: Destructs FSM. */ | |
8cf3f354 | 172 | extern void destruct_automata (void); |
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173 | |
174 | /* MM: Decodes instruction using FSM. Call build_automata first. */ | |
8cf3f354 | 175 | extern int insn_decode (unsigned int); |
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176 | |
177 | /* Disassemble one instruction from insn to disassemble. | |
178 | Return the size of the instruction. */ | |
8cf3f354 | 179 | int disassemble_insn (unsigned long); |
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180 | |
181 | #endif |