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e135f41b | 1 | /* PDP-11 opcde list. |
b90efa5b | 2 | Copyright (C) 2001-2015 Free Software Foundation, Inc. |
e135f41b | 3 | |
e4e42b45 | 4 | This file is part of GDB and GAS. |
e135f41b | 5 | |
e4e42b45 NC |
6 | GDB and GAS are free software; you can redistribute it and/or modify |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 3, or (at your option) | |
9 | any later version. | |
e135f41b | 10 | |
e4e42b45 NC |
11 | GDB and GAS are distributed in the hope that it will be useful, |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
e135f41b | 15 | |
e4e42b45 NC |
16 | You should have received a copy of the GNU General Public License |
17 | along with GDB or GAS; see the file COPYING3. If not, write to | |
18 | the Free Software Foundation, 51 Franklin Street - Fifth Floor, | |
19 | Boston, MA 02110-1301, USA. */ | |
e135f41b | 20 | |
e4e42b45 | 21 | /* PDP-11 opcode types. */ |
e135f41b NC |
22 | |
23 | #define PDP11_OPCODE_NO_OPS 0 | |
24 | #define PDP11_OPCODE_REG 1 /* register */ | |
25 | #define PDP11_OPCODE_OP 2 /* generic operand */ | |
26 | #define PDP11_OPCODE_REG_OP 3 /* register and generic operand */ | |
27 | #define PDP11_OPCODE_REG_OP_REV 4 /* register and generic operand, | |
28 | reversed syntax */ | |
e4b29ec6 | 29 | #define PDP11_OPCODE_AC_FOP 5 /* fpu accumulator and generic float |
e135f41b NC |
30 | operand */ |
31 | #define PDP11_OPCODE_OP_OP 6 /* two generic operands */ | |
32 | #define PDP11_OPCODE_DISPL 7 /* pc-relative displacement */ | |
33 | #define PDP11_OPCODE_REG_DISPL 8 /* redister and pc-relative | |
34 | displacement */ | |
35 | #define PDP11_OPCODE_IMM8 9 /* 8-bit immediate */ | |
36 | #define PDP11_OPCODE_IMM6 10 /* 6-bit immediate */ | |
37 | #define PDP11_OPCODE_IMM3 11 /* 3-bit immediate */ | |
38 | #define PDP11_OPCODE_ILLEGAL 12 /* illegal instruction */ | |
e4b29ec6 AM |
39 | #define PDP11_OPCODE_FOP_AC 13 /* generic float argument, then fpu |
40 | accumulator */ | |
41 | #define PDP11_OPCODE_FOP 14 /* generic float operand */ | |
42 | #define PDP11_OPCODE_AC_OP 15 /* fpu accumulator and generic int | |
43 | operand */ | |
44 | #define PDP11_OPCODE_OP_AC 16 /* generic int argument, then fpu | |
45 | accumulator */ | |
e135f41b NC |
46 | |
47 | /* | |
48 | * PDP-11 instruction set extensions. | |
49 | * | |
50 | * Please keep the numbers low, as they are used as indices into | |
51 | * an array. | |
52 | */ | |
53 | ||
54 | #define PDP11_NONE 0 /* not in instruction set */ | |
55 | #define PDP11_BASIC 1 /* basic instruction set (11/20 etc) */ | |
56 | #define PDP11_CSM 2 /* commercial instruction set */ | |
57 | #define PDP11_CIS 3 /* commercial instruction set */ | |
58 | #define PDP11_EIS 4 /* extended instruction set (11/45 etc) */ | |
59 | #define PDP11_FIS 5 /* KEV11 floating-point instructions */ | |
60 | #define PDP11_FPP 6 /* FP-11 floating-point instructions */ | |
61 | #define PDP11_LEIS 7 /* limited extended instruction set | |
62 | (11/40 etc) */ | |
63 | #define PDP11_MFPT 8 /* move from processor type */ | |
64 | #define PDP11_MPROC 9 /* multiprocessor instructions: tstset, | |
65 | wrtlck */ | |
66 | #define PDP11_MXPS 10 /* move from/to processor status */ | |
67 | #define PDP11_SPL 11 /* set priority level */ | |
68 | #define PDP11_UCODE 12 /* microcode instructions: ldub, med, xfc */ | |
69 | #define PDP11_EXT_NUM 13 /* total number of extension types */ | |
70 | ||
71 | struct pdp11_opcode | |
72 | { | |
73 | const char *name; | |
74 | int opcode; | |
75 | int mask; | |
76 | int type; | |
77 | int extension; | |
78 | }; | |
79 | ||
80 | extern const struct pdp11_opcode pdp11_opcodes[]; | |
81 | extern const struct pdp11_opcode pdp11_aliases[]; | |
82 | extern const int pdp11_num_opcodes, pdp11_num_aliases; | |
83 | ||
84 | /* end of pdp11.h */ |