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c7927a3c | 1 | /* Opcode decoder for the Renesas RX |
b3adc24a | 2 | Copyright (C) 2008-2020 Free Software Foundation, Inc. |
c7927a3c NC |
3 | Written by DJ Delorie <dj@redhat.com> |
4 | ||
5 | This file is part of GDB, the GNU Debugger and GAS, the GNU Assembler. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
e4e42b45 | 9 | the Free Software Foundation; either version 3 of the License, or |
c7927a3c NC |
10 | (at your option) any later version. |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA | |
20 | 02110-1301, USA. */ | |
21 | ||
22 | /* The RX decoder in libopcodes is used by the simulator, gdb's | |
23 | analyzer, and the disassembler. Given an opcode data source, | |
24 | it decodes the next opcode into the following structures. */ | |
25 | ||
f63c1776 PA |
26 | #ifdef __cplusplus |
27 | extern "C" { | |
28 | #endif | |
29 | ||
c7927a3c NC |
30 | typedef enum |
31 | { | |
32 | RX_AnySize = 0, | |
33 | RX_Byte, /* undefined extension */ | |
34 | RX_UByte, | |
35 | RX_SByte, | |
36 | RX_Word, /* undefined extension */ | |
37 | RX_UWord, | |
38 | RX_SWord, | |
39 | RX_3Byte, | |
40 | RX_Long, | |
59581069 | 41 | RX_Double, |
f04265ec NC |
42 | RX_Bad_Size, |
43 | RX_MAX_SIZE | |
c7927a3c NC |
44 | } RX_Size; |
45 | ||
46 | typedef enum | |
47 | { | |
48 | RX_Operand_None, | |
49 | RX_Operand_Immediate, /* #addend */ | |
50 | RX_Operand_Register, /* Rn */ | |
51 | RX_Operand_Indirect, /* [Rn + addend] */ | |
e292aa7a | 52 | RX_Operand_Zero_Indirect,/* [Rn] */ |
c7927a3c NC |
53 | RX_Operand_Postinc, /* [Rn+] */ |
54 | RX_Operand_Predec, /* [-Rn] */ | |
55 | RX_Operand_Condition, /* eq, gtu, etc */ | |
56 | RX_Operand_Flag, /* [UIOSZC] */ | |
f9c7014e | 57 | RX_Operand_TwoReg, /* [Rn + scale*R2] */ |
59581069 YS |
58 | RX_Operand_DoubleReg, /* DRn */ |
59 | RX_Operand_DoubleRegH,/* DRHn */ | |
60 | RX_Operand_DoubleRegL,/* DRLn */ | |
61 | RX_Operand_DoubleCReg,/* DCRxx */ | |
62 | RX_Operand_DoubleCond,/* UN/EQ/LE/LT */ | |
c7927a3c NC |
63 | } RX_Operand_Type; |
64 | ||
65 | typedef enum | |
66 | { | |
67 | RXO_unknown, | |
68 | RXO_mov, /* d = s (signed) */ | |
69 | RXO_movbi, /* d = [s,s2] (signed) */ | |
70 | RXO_movbir, /* [s,s2] = d (signed) */ | |
71 | RXO_pushm, /* s..s2 */ | |
72 | RXO_popm, /* s..s2 */ | |
c7927a3c NC |
73 | RXO_xchg, /* s <-> d */ |
74 | RXO_stcc, /* d = s if cond(s2) */ | |
75 | RXO_rtsd, /* rtsd, 1=imm, 2-0 = reg if reg type */ | |
76 | ||
77 | /* These are all either d OP= s or, if s2 is set, d = s OP s2. Note | |
78 | that d may be "None". */ | |
79 | RXO_and, | |
80 | RXO_or, | |
81 | RXO_xor, | |
82 | RXO_add, | |
83 | RXO_sub, | |
84 | RXO_mul, | |
85 | RXO_div, | |
86 | RXO_divu, | |
87 | RXO_shll, | |
88 | RXO_shar, | |
89 | RXO_shlr, | |
90 | ||
91 | RXO_adc, /* d = d + s + carry */ | |
92 | RXO_sbb, /* d = d - s - ~carry */ | |
93 | RXO_abs, /* d = |s| */ | |
94 | RXO_max, /* d = max(d,s) */ | |
95 | RXO_min, /* d = min(d,s) */ | |
96 | RXO_emul, /* d:64 = d:32 * s */ | |
97 | RXO_emulu, /* d:64 = d:32 * s (unsigned) */ | |
c7927a3c NC |
98 | |
99 | RXO_rolc, /* d <<= 1 through carry */ | |
100 | RXO_rorc, /* d >>= 1 through carry*/ | |
101 | RXO_rotl, /* d <<= #s without carry */ | |
102 | RXO_rotr, /* d >>= #s without carry*/ | |
103 | RXO_revw, /* d = revw(s) */ | |
104 | RXO_revl, /* d = revl(s) */ | |
105 | RXO_branch, /* pc = d if cond(s) */ | |
106 | RXO_branchrel,/* pc += d if cond(s) */ | |
107 | RXO_jsr, /* pc = d */ | |
108 | RXO_jsrrel, /* pc += d */ | |
109 | RXO_rts, | |
110 | RXO_nop, | |
93378652 DD |
111 | RXO_nop2, |
112 | RXO_nop3, | |
854eb72b NC |
113 | RXO_nop4, |
114 | RXO_nop5, | |
115 | RXO_nop6, | |
116 | RXO_nop7, | |
c7927a3c NC |
117 | |
118 | RXO_scmpu, | |
119 | RXO_smovu, | |
120 | RXO_smovb, | |
121 | RXO_suntil, | |
122 | RXO_swhile, | |
123 | RXO_smovf, | |
124 | RXO_sstr, | |
125 | ||
126 | RXO_rmpa, | |
127 | RXO_mulhi, | |
128 | RXO_mullo, | |
129 | RXO_machi, | |
130 | RXO_maclo, | |
131 | RXO_mvtachi, | |
132 | RXO_mvtaclo, | |
133 | RXO_mvfachi, | |
134 | RXO_mvfacmi, | |
135 | RXO_mvfaclo, | |
136 | RXO_racw, | |
137 | ||
138 | RXO_sat, /* sat(d) */ | |
139 | RXO_satr, | |
140 | ||
141 | RXO_fadd, /* d op= s */ | |
142 | RXO_fcmp, | |
143 | RXO_fsub, | |
144 | RXO_ftoi, | |
145 | RXO_fmul, | |
146 | RXO_fdiv, | |
147 | RXO_round, | |
148 | RXO_itof, | |
149 | ||
150 | RXO_bset, /* d |= (1<<s) */ | |
151 | RXO_bclr, /* d &= ~(1<<s) */ | |
152 | RXO_btst, /* s & (1<<s2) */ | |
153 | RXO_bnot, /* d ^= (1<<s) */ | |
154 | RXO_bmcc, /* d<s> = cond(s2) */ | |
155 | ||
156 | RXO_clrpsw, /* flag index in d */ | |
157 | RXO_setpsw, /* flag index in d */ | |
0d734b5d | 158 | RXO_mvtipl, /* new IPL in s */ |
c7927a3c NC |
159 | |
160 | RXO_rtfi, | |
161 | RXO_rte, | |
162 | RXO_rtd, /* undocumented */ | |
163 | RXO_brk, | |
164 | RXO_dbt, /* undocumented */ | |
165 | RXO_int, /* vector id in s */ | |
166 | RXO_stop, | |
167 | RXO_wait, | |
168 | ||
169 | RXO_sccnd, /* d = cond(s) ? 1 : 0 */ | |
a117b0a5 YS |
170 | |
171 | RXO_fsqrt, | |
172 | RXO_ftou, | |
173 | RXO_utof, | |
174 | RXO_movco, | |
175 | RXO_movli, | |
176 | RXO_emaca, | |
177 | RXO_emsba, | |
178 | RXO_emula, | |
179 | RXO_maclh, | |
180 | RXO_msbhi, | |
181 | RXO_msblh, | |
182 | RXO_msblo, | |
183 | RXO_mullh, | |
184 | RXO_mvfacgu, | |
185 | RXO_mvtacgu, | |
186 | RXO_racl, | |
187 | RXO_rdacl, | |
188 | RXO_rdacw, | |
59581069 YS |
189 | |
190 | RXO_bfmov, | |
191 | RXO_bfmovz, | |
192 | RXO_rstr, | |
193 | RXO_save, | |
194 | RXO_dmov, | |
195 | RXO_dpopm, | |
196 | RXO_dpushm, | |
197 | RXO_mvfdc, | |
198 | RXO_mvfdr, | |
199 | RXO_mvtdc, | |
200 | RXO_dabs, | |
201 | RXO_dadd, | |
202 | RXO_dcmp, | |
203 | RXO_ddiv, | |
204 | RXO_dmul, | |
205 | RXO_dneg, | |
206 | RXO_dround, | |
207 | RXO_dsqrt, | |
208 | RXO_dsub, | |
209 | RXO_dtoi, | |
210 | RXO_dtof, | |
211 | RXO_dtou, | |
212 | RXO_ftod, | |
213 | RXO_itod, | |
214 | RXO_utod | |
c7927a3c NC |
215 | } RX_Opcode_ID; |
216 | ||
217 | /* Condition bitpatterns, as registers. */ | |
218 | #define RXC_eq 0 | |
219 | #define RXC_z 0 | |
220 | #define RXC_ne 1 | |
221 | #define RXC_nz 1 | |
222 | #define RXC_c 2 | |
223 | #define RXC_nc 3 | |
224 | #define RXC_gtu 4 | |
225 | #define RXC_leu 5 | |
226 | #define RXC_pz 6 | |
227 | #define RXC_n 7 | |
228 | #define RXC_ge 8 | |
229 | #define RXC_lt 9 | |
230 | #define RXC_gt 10 | |
231 | #define RXC_le 11 | |
232 | #define RXC_o 12 | |
233 | #define RXC_no 13 | |
234 | #define RXC_always 14 | |
235 | #define RXC_never 15 | |
236 | ||
237 | typedef struct | |
238 | { | |
239 | RX_Operand_Type type; | |
240 | int reg; | |
241 | int addend; | |
242 | RX_Size size; | |
243 | } RX_Opcode_Operand; | |
244 | ||
245 | typedef struct | |
246 | { | |
247 | RX_Opcode_ID id; | |
248 | int n_bytes; | |
249 | int prefix; | |
250 | char * syntax; | |
251 | RX_Size size; | |
252 | /* By convention, these are destination, source1, source2. */ | |
253 | RX_Opcode_Operand op[3]; | |
254 | ||
255 | /* The logic here is: | |
256 | newflags = (oldflags & ~(int)flags_0) | flags_1 | (op_flags & flags_s) | |
257 | Only the O, S, Z, and C flags are affected. */ | |
258 | char flags_0; /* This also clears out flags-to-be-set. */ | |
259 | char flags_1; | |
260 | char flags_s; | |
261 | } RX_Opcode_Decoded; | |
262 | ||
263 | /* Within the syntax, %c-style format specifiers are as follows: | |
264 | ||
265 | %% = '%' character | |
266 | %0 = operand[0] (destination) | |
267 | %1 = operand[1] (source) | |
268 | %2 = operand[2] (2nd source) | |
269 | %s = operation size (b/w/l) | |
270 | %SN = operand size [N] (N=0,1,2) | |
271 | %aN = op[N] as an address (N=0,1,2) | |
272 | ||
273 | Register numbers 0..15 are general registers. 16..31 are control | |
274 | registers. 32..47 are condition codes. */ | |
275 | ||
276 | int rx_decode_opcode (unsigned long, RX_Opcode_Decoded *, int (*)(void *), void *); | |
f63c1776 PA |
277 | |
278 | #ifdef __cplusplus | |
279 | } | |
280 | #endif |