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c7927a3c | 1 | /* Opcode decoder for the Renesas RX |
219d1afa | 2 | Copyright (C) 2008-2018 Free Software Foundation, Inc. |
c7927a3c NC |
3 | Written by DJ Delorie <dj@redhat.com> |
4 | ||
5 | This file is part of GDB, the GNU Debugger and GAS, the GNU Assembler. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
e4e42b45 | 9 | the Free Software Foundation; either version 3 of the License, or |
c7927a3c NC |
10 | (at your option) any later version. |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA | |
20 | 02110-1301, USA. */ | |
21 | ||
22 | /* The RX decoder in libopcodes is used by the simulator, gdb's | |
23 | analyzer, and the disassembler. Given an opcode data source, | |
24 | it decodes the next opcode into the following structures. */ | |
25 | ||
f63c1776 PA |
26 | #ifdef __cplusplus |
27 | extern "C" { | |
28 | #endif | |
29 | ||
c7927a3c NC |
30 | typedef enum |
31 | { | |
32 | RX_AnySize = 0, | |
33 | RX_Byte, /* undefined extension */ | |
34 | RX_UByte, | |
35 | RX_SByte, | |
36 | RX_Word, /* undefined extension */ | |
37 | RX_UWord, | |
38 | RX_SWord, | |
39 | RX_3Byte, | |
40 | RX_Long, | |
f04265ec NC |
41 | RX_Bad_Size, |
42 | RX_MAX_SIZE | |
c7927a3c NC |
43 | } RX_Size; |
44 | ||
45 | typedef enum | |
46 | { | |
47 | RX_Operand_None, | |
48 | RX_Operand_Immediate, /* #addend */ | |
49 | RX_Operand_Register, /* Rn */ | |
50 | RX_Operand_Indirect, /* [Rn + addend] */ | |
e292aa7a | 51 | RX_Operand_Zero_Indirect,/* [Rn] */ |
c7927a3c NC |
52 | RX_Operand_Postinc, /* [Rn+] */ |
53 | RX_Operand_Predec, /* [-Rn] */ | |
54 | RX_Operand_Condition, /* eq, gtu, etc */ | |
55 | RX_Operand_Flag, /* [UIOSZC] */ | |
f9c7014e | 56 | RX_Operand_TwoReg, /* [Rn + scale*R2] */ |
c7927a3c NC |
57 | } RX_Operand_Type; |
58 | ||
59 | typedef enum | |
60 | { | |
61 | RXO_unknown, | |
62 | RXO_mov, /* d = s (signed) */ | |
63 | RXO_movbi, /* d = [s,s2] (signed) */ | |
64 | RXO_movbir, /* [s,s2] = d (signed) */ | |
65 | RXO_pushm, /* s..s2 */ | |
66 | RXO_popm, /* s..s2 */ | |
c7927a3c NC |
67 | RXO_xchg, /* s <-> d */ |
68 | RXO_stcc, /* d = s if cond(s2) */ | |
69 | RXO_rtsd, /* rtsd, 1=imm, 2-0 = reg if reg type */ | |
70 | ||
71 | /* These are all either d OP= s or, if s2 is set, d = s OP s2. Note | |
72 | that d may be "None". */ | |
73 | RXO_and, | |
74 | RXO_or, | |
75 | RXO_xor, | |
76 | RXO_add, | |
77 | RXO_sub, | |
78 | RXO_mul, | |
79 | RXO_div, | |
80 | RXO_divu, | |
81 | RXO_shll, | |
82 | RXO_shar, | |
83 | RXO_shlr, | |
84 | ||
85 | RXO_adc, /* d = d + s + carry */ | |
86 | RXO_sbb, /* d = d - s - ~carry */ | |
87 | RXO_abs, /* d = |s| */ | |
88 | RXO_max, /* d = max(d,s) */ | |
89 | RXO_min, /* d = min(d,s) */ | |
90 | RXO_emul, /* d:64 = d:32 * s */ | |
91 | RXO_emulu, /* d:64 = d:32 * s (unsigned) */ | |
c7927a3c NC |
92 | |
93 | RXO_rolc, /* d <<= 1 through carry */ | |
94 | RXO_rorc, /* d >>= 1 through carry*/ | |
95 | RXO_rotl, /* d <<= #s without carry */ | |
96 | RXO_rotr, /* d >>= #s without carry*/ | |
97 | RXO_revw, /* d = revw(s) */ | |
98 | RXO_revl, /* d = revl(s) */ | |
99 | RXO_branch, /* pc = d if cond(s) */ | |
100 | RXO_branchrel,/* pc += d if cond(s) */ | |
101 | RXO_jsr, /* pc = d */ | |
102 | RXO_jsrrel, /* pc += d */ | |
103 | RXO_rts, | |
104 | RXO_nop, | |
93378652 DD |
105 | RXO_nop2, |
106 | RXO_nop3, | |
854eb72b NC |
107 | RXO_nop4, |
108 | RXO_nop5, | |
109 | RXO_nop6, | |
110 | RXO_nop7, | |
c7927a3c NC |
111 | |
112 | RXO_scmpu, | |
113 | RXO_smovu, | |
114 | RXO_smovb, | |
115 | RXO_suntil, | |
116 | RXO_swhile, | |
117 | RXO_smovf, | |
118 | RXO_sstr, | |
119 | ||
120 | RXO_rmpa, | |
121 | RXO_mulhi, | |
122 | RXO_mullo, | |
123 | RXO_machi, | |
124 | RXO_maclo, | |
125 | RXO_mvtachi, | |
126 | RXO_mvtaclo, | |
127 | RXO_mvfachi, | |
128 | RXO_mvfacmi, | |
129 | RXO_mvfaclo, | |
130 | RXO_racw, | |
131 | ||
132 | RXO_sat, /* sat(d) */ | |
133 | RXO_satr, | |
134 | ||
135 | RXO_fadd, /* d op= s */ | |
136 | RXO_fcmp, | |
137 | RXO_fsub, | |
138 | RXO_ftoi, | |
139 | RXO_fmul, | |
140 | RXO_fdiv, | |
141 | RXO_round, | |
142 | RXO_itof, | |
143 | ||
144 | RXO_bset, /* d |= (1<<s) */ | |
145 | RXO_bclr, /* d &= ~(1<<s) */ | |
146 | RXO_btst, /* s & (1<<s2) */ | |
147 | RXO_bnot, /* d ^= (1<<s) */ | |
148 | RXO_bmcc, /* d<s> = cond(s2) */ | |
149 | ||
150 | RXO_clrpsw, /* flag index in d */ | |
151 | RXO_setpsw, /* flag index in d */ | |
0d734b5d | 152 | RXO_mvtipl, /* new IPL in s */ |
c7927a3c NC |
153 | |
154 | RXO_rtfi, | |
155 | RXO_rte, | |
156 | RXO_rtd, /* undocumented */ | |
157 | RXO_brk, | |
158 | RXO_dbt, /* undocumented */ | |
159 | RXO_int, /* vector id in s */ | |
160 | RXO_stop, | |
161 | RXO_wait, | |
162 | ||
163 | RXO_sccnd, /* d = cond(s) ? 1 : 0 */ | |
a117b0a5 YS |
164 | |
165 | RXO_fsqrt, | |
166 | RXO_ftou, | |
167 | RXO_utof, | |
168 | RXO_movco, | |
169 | RXO_movli, | |
170 | RXO_emaca, | |
171 | RXO_emsba, | |
172 | RXO_emula, | |
173 | RXO_maclh, | |
174 | RXO_msbhi, | |
175 | RXO_msblh, | |
176 | RXO_msblo, | |
177 | RXO_mullh, | |
178 | RXO_mvfacgu, | |
179 | RXO_mvtacgu, | |
180 | RXO_racl, | |
181 | RXO_rdacl, | |
182 | RXO_rdacw, | |
c7927a3c NC |
183 | } RX_Opcode_ID; |
184 | ||
185 | /* Condition bitpatterns, as registers. */ | |
186 | #define RXC_eq 0 | |
187 | #define RXC_z 0 | |
188 | #define RXC_ne 1 | |
189 | #define RXC_nz 1 | |
190 | #define RXC_c 2 | |
191 | #define RXC_nc 3 | |
192 | #define RXC_gtu 4 | |
193 | #define RXC_leu 5 | |
194 | #define RXC_pz 6 | |
195 | #define RXC_n 7 | |
196 | #define RXC_ge 8 | |
197 | #define RXC_lt 9 | |
198 | #define RXC_gt 10 | |
199 | #define RXC_le 11 | |
200 | #define RXC_o 12 | |
201 | #define RXC_no 13 | |
202 | #define RXC_always 14 | |
203 | #define RXC_never 15 | |
204 | ||
205 | typedef struct | |
206 | { | |
207 | RX_Operand_Type type; | |
208 | int reg; | |
209 | int addend; | |
210 | RX_Size size; | |
211 | } RX_Opcode_Operand; | |
212 | ||
213 | typedef struct | |
214 | { | |
215 | RX_Opcode_ID id; | |
216 | int n_bytes; | |
217 | int prefix; | |
218 | char * syntax; | |
219 | RX_Size size; | |
220 | /* By convention, these are destination, source1, source2. */ | |
221 | RX_Opcode_Operand op[3]; | |
222 | ||
223 | /* The logic here is: | |
224 | newflags = (oldflags & ~(int)flags_0) | flags_1 | (op_flags & flags_s) | |
225 | Only the O, S, Z, and C flags are affected. */ | |
226 | char flags_0; /* This also clears out flags-to-be-set. */ | |
227 | char flags_1; | |
228 | char flags_s; | |
229 | } RX_Opcode_Decoded; | |
230 | ||
231 | /* Within the syntax, %c-style format specifiers are as follows: | |
232 | ||
233 | %% = '%' character | |
234 | %0 = operand[0] (destination) | |
235 | %1 = operand[1] (source) | |
236 | %2 = operand[2] (2nd source) | |
237 | %s = operation size (b/w/l) | |
238 | %SN = operand size [N] (N=0,1,2) | |
239 | %aN = op[N] as an address (N=0,1,2) | |
240 | ||
241 | Register numbers 0..15 are general registers. 16..31 are control | |
242 | registers. 32..47 are condition codes. */ | |
243 | ||
244 | int rx_decode_opcode (unsigned long, RX_Opcode_Decoded *, int (*)(void *), void *); | |
f63c1776 PA |
245 | |
246 | #ifdef __cplusplus | |
247 | } | |
248 | #endif |