mi_make_breakpoint: add "evaluated-by" option
[deliverable/binutils-gdb.git] / include / opcode / s390.h
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a85d7ed0 1/* s390.h -- Header file for S390 opcode table
b90efa5b 2 Copyright (C) 2000-2015 Free Software Foundation, Inc.
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3 Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com).
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
e4e42b45 9 the Free Software Foundation; either version 3 of the License, or
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10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
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19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
20 02110-1301, USA. */
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21
22#ifndef S390_H
23#define S390_H
24
25/* List of instruction sets variations. */
26
1bd490c4 27enum s390_opcode_mode_val
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28 {
29 S390_OPCODE_ESA = 0,
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30 S390_OPCODE_ZARCH
31 };
32
33enum s390_opcode_cpu_val
34 {
35 S390_OPCODE_G5 = 0,
36 S390_OPCODE_G6,
c72a8f69 37 S390_OPCODE_Z900,
8c929562 38 S390_OPCODE_Z990,
b5639b37 39 S390_OPCODE_Z9_109,
5746fb46 40 S390_OPCODE_Z9_EC,
d9aee5d7 41 S390_OPCODE_Z10,
1e8766d7 42 S390_OPCODE_Z196,
cfc72779 43 S390_OPCODE_ZEC12,
1e2e8c52 44 S390_OPCODE_Z13,
1e8766d7 45 S390_OPCODE_MAXCPU
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46 };
47
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48/* Instruction specific flags. */
49#define S390_INSTR_FLAG_OPTPARM 0x1
50
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51/* The opcode table is an array of struct s390_opcode. */
52
53struct s390_opcode
54 {
55 /* The opcode name. */
56 const char * name;
57
58 /* The opcode itself. Those bits which will be filled in with
59 operands are zeroes. */
60 unsigned char opcode[6];
61
62 /* The opcode mask. This is used by the disassembler. This is a
63 mask containing ones indicating those bits which must match the
64 opcode field, and zeroes indicating those bits which need not
65 match (and are presumably filled in by operands). */
66 unsigned char mask[6];
67
68 /* The opcode length in bytes. */
69 int oplen;
70
71 /* An array of operand codes. Each code is an index into the
72 operand table. They appear in the order which the operands must
73 appear in assembly code, and are terminated by a zero. */
74 unsigned char operands[6];
75
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76 /* Bitmask of execution modes this opcode is available for. */
77 unsigned int modes;
78
79 /* First cpu this opcode is available for. */
80 enum s390_opcode_cpu_val min_cpu;
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81
82 /* Instruction specific flags. */
83 unsigned int flags;
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84 };
85
86/* The table itself is sorted by major opcode number, and is otherwise
87 in the order in which the disassembler should consider
88 instructions. */
89extern const struct s390_opcode s390_opcodes[];
90extern const int s390_num_opcodes;
91
92/* A opcode format table for the .insn pseudo mnemonic. */
93extern const struct s390_opcode s390_opformats[];
94extern const int s390_num_opformats;
95
1e2e8c52 96/* Values defined for the flags field of a struct s390_opcode. */
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97
98/* The operands table is an array of struct s390_operand. */
99
100struct s390_operand
101 {
102 /* The number of bits in the operand. */
103 int bits;
104
105 /* How far the operand is left shifted in the instruction. */
106 int shift;
107
108 /* One bit syntax flags. */
109 unsigned long flags;
110 };
111
112/* Elements in the table are retrieved by indexing with values from
1e2e8c52 113 the operands field of the s390_opcodes table. */
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114
115extern const struct s390_operand s390_operands[];
116
117/* Values defined for the flags field of a struct s390_operand. */
118
119/* This operand names a register. The disassembler uses this to print
120 register names with a leading 'r'. */
121#define S390_OPERAND_GPR 0x1
122
123/* This operand names a floating point register. The disassembler
124 prints these with a leading 'f'. */
125#define S390_OPERAND_FPR 0x2
126
127/* This operand names an access register. The disassembler
128 prints these with a leading 'a'. */
129#define S390_OPERAND_AR 0x4
130
131/* This operand names a control register. The disassembler
132 prints these with a leading 'c'. */
133#define S390_OPERAND_CR 0x8
134
135/* This operand is a displacement. */
136#define S390_OPERAND_DISP 0x10
137
138/* This operand names a base register. */
139#define S390_OPERAND_BASE 0x20
140
141/* This operand names an index register, it can be skipped. */
142#define S390_OPERAND_INDEX 0x40
143
144/* This operand is a relative branch displacement. The disassembler
145 prints these symbolically if possible. */
146#define S390_OPERAND_PCREL 0x80
147
148/* This operand takes signed values. */
149#define S390_OPERAND_SIGNED 0x100
150
151/* This operand is a length. */
152#define S390_OPERAND_LENGTH 0x200
153
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154/* This operand is optional. Only a single operand at the end of
155 the instruction may be optional. */
156#define S390_OPERAND_OPTIONAL 0x400
157
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158/* The operand needs to be a valid GP or FP register pair. */
159#define S390_OPERAND_REG_PAIR 0x800
5e4b319c 160
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161/* This operand names a vector register. The disassembler uses this
162 to print register names with a leading 'v'. */
163#define S390_OPERAND_VR 0x1000
164
165#define S390_OPERAND_CP16 0x2000
166
167#define S390_OPERAND_OR1 0x4000
168#define S390_OPERAND_OR2 0x8000
169#define S390_OPERAND_OR8 0x10000
170
171#endif /* S390_H */
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