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40b36596 | 1 | /* TI C6X opcode table. |
2571583a | 2 | Copyright (C) 2010-2017 Free Software Foundation, Inc. |
40b36596 JM |
3 | |
4 | This program is free software; you can redistribute it and/or modify | |
5 | it under the terms of the GNU General Public License as published by | |
6 | the Free Software Foundation; either version 3 of the License, or | |
7 | (at your option) any later version. | |
8 | ||
9 | This program is distributed in the hope that it will be useful, | |
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | GNU General Public License for more details. | |
13 | ||
14 | You should have received a copy of the GNU General Public License | |
15 | along with this program; if not, write to the Free Software | |
16 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, | |
17 | MA 02110-1301, USA. */ | |
18 | ||
19 | /* Define the INSN macro before including this file; it takes as | |
20 | arguments the fields from tic6x_opcode (defined in tic6x.h). The | |
21 | name is given as an identifier; the subsequent four operands should | |
22 | have "tic6x_func_unit_", "tic6x_insn_format_", "tic6x_pipeline_" | |
23 | and "TIC6X_INSN_", respectively, prepended to them by the macro | |
24 | definition. Also define INSNE, which has a second argument that | |
25 | goes after tic6x_opcode_NAME_ to form the enumeration value for | |
26 | this instruction, where the value otherwise formed from the name, | |
27 | functional unit and format is ambiguous, but otherwise has the same | |
28 | arguments as INSN. */ | |
29 | ||
30 | #define TIC6X_INSN_C64X_AND_C67X TIC6X_INSN_C64X|TIC6X_INSN_C67X | |
31 | #define tic6x_insn_format_nfu_s_branch_nop_cst \ | |
32 | tic6x_insn_format_s_branch_nop_cst | |
33 | #define tic6x_insn_format_s_l_1_or_2_src tic6x_insn_format_l_1_or_2_src | |
34 | #define RAN(id, min, max) { CONCAT2(tic6x_field_,id), (min), (max) } | |
35 | #define FIX(id, val) RAN(id, val, val) | |
36 | #define FIX0() 0, { { 0, 0, 0 } } | |
37 | #define FIX1(a) 1, { a } | |
38 | #define FIX2(a, b) 2, { a, b } | |
39 | #define FIX3(a, b, c) 3, { a, b, c } | |
40 | #define FIX4(a, b, c, d) 4, { a, b, c, d } | |
41 | #define OP0() 0, { { 0, 0, FALSE, 0, 0, 0, 0 } } | |
42 | #define OP1(a) 1, { a } | |
43 | #define OP2(a, b) 2, { a, b } | |
44 | #define OP3(a, b, c) 3, { a, b, c } | |
45 | #define OP4(a, b, c, d) 4, { a, b, c, d } | |
46 | #define OACST { tic6x_operand_asm_const, 0, tic6x_rw_none, 0, 0, 0, 0 } | |
47 | #define OLCST { tic6x_operand_link_const, 0, tic6x_rw_none, 0, 0, 0, 0 } | |
51dcdd4d NC |
48 | #define OHWCSTM1 { tic6x_operand_hw_const_minus_1, 0, tic6x_rw_none, 0, 0, 0, 0 } |
49 | #define OHWCST0 { tic6x_operand_hw_const_0, 0, tic6x_rw_none, 0, 0, 0, 0 } | |
50 | #define OHWCST1 { tic6x_operand_hw_const_1, 0, tic6x_rw_none, 0, 0, 0, 0 } | |
51 | #define OHWCST5 { tic6x_operand_hw_const_5, 0, tic6x_rw_none, 0, 0, 0, 0 } | |
52 | #define OHWCST16 { tic6x_operand_hw_const_16, 0, tic6x_rw_none, 0, 0, 0, 0 } | |
53 | #define OHWCST24 { tic6x_operand_hw_const_24, 0, tic6x_rw_none, 0, 0, 0, 0 } | |
54 | #define OHWCST31 { tic6x_operand_hw_const_31, 0, tic6x_rw_none, 0, 0, 0, 0 } | |
40b36596 JM |
55 | #define OFULIST { tic6x_operand_func_unit, 0, tic6x_rw_none, 0, 0, 0, 0 } |
56 | #define ORIRP1 { tic6x_operand_irp, 4, tic6x_rw_read, 1, 1, 0, 0 } | |
57 | #define ORNRP1 { tic6x_operand_nrp, 4, tic6x_rw_read, 1, 1, 0, 0 } | |
58 | #define OWREG1 { tic6x_operand_reg, 4, tic6x_rw_write, 1, 1, 0, 0 } | |
51dcdd4d NC |
59 | #define OWREG1Z { tic6x_operand_zreg, 4, tic6x_rw_write, 1, 1, 0, 0 } |
60 | #define OWREG1NORS { tic6x_operand_reg_nors, 4, tic6x_rw_write, 1, 1, 0, 0 } | |
61 | #define ORREG1B { tic6x_operand_reg_bside, 4, tic6x_rw_write, 1, 1, 0, 0 } | |
62 | #define ORREG1BNORS { tic6x_operand_reg_bside_nors, 4, tic6x_rw_write, 1, 1, 0, 0 } | |
40b36596 JM |
63 | #define OWRETREG1 { tic6x_operand_retreg, 4, tic6x_rw_write, 1, 1, 0, 0 } |
64 | #define ORREG1 { tic6x_operand_reg, 4, tic6x_rw_read, 1, 1, 0, 0 } | |
65 | #define ORDREG1 { tic6x_operand_dreg, 4, tic6x_rw_read, 1, 1, 0, 0 } | |
51dcdd4d | 66 | #define ORTREG1 { tic6x_operand_treg, 4, tic6x_rw_read, 1, 1, 0, 0 } |
40b36596 | 67 | #define ORWREG1 { tic6x_operand_reg, 4, tic6x_rw_read_write, 1, 1, 0, 0 } |
51dcdd4d NC |
68 | #define ORB15REG1 { tic6x_operand_b15reg, 4, tic6x_rw_read, 1, 1, 0, 0 } |
69 | #define OWB15REG1 { tic6x_operand_b15reg, 4, tic6x_rw_write, 1, 1, 0, 0 } | |
40b36596 JM |
70 | #define ORAREG1 { tic6x_operand_areg, 4, tic6x_rw_read, 1, 1, 0, 0 } |
71 | #define ORXREG1 { tic6x_operand_xreg, 4, tic6x_rw_read, 1, 1, 0, 0 } | |
72 | #define ORREG12 { tic6x_operand_reg, 4, tic6x_rw_read, 1, 2, 0, 0 } | |
73 | #define ORREG14 { tic6x_operand_reg, 4, tic6x_rw_read, 1, 4, 0, 0 } | |
74 | #define ORXREG14 { tic6x_operand_xreg, 4, tic6x_rw_read, 1, 4, 0, 0 } | |
75 | #define OWREG2 { tic6x_operand_reg, 4, tic6x_rw_write, 2, 2, 0, 0 } | |
76 | #define OWREG4 { tic6x_operand_reg, 4, tic6x_rw_write, 4, 4, 0, 0 } | |
77 | #define OWREG9 { tic6x_operand_reg, 4, tic6x_rw_write, 9, 9, 0, 0 } | |
78 | #define OWDREG5 { tic6x_operand_dreg, 4, tic6x_rw_write, 5, 5, 0, 0 } | |
51dcdd4d | 79 | #define OWTREG5 { tic6x_operand_treg, 4, tic6x_rw_write, 5, 5, 0, 0 } |
40b36596 JM |
80 | #define OWREGL1 { tic6x_operand_regpair, 5, tic6x_rw_write, 1, 1, 1, 1 } |
81 | #define ORREGL1 { tic6x_operand_regpair, 5, tic6x_rw_read, 1, 1, 1, 1 } | |
82 | #define OWREGD1 { tic6x_operand_regpair, 8, tic6x_rw_write, 1, 1, 1, 1 } | |
83 | #define OWREGD12 { tic6x_operand_regpair, 8, tic6x_rw_write, 1, 1, 2, 2 } | |
84 | #define OWREGD4 { tic6x_operand_regpair, 8, tic6x_rw_write, 4, 4, 4, 4 } | |
85 | #define ORREGD1 { tic6x_operand_regpair, 8, tic6x_rw_read, 1, 1, 1, 1 } | |
86 | #define OWREGD45 { tic6x_operand_regpair, 8, tic6x_rw_write, 4, 4, 5, 5 } | |
87 | #define OWREGD67 { tic6x_operand_regpair, 8, tic6x_rw_write, 6, 6, 7, 7 } | |
88 | #define ORDREGD1 { tic6x_operand_dregpair, 8, tic6x_rw_read, 1, 1, 1, 1 } | |
51dcdd4d | 89 | #define ORTREGD1 { tic6x_operand_tregpair, 8, tic6x_rw_read, 1, 1, 1, 1 } |
40b36596 | 90 | #define OWDREGD5 { tic6x_operand_dregpair, 8, tic6x_rw_write, 5, 5, 5, 5 } |
51dcdd4d | 91 | #define OWTREGD5 { tic6x_operand_tregpair, 8, tic6x_rw_write, 5, 5, 5, 5 } |
40b36596 JM |
92 | #define ORREGD12 { tic6x_operand_regpair, 8, tic6x_rw_read, 1, 1, 2, 2 } |
93 | #define ORXREGD12 { tic6x_operand_xregpair, 8, tic6x_rw_read, 1, 1, 2, 2 } | |
94 | #define ORREGD1234 { tic6x_operand_regpair, 8, tic6x_rw_read, 1, 2, 3, 4 } | |
165546ad | 95 | #define ORXREGD1324 { tic6x_operand_xregpair, 8, tic6x_rw_read, 1, 3, 2, 4 } |
40b36596 JM |
96 | #define OWREGD910 { tic6x_operand_regpair, 8, tic6x_rw_write, 9, 9, 10, 10 } |
97 | #define ORCREG1 { tic6x_operand_ctrl, 4, tic6x_rw_read, 1, 1, 0, 0 } | |
98 | #define OWCREG1 { tic6x_operand_ctrl, 4, tic6x_rw_write, 1, 1, 0, 0 } | |
51dcdd4d | 99 | #define OWILC1 { tic6x_operand_ilc, 4, tic6x_rw_write, 1, 1, 0, 0 } |
40b36596 JM |
100 | #define ORMEMDW { tic6x_operand_mem_deref, 4, tic6x_rw_read, 3, 3, 0, 0 } |
101 | #define OWMEMDW { tic6x_operand_mem_deref, 4, tic6x_rw_write, 3, 3, 0, 0 } | |
102 | #define ORMEMSB { tic6x_operand_mem_short, 1, tic6x_rw_read, 3, 3, 0, 0 } | |
103 | #define OWMEMSB { tic6x_operand_mem_short, 1, tic6x_rw_write, 3, 3, 0, 0 } | |
104 | #define ORMEMLB { tic6x_operand_mem_long, 1, tic6x_rw_read, 3, 3, 0, 0 } | |
105 | #define OWMEMLB { tic6x_operand_mem_long, 1, tic6x_rw_write, 3, 3, 0, 0 } | |
106 | #define ORMEMSH { tic6x_operand_mem_short, 2, tic6x_rw_read, 3, 3, 0, 0 } | |
107 | #define OWMEMSH { tic6x_operand_mem_short, 2, tic6x_rw_write, 3, 3, 0, 0 } | |
108 | #define ORMEMLH { tic6x_operand_mem_long, 2, tic6x_rw_read, 3, 3, 0, 0 } | |
109 | #define OWMEMLH { tic6x_operand_mem_long, 2, tic6x_rw_write, 3, 3, 0, 0 } | |
110 | #define ORMEMSW { tic6x_operand_mem_short, 4, tic6x_rw_read, 3, 3, 0, 0 } | |
111 | #define OWMEMSW { tic6x_operand_mem_short, 4, tic6x_rw_write, 3, 3, 0, 0 } | |
112 | #define ORMEMLW { tic6x_operand_mem_long, 4, tic6x_rw_read, 3, 3, 0, 0 } | |
113 | #define OWMEMLW { tic6x_operand_mem_long, 4, tic6x_rw_write, 3, 3, 0, 0 } | |
114 | #define ORMEMSD { tic6x_operand_mem_short, 8, tic6x_rw_read, 3, 3, 0, 0 } | |
115 | #define OWMEMSD { tic6x_operand_mem_short, 8, tic6x_rw_write, 3, 3, 0, 0 } | |
116 | #define ORMEMND { tic6x_operand_mem_ndw, 8, tic6x_rw_read, 3, 3, 0, 0 } | |
117 | #define OWMEMND { tic6x_operand_mem_ndw, 8, tic6x_rw_write, 3, 3, 0, 0 } | |
118 | #define ENC(id, meth, op) { \ | |
119 | CONCAT2(tic6x_field_,id), \ | |
120 | CONCAT2(tic6x_coding_,meth), \ | |
121 | op \ | |
122 | } | |
123 | #define ENC0() 0, { { 0, 0, 0 } } | |
124 | #define ENC1(a) 1, { a } | |
125 | #define ENC2(a, b) 2, { a, b } | |
126 | #define ENC3(a, b, c) 3, { a, b, c } | |
127 | #define ENC4(a, b, c, d) 4, { a, b, c, d } | |
128 | #define ENC5(a, b, c, d, e) 5, { a, b, c, d, e } | |
129 | #define ENC6(a, b, c, d, e, f) 6, { a, b, c, d, e, f } | |
130 | #define ENC7(a, b, c, d, e, f, g) 7, { a, b, c, d, e, f, g } | |
131 | ||
132 | INSN(abs, l, unary, 1cycle, C62X, 0, | |
133 | FIX1(FIX(op, 0)), | |
134 | OP2(ORXREG1, OWREG1), | |
135 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
136 | ENC(dst, reg, 1))) | |
137 | INSN(abs, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, | |
138 | FIX3(FIX(op, 0x38), FIX(x, 0), FIX(src1, 0)), | |
139 | OP2(ORREGL1, OWREGL1), | |
140 | ENC3(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(dst, reg, 1))) | |
141 | ||
142 | INSN(abs2, l, unary, 1cycle, C64X, 0, | |
143 | FIX1(FIX(op, 0x4)), | |
144 | OP2(ORXREG1, OWREG1), | |
145 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
146 | ENC(dst, reg, 1))) | |
147 | ||
148 | INSN(absdp, s, 1_or_2_src, 2cycle_dp, C67X, TIC6X_FLAG_NO_CROSS, | |
795b8e6b | 149 | FIX2(FIX(op, 0x2c), FIX(x, 0)), |
40b36596 | 150 | OP2(ORREGD1, OWREGD12), |
795b8e6b NC |
151 | ENC4(ENC(s, fu, 0), ENC(src2, regpair_msb, 0), ENC(src1, regpair_lsb, 0), |
152 | ENC(dst, reg, 1))) | |
40b36596 JM |
153 | |
154 | INSN(abssp, s, unary, 1cycle, C67X, 0, | |
155 | FIX1(FIX(op, 0)), | |
156 | OP2(ORXREG1, OWREG1), | |
157 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
158 | ENC(dst, reg, 1))) | |
159 | ||
160 | INSNE(add, l_si_xsi_si, l, 1_or_2_src, 1cycle, C62X, 0, | |
161 | FIX1(FIX(op, 0x3)), | |
162 | OP3(ORREG1, ORXREG1, OWREG1), | |
163 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
164 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
165 | INSNE(add, l_si_xsi_sl, l, 1_or_2_src, 1cycle, C62X, 0, | |
166 | FIX1(FIX(op, 0x23)), | |
167 | OP3(ORREG1, ORXREG1, OWREGL1), | |
168 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
169 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
170 | INSNE(add, l_xsi_sl_sl, l, 1_or_2_src, 1cycle, C62X, 0, | |
171 | FIX1(FIX(op, 0x21)), | |
172 | OP3(ORXREG1, ORREGL1, OWREGL1), | |
173 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
174 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
175 | INSNE(add, l_s5_xsi_si, l, 1_or_2_src, 1cycle, C62X, 0, | |
176 | FIX1(FIX(op, 0x2)), | |
177 | OP3(OACST, ORXREG1, OWREG1), | |
178 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, scst, 0), | |
179 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
180 | INSNE(add, l_s5_sl_sl, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, | |
181 | FIX2(FIX(op, 0x20), FIX(x, 0)), | |
182 | OP3(OACST, ORREGL1, OWREGL1), | |
183 | ENC4(ENC(s, fu, 0), ENC(src1, scst, 0), ENC(src2, reg, 1), | |
184 | ENC(dst, reg, 2))) | |
185 | INSNE(add, s_si_xsi_si, s, 1_or_2_src, 1cycle, C62X, 0, | |
186 | FIX1(FIX(op, 0x7)), | |
187 | OP3(ORREG1, ORXREG1, OWREG1), | |
188 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
189 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
190 | INSNE(add, s_s5_xsi_si, s, 1_or_2_src, 1cycle, C62X, 0, | |
191 | FIX1(FIX(op, 0x6)), | |
192 | OP3(OACST, ORXREG1, OWREG1), | |
193 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, scst, 0), | |
194 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
195 | INSNE(add, d_si_si_si, d, 1_or_2_src, 1cycle, C62X, | |
196 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_PREFER(1), | |
197 | FIX1(FIX(op, 0x10)), | |
198 | OP3(ORREG1, ORREG1, OWREG1), | |
199 | ENC4(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(src1, reg, 1), | |
200 | ENC(dst, reg, 2))) | |
201 | INSNE(add, d_si_u5_si, d, 1_or_2_src, 1cycle, C62X, | |
202 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_PREFER(1), | |
203 | FIX1(FIX(op, 0x12)), | |
204 | OP3(ORREG1, OACST, OWREG1), | |
205 | ENC4(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(src1, ucst, 1), | |
206 | ENC(dst, reg, 2))) | |
207 | INSNE(add, d_si_xsi_si, d, ext_1_or_2_src, 1cycle, C64X, TIC6X_FLAG_PREFER(0), | |
208 | FIX1(FIX(op, 0xa)), | |
209 | OP3(ORREG1, ORXREG1, OWREG1), | |
210 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
211 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
212 | INSNE(add, d_xsi_s5_si, d, ext_1_or_2_src, 1cycle, C64X, TIC6X_FLAG_PREFER(0), | |
213 | FIX1(FIX(op, 0xb)), | |
214 | OP3(ORXREG1, OACST, OWREG1), | |
215 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
216 | ENC(src1, scst, 1), ENC(dst, reg, 2))) | |
217 | ||
51dcdd4d NC |
218 | /* 16 bits insn */ |
219 | INSN(add, l, l3_sat_0, 1cycle, C64XP, 0, | |
220 | FIX1(FIX(op, 0x0)), | |
221 | OP3(ORREG1, ORXREG1, OWREG1), | |
222 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
223 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
224 | INSN(add, l, l3i, 1cycle, C64XP, 0, | |
225 | FIX0(), | |
226 | OP3(OACST, ORXREG1, OWREG1), | |
227 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(cst, scst_l3i, 0), | |
228 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
229 | INSN(add, l, lx1, 1cycle, C64XP, | |
230 | TIC6X_FLAG_NO_CROSS, | |
231 | FIX1(FIX(op, 0x3)), | |
232 | OP3(OHWCSTM1, ORREG1, OWREG1), | |
233 | ENC3(ENC(s, fu, 0), ENC(srcdst, reg, 1), ENC(srcdst, reg, 2))) | |
234 | INSN(add, s, s3_sat_0, 1cycle, C64XP, 0, | |
235 | FIX1(FIX(op, 0x0)), | |
236 | OP3(ORREG1, ORXREG1, OWREG1), | |
237 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
238 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
239 | INSN(add, s, sx1, 1cycle, C64XP, TIC6X_FLAG_NO_CROSS, | |
240 | FIX1(FIX(op, 0x3)), | |
241 | OP3(OHWCSTM1, ORREG1, OWREG1), | |
242 | ENC3(ENC(s, fu, 0), ENC(srcdst, reg, 1), ENC(srcdst, reg, 2))) | |
243 | INSN(add, s, sx2op, 1cycle, C64XP, 0, | |
244 | FIX1(FIX(op, 0x0)), | |
245 | OP3(ORREG1, ORXREG1, OWREG1), | |
246 | ENC5(ENC(s, fu, 0), ENC(srcdst, reg, 0), ENC(srcdst, reg, 2), | |
247 | ENC(src2, reg, 1), ENC(x, xpath, 1))) | |
248 | INSN(add, d, dx2op, 1cycle, C64XP, 0, | |
249 | FIX1(FIX(op, 0x0)), | |
250 | OP3(ORREG1, ORXREG1, OWREG1), | |
251 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 1), ENC(srcdst, reg, 0), | |
252 | ENC(src2, reg, 1), ENC(srcdst, reg, 2))) | |
253 | INSNU(add, l, lsdx1, 1cycle, C64XP, TIC6X_FLAG_NO_CROSS, | |
e21e1a51 | 254 | FIX2(FIX(op, 0x5), FIX(unit, 0x0)), |
51dcdd4d NC |
255 | OP3(ORREG1, OHWCST1, OWREG1), |
256 | ENC3(ENC(s, fu, 0), ENC(srcdst, reg, 0), ENC(srcdst, reg, 2))) | |
257 | INSNU(add, s, lsdx1, 1cycle, C64XP, TIC6X_FLAG_NO_CROSS, | |
e21e1a51 | 258 | FIX2(FIX(op, 0x5), FIX(unit, 0x1)), |
51dcdd4d NC |
259 | OP3(ORREG1, OHWCST1, OWREG1), |
260 | ENC3(ENC(s, fu, 0), ENC(srcdst, reg, 0), ENC(srcdst, reg, 2))) | |
261 | INSNU(add, d, lsdx1, 1cycle, C64XP, TIC6X_FLAG_NO_CROSS, | |
e21e1a51 | 262 | FIX2(FIX(op, 0x5), FIX(unit, 0x2)), |
51dcdd4d NC |
263 | OP3(ORREG1, OHWCST1, OWREG1), |
264 | ENC3(ENC(s, fu, 0), ENC(srcdst, reg, 0), ENC(srcdst, reg, 2))) | |
265 | /**/ | |
266 | ||
40b36596 JM |
267 | INSNE(addab, d_si_si_si, d, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, |
268 | FIX1(FIX(op, 0x30)), | |
269 | OP3(ORREG1, ORREG1, OWREG1), | |
270 | ENC4(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(src1, reg, 1), | |
271 | ENC(dst, reg, 2))) | |
272 | INSNE(addab, d_si_u5_si, d, 1_or_2_src, 1cycle, C62X, | |
273 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_PREFER(1), | |
274 | FIX1(FIX(op, 0x32)), | |
275 | OP3(ORREG1, OACST, OWREG1), | |
276 | ENC4(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(src1, ucst, 1), | |
277 | ENC(dst, reg, 2))) | |
278 | INSN(addab, d, adda_long, 1cycle, C64XP, TIC6X_FLAG_PREFER(0), | |
279 | FIX1(FIX(op, 3)), | |
280 | OP3(ORAREG1, OLCST, OWREG1), | |
281 | ENC4(ENC(s, fu, 0), ENC(y, areg, 0), ENC(offsetR, ulcst_dpr_byte, 1), | |
282 | ENC(dst, reg, 2))) | |
283 | ||
284 | INSNE(addad, d_si_si_si, d, 1_or_2_src, 1cycle, C64X_AND_C67X, | |
285 | TIC6X_FLAG_NO_CROSS, | |
286 | FIX1(FIX(op, 0x3c)), | |
287 | OP3(ORREG1, ORREG1, OWREG1), | |
288 | ENC4(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(src1, reg, 1), | |
289 | ENC(dst, reg, 2))) | |
290 | INSNE(addad, d_si_u5_si, d, 1_or_2_src, 1cycle, C64X_AND_C67X, | |
291 | TIC6X_FLAG_NO_CROSS, | |
292 | FIX1(FIX(op, 0x3d)), | |
293 | OP3(ORREG1, OACST, OWREG1), | |
294 | ENC4(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(src1, ucst, 1), | |
295 | ENC(dst, reg, 2))) | |
296 | ||
297 | INSNE(addah, d_si_si_si, d, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, | |
298 | FIX1(FIX(op, 0x34)), | |
299 | OP3(ORREG1, ORREG1, OWREG1), | |
300 | ENC4(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(src1, reg, 1), | |
301 | ENC(dst, reg, 2))) | |
302 | INSNE(addah, d_si_u5_si, d, 1_or_2_src, 1cycle, C62X, | |
303 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_PREFER(1), | |
304 | FIX1(FIX(op, 0x36)), | |
305 | OP3(ORREG1, OACST, OWREG1), | |
306 | ENC4(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(src1, ucst, 1), | |
307 | ENC(dst, reg, 2))) | |
308 | INSN(addah, d, adda_long, 1cycle, C64XP, TIC6X_FLAG_PREFER(0), | |
309 | FIX1(FIX(op, 5)), | |
310 | OP3(ORAREG1, OLCST, OWREG1), | |
311 | ENC4(ENC(s, fu, 0), ENC(y, areg, 0), ENC(offsetR, ulcst_dpr_half, 1), | |
312 | ENC(dst, reg, 2))) | |
313 | ||
314 | INSNE(addaw, d_si_si_si, d, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, | |
315 | FIX1(FIX(op, 0x38)), | |
316 | OP3(ORREG1, ORREG1, OWREG1), | |
317 | ENC4(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(src1, reg, 1), | |
318 | ENC(dst, reg, 2))) | |
319 | INSNE(addaw, d_si_u5_si, d, 1_or_2_src, 1cycle, C62X, | |
320 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_PREFER(1), | |
321 | FIX1(FIX(op, 0x3a)), | |
322 | OP3(ORREG1, OACST, OWREG1), | |
323 | ENC4(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(src1, ucst, 1), | |
324 | ENC(dst, reg, 2))) | |
325 | INSN(addaw, d, adda_long, 1cycle, C64XP, TIC6X_FLAG_PREFER(0), | |
326 | FIX1(FIX(op, 7)), | |
327 | OP3(ORAREG1, OLCST, OWREG1), | |
328 | ENC4(ENC(s, fu, 0), ENC(y, areg, 0), ENC(offsetR, ulcst_dpr_word, 1), | |
329 | ENC(dst, reg, 2))) | |
330 | ||
51dcdd4d NC |
331 | /* 16 bits insn */ |
332 | INSN(addaw, d, dx5, 1cycle, C64XP, TIC6X_FLAG_INSN16_BSIDE, | |
333 | FIX0(), | |
334 | OP3(ORB15REG1, OACST, OWREG1), | |
335 | ENC3(ENC(s, fu, 0), ENC(cst, ucst, 1), ENC(dst, reg, 2))) | |
336 | INSN(addaw, d, dx5p, 1cycle, C64XP, TIC6X_FLAG_INSN16_BSIDE, | |
337 | FIX1(FIX(op, 0)), | |
338 | OP3(ORB15REG1, OACST, OWB15REG1), | |
339 | ENC2(ENC(s, fu, 0), ENC(cst, ucst, 1))) | |
340 | /**/ | |
341 | ||
40b36596 JM |
342 | INSN(adddp, l, 1_or_2_src, addsubdp, C67X, 0, |
343 | FIX1(FIX(op, 0x18)), | |
344 | OP3(ORREGD12, ORXREGD12, OWREGD67), | |
345 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
346 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
347 | INSN(adddp, s, l_1_or_2_src, addsubdp, C67XP, 0, | |
348 | FIX1(FIX(op, 0x72)), | |
349 | OP3(ORREGD12, ORXREGD12, OWREGD67), | |
350 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
351 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
352 | ||
353 | INSN(addk, s, addk, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, | |
354 | FIX0(), | |
355 | OP2(OLCST, OWREG1), | |
356 | ENC3(ENC(s, fu, 0), ENC(cst, scst, 0), ENC(dst, reg, 1))) | |
357 | ||
51dcdd4d NC |
358 | /* 16 bits insn */ |
359 | INSN(addk, s, sx5, 1cycle, C64XP, TIC6X_FLAG_NO_CROSS, | |
360 | FIX0(), | |
361 | OP2(OACST, OWREG1), | |
362 | ENC3(ENC(s, fu, 0), ENC(cst, ucst, 0), ENC(dst, reg, 1))) | |
363 | /**/ | |
364 | ||
40b36596 JM |
365 | INSN(addkpc, s, addkpc, 1cycle, C64X, |
366 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_MCNOP|TIC6X_FLAG_SIDE_B_ONLY, | |
367 | FIX1(FIX(s, 1)), | |
368 | OP3(OLCST, OWREG1, OACST), | |
369 | ENC3(ENC(src1, pcrel, 0), ENC(dst, reg, 1), ENC(src2, ucst, 2))) | |
370 | ||
371 | INSN(addsp, l, 1_or_2_src, 4cycle, C67X, 0, | |
372 | FIX1(FIX(op, 0x10)), | |
373 | OP3(ORREG1, ORXREG1, OWREG4), | |
374 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
375 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
376 | INSN(addsp, s, l_1_or_2_src, 4cycle, C67XP, 0, | |
377 | FIX1(FIX(op, 0x70)), | |
378 | OP3(ORREG1, ORXREG1, OWREG4), | |
379 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
380 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
381 | ||
382 | INSN(addsub, l, 1_or_2_src_noncond, 1cycle, C64XP, 0, | |
383 | FIX1(FIX(op, 0xc)), | |
384 | OP3(ORREG1, ORXREG1, OWREGD1), | |
385 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
386 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
387 | ||
388 | INSN(addsub2, l, 1_or_2_src_noncond, 1cycle, C64XP, 0, | |
389 | FIX1(FIX(op, 0xd)), | |
390 | OP3(ORREG1, ORXREG1, OWREGD1), | |
391 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
392 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
393 | ||
394 | INSNE(addu, l_ui_xui_ul, l, 1_or_2_src, 1cycle, C62X, 0, | |
395 | FIX1(FIX(op, 0x2b)), | |
396 | OP3(ORREG1, ORXREG1, OWREGL1), | |
397 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
398 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
399 | INSNE(addu, l_xui_ul_ul, l, 1_or_2_src, 1cycle, C62X, 0, | |
400 | FIX1(FIX(op, 0x29)), | |
401 | OP3(ORXREG1, ORREGL1, OWREGL1), | |
402 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
403 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
404 | ||
405 | INSN(add2, s, 1_or_2_src, 1cycle, C62X, 0, | |
406 | FIX1(FIX(op, 0x1)), | |
407 | OP3(ORREG1, ORXREG1, OWREG1), | |
408 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
409 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
410 | INSN(add2, l, 1_or_2_src, 1cycle, C64X, 0, | |
411 | FIX1(FIX(op, 0x5)), | |
412 | OP3(ORREG1, ORXREG1, OWREG1), | |
413 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
414 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
415 | INSN(add2, d, ext_1_or_2_src, 1cycle, C64X, 0, | |
416 | FIX1(FIX(op, 0x4)), | |
417 | OP3(ORREG1, ORXREG1, OWREG1), | |
418 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
419 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
420 | ||
421 | INSN(add4, l, 1_or_2_src, 1cycle, C64X, 0, | |
422 | FIX1(FIX(op, 0x65)), | |
423 | OP3(ORREG1, ORXREG1, OWREG1), | |
424 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
425 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
426 | ||
427 | INSNE(and, l_ui_xui_ui, l, 1_or_2_src, 1cycle, C62X, 0, | |
428 | FIX1(FIX(op, 0x7b)), | |
429 | OP3(ORREG1, ORXREG1, OWREG1), | |
430 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
431 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
432 | INSNE(and, l_s5_xui_ui, l, 1_or_2_src, 1cycle, C62X, 0, | |
433 | FIX1(FIX(op, 0x7a)), | |
434 | OP3(OACST, ORXREG1, OWREG1), | |
435 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, scst, 0), | |
436 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
437 | INSNE(and, s_ui_xui_ui, s, 1_or_2_src, 1cycle, C62X, 0, | |
438 | FIX1(FIX(op, 0x1f)), | |
439 | OP3(ORREG1, ORXREG1, OWREG1), | |
440 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
441 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
442 | INSNE(and, s_s5_xui_ui, s, 1_or_2_src, 1cycle, C62X, 0, | |
443 | FIX1(FIX(op, 0x1e)), | |
444 | OP3(OACST, ORXREG1, OWREG1), | |
445 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, scst, 0), | |
446 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
447 | INSNE(and, d_ui_xui_ui, d, ext_1_or_2_src, 1cycle, C64X, 0, | |
448 | FIX1(FIX(op, 0x6)), | |
449 | OP3(ORREG1, ORXREG1, OWREG1), | |
450 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
451 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
452 | INSNE(and, d_s5_xui_ui, d, ext_1_or_2_src, 1cycle, C64X, 0, | |
453 | FIX1(FIX(op, 0x7)), | |
454 | OP3(OACST, ORXREG1, OWREG1), | |
455 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, scst, 0), | |
456 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
457 | ||
51dcdd4d NC |
458 | /* 16 bits insn */ |
459 | INSN(and, l, l2c, 1cycle, C64XP, 0, | |
460 | FIX1(FIX(op, 0)), | |
461 | OP3(ORREG1, ORXREG1, OWREG1NORS), | |
462 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
463 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
464 | /**/ | |
465 | ||
40b36596 JM |
466 | INSN(andn, l, 1_or_2_src, 1cycle, C64X, 0, |
467 | FIX1(FIX(op, 0x7c)), | |
468 | OP3(ORREG1, ORXREG1, OWREG1), | |
469 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
470 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
471 | INSN(andn, s, ext_1_or_2_src, 1cycle, C64X, 0, | |
472 | FIX1(FIX(op, 0x6)), | |
473 | OP3(ORREG1, ORXREG1, OWREG1), | |
474 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
475 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
476 | INSN(andn, d, ext_1_or_2_src, 1cycle, C64X, 0, | |
477 | FIX1(FIX(op, 0x0)), | |
478 | OP3(ORREG1, ORXREG1, OWREG1), | |
479 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
480 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
481 | ||
482 | INSN(avg2, m, compound, 1616_m, C64X, 0, | |
483 | FIX1(FIX(op, 0x13)), | |
484 | OP3(ORREG1, ORXREG1, OWREG2), | |
485 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
486 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
487 | ||
488 | INSN(avgu4, m, compound, 1616_m, C64X, 0, | |
489 | FIX1(FIX(op, 0x12)), | |
490 | OP3(ORREG1, ORXREG1, OWREG2), | |
491 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
492 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
493 | ||
494 | INSN(b, s, ext_branch_cond_imm, branch, C62X, TIC6X_FLAG_NO_CROSS, | |
495 | FIX0(), | |
496 | OP1(OLCST), | |
497 | ENC2(ENC(s, fu, 0), ENC(cst, pcrel, 0))) | |
498 | INSN(b, s, branch, branch, C62X, TIC6X_FLAG_SIDE_B_ONLY, | |
499 | FIX1(FIX(s, 1)), | |
500 | OP1(ORXREG1), | |
501 | ENC2(ENC(x, xpath, 0), ENC(src2, reg, 0))) | |
502 | INSN(b, s, b_irp, branch, C62X, TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_SIDE_B_ONLY, | |
503 | FIX3(FIX(s, 1), FIX(x, 0), FIX(dst, 0)), | |
504 | OP1(ORIRP1), | |
505 | ENC0()) | |
506 | INSN(b, s, b_nrp, branch, C62X, TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_SIDE_B_ONLY, | |
507 | FIX3(FIX(s, 1), FIX(x, 0), FIX(dst, 0)), | |
508 | OP1(ORNRP1), | |
509 | ENC0()) | |
510 | ||
511 | INSN(bdec, s, bdec, branch, C64X, TIC6X_FLAG_NO_CROSS, | |
512 | FIX0(), | |
513 | OP2(OLCST, ORWREG1), | |
514 | ENC3(ENC(s, fu, 0), ENC(src, pcrel, 0), ENC(dst, reg, 1))) | |
515 | ||
516 | INSN(bitc4, m, unary, 1616_m, C64X, 0, | |
517 | FIX1(FIX(op, 0x1e)), | |
518 | OP2(ORXREG1, OWREG2), | |
519 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
520 | ENC(dst, reg, 1))) | |
521 | ||
522 | INSN(bitr, m, unary, 1616_m, C64X, 0, | |
523 | FIX1(FIX(op, 0x1f)), | |
524 | OP2(ORXREG1, OWREG2), | |
525 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
526 | ENC(dst, reg, 1))) | |
527 | ||
528 | INSN(bnop, s, branch_nop_cst, branch, C64X, | |
529 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_MCNOP, | |
530 | FIX0(), | |
531 | OP2(OLCST, OACST), | |
0c9573f4 | 532 | ENC3(ENC(s, fu, 0), ENC(src2, pcrel_half, 0), ENC(src1, ucst, 1))) |
40b36596 JM |
533 | INSN(bnop, nfu, s_branch_nop_cst, branch, C64XP, |
534 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_MACRO|TIC6X_FLAG_MCNOP, | |
535 | FIX1(FIX(s, 0)), | |
536 | OP2(OLCST, OACST), | |
537 | ENC2(ENC(src2, pcrel, 0), ENC(src1, ucst, 1))) | |
538 | INSN(bnop, s, branch_nop_reg, branch, C64X, | |
539 | TIC6X_FLAG_SIDE_B_ONLY|TIC6X_FLAG_MCNOP, | |
540 | FIX1(FIX(s, 1)), | |
541 | OP2(ORXREG1, OACST), | |
542 | ENC3(ENC(x, xpath, 0), ENC(src2, reg, 0), ENC(src1, ucst, 1))) | |
543 | ||
51dcdd4d NC |
544 | /* 16 bits insn format */ |
545 | INSN(bnop, s, sbu8, branch, C64XP, | |
546 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_MCNOP, | |
547 | FIX0(), | |
548 | OP2(OLCST, OHWCST5), | |
549 | ENC2(ENC(s, fu, 0), ENC(cst, pcrel_half_unsigned, 0))) | |
550 | INSN(bnop, s, sbs7, branch, C64XP, | |
551 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_MCNOP, | |
552 | FIX0(), | |
553 | OP2(OLCST, OACST), | |
554 | ENC3(ENC(s, fu, 0), ENC(cst, pcrel_half, 0), ENC(n, ucst, 1))) | |
555 | INSN(bnop, s, sbu8c, branch, C64XP, | |
556 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_MCNOP|TIC6X_FLAG_INSN16_SPRED, | |
557 | FIX0(), | |
558 | OP2(OLCST, OHWCST5), | |
559 | ENC2(ENC(s, fu, 0), ENC(cst, pcrel_half_unsigned, 0))) | |
560 | INSN(bnop, s, sbs7c, branch, C64XP, | |
561 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_MCNOP|TIC6X_FLAG_INSN16_SPRED, | |
562 | FIX0(), | |
563 | OP2(OLCST, OACST), | |
564 | ENC3(ENC(s, fu, 0), ENC(cst, pcrel_half, 0), ENC(n, ucst, 1))) | |
565 | INSN(bnop, s, sx1b, branch, C64XP, | |
566 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_MCNOP, | |
567 | FIX0(), | |
568 | OP2(ORREG1BNORS, OACST), | |
569 | ENC3(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(n, ucst, 1))) | |
570 | /**/ | |
571 | ||
40b36596 JM |
572 | INSN(bpos, s, bpos, branch, C64X, TIC6X_FLAG_NO_CROSS, |
573 | FIX0(), | |
574 | OP2(OLCST, ORREG1), | |
575 | ENC3(ENC(s, fu, 0), ENC(src, pcrel, 0), ENC(dst, reg, 1))) | |
576 | ||
577 | INSN(call, s, ext_branch_cond_imm, branch, C62X, | |
578 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_MACRO|TIC6X_FLAG_CALL, | |
579 | FIX0(), | |
580 | OP1(OLCST), | |
581 | ENC2(ENC(s, fu, 0), ENC(cst, pcrel, 0))) | |
582 | INSN(call, s, branch, branch, C62X, | |
583 | TIC6X_FLAG_SIDE_B_ONLY|TIC6X_FLAG_MACRO|TIC6X_FLAG_CALL, | |
584 | FIX1(FIX(s, 1)), | |
585 | OP1(ORXREG1), | |
586 | ENC2(ENC(x, xpath, 0), ENC(src2, reg, 0))) | |
587 | INSN(call, s, b_irp, branch, C62X, | |
588 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_SIDE_B_ONLY|TIC6X_FLAG_MACRO|TIC6X_FLAG_CALL, | |
589 | FIX3(FIX(s, 1), FIX(x, 0), FIX(dst, 0)), | |
590 | OP1(ORIRP1), | |
591 | ENC0()) | |
592 | INSN(call, s, b_nrp, branch, C62X, | |
593 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_SIDE_B_ONLY|TIC6X_FLAG_MACRO|TIC6X_FLAG_CALL, | |
594 | FIX3(FIX(s, 1), FIX(x, 0), FIX(dst, 0)), | |
595 | OP1(ORNRP1), | |
596 | ENC0()) | |
597 | ||
598 | INSN(callnop, s, branch_nop_cst, branch, C64X, | |
599 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_MACRO|TIC6X_FLAG_MCNOP|TIC6X_FLAG_CALL, | |
600 | FIX0(), | |
601 | OP2(OLCST, OACST), | |
602 | ENC3(ENC(s, fu, 0), ENC(src2, pcrel, 0), ENC(src1, ucst, 1))) | |
603 | INSN(callnop, nfu, s_branch_nop_cst, branch, C64XP, | |
604 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_MACRO|TIC6X_FLAG_MCNOP|TIC6X_FLAG_CALL, | |
605 | FIX1(FIX(s, 0)), | |
606 | OP2(OLCST, OACST), | |
607 | ENC2(ENC(src2, pcrel, 0), ENC(src1, ucst, 1))) | |
608 | INSN(callnop, s, branch_nop_reg, branch, C64X, | |
609 | TIC6X_FLAG_MACRO|TIC6X_FLAG_SIDE_B_ONLY|TIC6X_FLAG_MCNOP|TIC6X_FLAG_CALL, | |
610 | FIX1(FIX(s, 1)), | |
611 | OP2(ORXREG1, OACST), | |
612 | ENC3(ENC(x, xpath, 0), ENC(src2, reg, 0), ENC(src1, ucst, 1))) | |
613 | ||
51dcdd4d | 614 | |
40b36596 JM |
615 | INSN(callp, s, call_imm_nop, branch, C64XP, |
616 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_MCNOP, | |
617 | FIX1(FIX(z, 1)), | |
618 | OP2(OLCST, OWRETREG1), | |
619 | ENC2(ENC(s, fu, 0), ENC(cst, pcrel, 0))) | |
620 | ||
51dcdd4d NC |
621 | /* 16 bits insn format */ |
622 | INSN(callp, s, scs10, branch, C64XP, | |
623 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_MCNOP, | |
624 | FIX0(), | |
625 | OP2(OLCST, OWRETREG1), | |
626 | ENC2(ENC(s, fu, 0), ENC(cst, pcrel, 0))) | |
627 | /**/ | |
628 | ||
40b36596 JM |
629 | INSN(callret, s, ext_branch_cond_imm, branch, C62X, |
630 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_MACRO|TIC6X_FLAG_CALL|TIC6X_FLAG_RETURN, | |
631 | FIX0(), | |
632 | OP1(OLCST), | |
633 | ENC2(ENC(s, fu, 0), ENC(cst, pcrel, 0))) | |
634 | INSN(callret, s, branch, branch, C62X, | |
635 | TIC6X_FLAG_SIDE_B_ONLY|TIC6X_FLAG_MACRO|TIC6X_FLAG_CALL|TIC6X_FLAG_RETURN, | |
636 | FIX1(FIX(s, 1)), | |
637 | OP1(ORXREG1), | |
638 | ENC2(ENC(x, xpath, 0), ENC(src2, reg, 0))) | |
639 | INSN(callret, s, b_irp, branch, C62X, | |
640 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_SIDE_B_ONLY|TIC6X_FLAG_MACRO|TIC6X_FLAG_CALL|TIC6X_FLAG_RETURN, | |
641 | FIX3(FIX(s, 1), FIX(x, 0), FIX(dst, 0)), | |
642 | OP1(ORIRP1), | |
643 | ENC0()) | |
644 | INSN(callret, s, b_nrp, branch, C62X, | |
645 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_SIDE_B_ONLY|TIC6X_FLAG_MACRO|TIC6X_FLAG_CALL|TIC6X_FLAG_RETURN, | |
646 | FIX3(FIX(s, 1), FIX(x, 0), FIX(dst, 0)), | |
647 | OP1(ORNRP1), | |
648 | ENC0()) | |
649 | ||
650 | INSN(clr, s, field, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, | |
651 | FIX1(FIX(op, 0x3)), | |
652 | OP4(ORREG1, OACST, OACST, OWREG1), | |
653 | ENC5(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(csta, ucst, 1), | |
654 | ENC(cstb, ucst, 2), ENC(dst, reg, 3))) | |
655 | INSN(clr, s, 1_or_2_src, 1cycle, C62X, 0, | |
656 | FIX1(FIX(op, 0x3f)), | |
657 | OP3(ORXREG1, ORREG1, OWREG1), | |
658 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
659 | ENC(src1, reg, 1), ENC(dst, reg, 2))) | |
660 | ||
51dcdd4d NC |
661 | /* 16 bits insn */ |
662 | INSN(clr, s, sc5, 1cycle, C64XP, 0, | |
663 | FIX1(FIX(op, 2)), | |
664 | OP4(ORREG1, OACST, OACST, OWREG1), | |
665 | ENC5(ENC(s, fu, 0), ENC(srcdst, reg, 0), ENC(cst, ucst, 1), | |
666 | ENC(cst, ucst, 2), ENC(srcdst, reg, 3))) | |
667 | /**/ | |
668 | ||
40b36596 JM |
669 | INSNE(cmpeq, l_si_xsi_ui, l, 1_or_2_src, 1cycle, C62X, 0, |
670 | FIX1(FIX(op, 0x53)), | |
671 | OP3(ORREG1, ORXREG1, OWREG1), | |
672 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
673 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
674 | INSNE(cmpeq, l_s5_xsi_ui, l, 1_or_2_src, 1cycle, C62X, 0, | |
675 | FIX1(FIX(op, 0x52)), | |
676 | OP3(OACST, ORXREG1, OWREG1), | |
677 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, scst, 0), | |
678 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
679 | INSNE(cmpeq, l_xsi_sl_ui, l, 1_or_2_src, 1cycle, C62X, 0, | |
680 | FIX1(FIX(op, 0x51)), | |
681 | OP3(ORXREG1, ORREGL1, OWREG1), | |
682 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
683 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
684 | INSNE(cmpeq, l_s5_sl_ui, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, | |
685 | FIX2(FIX(op, 0x50), FIX(x, 0)), | |
686 | OP3(OACST, ORREGL1, OWREG1), | |
687 | ENC4(ENC(s, fu, 0), ENC(src1, scst, 0), ENC(src2, reg, 1), | |
688 | ENC(dst, reg, 2))) | |
689 | ||
51dcdd4d NC |
690 | /* 16 bits insn */ |
691 | INSN(cmpeq, l, lx3c, 1cycle, C64XP, TIC6X_FLAG_NO_CROSS, | |
692 | FIX0(), | |
693 | OP3(OACST, ORXREG1, OWREG1), | |
694 | ENC4(ENC(s, fu, 0), ENC(cst, ucst, 0), ENC(src2, reg, 1), | |
695 | ENC(dst, reg, 2))) | |
696 | ||
697 | INSN(cmpeq, l, l2c, 1cycle, C64XP, 0, | |
698 | FIX1(FIX(op, 3)), | |
699 | OP3(ORREG1, ORXREG1, OWREG1NORS), | |
700 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
701 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
702 | /**/ | |
703 | ||
40b36596 JM |
704 | INSN(cmpeq2, s, 1_or_2_src, 1cycle, C64X, 0, |
705 | FIX1(FIX(op, 0x1d)), | |
706 | OP3(ORREG1, ORXREG1, OWREG1), | |
707 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
708 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
709 | ||
710 | INSN(cmpeq4, s, 1_or_2_src, 1cycle, C64X, 0, | |
711 | FIX1(FIX(op, 0x1c)), | |
712 | OP3(ORREG1, ORXREG1, OWREG1), | |
713 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
714 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
715 | ||
716 | INSN(cmpeqdp, s, 1_or_2_src, dpcmp, C67X, 0, | |
717 | FIX1(FIX(op, 0x28)), | |
718 | OP3(ORREGD12, ORXREGD12, OWREG2), | |
719 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
720 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
721 | ||
722 | INSN(cmpeqsp, s, 1_or_2_src, 1cycle, C67X, 0, | |
723 | FIX1(FIX(op, 0x38)), | |
724 | OP3(ORREG1, ORXREG1, OWREG1), | |
725 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
726 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
727 | ||
728 | INSNE(cmpgt, l_si_xsi_ui, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_PREFER(1), | |
729 | FIX1(FIX(op, 0x47)), | |
730 | OP3(ORREG1, ORXREG1, OWREG1), | |
731 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
732 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
733 | INSNE(cmpgt, l_s5_xsi_ui, l, 1_or_2_src, 1cycle, C62X, 0, | |
734 | FIX1(FIX(op, 0x46)), | |
735 | OP3(OACST, ORXREG1, OWREG1), | |
736 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, scst, 0), | |
737 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
738 | INSNE(cmpgt, l_xsi_sl_ui, l, 1_or_2_src, 1cycle, C62X, 0, | |
739 | FIX1(FIX(op, 0x45)), | |
740 | OP3(ORXREG1, ORREGL1, OWREG1), | |
741 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
742 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
743 | INSNE(cmpgt, l_s5_sl_ui, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, | |
744 | FIX2(FIX(op, 0x44), FIX(x, 0)), | |
745 | OP3(OACST, ORREGL1, OWREG1), | |
746 | ENC4(ENC(s, fu, 0), ENC(src1, scst, 0), ENC(src2, reg, 1), | |
747 | ENC(dst, reg, 2))) | |
748 | INSNE(cmpgt, l_xsi_si_ui, l, 1_or_2_src, 1cycle, C62X, | |
749 | TIC6X_FLAG_MACRO|TIC6X_FLAG_PREFER(0), | |
750 | FIX1(FIX(op, 0x57)), | |
751 | OP3(ORXREG1, ORREG1, OWREG1), | |
752 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 1), | |
753 | ENC(src2, reg, 0), ENC(dst, reg, 2))) | |
754 | INSNE(cmpgt, l_xsi_s5_ui, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_MACRO, | |
755 | FIX1(FIX(op, 0x56)), | |
756 | OP3(ORXREG1, OACST, OWREG1), | |
757 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, scst, 1), | |
758 | ENC(src2, reg, 0), ENC(dst, reg, 2))) | |
759 | INSNE(cmpgt, l_sl_xsi_ui, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_MACRO, | |
760 | FIX1(FIX(op, 0x55)), | |
761 | OP3(ORREGL1, ORXREG1, OWREG1), | |
762 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 1), | |
763 | ENC(src2, reg, 0), ENC(dst, reg, 2))) | |
764 | INSNE(cmpgt, l_sl_s5_ui, l, 1_or_2_src, 1cycle, C62X, | |
765 | TIC6X_FLAG_MACRO|TIC6X_FLAG_NO_CROSS, | |
766 | FIX2(FIX(op, 0x54), FIX(x, 0)), | |
767 | OP3(ORREGL1, OACST, OWREG1), | |
768 | ENC4(ENC(s, fu, 0), ENC(src1, scst, 1), ENC(src2, reg, 0), | |
769 | ENC(dst, reg, 2))) | |
770 | ||
51dcdd4d NC |
771 | /* 16 bits insn */ |
772 | INSN(cmpgt, l, lx1c, 1cycle, C64XP, 0, | |
773 | FIX1(FIX(op, 1)), | |
774 | OP3(OACST, ORREG1, OWREG1), | |
775 | ENC4(ENC(s, fu, 0), ENC(cst, ucst, 0), ENC(src2, reg, 1), | |
776 | ENC(dst, reg, 2))) | |
777 | INSN(cmpgt, l, l2c, 1cycle, C64XP, 0, | |
778 | FIX1(FIX(op, 5)), | |
779 | OP3(ORREG1, ORXREG1, OWREG1NORS), | |
780 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
781 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
782 | /**/ | |
783 | ||
40b36596 JM |
784 | INSN(cmpgt2, s, 1_or_2_src, 1cycle, C64X, 0, |
785 | FIX1(FIX(op, 0x14)), | |
786 | OP3(ORREG1, ORXREG1, OWREG1), | |
787 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
788 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
789 | ||
790 | INSN(cmpgtdp, s, 1_or_2_src, dpcmp, C67X, 0, | |
791 | FIX1(FIX(op, 0x29)), | |
792 | OP3(ORREGD12, ORXREGD12, OWREG2), | |
793 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
794 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
795 | ||
796 | INSN(cmpgtsp, s, 1_or_2_src, 1cycle, C67X, 0, | |
797 | FIX1(FIX(op, 0x39)), | |
798 | OP3(ORREG1, ORXREG1, OWREG1), | |
799 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
800 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
801 | ||
802 | INSNE(cmpgtu, l_ui_xui_ui, l, 1_or_2_src, 1cycle, C62X, 0, | |
803 | FIX1(FIX(op, 0x4f)), | |
804 | OP3(ORREG1, ORXREG1, OWREG1), | |
805 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
806 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
807 | INSNE(cmpgtu, l_u4_xui_ui, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_PREFER(1), | |
808 | FIX2(FIX(op, 0x4e), RAN(src1, 0, 15)), | |
809 | OP3(OACST, ORXREG1, OWREG1), | |
810 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, ucst, 0), | |
811 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
812 | /* Although not mentioned in SPRUFE8, CMPGTU and CMPLTU support a | |
813 | 5-bit unsigned constant operand on C64X and above. */ | |
814 | INSNE(cmpgtu, l_u5_xui_ui, l, 1_or_2_src, 1cycle, C64X, 0, | |
815 | FIX2(FIX(op, 0x4e), RAN(src1, 16, 31)), | |
816 | OP3(OACST, ORXREG1, OWREG1), | |
817 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, ucst, 0), | |
818 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
819 | INSNE(cmpgtu, l_xui_ul_ui, l, 1_or_2_src, 1cycle, C62X, 0, | |
820 | FIX1(FIX(op, 0x4d)), | |
821 | OP3(ORXREG1, ORREGL1, OWREG1), | |
822 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
823 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
824 | INSNE(cmpgtu, l_u4_ul_ui, l, 1_or_2_src, 1cycle, C62X, | |
825 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_PREFER(1), | |
826 | FIX3(FIX(op, 0x4c), FIX(x, 0), RAN(src1, 0, 15)), | |
827 | OP3(OACST, ORREGL1, OWREG1), | |
828 | ENC4(ENC(s, fu, 0), ENC(src1, ucst, 0), ENC(src2, reg, 1), | |
829 | ENC(dst, reg, 2))) | |
830 | INSNE(cmpgtu, l_u5_ul_ui, l, 1_or_2_src, 1cycle, C64X, TIC6X_FLAG_NO_CROSS, | |
831 | FIX3(FIX(op, 0x4c), FIX(x, 0), RAN(src1, 16, 31)), | |
832 | OP3(OACST, ORREGL1, OWREG1), | |
833 | ENC4(ENC(s, fu, 0), ENC(src1, ucst, 0), ENC(src2, reg, 1), | |
834 | ENC(dst, reg, 2))) | |
835 | ||
51dcdd4d NC |
836 | /* 16 bits insn */ |
837 | INSN(cmpgtu, l, lx1c, 1cycle, C64XP, 0, | |
838 | FIX1(FIX(op, 3)), | |
839 | OP3(OACST, ORREG1, OWREG1), | |
840 | ENC4(ENC(s, fu, 0), ENC(cst, ucst, 0), ENC(src2, reg, 1), | |
841 | ENC(dst, reg, 2))) | |
842 | INSN(cmpgtu, l, l2c, 1cycle, C64XP, 0, | |
843 | FIX1(FIX(op, 7)), | |
844 | OP3(ORREG1, ORXREG1, OWREG1NORS), | |
845 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
846 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
847 | /**/ | |
848 | ||
40b36596 JM |
849 | INSN(cmpgtu4, s, 1_or_2_src, 1cycle, C64X, 0, |
850 | FIX1(FIX(op, 0x15)), | |
851 | OP3(ORREG1, ORXREG1, OWREG1), | |
852 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
853 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
854 | ||
855 | INSNE(cmplt, l_si_xsi_ui, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_PREFER(1), | |
856 | FIX1(FIX(op, 0x57)), | |
857 | OP3(ORREG1, ORXREG1, OWREG1), | |
858 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
859 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
860 | INSNE(cmplt, l_s5_xsi_ui, l, 1_or_2_src, 1cycle, C62X, 0, | |
861 | FIX1(FIX(op, 0x56)), | |
862 | OP3(OACST, ORXREG1, OWREG1), | |
863 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, scst, 0), | |
864 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
865 | INSNE(cmplt, l_xsi_sl_ui, l, 1_or_2_src, 1cycle, C62X, 0, | |
866 | FIX1(FIX(op, 0x55)), | |
867 | OP3(ORXREG1, ORREGL1, OWREG1), | |
868 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
869 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
870 | INSNE(cmplt, l_s5_sl_ui, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, | |
871 | FIX2(FIX(op, 0x54), FIX(x, 0)), | |
872 | OP3(OACST, ORREGL1, OWREG1), | |
873 | ENC4(ENC(s, fu, 0), ENC(src1, scst, 0), ENC(src2, reg, 1), | |
874 | ENC(dst, reg, 2))) | |
875 | INSNE(cmplt, l_xsi_si_ui, l, 1_or_2_src, 1cycle, C62X, | |
876 | TIC6X_FLAG_MACRO|TIC6X_FLAG_PREFER(0), | |
877 | FIX1(FIX(op, 0x47)), | |
878 | OP3(ORXREG1, ORREG1, OWREG1), | |
879 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 1), | |
880 | ENC(src2, reg, 0), ENC(dst, reg, 2))) | |
881 | INSNE(cmplt, l_xsi_s5_ui, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_MACRO, | |
882 | FIX1(FIX(op, 0x46)), | |
883 | OP3(ORXREG1, OACST, OWREG1), | |
884 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, scst, 1), | |
885 | ENC(src2, reg, 0), ENC(dst, reg, 2))) | |
886 | INSNE(cmplt, l_sl_xsi_ui, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_MACRO, | |
887 | FIX1(FIX(op, 0x45)), | |
888 | OP3(ORREGL1, ORXREG1, OWREG1), | |
889 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 1), | |
890 | ENC(src2, reg, 0), ENC(dst, reg, 2))) | |
891 | INSNE(cmplt, l_sl_s5_ui, l, 1_or_2_src, 1cycle, C62X, | |
892 | TIC6X_FLAG_MACRO|TIC6X_FLAG_NO_CROSS, | |
893 | FIX2(FIX(op, 0x44), FIX(x, 0)), | |
894 | OP3(ORREGL1, OACST, OWREG1), | |
895 | ENC4(ENC(s, fu, 0), ENC(src1, scst, 1), ENC(src2, reg, 0), | |
896 | ENC(dst, reg, 2))) | |
897 | ||
51dcdd4d NC |
898 | /* 16 bits insn */ |
899 | INSN(cmplt, l, lx1c, 1cycle, C64XP, 0, | |
900 | FIX1(FIX(op, 0)), | |
901 | OP3(OACST, ORREG1, OWREG1), | |
902 | ENC4(ENC(s, fu, 0), ENC(cst, ucst, 0), ENC(src2, reg, 1), | |
903 | ENC(dst, reg, 2))) | |
904 | INSN(cmplt, l, l2c, 1cycle, C64XP, 0, | |
905 | FIX1(FIX(op, 4)), | |
906 | OP3(ORREG1, ORXREG1, OWREG1NORS), | |
907 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
908 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
909 | /**/ | |
910 | ||
40b36596 JM |
911 | INSN(cmplt2, s, 1_or_2_src, 1cycle, C64X, TIC6X_FLAG_MACRO, |
912 | FIX1(FIX(op, 0x14)), | |
913 | OP3(ORXREG1, ORREG1, OWREG1), | |
914 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
915 | ENC(src1, reg, 1), ENC(dst, reg, 2))) | |
916 | ||
917 | INSN(cmpltdp, s, 1_or_2_src, dpcmp, C67X, 0, | |
918 | FIX1(FIX(op, 0x2a)), | |
919 | OP3(ORREGD12, ORXREGD12, OWREG2), | |
920 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
921 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
922 | ||
923 | INSN(cmpltsp, s, 1_or_2_src, 1cycle, C67X, 0, | |
924 | FIX1(FIX(op, 0x3a)), | |
925 | OP3(ORREG1, ORXREG1, OWREG1), | |
926 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
927 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
928 | ||
929 | INSNE(cmpltu, l_ui_xui_ui, l, 1_or_2_src, 1cycle, C62X, 0, | |
930 | FIX1(FIX(op, 0x5f)), | |
931 | OP3(ORREG1, ORXREG1, OWREG1), | |
932 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
933 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
934 | INSNE(cmpltu, l_u4_xui_ui, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_PREFER(1), | |
935 | FIX2(FIX(op, 0x5e), RAN(src1, 0, 15)), | |
936 | OP3(OACST, ORXREG1, OWREG1), | |
937 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, ucst, 0), | |
938 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
939 | INSNE(cmpltu, l_u5_xui_ui, l, 1_or_2_src, 1cycle, C64X, 0, | |
940 | FIX2(FIX(op, 0x5e), RAN(src1, 16, 31)), | |
941 | OP3(OACST, ORXREG1, OWREG1), | |
942 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, ucst, 0), | |
943 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
944 | INSNE(cmpltu, l_xui_ul_ui, l, 1_or_2_src, 1cycle, C62X, 0, | |
945 | FIX1(FIX(op, 0x5d)), | |
946 | OP3(ORXREG1, ORREGL1, OWREG1), | |
947 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
948 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
949 | INSNE(cmpltu, l_u4_ul_ui, l, 1_or_2_src, 1cycle, C62X, | |
950 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_PREFER(1), | |
951 | FIX3(FIX(op, 0x5c), FIX(x, 0), RAN(src1, 0, 15)), | |
952 | OP3(OACST, ORREGL1, OWREG1), | |
953 | ENC4(ENC(s, fu, 0), ENC(src1, ucst, 0), ENC(src2, reg, 1), | |
954 | ENC(dst, reg, 2))) | |
955 | INSNE(cmpltu, l_u5_ul_ui, l, 1_or_2_src, 1cycle, C64X, TIC6X_FLAG_NO_CROSS, | |
956 | FIX3(FIX(op, 0x5c), FIX(x, 0), RAN(src1, 16, 31)), | |
957 | OP3(OACST, ORREGL1, OWREG1), | |
958 | ENC4(ENC(s, fu, 0), ENC(src1, ucst, 0), ENC(src2, reg, 1), | |
959 | ENC(dst, reg, 2))) | |
960 | ||
51dcdd4d NC |
961 | /* 16 bits insn */ |
962 | INSN(cmpltu, l, lx1c, 1cycle, C64XP, 0, | |
963 | FIX1(FIX(op, 2)), | |
964 | OP3(OACST, ORREG1, OWREG1), | |
965 | ENC4(ENC(s, fu, 0), ENC(cst, ucst, 0), ENC(src2, reg, 1), | |
966 | ENC(dst, reg, 2))) | |
967 | INSN(cmpltu, l, l2c, 1cycle, C64XP, 0, | |
968 | FIX1(FIX(op, 6)), | |
969 | OP3(ORREG1, ORXREG1, OWREG1NORS), | |
970 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
971 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
972 | /**/ | |
973 | ||
40b36596 JM |
974 | INSN(cmpltu4, s, 1_or_2_src, 1cycle, C64X, TIC6X_FLAG_MACRO, |
975 | FIX1(FIX(op, 0x15)), | |
976 | OP3(ORXREG1, ORREG1, OWREG1), | |
977 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
978 | ENC(src1, reg, 1), ENC(dst, reg, 2))) | |
979 | ||
980 | INSN(cmpy, m, 1_or_2_src, 4cycle, C64XP, 0, | |
981 | FIX1(FIX(op, 0xa)), | |
982 | OP3(ORREG1, ORXREG1, OWREGD4), | |
983 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
984 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
985 | ||
986 | INSN(cmpyr, m, 1_or_2_src, 4cycle, C64XP, 0, | |
987 | FIX1(FIX(op, 0xb)), | |
988 | OP3(ORREG1, ORXREG1, OWREG4), | |
989 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
990 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
991 | ||
992 | INSN(cmpyr1, m, 1_or_2_src, 4cycle, C64XP, 0, | |
993 | FIX1(FIX(op, 0xc)), | |
994 | OP3(ORREG1, ORXREG1, OWREG4), | |
995 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
996 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
997 | ||
98d23bef | 998 | INSN(cmtl, d, 1_or_2_src, load, C64XP, |
40b36596 JM |
999 | TIC6X_FLAG_LOAD|TIC6X_FLAG_SIDE_B_ONLY|TIC6X_FLAG_SIDE_T2_ONLY|TIC6X_FLAG_NO_CROSS, |
1000 | FIX3(FIX(s, 1), FIX(op, 0xe), FIX(src1, 0)), | |
1001 | OP2(ORMEMDW, OWDREG5), | |
1002 | ENC2(ENC(src2, reg, 0), ENC(dst, reg, 1))) | |
1003 | ||
1004 | INSN(ddotp4, m, 1_or_2_src, 4cycle, C64XP, 0, | |
1005 | FIX1(FIX(op, 0x18)), | |
1006 | OP3(ORREG1, ORXREG1, OWREGD4), | |
1007 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1008 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1009 | ||
1010 | INSN(ddotph2, m, 1_or_2_src, 4cycle, C64XP, 0, | |
1011 | FIX1(FIX(op, 0x17)), | |
1012 | OP3(ORREGD1, ORXREG1, OWREGD4), | |
1013 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1014 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1015 | ||
1016 | INSN(ddotph2r, m, 1_or_2_src, 4cycle, C64XP, 0, | |
1017 | FIX1(FIX(op, 0x15)), | |
1018 | OP3(ORREGD1, ORXREG1, OWREG4), | |
1019 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1020 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1021 | ||
1022 | INSN(ddotpl2, m, 1_or_2_src, 4cycle, C64XP, 0, | |
1023 | FIX1(FIX(op, 0x16)), | |
1024 | OP3(ORREGD1, ORXREG1, OWREGD4), | |
1025 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1026 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1027 | ||
1028 | INSN(ddotpl2r, m, 1_or_2_src, 4cycle, C64XP, 0, | |
1029 | FIX1(FIX(op, 0x14)), | |
1030 | OP3(ORREGD1, ORXREG1, OWREG4), | |
1031 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1032 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1033 | ||
1034 | INSN(deal, m, unary, 1616_m, C64X, 0, | |
1035 | FIX1(FIX(op, 0x1d)), | |
1036 | OP2(ORXREG1, OWREG2), | |
1037 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
1038 | ENC(dst, reg, 1))) | |
1039 | ||
1040 | INSN(dint, nfu, dint, 1cycle, C64XP, 0, | |
1041 | FIX1(FIX(s, 0)), | |
1042 | OP0(), | |
1043 | ENC0()) | |
1044 | ||
1045 | INSN(dmv, s, ext_1_or_2_src, 1cycle, C64XP, 0, | |
1046 | FIX1(FIX(op, 0xb)), | |
1047 | OP3(ORREG1, ORXREG1, OWREGD1), | |
1048 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1049 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1050 | ||
1051 | INSNE(dotp2, m_s2_xs2_si, m, compound, 4cycle, C64X, 0, | |
1052 | FIX1(FIX(op, 0xc)), | |
1053 | OP3(ORREG1, ORXREG1, OWREG4), | |
1054 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1055 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1056 | INSNE(dotp2, m_s2_xs2_sll, m, compound, 4cycle, C64X, 0, | |
1057 | FIX1(FIX(op, 0xb)), | |
1058 | OP3(ORREG1, ORXREG1, OWREGD4), | |
1059 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1060 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1061 | ||
1062 | INSN(dotpn2, m, compound, 4cycle, C64X, 0, | |
1063 | FIX1(FIX(op, 0x9)), | |
1064 | OP3(ORREG1, ORXREG1, OWREG4), | |
1065 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1066 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1067 | ||
1068 | INSN(dotpnrsu2, m, compound, 4cycle, C64X, 0, | |
1069 | FIX1(FIX(op, 0x7)), | |
1070 | OP3(ORREG1, ORXREG1, OWREG4), | |
1071 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1072 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1073 | ||
1074 | INSN(dotpnrus2, m, compound, 4cycle, C64X, TIC6X_FLAG_MACRO, | |
1075 | FIX1(FIX(op, 0x7)), | |
1076 | OP3(ORXREG1, ORREG1, OWREG4), | |
1077 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
1078 | ENC(src1, reg, 1), ENC(dst, reg, 2))) | |
1079 | ||
1080 | INSN(dotprsu2, m, compound, 4cycle, C64X, 0, | |
1081 | FIX1(FIX(op, 0xd)), | |
1082 | OP3(ORREG1, ORXREG1, OWREG4), | |
1083 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1084 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1085 | ||
1086 | INSN(dotprus2, m, compound, 4cycle, C64X, TIC6X_FLAG_MACRO, | |
1087 | FIX1(FIX(op, 0xd)), | |
1088 | OP3(ORXREG1, ORREG1, OWREG4), | |
1089 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
1090 | ENC(src1, reg, 1), ENC(dst, reg, 2))) | |
1091 | ||
1092 | INSN(dotpsu4, m, compound, 4cycle, C64X, 0, | |
1093 | FIX1(FIX(op, 0x2)), | |
1094 | OP3(ORREG1, ORXREG1, OWREG4), | |
1095 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1096 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1097 | ||
1098 | INSN(dotpus4, m, compound, 4cycle, C64X, TIC6X_FLAG_MACRO, | |
1099 | FIX1(FIX(op, 0x2)), | |
1100 | OP3(ORXREG1, ORREG1, OWREG4), | |
1101 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
1102 | ENC(src1, reg, 1), ENC(dst, reg, 2))) | |
1103 | ||
1104 | INSN(dotpu4, m, compound, 4cycle, C64X, 0, | |
1105 | FIX1(FIX(op, 0x6)), | |
1106 | OP3(ORREG1, ORXREG1, OWREG4), | |
1107 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1108 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1109 | ||
1110 | INSN(dpack2, l, 1_or_2_src_noncond, 1cycle, C64XP, 0, | |
1111 | FIX1(FIX(op, 0x34)), | |
1112 | OP3(ORREG1, ORXREG1, OWREGD1), | |
1113 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1114 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1115 | ||
1116 | INSN(dpackx2, l, 1_or_2_src_noncond, 1cycle, C64XP, 0, | |
1117 | FIX1(FIX(op, 0x33)), | |
1118 | OP3(ORREG1, ORXREG1, OWREGD1), | |
1119 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1120 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1121 | ||
1122 | INSN(dpint, l, 1_or_2_src, 4cycle, C67X, TIC6X_FLAG_NO_CROSS, | |
795b8e6b | 1123 | FIX2(FIX(op, 0x8), FIX(x, 0)), |
40b36596 | 1124 | OP2(ORREGD1, OWREG4), |
795b8e6b NC |
1125 | ENC4(ENC(s, fu, 0), ENC(src2, regpair_msb, 0), ENC(src1, regpair_lsb, 0), |
1126 | ENC(dst, reg, 1))) | |
40b36596 JM |
1127 | |
1128 | INSN(dpsp, l, 1_or_2_src, 4cycle, C67X, TIC6X_FLAG_NO_CROSS, | |
795b8e6b | 1129 | FIX2(FIX(op, 0x9), FIX(x, 0)), |
40b36596 | 1130 | OP2(ORREGD1, OWREG4), |
795b8e6b NC |
1131 | ENC4(ENC(s, fu, 0), ENC(src2, regpair_msb, 0), ENC(src1, regpair_lsb, 0), |
1132 | ENC(dst, reg, 1))) | |
40b36596 JM |
1133 | |
1134 | INSN(dptrunc, l, 1_or_2_src, 4cycle, C67X, TIC6X_FLAG_NO_CROSS, | |
795b8e6b | 1135 | FIX2(FIX(op, 0x1), FIX(x, 0)), |
40b36596 | 1136 | OP2(ORREGD1, OWREG4), |
795b8e6b NC |
1137 | ENC4(ENC(s, fu, 0), ENC(src2, regpair_msb, 0), ENC(src1, regpair_lsb, 0), |
1138 | ENC(dst, reg, 1))) | |
40b36596 JM |
1139 | |
1140 | INSN(ext, s, field, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, | |
1141 | FIX1(FIX(op, 0x1)), | |
1142 | OP4(ORREG1, OACST, OACST, OWREG1), | |
1143 | ENC5(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(csta, ucst, 1), | |
1144 | ENC(cstb, ucst, 2), ENC(dst, reg, 3))) | |
1145 | INSN(ext, s, 1_or_2_src, 1cycle, C62X, 0, | |
1146 | FIX1(FIX(op, 0x2f)), | |
1147 | OP3(ORXREG1, ORREG1, OWREG1), | |
1148 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
1149 | ENC(src1, reg, 1), ENC(dst, reg, 2))) | |
1150 | ||
51dcdd4d NC |
1151 | /* 16 bits insn */ |
1152 | INSNE(ext, hwcst16, s, s2ext, 1cycle, C64XP, 0, | |
1153 | FIX1(FIX(op, 0x0)), | |
1154 | OP4(ORREG1, OHWCST16, OHWCST16, OWREG1), | |
1155 | ENC3(ENC(s, fu, 0), ENC(src, reg, 0), ENC(dst, reg, 3))) | |
1156 | INSNE(ext, hwcst24, s, s2ext, 1cycle, C64XP, 0, | |
1157 | FIX1(FIX(op, 0x1)), | |
1158 | OP4(ORREG1, OHWCST24, OHWCST24, OWREG1), | |
1159 | ENC3(ENC(s, fu, 0), ENC(src, reg, 0), ENC(dst, reg, 3))) | |
1160 | /**/ | |
1161 | ||
40b36596 JM |
1162 | INSN(extu, s, field, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, |
1163 | FIX1(FIX(op, 0x0)), | |
1164 | OP4(ORREG1, OACST, OACST, OWREG1), | |
1165 | ENC5(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(csta, ucst, 1), | |
1166 | ENC(cstb, ucst, 2), ENC(dst, reg, 3))) | |
1167 | INSN(extu, s, 1_or_2_src, 1cycle, C62X, 0, | |
1168 | FIX1(FIX(op, 0x2b)), | |
1169 | OP3(ORXREG1, ORREG1, OWREG1), | |
1170 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
1171 | ENC(src1, reg, 1), ENC(dst, reg, 2))) | |
1172 | ||
51dcdd4d NC |
1173 | /* 16 bits insn */ |
1174 | INSNE(extu, hwcst16, s, s2ext, 1cycle, C64XP, 0, | |
1175 | FIX1(FIX(op, 0x2)), | |
1176 | OP4(ORREG1, OHWCST16, OHWCST16, OWREG1), | |
1177 | ENC3(ENC(s, fu, 0), ENC(src, reg, 0), ENC(dst, reg, 3))) | |
1178 | INSNE(extu, hwcst24, s, s2ext, 1cycle, C64XP, 0, | |
1179 | FIX1(FIX(op, 0x3)), | |
1180 | OP4(ORREG1, OHWCST24, OHWCST24, OWREG1), | |
1181 | ENC3(ENC(s, fu, 0), ENC(src, reg, 0), ENC(dst, reg, 3))) | |
1182 | INSN(extu, s, sc5, 1cycle, C64XP, 0, | |
1183 | FIX1(FIX(op, 0)), | |
1184 | OP4(ORREG1, OACST, OHWCST31, OWREG1Z), | |
1185 | ENC3(ENC(s, fu, 0), ENC(srcdst, reg, 0), ENC(cst, ucst, 1))) | |
1186 | /**/ | |
1187 | ||
40b36596 JM |
1188 | INSN(gmpy, m, 1_or_2_src, 4cycle, C64XP, TIC6X_FLAG_NO_CROSS, |
1189 | FIX2(FIX(op, 0x1f), FIX(x, 0)), | |
1190 | OP3(ORREG1, ORREG1, OWREG4), | |
1191 | ENC4(ENC(s, fu, 0), ENC(src1, reg, 0), ENC(src2, reg, 1), | |
1192 | ENC(dst, reg, 2))) | |
1193 | ||
1194 | /* This instruction can be predicated as usual; SPRUFE8 is incorrect | |
1195 | where it shows the "z" field as fixed to 1. */ | |
1196 | INSN(gmpy4, m, compound, 4cycle, C64X, 0, | |
1197 | FIX1(FIX(op, 0x11)), | |
1198 | OP3(ORREG1, ORXREG1, OWREG4), | |
1199 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1200 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1201 | ||
1202 | INSN(idle, nfu, nop_idle, nop, C62X, TIC6X_FLAG_MCNOP, | |
1203 | FIX2(FIX(s, 0), FIX(op, 0xf)), | |
1204 | OP0(), | |
1205 | ENC0()) | |
1206 | ||
1207 | INSN(intdp, l, 1_or_2_src, intdp, C67X, 0, | |
1208 | FIX2(FIX(op, 0x39), FIX(src1, 0)), | |
1209 | OP2(ORXREG1, OWREGD45), | |
1210 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
1211 | ENC(dst, reg, 1))) | |
1212 | ||
1213 | INSN(intdpu, l, 1_or_2_src, intdp, C67X, 0, | |
1214 | FIX2(FIX(op, 0x3b), FIX(src1, 0)), | |
1215 | OP2(ORXREG1, OWREGD45), | |
1216 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
1217 | ENC(dst, reg, 1))) | |
1218 | ||
1219 | INSN(intsp, l, 1_or_2_src, 4cycle, C67X, 0, | |
1220 | FIX2(FIX(op, 0x4a), FIX(src1, 0)), | |
1221 | OP2(ORXREG1, OWREG4), | |
1222 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
1223 | ENC(dst, reg, 1))) | |
1224 | ||
1225 | INSN(intspu, l, 1_or_2_src, 4cycle, C67X, 0, | |
1226 | FIX2(FIX(op, 0x49), FIX(src1, 0)), | |
1227 | OP2(ORXREG1, OWREG4), | |
1228 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
1229 | ENC(dst, reg, 1))) | |
1230 | ||
1231 | INSN(ldb, d, load_store, load, C62X, | |
1232 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_PREFER(1), | |
1233 | FIX2(FIX(op, 2), FIX(r, 0)), | |
1234 | OP2(ORMEMSB, OWDREG5), | |
1235 | ENC6(ENC(s, data_fu, 0), ENC(y, fu, 0), ENC(mode, mem_mode, 0), | |
1236 | ENC(offsetR, mem_offset, 0), ENC(baseR, reg, 0), | |
1237 | ENC(srcdst, reg, 1))) | |
1238 | INSN(ldb, d, load_store_long, load, C62X, | |
1239 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_SIDE_B_ONLY|TIC6X_FLAG_PREFER(0), | |
1240 | FIX1(FIX(op, 2)), | |
1241 | OP2(ORMEMLB, OWDREG5), | |
1242 | ENC4(ENC(s, data_fu, 0), ENC(y, areg, 0), ENC(offsetR, ulcst_dpr_byte, 0), | |
1243 | ENC(dst, reg, 1))) | |
1244 | ||
51dcdd4d NC |
1245 | /* 16 bits insn */ |
1246 | INSN(ldb, d, doff4_dsz_x01, load, C64XP, | |
1247 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSITIVE), | |
1248 | FIX2(FIX(op, 1), FIX(sz, 1)), | |
1249 | OP2(ORMEMSB, OWTREG5), | |
1250 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 1), | |
1251 | ENC(ptr, reg_ptr, 0), ENC(cst, mem_offset, 0))) | |
1252 | INSN(ldb, d, dind_dsz_x01, load, C64XP, | |
1253 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(REG_POSITIVE), | |
1254 | FIX2(FIX(op, 1), FIX(sz, 1)), | |
1255 | OP2(ORMEMSB, OWTREG5), | |
1256 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 1), | |
1257 | ENC(ptr, reg_ptr, 0), ENC(src1, mem_offset, 0))) | |
1258 | INSN(ldb, d, dinc_dsz_x01, load, C64XP, | |
1259 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSTINCR), | |
1260 | FIX2(FIX(op, 1), FIX(sz, 1)), | |
1261 | OP2(ORMEMSB, OWTREG5), | |
1262 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 1), | |
1263 | ENC(ptr, reg_ptr, 0), ENC(cst, mem_offset_minus_one, 0))) | |
1264 | INSN(ldb, d, ddec_dsz_x01, load, C64XP, | |
1265 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(PREDECR), | |
1266 | FIX2(FIX(op, 1), FIX(sz, 1)), | |
1267 | OP2(ORMEMSB, OWTREG5), | |
1268 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 1), | |
1269 | ENC(ptr, reg_ptr, 0), ENC(cst, mem_offset_minus_one, 0))) | |
1270 | /**/ | |
1271 | ||
40b36596 JM |
1272 | INSN(ldbu, d, load_store, load, C62X, |
1273 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_PREFER(1), | |
1274 | FIX2(FIX(op, 1), FIX(r, 0)), | |
1275 | OP2(ORMEMSB, OWDREG5), | |
1276 | ENC6(ENC(s, data_fu, 0), ENC(y, fu, 0), ENC(mode, mem_mode, 0), | |
1277 | ENC(offsetR, mem_offset, 0), ENC(baseR, reg, 0), | |
1278 | ENC(srcdst, reg, 1))) | |
1279 | INSN(ldbu, d, load_store_long, load, C62X, | |
1280 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_SIDE_B_ONLY|TIC6X_FLAG_PREFER(0), | |
1281 | FIX1(FIX(op, 1)), | |
1282 | OP2(ORMEMLB, OWDREG5), | |
1283 | ENC4(ENC(s, data_fu, 0), ENC(y, areg, 0), ENC(offsetR, ulcst_dpr_byte, 0), | |
1284 | ENC(dst, reg, 1))) | |
1285 | ||
51dcdd4d NC |
1286 | /* 16 bits insn */ |
1287 | INSN(ldbu, d, dinc_dsz_000, load, C64XP, | |
1288 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSTINCR), | |
1289 | FIX2(FIX(op, 1), FIX(sz, 1)), | |
1290 | OP2(ORMEMSB, OWTREG5), | |
1291 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(cst, mem_offset_minus_one, 0), | |
1292 | ENC(ptr, reg_ptr, 0), ENC(srcdst, reg, 1))) | |
1293 | INSN(ldbu, d, dind_dsz_000, load, C64XP, | |
1294 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(REG_POSITIVE), | |
1295 | FIX2(FIX(op, 1), FIX(sz, 1)), | |
1296 | OP2(ORMEMSB, OWTREG5), | |
1297 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(src1, mem_offset, 0), | |
1298 | ENC(ptr, reg_ptr, 0), ENC(srcdst, reg, 1))) | |
1299 | INSN(ldbu, d, doff4_dsz_000, load, C64XP, | |
1300 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSITIVE), | |
1301 | FIX2(FIX(op, 1), FIX(sz, 1)), | |
1302 | OP2(ORMEMSB, OWTREG5), | |
1303 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(cst, mem_offset, 0), | |
1304 | ENC(ptr, reg_ptr, 0), ENC(srcdst, reg, 1))) | |
1305 | INSN(ldbu, d, ddec_dsz_000, load, C64XP, | |
1306 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(PREDECR), | |
1307 | FIX2(FIX(op, 1), FIX(sz, 1)), | |
1308 | OP2(ORMEMSB, OWTREG5), | |
1309 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(cst, mem_offset_minus_one, 0), | |
1310 | ENC(ptr, reg_ptr, 0), ENC(srcdst, reg, 1))) | |
1311 | /**/ | |
1312 | ||
40b36596 JM |
1313 | INSN(lddw, d, load_store, load, C64X_AND_C67X, |
1314 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS, | |
1315 | FIX2(FIX(op, 6), FIX(r, 1)), | |
1316 | OP2(ORMEMSD, OWDREGD5), | |
1317 | ENC6(ENC(s, data_fu, 0), ENC(y, fu, 0), ENC(mode, mem_mode, 0), | |
1318 | ENC(offsetR, mem_offset, 0), ENC(baseR, reg, 0), | |
1319 | ENC(srcdst, reg, 1))) | |
1320 | ||
51dcdd4d NC |
1321 | /* 16 bits insn */ |
1322 | INSN(lddw, d, dpp, load, C64XP, | |
e21e1a51 | 1323 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(PREINCR)|TIC6X_FLAG_INSN16_B15PTR|TIC6X_FLAG_INSN16_NORS, |
51dcdd4d NC |
1324 | FIX2(FIX(op, 1), FIX(dw, 1)), |
1325 | OP2(ORMEMSD, OWDREGD5), | |
1326 | ENC4(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 1), | |
1327 | ENC(cst, mem_offset_minus_one, 0))) | |
1328 | INSN(lddw, d, ddecdw, load, C64XP, | |
1329 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(PREDECR), | |
1330 | FIX3(FIX(op, 1), FIX(na, 0), FIX(sz, 0)), | |
1331 | OP2(ORMEMSD, OWTREGD5), | |
1332 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg_shift, 1), | |
1333 | ENC(ptr, reg_ptr, 0), ENC(cst, mem_offset_minus_one, 0))) | |
1334 | INSN(lddw, d, dincdw, load, C64XP, | |
1335 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSTINCR), | |
1336 | FIX3(FIX(op, 1), FIX(na, 0), FIX(sz, 0)), | |
1337 | OP2(ORMEMSD, OWTREGD5), | |
1338 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg_shift, 1), | |
1339 | ENC(ptr, reg_ptr, 0), ENC(cst, mem_offset_minus_one, 0))) | |
1340 | INSN(lddw, d, dinddw, load, C64XP, | |
1341 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(REG_POSITIVE), | |
1342 | FIX3(FIX(op, 1), FIX(na, 0), FIX(sz, 0)), | |
1343 | OP2(ORMEMSD, OWTREGD5), | |
1344 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(src1, mem_offset, 0), | |
1345 | ENC(ptr, reg_ptr, 0), ENC(srcdst, reg_shift, 1))) | |
1346 | INSN(lddw, d, doff4dw, load, C64XP, | |
1347 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSITIVE), | |
1348 | FIX3(FIX(op, 1), FIX(na, 0), FIX(sz, 0)), | |
1349 | OP2(ORMEMSD, OWTREGD5), | |
1350 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(cst, mem_offset, 0), | |
1351 | ENC(ptr, reg_ptr, 0), ENC(srcdst, reg_shift, 1))) | |
1352 | /**/ | |
1353 | ||
40b36596 JM |
1354 | INSN(ldh, d, load_store, load, C62X, |
1355 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_PREFER(1), | |
1356 | FIX2(FIX(op, 4), FIX(r, 0)), | |
1357 | OP2(ORMEMSH, OWDREG5), | |
1358 | ENC6(ENC(s, data_fu, 0), ENC(y, fu, 0), ENC(mode, mem_mode, 0), | |
1359 | ENC(offsetR, mem_offset, 0), ENC(baseR, reg, 0), | |
1360 | ENC(srcdst, reg, 1))) | |
1361 | INSN(ldh, d, load_store_long, load, C62X, | |
1362 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_SIDE_B_ONLY|TIC6X_FLAG_PREFER(0), | |
1363 | FIX1(FIX(op, 4)), | |
1364 | OP2(ORMEMLH, OWDREG5), | |
1365 | ENC4(ENC(s, data_fu, 0), ENC(y, areg, 0), ENC(offsetR, ulcst_dpr_half, 0), | |
1366 | ENC(dst, reg, 1))) | |
1367 | ||
51dcdd4d NC |
1368 | /* 16 bits insn */ |
1369 | INSN(ldh, d, doff4_dsz_x11, load, C64XP, | |
1370 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSITIVE), | |
1371 | FIX2(FIX(op, 1), FIX(sz, 1)), | |
1372 | OP2(ORMEMSH, OWTREG5), | |
1373 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(cst, mem_offset, 0), | |
1374 | ENC(ptr, reg_ptr, 0), ENC(srcdst, reg, 1))) | |
1375 | INSN(ldh, d, dind_dsz_x11, load, C64XP, | |
1376 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(REG_POSITIVE), | |
1377 | FIX2(FIX(op, 1), FIX(sz, 1)), | |
1378 | OP2(ORMEMSH, OWTREG5), | |
1379 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 1), | |
1380 | ENC(ptr, reg_ptr, 0), ENC(src1, mem_offset, 0))) | |
1381 | INSN(ldh, d, dinc_dsz_x11, load, C64XP, | |
1382 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSTINCR), | |
1383 | FIX2(FIX(op, 1), FIX(sz, 1)), | |
1384 | OP2(ORMEMSH, OWTREG5), | |
1385 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 1), | |
1386 | ENC(ptr, reg_ptr, 0), ENC(cst, mem_offset_minus_one, 0))) | |
1387 | INSN(ldh, d, ddec_dsz_x11, load, C64XP, | |
1388 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(PREDECR), | |
1389 | FIX2(FIX(op, 1), FIX(sz, 1)), | |
1390 | OP2(ORMEMSH, OWTREG5), | |
1391 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 1), | |
1392 | ENC(ptr, reg_ptr, 0), ENC(cst, mem_offset_minus_one, 0))) | |
1393 | /**/ | |
1394 | ||
40b36596 JM |
1395 | INSN(ldhu, d, load_store, load, C62X, |
1396 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_PREFER(1), | |
1397 | FIX2(FIX(op, 0), FIX(r, 0)), | |
1398 | OP2(ORMEMSH, OWDREG5), | |
1399 | ENC6(ENC(s, data_fu, 0), ENC(y, fu, 0), ENC(mode, mem_mode, 0), | |
1400 | ENC(offsetR, mem_offset, 0), ENC(baseR, reg, 0), | |
1401 | ENC(srcdst, reg, 1))) | |
1402 | INSN(ldhu, d, load_store_long, load, C62X, | |
1403 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_SIDE_B_ONLY|TIC6X_FLAG_PREFER(0), | |
1404 | FIX1(FIX(op, 0)), | |
1405 | OP2(ORMEMLH, OWDREG5), | |
1406 | ENC4(ENC(s, data_fu, 0), ENC(y, areg, 0), ENC(offsetR, ulcst_dpr_half, 0), | |
1407 | ENC(dst, reg, 1))) | |
1408 | ||
51dcdd4d NC |
1409 | /* 16 bits insn */ |
1410 | INSN(ldhu, d, doff4_dsz_010, load, C64XP, | |
1411 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSITIVE), | |
1412 | FIX2(FIX(op, 1), FIX(sz, 1)), | |
1413 | OP2(ORMEMSH, OWTREG5), | |
1414 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(cst, mem_offset, 0), | |
1415 | ENC(ptr, reg_ptr, 0), ENC(srcdst, reg, 1))) | |
1416 | INSN(ldhu, d, dind_dsz_010, load, C64XP, | |
1417 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(REG_POSITIVE), | |
1418 | FIX2(FIX(op, 1), FIX(sz, 1)), | |
1419 | OP2(ORMEMSH, OWTREG5), | |
1420 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 1), | |
1421 | ENC(ptr, reg_ptr, 0), ENC(src1, mem_offset, 0))) | |
1422 | INSN(ldhu, d, dinc_dsz_010, load, C64XP, | |
1423 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSTINCR), | |
1424 | FIX2(FIX(op, 1), FIX(sz, 1)), | |
1425 | OP2(ORMEMSH, OWTREG5), | |
1426 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 1), | |
1427 | ENC(ptr, reg_ptr, 0), ENC(cst, mem_offset_minus_one, 0))) | |
1428 | INSN(ldhu, d, ddec_dsz_010, load, C64XP, | |
1429 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(PREDECR), | |
1430 | FIX2(FIX(op, 1), FIX(sz, 1)), | |
1431 | OP2(ORMEMSH, OWTREG5), | |
1432 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 1), | |
1433 | ENC(ptr, reg_ptr, 0), ENC(cst, mem_offset_minus_one, 0))) | |
1434 | /**/ | |
1435 | ||
40b36596 JM |
1436 | INSN(ldndw, d, load_nonaligned, load, C64X, |
1437 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_UNALIGNED, | |
1438 | FIX0(), | |
1439 | OP2(ORMEMND, OWDREGD5), | |
1440 | ENC7(ENC(s, data_fu, 0), ENC(y, fu, 0), ENC(mode, mem_mode, 0), | |
1441 | ENC(offsetR, mem_offset_noscale, 0), ENC(baseR, reg, 0), | |
1442 | ENC(sc, scaled, 0), ENC(dst, reg_shift, 1))) | |
1443 | ||
51dcdd4d NC |
1444 | /* 16 bits insn */ |
1445 | INSN(ldndw, d, ddecdw, load, C64XP, | |
1446 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(PREDECR), | |
1447 | FIX3(FIX(op, 1), FIX(na, 1), FIX(sz, 0)), | |
1448 | OP2(ORMEMND, OWTREGD5), | |
1449 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg_shift, 1), | |
1450 | ENC(ptr, reg_ptr, 0), ENC(cst, mem_offset_minus_one_noscale, 0))) | |
1451 | INSN(ldndw, d, dincdw, load, C64XP, | |
1452 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSTINCR), | |
1453 | FIX3(FIX(op, 1), FIX(na, 1), FIX(sz, 0)), | |
1454 | OP2(ORMEMND, OWTREGD5), | |
1455 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg_shift, 1), | |
1456 | ENC(ptr, reg_ptr, 0), ENC(cst, mem_offset_minus_one_noscale, 0))) | |
1457 | INSN(ldndw, d, dinddw, load, C64XP, | |
1458 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_UNALIGNED|TIC6X_FLAG_INSN16_MEM_MODE(REG_POSITIVE), | |
1459 | FIX3(FIX(op, 1), FIX(na, 1), FIX(sz, 0)), | |
1460 | OP2(ORMEMND, OWTREGD5), | |
1461 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(src1, mem_offset_noscale, 0), | |
1462 | ENC(ptr, reg_ptr, 0), ENC(srcdst, reg_shift, 1))) | |
1463 | INSN(ldndw, d, doff4dw, load, C64XP, | |
1464 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_UNALIGNED|TIC6X_FLAG_INSN16_MEM_MODE(POSITIVE), | |
1465 | FIX3(FIX(op, 1), FIX(na, 1), FIX(sz, 0)), | |
1466 | OP2(ORMEMND, OWTREGD5), | |
1467 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(cst, mem_offset_noscale, 0), | |
1468 | ENC(ptr, reg_ptr, 0), ENC(srcdst, reg_shift, 1))) | |
1469 | /**/ | |
1470 | ||
40b36596 JM |
1471 | INSN(ldnw, d, load_store, load, C64X, |
1472 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_UNALIGNED, | |
1473 | FIX2(FIX(op, 3), FIX(r, 1)), | |
1474 | OP2(ORMEMSW, OWDREG5), | |
1475 | ENC6(ENC(s, data_fu, 0), ENC(y, fu, 0), ENC(mode, mem_mode, 0), | |
1476 | ENC(offsetR, mem_offset, 0), ENC(baseR, reg, 0), | |
1477 | ENC(srcdst, reg, 1))) | |
1478 | ||
51dcdd4d | 1479 | /* 16 bits insn */ |
e21e1a51 NC |
1480 | INSN(ldnw, d, doff4_dsz_110, load, C64XP, |
1481 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSITIVE), | |
51dcdd4d NC |
1482 | FIX2(FIX(op, 1), FIX(sz, 1)), |
1483 | OP2(ORMEMSW, OWTREG5), | |
1484 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 1), | |
1485 | ENC(ptr, reg_ptr, 0), ENC(cst, mem_offset, 0))) | |
1486 | INSN(ldnw, d, dind_dsz_110, load, C64XP, | |
1487 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(REG_POSITIVE), | |
1488 | FIX2(FIX(op, 1), FIX(sz, 1)), | |
1489 | OP2(ORMEMSW, OWTREG5), | |
1490 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 1), | |
1491 | ENC(ptr, reg_ptr, 0), ENC(src1, mem_offset, 0))) | |
1492 | INSN(ldnw, d, dinc_dsz_110, load, C64XP, | |
1493 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSTINCR), | |
1494 | FIX2(FIX(op, 1), FIX(sz, 1)), | |
1495 | OP2(ORMEMSW, OWTREG5), | |
1496 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 1), | |
1497 | ENC(ptr, reg_ptr, 0), ENC(cst, mem_offset_minus_one, 0))) | |
1498 | INSN(ldnw, d, ddec_dsz_110, load, C64XP, | |
1499 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(PREDECR), | |
1500 | FIX2(FIX(op, 1), FIX(sz, 1)), | |
1501 | OP2(ORMEMSW, OWTREG5), | |
1502 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 1), | |
1503 | ENC(ptr, reg_ptr, 0), ENC(cst, mem_offset_minus_one, 0))) | |
1504 | /**/ | |
1505 | ||
40b36596 JM |
1506 | INSN(ldw, d, load_store, load, C62X, |
1507 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_PREFER(1), | |
1508 | FIX2(FIX(op, 6), FIX(r, 0)), | |
1509 | OP2(ORMEMSW, OWDREG5), | |
1510 | ENC6(ENC(s, data_fu, 0), ENC(y, fu, 0), ENC(mode, mem_mode, 0), | |
1511 | ENC(offsetR, mem_offset, 0), ENC(baseR, reg, 0), | |
1512 | ENC(srcdst, reg, 1))) | |
1513 | INSN(ldw, d, load_store_long, load, C62X, | |
1514 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_SIDE_B_ONLY|TIC6X_FLAG_PREFER(0), | |
1515 | FIX1(FIX(op, 6)), | |
1516 | OP2(ORMEMLW, OWDREG5), | |
1517 | ENC4(ENC(s, data_fu, 0), ENC(y, areg, 0), ENC(offsetR, ulcst_dpr_word, 0), | |
1518 | ENC(dst, reg, 1))) | |
1519 | ||
51dcdd4d NC |
1520 | /* 16 bits insn */ |
1521 | INSN(ldw, d, doff4_dsz_0xx, load, C64XP, | |
1522 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSITIVE), | |
1523 | FIX2(FIX(op, 1), FIX(sz, 0)), | |
1524 | OP2(ORMEMSW, OWTREG5), | |
1525 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 1), | |
1526 | ENC(ptr, reg_ptr, 0), ENC(cst, mem_offset, 0))) | |
1527 | INSN(ldw, d, doff4_dsz_100, load, C64XP, | |
1528 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSITIVE), | |
1529 | FIX2(FIX(op, 1), FIX(sz, 1)), | |
1530 | OP2(ORMEMSW, OWTREG5), | |
1531 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 1), | |
1532 | ENC(ptr, reg_ptr, 0), ENC(cst, mem_offset, 0))) | |
1533 | INSN(ldw, d, dind_dsz_0xx, load, C64XP, | |
1534 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(REG_POSITIVE), | |
1535 | FIX2(FIX(op, 1), FIX(sz, 0)), | |
1536 | OP2(ORMEMSW, OWTREG5), | |
1537 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 1), | |
1538 | ENC(ptr, reg_ptr, 0), ENC(src1, mem_offset, 0))) | |
1539 | INSN(ldw, d, dind_dsz_100, load, C64XP, | |
1540 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(REG_POSITIVE), | |
1541 | FIX2(FIX(op, 1), FIX(sz, 1)), | |
1542 | OP2(ORMEMSW, OWTREG5), | |
1543 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 1), | |
1544 | ENC(ptr, reg_ptr, 0), ENC(src1, mem_offset, 0))) | |
1545 | INSN(ldw, d, dinc_dsz_0xx, load, C64XP, | |
1546 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSTINCR), | |
1547 | FIX2(FIX(op, 1), FIX(sz, 0)), | |
1548 | OP2(ORMEMSW, OWTREG5), | |
1549 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 1), | |
1550 | ENC(ptr, reg_ptr, 0), ENC(cst, mem_offset_minus_one, 0))) | |
1551 | INSN(ldw, d, dinc_dsz_100, load, C64XP, | |
1552 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSTINCR), | |
1553 | FIX2(FIX(op, 1), FIX(sz, 1)), | |
1554 | OP2(ORMEMSW, OWTREG5), | |
1555 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 1), | |
1556 | ENC(ptr, reg_ptr, 0), ENC(cst, mem_offset_minus_one, 0))) | |
1557 | INSN(ldw, d, ddec_dsz_0xx, load, C64XP, | |
1558 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(PREDECR), | |
1559 | FIX2(FIX(op, 1), FIX(sz, 0)), | |
1560 | OP2(ORMEMSW, OWTREG5), | |
1561 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 1), | |
1562 | ENC(ptr, reg_ptr, 0), ENC(cst, mem_offset_minus_one, 0))) | |
1563 | INSN(ldw, d, ddec_dsz_100, load, C64XP, | |
1564 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(PREDECR), | |
1565 | FIX2(FIX(op, 1), FIX(sz, 1)), | |
1566 | OP2(ORMEMSW, OWTREG5), | |
1567 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 1), | |
1568 | ENC(ptr, reg_ptr, 0), ENC(cst, mem_offset_minus_one, 0))) | |
1569 | INSN(ldw, d, dpp, load, C64XP, | |
1570 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(PREINCR)|TIC6X_FLAG_INSN16_B15PTR|TIC6X_FLAG_INSN16_NORS, | |
1571 | FIX2(FIX(op, 1), FIX(dw, 0)), | |
1572 | OP2(ORMEMSW, OWTREG5), | |
1573 | ENC4(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 1), | |
1574 | ENC(cst, mem_offset_minus_one, 0))) | |
1575 | INSN(ldw, d, dstk, load, C64XP, | |
1576 | TIC6X_FLAG_LOAD|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSITIVE)|TIC6X_FLAG_INSN16_B15PTR, | |
1577 | FIX2(FIX(op, 0x1), FIX(s, 1)), | |
1578 | OP2(ORMEMSW, OWTREG5), | |
1579 | ENC4(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 1), | |
1580 | ENC(cst, mem_offset, 0))) | |
1581 | /**/ | |
1582 | ||
98d23bef | 1583 | INSN(ll, d, 1_or_2_src, load, C64XP, |
40b36596 JM |
1584 | TIC6X_FLAG_LOAD|TIC6X_FLAG_SIDE_B_ONLY|TIC6X_FLAG_SIDE_T2_ONLY|TIC6X_FLAG_NO_CROSS, |
1585 | FIX3(FIX(s, 1), FIX(op, 0xc), FIX(src1, 0)), | |
1586 | OP2(ORMEMDW, OWDREG5), | |
1587 | ENC2(ENC(src2, reg, 0), ENC(dst, reg, 1))) | |
1588 | ||
1589 | INSNE(lmbd, l_ui_xui_ui, l, 1_or_2_src, 1cycle, C62X, 0, | |
1590 | FIX1(FIX(op, 0x6b)), | |
1591 | OP3(ORREG1, ORXREG1, OWREG1), | |
1592 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1593 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1594 | INSNE(lmbd, l_s5_xui_ui, l, 1_or_2_src, 1cycle, C62X, 0, | |
1595 | FIX1(FIX(op, 0x6a)), | |
1596 | OP3(OACST, ORXREG1, OWREG1), | |
1597 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, scst, 0), | |
1598 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1599 | ||
1600 | INSN(max2, l, 1_or_2_src, 1cycle, C64X, 0, | |
1601 | FIX1(FIX(op, 0x42)), | |
1602 | OP3(ORREG1, ORXREG1, OWREG1), | |
1603 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1604 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1605 | INSN(max2, s, ext_1_or_2_src, 1cycle, C64XP, 0, | |
1606 | FIX1(FIX(op, 0xd)), | |
1607 | OP3(ORREG1, ORXREG1, OWREG1), | |
1608 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1609 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1610 | ||
1611 | INSN(maxu4, l, 1_or_2_src, 1cycle, C64X, 0, | |
1612 | FIX1(FIX(op, 0x43)), | |
1613 | OP3(ORREG1, ORXREG1, OWREG1), | |
1614 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1615 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1616 | ||
1617 | INSN(min2, l, 1_or_2_src, 1cycle, C64X, 0, | |
1618 | FIX1(FIX(op, 0x41)), | |
1619 | OP3(ORREG1, ORXREG1, OWREG1), | |
1620 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1621 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1622 | INSN(min2, s, ext_1_or_2_src, 1cycle, C64XP, 0, | |
1623 | FIX1(FIX(op, 0xc)), | |
1624 | OP3(ORREG1, ORXREG1, OWREG1), | |
1625 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1626 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1627 | ||
1628 | INSN(minu4, l, 1_or_2_src, 1cycle, C64X, 0, | |
1629 | FIX1(FIX(op, 0x48)), | |
1630 | OP3(ORREG1, ORXREG1, OWREG1), | |
1631 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1632 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1633 | ||
1634 | INSNE(mpy, m_sl16_xsl16_si, m, mpy, 1616_m, C62X, 0, | |
1635 | FIX1(FIX(op, 0x19)), | |
1636 | OP3(ORREG1, ORXREG1, OWREG2), | |
1637 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1638 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1639 | INSNE(mpy, m_s5_xsl16_si, m, mpy, 1616_m, C62X, 0, | |
1640 | FIX1(FIX(op, 0x18)), | |
1641 | OP3(OACST, ORXREG1, OWREG2), | |
1642 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, scst, 0), | |
1643 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1644 | ||
51dcdd4d NC |
1645 | /* 16-bit insn. */ |
1646 | INSN(mpy, m, m3_sat_0, 1616_m, C67X, 0, | |
1647 | FIX1(FIX(op, 0x0)), | |
1648 | OP3(ORREG1, ORXREG1, OWREG2), | |
1649 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1650 | ENC(src2, reg, 1), ENC(dst, reg_shift, 2))) | |
1651 | ||
165546ad NC |
1652 | INSN(mpydp, m, mpy, mpydp, C67X, 0, |
1653 | FIX1(FIX(op, 0x0e)), | |
1654 | OP3(ORREGD1234, ORXREGD1324, OWREGD910), | |
1655 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1656 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
40b36596 JM |
1657 | |
1658 | INSN(mpyh, m, mpy, 1616_m, C62X, 0, | |
1659 | FIX1(FIX(op, 0x01)), | |
1660 | OP3(ORREG1, ORXREG1, OWREG2), | |
1661 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1662 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1663 | ||
51dcdd4d NC |
1664 | /* 16 bits insn */ |
1665 | INSN(mpyh, m, m3_sat_0, 1616_m, C67X, 0, | |
1666 | FIX1(FIX(op, 0x1)), | |
1667 | OP3(ORREG1, ORXREG1, OWREG2), | |
1668 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1669 | ENC(src2, reg, 1), ENC(dst, reg_shift, 2))) | |
1670 | /**/ | |
1671 | ||
40b36596 JM |
1672 | INSN(mpyhi, m, compound, 4cycle, C64X, 0, |
1673 | FIX1(FIX(op, 0x14)), | |
1674 | OP3(ORREG1, ORXREG1, OWREGD4), | |
1675 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1676 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1677 | ||
1678 | INSN(mpyhir, m, compound, 4cycle, C64X, 0, | |
1679 | FIX1(FIX(op, 0x10)), | |
1680 | OP3(ORREG1, ORXREG1, OWREG4), | |
1681 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1682 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1683 | ||
1684 | INSN(mpyhl, m, mpy, 1616_m, C62X, 0, | |
1685 | FIX1(FIX(op, 0x09)), | |
1686 | OP3(ORREG1, ORXREG1, OWREG2), | |
1687 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1688 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1689 | ||
51dcdd4d NC |
1690 | /* 16 bits insn */ |
1691 | INSN(mpyhl, m, m3_sat_0, 1616_m, C67X, 0, | |
1692 | FIX1(FIX(op, 0x3)), | |
1693 | OP3(ORREG1, ORXREG1, OWREG2), | |
1694 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1695 | ENC(src2, reg, 1), ENC(dst, reg_shift, 2))) | |
1696 | /**/ | |
1697 | ||
40b36596 JM |
1698 | INSN(mpyhlu, m, mpy, 1616_m, C62X, 0, |
1699 | FIX1(FIX(op, 0x0f)), | |
1700 | OP3(ORREG1, ORXREG1, OWREG2), | |
1701 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1702 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1703 | ||
1704 | INSN(mpyhslu, m, mpy, 1616_m, C62X, 0, | |
1705 | FIX1(FIX(op, 0x0b)), | |
1706 | OP3(ORREG1, ORXREG1, OWREG2), | |
1707 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1708 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1709 | ||
1710 | INSN(mpyhsu, m, mpy, 1616_m, C62X, 0, | |
1711 | FIX1(FIX(op, 0x03)), | |
1712 | OP3(ORREG1, ORXREG1, OWREG2), | |
1713 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1714 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1715 | ||
1716 | INSN(mpyhu, m, mpy, 1616_m, C62X, 0, | |
1717 | FIX1(FIX(op, 0x07)), | |
1718 | OP3(ORREG1, ORXREG1, OWREG2), | |
1719 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1720 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1721 | ||
1722 | INSN(mpyhuls, m, mpy, 1616_m, C62X, 0, | |
1723 | FIX1(FIX(op, 0x0d)), | |
1724 | OP3(ORREG1, ORXREG1, OWREG2), | |
1725 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1726 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1727 | ||
1728 | INSN(mpyhus, m, mpy, 1616_m, C62X, 0, | |
1729 | FIX1(FIX(op, 0x05)), | |
1730 | OP3(ORREG1, ORXREG1, OWREG2), | |
1731 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1732 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1733 | ||
1734 | INSNE(mpyi, m_si_xsi_si, m, mpy, mpyi, C67X, 0, | |
1735 | FIX1(FIX(op, 0x04)), | |
1736 | OP3(ORREG14, ORXREG14, OWREG9), | |
1737 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1738 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1739 | INSNE(mpyi, m_s5_xsi_si, m, mpy, mpyi, C67X, 0, | |
1740 | FIX1(FIX(op, 0x06)), | |
1741 | OP3(OACST, ORXREG14, OWREG9), | |
1742 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, scst, 0), | |
1743 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1744 | ||
1745 | INSNE(mpyid, m_si_xsi_sll, m, mpy, mpyid, C67X, 0, | |
1746 | FIX1(FIX(op, 0x08)), | |
1747 | OP3(ORREG14, ORXREG14, OWREGD910), | |
1748 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1749 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1750 | INSNE(mpyid, m_s5_xsi_sll, m, mpy, mpyid, C67X, 0, | |
1751 | FIX1(FIX(op, 0x0c)), | |
1752 | OP3(OACST, ORXREG14, OWREGD910), | |
1753 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, scst, 0), | |
1754 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1755 | ||
1756 | INSN(mpyih, m, compound, 4cycle, C64X, TIC6X_FLAG_MACRO, | |
1757 | FIX1(FIX(op, 0x14)), | |
1758 | OP3(ORXREG1, ORREG1, OWREGD4), | |
1759 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
1760 | ENC(src1, reg, 1), ENC(dst, reg, 2))) | |
1761 | ||
1762 | INSN(mpyihr, m, compound, 4cycle, C64X, TIC6X_FLAG_MACRO, | |
1763 | FIX1(FIX(op, 0x10)), | |
1764 | OP3(ORXREG1, ORREG1, OWREG4), | |
1765 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
1766 | ENC(src1, reg, 1), ENC(dst, reg, 2))) | |
1767 | ||
1768 | INSN(mpyil, m, compound, 4cycle, C64X, TIC6X_FLAG_MACRO, | |
1769 | FIX1(FIX(op, 0x15)), | |
1770 | OP3(ORXREG1, ORREG1, OWREGD4), | |
1771 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
1772 | ENC(src1, reg, 1), ENC(dst, reg, 2))) | |
1773 | ||
1774 | INSN(mpyilr, m, compound, 4cycle, C64X, TIC6X_FLAG_MACRO, | |
1775 | FIX1(FIX(op, 0x0e)), | |
1776 | OP3(ORXREG1, ORREG1, OWREG4), | |
1777 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
1778 | ENC(src1, reg, 1), ENC(dst, reg, 2))) | |
1779 | ||
1780 | INSN(mpylh, m, mpy, 1616_m, C62X, 0, | |
1781 | FIX1(FIX(op, 0x11)), | |
1782 | OP3(ORREG1, ORXREG1, OWREG2), | |
1783 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1784 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1785 | ||
51dcdd4d NC |
1786 | /* 16 bits insn */ |
1787 | INSN(mpylh, m, m3_sat_0, 1616_m, C67X, 0, | |
1788 | FIX1(FIX(op, 0x2)), | |
1789 | OP3(ORREG1, ORXREG1, OWREG2), | |
1790 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1791 | ENC(src2, reg, 1), ENC(dst, reg_shift, 2))) | |
1792 | /**/ | |
1793 | ||
40b36596 JM |
1794 | INSN(mpylhu, m, mpy, 1616_m, C62X, 0, |
1795 | FIX1(FIX(op, 0x17)), | |
1796 | OP3(ORREG1, ORXREG1, OWREG2), | |
1797 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1798 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1799 | ||
1800 | INSN(mpyli, m, compound, 4cycle, C64X, 0, | |
1801 | FIX1(FIX(op, 0x15)), | |
1802 | OP3(ORREG1, ORXREG1, OWREGD4), | |
1803 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1804 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1805 | ||
1806 | INSN(mpylir, m, compound, 4cycle, C64X, 0, | |
1807 | FIX1(FIX(op, 0x0e)), | |
1808 | OP3(ORREG1, ORXREG1, OWREG4), | |
1809 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1810 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1811 | ||
1812 | INSN(mpylshu, m, mpy, 1616_m, C62X, 0, | |
1813 | FIX1(FIX(op, 0x13)), | |
1814 | OP3(ORREG1, ORXREG1, OWREG2), | |
1815 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1816 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1817 | ||
1818 | INSN(mpyluhs, m, mpy, 1616_m, C62X, 0, | |
1819 | FIX1(FIX(op, 0x15)), | |
1820 | OP3(ORREG1, ORXREG1, OWREG2), | |
1821 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1822 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1823 | ||
1824 | INSN(mpysp, m, mpy, 4cycle, C67X, 0, | |
1825 | FIX1(FIX(op, 0x1c)), | |
1826 | OP3(ORREG1, ORXREG1, OWREG4), | |
1827 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1828 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1829 | ||
1830 | /* Contrary to SPRU733A, MPYSPDP and MPYSP2DP are on both C67X and | |
1831 | C67X+. */ | |
1832 | INSN(mpyspdp, m, compound, mpyspdp, C67X, 0, | |
1833 | FIX1(FIX(op, 0x16)), | |
1834 | OP3(ORREG12, ORXREGD12, OWREGD67), | |
1835 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1836 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1837 | ||
1838 | INSN(mpysp2dp, m, compound, mpyspdp, C67X, 0, | |
1839 | FIX1(FIX(op, 0x17)), | |
1840 | OP3(ORREG1, ORXREG1, OWREGD45), | |
1841 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1842 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1843 | ||
1844 | INSNE(mpysu, m_sl16_xul16_si, m, mpy, 1616_m, C62X, 0, | |
1845 | FIX1(FIX(op, 0x1b)), | |
1846 | OP3(ORREG1, ORXREG1, OWREG2), | |
1847 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1848 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1849 | INSNE(mpysu, m_s5_xul16_si, m, mpy, 1616_m, C62X, 0, | |
1850 | FIX1(FIX(op, 0x1e)), | |
1851 | OP3(OACST, ORXREG1, OWREG2), | |
1852 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, scst, 0), | |
1853 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1854 | ||
1855 | INSN(mpysu4, m, compound, 4cycle, C64X, 0, | |
1856 | FIX1(FIX(op, 0x05)), | |
1857 | OP3(ORREG1, ORXREG1, OWREGD4), | |
1858 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1859 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1860 | ||
1861 | INSN(mpyu, m, mpy, 1616_m, C62X, 0, | |
1862 | FIX1(FIX(op, 0x1f)), | |
1863 | OP3(ORREG1, ORXREG1, OWREG2), | |
1864 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1865 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1866 | ||
1867 | INSN(mpyu4, m, compound, 4cycle, C64X, 0, | |
1868 | FIX1(FIX(op, 0x04)), | |
1869 | OP3(ORREG1, ORXREG1, OWREGD4), | |
1870 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1871 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1872 | ||
1873 | INSN(mpyus, m, mpy, 1616_m, C62X, 0, | |
1874 | FIX1(FIX(op, 0x1d)), | |
1875 | OP3(ORREG1, ORXREG1, OWREG2), | |
1876 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1877 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1878 | ||
1879 | INSN(mpyus4, m, compound, 4cycle, C64X, TIC6X_FLAG_MACRO, | |
1880 | FIX1(FIX(op, 0x05)), | |
1881 | OP3(ORXREG1, ORREG1, OWREGD4), | |
1882 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
1883 | ENC(src1, reg, 1), ENC(dst, reg, 2))) | |
1884 | ||
1885 | INSN(mpy2, m, compound, 4cycle, C64X, 0, | |
1886 | FIX1(FIX(op, 0x00)), | |
1887 | OP3(ORREG1, ORXREG1, OWREGD4), | |
1888 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1889 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1890 | ||
1891 | INSN(mpy2ir, m, 1_or_2_src, 4cycle, C64XP, 0, | |
1892 | FIX1(FIX(op, 0x0f)), | |
1893 | OP3(ORREG1, ORXREG1, OWREGD4), | |
1894 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1895 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1896 | ||
1897 | INSNE(mpy32, 32_32_32, m, mpy, 4cycle, C64XP, 0, | |
1898 | FIX1(FIX(op, 0x10)), | |
1899 | OP3(ORREG1, ORXREG1, OWREG4), | |
1900 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1901 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1902 | INSNE(mpy32, 32_32_64, m, mpy, 4cycle, C64XP, 0, | |
1903 | FIX1(FIX(op, 0x14)), | |
1904 | OP3(ORREG1, ORXREG1, OWREGD4), | |
1905 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1906 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1907 | ||
1908 | INSN(mpy32su, m, mpy, 4cycle, C64XP, 0, | |
1909 | FIX1(FIX(op, 0x16)), | |
1910 | OP3(ORREG1, ORXREG1, OWREGD4), | |
1911 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1912 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1913 | ||
1914 | INSN(mpy32u, m, compound, 4cycle, C64XP, 0, | |
1915 | FIX1(FIX(op, 0x18)), | |
1916 | OP3(ORREG1, ORXREG1, OWREGD4), | |
1917 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1918 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1919 | ||
1920 | INSN(mpy32us, m, compound, 4cycle, C64XP, 0, | |
1921 | FIX1(FIX(op, 0x19)), | |
1922 | OP3(ORREG1, ORXREG1, OWREGD4), | |
1923 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
1924 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
1925 | ||
1926 | /* "or" forms of "mv" are preferred over "add" forms when available | |
1927 | because "or" uses less power. However, 40-bit moves are only | |
1928 | available through "add", and before C64X D-unit moves are only | |
1929 | available through "add" (without cross paths being available). */ | |
1930 | INSNE(mv, l_xui_ui, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_MACRO, | |
1931 | FIX2(FIX(op, 0x7e), FIX(src1, 0)), | |
1932 | OP2(ORXREG1, OWREG1), | |
1933 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
1934 | ENC(dst, reg, 1))) | |
1935 | INSNE(mv, l_sl_sl, l, 1_or_2_src, 1cycle, C62X, | |
1936 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_MACRO, | |
1937 | FIX3(FIX(op, 0x20), FIX(x, 0), FIX(src1, 0)), | |
1938 | OP2(ORREGL1, OWREGL1), | |
1939 | ENC3(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(dst, reg, 1))) | |
1940 | INSNE(mv, s_xui_ui, s, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_MACRO, | |
1941 | FIX2(FIX(op, 0x1a), FIX(src1, 0)), | |
1942 | OP2(ORXREG1, OWREG1), | |
1943 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
1944 | ENC(dst, reg, 1))) | |
1945 | INSNE(mv, d_si_si, d, 1_or_2_src, 1cycle, C62X, | |
1946 | TIC6X_FLAG_MACRO|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_PREFER(0), | |
1947 | FIX2(FIX(op, 0x12), FIX(src1, 0)), | |
1948 | OP2(ORREG1, OWREG1), | |
1949 | ENC3(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(dst, reg, 1))) | |
1950 | INSNE(mv, d_xui_ui, d, ext_1_or_2_src, 1cycle, C64X, | |
1951 | TIC6X_FLAG_MACRO|TIC6X_FLAG_PREFER(1), | |
1952 | FIX2(FIX(op, 0x3), FIX(src1, 0)), | |
1953 | OP2(ORXREG1, OWREG1), | |
1954 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
1955 | ENC(dst, reg, 1))) | |
1956 | ||
51dcdd4d NC |
1957 | /* 16 bits insn */ |
1958 | INSNU(mv, l, lsdmvto, 1cycle, C64X, 0, | |
1959 | FIX1(FIX(unit, 0x0)), | |
1960 | OP2(ORXREG1, OWREG1), | |
1961 | ENC4(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(x, xpath, 0), ENC(dst, reg, 1))) | |
1962 | ||
1963 | INSNU(mv, s, lsdmvto, 1cycle, C64X, 0, | |
1964 | FIX1(FIX(unit, 0x1)), | |
1965 | OP2(ORXREG1, OWREG1), | |
1966 | ENC4(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(x, xpath, 0), ENC(dst, reg, 1))) | |
1967 | ||
1968 | INSNU(mv, d, lsdmvto, 1cycle, C64X, 0, | |
1969 | FIX1(FIX(unit, 0x2)), | |
1970 | OP2(ORXREG1, OWREG1), | |
1971 | ENC4(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(x, xpath, 0), ENC(dst, reg, 1))) | |
1972 | ||
1973 | INSNU(mv, l, lsdmvfr, 1cycle, C64X, 0, | |
1974 | FIX1(FIX(unit, 0x0)), | |
1975 | OP2(ORXREG1, OWREG1), | |
1976 | ENC4(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(x, xpath, 0), ENC(dst, reg, 1))) | |
1977 | ||
1978 | INSNU(mv, s, lsdmvfr, 1cycle, C64X, 0, | |
1979 | FIX1(FIX(unit, 0x1)), | |
1980 | OP2(ORXREG1, OWREG1), | |
1981 | ENC4(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(x, xpath, 0), ENC(dst, reg, 1))) | |
1982 | ||
1983 | INSNU(mv, d, lsdmvfr, 1cycle, C64X, 0, | |
1984 | FIX1(FIX(unit, 0x2)), | |
1985 | OP2(ORXREG1, OWREG1), | |
1986 | ENC4(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(x, xpath, 0), ENC(dst, reg, 1))) | |
1987 | /**/ | |
1988 | ||
40b36596 JM |
1989 | INSNE(mvc, from_cr, s, 1_or_2_src, 1cycle, C62X, |
1990 | TIC6X_FLAG_SIDE_B_ONLY|TIC6X_FLAG_NO_CROSS, | |
1991 | FIX3(FIX(s, 1), FIX(op, 0x0f), FIX(x, 0)), | |
1992 | OP2(ORCREG1, OWREG1), | |
1993 | ENC3(ENC(src1, crhi, 0), ENC(src2, crlo, 0), ENC(dst, reg, 1))) | |
1994 | INSNE(mvc, to_cr, s, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_SIDE_B_ONLY, | |
1995 | FIX2(FIX(s, 1), FIX(op, 0x0e)), | |
1996 | OP2(ORXREG1, OWCREG1), | |
1997 | ENC4(ENC(x, xpath, 0), ENC(src2, reg, 0), ENC(src1, crhi, 1), | |
1998 | ENC(dst, crlo, 1))) | |
1999 | ||
51dcdd4d NC |
2000 | /* 16 bits insn */ |
2001 | INSN(mvc, s, sx1, 1cycle, C64XP, | |
2002 | TIC6X_FLAG_NO_CROSS, | |
2003 | FIX1(FIX(op, 0x6)), | |
2004 | OP2(ORREG1B, OWILC1), | |
2005 | ENC2(ENC(s, fu, 0), ENC(srcdst, reg, 0))) | |
2006 | /**/ | |
2007 | ||
40b36596 JM |
2008 | INSN(mvd, m, unary, 4cycle, C64X, 0, |
2009 | FIX1(FIX(op, 0x1a)), | |
2010 | OP2(ORXREG1, OWREG4), | |
2011 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2012 | ENC(dst, reg, 1))) | |
2013 | ||
2014 | INSN(mvk, s, mvk, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, | |
2015 | FIX1(FIX(h, 0)), | |
2016 | OP2(OLCST, OWREG1), | |
2017 | ENC3(ENC(s, fu, 0), ENC(cst, scst, 0), ENC(dst, reg, 1))) | |
2018 | INSN(mvk, l, unary, 1cycle, C64X, TIC6X_FLAG_NO_CROSS, | |
2019 | FIX2(FIX(x, 0), FIX(op, 0x05)), | |
2020 | OP2(OACST, OWREG1), | |
2021 | ENC3(ENC(s, fu, 0), ENC(src2, scst, 0), ENC(dst, reg, 1))) | |
2022 | INSN(mvk, d, 1_or_2_src, 1cycle, C64X, TIC6X_FLAG_NO_CROSS, | |
2023 | FIX2(FIX(op, 0x00), FIX(src2, 0)), | |
2024 | OP2(OACST, OWREG1), | |
2025 | ENC3(ENC(s, fu, 0), ENC(src1, scst, 0), ENC(dst, reg, 1))) | |
2026 | ||
51dcdd4d NC |
2027 | /* 16 bits insn */ |
2028 | INSN(mvk, l, lx5, 1cycle, C64XP, TIC6X_FLAG_NO_CROSS, | |
2029 | FIX0(), | |
2030 | OP2(OLCST, OWREG1), | |
2031 | ENC3(ENC(s, fu, 0), ENC(cst, scst, 0), ENC(dst, reg, 1))) | |
2032 | INSN(mvk, s, smvk8, 1cycle, C64XP, TIC6X_FLAG_NO_CROSS, | |
2033 | FIX0(), | |
2034 | OP2(OLCST, OWREG1), | |
2035 | ENC3(ENC(s, fu, 0), ENC(cst, ucst, 0), ENC(dst, reg, 1))) | |
2036 | INSNU(mvk, l, lsdx1c, 1cycle, C64XP, TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_SPRED, | |
2037 | FIX1(FIX(unit, 0x0)), | |
2038 | OP2(OACST, OWREG1), | |
2039 | ENC3(ENC(s, fu, 0), ENC(cst, ucst, 0), ENC(dst, reg, 1))) | |
2040 | INSNU(mvk, s, lsdx1c, 1cycle, C64XP, TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_SPRED, | |
2041 | FIX1(FIX(unit, 0x1)), | |
2042 | OP2(OACST, OWREG1), | |
2043 | ENC3(ENC(s, fu, 0), ENC(cst, ucst, 0), ENC(dst, reg, 1))) | |
2044 | INSNU(mvk, d, lsdx1c, 1cycle, C64XP, TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_SPRED, | |
2045 | FIX1(FIX(unit, 0x2)), | |
2046 | OP2(OACST, OWREG1), | |
2047 | ENC3(ENC(s, fu, 0), ENC(cst, ucst, 0), ENC(dst, reg, 1))) | |
2048 | INSNUE(mvk, zero, l, lsdx1, 1cycle, C64XP, TIC6X_FLAG_NO_CROSS, | |
2049 | FIX2(FIX(op, 0), FIX(unit, 0x0)), | |
2050 | OP2(OHWCST0, OWREG1), | |
2051 | ENC2(ENC(s, fu, 0), ENC(srcdst, reg, 1))) | |
2052 | INSNUE(mvk, zero, s, lsdx1, 1cycle, C64XP, TIC6X_FLAG_NO_CROSS, | |
2053 | FIX2(FIX(op, 0), FIX(unit, 0x1)), | |
2054 | OP2(OHWCST0, OWREG1), | |
2055 | ENC2(ENC(s, fu, 0), ENC(srcdst, reg, 1))) | |
2056 | INSNUE(mvk, zero, d, lsdx1, 1cycle, C64XP, TIC6X_FLAG_NO_CROSS, | |
2057 | FIX2(FIX(op, 0), FIX(unit, 0x2)), | |
2058 | OP2(OHWCST0, OWREG1), | |
2059 | ENC2(ENC(s, fu, 0), ENC(srcdst, reg, 1))) | |
2060 | INSNUE(mvk, one, l, lsdx1, 1cycle, C64XP, TIC6X_FLAG_NO_CROSS, | |
2061 | FIX2(FIX(op, 1), FIX(unit, 0x0)), | |
2062 | OP2(OHWCST1, OWREG1), | |
2063 | ENC2(ENC(s, fu, 0), ENC(srcdst, reg, 1))) | |
2064 | INSNUE(mvk, one, s, lsdx1, 1cycle, C64XP, TIC6X_FLAG_NO_CROSS, | |
2065 | FIX2(FIX(op, 1), FIX(unit, 0x1)), | |
2066 | OP2(OHWCST1, OWREG1), | |
2067 | ENC2(ENC(s, fu, 0), ENC(srcdst, reg, 1))) | |
2068 | INSNUE(mvk, one, d, lsdx1, 1cycle, C64XP, TIC6X_FLAG_NO_CROSS, | |
2069 | FIX2(FIX(op, 1), FIX(unit, 0x2)), | |
2070 | OP2(OHWCST1, OWREG1), | |
2071 | ENC2(ENC(s, fu, 0), ENC(srcdst, reg, 1))) | |
2072 | /**/ | |
2073 | ||
40b36596 JM |
2074 | INSN(mvkh, s, mvk, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, |
2075 | FIX1(FIX(h, 1)), | |
2076 | OP2(OLCST, OWREG1), | |
2077 | ENC3(ENC(s, fu, 0), ENC(cst, lcst_high16, 0), ENC(dst, reg, 1))) | |
2078 | ||
2079 | INSN(mvklh, s, mvk, 1cycle, C62X, TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_MACRO, | |
2080 | FIX1(FIX(h, 1)), | |
2081 | OP2(OLCST, OWREG1), | |
2082 | ENC3(ENC(s, fu, 0), ENC(cst, lcst_low16, 0), ENC(dst, reg, 1))) | |
2083 | ||
2084 | INSN(mvkl, s, mvk, 1cycle, C62X, TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_MACRO, | |
2085 | FIX1(FIX(h, 0)), | |
2086 | OP2(OLCST, OWREG1), | |
2087 | ENC3(ENC(s, fu, 0), ENC(cst, lcst_low16, 0), ENC(dst, reg, 1))) | |
2088 | ||
2089 | INSNE(neg, s_xsi_si, s, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_MACRO, | |
2090 | FIX2(FIX(op, 0x16), FIX(src1, 0)), | |
2091 | OP2(ORXREG1, OWREG1), | |
2092 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2093 | ENC(dst, reg, 1))) | |
2094 | INSNE(neg, l_xsi_si, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_MACRO, | |
2095 | FIX2(FIX(op, 0x06), FIX(src1, 0)), | |
2096 | OP2(ORXREG1, OWREG1), | |
2097 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2098 | ENC(dst, reg, 1))) | |
2099 | INSNE(neg, l_sl_sl, l, 1_or_2_src, 1cycle, C62X, | |
2100 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_MACRO, | |
2101 | FIX2(FIX(op, 0x24), FIX(src1, 0)), | |
2102 | OP2(ORREGL1, OWREGL1), | |
2103 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2104 | ENC(dst, reg, 1))) | |
2105 | ||
2106 | INSN(nop, nfu, nop_idle, nop, C62X, 0, | |
2107 | FIX2(FIX(s, 0), RAN(op, 0, 8)), | |
2108 | OP1(OACST), | |
2109 | ENC1(ENC(op, ucst_minus_one, 0))) | |
2110 | INSNE(nop, 1, nfu, nop_idle, nop, C62X, TIC6X_FLAG_MACRO, | |
2111 | FIX2(FIX(s, 0), FIX(op, 0)), | |
2112 | OP0(), | |
2113 | ENC0()) | |
2114 | ||
51dcdd4d NC |
2115 | /* 16 bits insn */ |
2116 | /* contrary to sprufe8b.pdf p767, and accordingly to | |
2117 | * dis6x.exe output, unop3 opcode is decoded as NOP N3 + 1 */ | |
2118 | INSN(nop, nfu, unop, nop, C64XP, 0, | |
2119 | FIX0(), | |
2120 | OP1(OACST), | |
2121 | ENC1(ENC(n, ucst_minus_one, 0))) | |
2122 | /**/ | |
2123 | ||
40b36596 JM |
2124 | INSNE(norm, l_xsi_ui, l, 1_or_2_src, 1cycle, C62X, 0, |
2125 | FIX2(FIX(op, 0x63), FIX(src1, 0)), | |
2126 | OP2(ORXREG1, OWREG1), | |
2127 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2128 | ENC(dst, reg, 1))) | |
2129 | INSNE(norm, l_sl_ui, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, | |
2130 | FIX3(FIX(op, 0x60), FIX(x, 0), FIX(src1, 0)), | |
2131 | OP2(ORREGL1, OWREG1), | |
2132 | ENC3(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(dst, reg, 1))) | |
2133 | ||
2134 | INSN(not, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_MACRO, | |
2135 | FIX2(FIX(op, 0x6e), FIX(src1, 0x1f)), | |
2136 | OP2(ORXREG1, OWREG1), | |
2137 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2138 | ENC(dst, reg, 1))) | |
2139 | INSN(not, s, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_MACRO, | |
2140 | FIX2(FIX(op, 0x0a), FIX(src1, 0x1f)), | |
2141 | OP2(ORXREG1, OWREG1), | |
2142 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2143 | ENC(dst, reg, 1))) | |
2144 | INSN(not, d, ext_1_or_2_src, 1cycle, C64X, TIC6X_FLAG_MACRO, | |
2145 | FIX2(FIX(op, 0xf), FIX(src1, 0x1f)), | |
2146 | OP2(ORXREG1, OWREG1), | |
2147 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2148 | ENC(dst, reg, 1))) | |
2149 | ||
2150 | INSNE(or, d_ui_xui_ui, d, ext_1_or_2_src, 1cycle, C64X, 0, | |
2151 | FIX1(FIX(op, 0x2)), | |
2152 | OP3(ORREG1, ORXREG1, OWREG1), | |
2153 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2154 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2155 | INSNE(or, d_s5_xui_ui, d, ext_1_or_2_src, 1cycle, C64X, 0, | |
2156 | FIX1(FIX(op, 0x3)), | |
2157 | OP3(OACST, ORXREG1, OWREG1), | |
2158 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, scst, 0), | |
2159 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2160 | INSNE(or, l_ui_xui_ui, l, 1_or_2_src, 1cycle, C62X, 0, | |
2161 | FIX1(FIX(op, 0x7f)), | |
2162 | OP3(ORREG1, ORXREG1, OWREG1), | |
2163 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2164 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2165 | INSNE(or, l_s5_xui_ui, l, 1_or_2_src, 1cycle, C62X, 0, | |
2166 | FIX1(FIX(op, 0x7e)), | |
2167 | OP3(OACST, ORXREG1, OWREG1), | |
2168 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, scst, 0), | |
2169 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2170 | INSNE(or, s_ui_xui_ui, s, 1_or_2_src, 1cycle, C62X, 0, | |
2171 | FIX1(FIX(op, 0x1b)), | |
2172 | OP3(ORREG1, ORXREG1, OWREG1), | |
2173 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2174 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2175 | INSNE(or, s_s5_xui_ui, s, 1_or_2_src, 1cycle, C62X, 0, | |
2176 | FIX1(FIX(op, 0x1a)), | |
2177 | OP3(OACST, ORXREG1, OWREG1), | |
2178 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, scst, 0), | |
2179 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2180 | ||
51dcdd4d NC |
2181 | /* 16 bits insn */ |
2182 | INSN(or, l, l2c, 1cycle, C64XP, 0, | |
2183 | FIX1(FIX(op, 1)), | |
2184 | OP3(ORREG1, ORXREG1, OWREG1NORS), | |
2185 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2186 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2187 | /**/ | |
2188 | ||
40b36596 JM |
2189 | INSN(pack2, l, 1_or_2_src, 1cycle, C64X, 0, |
2190 | FIX1(FIX(op, 0x0)), | |
2191 | OP3(ORREG1, ORXREG1, OWREG1), | |
2192 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2193 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2194 | INSN(pack2, s, ext_1_or_2_src, 1cycle, C64X, 0, | |
2195 | FIX1(FIX(op, 0xf)), | |
2196 | OP3(ORREG1, ORXREG1, OWREG1), | |
2197 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2198 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2199 | ||
2200 | INSN(packh2, l, 1_or_2_src, 1cycle, C64X, 0, | |
2201 | FIX1(FIX(op, 0x1e)), | |
2202 | OP3(ORREG1, ORXREG1, OWREG1), | |
2203 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2204 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2205 | INSN(packh2, s, 1_or_2_src, 1cycle, C64X, 0, | |
2206 | FIX1(FIX(op, 0x9)), | |
2207 | OP3(ORREG1, ORXREG1, OWREG1), | |
2208 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2209 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2210 | ||
2211 | INSN(packh4, l, 1_or_2_src, 1cycle, C64X, 0, | |
2212 | FIX1(FIX(op, 0x69)), | |
2213 | OP3(ORREG1, ORXREG1, OWREG1), | |
2214 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2215 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2216 | ||
2217 | INSN(packhl2, l, 1_or_2_src, 1cycle, C64X, 0, | |
2218 | FIX1(FIX(op, 0x1c)), | |
2219 | OP3(ORREG1, ORXREG1, OWREG1), | |
2220 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2221 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2222 | INSN(packhl2, s, 1_or_2_src, 1cycle, C64X, 0, | |
2223 | FIX1(FIX(op, 0x8)), | |
2224 | OP3(ORREG1, ORXREG1, OWREG1), | |
2225 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2226 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2227 | ||
2228 | INSN(packlh2, l, 1_or_2_src, 1cycle, C64X, 0, | |
2229 | FIX1(FIX(op, 0x1b)), | |
2230 | OP3(ORREG1, ORXREG1, OWREG1), | |
2231 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2232 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2233 | INSN(packlh2, s, 1_or_2_src, 1cycle, C64X, 0, | |
2234 | FIX1(FIX(op, 0x10)), | |
2235 | OP3(ORREG1, ORXREG1, OWREG1), | |
2236 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2237 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2238 | ||
2239 | INSN(packl4, l, 1_or_2_src, 1cycle, C64X, 0, | |
2240 | FIX1(FIX(op, 0x68)), | |
2241 | OP3(ORREG1, ORXREG1, OWREG1), | |
2242 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2243 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2244 | ||
2245 | INSN(rcpdp, s, 1_or_2_src, 2cycle_dp, C67X, TIC6X_FLAG_NO_CROSS, | |
795b8e6b | 2246 | FIX2(FIX(op, 0x2d), FIX(x, 0)), |
40b36596 | 2247 | OP2(ORREGD1, OWREGD12), |
795b8e6b NC |
2248 | ENC4(ENC(s, fu, 0), ENC(src2, regpair_msb, 0), ENC(src1, regpair_lsb, 0), |
2249 | ENC(dst, reg, 1))) | |
40b36596 JM |
2250 | |
2251 | INSN(rcpsp, s, 1_or_2_src, 1cycle, C67X, 0, | |
2252 | FIX2(FIX(op, 0x3d), FIX(src1, 0)), | |
2253 | OP2(ORXREG1, OWREG1), | |
2254 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2255 | ENC(dst, reg, 1))) | |
2256 | ||
2257 | INSN(ret, s, ext_branch_cond_imm, branch, C62X, | |
2258 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_MACRO|TIC6X_FLAG_RETURN, | |
2259 | FIX0(), | |
2260 | OP1(OLCST), | |
2261 | ENC2(ENC(s, fu, 0), ENC(cst, pcrel, 0))) | |
2262 | INSN(ret, s, branch, branch, C62X, | |
2263 | TIC6X_FLAG_SIDE_B_ONLY|TIC6X_FLAG_MACRO|TIC6X_FLAG_RETURN, | |
2264 | FIX1(FIX(s, 1)), | |
2265 | OP1(ORXREG1), | |
2266 | ENC2(ENC(x, xpath, 0), ENC(src2, reg, 0))) | |
2267 | INSN(ret, s, b_irp, branch, C62X, | |
2268 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_SIDE_B_ONLY|TIC6X_FLAG_MACRO|TIC6X_FLAG_RETURN, | |
2269 | FIX3(FIX(s, 1), FIX(x, 0), FIX(dst, 0)), | |
2270 | OP1(ORIRP1), | |
2271 | ENC0()) | |
2272 | INSN(ret, s, b_nrp, branch, C62X, | |
2273 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_SIDE_B_ONLY|TIC6X_FLAG_MACRO|TIC6X_FLAG_RETURN, | |
2274 | FIX3(FIX(s, 1), FIX(x, 0), FIX(dst, 0)), | |
2275 | OP1(ORNRP1), | |
2276 | ENC0()) | |
2277 | ||
2278 | INSN(retp, s, call_imm_nop, branch, C64XP, | |
2279 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_MCNOP|TIC6X_FLAG_MACRO|TIC6X_FLAG_RETURN, | |
2280 | FIX1(FIX(z, 1)), | |
2281 | OP2(OLCST, OWRETREG1), | |
2282 | ENC2(ENC(s, fu, 0), ENC(cst, pcrel, 0))) | |
2283 | ||
2284 | INSN(rint, nfu, rint, 1cycle, C64XP, 0, | |
2285 | FIX1(FIX(s, 0)), | |
2286 | OP0(), | |
2287 | ENC0()) | |
2288 | ||
2289 | INSNE(rotl, m_ui_xui_ui, m, compound, 1616_m, C64X, 0, | |
2290 | FIX1(FIX(op, 0x1d)), | |
2291 | OP3(ORXREG1, ORREG1, OWREG2), | |
2292 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2293 | ENC(src1, reg, 1), ENC(dst, reg, 2))) | |
2294 | INSNE(rotl, m_u5_xui_ui, m, compound, 1616_m, C64X, 0, | |
2295 | FIX1(FIX(op, 0x1e)), | |
2296 | OP3(ORXREG1, OACST, OWREG2), | |
2297 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2298 | ENC(src1, ucst, 1), ENC(dst, reg, 2))) | |
2299 | ||
2300 | INSN(rpack2, s, ext_1_or_2_src_noncond, 1cycle, C64XP, 0, | |
2301 | FIX2(FIX(op, 0xb), FIX(z, 1)), | |
2302 | OP3(ORREG1, ORXREG1, OWREG1), | |
2303 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2304 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2305 | ||
2306 | INSN(rsqrdp, s, 1_or_2_src, 2cycle_dp, C67X, TIC6X_FLAG_NO_CROSS, | |
795b8e6b | 2307 | FIX2(FIX(op, 0x2e), FIX(x, 0)), |
40b36596 | 2308 | OP2(ORREGD1, OWREGD12), |
795b8e6b NC |
2309 | ENC4(ENC(s, fu, 0), ENC(src2, regpair_msb, 0), ENC(src1, regpair_lsb, 0), |
2310 | ENC(dst, reg, 1))) | |
40b36596 JM |
2311 | |
2312 | INSN(rsqrsp, s, 1_or_2_src, 1cycle, C67X, 0, | |
2313 | FIX2(FIX(op, 0x3e), FIX(src1, 0)), | |
2314 | OP2(ORXREG1, OWREG1), | |
2315 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2316 | ENC(dst, reg, 1))) | |
2317 | ||
2318 | INSNE(sadd, l_si_xsi_si, l, 1_or_2_src, 1cycle, C62X, 0, | |
2319 | FIX1(FIX(op, 0x13)), | |
2320 | OP3(ORREG1, ORXREG1, OWREG1), | |
2321 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2322 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2323 | INSNE(sadd, l_xsi_sl_sl, l, 1_or_2_src, 1cycle, C62X, 0, | |
2324 | FIX1(FIX(op, 0x31)), | |
2325 | OP3(ORXREG1, ORREGL1, OWREGL1), | |
2326 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2327 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2328 | INSNE(sadd, l_s5_xsi_si, l, 1_or_2_src, 1cycle, C62X, 0, | |
2329 | FIX1(FIX(op, 0x12)), | |
2330 | OP3(OACST, ORXREG1, OWREG1), | |
2331 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, scst, 0), | |
2332 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2333 | INSNE(sadd, l_s5_sl_sl, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, | |
2334 | FIX1(FIX(op, 0x30)), | |
2335 | OP3(OACST, ORREGL1, OWREGL1), | |
2336 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, scst, 0), | |
2337 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2338 | INSNE(sadd, s_si_xsi_si, s, 1_or_2_src, 1cycle, C64X, 0, | |
2339 | FIX1(FIX(op, 0x20)), | |
2340 | OP3(ORREG1, ORXREG1, OWREG1), | |
2341 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2342 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2343 | ||
51dcdd4d NC |
2344 | /* 16 bits insn */ |
2345 | INSN(sadd, l, l3_sat_1, 1cycle, C64XP, 0, | |
2346 | FIX1(FIX(op, 0)), | |
2347 | OP3(ORREG1, ORXREG1, OWREG1), | |
2348 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2349 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2350 | ||
2351 | INSN(sadd, s, s3_sat_1, 1cycle, C64XP,0, | |
2352 | FIX1(FIX(op, 0x0)), | |
2353 | OP3(ORREG1, ORXREG1, OWREG1), | |
2354 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2355 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2356 | /**/ | |
2357 | ||
40b36596 JM |
2358 | INSN(sadd2, s, ext_1_or_2_src, 1cycle, C64X, 0, |
2359 | FIX1(FIX(op, 0x0)), | |
2360 | OP3(ORREG1, ORXREG1, OWREG1), | |
2361 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2362 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2363 | ||
2364 | INSN(saddsub, l, 1_or_2_src_noncond, 1cycle, C64XP, 0, | |
2365 | FIX1(FIX(op, 0x0e)), | |
2366 | OP3(ORREG1, ORXREG1, OWREGD1), | |
2367 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2368 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2369 | ||
2370 | INSN(saddsub2, l, 1_or_2_src_noncond, 1cycle, C64XP, 0, | |
2371 | FIX1(FIX(op, 0x0f)), | |
2372 | OP3(ORREG1, ORXREG1, OWREGD1), | |
2373 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2374 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2375 | ||
2376 | INSN(saddsu2, s, ext_1_or_2_src, 1cycle, C64X, TIC6X_FLAG_MACRO, | |
2377 | FIX1(FIX(op, 0x1)), | |
2378 | OP3(ORXREG1, ORREG1, OWREG1), | |
2379 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2380 | ENC(src1, reg, 1), ENC(dst, reg, 2))) | |
2381 | ||
2382 | INSN(saddus2, s, ext_1_or_2_src, 1cycle, C64X, 0, | |
2383 | FIX1(FIX(op, 0x1)), | |
2384 | OP3(ORREG1, ORXREG1, OWREG1), | |
2385 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2386 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2387 | ||
2388 | INSN(saddu4, s, ext_1_or_2_src, 1cycle, C64X, 0, | |
2389 | FIX1(FIX(op, 0x3)), | |
2390 | OP3(ORREG1, ORXREG1, OWREG1), | |
2391 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2392 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2393 | ||
2394 | INSN(sat, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, | |
2395 | FIX3(FIX(op, 0x40), FIX(x, 0), FIX(src1, 0)), | |
2396 | OP2(ORREGL1, OWREG1), | |
2397 | ENC3(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(dst, reg, 1))) | |
2398 | ||
2399 | INSN(set, s, field, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, | |
2400 | FIX1(FIX(op, 0x2)), | |
2401 | OP4(ORREG1, OACST, OACST, OWREG1), | |
2402 | ENC5(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(csta, ucst, 1), | |
2403 | ENC(cstb, ucst, 2), ENC(dst, reg, 3))) | |
2404 | INSN(set, s, 1_or_2_src, 1cycle, C62X, 0, | |
2405 | FIX1(FIX(op, 0x3b)), | |
2406 | OP3(ORXREG1, ORREG1, OWREG1), | |
2407 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2408 | ENC(src1, reg, 1), ENC(dst, reg, 2))) | |
2409 | ||
51dcdd4d NC |
2410 | /* 16 bits insn */ |
2411 | INSN(set, s, sc5, 1cycle, C64XP, 0, | |
2412 | FIX1(FIX(op, 1)), | |
2413 | OP4(ORREG1, OACST, OACST, OWREG1), | |
2414 | ENC5(ENC(s, fu, 0), ENC(srcdst, reg, 0), ENC(cst, ucst, 1), | |
2415 | ENC(cst, ucst, 2), ENC(srcdst, reg, 3))) | |
2416 | /**/ | |
2417 | ||
40b36596 JM |
2418 | INSN(shfl, m, unary, 1616_m, C64X, 0, |
2419 | FIX1(FIX(op, 0x1c)), | |
2420 | OP2(ORXREG1, OWREG2), | |
2421 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2422 | ENC(dst, reg, 1))) | |
2423 | ||
2424 | INSN(shfl3, l, 1_or_2_src_noncond, 1cycle, C64XP, 0, | |
2425 | FIX1(FIX(op, 0x36)), | |
2426 | OP3(ORREG1, ORXREG1, OWREGD1), | |
2427 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2428 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2429 | ||
2430 | INSNE(shl, s_xsi_ui_si, s, 1_or_2_src, 1cycle, C62X, 0, | |
2431 | FIX1(FIX(op, 0x33)), | |
2432 | OP3(ORXREG1, ORREG1, OWREG1), | |
2433 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2434 | ENC(src1, reg, 1), ENC(dst, reg, 2))) | |
2435 | INSNE(shl, s_sl_ui_sl, s, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, | |
2436 | FIX2(FIX(op, 0x31), FIX(x, 0)), | |
2437 | OP3(ORREGL1, ORREG1, OWREGL1), | |
2438 | ENC4(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(src1, reg, 1), | |
2439 | ENC(dst, reg, 2))) | |
2440 | INSNE(shl, s_xui_ui_ul, s, 1_or_2_src, 1cycle, C62X, 0, | |
2441 | FIX1(FIX(op, 0x13)), | |
2442 | OP3(ORXREG1, ORREG1, OWREGL1), | |
2443 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2444 | ENC(src1, reg, 1), ENC(dst, reg, 2))) | |
2445 | INSNE(shl, s_xsi_u5_si, s, 1_or_2_src, 1cycle, C62X, 0, | |
2446 | FIX1(FIX(op, 0x32)), | |
2447 | OP3(ORXREG1, OACST, OWREG1), | |
2448 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2449 | ENC(src1, ucst, 1), ENC(dst, reg, 2))) | |
2450 | INSNE(shl, s_sl_u5_sl, s, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, | |
2451 | FIX2(FIX(op, 0x30), FIX(x, 0)), | |
2452 | OP3(ORREGL1, OACST, OWREGL1), | |
2453 | ENC4(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(src1, ucst, 1), | |
2454 | ENC(dst, reg, 2))) | |
2455 | INSNE(shl, s_xui_u5_ul, s, 1_or_2_src, 1cycle, C62X, 0, | |
2456 | FIX1(FIX(op, 0x12)), | |
2457 | OP3(ORXREG1, OACST, OWREGL1), | |
2458 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2459 | ENC(src1, ucst, 1), ENC(dst, reg, 2))) | |
2460 | ||
51dcdd4d NC |
2461 | /* 16bit insn */ |
2462 | INSN(shl, s, s3i, 1cycle, C64XP, 0, | |
2463 | FIX1(FIX(op, 0x0)), | |
2464 | OP3(ORXREG1, OACST, OWREG1), | |
2465 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2466 | ENC(cst, cst_s3i, 1), ENC(dst, reg, 2))) | |
2467 | INSN(shl, s, ssh5_sat_x, 1cycle, C64XP, | |
2468 | TIC6X_FLAG_NO_CROSS, | |
2469 | FIX1(FIX(op, 0x0)), | |
2470 | OP3(ORREG1, OACST, OWREG1), | |
2471 | ENC4(ENC(s, fu, 0), ENC(srcdst, reg, 0), | |
2472 | ENC(cst, ucst, 1), ENC(srcdst, reg, 2))) | |
2473 | INSN(shl, s, s2sh, 1cycle, C64XP, 0, | |
2474 | FIX1(FIX(op, 0x0)), | |
2475 | OP3(ORREG1, ORREG1, OWREG1), | |
2476 | ENC4(ENC(s, fu, 0), ENC(srcdst, reg, 0), ENC(src1, reg, 1), | |
2477 | ENC(srcdst, reg, 2))) | |
2478 | /**/ | |
2479 | ||
40b36596 JM |
2480 | INSN(shlmb, l, 1_or_2_src, 1cycle, C64X, 0, |
2481 | FIX1(FIX(op, 0x61)), | |
2482 | OP3(ORREG1, ORXREG1, OWREG1), | |
2483 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2484 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2485 | INSN(shlmb, s, ext_1_or_2_src, 1cycle, C64X, 0, | |
2486 | FIX1(FIX(op, 0x9)), | |
2487 | OP3(ORREG1, ORXREG1, OWREG1), | |
2488 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2489 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2490 | ||
2491 | INSNE(shr, s_xsi_ui_si, s, 1_or_2_src, 1cycle, C62X, 0, | |
2492 | FIX1(FIX(op, 0x37)), | |
2493 | OP3(ORXREG1, ORREG1, OWREG1), | |
2494 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2495 | ENC(src1, reg, 1), ENC(dst, reg, 2))) | |
2496 | INSNE(shr, s_sl_ui_sl, s, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, | |
2497 | FIX2(FIX(op, 0x35), FIX(x, 0)), | |
2498 | OP3(ORREGL1, ORREG1, OWREGL1), | |
2499 | ENC4(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(src1, reg, 1), | |
2500 | ENC(dst, reg, 2))) | |
2501 | INSNE(shr, s_xsi_u5_si, s, 1_or_2_src, 1cycle, C62X, 0, | |
2502 | FIX1(FIX(op, 0x36)), | |
2503 | OP3(ORXREG1, OACST, OWREG1), | |
2504 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2505 | ENC(src1, ucst, 1), ENC(dst, reg, 2))) | |
2506 | INSNE(shr, s_sl_u5_sl, s, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, | |
2507 | FIX2(FIX(op, 0x34), FIX(x, 0)), | |
2508 | OP3(ORREGL1, OACST, OWREGL1), | |
2509 | ENC4(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(src1, ucst, 1), | |
2510 | ENC(dst, reg, 2))) | |
2511 | ||
51dcdd4d NC |
2512 | /* 16bit insn */ |
2513 | INSN(shr, s, s3i, 1cycle, C64XP, 0, | |
2514 | FIX1(FIX(op, 0x1)), | |
2515 | OP3(ORXREG1, OACST, OWREG1), | |
2516 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2517 | ENC(cst, cst_s3i, 1), ENC(dst, reg, 2))) | |
2518 | INSN(shr, s, ssh5_sat_x, 1cycle, C64XP, | |
2519 | TIC6X_FLAG_NO_CROSS, | |
2520 | FIX1(FIX(op, 0x1)), | |
2521 | OP3(ORREG1, OACST, OWREG1), | |
2522 | ENC4(ENC(s, fu, 0), ENC(srcdst, reg, 0), | |
2523 | ENC(cst, ucst, 1), ENC(srcdst, reg, 2))) | |
2524 | INSN(shr, s, s2sh, 1cycle, C64XP, 0, | |
2525 | FIX1(FIX(op, 0x1)), | |
2526 | OP3(ORREG1, ORREG1, OWREG1), | |
2527 | ENC4(ENC(s, fu, 0), ENC(srcdst, reg, 0), ENC(src1, reg, 1), | |
2528 | ENC(srcdst, reg, 2))) | |
2529 | /**/ | |
2530 | ||
40b36596 JM |
2531 | INSNE(shr2, s_xs2_ui_s2, s, ext_1_or_2_src, 1cycle, C64X, 0, |
2532 | FIX1(FIX(op, 0x7)), | |
2533 | OP3(ORXREG1, ORREG1, OWREG1), | |
2534 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2535 | ENC(src1, reg, 1), ENC(dst, reg, 2))) | |
2536 | INSNE(shr2, s_xs2_u5_s2, s, 1_or_2_src, 1cycle, C64X, 0, | |
2537 | FIX1(FIX(op, 0x18)), | |
2538 | OP3(ORXREG1, OACST, OWREG1), | |
2539 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2540 | ENC(src1, ucst, 1), ENC(dst, reg, 2))) | |
2541 | ||
2542 | INSN(shrmb, l, 1_or_2_src, 1cycle, C64X, 0, | |
2543 | FIX1(FIX(op, 0x62)), | |
2544 | OP3(ORREG1, ORXREG1, OWREG1), | |
2545 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2546 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2547 | INSN(shrmb, s, ext_1_or_2_src, 1cycle, C64X, 0, | |
2548 | FIX1(FIX(op, 0xa)), | |
2549 | OP3(ORREG1, ORXREG1, OWREG1), | |
2550 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2551 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2552 | ||
2553 | INSNE(shru, s_xui_ui_ui, s, 1_or_2_src, 1cycle, C62X, 0, | |
2554 | FIX1(FIX(op, 0x27)), | |
2555 | OP3(ORXREG1, ORREG1, OWREG1), | |
2556 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2557 | ENC(src1, reg, 1), ENC(dst, reg, 2))) | |
2558 | INSNE(shru, s_ul_ui_ul, s, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, | |
2559 | FIX2(FIX(op, 0x25), FIX(x, 0)), | |
2560 | OP3(ORREGL1, ORREG1, OWREGL1), | |
2561 | ENC4(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(src1, reg, 1), | |
2562 | ENC(dst, reg, 2))) | |
2563 | INSNE(shru, s_xui_u5_ui, s, 1_or_2_src, 1cycle, C62X, 0, | |
2564 | FIX1(FIX(op, 0x26)), | |
2565 | OP3(ORXREG1, OACST, OWREG1), | |
2566 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2567 | ENC(src1, ucst, 1), ENC(dst, reg, 2))) | |
2568 | INSNE(shru, s_ul_u5_ul, s, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, | |
2569 | FIX2(FIX(op, 0x24), FIX(x, 0)), | |
2570 | OP3(ORREGL1, OACST, OWREGL1), | |
2571 | ENC4(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(src1, ucst, 1), | |
2572 | ENC(dst, reg, 2))) | |
2573 | ||
51dcdd4d NC |
2574 | /* 16 bits insn */ |
2575 | INSN(shru, s, ssh5_sat_0, 1cycle, C64XP, | |
2576 | TIC6X_FLAG_NO_CROSS, | |
2577 | FIX1(FIX(op, 0x2)), | |
2578 | OP3(ORREG1, OACST, OWREG1), | |
2579 | ENC4(ENC(s, fu, 0), ENC(srcdst, reg, 0), | |
2580 | ENC(cst, ucst, 1), ENC(srcdst, reg, 2))) | |
2581 | INSN(shru, s, s2sh, 1cycle, C64XP, 0, | |
2582 | FIX1(FIX(op, 0x2)), | |
2583 | OP3(ORREG1, ORREG1, OWREG1), | |
2584 | ENC4(ENC(s, fu, 0), ENC(srcdst, reg, 0), ENC(src1, reg, 1), | |
2585 | ENC(srcdst, reg, 2))) | |
2586 | /**/ | |
2587 | ||
40b36596 JM |
2588 | INSNE(shru2, s_xu2_ui_u2, s, ext_1_or_2_src, 1cycle, C64X, 0, |
2589 | FIX1(FIX(op, 0x8)), | |
2590 | OP3(ORXREG1, ORREG1, OWREG1), | |
2591 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2592 | ENC(src1, reg, 1), ENC(dst, reg, 2))) | |
2593 | INSNE(shru2, s_xu2_u5_u2, s, 1_or_2_src, 1cycle, C64X, 0, | |
2594 | FIX1(FIX(op, 0x19)), | |
2595 | OP3(ORXREG1, OACST, OWREG1), | |
2596 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2597 | ENC(src1, ucst, 1), ENC(dst, reg, 2))) | |
2598 | ||
98d23bef | 2599 | INSN(sl, d, 1_or_2_src, store, C64XP, |
40b36596 JM |
2600 | TIC6X_FLAG_STORE|TIC6X_FLAG_SIDE_B_ONLY|TIC6X_FLAG_SIDE_T2_ONLY|TIC6X_FLAG_NO_CROSS, |
2601 | FIX3(FIX(s, 1), FIX(op, 0xd), FIX(src1, 0)), | |
2602 | OP2(ORDREG1, OWMEMDW), | |
2603 | ENC2(ENC(dst, reg, 0), ENC(src2, reg, 1))) | |
2604 | ||
2605 | INSN(smpy, m, mpy, 1616_m, C62X, 0, | |
2606 | FIX1(FIX(op, 0x1a)), | |
2607 | OP3(ORREG1, ORXREG1, OWREG2), | |
2608 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2609 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2610 | ||
51dcdd4d NC |
2611 | /* 16 bits insn */ |
2612 | INSN(smpy, m, m3_sat_1, 1616_m, C67X, 0, | |
2613 | FIX1(FIX(op, 0x0)), | |
2614 | OP3(ORREG1, ORXREG1, OWREG2), | |
2615 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2616 | ENC(src2, reg, 1), ENC(dst, reg_shift, 2))) | |
2617 | /**/ | |
2618 | ||
40b36596 JM |
2619 | INSN(smpyh, m, mpy, 1616_m, C62X, 0, |
2620 | FIX1(FIX(op, 0x02)), | |
2621 | OP3(ORREG1, ORXREG1, OWREG2), | |
2622 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2623 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2624 | ||
51dcdd4d NC |
2625 | /* 16 bits insn */ |
2626 | INSN(smpyh, m, m3_sat_1, 1616_m, C67X, 0, | |
2627 | FIX1(FIX(op, 0x1)), | |
2628 | OP3(ORREG1, ORXREG1, OWREG2), | |
2629 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2630 | ENC(src2, reg, 1), ENC(dst, reg_shift, 2))) | |
2631 | /**/ | |
2632 | ||
40b36596 JM |
2633 | INSN(smpyhl, m, mpy, 1616_m, C62X, 0, |
2634 | FIX1(FIX(op, 0x0a)), | |
2635 | OP3(ORREG1, ORXREG1, OWREG2), | |
2636 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2637 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2638 | ||
51dcdd4d NC |
2639 | /* 16 bits insn */ |
2640 | INSN(smpyhl, m, m3_sat_1, 1616_m, C67X, 0, | |
2641 | FIX1(FIX(op, 0x3)), | |
2642 | OP3(ORREG1, ORXREG1, OWREG2), | |
2643 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2644 | ENC(src2, reg, 1), ENC(dst, reg_shift, 2))) | |
2645 | /**/ | |
2646 | ||
40b36596 JM |
2647 | INSN(smpylh, m, mpy, 1616_m, C62X, 0, |
2648 | FIX1(FIX(op, 0x12)), | |
2649 | OP3(ORREG1, ORXREG1, OWREG2), | |
2650 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2651 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2652 | ||
51dcdd4d NC |
2653 | /* 16 bits insn */ |
2654 | INSN(smpylh, m, m3_sat_1, 1616_m, C67X, 0, | |
2655 | FIX1(FIX(op, 0x2)), | |
2656 | OP3(ORREG1, ORXREG1, OWREG2), | |
2657 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2658 | ENC(src2, reg, 1), ENC(dst, reg_shift, 2))) | |
2659 | /**/ | |
2660 | ||
40b36596 JM |
2661 | INSN(smpy2, m, compound, 4cycle, C64X, 0, |
2662 | FIX1(FIX(op, 0x01)), | |
2663 | OP3(ORREG1, ORXREG1, OWREGD4), | |
2664 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2665 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2666 | ||
2667 | /* Contrary to SPRUFE8, this is the correct operand order for this | |
2668 | instruction. */ | |
2669 | INSN(smpy32, m, 1_or_2_src, 4cycle, C64XP, 0, | |
2670 | FIX1(FIX(op, 0x19)), | |
2671 | OP3(ORREG1, ORXREG1, OWREG4), | |
2672 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2673 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2674 | ||
2675 | INSN(spack2, s, ext_1_or_2_src, 1cycle, C64X, 0, | |
2676 | FIX1(FIX(op, 0x2)), | |
2677 | OP3(ORREG1, ORXREG1, OWREG1), | |
2678 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2679 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2680 | ||
2681 | INSN(spacku4, s, ext_1_or_2_src, 1cycle, C64X, 0, | |
2682 | FIX1(FIX(op, 0x4)), | |
2683 | OP3(ORREG1, ORXREG1, OWREG1), | |
2684 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2685 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2686 | ||
2687 | INSN(spdp, s, 1_or_2_src, 2cycle_dp, C67X, 0, | |
2688 | FIX2(FIX(op, 0x02), FIX(src1, 0)), | |
2689 | OP2(ORXREG1, OWREGD12), | |
2690 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2691 | ENC(dst, reg, 1))) | |
2692 | ||
2693 | INSN(spint, l, 1_or_2_src, 4cycle, C67X, 0, | |
2694 | FIX2(FIX(op, 0x0a), FIX(src1, 0)), | |
2695 | OP2(ORXREG1, OWREG4), | |
2696 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2697 | ENC(dst, reg, 1))) | |
2698 | ||
2699 | INSNE(spkernel, nfu_2, nfu, spkernel, 1cycle, C64XP, | |
2700 | TIC6X_FLAG_FIRST|TIC6X_FLAG_NO_MCNOP|TIC6X_FLAG_SPKERNEL, | |
2701 | FIX1(FIX(s, 0)), | |
2702 | OP2(OACST, OACST), | |
2703 | ENC2(ENC(fstgfcyc, fstg, 0), ENC(fstgfcyc, fcyc, 1))) | |
2704 | INSNE(spkernel, nfu_0, nfu, spkernel, 1cycle, C64XP, | |
2705 | TIC6X_FLAG_FIRST|TIC6X_FLAG_NO_MCNOP|TIC6X_FLAG_SPKERNEL|TIC6X_FLAG_MACRO, | |
2706 | FIX2(FIX(s, 0), FIX(fstgfcyc, 0)), | |
2707 | OP0(), | |
2708 | ENC0()) | |
2709 | ||
51dcdd4d NC |
2710 | /* 16 bits insn */ |
2711 | INSN(spkernel, nfu, uspk, 1cycle, C64XP, | |
2712 | TIC6X_FLAG_FIRST|TIC6X_FLAG_NO_MCNOP|TIC6X_FLAG_SPKERNEL, | |
2713 | FIX0(), | |
2714 | OP2(OACST, OACST), | |
2715 | ENC2(ENC(fstgfcyc, fstg, 0), ENC(fstgfcyc, fcyc, 1))) | |
2716 | /**/ | |
2717 | ||
40b36596 JM |
2718 | INSN(spkernelr, nfu, spkernelr, 1cycle, C64XP, |
2719 | TIC6X_FLAG_FIRST|TIC6X_FLAG_NO_MCNOP|TIC6X_FLAG_SPKERNEL, | |
2720 | FIX1(FIX(s, 0)), | |
2721 | OP0(), | |
2722 | ENC0()) | |
2723 | ||
2724 | INSN(sploop, nfu, loop_buffer, 1cycle, C64XP, | |
2725 | TIC6X_FLAG_FIRST|TIC6X_FLAG_NO_MCNOP|TIC6X_FLAG_SPLOOP, | |
2726 | FIX4(FIX(s, 0), FIX(op, 0xc), FIX(csta, 0), RAN(cstb, 0, 13)), | |
2727 | OP1(OACST), | |
2728 | ENC1(ENC(cstb, ucst_minus_one, 0))) | |
2729 | ||
2730 | INSN(sploopd, nfu, loop_buffer, 1cycle, C64XP, | |
2731 | TIC6X_FLAG_FIRST|TIC6X_FLAG_NO_MCNOP|TIC6X_FLAG_SPLOOP, | |
2732 | FIX4(FIX(s, 0), FIX(op, 0xd), FIX(csta, 0), RAN(cstb, 0, 13)), | |
2733 | OP1(OACST), | |
2734 | ENC1(ENC(cstb, ucst_minus_one, 0))) | |
2735 | ||
2736 | INSN(sploopw, nfu, loop_buffer, 1cycle, C64XP, | |
2737 | TIC6X_FLAG_FIRST|TIC6X_FLAG_NO_MCNOP|TIC6X_FLAG_SPLOOP, | |
2738 | FIX4(FIX(s, 0), FIX(op, 0xf), FIX(csta, 0), RAN(cstb, 0, 13)), | |
2739 | OP1(OACST), | |
2740 | ENC1(ENC(cstb, ucst_minus_one, 0))) | |
2741 | ||
51dcdd4d NC |
2742 | /* 16 bits insn */ |
2743 | INSN(sploop, nfu, uspl, 1cycle, C64XP, | |
2744 | TIC6X_FLAG_FIRST|TIC6X_FLAG_NO_MCNOP|TIC6X_FLAG_SPLOOP, | |
2745 | FIX1(FIX(op, 0)), | |
2746 | OP1(OACST), | |
2747 | ENC1(ENC(ii, ucst_minus_one, 0))) | |
2748 | ||
2749 | INSN(sploopd, nfu, uspl, 1cycle, C64XP, | |
2750 | TIC6X_FLAG_FIRST|TIC6X_FLAG_NO_MCNOP|TIC6X_FLAG_SPLOOP, | |
2751 | FIX1(FIX(op, 1)), | |
2752 | OP1(OACST), | |
2753 | ENC1(ENC(ii, ucst_minus_one, 0))) | |
2754 | ||
2755 | INSN(sploopd, nfu, uspldr, 1cycle, C64XP, | |
2756 | TIC6X_FLAG_FIRST|TIC6X_FLAG_NO_MCNOP|TIC6X_FLAG_SPLOOP|TIC6X_FLAG_INSN16_SPRED, | |
2757 | FIX0(), | |
2758 | OP1(OACST), | |
2759 | ENC1(ENC(ii, ucst_minus_one, 0))) | |
2760 | /**/ | |
2761 | ||
2762 | ||
40b36596 JM |
2763 | /* Contrary to SPRUFE8, this is the correct encoding for this |
2764 | instruction. */ | |
2765 | INSN(spmask, nfu, spmask, 1cycle, C64XP, TIC6X_FLAG_FIRST|TIC6X_FLAG_SPMASK, | |
2766 | FIX2(FIX(s, 0), FIX(op, 0x8)), | |
2767 | OP1(OFULIST), | |
2768 | ENC1(ENC(mask, spmask, 0))) | |
2769 | ||
51dcdd4d NC |
2770 | /* 16 bits insn */ |
2771 | INSN(spmask, nfu, uspma, 1cycle, C64XP, TIC6X_FLAG_FIRST|TIC6X_FLAG_SPMASK, | |
2772 | FIX0(), | |
2773 | OP1(OFULIST), | |
2774 | ENC1(ENC(mask, spmask, 0))) | |
2775 | /**/ | |
2776 | ||
40b36596 JM |
2777 | INSN(spmaskr, nfu, spmask, 1cycle, C64XP, TIC6X_FLAG_FIRST|TIC6X_FLAG_SPMASK, |
2778 | FIX2(FIX(s, 0), FIX(op, 0x9)), | |
2779 | OP1(OFULIST), | |
2780 | ENC1(ENC(mask, spmask, 0))) | |
2781 | ||
51dcdd4d NC |
2782 | /* 16 bits insn */ |
2783 | INSN(spmaskr, nfu, uspmb, 1cycle, C64XP, TIC6X_FLAG_FIRST|TIC6X_FLAG_SPMASK, | |
2784 | FIX0(), | |
2785 | OP1(OFULIST), | |
2786 | ENC1(ENC(mask, spmask, 0))) | |
2787 | /**/ | |
2788 | ||
40b36596 JM |
2789 | INSN(sptrunc, l, 1_or_2_src, 4cycle, C67X, 0, |
2790 | FIX2(FIX(op, 0x0b), FIX(src1, 0)), | |
2791 | OP2(ORXREG1, OWREG4), | |
2792 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2793 | ENC(dst, reg, 1))) | |
2794 | ||
2795 | INSNE(sshl, s_xsi_ui_si, s, 1_or_2_src, 1cycle, C62X, 0, | |
2796 | FIX1(FIX(op, 0x23)), | |
2797 | OP3(ORXREG1, ORREG1, OWREG1), | |
2798 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2799 | ENC(src1, reg, 1), ENC(dst, reg, 2))) | |
2800 | INSNE(sshl, s_xsi_u5_si, s, 1_or_2_src, 1cycle, C62X, 0, | |
2801 | FIX1(FIX(op, 0x22)), | |
2802 | OP3(ORXREG1, OACST, OWREG1), | |
2803 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2804 | ENC(src1, ucst, 1), ENC(dst, reg, 2))) | |
2805 | ||
51dcdd4d NC |
2806 | /* 16 bits insn */ |
2807 | INSN(sshl, s, ssh5_sat_1, 1cycle, C64XP, | |
2808 | TIC6X_FLAG_NO_CROSS, | |
2809 | FIX1(FIX(op, 0x2)), | |
2810 | OP3(ORREG1, OACST, OWREG1), | |
2811 | ENC4(ENC(s, fu, 0), ENC(srcdst, reg, 0), | |
2812 | ENC(cst, ucst, 1), ENC(srcdst, reg, 2))) | |
2813 | INSN(sshl, s, s2sh, 1cycle, C64XP, 0, | |
2814 | FIX1(FIX(op, 0x3)), | |
2815 | OP3(ORREG1, ORREG1, OWREG1), | |
2816 | ENC4(ENC(s, fu, 0), ENC(srcdst, reg, 0), ENC(src1, reg, 1), | |
2817 | ENC(srcdst, reg, 2))) | |
2818 | /**/ | |
2819 | ||
40b36596 JM |
2820 | INSN(sshvl, m, compound, 1616_m, C64X, 0, |
2821 | FIX1(FIX(op, 0x1c)), | |
2822 | OP3(ORXREG1, ORREG1, OWREG2), | |
2823 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2824 | ENC(src1, reg, 1), ENC(dst, reg, 2))) | |
2825 | ||
2826 | /* Contrary to SPRUFE8, this is the correct encoding for this | |
2827 | instruction. */ | |
2828 | INSN(sshvr, m, compound, 1616_m, C64X, 0, | |
2829 | FIX1(FIX(op, 0x1a)), | |
2830 | OP3(ORXREG1, ORREG1, OWREG2), | |
2831 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
2832 | ENC(src1, reg, 1), ENC(dst, reg, 2))) | |
2833 | ||
2834 | INSNE(ssub, l_si_xsi_si, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_PREFER(1), | |
2835 | FIX1(FIX(op, 0x0f)), | |
2836 | OP3(ORREG1, ORXREG1, OWREG1), | |
2837 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2838 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2839 | INSNE(ssub, l_xsi_si_si, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_PREFER(0), | |
2840 | FIX1(FIX(op, 0x1f)), | |
2841 | OP3(ORXREG1, ORREG1, OWREG1), | |
2842 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2843 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2844 | INSNE(ssub, l_s5_xsi_si, l, 1_or_2_src, 1cycle, C62X, 0, | |
2845 | FIX1(FIX(op, 0x0e)), | |
2846 | OP3(OACST, ORXREG1, OWREG1), | |
2847 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, scst, 0), | |
2848 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2849 | INSNE(ssub, l_s5_sl_sl, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, | |
2850 | FIX1(FIX(op, 0x2c)), | |
2851 | OP3(OACST, ORREGL1, OWREGL1), | |
2852 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, scst, 0), | |
2853 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2854 | ||
51dcdd4d NC |
2855 | /* 16 bits insn */ |
2856 | INSN(ssub, l, l3_sat_1, 1cycle, C64XP, 0, | |
2857 | FIX1(FIX(op, 1)), | |
2858 | OP3(ORREG1, ORXREG1, OWREG1), | |
2859 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2860 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2861 | /**/ | |
2862 | ||
40b36596 JM |
2863 | INSN(ssub2, l, 1_or_2_src, 1cycle, C64XP, 0, |
2864 | FIX1(FIX(op, 0x64)), | |
2865 | OP3(ORREG1, ORXREG1, OWREG1), | |
2866 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
2867 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
2868 | ||
2869 | INSN(stb, d, load_store, store, C62X, | |
2870 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_PREFER(1), | |
2871 | FIX2(FIX(op, 3), FIX(r, 0)), | |
2872 | OP2(ORDREG1, OWMEMSB), | |
2873 | ENC6(ENC(s, data_fu, 0), ENC(y, fu, 0), ENC(mode, mem_mode, 1), | |
2874 | ENC(offsetR, mem_offset, 1), ENC(baseR, reg, 1), | |
2875 | ENC(srcdst, reg, 0))) | |
2876 | INSN(stb, d, load_store_long, store, C62X, | |
2877 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_SIDE_B_ONLY|TIC6X_FLAG_PREFER(0), | |
2878 | FIX1(FIX(op, 3)), | |
2879 | OP2(ORDREG1, OWMEMLB), | |
2880 | ENC4(ENC(s, data_fu, 0), ENC(y, areg, 1), ENC(offsetR, ulcst_dpr_byte, 1), | |
2881 | ENC(dst, reg, 0))) | |
2882 | ||
51dcdd4d NC |
2883 | /* 16 bits insn */ |
2884 | INSN(stb, d, doff4_dsz_000, store, C64XP, | |
2885 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSITIVE), | |
2886 | FIX2(FIX(op, 0), FIX(sz, 1)), | |
2887 | OP2(ORTREG1, OWMEMSB), | |
2888 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 0), | |
2889 | ENC(ptr, reg_ptr, 1), ENC(cst, mem_offset, 1))) | |
2890 | INSN(stb, d, doff4_dsz_x01, store, C64XP, | |
2891 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSITIVE), | |
2892 | FIX2(FIX(op, 0), FIX(sz, 1)), | |
2893 | OP2(ORTREG1, OWMEMSB), | |
2894 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 0), | |
2895 | ENC(ptr, reg_ptr, 1), ENC(cst, mem_offset, 1))) | |
2896 | INSN(stb, d, dind_dsz_000, store, C64XP, | |
2897 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(REG_POSITIVE), | |
2898 | FIX2(FIX(op, 0), FIX(sz, 1)), | |
2899 | OP2(ORTREG1, OWMEMSB), | |
2900 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(src1, mem_offset, 1), | |
2901 | ENC(ptr, reg_ptr, 1), ENC(srcdst, reg, 0))) | |
2902 | INSN(stb, d, dind_dsz_x01, store, C64XP, | |
2903 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(REG_POSITIVE), | |
2904 | FIX2(FIX(op, 0), FIX(sz, 1)), | |
2905 | OP2(ORTREG1, OWMEMSB), | |
2906 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(src1, mem_offset, 1), | |
2907 | ENC(ptr, reg_ptr, 1), ENC(srcdst, reg, 0))) | |
2908 | INSN(stb, d, dinc_dsz_000, store, C64XP, | |
2909 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSTINCR), | |
2910 | FIX2(FIX(op, 0), FIX(sz, 1)), | |
2911 | OP2(ORTREG1, OWMEMSB), | |
2912 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 0), | |
2913 | ENC(ptr, reg_ptr, 1), ENC(cst, mem_offset_minus_one, 1))) | |
2914 | INSN(stb, d, dinc_dsz_x01, store, C64XP, | |
2915 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSTINCR), | |
2916 | FIX2(FIX(op, 0), FIX(sz, 1)), | |
2917 | OP2(ORTREG1, OWMEMSB), | |
2918 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 0), | |
2919 | ENC(ptr, reg_ptr, 1), ENC(cst, mem_offset_minus_one, 1))) | |
2920 | INSN(stb, d, ddec_dsz_000, store, C64XP, | |
2921 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(PREDECR), | |
2922 | FIX2(FIX(op, 0), FIX(sz, 1)), | |
2923 | OP2(ORTREG1, OWMEMSB), | |
2924 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 0), | |
2925 | ENC(ptr, reg_ptr, 1), ENC(cst, mem_offset_minus_one, 1))) | |
2926 | INSN(stb, d, ddec_dsz_x01, store, C64XP, | |
2927 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(PREDECR), | |
2928 | FIX2(FIX(op, 0), FIX(sz, 1)), | |
2929 | OP2(ORTREG1, OWMEMSB), | |
2930 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 0), | |
2931 | ENC(ptr, reg_ptr, 1), ENC(cst, mem_offset_minus_one, 1))) | |
2932 | /**/ | |
2933 | ||
40b36596 JM |
2934 | INSN(stdw, d, load_store, store, C64X, TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS, |
2935 | FIX2(FIX(op, 4), FIX(r, 1)), | |
2936 | OP2(ORDREGD1, OWMEMSD), | |
2937 | ENC6(ENC(s, data_fu, 0), ENC(y, fu, 0), ENC(mode, mem_mode, 1), | |
2938 | ENC(offsetR, mem_offset, 1), ENC(baseR, reg, 1), | |
2939 | ENC(srcdst, reg, 0))) | |
2940 | ||
51dcdd4d NC |
2941 | /* 16 bits insn */ |
2942 | INSN(stdw, d, dpp, store, C64XP, | |
2943 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSTDECR)|TIC6X_FLAG_INSN16_B15PTR|TIC6X_FLAG_INSN16_NORS, | |
2944 | FIX3(FIX(op, 0), FIX(dw, 1), FIX(s, 1)), | |
2945 | OP2(ORTREGD1, OWMEMSD), | |
2946 | ENC4(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 0), | |
2947 | ENC(cst, mem_offset_minus_one, 1))) | |
2948 | INSN(stdw, d, ddecdw, store, C64XP, | |
2949 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(PREDECR), | |
2950 | FIX3(FIX(op, 0), FIX(na, 0), FIX(sz, 0)), | |
2951 | OP2(ORTREGD1, OWMEMSD), | |
2952 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg_shift, 0), | |
2953 | ENC(ptr, reg_ptr, 1), ENC(cst, mem_offset_minus_one, 1))) | |
2954 | INSN(stdw, d, dincdw, store, C64XP, | |
2955 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSTINCR), | |
2956 | FIX3(FIX(op, 0), FIX(na, 0), FIX(sz, 0)), | |
2957 | OP2(ORTREGD1, OWMEMSD), | |
2958 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg_shift, 0), | |
2959 | ENC(ptr, reg_ptr, 1), ENC(cst, mem_offset_minus_one, 1))) | |
2960 | INSN(stdw, d, dinddw, store, C64XP, | |
2961 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(REG_POSITIVE), | |
2962 | FIX3(FIX(op, 0), FIX(na, 0), FIX(sz, 0)), | |
2963 | OP2(ORTREGD1, OWMEMSD), | |
2964 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(src1, mem_offset, 1), | |
2965 | ENC(ptr, reg_ptr, 1), ENC(srcdst, reg_shift, 0))) | |
2966 | INSN(stdw, d, doff4dw, store, C64XP, | |
2967 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSITIVE), | |
2968 | FIX3(FIX(op, 0), FIX(na, 0), FIX(sz, 0)), | |
2969 | OP2(ORTREGD1, OWMEMSD), | |
2970 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(cst, mem_offset, 1), | |
2971 | ENC(ptr, reg_ptr, 1), ENC(srcdst, reg_shift, 0))) | |
2972 | /**/ | |
2973 | ||
40b36596 JM |
2974 | INSN(sth, d, load_store, store, C62X, |
2975 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_PREFER(1), | |
2976 | FIX2(FIX(op, 5), FIX(r, 0)), | |
2977 | OP2(ORDREG1, OWMEMSH), | |
2978 | ENC6(ENC(s, data_fu, 0), ENC(y, fu, 0), ENC(mode, mem_mode, 1), | |
2979 | ENC(offsetR, mem_offset, 1), ENC(baseR, reg, 1), | |
2980 | ENC(srcdst, reg, 0))) | |
2981 | INSN(sth, d, load_store_long, store, C62X, | |
2982 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_SIDE_B_ONLY|TIC6X_FLAG_PREFER(0), | |
2983 | FIX1(FIX(op, 5)), | |
2984 | OP2(ORDREG1, OWMEMLH), | |
2985 | ENC4(ENC(s, data_fu, 0), ENC(y, areg, 1), ENC(offsetR, ulcst_dpr_half, 1), | |
2986 | ENC(dst, reg, 0))) | |
2987 | ||
51dcdd4d NC |
2988 | /* 16 bits insn */ |
2989 | INSN(sth, d, doff4_dsz_01x, store, C64XP, | |
2990 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSITIVE), | |
2991 | FIX2(FIX(op, 0), FIX(sz, 1)), | |
2992 | OP2(ORTREG1, OWMEMSH), | |
2993 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 0), | |
2994 | ENC(ptr, reg_ptr, 1), ENC(cst, mem_offset, 1))) | |
2995 | INSN(sth, d, doff4_dsz_111, store, C64XP, | |
2996 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSITIVE), | |
2997 | FIX2(FIX(op, 0), FIX(sz, 1)), | |
2998 | OP2(ORTREG1, OWMEMSH), | |
2999 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 0), | |
3000 | ENC(ptr, reg_ptr, 1), ENC(cst, mem_offset, 1))) | |
3001 | INSN(sth, d, dind_dsz_01x, store, C64XP, | |
3002 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(REG_POSITIVE), | |
3003 | FIX2(FIX(op, 0), FIX(sz, 1)), | |
3004 | OP2(ORTREG1, OWMEMSH), | |
3005 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 0), | |
3006 | ENC(ptr, reg_ptr, 1), ENC(src1, mem_offset, 1))) | |
3007 | INSN(sth, d, dind_dsz_111, store, C64XP, | |
3008 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(REG_POSITIVE), | |
3009 | FIX2(FIX(op, 0), FIX(sz, 1)), | |
3010 | OP2(ORTREG1, OWMEMSH), | |
3011 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 0), | |
3012 | ENC(ptr, reg_ptr, 1), ENC(src1, mem_offset, 1))) | |
3013 | INSN(sth, d, dinc_dsz_01x, store, C64XP, | |
3014 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSTINCR), | |
3015 | FIX2(FIX(op, 0), FIX(sz, 1)), | |
3016 | OP2(ORTREG1, OWMEMSH), | |
3017 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 0), | |
3018 | ENC(ptr, reg_ptr, 1), ENC(cst, mem_offset_minus_one, 1))) | |
3019 | INSN(sth, d, dinc_dsz_111, store, C64XP, | |
3020 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSTINCR), | |
3021 | FIX2(FIX(op, 0), FIX(sz, 1)), | |
3022 | OP2(ORTREG1, OWMEMSH), | |
3023 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 0), | |
3024 | ENC(ptr, reg_ptr, 1), ENC(cst, mem_offset_minus_one, 1))) | |
3025 | INSN(sth, d, ddec_dsz_01x, store, C64XP, | |
3026 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(PREDECR), | |
3027 | FIX2(FIX(op, 0), FIX(sz, 1)), | |
3028 | OP2(ORTREG1, OWMEMSH), | |
3029 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 0), | |
3030 | ENC(ptr, reg_ptr, 1), ENC(cst, mem_offset_minus_one, 1))) | |
3031 | INSN(sth, d, ddec_dsz_111, store, C64XP, | |
3032 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(PREDECR), | |
3033 | FIX2(FIX(op, 0), FIX(sz, 1)), | |
3034 | OP2(ORTREG1, OWMEMSH), | |
3035 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 0), | |
3036 | ENC(ptr, reg_ptr, 1), ENC(cst, mem_offset_minus_one, 1))) | |
3037 | /**/ | |
3038 | ||
40b36596 JM |
3039 | INSN(stndw, d, store_nonaligned, store, C64X, |
3040 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_UNALIGNED, | |
3041 | FIX0(), | |
3042 | OP2(ORDREGD1, OWMEMND), | |
3043 | ENC7(ENC(s, data_fu, 0), ENC(y, fu, 0), ENC(mode, mem_mode, 1), | |
3044 | ENC(offsetR, mem_offset_noscale, 1), ENC(baseR, reg, 1), | |
3045 | ENC(sc, scaled, 1), ENC(src, reg_shift, 0))) | |
3046 | ||
51dcdd4d NC |
3047 | /* 16 bits insn */ |
3048 | INSN(stndw, d, ddecdw, store, C64XP, | |
3049 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_UNALIGNED|TIC6X_FLAG_INSN16_MEM_MODE(PREDECR), | |
3050 | FIX3(FIX(op, 0), FIX(na, 1), FIX(sz, 0)), | |
3051 | OP2(ORTREGD1, OWMEMND), | |
3052 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg_shift, 0), | |
3053 | ENC(ptr, reg_ptr, 1), ENC(cst, mem_offset_minus_one_noscale, 1))) | |
3054 | INSN(stndw, d, dincdw, store, C64XP, | |
3055 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_UNALIGNED|TIC6X_FLAG_INSN16_MEM_MODE(POSTINCR), | |
3056 | FIX3(FIX(op, 0), FIX(na, 1), FIX(sz, 0)), | |
3057 | OP2(ORTREGD1, OWMEMND), | |
3058 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg_shift, 0), | |
3059 | ENC(ptr, reg_ptr, 1), ENC(cst, mem_offset_minus_one_noscale, 1))) | |
3060 | INSN(stndw, d, dinddw, store, C64XP, | |
3061 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_UNALIGNED|TIC6X_FLAG_INSN16_MEM_MODE(REG_POSITIVE), | |
3062 | FIX3(FIX(op, 0), FIX(na, 1), FIX(sz, 0)), | |
3063 | OP2(ORTREGD1, OWMEMND), | |
3064 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(src1, mem_offset_noscale, 1), | |
3065 | ENC(ptr, reg_ptr, 1), ENC(srcdst, reg_shift, 0))) | |
3066 | INSN(stndw, d, doff4dw, store, C64XP, | |
3067 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_UNALIGNED|TIC6X_FLAG_INSN16_MEM_MODE(POSITIVE), | |
3068 | FIX3(FIX(op, 0), FIX(na, 1), FIX(sz, 0)), | |
3069 | OP2(ORTREGD1, OWMEMND), | |
3070 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(cst, mem_offset_noscale, 1), | |
3071 | ENC(ptr, reg_ptr, 1), ENC(srcdst, reg_shift, 0))) | |
3072 | /**/ | |
3073 | ||
40b36596 JM |
3074 | INSN(stnw, d, load_store, store, C64X, |
3075 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_UNALIGNED, | |
3076 | FIX2(FIX(op, 5), FIX(r, 1)), | |
3077 | OP2(ORDREG1, OWMEMSW), | |
3078 | ENC6(ENC(s, data_fu, 0), ENC(y, fu, 0), ENC(mode, mem_mode, 1), | |
3079 | ENC(offsetR, mem_offset, 1), ENC(baseR, reg, 1), | |
3080 | ENC(srcdst, reg, 0))) | |
3081 | ||
51dcdd4d NC |
3082 | /* 16 bits insn */ |
3083 | INSN(stnw, d, doff4_dsz_110, store, C64XP, | |
3084 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSITIVE), | |
3085 | FIX2(FIX(op, 0), FIX(sz, 1)), | |
3086 | OP2(ORTREG1, OWMEMSW), | |
3087 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 0), | |
3088 | ENC(ptr, reg_ptr, 1), ENC(cst, mem_offset, 1))) | |
3089 | INSN(stnw, d, dind_dsz_110, store, C64XP, | |
3090 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(REG_POSITIVE), | |
3091 | FIX2(FIX(op, 0), FIX(sz, 1)), | |
3092 | OP2(ORTREG1, OWMEMSW), | |
3093 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 0), | |
3094 | ENC(ptr, reg_ptr, 1), ENC(src1, mem_offset, 1))) | |
3095 | INSN(stnw, d, dinc_dsz_110, store, C64XP, | |
3096 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSTINCR), | |
3097 | FIX2(FIX(op, 0), FIX(sz, 1)), | |
3098 | OP2(ORTREG1, OWMEMSW), | |
3099 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 0), | |
3100 | ENC(ptr, reg_ptr, 1), ENC(cst, mem_offset_minus_one, 1))) | |
3101 | INSN(stnw, d, ddec_dsz_110, store, C64XP, | |
3102 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(PREDECR), | |
3103 | FIX2(FIX(op, 0), FIX(sz, 1)), | |
3104 | OP2(ORTREG1, OWMEMSW), | |
3105 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 0), | |
3106 | ENC(ptr, reg_ptr, 1), ENC(cst, mem_offset_minus_one, 1))) | |
3107 | /**/ | |
3108 | ||
40b36596 JM |
3109 | INSN(stw, d, load_store, store, C62X, |
3110 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_PREFER(1), | |
3111 | FIX2(FIX(op, 7), FIX(r, 0)), | |
3112 | OP2(ORDREG1, OWMEMSW), | |
3113 | ENC6(ENC(s, data_fu, 0), ENC(y, fu, 0), ENC(mode, mem_mode, 1), | |
3114 | ENC(offsetR, mem_offset, 1), ENC(baseR, reg, 1), | |
3115 | ENC(srcdst, reg, 0))) | |
3116 | INSN(stw, d, load_store_long, store, C62X, | |
3117 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_SIDE_B_ONLY|TIC6X_FLAG_PREFER(0), | |
3118 | FIX1(FIX(op, 7)), | |
3119 | OP2(ORDREG1, OWMEMLW), | |
3120 | ENC4(ENC(s, data_fu, 0), ENC(y, areg, 1), ENC(offsetR, ulcst_dpr_word, 1), | |
3121 | ENC(dst, reg, 0))) | |
3122 | ||
51dcdd4d NC |
3123 | /* 16 bits insn */ |
3124 | INSN(stw, d, doff4_dsz_0xx, store, C64XP, | |
3125 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSITIVE), | |
3126 | FIX2(FIX(op, 0), FIX(sz, 0)), | |
3127 | OP2(ORTREG1, OWMEMSW), | |
3128 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 0), | |
3129 | ENC(ptr, reg_ptr, 1), ENC(cst, mem_offset, 1))) | |
3130 | INSN(stw, d, doff4_dsz_100, store, C64XP, | |
3131 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSITIVE), | |
3132 | FIX2(FIX(op, 0), FIX(sz, 1)), | |
3133 | OP2(ORTREG1, OWMEMSW), | |
3134 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 0), | |
3135 | ENC(ptr, reg_ptr, 1), ENC(cst, mem_offset, 1))) | |
3136 | INSN(stw, d, dind_dsz_0xx, store, C64XP, | |
3137 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(REG_POSITIVE), | |
3138 | FIX2(FIX(op, 0), FIX(sz, 0)), | |
3139 | OP2(ORTREG1, OWMEMSW), | |
3140 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 0), | |
3141 | ENC(ptr, reg_ptr, 1), ENC(src1, mem_offset, 1))) | |
3142 | INSN(stw, d, dind_dsz_100, store, C64XP, | |
3143 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(REG_POSITIVE), | |
3144 | FIX2(FIX(op, 0), FIX(sz, 1)), | |
3145 | OP2(ORTREG1, OWMEMSW), | |
3146 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 0), | |
3147 | ENC(ptr, reg_ptr, 1), ENC(src1, mem_offset, 1))) | |
3148 | INSN(stw, d, dinc_dsz_0xx, store, C64XP, | |
3149 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSTINCR), | |
3150 | FIX2(FIX(op, 0), FIX(sz, 0)), | |
3151 | OP2(ORTREG1, OWMEMSW), | |
3152 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 0), | |
3153 | ENC(ptr, reg_ptr, 1), ENC(cst, mem_offset_minus_one, 1))) | |
3154 | INSN(stw, d, dinc_dsz_100, store, C64XP, | |
3155 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSTINCR), | |
3156 | FIX2(FIX(op, 0), FIX(sz, 1)), | |
3157 | OP2(ORTREG1, OWMEMSW), | |
3158 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 0), | |
3159 | ENC(ptr, reg_ptr, 1), ENC(cst, mem_offset_minus_one, 1))) | |
3160 | INSN(stw, d, ddec_dsz_0xx, store, C64XP, | |
3161 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(PREDECR), | |
3162 | FIX2(FIX(op, 0), FIX(sz, 0)), | |
3163 | OP2(ORTREG1, OWMEMSW), | |
3164 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 0), | |
3165 | ENC(ptr, reg_ptr, 1), ENC(cst, mem_offset_minus_one, 1))) | |
3166 | INSN(stw, d, ddec_dsz_100, store, C64XP, | |
3167 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(PREDECR), | |
3168 | FIX2(FIX(op, 0), FIX(sz, 1)), | |
3169 | OP2(ORTREG1, OWMEMSW), | |
3170 | ENC5(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 0), | |
3171 | ENC(ptr, reg_ptr, 1), ENC(cst, mem_offset_minus_one, 1))) | |
3172 | INSN(stw, d, dpp, store, C64XP, | |
3173 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSTDECR)|TIC6X_FLAG_INSN16_B15PTR|TIC6X_FLAG_INSN16_NORS, | |
3174 | FIX2(FIX(op, 0), FIX(dw, 0)), | |
3175 | OP2(ORTREG1, OWMEMSW), | |
3176 | ENC4(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 0), | |
3177 | ENC(cst, mem_offset_minus_one, 1))) | |
3178 | INSN(stw, d, dstk, store, C64XP, | |
3179 | TIC6X_FLAG_STORE|TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_INSN16_MEM_MODE(POSITIVE)|TIC6X_FLAG_INSN16_B15PTR, | |
3180 | FIX2(FIX(op, 0x0), FIX(s, 1)), | |
3181 | OP2(ORTREG1, OWMEMSW), | |
3182 | ENC4(ENC(s, fu, 0), ENC(t, rside, 0), ENC(srcdst, reg, 0), | |
3183 | ENC(cst, mem_offset, 1))) | |
3184 | /**/ | |
3185 | ||
40b36596 JM |
3186 | INSNE(sub, l_si_xsi_si, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_PREFER(1), |
3187 | FIX1(FIX(op, 0x07)), | |
3188 | OP3(ORREG1, ORXREG1, OWREG1), | |
3189 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
3190 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3191 | INSNE(sub, l_xsi_si_si, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_PREFER(0), | |
3192 | FIX1(FIX(op, 0x17)), | |
3193 | OP3(ORXREG1, ORREG1, OWREG1), | |
3194 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
3195 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3196 | INSNE(sub, l_si_xsi_sl, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_PREFER(1), | |
3197 | FIX1(FIX(op, 0x27)), | |
3198 | OP3(ORREG1, ORXREG1, OWREGL1), | |
3199 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
3200 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3201 | INSNE(sub, l_xsi_si_sl, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_PREFER(0), | |
3202 | FIX1(FIX(op, 0x37)), | |
3203 | OP3(ORXREG1, ORREG1, OWREGL1), | |
3204 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
3205 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3206 | INSNE(sub, l_s5_xsi_si, l, 1_or_2_src, 1cycle, C62X, 0, | |
3207 | FIX1(FIX(op, 0x06)), | |
3208 | OP3(OACST, ORXREG1, OWREG1), | |
3209 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, scst, 0), | |
3210 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3211 | INSNE(sub, l_s5_sl_sl, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, | |
3212 | FIX1(FIX(op, 0x24)), | |
3213 | OP3(OACST, ORREGL1, OWREGL1), | |
3214 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, scst, 0), | |
3215 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3216 | INSNE(sub, l_xsi_s5_si, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_MACRO, | |
3217 | FIX1(FIX(op, 0x2)), | |
3218 | OP3(ORXREG1, OACST, OWREG1), | |
3219 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, scst_negate, 1), | |
3220 | ENC(src2, reg, 0), ENC(dst, reg, 2))) | |
3221 | INSNE(sub, l_sl_s5_sl, l, 1_or_2_src, 1cycle, C62X, | |
3222 | TIC6X_FLAG_MACRO|TIC6X_FLAG_NO_CROSS, | |
3223 | FIX2(FIX(op, 0x20), FIX(x, 0)), | |
3224 | OP3(ORREGL1, OACST, OWREGL1), | |
3225 | ENC4(ENC(s, fu, 0), ENC(src1, scst_negate, 1), ENC(src2, reg, 0), | |
3226 | ENC(dst, reg, 2))) | |
3227 | INSNE(sub, s_si_xsi_si, s, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_PREFER(1), | |
3228 | FIX1(FIX(op, 0x17)), | |
3229 | OP3(ORREG1, ORXREG1, OWREG1), | |
3230 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
3231 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3232 | INSNE(sub, s_s5_xsi_si, s, 1_or_2_src, 1cycle, C62X, 0, | |
3233 | FIX1(FIX(op, 0x16)), | |
3234 | OP3(OACST, ORXREG1, OWREG1), | |
3235 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, scst, 0), | |
3236 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3237 | /* Contrary to SPRUFE8, this is the correct encoding for this | |
3238 | instruction; this instruction can be predicated. */ | |
3239 | INSNE(sub, s_xsi_si_si, s, ext_1_or_2_src, 1cycle, C64X, TIC6X_FLAG_PREFER(0), | |
3240 | FIX1(FIX(op, 0x5)), | |
3241 | OP3(ORXREG1, ORREG1, OWREG1), | |
3242 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
3243 | ENC(src1, reg, 1), ENC(dst, reg, 2))) | |
3244 | INSNE(sub, s_xsi_s5_si, s, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_MACRO, | |
3245 | FIX1(FIX(op, 0x6)), | |
3246 | OP3(ORXREG1, OACST, OWREG1), | |
3247 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, scst_negate, 1), | |
3248 | ENC(src2, reg, 0), ENC(dst, reg, 2))) | |
3249 | INSNE(sub, d_si_si_si, d, 1_or_2_src, 1cycle, C62X, | |
3250 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_PREFER(1), | |
3251 | FIX1(FIX(op, 0x11)), | |
3252 | OP3(ORREG1, ORREG1, OWREG1), | |
3253 | ENC4(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(src1, reg, 1), | |
3254 | ENC(dst, reg, 2))) | |
3255 | INSNE(sub, d_si_u5_si, d, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, | |
3256 | FIX1(FIX(op, 0x13)), | |
3257 | OP3(ORREG1, OACST, OWREG1), | |
3258 | ENC4(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(src1, ucst, 1), | |
3259 | ENC(dst, reg, 2))) | |
3260 | INSNE(sub, d_si_xsi_si, d, ext_1_or_2_src, 1cycle, C64X, TIC6X_FLAG_PREFER(0), | |
3261 | FIX1(FIX(op, 0xc)), | |
3262 | OP3(ORREG1, ORXREG1, OWREG1), | |
3263 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
3264 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3265 | ||
51dcdd4d NC |
3266 | /* 16 bits insn */ |
3267 | INSN(sub, l, l3_sat_0, 1cycle, C64XP, 0, | |
3268 | FIX1(FIX(op, 0x1)), | |
3269 | OP3(ORREG1, ORXREG1, OWREG1), | |
3270 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
3271 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3272 | INSN(sub, l, lx1, 1cycle, C64XP, TIC6X_FLAG_NO_CROSS, | |
3273 | FIX1(FIX(op, 0x2)), | |
3274 | OP3(OHWCST0, ORREG1, OWREG1), | |
3275 | ENC3(ENC(s, fu, 0), ENC(srcdst, reg, 1), ENC(srcdst, reg, 2))) | |
3276 | INSN(sub, s, sx1, 1cycle, C64XP, TIC6X_FLAG_NO_CROSS, | |
3277 | FIX1(FIX(op, 0x2)), | |
3278 | OP3(OHWCST0, ORREG1, OWREG1), | |
3279 | ENC3(ENC(s, fu, 0), ENC(srcdst, reg, 1), ENC(srcdst, reg, 2))) | |
3280 | INSN(sub, s, sx2op, 1cycle, C64XP, 0, | |
3281 | FIX1(FIX(op, 0x1)), | |
3282 | OP3(ORREG1, ORXREG1, OWREG1), | |
3283 | ENC5(ENC(s, fu, 0), ENC(srcdst, reg, 0), ENC(srcdst, reg, 2), | |
3284 | ENC(src2, reg, 1), ENC(x, xpath, 1))) | |
3285 | INSN(sub, s, s3_sat_x, 1cycle, C64XP, 0, | |
3286 | FIX1(FIX(op, 0x1)), | |
3287 | OP3(ORREG1, ORXREG1, OWREG1), | |
3288 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
3289 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3290 | INSN(sub, d, dx1, 1cycle, C64XP, TIC6X_FLAG_NO_CROSS, | |
3291 | FIX1(FIX(op, 0x3)), | |
3292 | OP3(ORREG1, OHWCST1, OWREG1), | |
3293 | ENC3(ENC(s, fu, 0), ENC(srcdst, reg, 0), ENC(srcdst, reg, 2))) | |
3294 | INSN(sub, d, dx2op, 1cycle, C64XP, 0, | |
3295 | FIX1(FIX(op, 0x1)), | |
3296 | OP3(ORREG1, ORXREG1, OWREG1), | |
3297 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(srcdst, reg, 0), | |
3298 | ENC(src2, reg, 1), ENC(srcdst, reg, 2))) | |
3299 | /**/ | |
3300 | ||
40b36596 JM |
3301 | INSNE(subab, d_si_si_si, d, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, |
3302 | FIX1(FIX(op, 0x31)), | |
3303 | OP3(ORREG1, ORREG1, OWREG1), | |
3304 | ENC4(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(src1, reg, 1), | |
3305 | ENC(dst, reg, 2))) | |
3306 | INSNE(subab, d_si_u5_si, d, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, | |
3307 | FIX1(FIX(op, 0x33)), | |
3308 | OP3(ORREG1, OACST, OWREG1), | |
3309 | ENC4(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(src1, ucst, 1), | |
3310 | ENC(dst, reg, 2))) | |
3311 | ||
3312 | INSN(subabs4, l, 1_or_2_src, 1cycle, C64X, 0, | |
3313 | FIX1(FIX(op, 0x5a)), | |
3314 | OP3(ORREG1, ORXREG1, OWREG1), | |
3315 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
3316 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3317 | ||
3318 | INSNE(subah, d_si_si_si, d, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, | |
3319 | FIX1(FIX(op, 0x35)), | |
3320 | OP3(ORREG1, ORREG1, OWREG1), | |
3321 | ENC4(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(src1, reg, 1), | |
3322 | ENC(dst, reg, 2))) | |
3323 | INSNE(subah, d_si_u5_si, d, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, | |
3324 | FIX1(FIX(op, 0x37)), | |
3325 | OP3(ORREG1, OACST, OWREG1), | |
3326 | ENC4(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(src1, ucst, 1), | |
3327 | ENC(dst, reg, 2))) | |
3328 | ||
3329 | INSNE(subaw, d_si_si_si, d, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, | |
3330 | FIX1(FIX(op, 0x39)), | |
3331 | OP3(ORREG1, ORREG1, OWREG1), | |
3332 | ENC4(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(src1, reg, 1), | |
3333 | ENC(dst, reg, 2))) | |
3334 | INSNE(subaw, d_si_u5_si, d, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, | |
3335 | FIX1(FIX(op, 0x3b)), | |
3336 | OP3(ORREG1, OACST, OWREG1), | |
3337 | ENC4(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(src1, ucst, 1), | |
3338 | ENC(dst, reg, 2))) | |
3339 | ||
51dcdd4d NC |
3340 | /* 16 bits insn */ |
3341 | INSN(subaw, d, dx5p, 1cycle, C64XP, 0, | |
3342 | FIX1(FIX(op, 1)), | |
3343 | OP3(ORB15REG1, OACST, OWB15REG1), | |
3344 | ENC2(ENC(s, fu, 0), ENC(cst, ucst, 1))) | |
3345 | /**/ | |
3346 | ||
40b36596 JM |
3347 | INSN(subc, l, 1_or_2_src, 1cycle, C62X, 0, |
3348 | FIX1(FIX(op, 0x4b)), | |
3349 | OP3(ORREG1, ORXREG1, OWREG1), | |
3350 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
3351 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3352 | ||
3353 | INSNE(subdp, l_dp_xdp_dp, l, 1_or_2_src, addsubdp, C67X, TIC6X_FLAG_PREFER(1), | |
3354 | FIX1(FIX(op, 0x19)), | |
3355 | OP3(ORREGD12, ORXREGD12, OWREGD67), | |
3356 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
3357 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3358 | INSNE(subdp, l_xdp_dp_dp, l, 1_or_2_src, addsubdp, C67X, TIC6X_FLAG_PREFER(0), | |
3359 | FIX1(FIX(op, 0x1d)), | |
3360 | OP3(ORXREGD12, ORREGD12, OWREGD67), | |
3361 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
3362 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3363 | INSNE(subdp, s_dp_xdp_dp, s, l_1_or_2_src, addsubdp, C67XP, | |
3364 | TIC6X_FLAG_PREFER(1), | |
3365 | FIX1(FIX(op, 0x73)), | |
3366 | OP3(ORREGD12, ORXREGD12, OWREGD67), | |
3367 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
3368 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3369 | INSNE(subdp, s_xdp_dp_dp, s, l_1_or_2_src, addsubdp, C67XP, | |
3370 | TIC6X_FLAG_PREFER(0), | |
3371 | FIX1(FIX(op, 0x77)), | |
3372 | OP3(ORXREGD12, ORREGD12, OWREGD67), | |
3373 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
3374 | ENC(src1, reg, 1), ENC(dst, reg, 2))) | |
3375 | ||
3376 | INSNE(subsp, l_sp_xsp_sp, l, 1_or_2_src, 4cycle, C67X, TIC6X_FLAG_PREFER(1), | |
3377 | FIX1(FIX(op, 0x11)), | |
3378 | OP3(ORREG1, ORXREG1, OWREG4), | |
3379 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
3380 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3381 | INSNE(subsp, l_xsp_sp_sp, l, 1_or_2_src, 4cycle, C67X, TIC6X_FLAG_PREFER(0), | |
3382 | FIX1(FIX(op, 0x15)), | |
3383 | OP3(ORXREG1, ORREG1, OWREG4), | |
3384 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
3385 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3386 | INSNE(subsp, s_sp_xsp_sp, s, l_1_or_2_src, 4cycle, C67XP, | |
3387 | TIC6X_FLAG_PREFER(1), | |
3388 | FIX1(FIX(op, 0x71)), | |
3389 | OP3(ORREG1, ORXREG1, OWREG4), | |
3390 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
3391 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3392 | INSNE(subsp, s_xsp_sp_sp, s, l_1_or_2_src, 4cycle, C67XP, | |
3393 | TIC6X_FLAG_PREFER(0), | |
3394 | FIX1(FIX(op, 0x75)), | |
3395 | OP3(ORXREG1, ORREG1, OWREG4), | |
3396 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
3397 | ENC(src1, reg, 1), ENC(dst, reg, 2))) | |
3398 | ||
3399 | INSNE(subu, l_ui_xui_ul, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_PREFER(1), | |
3400 | FIX1(FIX(op, 0x2f)), | |
3401 | OP3(ORREG1, ORXREG1, OWREGL1), | |
3402 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
3403 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3404 | INSNE(subu, l_xui_ui_ul, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_PREFER(0), | |
3405 | FIX1(FIX(op, 0x3f)), | |
3406 | OP3(ORXREG1, ORREG1, OWREGL1), | |
3407 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
3408 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3409 | ||
3410 | INSN(sub2, l, 1_or_2_src, 1cycle, C64X, 0, | |
3411 | FIX1(FIX(op, 0x04)), | |
3412 | OP3(ORREG1, ORXREG1, OWREG1), | |
3413 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
3414 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3415 | INSN(sub2, s, 1_or_2_src, 1cycle, C62X, 0, | |
3416 | FIX1(FIX(op, 0x11)), | |
3417 | OP3(ORREG1, ORXREG1, OWREG1), | |
3418 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
3419 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3420 | INSN(sub2, d, ext_1_or_2_src, 1cycle, C64X, 0, | |
3421 | FIX1(FIX(op, 0x5)), | |
3422 | OP3(ORREG1, ORXREG1, OWREG1), | |
3423 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
3424 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3425 | ||
3426 | INSN(sub4, l, 1_or_2_src, 1cycle, C64X, 0, | |
3427 | FIX1(FIX(op, 0x66)), | |
3428 | OP3(ORREG1, ORXREG1, OWREG1), | |
3429 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
3430 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3431 | ||
3432 | INSN(swap2, l, 1_or_2_src, 1cycle, C64X, TIC6X_FLAG_MACRO|TIC6X_FLAG_NO_CROSS, | |
3433 | FIX2(FIX(op, 0x1b), FIX(x, 0)), | |
3434 | OP2(ORREG1, OWREG1), | |
3435 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
3436 | ENC(src2, reg, 0), ENC(dst, reg, 1))) | |
3437 | INSN(swap2, s, 1_or_2_src, 1cycle, C64X, TIC6X_FLAG_MACRO|TIC6X_FLAG_NO_CROSS, | |
3438 | FIX2(FIX(op, 0x10), FIX(x, 0)), | |
3439 | OP2(ORREG1, OWREG1), | |
3440 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
3441 | ENC(src2, reg, 0), ENC(dst, reg, 1))) | |
3442 | ||
3443 | /* Contrary to SPRUFE8, this is the correct encoding for this | |
3444 | instruction. */ | |
3445 | INSN(swap4, l, unary, 1cycle, C64X, 0, | |
3446 | FIX1(FIX(op, 0x1)), | |
3447 | OP2(ORXREG1, OWREG1), | |
3448 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
3449 | ENC(dst, reg, 1))) | |
3450 | ||
3451 | INSN(swe, nfu, swe, 1cycle, C64XP, 0, | |
3452 | FIX1(FIX(s, 0)), | |
3453 | OP0(), | |
3454 | ENC0()) | |
3455 | ||
3456 | INSN(swenr, nfu, swenr, 1cycle, C64XP, 0, | |
3457 | FIX1(FIX(s, 0)), | |
3458 | OP0(), | |
3459 | ENC0()) | |
3460 | ||
3461 | INSN(unpkhu4, l, unary, 1cycle, C64X, 0, | |
3462 | FIX1(FIX(op, 0x03)), | |
3463 | OP2(ORXREG1, OWREG1), | |
3464 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
3465 | ENC(dst, reg, 1))) | |
3466 | INSN(unpkhu4, s, unary, 1cycle, C64X, 0, | |
3467 | FIX1(FIX(op, 0x03)), | |
3468 | OP2(ORXREG1, OWREG1), | |
3469 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
3470 | ENC(dst, reg, 1))) | |
3471 | ||
3472 | INSN(unpklu4, l, unary, 1cycle, C64X, 0, | |
3473 | FIX1(FIX(op, 0x02)), | |
3474 | OP2(ORXREG1, OWREG1), | |
3475 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
3476 | ENC(dst, reg, 1))) | |
3477 | INSN(unpklu4, s, unary, 1cycle, C64X, 0, | |
3478 | FIX1(FIX(op, 0x02)), | |
3479 | OP2(ORXREG1, OWREG1), | |
3480 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
3481 | ENC(dst, reg, 1))) | |
3482 | ||
3483 | INSNE(xor, l_ui_xui_ui, l, 1_or_2_src, 1cycle, C62X, 0, | |
3484 | FIX1(FIX(op, 0x6f)), | |
3485 | OP3(ORREG1, ORXREG1, OWREG1), | |
3486 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
3487 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3488 | INSNE(xor, l_s5_xui_ui, l, 1_or_2_src, 1cycle, C62X, 0, | |
3489 | FIX1(FIX(op, 0x6e)), | |
3490 | OP3(OACST, ORXREG1, OWREG1), | |
3491 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, scst, 0), | |
3492 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3493 | INSNE(xor, s_ui_xui_ui, s, 1_or_2_src, 1cycle, C62X, 0, | |
3494 | FIX1(FIX(op, 0x0b)), | |
3495 | OP3(ORREG1, ORXREG1, OWREG1), | |
3496 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
3497 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3498 | INSNE(xor, s_s5_xui_ui, s, 1_or_2_src, 1cycle, C62X, 0, | |
3499 | FIX1(FIX(op, 0x0a)), | |
3500 | OP3(OACST, ORXREG1, OWREG1), | |
3501 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, scst, 0), | |
3502 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3503 | INSNE(xor, d_ui_xui_ui, d, ext_1_or_2_src, 1cycle, C64X, 0, | |
3504 | FIX1(FIX(op, 0xe)), | |
3505 | OP3(ORREG1, ORXREG1, OWREG1), | |
3506 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
3507 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3508 | INSNE(xor, d_s5_xui_ui, d, ext_1_or_2_src, 1cycle, C64X, 0, | |
3509 | FIX1(FIX(op, 0xf)), | |
3510 | OP3(OACST, ORXREG1, OWREG1), | |
3511 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, scst, 0), | |
3512 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3513 | ||
51dcdd4d NC |
3514 | /* 16 bits insn */ |
3515 | INSN(xor, l, l2c, 1cycle, C64XP, 0, | |
3516 | FIX1(FIX(op, 0x2)), | |
3517 | OP3(ORREG1, ORXREG1, OWREG1NORS), | |
3518 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
3519 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3520 | INSNU(xor, l, lsdx1, 1cycle, C64XP, TIC6X_FLAG_NO_CROSS, | |
3521 | FIX2(FIX(op, 0x7), FIX(unit, 0x0)), | |
e21e1a51 | 3522 | OP3(ORREG1, OHWCST1, OWREG1), |
51dcdd4d NC |
3523 | ENC3(ENC(s, fu, 0), ENC(srcdst, reg, 0), ENC(srcdst, reg, 2))) |
3524 | INSNU(xor, s, lsdx1, 1cycle, C64XP, TIC6X_FLAG_NO_CROSS, | |
3525 | FIX2(FIX(op, 0x7), FIX(unit, 0x1)), | |
e21e1a51 | 3526 | OP3(ORREG1, OHWCST1, OWREG1), |
51dcdd4d NC |
3527 | ENC3(ENC(s, fu, 0), ENC(srcdst, reg, 0), ENC(srcdst, reg, 2))) |
3528 | INSNU(xor, d, lsdx1, 1cycle, C64XP, TIC6X_FLAG_NO_CROSS, | |
3529 | FIX2(FIX(op, 0x7), FIX(unit, 0x2)), | |
e21e1a51 | 3530 | OP3(ORREG1, OHWCST1, OWREG1), |
51dcdd4d NC |
3531 | ENC3(ENC(s, fu, 0), ENC(srcdst, reg, 0), ENC(srcdst, reg, 2))) |
3532 | /**/ | |
3533 | ||
40b36596 JM |
3534 | INSN(xormpy, m, 1_or_2_src, 4cycle, C64XP, 0, |
3535 | FIX1(FIX(op, 0x1b)), | |
3536 | OP3(ORREG1, ORXREG1, OWREG4), | |
3537 | ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0), | |
3538 | ENC(src2, reg, 1), ENC(dst, reg, 2))) | |
3539 | ||
3540 | INSN(xpnd2, m, unary, 1616_m, C64X, 0, | |
3541 | FIX1(FIX(op, 0x19)), | |
3542 | OP2(ORXREG1, OWREG2), | |
3543 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
3544 | ENC(dst, reg, 1))) | |
3545 | ||
3546 | INSN(xpnd4, m, unary, 1616_m, C64X, 0, | |
3547 | FIX1(FIX(op, 0x18)), | |
3548 | OP2(ORXREG1, OWREG2), | |
3549 | ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0), | |
3550 | ENC(dst, reg, 1))) | |
3551 | ||
3552 | INSN(zero, s, mvk, 1cycle, C62X, TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_MACRO, | |
3553 | FIX2(FIX(h, 0), FIX(cst, 0)), | |
3554 | OP1(OWREG1), | |
3555 | ENC2(ENC(s, fu, 0), ENC(dst, reg, 0))) | |
3556 | INSN(zero, l, unary, 1cycle, C64X, | |
3557 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_MACRO|TIC6X_FLAG_PREFER(1), | |
3558 | FIX3(FIX(x, 0), FIX(op, 0x05), FIX(src2, 0)), | |
3559 | OP1(OWREG1), | |
3560 | ENC2(ENC(s, fu, 0), ENC(dst, reg, 0))) | |
3561 | INSNE(zero, l_sub, l, 1_or_2_src, 1cycle, C62X, | |
3562 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_MACRO|TIC6X_FLAG_PREFER(0), | |
3563 | FIX2(FIX(op, 0x07), FIX(x, 0)), | |
3564 | OP1(OWREG1), | |
3565 | ENC4(ENC(s, fu, 0), ENC(src1, reg_unused, 0), ENC(src2, reg_unused, 0), | |
3566 | ENC(dst, reg, 0))) | |
3567 | INSNE(zero, l_sub_sl, l, 1_or_2_src, 1cycle, C62X, | |
3568 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_MACRO, | |
3569 | FIX2(FIX(op, 0x27), FIX(x, 0)), | |
3570 | OP1(OWREGL1), | |
3571 | ENC4(ENC(s, fu, 0), ENC(src1, reg_unused, 0), ENC(src2, reg_unused, 0), | |
3572 | ENC(dst, reg, 0))) | |
3573 | INSNE(zero, d_mvk, d, 1_or_2_src, 1cycle, C64X, | |
3574 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_MACRO|TIC6X_FLAG_PREFER(1), | |
3575 | FIX3(FIX(op, 0x00), FIX(src1, 0), FIX(src2, 0)), | |
3576 | OP1(OWREG1), | |
3577 | ENC2(ENC(s, fu, 0), ENC(dst, reg, 0))) | |
3578 | INSNE(zero, d_sub, d, 1_or_2_src, 1cycle, C62X, | |
3579 | TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_MACRO|TIC6X_FLAG_PREFER(0), | |
3580 | FIX1(FIX(op, 0x11)), | |
3581 | OP1(OWREG1), | |
3582 | ENC4(ENC(s, fu, 0), ENC(src2, reg_unused, 0), ENC(src1, reg_unused, 0), | |
3583 | ENC(dst, reg, 0))) | |
3584 | ||
3585 | #undef TIC6X_INSN_C64X_AND_C67X | |
3586 | #undef tic6x_insn_format_nfu_s_branch_nop_cst | |
3587 | #undef tic6x_insn_format_s_l_1_or_2_src | |
3588 | #undef RAN | |
3589 | #undef FIX | |
3590 | #undef FIX0 | |
3591 | #undef FIX1 | |
3592 | #undef FIX2 | |
3593 | #undef FIX3 | |
3594 | #undef FIX4 | |
3595 | #undef OP0 | |
3596 | #undef OP1 | |
3597 | #undef OP2 | |
3598 | #undef OP3 | |
3599 | #undef OP4 | |
3600 | #undef OACST | |
3601 | #undef OLCST | |
51dcdd4d NC |
3602 | #undef OHWCSTM1 |
3603 | #undef OHWCST0 | |
3604 | #undef OHWCST1 | |
3605 | #undef OHWCST5 | |
3606 | #undef OHWCST16 | |
3607 | #undef OHWCST24 | |
3608 | #undef OHWCST31 | |
40b36596 JM |
3609 | #undef OFULIST |
3610 | #undef ORIRP1 | |
3611 | #undef ORNRP1 | |
3612 | #undef OWREG1 | |
3613 | #undef OWRETREG1 | |
3614 | #undef ORREG1 | |
3615 | #undef ORDREG1 | |
3616 | #undef ORWREG1 | |
3617 | #undef ORAREG1 | |
3618 | #undef ORXREG1 | |
3619 | #undef ORREG12 | |
3620 | #undef ORREG14 | |
3621 | #undef ORXREG14 | |
3622 | #undef OWREG2 | |
3623 | #undef OWREG4 | |
3624 | #undef OWREG9 | |
3625 | #undef OWDREG5 | |
3626 | #undef OWREGL1 | |
3627 | #undef ORREGL1 | |
3628 | #undef OWREGD1 | |
51dcdd4d NC |
3629 | #undef ORTREG1 |
3630 | #undef ORTREGD1 | |
3631 | #undef OWTREG5 | |
3632 | #undef OWTREGD5 | |
40b36596 JM |
3633 | #undef OWREGD12 |
3634 | #undef OWREGD4 | |
3635 | #undef ORREGD1 | |
3636 | #undef OWREGD45 | |
3637 | #undef OWREGD67 | |
3638 | #undef ORDREGD1 | |
3639 | #undef OWDREGD5 | |
3640 | #undef ORREGD12 | |
3641 | #undef ORXREGD12 | |
165546ad | 3642 | #undef ORXREGD1234 |
40b36596 JM |
3643 | #undef ORREGD1324 |
3644 | #undef OWREGD910 | |
51dcdd4d | 3645 | #undef OWILC1 |
40b36596 JM |
3646 | #undef ORCREG1 |
3647 | #undef OWCREG1 | |
51dcdd4d NC |
3648 | #undef OWREG1Z |
3649 | #undef ORB15REG1 | |
3650 | #undef OWB15REG1 | |
40b36596 JM |
3651 | #undef ORMEMDW |
3652 | #undef OWMEMDW | |
3653 | #undef ORMEMSB | |
3654 | #undef OWMEMSB | |
3655 | #undef ORMEMLB | |
3656 | #undef OWMEMLB | |
3657 | #undef ORMEMSH | |
3658 | #undef OWMEMSH | |
3659 | #undef ORMEMLH | |
3660 | #undef OWMEMLH | |
3661 | #undef ORMEMSW | |
3662 | #undef OWMEMSW | |
3663 | #undef ORMEMLW | |
3664 | #undef OWMEMLW | |
3665 | #undef ORMEMSD | |
3666 | #undef OWMEMSD | |
3667 | #undef ORMEMND | |
3668 | #undef OWMEMND | |
3669 | #undef ENC | |
3670 | #undef ENC0 | |
3671 | #undef ENC1 | |
3672 | #undef ENC2 | |
3673 | #undef ENC3 | |
3674 | #undef ENC4 | |
3675 | #undef ENC5 | |
3676 | #undef ENC6 | |
3677 | #undef ENC7 |