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aa137e4d NC |
1 | /* TILE-Gx opcode information. |
2 | * | |
4b95cf5c | 3 | * Copyright (C) 2011-2014 Free Software Foundation, Inc. |
aa137e4d NC |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation; either version 3 of the License, or | |
8 | * (at your option) any later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, | |
18 | * MA 02110-1301, USA. | |
19 | */ | |
20 | ||
21 | #ifndef opcode_tile_h | |
22 | #define opcode_tile_h | |
23 | ||
24 | typedef unsigned long long tilegx_bundle_bits; | |
25 | ||
26 | ||
27 | enum | |
28 | { | |
29 | TILEGX_MAX_OPERANDS = 4 /* bfexts */ | |
30 | }; | |
31 | ||
32 | typedef enum | |
33 | { | |
34 | TILEGX_OPC_BPT, | |
35 | TILEGX_OPC_INFO, | |
36 | TILEGX_OPC_INFOL, | |
6f7be959 WL |
37 | TILEGX_OPC_LD4S_TLS, |
38 | TILEGX_OPC_LD_TLS, | |
aa137e4d NC |
39 | TILEGX_OPC_MOVE, |
40 | TILEGX_OPC_MOVEI, | |
41 | TILEGX_OPC_MOVELI, | |
42 | TILEGX_OPC_PREFETCH, | |
43 | TILEGX_OPC_PREFETCH_ADD_L1, | |
44 | TILEGX_OPC_PREFETCH_ADD_L1_FAULT, | |
45 | TILEGX_OPC_PREFETCH_ADD_L2, | |
46 | TILEGX_OPC_PREFETCH_ADD_L2_FAULT, | |
47 | TILEGX_OPC_PREFETCH_ADD_L3, | |
48 | TILEGX_OPC_PREFETCH_ADD_L3_FAULT, | |
49 | TILEGX_OPC_PREFETCH_L1, | |
50 | TILEGX_OPC_PREFETCH_L1_FAULT, | |
51 | TILEGX_OPC_PREFETCH_L2, | |
52 | TILEGX_OPC_PREFETCH_L2_FAULT, | |
53 | TILEGX_OPC_PREFETCH_L3, | |
54 | TILEGX_OPC_PREFETCH_L3_FAULT, | |
55 | TILEGX_OPC_RAISE, | |
56 | TILEGX_OPC_ADD, | |
57 | TILEGX_OPC_ADDI, | |
58 | TILEGX_OPC_ADDLI, | |
59 | TILEGX_OPC_ADDX, | |
60 | TILEGX_OPC_ADDXI, | |
61 | TILEGX_OPC_ADDXLI, | |
62 | TILEGX_OPC_ADDXSC, | |
63 | TILEGX_OPC_AND, | |
64 | TILEGX_OPC_ANDI, | |
65 | TILEGX_OPC_BEQZ, | |
66 | TILEGX_OPC_BEQZT, | |
67 | TILEGX_OPC_BFEXTS, | |
68 | TILEGX_OPC_BFEXTU, | |
69 | TILEGX_OPC_BFINS, | |
70 | TILEGX_OPC_BGEZ, | |
71 | TILEGX_OPC_BGEZT, | |
72 | TILEGX_OPC_BGTZ, | |
73 | TILEGX_OPC_BGTZT, | |
74 | TILEGX_OPC_BLBC, | |
75 | TILEGX_OPC_BLBCT, | |
76 | TILEGX_OPC_BLBS, | |
77 | TILEGX_OPC_BLBST, | |
78 | TILEGX_OPC_BLEZ, | |
79 | TILEGX_OPC_BLEZT, | |
80 | TILEGX_OPC_BLTZ, | |
81 | TILEGX_OPC_BLTZT, | |
82 | TILEGX_OPC_BNEZ, | |
83 | TILEGX_OPC_BNEZT, | |
84 | TILEGX_OPC_CLZ, | |
85 | TILEGX_OPC_CMOVEQZ, | |
86 | TILEGX_OPC_CMOVNEZ, | |
87 | TILEGX_OPC_CMPEQ, | |
88 | TILEGX_OPC_CMPEQI, | |
89 | TILEGX_OPC_CMPEXCH, | |
90 | TILEGX_OPC_CMPEXCH4, | |
91 | TILEGX_OPC_CMPLES, | |
92 | TILEGX_OPC_CMPLEU, | |
93 | TILEGX_OPC_CMPLTS, | |
94 | TILEGX_OPC_CMPLTSI, | |
95 | TILEGX_OPC_CMPLTU, | |
96 | TILEGX_OPC_CMPLTUI, | |
97 | TILEGX_OPC_CMPNE, | |
98 | TILEGX_OPC_CMUL, | |
99 | TILEGX_OPC_CMULA, | |
100 | TILEGX_OPC_CMULAF, | |
101 | TILEGX_OPC_CMULF, | |
102 | TILEGX_OPC_CMULFR, | |
103 | TILEGX_OPC_CMULH, | |
104 | TILEGX_OPC_CMULHR, | |
105 | TILEGX_OPC_CRC32_32, | |
106 | TILEGX_OPC_CRC32_8, | |
107 | TILEGX_OPC_CTZ, | |
108 | TILEGX_OPC_DBLALIGN, | |
109 | TILEGX_OPC_DBLALIGN2, | |
110 | TILEGX_OPC_DBLALIGN4, | |
111 | TILEGX_OPC_DBLALIGN6, | |
112 | TILEGX_OPC_DRAIN, | |
113 | TILEGX_OPC_DTLBPR, | |
114 | TILEGX_OPC_EXCH, | |
115 | TILEGX_OPC_EXCH4, | |
116 | TILEGX_OPC_FDOUBLE_ADD_FLAGS, | |
117 | TILEGX_OPC_FDOUBLE_ADDSUB, | |
118 | TILEGX_OPC_FDOUBLE_MUL_FLAGS, | |
119 | TILEGX_OPC_FDOUBLE_PACK1, | |
120 | TILEGX_OPC_FDOUBLE_PACK2, | |
121 | TILEGX_OPC_FDOUBLE_SUB_FLAGS, | |
122 | TILEGX_OPC_FDOUBLE_UNPACK_MAX, | |
123 | TILEGX_OPC_FDOUBLE_UNPACK_MIN, | |
124 | TILEGX_OPC_FETCHADD, | |
125 | TILEGX_OPC_FETCHADD4, | |
126 | TILEGX_OPC_FETCHADDGEZ, | |
127 | TILEGX_OPC_FETCHADDGEZ4, | |
128 | TILEGX_OPC_FETCHAND, | |
129 | TILEGX_OPC_FETCHAND4, | |
130 | TILEGX_OPC_FETCHOR, | |
131 | TILEGX_OPC_FETCHOR4, | |
132 | TILEGX_OPC_FINV, | |
133 | TILEGX_OPC_FLUSH, | |
134 | TILEGX_OPC_FLUSHWB, | |
135 | TILEGX_OPC_FNOP, | |
136 | TILEGX_OPC_FSINGLE_ADD1, | |
137 | TILEGX_OPC_FSINGLE_ADDSUB2, | |
138 | TILEGX_OPC_FSINGLE_MUL1, | |
139 | TILEGX_OPC_FSINGLE_MUL2, | |
140 | TILEGX_OPC_FSINGLE_PACK1, | |
141 | TILEGX_OPC_FSINGLE_PACK2, | |
142 | TILEGX_OPC_FSINGLE_SUB1, | |
143 | TILEGX_OPC_ICOH, | |
144 | TILEGX_OPC_ILL, | |
145 | TILEGX_OPC_INV, | |
146 | TILEGX_OPC_IRET, | |
147 | TILEGX_OPC_J, | |
148 | TILEGX_OPC_JAL, | |
149 | TILEGX_OPC_JALR, | |
150 | TILEGX_OPC_JALRP, | |
151 | TILEGX_OPC_JR, | |
152 | TILEGX_OPC_JRP, | |
153 | TILEGX_OPC_LD, | |
154 | TILEGX_OPC_LD1S, | |
155 | TILEGX_OPC_LD1S_ADD, | |
156 | TILEGX_OPC_LD1U, | |
157 | TILEGX_OPC_LD1U_ADD, | |
158 | TILEGX_OPC_LD2S, | |
159 | TILEGX_OPC_LD2S_ADD, | |
160 | TILEGX_OPC_LD2U, | |
161 | TILEGX_OPC_LD2U_ADD, | |
162 | TILEGX_OPC_LD4S, | |
163 | TILEGX_OPC_LD4S_ADD, | |
164 | TILEGX_OPC_LD4U, | |
165 | TILEGX_OPC_LD4U_ADD, | |
166 | TILEGX_OPC_LD_ADD, | |
167 | TILEGX_OPC_LDNA, | |
168 | TILEGX_OPC_LDNA_ADD, | |
169 | TILEGX_OPC_LDNT, | |
170 | TILEGX_OPC_LDNT1S, | |
171 | TILEGX_OPC_LDNT1S_ADD, | |
172 | TILEGX_OPC_LDNT1U, | |
173 | TILEGX_OPC_LDNT1U_ADD, | |
174 | TILEGX_OPC_LDNT2S, | |
175 | TILEGX_OPC_LDNT2S_ADD, | |
176 | TILEGX_OPC_LDNT2U, | |
177 | TILEGX_OPC_LDNT2U_ADD, | |
178 | TILEGX_OPC_LDNT4S, | |
179 | TILEGX_OPC_LDNT4S_ADD, | |
180 | TILEGX_OPC_LDNT4U, | |
181 | TILEGX_OPC_LDNT4U_ADD, | |
182 | TILEGX_OPC_LDNT_ADD, | |
183 | TILEGX_OPC_LNK, | |
184 | TILEGX_OPC_MF, | |
185 | TILEGX_OPC_MFSPR, | |
186 | TILEGX_OPC_MM, | |
187 | TILEGX_OPC_MNZ, | |
188 | TILEGX_OPC_MTSPR, | |
189 | TILEGX_OPC_MUL_HS_HS, | |
190 | TILEGX_OPC_MUL_HS_HU, | |
191 | TILEGX_OPC_MUL_HS_LS, | |
192 | TILEGX_OPC_MUL_HS_LU, | |
193 | TILEGX_OPC_MUL_HU_HU, | |
194 | TILEGX_OPC_MUL_HU_LS, | |
195 | TILEGX_OPC_MUL_HU_LU, | |
196 | TILEGX_OPC_MUL_LS_LS, | |
197 | TILEGX_OPC_MUL_LS_LU, | |
198 | TILEGX_OPC_MUL_LU_LU, | |
199 | TILEGX_OPC_MULA_HS_HS, | |
200 | TILEGX_OPC_MULA_HS_HU, | |
201 | TILEGX_OPC_MULA_HS_LS, | |
202 | TILEGX_OPC_MULA_HS_LU, | |
203 | TILEGX_OPC_MULA_HU_HU, | |
204 | TILEGX_OPC_MULA_HU_LS, | |
205 | TILEGX_OPC_MULA_HU_LU, | |
206 | TILEGX_OPC_MULA_LS_LS, | |
207 | TILEGX_OPC_MULA_LS_LU, | |
208 | TILEGX_OPC_MULA_LU_LU, | |
209 | TILEGX_OPC_MULAX, | |
210 | TILEGX_OPC_MULX, | |
211 | TILEGX_OPC_MZ, | |
212 | TILEGX_OPC_NAP, | |
213 | TILEGX_OPC_NOP, | |
214 | TILEGX_OPC_NOR, | |
215 | TILEGX_OPC_OR, | |
216 | TILEGX_OPC_ORI, | |
217 | TILEGX_OPC_PCNT, | |
218 | TILEGX_OPC_REVBITS, | |
219 | TILEGX_OPC_REVBYTES, | |
220 | TILEGX_OPC_ROTL, | |
221 | TILEGX_OPC_ROTLI, | |
222 | TILEGX_OPC_SHL, | |
223 | TILEGX_OPC_SHL16INSLI, | |
224 | TILEGX_OPC_SHL1ADD, | |
225 | TILEGX_OPC_SHL1ADDX, | |
226 | TILEGX_OPC_SHL2ADD, | |
227 | TILEGX_OPC_SHL2ADDX, | |
228 | TILEGX_OPC_SHL3ADD, | |
229 | TILEGX_OPC_SHL3ADDX, | |
230 | TILEGX_OPC_SHLI, | |
231 | TILEGX_OPC_SHLX, | |
232 | TILEGX_OPC_SHLXI, | |
233 | TILEGX_OPC_SHRS, | |
234 | TILEGX_OPC_SHRSI, | |
235 | TILEGX_OPC_SHRU, | |
236 | TILEGX_OPC_SHRUI, | |
237 | TILEGX_OPC_SHRUX, | |
238 | TILEGX_OPC_SHRUXI, | |
239 | TILEGX_OPC_SHUFFLEBYTES, | |
240 | TILEGX_OPC_ST, | |
241 | TILEGX_OPC_ST1, | |
242 | TILEGX_OPC_ST1_ADD, | |
243 | TILEGX_OPC_ST2, | |
244 | TILEGX_OPC_ST2_ADD, | |
245 | TILEGX_OPC_ST4, | |
246 | TILEGX_OPC_ST4_ADD, | |
247 | TILEGX_OPC_ST_ADD, | |
248 | TILEGX_OPC_STNT, | |
249 | TILEGX_OPC_STNT1, | |
250 | TILEGX_OPC_STNT1_ADD, | |
251 | TILEGX_OPC_STNT2, | |
252 | TILEGX_OPC_STNT2_ADD, | |
253 | TILEGX_OPC_STNT4, | |
254 | TILEGX_OPC_STNT4_ADD, | |
255 | TILEGX_OPC_STNT_ADD, | |
256 | TILEGX_OPC_SUB, | |
257 | TILEGX_OPC_SUBX, | |
258 | TILEGX_OPC_SUBXSC, | |
259 | TILEGX_OPC_SWINT0, | |
260 | TILEGX_OPC_SWINT1, | |
261 | TILEGX_OPC_SWINT2, | |
262 | TILEGX_OPC_SWINT3, | |
263 | TILEGX_OPC_TBLIDXB0, | |
264 | TILEGX_OPC_TBLIDXB1, | |
265 | TILEGX_OPC_TBLIDXB2, | |
266 | TILEGX_OPC_TBLIDXB3, | |
267 | TILEGX_OPC_V1ADD, | |
268 | TILEGX_OPC_V1ADDI, | |
269 | TILEGX_OPC_V1ADDUC, | |
270 | TILEGX_OPC_V1ADIFFU, | |
271 | TILEGX_OPC_V1AVGU, | |
272 | TILEGX_OPC_V1CMPEQ, | |
273 | TILEGX_OPC_V1CMPEQI, | |
274 | TILEGX_OPC_V1CMPLES, | |
275 | TILEGX_OPC_V1CMPLEU, | |
276 | TILEGX_OPC_V1CMPLTS, | |
277 | TILEGX_OPC_V1CMPLTSI, | |
278 | TILEGX_OPC_V1CMPLTU, | |
279 | TILEGX_OPC_V1CMPLTUI, | |
280 | TILEGX_OPC_V1CMPNE, | |
281 | TILEGX_OPC_V1DDOTPU, | |
282 | TILEGX_OPC_V1DDOTPUA, | |
283 | TILEGX_OPC_V1DDOTPUS, | |
284 | TILEGX_OPC_V1DDOTPUSA, | |
285 | TILEGX_OPC_V1DOTP, | |
286 | TILEGX_OPC_V1DOTPA, | |
287 | TILEGX_OPC_V1DOTPU, | |
288 | TILEGX_OPC_V1DOTPUA, | |
289 | TILEGX_OPC_V1DOTPUS, | |
290 | TILEGX_OPC_V1DOTPUSA, | |
291 | TILEGX_OPC_V1INT_H, | |
292 | TILEGX_OPC_V1INT_L, | |
293 | TILEGX_OPC_V1MAXU, | |
294 | TILEGX_OPC_V1MAXUI, | |
295 | TILEGX_OPC_V1MINU, | |
296 | TILEGX_OPC_V1MINUI, | |
297 | TILEGX_OPC_V1MNZ, | |
298 | TILEGX_OPC_V1MULTU, | |
299 | TILEGX_OPC_V1MULU, | |
300 | TILEGX_OPC_V1MULUS, | |
301 | TILEGX_OPC_V1MZ, | |
302 | TILEGX_OPC_V1SADAU, | |
303 | TILEGX_OPC_V1SADU, | |
304 | TILEGX_OPC_V1SHL, | |
305 | TILEGX_OPC_V1SHLI, | |
306 | TILEGX_OPC_V1SHRS, | |
307 | TILEGX_OPC_V1SHRSI, | |
308 | TILEGX_OPC_V1SHRU, | |
309 | TILEGX_OPC_V1SHRUI, | |
310 | TILEGX_OPC_V1SUB, | |
311 | TILEGX_OPC_V1SUBUC, | |
312 | TILEGX_OPC_V2ADD, | |
313 | TILEGX_OPC_V2ADDI, | |
314 | TILEGX_OPC_V2ADDSC, | |
315 | TILEGX_OPC_V2ADIFFS, | |
316 | TILEGX_OPC_V2AVGS, | |
317 | TILEGX_OPC_V2CMPEQ, | |
318 | TILEGX_OPC_V2CMPEQI, | |
319 | TILEGX_OPC_V2CMPLES, | |
320 | TILEGX_OPC_V2CMPLEU, | |
321 | TILEGX_OPC_V2CMPLTS, | |
322 | TILEGX_OPC_V2CMPLTSI, | |
323 | TILEGX_OPC_V2CMPLTU, | |
324 | TILEGX_OPC_V2CMPLTUI, | |
325 | TILEGX_OPC_V2CMPNE, | |
326 | TILEGX_OPC_V2DOTP, | |
327 | TILEGX_OPC_V2DOTPA, | |
328 | TILEGX_OPC_V2INT_H, | |
329 | TILEGX_OPC_V2INT_L, | |
330 | TILEGX_OPC_V2MAXS, | |
331 | TILEGX_OPC_V2MAXSI, | |
332 | TILEGX_OPC_V2MINS, | |
333 | TILEGX_OPC_V2MINSI, | |
334 | TILEGX_OPC_V2MNZ, | |
335 | TILEGX_OPC_V2MULFSC, | |
336 | TILEGX_OPC_V2MULS, | |
337 | TILEGX_OPC_V2MULTS, | |
338 | TILEGX_OPC_V2MZ, | |
339 | TILEGX_OPC_V2PACKH, | |
340 | TILEGX_OPC_V2PACKL, | |
341 | TILEGX_OPC_V2PACKUC, | |
342 | TILEGX_OPC_V2SADAS, | |
343 | TILEGX_OPC_V2SADAU, | |
344 | TILEGX_OPC_V2SADS, | |
345 | TILEGX_OPC_V2SADU, | |
346 | TILEGX_OPC_V2SHL, | |
347 | TILEGX_OPC_V2SHLI, | |
348 | TILEGX_OPC_V2SHLSC, | |
349 | TILEGX_OPC_V2SHRS, | |
350 | TILEGX_OPC_V2SHRSI, | |
351 | TILEGX_OPC_V2SHRU, | |
352 | TILEGX_OPC_V2SHRUI, | |
353 | TILEGX_OPC_V2SUB, | |
354 | TILEGX_OPC_V2SUBSC, | |
355 | TILEGX_OPC_V4ADD, | |
356 | TILEGX_OPC_V4ADDSC, | |
357 | TILEGX_OPC_V4INT_H, | |
358 | TILEGX_OPC_V4INT_L, | |
359 | TILEGX_OPC_V4PACKSC, | |
360 | TILEGX_OPC_V4SHL, | |
361 | TILEGX_OPC_V4SHLSC, | |
362 | TILEGX_OPC_V4SHRS, | |
363 | TILEGX_OPC_V4SHRU, | |
364 | TILEGX_OPC_V4SUB, | |
365 | TILEGX_OPC_V4SUBSC, | |
366 | TILEGX_OPC_WH64, | |
367 | TILEGX_OPC_XOR, | |
368 | TILEGX_OPC_XORI, | |
369 | TILEGX_OPC_NONE | |
370 | } tilegx_mnemonic; | |
371 | ||
372 | /* 64-bit pattern for a { bpt ; nop } bundle. */ | |
373 | #define TILEGX_BPT_BUNDLE 0x286a44ae51485000ULL | |
374 | ||
375 | ||
376 | ||
377 | static __inline unsigned int | |
378 | get_BFEnd_X0(tilegx_bundle_bits num) | |
379 | { | |
380 | const unsigned int n = (unsigned int)num; | |
381 | return (((n >> 12)) & 0x3f); | |
382 | } | |
383 | ||
384 | static __inline unsigned int | |
385 | get_BFOpcodeExtension_X0(tilegx_bundle_bits num) | |
386 | { | |
387 | const unsigned int n = (unsigned int)num; | |
388 | return (((n >> 24)) & 0xf); | |
389 | } | |
390 | ||
391 | static __inline unsigned int | |
392 | get_BFStart_X0(tilegx_bundle_bits num) | |
393 | { | |
394 | const unsigned int n = (unsigned int)num; | |
395 | return (((n >> 18)) & 0x3f); | |
396 | } | |
397 | ||
398 | static __inline unsigned int | |
399 | get_BrOff_X1(tilegx_bundle_bits n) | |
400 | { | |
401 | return (((unsigned int)(n >> 31)) & 0x0000003f) | | |
402 | (((unsigned int)(n >> 37)) & 0x0001ffc0); | |
403 | } | |
404 | ||
405 | static __inline unsigned int | |
406 | get_BrType_X1(tilegx_bundle_bits n) | |
407 | { | |
408 | return (((unsigned int)(n >> 54)) & 0x1f); | |
409 | } | |
410 | ||
411 | static __inline unsigned int | |
412 | get_Dest_Imm8_X1(tilegx_bundle_bits n) | |
413 | { | |
414 | return (((unsigned int)(n >> 31)) & 0x0000003f) | | |
415 | (((unsigned int)(n >> 43)) & 0x000000c0); | |
416 | } | |
417 | ||
418 | static __inline unsigned int | |
419 | get_Dest_X0(tilegx_bundle_bits num) | |
420 | { | |
421 | const unsigned int n = (unsigned int)num; | |
422 | return (((n >> 0)) & 0x3f); | |
423 | } | |
424 | ||
425 | static __inline unsigned int | |
426 | get_Dest_X1(tilegx_bundle_bits n) | |
427 | { | |
428 | return (((unsigned int)(n >> 31)) & 0x3f); | |
429 | } | |
430 | ||
431 | static __inline unsigned int | |
432 | get_Dest_Y0(tilegx_bundle_bits num) | |
433 | { | |
434 | const unsigned int n = (unsigned int)num; | |
435 | return (((n >> 0)) & 0x3f); | |
436 | } | |
437 | ||
438 | static __inline unsigned int | |
439 | get_Dest_Y1(tilegx_bundle_bits n) | |
440 | { | |
441 | return (((unsigned int)(n >> 31)) & 0x3f); | |
442 | } | |
443 | ||
444 | static __inline unsigned int | |
445 | get_Imm16_X0(tilegx_bundle_bits num) | |
446 | { | |
447 | const unsigned int n = (unsigned int)num; | |
448 | return (((n >> 12)) & 0xffff); | |
449 | } | |
450 | ||
451 | static __inline unsigned int | |
452 | get_Imm16_X1(tilegx_bundle_bits n) | |
453 | { | |
454 | return (((unsigned int)(n >> 43)) & 0xffff); | |
455 | } | |
456 | ||
457 | static __inline unsigned int | |
458 | get_Imm8OpcodeExtension_X0(tilegx_bundle_bits num) | |
459 | { | |
460 | const unsigned int n = (unsigned int)num; | |
461 | return (((n >> 20)) & 0xff); | |
462 | } | |
463 | ||
464 | static __inline unsigned int | |
465 | get_Imm8OpcodeExtension_X1(tilegx_bundle_bits n) | |
466 | { | |
467 | return (((unsigned int)(n >> 51)) & 0xff); | |
468 | } | |
469 | ||
470 | static __inline unsigned int | |
471 | get_Imm8_X0(tilegx_bundle_bits num) | |
472 | { | |
473 | const unsigned int n = (unsigned int)num; | |
474 | return (((n >> 12)) & 0xff); | |
475 | } | |
476 | ||
477 | static __inline unsigned int | |
478 | get_Imm8_X1(tilegx_bundle_bits n) | |
479 | { | |
480 | return (((unsigned int)(n >> 43)) & 0xff); | |
481 | } | |
482 | ||
483 | static __inline unsigned int | |
484 | get_Imm8_Y0(tilegx_bundle_bits num) | |
485 | { | |
486 | const unsigned int n = (unsigned int)num; | |
487 | return (((n >> 12)) & 0xff); | |
488 | } | |
489 | ||
490 | static __inline unsigned int | |
491 | get_Imm8_Y1(tilegx_bundle_bits n) | |
492 | { | |
493 | return (((unsigned int)(n >> 43)) & 0xff); | |
494 | } | |
495 | ||
496 | static __inline unsigned int | |
497 | get_JumpOff_X1(tilegx_bundle_bits n) | |
498 | { | |
499 | return (((unsigned int)(n >> 31)) & 0x7ffffff); | |
500 | } | |
501 | ||
502 | static __inline unsigned int | |
503 | get_JumpOpcodeExtension_X1(tilegx_bundle_bits n) | |
504 | { | |
505 | return (((unsigned int)(n >> 58)) & 0x1); | |
506 | } | |
507 | ||
508 | static __inline unsigned int | |
509 | get_MF_Imm14_X1(tilegx_bundle_bits n) | |
510 | { | |
511 | return (((unsigned int)(n >> 37)) & 0x3fff); | |
512 | } | |
513 | ||
514 | static __inline unsigned int | |
515 | get_MT_Imm14_X1(tilegx_bundle_bits n) | |
516 | { | |
517 | return (((unsigned int)(n >> 31)) & 0x0000003f) | | |
518 | (((unsigned int)(n >> 37)) & 0x00003fc0); | |
519 | } | |
520 | ||
521 | static __inline unsigned int | |
522 | get_Mode(tilegx_bundle_bits n) | |
523 | { | |
524 | return (((unsigned int)(n >> 62)) & 0x3); | |
525 | } | |
526 | ||
527 | static __inline unsigned int | |
528 | get_Opcode_X0(tilegx_bundle_bits num) | |
529 | { | |
530 | const unsigned int n = (unsigned int)num; | |
531 | return (((n >> 28)) & 0x7); | |
532 | } | |
533 | ||
534 | static __inline unsigned int | |
535 | get_Opcode_X1(tilegx_bundle_bits n) | |
536 | { | |
537 | return (((unsigned int)(n >> 59)) & 0x7); | |
538 | } | |
539 | ||
540 | static __inline unsigned int | |
541 | get_Opcode_Y0(tilegx_bundle_bits num) | |
542 | { | |
543 | const unsigned int n = (unsigned int)num; | |
544 | return (((n >> 27)) & 0xf); | |
545 | } | |
546 | ||
547 | static __inline unsigned int | |
548 | get_Opcode_Y1(tilegx_bundle_bits n) | |
549 | { | |
550 | return (((unsigned int)(n >> 58)) & 0xf); | |
551 | } | |
552 | ||
553 | static __inline unsigned int | |
554 | get_Opcode_Y2(tilegx_bundle_bits n) | |
555 | { | |
556 | return (((n >> 26)) & 0x00000001) | | |
557 | (((unsigned int)(n >> 56)) & 0x00000002); | |
558 | } | |
559 | ||
560 | static __inline unsigned int | |
561 | get_RRROpcodeExtension_X0(tilegx_bundle_bits num) | |
562 | { | |
563 | const unsigned int n = (unsigned int)num; | |
564 | return (((n >> 18)) & 0x3ff); | |
565 | } | |
566 | ||
567 | static __inline unsigned int | |
568 | get_RRROpcodeExtension_X1(tilegx_bundle_bits n) | |
569 | { | |
570 | return (((unsigned int)(n >> 49)) & 0x3ff); | |
571 | } | |
572 | ||
573 | static __inline unsigned int | |
574 | get_RRROpcodeExtension_Y0(tilegx_bundle_bits num) | |
575 | { | |
576 | const unsigned int n = (unsigned int)num; | |
577 | return (((n >> 18)) & 0x3); | |
578 | } | |
579 | ||
580 | static __inline unsigned int | |
581 | get_RRROpcodeExtension_Y1(tilegx_bundle_bits n) | |
582 | { | |
583 | return (((unsigned int)(n >> 49)) & 0x3); | |
584 | } | |
585 | ||
586 | static __inline unsigned int | |
587 | get_ShAmt_X0(tilegx_bundle_bits num) | |
588 | { | |
589 | const unsigned int n = (unsigned int)num; | |
590 | return (((n >> 12)) & 0x3f); | |
591 | } | |
592 | ||
593 | static __inline unsigned int | |
594 | get_ShAmt_X1(tilegx_bundle_bits n) | |
595 | { | |
596 | return (((unsigned int)(n >> 43)) & 0x3f); | |
597 | } | |
598 | ||
599 | static __inline unsigned int | |
600 | get_ShAmt_Y0(tilegx_bundle_bits num) | |
601 | { | |
602 | const unsigned int n = (unsigned int)num; | |
603 | return (((n >> 12)) & 0x3f); | |
604 | } | |
605 | ||
606 | static __inline unsigned int | |
607 | get_ShAmt_Y1(tilegx_bundle_bits n) | |
608 | { | |
609 | return (((unsigned int)(n >> 43)) & 0x3f); | |
610 | } | |
611 | ||
612 | static __inline unsigned int | |
613 | get_ShiftOpcodeExtension_X0(tilegx_bundle_bits num) | |
614 | { | |
615 | const unsigned int n = (unsigned int)num; | |
616 | return (((n >> 18)) & 0x3ff); | |
617 | } | |
618 | ||
619 | static __inline unsigned int | |
620 | get_ShiftOpcodeExtension_X1(tilegx_bundle_bits n) | |
621 | { | |
622 | return (((unsigned int)(n >> 49)) & 0x3ff); | |
623 | } | |
624 | ||
625 | static __inline unsigned int | |
626 | get_ShiftOpcodeExtension_Y0(tilegx_bundle_bits num) | |
627 | { | |
628 | const unsigned int n = (unsigned int)num; | |
629 | return (((n >> 18)) & 0x3); | |
630 | } | |
631 | ||
632 | static __inline unsigned int | |
633 | get_ShiftOpcodeExtension_Y1(tilegx_bundle_bits n) | |
634 | { | |
635 | return (((unsigned int)(n >> 49)) & 0x3); | |
636 | } | |
637 | ||
638 | static __inline unsigned int | |
639 | get_SrcA_X0(tilegx_bundle_bits num) | |
640 | { | |
641 | const unsigned int n = (unsigned int)num; | |
642 | return (((n >> 6)) & 0x3f); | |
643 | } | |
644 | ||
645 | static __inline unsigned int | |
646 | get_SrcA_X1(tilegx_bundle_bits n) | |
647 | { | |
648 | return (((unsigned int)(n >> 37)) & 0x3f); | |
649 | } | |
650 | ||
651 | static __inline unsigned int | |
652 | get_SrcA_Y0(tilegx_bundle_bits num) | |
653 | { | |
654 | const unsigned int n = (unsigned int)num; | |
655 | return (((n >> 6)) & 0x3f); | |
656 | } | |
657 | ||
658 | static __inline unsigned int | |
659 | get_SrcA_Y1(tilegx_bundle_bits n) | |
660 | { | |
661 | return (((unsigned int)(n >> 37)) & 0x3f); | |
662 | } | |
663 | ||
664 | static __inline unsigned int | |
665 | get_SrcA_Y2(tilegx_bundle_bits num) | |
666 | { | |
667 | const unsigned int n = (unsigned int)num; | |
668 | return (((n >> 20)) & 0x3f); | |
669 | } | |
670 | ||
671 | static __inline unsigned int | |
672 | get_SrcBDest_Y2(tilegx_bundle_bits n) | |
673 | { | |
674 | return (((unsigned int)(n >> 51)) & 0x3f); | |
675 | } | |
676 | ||
677 | static __inline unsigned int | |
678 | get_SrcB_X0(tilegx_bundle_bits num) | |
679 | { | |
680 | const unsigned int n = (unsigned int)num; | |
681 | return (((n >> 12)) & 0x3f); | |
682 | } | |
683 | ||
684 | static __inline unsigned int | |
685 | get_SrcB_X1(tilegx_bundle_bits n) | |
686 | { | |
687 | return (((unsigned int)(n >> 43)) & 0x3f); | |
688 | } | |
689 | ||
690 | static __inline unsigned int | |
691 | get_SrcB_Y0(tilegx_bundle_bits num) | |
692 | { | |
693 | const unsigned int n = (unsigned int)num; | |
694 | return (((n >> 12)) & 0x3f); | |
695 | } | |
696 | ||
697 | static __inline unsigned int | |
698 | get_SrcB_Y1(tilegx_bundle_bits n) | |
699 | { | |
700 | return (((unsigned int)(n >> 43)) & 0x3f); | |
701 | } | |
702 | ||
703 | static __inline unsigned int | |
704 | get_UnaryOpcodeExtension_X0(tilegx_bundle_bits num) | |
705 | { | |
706 | const unsigned int n = (unsigned int)num; | |
707 | return (((n >> 12)) & 0x3f); | |
708 | } | |
709 | ||
710 | static __inline unsigned int | |
711 | get_UnaryOpcodeExtension_X1(tilegx_bundle_bits n) | |
712 | { | |
713 | return (((unsigned int)(n >> 43)) & 0x3f); | |
714 | } | |
715 | ||
716 | static __inline unsigned int | |
717 | get_UnaryOpcodeExtension_Y0(tilegx_bundle_bits num) | |
718 | { | |
719 | const unsigned int n = (unsigned int)num; | |
720 | return (((n >> 12)) & 0x3f); | |
721 | } | |
722 | ||
723 | static __inline unsigned int | |
724 | get_UnaryOpcodeExtension_Y1(tilegx_bundle_bits n) | |
725 | { | |
726 | return (((unsigned int)(n >> 43)) & 0x3f); | |
727 | } | |
728 | ||
729 | ||
730 | static __inline int | |
731 | sign_extend(int n, int num_bits) | |
732 | { | |
733 | int shift = (int)(sizeof(int) * 8 - num_bits); | |
734 | return (n << shift) >> shift; | |
735 | } | |
736 | ||
737 | ||
738 | ||
739 | static __inline tilegx_bundle_bits | |
740 | create_BFEnd_X0(int num) | |
741 | { | |
742 | const unsigned int n = (unsigned int)num; | |
743 | return ((n & 0x3f) << 12); | |
744 | } | |
745 | ||
746 | static __inline tilegx_bundle_bits | |
747 | create_BFOpcodeExtension_X0(int num) | |
748 | { | |
749 | const unsigned int n = (unsigned int)num; | |
750 | return ((n & 0xf) << 24); | |
751 | } | |
752 | ||
753 | static __inline tilegx_bundle_bits | |
754 | create_BFStart_X0(int num) | |
755 | { | |
756 | const unsigned int n = (unsigned int)num; | |
757 | return ((n & 0x3f) << 18); | |
758 | } | |
759 | ||
760 | static __inline tilegx_bundle_bits | |
761 | create_BrOff_X1(int num) | |
762 | { | |
763 | const unsigned int n = (unsigned int)num; | |
764 | return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) | | |
765 | (((tilegx_bundle_bits)(n & 0x0001ffc0)) << 37); | |
766 | } | |
767 | ||
768 | static __inline tilegx_bundle_bits | |
769 | create_BrType_X1(int num) | |
770 | { | |
771 | const unsigned int n = (unsigned int)num; | |
772 | return (((tilegx_bundle_bits)(n & 0x1f)) << 54); | |
773 | } | |
774 | ||
775 | static __inline tilegx_bundle_bits | |
776 | create_Dest_Imm8_X1(int num) | |
777 | { | |
778 | const unsigned int n = (unsigned int)num; | |
779 | return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) | | |
780 | (((tilegx_bundle_bits)(n & 0x000000c0)) << 43); | |
781 | } | |
782 | ||
783 | static __inline tilegx_bundle_bits | |
784 | create_Dest_X0(int num) | |
785 | { | |
786 | const unsigned int n = (unsigned int)num; | |
787 | return ((n & 0x3f) << 0); | |
788 | } | |
789 | ||
790 | static __inline tilegx_bundle_bits | |
791 | create_Dest_X1(int num) | |
792 | { | |
793 | const unsigned int n = (unsigned int)num; | |
794 | return (((tilegx_bundle_bits)(n & 0x3f)) << 31); | |
795 | } | |
796 | ||
797 | static __inline tilegx_bundle_bits | |
798 | create_Dest_Y0(int num) | |
799 | { | |
800 | const unsigned int n = (unsigned int)num; | |
801 | return ((n & 0x3f) << 0); | |
802 | } | |
803 | ||
804 | static __inline tilegx_bundle_bits | |
805 | create_Dest_Y1(int num) | |
806 | { | |
807 | const unsigned int n = (unsigned int)num; | |
808 | return (((tilegx_bundle_bits)(n & 0x3f)) << 31); | |
809 | } | |
810 | ||
811 | static __inline tilegx_bundle_bits | |
812 | create_Imm16_X0(int num) | |
813 | { | |
814 | const unsigned int n = (unsigned int)num; | |
815 | return ((n & 0xffff) << 12); | |
816 | } | |
817 | ||
818 | static __inline tilegx_bundle_bits | |
819 | create_Imm16_X1(int num) | |
820 | { | |
821 | const unsigned int n = (unsigned int)num; | |
822 | return (((tilegx_bundle_bits)(n & 0xffff)) << 43); | |
823 | } | |
824 | ||
825 | static __inline tilegx_bundle_bits | |
826 | create_Imm8OpcodeExtension_X0(int num) | |
827 | { | |
828 | const unsigned int n = (unsigned int)num; | |
829 | return ((n & 0xff) << 20); | |
830 | } | |
831 | ||
832 | static __inline tilegx_bundle_bits | |
833 | create_Imm8OpcodeExtension_X1(int num) | |
834 | { | |
835 | const unsigned int n = (unsigned int)num; | |
836 | return (((tilegx_bundle_bits)(n & 0xff)) << 51); | |
837 | } | |
838 | ||
839 | static __inline tilegx_bundle_bits | |
840 | create_Imm8_X0(int num) | |
841 | { | |
842 | const unsigned int n = (unsigned int)num; | |
843 | return ((n & 0xff) << 12); | |
844 | } | |
845 | ||
846 | static __inline tilegx_bundle_bits | |
847 | create_Imm8_X1(int num) | |
848 | { | |
849 | const unsigned int n = (unsigned int)num; | |
850 | return (((tilegx_bundle_bits)(n & 0xff)) << 43); | |
851 | } | |
852 | ||
853 | static __inline tilegx_bundle_bits | |
854 | create_Imm8_Y0(int num) | |
855 | { | |
856 | const unsigned int n = (unsigned int)num; | |
857 | return ((n & 0xff) << 12); | |
858 | } | |
859 | ||
860 | static __inline tilegx_bundle_bits | |
861 | create_Imm8_Y1(int num) | |
862 | { | |
863 | const unsigned int n = (unsigned int)num; | |
864 | return (((tilegx_bundle_bits)(n & 0xff)) << 43); | |
865 | } | |
866 | ||
867 | static __inline tilegx_bundle_bits | |
868 | create_JumpOff_X1(int num) | |
869 | { | |
870 | const unsigned int n = (unsigned int)num; | |
871 | return (((tilegx_bundle_bits)(n & 0x7ffffff)) << 31); | |
872 | } | |
873 | ||
874 | static __inline tilegx_bundle_bits | |
875 | create_JumpOpcodeExtension_X1(int num) | |
876 | { | |
877 | const unsigned int n = (unsigned int)num; | |
878 | return (((tilegx_bundle_bits)(n & 0x1)) << 58); | |
879 | } | |
880 | ||
881 | static __inline tilegx_bundle_bits | |
882 | create_MF_Imm14_X1(int num) | |
883 | { | |
884 | const unsigned int n = (unsigned int)num; | |
885 | return (((tilegx_bundle_bits)(n & 0x3fff)) << 37); | |
886 | } | |
887 | ||
888 | static __inline tilegx_bundle_bits | |
889 | create_MT_Imm14_X1(int num) | |
890 | { | |
891 | const unsigned int n = (unsigned int)num; | |
892 | return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) | | |
893 | (((tilegx_bundle_bits)(n & 0x00003fc0)) << 37); | |
894 | } | |
895 | ||
896 | static __inline tilegx_bundle_bits | |
897 | create_Mode(int num) | |
898 | { | |
899 | const unsigned int n = (unsigned int)num; | |
900 | return (((tilegx_bundle_bits)(n & 0x3)) << 62); | |
901 | } | |
902 | ||
903 | static __inline tilegx_bundle_bits | |
904 | create_Opcode_X0(int num) | |
905 | { | |
906 | const unsigned int n = (unsigned int)num; | |
907 | return ((n & 0x7) << 28); | |
908 | } | |
909 | ||
910 | static __inline tilegx_bundle_bits | |
911 | create_Opcode_X1(int num) | |
912 | { | |
913 | const unsigned int n = (unsigned int)num; | |
914 | return (((tilegx_bundle_bits)(n & 0x7)) << 59); | |
915 | } | |
916 | ||
917 | static __inline tilegx_bundle_bits | |
918 | create_Opcode_Y0(int num) | |
919 | { | |
920 | const unsigned int n = (unsigned int)num; | |
921 | return ((n & 0xf) << 27); | |
922 | } | |
923 | ||
924 | static __inline tilegx_bundle_bits | |
925 | create_Opcode_Y1(int num) | |
926 | { | |
927 | const unsigned int n = (unsigned int)num; | |
928 | return (((tilegx_bundle_bits)(n & 0xf)) << 58); | |
929 | } | |
930 | ||
931 | static __inline tilegx_bundle_bits | |
932 | create_Opcode_Y2(int num) | |
933 | { | |
934 | const unsigned int n = (unsigned int)num; | |
935 | return ((n & 0x00000001) << 26) | | |
936 | (((tilegx_bundle_bits)(n & 0x00000002)) << 56); | |
937 | } | |
938 | ||
939 | static __inline tilegx_bundle_bits | |
940 | create_RRROpcodeExtension_X0(int num) | |
941 | { | |
942 | const unsigned int n = (unsigned int)num; | |
943 | return ((n & 0x3ff) << 18); | |
944 | } | |
945 | ||
946 | static __inline tilegx_bundle_bits | |
947 | create_RRROpcodeExtension_X1(int num) | |
948 | { | |
949 | const unsigned int n = (unsigned int)num; | |
950 | return (((tilegx_bundle_bits)(n & 0x3ff)) << 49); | |
951 | } | |
952 | ||
953 | static __inline tilegx_bundle_bits | |
954 | create_RRROpcodeExtension_Y0(int num) | |
955 | { | |
956 | const unsigned int n = (unsigned int)num; | |
957 | return ((n & 0x3) << 18); | |
958 | } | |
959 | ||
960 | static __inline tilegx_bundle_bits | |
961 | create_RRROpcodeExtension_Y1(int num) | |
962 | { | |
963 | const unsigned int n = (unsigned int)num; | |
964 | return (((tilegx_bundle_bits)(n & 0x3)) << 49); | |
965 | } | |
966 | ||
967 | static __inline tilegx_bundle_bits | |
968 | create_ShAmt_X0(int num) | |
969 | { | |
970 | const unsigned int n = (unsigned int)num; | |
971 | return ((n & 0x3f) << 12); | |
972 | } | |
973 | ||
974 | static __inline tilegx_bundle_bits | |
975 | create_ShAmt_X1(int num) | |
976 | { | |
977 | const unsigned int n = (unsigned int)num; | |
978 | return (((tilegx_bundle_bits)(n & 0x3f)) << 43); | |
979 | } | |
980 | ||
981 | static __inline tilegx_bundle_bits | |
982 | create_ShAmt_Y0(int num) | |
983 | { | |
984 | const unsigned int n = (unsigned int)num; | |
985 | return ((n & 0x3f) << 12); | |
986 | } | |
987 | ||
988 | static __inline tilegx_bundle_bits | |
989 | create_ShAmt_Y1(int num) | |
990 | { | |
991 | const unsigned int n = (unsigned int)num; | |
992 | return (((tilegx_bundle_bits)(n & 0x3f)) << 43); | |
993 | } | |
994 | ||
995 | static __inline tilegx_bundle_bits | |
996 | create_ShiftOpcodeExtension_X0(int num) | |
997 | { | |
998 | const unsigned int n = (unsigned int)num; | |
999 | return ((n & 0x3ff) << 18); | |
1000 | } | |
1001 | ||
1002 | static __inline tilegx_bundle_bits | |
1003 | create_ShiftOpcodeExtension_X1(int num) | |
1004 | { | |
1005 | const unsigned int n = (unsigned int)num; | |
1006 | return (((tilegx_bundle_bits)(n & 0x3ff)) << 49); | |
1007 | } | |
1008 | ||
1009 | static __inline tilegx_bundle_bits | |
1010 | create_ShiftOpcodeExtension_Y0(int num) | |
1011 | { | |
1012 | const unsigned int n = (unsigned int)num; | |
1013 | return ((n & 0x3) << 18); | |
1014 | } | |
1015 | ||
1016 | static __inline tilegx_bundle_bits | |
1017 | create_ShiftOpcodeExtension_Y1(int num) | |
1018 | { | |
1019 | const unsigned int n = (unsigned int)num; | |
1020 | return (((tilegx_bundle_bits)(n & 0x3)) << 49); | |
1021 | } | |
1022 | ||
1023 | static __inline tilegx_bundle_bits | |
1024 | create_SrcA_X0(int num) | |
1025 | { | |
1026 | const unsigned int n = (unsigned int)num; | |
1027 | return ((n & 0x3f) << 6); | |
1028 | } | |
1029 | ||
1030 | static __inline tilegx_bundle_bits | |
1031 | create_SrcA_X1(int num) | |
1032 | { | |
1033 | const unsigned int n = (unsigned int)num; | |
1034 | return (((tilegx_bundle_bits)(n & 0x3f)) << 37); | |
1035 | } | |
1036 | ||
1037 | static __inline tilegx_bundle_bits | |
1038 | create_SrcA_Y0(int num) | |
1039 | { | |
1040 | const unsigned int n = (unsigned int)num; | |
1041 | return ((n & 0x3f) << 6); | |
1042 | } | |
1043 | ||
1044 | static __inline tilegx_bundle_bits | |
1045 | create_SrcA_Y1(int num) | |
1046 | { | |
1047 | const unsigned int n = (unsigned int)num; | |
1048 | return (((tilegx_bundle_bits)(n & 0x3f)) << 37); | |
1049 | } | |
1050 | ||
1051 | static __inline tilegx_bundle_bits | |
1052 | create_SrcA_Y2(int num) | |
1053 | { | |
1054 | const unsigned int n = (unsigned int)num; | |
1055 | return ((n & 0x3f) << 20); | |
1056 | } | |
1057 | ||
1058 | static __inline tilegx_bundle_bits | |
1059 | create_SrcBDest_Y2(int num) | |
1060 | { | |
1061 | const unsigned int n = (unsigned int)num; | |
1062 | return (((tilegx_bundle_bits)(n & 0x3f)) << 51); | |
1063 | } | |
1064 | ||
1065 | static __inline tilegx_bundle_bits | |
1066 | create_SrcB_X0(int num) | |
1067 | { | |
1068 | const unsigned int n = (unsigned int)num; | |
1069 | return ((n & 0x3f) << 12); | |
1070 | } | |
1071 | ||
1072 | static __inline tilegx_bundle_bits | |
1073 | create_SrcB_X1(int num) | |
1074 | { | |
1075 | const unsigned int n = (unsigned int)num; | |
1076 | return (((tilegx_bundle_bits)(n & 0x3f)) << 43); | |
1077 | } | |
1078 | ||
1079 | static __inline tilegx_bundle_bits | |
1080 | create_SrcB_Y0(int num) | |
1081 | { | |
1082 | const unsigned int n = (unsigned int)num; | |
1083 | return ((n & 0x3f) << 12); | |
1084 | } | |
1085 | ||
1086 | static __inline tilegx_bundle_bits | |
1087 | create_SrcB_Y1(int num) | |
1088 | { | |
1089 | const unsigned int n = (unsigned int)num; | |
1090 | return (((tilegx_bundle_bits)(n & 0x3f)) << 43); | |
1091 | } | |
1092 | ||
1093 | static __inline tilegx_bundle_bits | |
1094 | create_UnaryOpcodeExtension_X0(int num) | |
1095 | { | |
1096 | const unsigned int n = (unsigned int)num; | |
1097 | return ((n & 0x3f) << 12); | |
1098 | } | |
1099 | ||
1100 | static __inline tilegx_bundle_bits | |
1101 | create_UnaryOpcodeExtension_X1(int num) | |
1102 | { | |
1103 | const unsigned int n = (unsigned int)num; | |
1104 | return (((tilegx_bundle_bits)(n & 0x3f)) << 43); | |
1105 | } | |
1106 | ||
1107 | static __inline tilegx_bundle_bits | |
1108 | create_UnaryOpcodeExtension_Y0(int num) | |
1109 | { | |
1110 | const unsigned int n = (unsigned int)num; | |
1111 | return ((n & 0x3f) << 12); | |
1112 | } | |
1113 | ||
1114 | static __inline tilegx_bundle_bits | |
1115 | create_UnaryOpcodeExtension_Y1(int num) | |
1116 | { | |
1117 | const unsigned int n = (unsigned int)num; | |
1118 | return (((tilegx_bundle_bits)(n & 0x3f)) << 43); | |
1119 | } | |
1120 | ||
1121 | ||
1122 | typedef enum | |
1123 | { | |
1124 | TILEGX_PIPELINE_X0, | |
1125 | TILEGX_PIPELINE_X1, | |
1126 | TILEGX_PIPELINE_Y0, | |
1127 | TILEGX_PIPELINE_Y1, | |
1128 | TILEGX_PIPELINE_Y2, | |
1129 | } tilegx_pipeline; | |
1130 | ||
1131 | #define tilegx_is_x_pipeline(p) ((int)(p) <= (int)TILEGX_PIPELINE_X1) | |
1132 | ||
1133 | typedef enum | |
1134 | { | |
1135 | TILEGX_OP_TYPE_REGISTER, | |
1136 | TILEGX_OP_TYPE_IMMEDIATE, | |
1137 | TILEGX_OP_TYPE_ADDRESS, | |
1138 | TILEGX_OP_TYPE_SPR | |
1139 | } tilegx_operand_type; | |
1140 | ||
1141 | /* These are the bits that determine if a bundle is in the X encoding. */ | |
1142 | #define TILEGX_BUNDLE_MODE_MASK ((tilegx_bundle_bits)3 << 62) | |
1143 | ||
1144 | enum | |
1145 | { | |
1146 | /* Maximum number of instructions in a bundle (2 for X, 3 for Y). */ | |
1147 | TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE = 3, | |
1148 | ||
1149 | /* How many different pipeline encodings are there? X0, X1, Y0, Y1, Y2. */ | |
1150 | TILEGX_NUM_PIPELINE_ENCODINGS = 5, | |
1151 | ||
1152 | /* Log base 2 of TILEGX_BUNDLE_SIZE_IN_BYTES. */ | |
1153 | TILEGX_LOG2_BUNDLE_SIZE_IN_BYTES = 3, | |
1154 | ||
1155 | /* Instructions take this many bytes. */ | |
1156 | TILEGX_BUNDLE_SIZE_IN_BYTES = 1 << TILEGX_LOG2_BUNDLE_SIZE_IN_BYTES, | |
1157 | ||
1158 | /* Log base 2 of TILEGX_BUNDLE_ALIGNMENT_IN_BYTES. */ | |
1159 | TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES = 3, | |
1160 | ||
1161 | /* Bundles should be aligned modulo this number of bytes. */ | |
1162 | TILEGX_BUNDLE_ALIGNMENT_IN_BYTES = | |
1163 | (1 << TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES), | |
1164 | ||
1165 | /* Number of registers (some are magic, such as network I/O). */ | |
1166 | TILEGX_NUM_REGISTERS = 64, | |
1167 | }; | |
1168 | ||
1169 | ||
1170 | struct tilegx_operand | |
1171 | { | |
1172 | /* Is this operand a register, immediate or address? */ | |
1173 | tilegx_operand_type type; | |
1174 | ||
1175 | /* The default relocation type for this operand. */ | |
1176 | signed int default_reloc : 16; | |
1177 | ||
1178 | /* How many bits is this value? (used for range checking) */ | |
1179 | unsigned int num_bits : 5; | |
1180 | ||
1181 | /* Is the value signed? (used for range checking) */ | |
1182 | unsigned int is_signed : 1; | |
1183 | ||
1184 | /* Is this operand a source register? */ | |
1185 | unsigned int is_src_reg : 1; | |
1186 | ||
1187 | /* Is this operand written? (i.e. is it a destination register) */ | |
1188 | unsigned int is_dest_reg : 1; | |
1189 | ||
1190 | /* Is this operand PC-relative? */ | |
1191 | unsigned int is_pc_relative : 1; | |
1192 | ||
1193 | /* By how many bits do we right shift the value before inserting? */ | |
1194 | unsigned int rightshift : 2; | |
1195 | ||
1196 | /* Return the bits for this operand to be ORed into an existing bundle. */ | |
1197 | tilegx_bundle_bits (*insert) (int op); | |
1198 | ||
1199 | /* Extract this operand and return it. */ | |
1200 | unsigned int (*extract) (tilegx_bundle_bits bundle); | |
1201 | }; | |
1202 | ||
1203 | ||
1204 | extern const struct tilegx_operand tilegx_operands[]; | |
1205 | ||
1206 | /* One finite-state machine per pipe for rapid instruction decoding. */ | |
1207 | extern const unsigned short * const | |
1208 | tilegx_bundle_decoder_fsms[TILEGX_NUM_PIPELINE_ENCODINGS]; | |
1209 | ||
1210 | ||
1211 | struct tilegx_opcode | |
1212 | { | |
1213 | /* The opcode mnemonic, e.g. "add" */ | |
1214 | const char *name; | |
1215 | ||
1216 | /* The enum value for this mnemonic. */ | |
1217 | tilegx_mnemonic mnemonic; | |
1218 | ||
1219 | /* A bit mask of which of the five pipes this instruction | |
1220 | is compatible with: | |
1221 | X0 0x01 | |
1222 | X1 0x02 | |
1223 | Y0 0x04 | |
1224 | Y1 0x08 | |
1225 | Y2 0x10 */ | |
1226 | unsigned char pipes; | |
1227 | ||
1228 | /* How many operands are there? */ | |
1229 | unsigned char num_operands; | |
1230 | ||
1231 | /* Which register does this write implicitly, or TREG_ZERO if none? */ | |
1232 | unsigned char implicitly_written_register; | |
1233 | ||
1234 | /* Can this be bundled with other instructions (almost always true). */ | |
1235 | unsigned char can_bundle; | |
1236 | ||
1237 | /* The description of the operands. Each of these is an | |
1238 | * index into the tilegx_operands[] table. */ | |
1239 | unsigned char operands[TILEGX_NUM_PIPELINE_ENCODINGS][TILEGX_MAX_OPERANDS]; | |
1240 | ||
1241 | #if !defined(__KERNEL__) && !defined(_LIBC) | |
1242 | /* A mask of which bits have predefined values for each pipeline. | |
1243 | * This is useful for disassembly. */ | |
1244 | tilegx_bundle_bits fixed_bit_masks[TILEGX_NUM_PIPELINE_ENCODINGS]; | |
1245 | ||
1246 | /* For each bit set in fixed_bit_masks, what the value is for this | |
1247 | * instruction. */ | |
1248 | tilegx_bundle_bits fixed_bit_values[TILEGX_NUM_PIPELINE_ENCODINGS]; | |
1249 | #endif | |
1250 | }; | |
1251 | ||
1252 | extern const struct tilegx_opcode tilegx_opcodes[]; | |
1253 | ||
1254 | /* Used for non-textual disassembly into structs. */ | |
1255 | struct tilegx_decoded_instruction | |
1256 | { | |
1257 | const struct tilegx_opcode *opcode; | |
1258 | const struct tilegx_operand *operands[TILEGX_MAX_OPERANDS]; | |
1259 | long long operand_values[TILEGX_MAX_OPERANDS]; | |
1260 | }; | |
1261 | ||
1262 | ||
1263 | /* Disassemble a bundle into a struct for machine processing. */ | |
1264 | extern int parse_insn_tilegx(tilegx_bundle_bits bits, | |
1265 | unsigned long long pc, | |
1266 | struct tilegx_decoded_instruction | |
1267 | decoded[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE]); | |
1268 | ||
1269 | ||
1270 | #if !defined(__KERNEL__) && !defined(_LIBC) | |
1271 | /* Canonical names of all the registers. */ | |
1272 | /* ISSUE: This table lives in "tile-dis.c" */ | |
1273 | extern const char * const tilegx_register_names[]; | |
1274 | ||
1275 | /* Descriptor for a special-purpose register. */ | |
1276 | struct tilegx_spr | |
1277 | { | |
1278 | /* The number */ | |
1279 | int number; | |
1280 | ||
1281 | /* The name */ | |
1282 | const char *name; | |
1283 | }; | |
1284 | ||
1285 | /* List of all the SPRs; ordered by increasing number. */ | |
1286 | extern const struct tilegx_spr tilegx_sprs[]; | |
1287 | ||
1288 | /* Number of special-purpose registers. */ | |
1289 | extern const int tilegx_num_sprs; | |
1290 | ||
1291 | extern const char * | |
1292 | get_tilegx_spr_name (int num); | |
1293 | #endif /* !__KERNEL__ && !_LIBC */ | |
1294 | ||
1295 | /* Make a few "tile_" variables to simply common code between | |
1296 | architectures. */ | |
1297 | ||
1298 | typedef tilegx_bundle_bits tile_bundle_bits; | |
1299 | #define TILE_BUNDLE_SIZE_IN_BYTES TILEGX_BUNDLE_SIZE_IN_BYTES | |
1300 | #define TILE_BUNDLE_ALIGNMENT_IN_BYTES TILEGX_BUNDLE_ALIGNMENT_IN_BYTES | |
1301 | #define TILE_LOG2_BUNDLE_ALIGNMENT_IN_BYTES \ | |
1302 | TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES | |
1303 | ||
1304 | #endif /* opcode_tilegx_h */ |