* mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
[deliverable/binutils-gdb.git] / include / opcode / v850.h
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1/* v850.h -- Header file for NEC V850 opcode table
2 Copyright 1996 Free Software Foundation, Inc.
3 Written by J.T. Conklin, Cygnus Support
4
5This file is part of GDB, GAS, and the GNU binutils.
6
7GDB, GAS, and the GNU binutils are free software; you can redistribute
8them and/or modify them under the terms of the GNU General Public
9License as published by the Free Software Foundation; either version
101, or (at your option) any later version.
11
12GDB, GAS, and the GNU binutils are distributed in the hope that they
13will be useful, but WITHOUT ANY WARRANTY; without even the implied
14warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
15the GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this file; see the file COPYING. If not, write to the Free
19Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21#ifndef V850_H
22#define V850_H
23
24/* The opcode table is an array of struct v850_opcode. */
25
26struct v850_opcode
27{
28 /* The opcode name. */
29 const char *name;
30
31 /* The opcode itself. Those bits which will be filled in with
32 operands are zeroes. */
33 unsigned long opcode;
34
35 /* The opcode mask. This is used by the disassembler. This is a
36 mask containing ones indicating those bits which must match the
37 opcode field, and zeroes indicating those bits which need not
38 match (and are presumably filled in by operands). */
39 unsigned long mask;
40
41 /* An array of operand codes. Each code is an index into the
42 operand table. They appear in the order which the operands must
43 appear in assembly code, and are terminated by a zero. */
44 unsigned char operands[8];
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45
46 /* Which (if any) operand is a memory operand. */
47 unsigned int memop;
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48};
49
50/* The table itself is sorted by major opcode number, and is otherwise
51 in the order in which the disassembler should consider
52 instructions. */
53extern const struct v850_opcode v850_opcodes[];
54extern const int v850_num_opcodes;
55
56\f
7e3670d6 57/* The operands table is an array of struct v850_operand. */
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58
59struct v850_operand
60{
61 /* The number of bits in the operand. */
62 int bits;
63
64 /* How far the operand is left shifted in the instruction. */
65 int shift;
dd528aff 66
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67 /* Insertion function. This is used by the assembler. To insert an
68 operand value into an instruction, check this field.
69
70 If it is NULL, execute
71 i |= (op & ((1 << o->bits) - 1)) << o->shift;
72 (i is the instruction which we are filling in, o is a pointer to
73 this structure, and op is the opcode value; this assumes twos
74 complement arithmetic).
75
76 If this field is not NULL, then simply call it with the
77 instruction and the operand value. It will return the new value
78 of the instruction. If the ERRMSG argument is not NULL, then if
79 the operand value is illegal, *ERRMSG will be set to a warning
80 string (the operand will be inserted in any case). If the
81 operand value is legal, *ERRMSG will be unchanged (most operands
82 can accept any value). */
83 unsigned long (*insert) PARAMS ((unsigned long instruction, long op,
84 const char **errmsg));
85
86 /* Extraction function. This is used by the disassembler. To
87 extract this operand type from an instruction, check this field.
88
89 If it is NULL, compute
90 op = ((i) >> o->shift) & ((1 << o->bits) - 1);
91 if ((o->flags & PPC_OPERAND_SIGNED) != 0
92 && (op & (1 << (o->bits - 1))) != 0)
93 op -= 1 << o->bits;
94 (i is the instruction, o is a pointer to this structure, and op
95 is the result; this assumes twos complement arithmetic).
96
97 If this field is not NULL, then simply call it with the
98 instruction value. It will return the value of the operand. If
99 the INVALID argument is not NULL, *INVALID will be set to
100 non-zero if this operand type can not actually be extracted from
101 this operand (i.e., the instruction does not match). If the
102 operand is valid, *INVALID will not be changed. */
103 long (*extract) PARAMS ((unsigned long instruction, int *invalid));
104
105 /* One bit syntax flags. */
dd528aff 106 int flags;
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107};
108
109/* Elements in the table are retrieved by indexing with values from
110 the operands field of the v850_opcodes table. */
111
112extern const struct v850_operand v850_operands[];
113
dd528aff 114/* Values defined for the flags field of a struct v850_operand. */
dd528aff 115
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116/* This operand names a general purpose register */
117#define V850_OPERAND_REG 0x01
dd528aff 118
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119/* This operand names a system register */
120#define V850_OPERAND_SRG 0x02
121
122/* This operand names a condition code used in the setf instruction */
123#define V850_OPERAND_CC 0x04
124
125/* This operand takes signed values */
126#define V850_OPERAND_SIGNED 0x08
7a3c9336 127
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128/* This operand is the ep register. */
129#define V850_OPERAND_EP 0x10
130
131/* This operand is a PC displacement */
132#define V850_OPERAND_DISP 0x20
133
134/* This is a relaxable operand. Only used for D9->D22 branch relaxing
135 right now. We may need others in the future (or maybe handle them like
136 promoted operands on the mn10300?) */
137#define V850_OPERAND_RELAX 0x40
138
7a3c9336 139#endif /* V850_H */
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