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7a3c9336 C |
1 | /* v850.h -- Header file for NEC V850 opcode table |
2 | Copyright 1996 Free Software Foundation, Inc. | |
3 | Written by J.T. Conklin, Cygnus Support | |
4 | ||
5 | This file is part of GDB, GAS, and the GNU binutils. | |
6 | ||
7 | GDB, GAS, and the GNU binutils are free software; you can redistribute | |
8 | them and/or modify them under the terms of the GNU General Public | |
9 | License as published by the Free Software Foundation; either version | |
10 | 1, or (at your option) any later version. | |
11 | ||
12 | GDB, GAS, and the GNU binutils are distributed in the hope that they | |
13 | will be useful, but WITHOUT ANY WARRANTY; without even the implied | |
14 | warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See | |
15 | the GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this file; see the file COPYING. If not, write to the Free | |
19 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
20 | ||
21 | #ifndef V850_H | |
22 | #define V850_H | |
23 | ||
24 | /* The opcode table is an array of struct v850_opcode. */ | |
25 | ||
26 | struct v850_opcode | |
27 | { | |
28 | /* The opcode name. */ | |
29 | const char *name; | |
30 | ||
31 | /* The opcode itself. Those bits which will be filled in with | |
32 | operands are zeroes. */ | |
33 | unsigned long opcode; | |
34 | ||
35 | /* The opcode mask. This is used by the disassembler. This is a | |
36 | mask containing ones indicating those bits which must match the | |
37 | opcode field, and zeroes indicating those bits which need not | |
38 | match (and are presumably filled in by operands). */ | |
39 | unsigned long mask; | |
40 | ||
41 | /* An array of operand codes. Each code is an index into the | |
42 | operand table. They appear in the order which the operands must | |
43 | appear in assembly code, and are terminated by a zero. */ | |
44 | unsigned char operands[8]; | |
7e3670d6 FF |
45 | |
46 | /* Which (if any) operand is a memory operand. */ | |
47 | unsigned int memop; | |
7a3c9336 C |
48 | }; |
49 | ||
50 | /* The table itself is sorted by major opcode number, and is otherwise | |
51 | in the order in which the disassembler should consider | |
52 | instructions. */ | |
53 | extern const struct v850_opcode v850_opcodes[]; | |
54 | extern const int v850_num_opcodes; | |
55 | ||
56 | \f | |
7e3670d6 | 57 | /* The operands table is an array of struct v850_operand. */ |
7a3c9336 C |
58 | |
59 | struct v850_operand | |
60 | { | |
61 | /* The number of bits in the operand. */ | |
b9792954 | 62 | /* If this value is -1 then the operand's bits are in a discontinous distribution in the instruction. */ |
7a3c9336 C |
63 | int bits; |
64 | ||
b9792954 NC |
65 | /* (bits >= 0): How far the operand is left shifted in the instruction. */ |
66 | /* (bits == -1): Bit mask of the bits in the operand. */ | |
7a3c9336 | 67 | int shift; |
dd528aff | 68 | |
27021dd4 C |
69 | /* Insertion function. This is used by the assembler. To insert an |
70 | operand value into an instruction, check this field. | |
71 | ||
72 | If it is NULL, execute | |
73 | i |= (op & ((1 << o->bits) - 1)) << o->shift; | |
74 | (i is the instruction which we are filling in, o is a pointer to | |
75 | this structure, and op is the opcode value; this assumes twos | |
76 | complement arithmetic). | |
77 | ||
78 | If this field is not NULL, then simply call it with the | |
79 | instruction and the operand value. It will return the new value | |
80 | of the instruction. If the ERRMSG argument is not NULL, then if | |
81 | the operand value is illegal, *ERRMSG will be set to a warning | |
82 | string (the operand will be inserted in any case). If the | |
83 | operand value is legal, *ERRMSG will be unchanged (most operands | |
84 | can accept any value). */ | |
b9792954 NC |
85 | unsigned long (* insert) PARAMS ((unsigned long instruction, long op, |
86 | const char ** errmsg)); | |
27021dd4 C |
87 | |
88 | /* Extraction function. This is used by the disassembler. To | |
89 | extract this operand type from an instruction, check this field. | |
90 | ||
91 | If it is NULL, compute | |
b9792954 NC |
92 | op = o->bits == -1 ? ((i) & o->shift) : ((i) >> o->shift) & ((1 << o->bits) - 1); |
93 | if (o->flags & V850_OPERAND_SIGNED) | |
94 | op = (op << (32 - o->bits)) >> (32 - o->bits); | |
27021dd4 C |
95 | (i is the instruction, o is a pointer to this structure, and op |
96 | is the result; this assumes twos complement arithmetic). | |
97 | ||
98 | If this field is not NULL, then simply call it with the | |
99 | instruction value. It will return the value of the operand. If | |
100 | the INVALID argument is not NULL, *INVALID will be set to | |
101 | non-zero if this operand type can not actually be extracted from | |
102 | this operand (i.e., the instruction does not match). If the | |
103 | operand is valid, *INVALID will not be changed. */ | |
b9792954 | 104 | unsigned long (* extract) PARAMS ((unsigned long instruction, int * invalid)); |
27021dd4 C |
105 | |
106 | /* One bit syntax flags. */ | |
dd528aff | 107 | int flags; |
7a3c9336 C |
108 | }; |
109 | ||
110 | /* Elements in the table are retrieved by indexing with values from | |
111 | the operands field of the v850_opcodes table. */ | |
112 | ||
113 | extern const struct v850_operand v850_operands[]; | |
114 | ||
dd528aff | 115 | /* Values defined for the flags field of a struct v850_operand. */ |
dd528aff | 116 | |
27021dd4 C |
117 | /* This operand names a general purpose register */ |
118 | #define V850_OPERAND_REG 0x01 | |
dd528aff | 119 | |
27021dd4 C |
120 | /* This operand names a system register */ |
121 | #define V850_OPERAND_SRG 0x02 | |
122 | ||
123 | /* This operand names a condition code used in the setf instruction */ | |
124 | #define V850_OPERAND_CC 0x04 | |
125 | ||
126 | /* This operand takes signed values */ | |
127 | #define V850_OPERAND_SIGNED 0x08 | |
7a3c9336 | 128 | |
7e3670d6 FF |
129 | /* This operand is the ep register. */ |
130 | #define V850_OPERAND_EP 0x10 | |
131 | ||
132 | /* This operand is a PC displacement */ | |
133 | #define V850_OPERAND_DISP 0x20 | |
134 | ||
135 | /* This is a relaxable operand. Only used for D9->D22 branch relaxing | |
136 | right now. We may need others in the future (or maybe handle them like | |
137 | promoted operands on the mn10300?) */ | |
138 | #define V850_OPERAND_RELAX 0x40 | |
139 | ||
b9792954 | 140 | /* The register specified must not be r0 */ |
1f5595a6 | 141 | #define V850_NOT_R0 0x80 |
b9792954 NC |
142 | |
143 | /* start-sanitize-v850e */ | |
144 | /* push/pop type instruction, V850E specific. */ | |
1f5595a6 | 145 | #define V850E_PUSH_POP 0x100 |
b9792954 NC |
146 | |
147 | /* 16 bit immediate follows instruction, V850E specific. */ | |
1f5595a6 | 148 | #define V850E_IMMEDIATE16 0x200 |
b9792954 NC |
149 | |
150 | /* 32 bit immediate follows instruction, V850E specific. */ | |
1f5595a6 | 151 | #define V850E_IMMEDIATE32 0x400 |
b9792954 NC |
152 | /* end-sanitize-v850e */ |
153 | ||
7a3c9336 | 154 | #endif /* V850_H */ |