Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * Copyright (c) 2004 Mellanox Technologies Ltd. All rights reserved. | |
3 | * Copyright (c) 2004 Infinicon Corporation. All rights reserved. | |
4 | * Copyright (c) 2004 Intel Corporation. All rights reserved. | |
5 | * Copyright (c) 2004 Topspin Corporation. All rights reserved. | |
6 | * Copyright (c) 2004 Voltaire Corporation. All rights reserved. | |
2a1d9b7f | 7 | * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved. |
f7c6a7b5 | 8 | * Copyright (c) 2005, 2006, 2007 Cisco Systems. All rights reserved. |
1da177e4 LT |
9 | * |
10 | * This software is available to you under a choice of one of two | |
11 | * licenses. You may choose to be licensed under the terms of the GNU | |
12 | * General Public License (GPL) Version 2, available from the file | |
13 | * COPYING in the main directory of this source tree, or the | |
14 | * OpenIB.org BSD license below: | |
15 | * | |
16 | * Redistribution and use in source and binary forms, with or | |
17 | * without modification, are permitted provided that the following | |
18 | * conditions are met: | |
19 | * | |
20 | * - Redistributions of source code must retain the above | |
21 | * copyright notice, this list of conditions and the following | |
22 | * disclaimer. | |
23 | * | |
24 | * - Redistributions in binary form must reproduce the above | |
25 | * copyright notice, this list of conditions and the following | |
26 | * disclaimer in the documentation and/or other materials | |
27 | * provided with the distribution. | |
28 | * | |
29 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
30 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
31 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
32 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
33 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
34 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
35 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
36 | * SOFTWARE. | |
1da177e4 LT |
37 | */ |
38 | ||
39 | #if !defined(IB_VERBS_H) | |
40 | #define IB_VERBS_H | |
41 | ||
42 | #include <linux/types.h> | |
43 | #include <linux/device.h> | |
9b513090 RC |
44 | #include <linux/mm.h> |
45 | #include <linux/dma-mapping.h> | |
459d6e2a | 46 | #include <linux/kref.h> |
bfb3ea12 DB |
47 | #include <linux/list.h> |
48 | #include <linux/rwsem.h> | |
87ae9afd | 49 | #include <linux/scatterlist.h> |
f0626710 | 50 | #include <linux/workqueue.h> |
9268f72d | 51 | #include <linux/socket.h> |
dd5f03be | 52 | #include <uapi/linux/if_ether.h> |
e2773c06 | 53 | |
60063497 | 54 | #include <linux/atomic.h> |
882214e2 | 55 | #include <linux/mmu_notifier.h> |
e2773c06 | 56 | #include <asm/uaccess.h> |
1da177e4 | 57 | |
f0626710 TH |
58 | extern struct workqueue_struct *ib_wq; |
59 | ||
1da177e4 LT |
60 | union ib_gid { |
61 | u8 raw[16]; | |
62 | struct { | |
97f52eb4 SH |
63 | __be64 subnet_prefix; |
64 | __be64 interface_id; | |
1da177e4 LT |
65 | } global; |
66 | }; | |
67 | ||
e26be1bf MS |
68 | extern union ib_gid zgid; |
69 | ||
03db3a2d MB |
70 | struct ib_gid_attr { |
71 | struct net_device *ndev; | |
72 | }; | |
73 | ||
07ebafba TT |
74 | enum rdma_node_type { |
75 | /* IB values map to NodeInfo:NodeType. */ | |
76 | RDMA_NODE_IB_CA = 1, | |
77 | RDMA_NODE_IB_SWITCH, | |
78 | RDMA_NODE_IB_ROUTER, | |
180771a3 UM |
79 | RDMA_NODE_RNIC, |
80 | RDMA_NODE_USNIC, | |
5db5765e | 81 | RDMA_NODE_USNIC_UDP, |
1da177e4 LT |
82 | }; |
83 | ||
07ebafba TT |
84 | enum rdma_transport_type { |
85 | RDMA_TRANSPORT_IB, | |
180771a3 | 86 | RDMA_TRANSPORT_IWARP, |
248567f7 UM |
87 | RDMA_TRANSPORT_USNIC, |
88 | RDMA_TRANSPORT_USNIC_UDP | |
07ebafba TT |
89 | }; |
90 | ||
6b90a6d6 MW |
91 | enum rdma_protocol_type { |
92 | RDMA_PROTOCOL_IB, | |
93 | RDMA_PROTOCOL_IBOE, | |
94 | RDMA_PROTOCOL_IWARP, | |
95 | RDMA_PROTOCOL_USNIC_UDP | |
96 | }; | |
97 | ||
8385fd84 RD |
98 | __attribute_const__ enum rdma_transport_type |
99 | rdma_node_get_transport(enum rdma_node_type node_type); | |
07ebafba | 100 | |
a3f5adaf EC |
101 | enum rdma_link_layer { |
102 | IB_LINK_LAYER_UNSPECIFIED, | |
103 | IB_LINK_LAYER_INFINIBAND, | |
104 | IB_LINK_LAYER_ETHERNET, | |
105 | }; | |
106 | ||
1da177e4 LT |
107 | enum ib_device_cap_flags { |
108 | IB_DEVICE_RESIZE_MAX_WR = 1, | |
109 | IB_DEVICE_BAD_PKEY_CNTR = (1<<1), | |
110 | IB_DEVICE_BAD_QKEY_CNTR = (1<<2), | |
111 | IB_DEVICE_RAW_MULTI = (1<<3), | |
112 | IB_DEVICE_AUTO_PATH_MIG = (1<<4), | |
113 | IB_DEVICE_CHANGE_PHY_PORT = (1<<5), | |
114 | IB_DEVICE_UD_AV_PORT_ENFORCE = (1<<6), | |
115 | IB_DEVICE_CURR_QP_STATE_MOD = (1<<7), | |
116 | IB_DEVICE_SHUTDOWN_PORT = (1<<8), | |
117 | IB_DEVICE_INIT_TYPE = (1<<9), | |
118 | IB_DEVICE_PORT_ACTIVE_EVENT = (1<<10), | |
119 | IB_DEVICE_SYS_IMAGE_GUID = (1<<11), | |
120 | IB_DEVICE_RC_RNR_NAK_GEN = (1<<12), | |
121 | IB_DEVICE_SRQ_RESIZE = (1<<13), | |
122 | IB_DEVICE_N_NOTIFY_CQ = (1<<14), | |
96f15c03 | 123 | IB_DEVICE_LOCAL_DMA_LKEY = (1<<15), |
0f39cf3d | 124 | IB_DEVICE_RESERVED = (1<<16), /* old SEND_W_INV */ |
e0605d91 EC |
125 | IB_DEVICE_MEM_WINDOW = (1<<17), |
126 | /* | |
127 | * Devices should set IB_DEVICE_UD_IP_SUM if they support | |
128 | * insertion of UDP and TCP checksum on outgoing UD IPoIB | |
129 | * messages and can verify the validity of checksum for | |
130 | * incoming messages. Setting this flag implies that the | |
131 | * IPoIB driver may set NETIF_F_IP_CSUM for datagram mode. | |
132 | */ | |
133 | IB_DEVICE_UD_IP_CSUM = (1<<18), | |
c93570f2 | 134 | IB_DEVICE_UD_TSO = (1<<19), |
59991f94 | 135 | IB_DEVICE_XRC = (1<<20), |
00f7ec36 | 136 | IB_DEVICE_MEM_MGT_EXTENSIONS = (1<<21), |
47ee1b9f | 137 | IB_DEVICE_BLOCK_MULTICAST_LOOPBACK = (1<<22), |
7083e42e | 138 | IB_DEVICE_MEM_WINDOW_TYPE_2A = (1<<23), |
319a441d | 139 | IB_DEVICE_MEM_WINDOW_TYPE_2B = (1<<24), |
470a5535 BW |
140 | IB_DEVICE_RC_IP_CSUM = (1<<25), |
141 | IB_DEVICE_RAW_IP_CSUM = (1<<26), | |
1b01d335 | 142 | IB_DEVICE_MANAGED_FLOW_STEERING = (1<<29), |
860f10a7 SG |
143 | IB_DEVICE_SIGNATURE_HANDOVER = (1<<30), |
144 | IB_DEVICE_ON_DEMAND_PAGING = (1<<31), | |
1b01d335 SG |
145 | }; |
146 | ||
147 | enum ib_signature_prot_cap { | |
148 | IB_PROT_T10DIF_TYPE_1 = 1, | |
149 | IB_PROT_T10DIF_TYPE_2 = 1 << 1, | |
150 | IB_PROT_T10DIF_TYPE_3 = 1 << 2, | |
151 | }; | |
152 | ||
153 | enum ib_signature_guard_cap { | |
154 | IB_GUARD_T10DIF_CRC = 1, | |
155 | IB_GUARD_T10DIF_CSUM = 1 << 1, | |
1da177e4 LT |
156 | }; |
157 | ||
158 | enum ib_atomic_cap { | |
159 | IB_ATOMIC_NONE, | |
160 | IB_ATOMIC_HCA, | |
161 | IB_ATOMIC_GLOB | |
162 | }; | |
163 | ||
860f10a7 SG |
164 | enum ib_odp_general_cap_bits { |
165 | IB_ODP_SUPPORT = 1 << 0, | |
166 | }; | |
167 | ||
168 | enum ib_odp_transport_cap_bits { | |
169 | IB_ODP_SUPPORT_SEND = 1 << 0, | |
170 | IB_ODP_SUPPORT_RECV = 1 << 1, | |
171 | IB_ODP_SUPPORT_WRITE = 1 << 2, | |
172 | IB_ODP_SUPPORT_READ = 1 << 3, | |
173 | IB_ODP_SUPPORT_ATOMIC = 1 << 4, | |
174 | }; | |
175 | ||
176 | struct ib_odp_caps { | |
177 | uint64_t general_caps; | |
178 | struct { | |
179 | uint32_t rc_odp_caps; | |
180 | uint32_t uc_odp_caps; | |
181 | uint32_t ud_odp_caps; | |
182 | } per_transport_caps; | |
183 | }; | |
184 | ||
b9926b92 MB |
185 | enum ib_cq_creation_flags { |
186 | IB_CQ_FLAGS_TIMESTAMP_COMPLETION = 1 << 0, | |
187 | }; | |
188 | ||
bcf4c1ea MB |
189 | struct ib_cq_init_attr { |
190 | unsigned int cqe; | |
191 | int comp_vector; | |
192 | u32 flags; | |
193 | }; | |
194 | ||
1da177e4 LT |
195 | struct ib_device_attr { |
196 | u64 fw_ver; | |
97f52eb4 | 197 | __be64 sys_image_guid; |
1da177e4 LT |
198 | u64 max_mr_size; |
199 | u64 page_size_cap; | |
200 | u32 vendor_id; | |
201 | u32 vendor_part_id; | |
202 | u32 hw_ver; | |
203 | int max_qp; | |
204 | int max_qp_wr; | |
205 | int device_cap_flags; | |
206 | int max_sge; | |
207 | int max_sge_rd; | |
208 | int max_cq; | |
209 | int max_cqe; | |
210 | int max_mr; | |
211 | int max_pd; | |
212 | int max_qp_rd_atom; | |
213 | int max_ee_rd_atom; | |
214 | int max_res_rd_atom; | |
215 | int max_qp_init_rd_atom; | |
216 | int max_ee_init_rd_atom; | |
217 | enum ib_atomic_cap atomic_cap; | |
5e80ba8f | 218 | enum ib_atomic_cap masked_atomic_cap; |
1da177e4 LT |
219 | int max_ee; |
220 | int max_rdd; | |
221 | int max_mw; | |
222 | int max_raw_ipv6_qp; | |
223 | int max_raw_ethy_qp; | |
224 | int max_mcast_grp; | |
225 | int max_mcast_qp_attach; | |
226 | int max_total_mcast_qp_attach; | |
227 | int max_ah; | |
228 | int max_fmr; | |
229 | int max_map_per_fmr; | |
230 | int max_srq; | |
231 | int max_srq_wr; | |
232 | int max_srq_sge; | |
00f7ec36 | 233 | unsigned int max_fast_reg_page_list_len; |
1da177e4 LT |
234 | u16 max_pkeys; |
235 | u8 local_ca_ack_delay; | |
1b01d335 SG |
236 | int sig_prot_cap; |
237 | int sig_guard_cap; | |
860f10a7 | 238 | struct ib_odp_caps odp_caps; |
24306dc6 MB |
239 | uint64_t timestamp_mask; |
240 | uint64_t hca_core_clock; /* in KHZ */ | |
1da177e4 LT |
241 | }; |
242 | ||
243 | enum ib_mtu { | |
244 | IB_MTU_256 = 1, | |
245 | IB_MTU_512 = 2, | |
246 | IB_MTU_1024 = 3, | |
247 | IB_MTU_2048 = 4, | |
248 | IB_MTU_4096 = 5 | |
249 | }; | |
250 | ||
251 | static inline int ib_mtu_enum_to_int(enum ib_mtu mtu) | |
252 | { | |
253 | switch (mtu) { | |
254 | case IB_MTU_256: return 256; | |
255 | case IB_MTU_512: return 512; | |
256 | case IB_MTU_1024: return 1024; | |
257 | case IB_MTU_2048: return 2048; | |
258 | case IB_MTU_4096: return 4096; | |
259 | default: return -1; | |
260 | } | |
261 | } | |
262 | ||
263 | enum ib_port_state { | |
264 | IB_PORT_NOP = 0, | |
265 | IB_PORT_DOWN = 1, | |
266 | IB_PORT_INIT = 2, | |
267 | IB_PORT_ARMED = 3, | |
268 | IB_PORT_ACTIVE = 4, | |
269 | IB_PORT_ACTIVE_DEFER = 5 | |
270 | }; | |
271 | ||
272 | enum ib_port_cap_flags { | |
273 | IB_PORT_SM = 1 << 1, | |
274 | IB_PORT_NOTICE_SUP = 1 << 2, | |
275 | IB_PORT_TRAP_SUP = 1 << 3, | |
276 | IB_PORT_OPT_IPD_SUP = 1 << 4, | |
277 | IB_PORT_AUTO_MIGR_SUP = 1 << 5, | |
278 | IB_PORT_SL_MAP_SUP = 1 << 6, | |
279 | IB_PORT_MKEY_NVRAM = 1 << 7, | |
280 | IB_PORT_PKEY_NVRAM = 1 << 8, | |
281 | IB_PORT_LED_INFO_SUP = 1 << 9, | |
282 | IB_PORT_SM_DISABLED = 1 << 10, | |
283 | IB_PORT_SYS_IMAGE_GUID_SUP = 1 << 11, | |
284 | IB_PORT_PKEY_SW_EXT_PORT_TRAP_SUP = 1 << 12, | |
71eeba16 | 285 | IB_PORT_EXTENDED_SPEEDS_SUP = 1 << 14, |
1da177e4 LT |
286 | IB_PORT_CM_SUP = 1 << 16, |
287 | IB_PORT_SNMP_TUNNEL_SUP = 1 << 17, | |
288 | IB_PORT_REINIT_SUP = 1 << 18, | |
289 | IB_PORT_DEVICE_MGMT_SUP = 1 << 19, | |
290 | IB_PORT_VENDOR_CLASS_SUP = 1 << 20, | |
291 | IB_PORT_DR_NOTICE_SUP = 1 << 21, | |
292 | IB_PORT_CAP_MASK_NOTICE_SUP = 1 << 22, | |
293 | IB_PORT_BOOT_MGMT_SUP = 1 << 23, | |
294 | IB_PORT_LINK_LATENCY_SUP = 1 << 24, | |
b4a26a27 | 295 | IB_PORT_CLIENT_REG_SUP = 1 << 25, |
03db3a2d | 296 | IB_PORT_IP_BASED_GIDS = 1 << 26, |
1da177e4 LT |
297 | }; |
298 | ||
299 | enum ib_port_width { | |
300 | IB_WIDTH_1X = 1, | |
301 | IB_WIDTH_4X = 2, | |
302 | IB_WIDTH_8X = 4, | |
303 | IB_WIDTH_12X = 8 | |
304 | }; | |
305 | ||
306 | static inline int ib_width_enum_to_int(enum ib_port_width width) | |
307 | { | |
308 | switch (width) { | |
309 | case IB_WIDTH_1X: return 1; | |
310 | case IB_WIDTH_4X: return 4; | |
311 | case IB_WIDTH_8X: return 8; | |
312 | case IB_WIDTH_12X: return 12; | |
313 | default: return -1; | |
314 | } | |
315 | } | |
316 | ||
2e96691c OG |
317 | enum ib_port_speed { |
318 | IB_SPEED_SDR = 1, | |
319 | IB_SPEED_DDR = 2, | |
320 | IB_SPEED_QDR = 4, | |
321 | IB_SPEED_FDR10 = 8, | |
322 | IB_SPEED_FDR = 16, | |
323 | IB_SPEED_EDR = 32 | |
324 | }; | |
325 | ||
7f624d02 SW |
326 | struct ib_protocol_stats { |
327 | /* TBD... */ | |
328 | }; | |
329 | ||
330 | struct iw_protocol_stats { | |
331 | u64 ipInReceives; | |
332 | u64 ipInHdrErrors; | |
333 | u64 ipInTooBigErrors; | |
334 | u64 ipInNoRoutes; | |
335 | u64 ipInAddrErrors; | |
336 | u64 ipInUnknownProtos; | |
337 | u64 ipInTruncatedPkts; | |
338 | u64 ipInDiscards; | |
339 | u64 ipInDelivers; | |
340 | u64 ipOutForwDatagrams; | |
341 | u64 ipOutRequests; | |
342 | u64 ipOutDiscards; | |
343 | u64 ipOutNoRoutes; | |
344 | u64 ipReasmTimeout; | |
345 | u64 ipReasmReqds; | |
346 | u64 ipReasmOKs; | |
347 | u64 ipReasmFails; | |
348 | u64 ipFragOKs; | |
349 | u64 ipFragFails; | |
350 | u64 ipFragCreates; | |
351 | u64 ipInMcastPkts; | |
352 | u64 ipOutMcastPkts; | |
353 | u64 ipInBcastPkts; | |
354 | u64 ipOutBcastPkts; | |
355 | ||
356 | u64 tcpRtoAlgorithm; | |
357 | u64 tcpRtoMin; | |
358 | u64 tcpRtoMax; | |
359 | u64 tcpMaxConn; | |
360 | u64 tcpActiveOpens; | |
361 | u64 tcpPassiveOpens; | |
362 | u64 tcpAttemptFails; | |
363 | u64 tcpEstabResets; | |
364 | u64 tcpCurrEstab; | |
365 | u64 tcpInSegs; | |
366 | u64 tcpOutSegs; | |
367 | u64 tcpRetransSegs; | |
368 | u64 tcpInErrs; | |
369 | u64 tcpOutRsts; | |
370 | }; | |
371 | ||
372 | union rdma_protocol_stats { | |
373 | struct ib_protocol_stats ib; | |
374 | struct iw_protocol_stats iw; | |
375 | }; | |
376 | ||
f9b22e35 IW |
377 | /* Define bits for the various functionality this port needs to be supported by |
378 | * the core. | |
379 | */ | |
380 | /* Management 0x00000FFF */ | |
381 | #define RDMA_CORE_CAP_IB_MAD 0x00000001 | |
382 | #define RDMA_CORE_CAP_IB_SMI 0x00000002 | |
383 | #define RDMA_CORE_CAP_IB_CM 0x00000004 | |
384 | #define RDMA_CORE_CAP_IW_CM 0x00000008 | |
385 | #define RDMA_CORE_CAP_IB_SA 0x00000010 | |
65995fee | 386 | #define RDMA_CORE_CAP_OPA_MAD 0x00000020 |
f9b22e35 IW |
387 | |
388 | /* Address format 0x000FF000 */ | |
389 | #define RDMA_CORE_CAP_AF_IB 0x00001000 | |
390 | #define RDMA_CORE_CAP_ETH_AH 0x00002000 | |
391 | ||
392 | /* Protocol 0xFFF00000 */ | |
393 | #define RDMA_CORE_CAP_PROT_IB 0x00100000 | |
394 | #define RDMA_CORE_CAP_PROT_ROCE 0x00200000 | |
395 | #define RDMA_CORE_CAP_PROT_IWARP 0x00400000 | |
396 | ||
397 | #define RDMA_CORE_PORT_IBA_IB (RDMA_CORE_CAP_PROT_IB \ | |
398 | | RDMA_CORE_CAP_IB_MAD \ | |
399 | | RDMA_CORE_CAP_IB_SMI \ | |
400 | | RDMA_CORE_CAP_IB_CM \ | |
401 | | RDMA_CORE_CAP_IB_SA \ | |
402 | | RDMA_CORE_CAP_AF_IB) | |
403 | #define RDMA_CORE_PORT_IBA_ROCE (RDMA_CORE_CAP_PROT_ROCE \ | |
404 | | RDMA_CORE_CAP_IB_MAD \ | |
405 | | RDMA_CORE_CAP_IB_CM \ | |
f9b22e35 IW |
406 | | RDMA_CORE_CAP_AF_IB \ |
407 | | RDMA_CORE_CAP_ETH_AH) | |
408 | #define RDMA_CORE_PORT_IWARP (RDMA_CORE_CAP_PROT_IWARP \ | |
409 | | RDMA_CORE_CAP_IW_CM) | |
65995fee IW |
410 | #define RDMA_CORE_PORT_INTEL_OPA (RDMA_CORE_PORT_IBA_IB \ |
411 | | RDMA_CORE_CAP_OPA_MAD) | |
f9b22e35 | 412 | |
1da177e4 LT |
413 | struct ib_port_attr { |
414 | enum ib_port_state state; | |
415 | enum ib_mtu max_mtu; | |
416 | enum ib_mtu active_mtu; | |
417 | int gid_tbl_len; | |
418 | u32 port_cap_flags; | |
419 | u32 max_msg_sz; | |
420 | u32 bad_pkey_cntr; | |
421 | u32 qkey_viol_cntr; | |
422 | u16 pkey_tbl_len; | |
423 | u16 lid; | |
424 | u16 sm_lid; | |
425 | u8 lmc; | |
426 | u8 max_vl_num; | |
427 | u8 sm_sl; | |
428 | u8 subnet_timeout; | |
429 | u8 init_type_reply; | |
430 | u8 active_width; | |
431 | u8 active_speed; | |
432 | u8 phys_state; | |
433 | }; | |
434 | ||
435 | enum ib_device_modify_flags { | |
c5bcbbb9 RD |
436 | IB_DEVICE_MODIFY_SYS_IMAGE_GUID = 1 << 0, |
437 | IB_DEVICE_MODIFY_NODE_DESC = 1 << 1 | |
1da177e4 LT |
438 | }; |
439 | ||
440 | struct ib_device_modify { | |
441 | u64 sys_image_guid; | |
c5bcbbb9 | 442 | char node_desc[64]; |
1da177e4 LT |
443 | }; |
444 | ||
445 | enum ib_port_modify_flags { | |
446 | IB_PORT_SHUTDOWN = 1, | |
447 | IB_PORT_INIT_TYPE = (1<<2), | |
448 | IB_PORT_RESET_QKEY_CNTR = (1<<3) | |
449 | }; | |
450 | ||
451 | struct ib_port_modify { | |
452 | u32 set_port_cap_mask; | |
453 | u32 clr_port_cap_mask; | |
454 | u8 init_type; | |
455 | }; | |
456 | ||
457 | enum ib_event_type { | |
458 | IB_EVENT_CQ_ERR, | |
459 | IB_EVENT_QP_FATAL, | |
460 | IB_EVENT_QP_REQ_ERR, | |
461 | IB_EVENT_QP_ACCESS_ERR, | |
462 | IB_EVENT_COMM_EST, | |
463 | IB_EVENT_SQ_DRAINED, | |
464 | IB_EVENT_PATH_MIG, | |
465 | IB_EVENT_PATH_MIG_ERR, | |
466 | IB_EVENT_DEVICE_FATAL, | |
467 | IB_EVENT_PORT_ACTIVE, | |
468 | IB_EVENT_PORT_ERR, | |
469 | IB_EVENT_LID_CHANGE, | |
470 | IB_EVENT_PKEY_CHANGE, | |
d41fcc67 RD |
471 | IB_EVENT_SM_CHANGE, |
472 | IB_EVENT_SRQ_ERR, | |
473 | IB_EVENT_SRQ_LIMIT_REACHED, | |
63942c9a | 474 | IB_EVENT_QP_LAST_WQE_REACHED, |
761d90ed OG |
475 | IB_EVENT_CLIENT_REREGISTER, |
476 | IB_EVENT_GID_CHANGE, | |
1da177e4 LT |
477 | }; |
478 | ||
db7489e0 | 479 | const char *__attribute_const__ ib_event_msg(enum ib_event_type event); |
2b1b5b60 | 480 | |
1da177e4 LT |
481 | struct ib_event { |
482 | struct ib_device *device; | |
483 | union { | |
484 | struct ib_cq *cq; | |
485 | struct ib_qp *qp; | |
d41fcc67 | 486 | struct ib_srq *srq; |
1da177e4 LT |
487 | u8 port_num; |
488 | } element; | |
489 | enum ib_event_type event; | |
490 | }; | |
491 | ||
492 | struct ib_event_handler { | |
493 | struct ib_device *device; | |
494 | void (*handler)(struct ib_event_handler *, struct ib_event *); | |
495 | struct list_head list; | |
496 | }; | |
497 | ||
498 | #define INIT_IB_EVENT_HANDLER(_ptr, _device, _handler) \ | |
499 | do { \ | |
500 | (_ptr)->device = _device; \ | |
501 | (_ptr)->handler = _handler; \ | |
502 | INIT_LIST_HEAD(&(_ptr)->list); \ | |
503 | } while (0) | |
504 | ||
505 | struct ib_global_route { | |
506 | union ib_gid dgid; | |
507 | u32 flow_label; | |
508 | u8 sgid_index; | |
509 | u8 hop_limit; | |
510 | u8 traffic_class; | |
511 | }; | |
512 | ||
513789ed | 513 | struct ib_grh { |
97f52eb4 SH |
514 | __be32 version_tclass_flow; |
515 | __be16 paylen; | |
513789ed HR |
516 | u8 next_hdr; |
517 | u8 hop_limit; | |
518 | union ib_gid sgid; | |
519 | union ib_gid dgid; | |
520 | }; | |
521 | ||
1da177e4 LT |
522 | enum { |
523 | IB_MULTICAST_QPN = 0xffffff | |
524 | }; | |
525 | ||
f3a7c66b | 526 | #define IB_LID_PERMISSIVE cpu_to_be16(0xFFFF) |
97f52eb4 | 527 | |
1da177e4 LT |
528 | enum ib_ah_flags { |
529 | IB_AH_GRH = 1 | |
530 | }; | |
531 | ||
bf6a9e31 JM |
532 | enum ib_rate { |
533 | IB_RATE_PORT_CURRENT = 0, | |
534 | IB_RATE_2_5_GBPS = 2, | |
535 | IB_RATE_5_GBPS = 5, | |
536 | IB_RATE_10_GBPS = 3, | |
537 | IB_RATE_20_GBPS = 6, | |
538 | IB_RATE_30_GBPS = 4, | |
539 | IB_RATE_40_GBPS = 7, | |
540 | IB_RATE_60_GBPS = 8, | |
541 | IB_RATE_80_GBPS = 9, | |
71eeba16 MA |
542 | IB_RATE_120_GBPS = 10, |
543 | IB_RATE_14_GBPS = 11, | |
544 | IB_RATE_56_GBPS = 12, | |
545 | IB_RATE_112_GBPS = 13, | |
546 | IB_RATE_168_GBPS = 14, | |
547 | IB_RATE_25_GBPS = 15, | |
548 | IB_RATE_100_GBPS = 16, | |
549 | IB_RATE_200_GBPS = 17, | |
550 | IB_RATE_300_GBPS = 18 | |
bf6a9e31 JM |
551 | }; |
552 | ||
553 | /** | |
554 | * ib_rate_to_mult - Convert the IB rate enum to a multiple of the | |
555 | * base rate of 2.5 Gbit/sec. For example, IB_RATE_5_GBPS will be | |
556 | * converted to 2, since 5 Gbit/sec is 2 * 2.5 Gbit/sec. | |
557 | * @rate: rate to convert. | |
558 | */ | |
8385fd84 | 559 | __attribute_const__ int ib_rate_to_mult(enum ib_rate rate); |
bf6a9e31 | 560 | |
71eeba16 MA |
561 | /** |
562 | * ib_rate_to_mbps - Convert the IB rate enum to Mbps. | |
563 | * For example, IB_RATE_2_5_GBPS will be converted to 2500. | |
564 | * @rate: rate to convert. | |
565 | */ | |
8385fd84 | 566 | __attribute_const__ int ib_rate_to_mbps(enum ib_rate rate); |
71eeba16 | 567 | |
17cd3a2d SG |
568 | |
569 | /** | |
9bee178b SG |
570 | * enum ib_mr_type - memory region type |
571 | * @IB_MR_TYPE_MEM_REG: memory region that is used for | |
572 | * normal registration | |
573 | * @IB_MR_TYPE_SIGNATURE: memory region that is used for | |
574 | * signature operations (data-integrity | |
575 | * capable regions) | |
17cd3a2d | 576 | */ |
9bee178b SG |
577 | enum ib_mr_type { |
578 | IB_MR_TYPE_MEM_REG, | |
579 | IB_MR_TYPE_SIGNATURE, | |
17cd3a2d SG |
580 | }; |
581 | ||
1b01d335 | 582 | /** |
78eda2bb SG |
583 | * Signature types |
584 | * IB_SIG_TYPE_NONE: Unprotected. | |
585 | * IB_SIG_TYPE_T10_DIF: Type T10-DIF | |
1b01d335 | 586 | */ |
78eda2bb SG |
587 | enum ib_signature_type { |
588 | IB_SIG_TYPE_NONE, | |
589 | IB_SIG_TYPE_T10_DIF, | |
1b01d335 SG |
590 | }; |
591 | ||
592 | /** | |
593 | * Signature T10-DIF block-guard types | |
594 | * IB_T10DIF_CRC: Corresponds to T10-PI mandated CRC checksum rules. | |
595 | * IB_T10DIF_CSUM: Corresponds to IP checksum rules. | |
596 | */ | |
597 | enum ib_t10_dif_bg_type { | |
598 | IB_T10DIF_CRC, | |
599 | IB_T10DIF_CSUM | |
600 | }; | |
601 | ||
602 | /** | |
603 | * struct ib_t10_dif_domain - Parameters specific for T10-DIF | |
604 | * domain. | |
1b01d335 SG |
605 | * @bg_type: T10-DIF block guard type (CRC|CSUM) |
606 | * @pi_interval: protection information interval. | |
607 | * @bg: seed of guard computation. | |
608 | * @app_tag: application tag of guard block | |
609 | * @ref_tag: initial guard block reference tag. | |
78eda2bb SG |
610 | * @ref_remap: Indicate wethear the reftag increments each block |
611 | * @app_escape: Indicate to skip block check if apptag=0xffff | |
612 | * @ref_escape: Indicate to skip block check if reftag=0xffffffff | |
613 | * @apptag_check_mask: check bitmask of application tag. | |
1b01d335 SG |
614 | */ |
615 | struct ib_t10_dif_domain { | |
1b01d335 SG |
616 | enum ib_t10_dif_bg_type bg_type; |
617 | u16 pi_interval; | |
618 | u16 bg; | |
619 | u16 app_tag; | |
620 | u32 ref_tag; | |
78eda2bb SG |
621 | bool ref_remap; |
622 | bool app_escape; | |
623 | bool ref_escape; | |
624 | u16 apptag_check_mask; | |
1b01d335 SG |
625 | }; |
626 | ||
627 | /** | |
628 | * struct ib_sig_domain - Parameters for signature domain | |
629 | * @sig_type: specific signauture type | |
630 | * @sig: union of all signature domain attributes that may | |
631 | * be used to set domain layout. | |
632 | */ | |
633 | struct ib_sig_domain { | |
634 | enum ib_signature_type sig_type; | |
635 | union { | |
636 | struct ib_t10_dif_domain dif; | |
637 | } sig; | |
638 | }; | |
639 | ||
640 | /** | |
641 | * struct ib_sig_attrs - Parameters for signature handover operation | |
642 | * @check_mask: bitmask for signature byte check (8 bytes) | |
643 | * @mem: memory domain layout desciptor. | |
644 | * @wire: wire domain layout desciptor. | |
645 | */ | |
646 | struct ib_sig_attrs { | |
647 | u8 check_mask; | |
648 | struct ib_sig_domain mem; | |
649 | struct ib_sig_domain wire; | |
650 | }; | |
651 | ||
652 | enum ib_sig_err_type { | |
653 | IB_SIG_BAD_GUARD, | |
654 | IB_SIG_BAD_REFTAG, | |
655 | IB_SIG_BAD_APPTAG, | |
656 | }; | |
657 | ||
658 | /** | |
659 | * struct ib_sig_err - signature error descriptor | |
660 | */ | |
661 | struct ib_sig_err { | |
662 | enum ib_sig_err_type err_type; | |
663 | u32 expected; | |
664 | u32 actual; | |
665 | u64 sig_err_offset; | |
666 | u32 key; | |
667 | }; | |
668 | ||
669 | enum ib_mr_status_check { | |
670 | IB_MR_CHECK_SIG_STATUS = 1, | |
671 | }; | |
672 | ||
673 | /** | |
674 | * struct ib_mr_status - Memory region status container | |
675 | * | |
676 | * @fail_status: Bitmask of MR checks status. For each | |
677 | * failed check a corresponding status bit is set. | |
678 | * @sig_err: Additional info for IB_MR_CEHCK_SIG_STATUS | |
679 | * failure. | |
680 | */ | |
681 | struct ib_mr_status { | |
682 | u32 fail_status; | |
683 | struct ib_sig_err sig_err; | |
684 | }; | |
685 | ||
bf6a9e31 JM |
686 | /** |
687 | * mult_to_ib_rate - Convert a multiple of 2.5 Gbit/sec to an IB rate | |
688 | * enum. | |
689 | * @mult: multiple to convert. | |
690 | */ | |
8385fd84 | 691 | __attribute_const__ enum ib_rate mult_to_ib_rate(int mult); |
bf6a9e31 | 692 | |
1da177e4 LT |
693 | struct ib_ah_attr { |
694 | struct ib_global_route grh; | |
695 | u16 dlid; | |
696 | u8 sl; | |
697 | u8 src_path_bits; | |
698 | u8 static_rate; | |
699 | u8 ah_flags; | |
700 | u8 port_num; | |
dd5f03be | 701 | u8 dmac[ETH_ALEN]; |
1da177e4 LT |
702 | }; |
703 | ||
704 | enum ib_wc_status { | |
705 | IB_WC_SUCCESS, | |
706 | IB_WC_LOC_LEN_ERR, | |
707 | IB_WC_LOC_QP_OP_ERR, | |
708 | IB_WC_LOC_EEC_OP_ERR, | |
709 | IB_WC_LOC_PROT_ERR, | |
710 | IB_WC_WR_FLUSH_ERR, | |
711 | IB_WC_MW_BIND_ERR, | |
712 | IB_WC_BAD_RESP_ERR, | |
713 | IB_WC_LOC_ACCESS_ERR, | |
714 | IB_WC_REM_INV_REQ_ERR, | |
715 | IB_WC_REM_ACCESS_ERR, | |
716 | IB_WC_REM_OP_ERR, | |
717 | IB_WC_RETRY_EXC_ERR, | |
718 | IB_WC_RNR_RETRY_EXC_ERR, | |
719 | IB_WC_LOC_RDD_VIOL_ERR, | |
720 | IB_WC_REM_INV_RD_REQ_ERR, | |
721 | IB_WC_REM_ABORT_ERR, | |
722 | IB_WC_INV_EECN_ERR, | |
723 | IB_WC_INV_EEC_STATE_ERR, | |
724 | IB_WC_FATAL_ERR, | |
725 | IB_WC_RESP_TIMEOUT_ERR, | |
726 | IB_WC_GENERAL_ERR | |
727 | }; | |
728 | ||
db7489e0 | 729 | const char *__attribute_const__ ib_wc_status_msg(enum ib_wc_status status); |
2b1b5b60 | 730 | |
1da177e4 LT |
731 | enum ib_wc_opcode { |
732 | IB_WC_SEND, | |
733 | IB_WC_RDMA_WRITE, | |
734 | IB_WC_RDMA_READ, | |
735 | IB_WC_COMP_SWAP, | |
736 | IB_WC_FETCH_ADD, | |
737 | IB_WC_BIND_MW, | |
c93570f2 | 738 | IB_WC_LSO, |
00f7ec36 | 739 | IB_WC_LOCAL_INV, |
4c67e2bf | 740 | IB_WC_REG_MR, |
5e80ba8f VS |
741 | IB_WC_MASKED_COMP_SWAP, |
742 | IB_WC_MASKED_FETCH_ADD, | |
1da177e4 LT |
743 | /* |
744 | * Set value of IB_WC_RECV so consumers can test if a completion is a | |
745 | * receive by testing (opcode & IB_WC_RECV). | |
746 | */ | |
747 | IB_WC_RECV = 1 << 7, | |
748 | IB_WC_RECV_RDMA_WITH_IMM | |
749 | }; | |
750 | ||
751 | enum ib_wc_flags { | |
752 | IB_WC_GRH = 1, | |
00f7ec36 SW |
753 | IB_WC_WITH_IMM = (1<<1), |
754 | IB_WC_WITH_INVALIDATE = (1<<2), | |
d927d505 | 755 | IB_WC_IP_CSUM_OK = (1<<3), |
dd5f03be MB |
756 | IB_WC_WITH_SMAC = (1<<4), |
757 | IB_WC_WITH_VLAN = (1<<5), | |
1da177e4 LT |
758 | }; |
759 | ||
760 | struct ib_wc { | |
761 | u64 wr_id; | |
762 | enum ib_wc_status status; | |
763 | enum ib_wc_opcode opcode; | |
764 | u32 vendor_err; | |
765 | u32 byte_len; | |
062dbb69 | 766 | struct ib_qp *qp; |
00f7ec36 SW |
767 | union { |
768 | __be32 imm_data; | |
769 | u32 invalidate_rkey; | |
770 | } ex; | |
1da177e4 LT |
771 | u32 src_qp; |
772 | int wc_flags; | |
773 | u16 pkey_index; | |
774 | u16 slid; | |
775 | u8 sl; | |
776 | u8 dlid_path_bits; | |
777 | u8 port_num; /* valid only for DR SMPs on switches */ | |
dd5f03be MB |
778 | u8 smac[ETH_ALEN]; |
779 | u16 vlan_id; | |
1da177e4 LT |
780 | }; |
781 | ||
ed23a727 RD |
782 | enum ib_cq_notify_flags { |
783 | IB_CQ_SOLICITED = 1 << 0, | |
784 | IB_CQ_NEXT_COMP = 1 << 1, | |
785 | IB_CQ_SOLICITED_MASK = IB_CQ_SOLICITED | IB_CQ_NEXT_COMP, | |
786 | IB_CQ_REPORT_MISSED_EVENTS = 1 << 2, | |
1da177e4 LT |
787 | }; |
788 | ||
96104eda | 789 | enum ib_srq_type { |
418d5130 SH |
790 | IB_SRQT_BASIC, |
791 | IB_SRQT_XRC | |
96104eda SH |
792 | }; |
793 | ||
d41fcc67 RD |
794 | enum ib_srq_attr_mask { |
795 | IB_SRQ_MAX_WR = 1 << 0, | |
796 | IB_SRQ_LIMIT = 1 << 1, | |
797 | }; | |
798 | ||
799 | struct ib_srq_attr { | |
800 | u32 max_wr; | |
801 | u32 max_sge; | |
802 | u32 srq_limit; | |
803 | }; | |
804 | ||
805 | struct ib_srq_init_attr { | |
806 | void (*event_handler)(struct ib_event *, void *); | |
807 | void *srq_context; | |
808 | struct ib_srq_attr attr; | |
96104eda | 809 | enum ib_srq_type srq_type; |
418d5130 SH |
810 | |
811 | union { | |
812 | struct { | |
813 | struct ib_xrcd *xrcd; | |
814 | struct ib_cq *cq; | |
815 | } xrc; | |
816 | } ext; | |
d41fcc67 RD |
817 | }; |
818 | ||
1da177e4 LT |
819 | struct ib_qp_cap { |
820 | u32 max_send_wr; | |
821 | u32 max_recv_wr; | |
822 | u32 max_send_sge; | |
823 | u32 max_recv_sge; | |
824 | u32 max_inline_data; | |
825 | }; | |
826 | ||
827 | enum ib_sig_type { | |
828 | IB_SIGNAL_ALL_WR, | |
829 | IB_SIGNAL_REQ_WR | |
830 | }; | |
831 | ||
832 | enum ib_qp_type { | |
833 | /* | |
834 | * IB_QPT_SMI and IB_QPT_GSI have to be the first two entries | |
835 | * here (and in that order) since the MAD layer uses them as | |
836 | * indices into a 2-entry table. | |
837 | */ | |
838 | IB_QPT_SMI, | |
839 | IB_QPT_GSI, | |
840 | ||
841 | IB_QPT_RC, | |
842 | IB_QPT_UC, | |
843 | IB_QPT_UD, | |
844 | IB_QPT_RAW_IPV6, | |
b42b63cf | 845 | IB_QPT_RAW_ETHERTYPE, |
c938a616 | 846 | IB_QPT_RAW_PACKET = 8, |
b42b63cf SH |
847 | IB_QPT_XRC_INI = 9, |
848 | IB_QPT_XRC_TGT, | |
0134f16b JM |
849 | IB_QPT_MAX, |
850 | /* Reserve a range for qp types internal to the low level driver. | |
851 | * These qp types will not be visible at the IB core layer, so the | |
852 | * IB_QPT_MAX usages should not be affected in the core layer | |
853 | */ | |
854 | IB_QPT_RESERVED1 = 0x1000, | |
855 | IB_QPT_RESERVED2, | |
856 | IB_QPT_RESERVED3, | |
857 | IB_QPT_RESERVED4, | |
858 | IB_QPT_RESERVED5, | |
859 | IB_QPT_RESERVED6, | |
860 | IB_QPT_RESERVED7, | |
861 | IB_QPT_RESERVED8, | |
862 | IB_QPT_RESERVED9, | |
863 | IB_QPT_RESERVED10, | |
1da177e4 LT |
864 | }; |
865 | ||
b846f25a | 866 | enum ib_qp_create_flags { |
47ee1b9f RL |
867 | IB_QP_CREATE_IPOIB_UD_LSO = 1 << 0, |
868 | IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK = 1 << 1, | |
90f1d1b4 | 869 | IB_QP_CREATE_NETIF_QP = 1 << 5, |
1b01d335 | 870 | IB_QP_CREATE_SIGNATURE_EN = 1 << 6, |
09b93088 | 871 | IB_QP_CREATE_USE_GFP_NOIO = 1 << 7, |
d2b57063 JM |
872 | /* reserve bits 26-31 for low level drivers' internal use */ |
873 | IB_QP_CREATE_RESERVED_START = 1 << 26, | |
874 | IB_QP_CREATE_RESERVED_END = 1 << 31, | |
b846f25a EC |
875 | }; |
876 | ||
73c40c61 YH |
877 | /* |
878 | * Note: users may not call ib_close_qp or ib_destroy_qp from the event_handler | |
879 | * callback to destroy the passed in QP. | |
880 | */ | |
881 | ||
1da177e4 LT |
882 | struct ib_qp_init_attr { |
883 | void (*event_handler)(struct ib_event *, void *); | |
884 | void *qp_context; | |
885 | struct ib_cq *send_cq; | |
886 | struct ib_cq *recv_cq; | |
887 | struct ib_srq *srq; | |
b42b63cf | 888 | struct ib_xrcd *xrcd; /* XRC TGT QPs only */ |
1da177e4 LT |
889 | struct ib_qp_cap cap; |
890 | enum ib_sig_type sq_sig_type; | |
891 | enum ib_qp_type qp_type; | |
b846f25a | 892 | enum ib_qp_create_flags create_flags; |
1da177e4 LT |
893 | u8 port_num; /* special QP types only */ |
894 | }; | |
895 | ||
0e0ec7e0 SH |
896 | struct ib_qp_open_attr { |
897 | void (*event_handler)(struct ib_event *, void *); | |
898 | void *qp_context; | |
899 | u32 qp_num; | |
900 | enum ib_qp_type qp_type; | |
901 | }; | |
902 | ||
1da177e4 LT |
903 | enum ib_rnr_timeout { |
904 | IB_RNR_TIMER_655_36 = 0, | |
905 | IB_RNR_TIMER_000_01 = 1, | |
906 | IB_RNR_TIMER_000_02 = 2, | |
907 | IB_RNR_TIMER_000_03 = 3, | |
908 | IB_RNR_TIMER_000_04 = 4, | |
909 | IB_RNR_TIMER_000_06 = 5, | |
910 | IB_RNR_TIMER_000_08 = 6, | |
911 | IB_RNR_TIMER_000_12 = 7, | |
912 | IB_RNR_TIMER_000_16 = 8, | |
913 | IB_RNR_TIMER_000_24 = 9, | |
914 | IB_RNR_TIMER_000_32 = 10, | |
915 | IB_RNR_TIMER_000_48 = 11, | |
916 | IB_RNR_TIMER_000_64 = 12, | |
917 | IB_RNR_TIMER_000_96 = 13, | |
918 | IB_RNR_TIMER_001_28 = 14, | |
919 | IB_RNR_TIMER_001_92 = 15, | |
920 | IB_RNR_TIMER_002_56 = 16, | |
921 | IB_RNR_TIMER_003_84 = 17, | |
922 | IB_RNR_TIMER_005_12 = 18, | |
923 | IB_RNR_TIMER_007_68 = 19, | |
924 | IB_RNR_TIMER_010_24 = 20, | |
925 | IB_RNR_TIMER_015_36 = 21, | |
926 | IB_RNR_TIMER_020_48 = 22, | |
927 | IB_RNR_TIMER_030_72 = 23, | |
928 | IB_RNR_TIMER_040_96 = 24, | |
929 | IB_RNR_TIMER_061_44 = 25, | |
930 | IB_RNR_TIMER_081_92 = 26, | |
931 | IB_RNR_TIMER_122_88 = 27, | |
932 | IB_RNR_TIMER_163_84 = 28, | |
933 | IB_RNR_TIMER_245_76 = 29, | |
934 | IB_RNR_TIMER_327_68 = 30, | |
935 | IB_RNR_TIMER_491_52 = 31 | |
936 | }; | |
937 | ||
938 | enum ib_qp_attr_mask { | |
939 | IB_QP_STATE = 1, | |
940 | IB_QP_CUR_STATE = (1<<1), | |
941 | IB_QP_EN_SQD_ASYNC_NOTIFY = (1<<2), | |
942 | IB_QP_ACCESS_FLAGS = (1<<3), | |
943 | IB_QP_PKEY_INDEX = (1<<4), | |
944 | IB_QP_PORT = (1<<5), | |
945 | IB_QP_QKEY = (1<<6), | |
946 | IB_QP_AV = (1<<7), | |
947 | IB_QP_PATH_MTU = (1<<8), | |
948 | IB_QP_TIMEOUT = (1<<9), | |
949 | IB_QP_RETRY_CNT = (1<<10), | |
950 | IB_QP_RNR_RETRY = (1<<11), | |
951 | IB_QP_RQ_PSN = (1<<12), | |
952 | IB_QP_MAX_QP_RD_ATOMIC = (1<<13), | |
953 | IB_QP_ALT_PATH = (1<<14), | |
954 | IB_QP_MIN_RNR_TIMER = (1<<15), | |
955 | IB_QP_SQ_PSN = (1<<16), | |
956 | IB_QP_MAX_DEST_RD_ATOMIC = (1<<17), | |
957 | IB_QP_PATH_MIG_STATE = (1<<18), | |
958 | IB_QP_CAP = (1<<19), | |
dd5f03be | 959 | IB_QP_DEST_QPN = (1<<20), |
aa744cc0 MB |
960 | IB_QP_RESERVED1 = (1<<21), |
961 | IB_QP_RESERVED2 = (1<<22), | |
962 | IB_QP_RESERVED3 = (1<<23), | |
963 | IB_QP_RESERVED4 = (1<<24), | |
1da177e4 LT |
964 | }; |
965 | ||
966 | enum ib_qp_state { | |
967 | IB_QPS_RESET, | |
968 | IB_QPS_INIT, | |
969 | IB_QPS_RTR, | |
970 | IB_QPS_RTS, | |
971 | IB_QPS_SQD, | |
972 | IB_QPS_SQE, | |
973 | IB_QPS_ERR | |
974 | }; | |
975 | ||
976 | enum ib_mig_state { | |
977 | IB_MIG_MIGRATED, | |
978 | IB_MIG_REARM, | |
979 | IB_MIG_ARMED | |
980 | }; | |
981 | ||
7083e42e SM |
982 | enum ib_mw_type { |
983 | IB_MW_TYPE_1 = 1, | |
984 | IB_MW_TYPE_2 = 2 | |
985 | }; | |
986 | ||
1da177e4 LT |
987 | struct ib_qp_attr { |
988 | enum ib_qp_state qp_state; | |
989 | enum ib_qp_state cur_qp_state; | |
990 | enum ib_mtu path_mtu; | |
991 | enum ib_mig_state path_mig_state; | |
992 | u32 qkey; | |
993 | u32 rq_psn; | |
994 | u32 sq_psn; | |
995 | u32 dest_qp_num; | |
996 | int qp_access_flags; | |
997 | struct ib_qp_cap cap; | |
998 | struct ib_ah_attr ah_attr; | |
999 | struct ib_ah_attr alt_ah_attr; | |
1000 | u16 pkey_index; | |
1001 | u16 alt_pkey_index; | |
1002 | u8 en_sqd_async_notify; | |
1003 | u8 sq_draining; | |
1004 | u8 max_rd_atomic; | |
1005 | u8 max_dest_rd_atomic; | |
1006 | u8 min_rnr_timer; | |
1007 | u8 port_num; | |
1008 | u8 timeout; | |
1009 | u8 retry_cnt; | |
1010 | u8 rnr_retry; | |
1011 | u8 alt_port_num; | |
1012 | u8 alt_timeout; | |
1013 | }; | |
1014 | ||
1015 | enum ib_wr_opcode { | |
1016 | IB_WR_RDMA_WRITE, | |
1017 | IB_WR_RDMA_WRITE_WITH_IMM, | |
1018 | IB_WR_SEND, | |
1019 | IB_WR_SEND_WITH_IMM, | |
1020 | IB_WR_RDMA_READ, | |
1021 | IB_WR_ATOMIC_CMP_AND_SWP, | |
c93570f2 | 1022 | IB_WR_ATOMIC_FETCH_AND_ADD, |
0f39cf3d RD |
1023 | IB_WR_LSO, |
1024 | IB_WR_SEND_WITH_INV, | |
00f7ec36 SW |
1025 | IB_WR_RDMA_READ_WITH_INV, |
1026 | IB_WR_LOCAL_INV, | |
4c67e2bf | 1027 | IB_WR_REG_MR, |
5e80ba8f VS |
1028 | IB_WR_MASKED_ATOMIC_CMP_AND_SWP, |
1029 | IB_WR_MASKED_ATOMIC_FETCH_AND_ADD, | |
7083e42e | 1030 | IB_WR_BIND_MW, |
1b01d335 | 1031 | IB_WR_REG_SIG_MR, |
0134f16b JM |
1032 | /* reserve values for low level drivers' internal use. |
1033 | * These values will not be used at all in the ib core layer. | |
1034 | */ | |
1035 | IB_WR_RESERVED1 = 0xf0, | |
1036 | IB_WR_RESERVED2, | |
1037 | IB_WR_RESERVED3, | |
1038 | IB_WR_RESERVED4, | |
1039 | IB_WR_RESERVED5, | |
1040 | IB_WR_RESERVED6, | |
1041 | IB_WR_RESERVED7, | |
1042 | IB_WR_RESERVED8, | |
1043 | IB_WR_RESERVED9, | |
1044 | IB_WR_RESERVED10, | |
1da177e4 LT |
1045 | }; |
1046 | ||
1047 | enum ib_send_flags { | |
1048 | IB_SEND_FENCE = 1, | |
1049 | IB_SEND_SIGNALED = (1<<1), | |
1050 | IB_SEND_SOLICITED = (1<<2), | |
e0605d91 | 1051 | IB_SEND_INLINE = (1<<3), |
0134f16b JM |
1052 | IB_SEND_IP_CSUM = (1<<4), |
1053 | ||
1054 | /* reserve bits 26-31 for low level drivers' internal use */ | |
1055 | IB_SEND_RESERVED_START = (1 << 26), | |
1056 | IB_SEND_RESERVED_END = (1 << 31), | |
1da177e4 LT |
1057 | }; |
1058 | ||
1059 | struct ib_sge { | |
1060 | u64 addr; | |
1061 | u32 length; | |
1062 | u32 lkey; | |
1063 | }; | |
1064 | ||
7083e42e SM |
1065 | /** |
1066 | * struct ib_mw_bind_info - Parameters for a memory window bind operation. | |
1067 | * @mr: A memory region to bind the memory window to. | |
1068 | * @addr: The address where the memory window should begin. | |
1069 | * @length: The length of the memory window, in bytes. | |
1070 | * @mw_access_flags: Access flags from enum ib_access_flags for the window. | |
1071 | * | |
1072 | * This struct contains the shared parameters for type 1 and type 2 | |
1073 | * memory window bind operations. | |
1074 | */ | |
1075 | struct ib_mw_bind_info { | |
1076 | struct ib_mr *mr; | |
1077 | u64 addr; | |
1078 | u64 length; | |
1079 | int mw_access_flags; | |
1080 | }; | |
1081 | ||
1da177e4 LT |
1082 | struct ib_send_wr { |
1083 | struct ib_send_wr *next; | |
1084 | u64 wr_id; | |
1085 | struct ib_sge *sg_list; | |
1086 | int num_sge; | |
1087 | enum ib_wr_opcode opcode; | |
1088 | int send_flags; | |
0f39cf3d RD |
1089 | union { |
1090 | __be32 imm_data; | |
1091 | u32 invalidate_rkey; | |
1092 | } ex; | |
1da177e4 LT |
1093 | }; |
1094 | ||
e622f2f4 CH |
1095 | struct ib_rdma_wr { |
1096 | struct ib_send_wr wr; | |
1097 | u64 remote_addr; | |
1098 | u32 rkey; | |
1099 | }; | |
1100 | ||
1101 | static inline struct ib_rdma_wr *rdma_wr(struct ib_send_wr *wr) | |
1102 | { | |
1103 | return container_of(wr, struct ib_rdma_wr, wr); | |
1104 | } | |
1105 | ||
1106 | struct ib_atomic_wr { | |
1107 | struct ib_send_wr wr; | |
1108 | u64 remote_addr; | |
1109 | u64 compare_add; | |
1110 | u64 swap; | |
1111 | u64 compare_add_mask; | |
1112 | u64 swap_mask; | |
1113 | u32 rkey; | |
1114 | }; | |
1115 | ||
1116 | static inline struct ib_atomic_wr *atomic_wr(struct ib_send_wr *wr) | |
1117 | { | |
1118 | return container_of(wr, struct ib_atomic_wr, wr); | |
1119 | } | |
1120 | ||
1121 | struct ib_ud_wr { | |
1122 | struct ib_send_wr wr; | |
1123 | struct ib_ah *ah; | |
1124 | void *header; | |
1125 | int hlen; | |
1126 | int mss; | |
1127 | u32 remote_qpn; | |
1128 | u32 remote_qkey; | |
1129 | u16 pkey_index; /* valid for GSI only */ | |
1130 | u8 port_num; /* valid for DR SMPs on switch only */ | |
1131 | }; | |
1132 | ||
1133 | static inline struct ib_ud_wr *ud_wr(struct ib_send_wr *wr) | |
1134 | { | |
1135 | return container_of(wr, struct ib_ud_wr, wr); | |
1136 | } | |
1137 | ||
4c67e2bf SG |
1138 | struct ib_reg_wr { |
1139 | struct ib_send_wr wr; | |
1140 | struct ib_mr *mr; | |
1141 | u32 key; | |
1142 | int access; | |
1143 | }; | |
1144 | ||
1145 | static inline struct ib_reg_wr *reg_wr(struct ib_send_wr *wr) | |
1146 | { | |
1147 | return container_of(wr, struct ib_reg_wr, wr); | |
1148 | } | |
1149 | ||
e622f2f4 CH |
1150 | struct ib_bind_mw_wr { |
1151 | struct ib_send_wr wr; | |
1152 | struct ib_mw *mw; | |
1153 | /* The new rkey for the memory window. */ | |
1154 | u32 rkey; | |
1155 | struct ib_mw_bind_info bind_info; | |
1156 | }; | |
1157 | ||
1158 | static inline struct ib_bind_mw_wr *bind_mw_wr(struct ib_send_wr *wr) | |
1159 | { | |
1160 | return container_of(wr, struct ib_bind_mw_wr, wr); | |
1161 | } | |
1162 | ||
1163 | struct ib_sig_handover_wr { | |
1164 | struct ib_send_wr wr; | |
1165 | struct ib_sig_attrs *sig_attrs; | |
1166 | struct ib_mr *sig_mr; | |
1167 | int access_flags; | |
1168 | struct ib_sge *prot; | |
1169 | }; | |
1170 | ||
1171 | static inline struct ib_sig_handover_wr *sig_handover_wr(struct ib_send_wr *wr) | |
1172 | { | |
1173 | return container_of(wr, struct ib_sig_handover_wr, wr); | |
1174 | } | |
1175 | ||
1da177e4 LT |
1176 | struct ib_recv_wr { |
1177 | struct ib_recv_wr *next; | |
1178 | u64 wr_id; | |
1179 | struct ib_sge *sg_list; | |
1180 | int num_sge; | |
1181 | }; | |
1182 | ||
1183 | enum ib_access_flags { | |
1184 | IB_ACCESS_LOCAL_WRITE = 1, | |
1185 | IB_ACCESS_REMOTE_WRITE = (1<<1), | |
1186 | IB_ACCESS_REMOTE_READ = (1<<2), | |
1187 | IB_ACCESS_REMOTE_ATOMIC = (1<<3), | |
7083e42e | 1188 | IB_ACCESS_MW_BIND = (1<<4), |
860f10a7 SG |
1189 | IB_ZERO_BASED = (1<<5), |
1190 | IB_ACCESS_ON_DEMAND = (1<<6), | |
1da177e4 LT |
1191 | }; |
1192 | ||
1193 | struct ib_phys_buf { | |
1194 | u64 addr; | |
1195 | u64 size; | |
1196 | }; | |
1197 | ||
1198 | struct ib_mr_attr { | |
1199 | struct ib_pd *pd; | |
1200 | u64 device_virt_addr; | |
1201 | u64 size; | |
1202 | int mr_access_flags; | |
1203 | u32 lkey; | |
1204 | u32 rkey; | |
1205 | }; | |
1206 | ||
1207 | enum ib_mr_rereg_flags { | |
1208 | IB_MR_REREG_TRANS = 1, | |
1209 | IB_MR_REREG_PD = (1<<1), | |
7e6edb9b MB |
1210 | IB_MR_REREG_ACCESS = (1<<2), |
1211 | IB_MR_REREG_SUPPORTED = ((IB_MR_REREG_ACCESS << 1) - 1) | |
1da177e4 LT |
1212 | }; |
1213 | ||
7083e42e SM |
1214 | /** |
1215 | * struct ib_mw_bind - Parameters for a type 1 memory window bind operation. | |
1216 | * @wr_id: Work request id. | |
1217 | * @send_flags: Flags from ib_send_flags enum. | |
1218 | * @bind_info: More parameters of the bind operation. | |
1219 | */ | |
1da177e4 | 1220 | struct ib_mw_bind { |
7083e42e SM |
1221 | u64 wr_id; |
1222 | int send_flags; | |
1223 | struct ib_mw_bind_info bind_info; | |
1da177e4 LT |
1224 | }; |
1225 | ||
1226 | struct ib_fmr_attr { | |
1227 | int max_pages; | |
1228 | int max_maps; | |
d36f34aa | 1229 | u8 page_shift; |
1da177e4 LT |
1230 | }; |
1231 | ||
882214e2 HE |
1232 | struct ib_umem; |
1233 | ||
e2773c06 RD |
1234 | struct ib_ucontext { |
1235 | struct ib_device *device; | |
1236 | struct list_head pd_list; | |
1237 | struct list_head mr_list; | |
1238 | struct list_head mw_list; | |
1239 | struct list_head cq_list; | |
1240 | struct list_head qp_list; | |
1241 | struct list_head srq_list; | |
1242 | struct list_head ah_list; | |
53d0bd1e | 1243 | struct list_head xrcd_list; |
436f2ad0 | 1244 | struct list_head rule_list; |
f7c6a7b5 | 1245 | int closing; |
8ada2c1c SR |
1246 | |
1247 | struct pid *tgid; | |
882214e2 HE |
1248 | #ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING |
1249 | struct rb_root umem_tree; | |
1250 | /* | |
1251 | * Protects .umem_rbroot and tree, as well as odp_mrs_count and | |
1252 | * mmu notifiers registration. | |
1253 | */ | |
1254 | struct rw_semaphore umem_rwsem; | |
1255 | void (*invalidate_range)(struct ib_umem *umem, | |
1256 | unsigned long start, unsigned long end); | |
1257 | ||
1258 | struct mmu_notifier mn; | |
1259 | atomic_t notifier_count; | |
1260 | /* A list of umems that don't have private mmu notifier counters yet. */ | |
1261 | struct list_head no_private_counters; | |
1262 | int odp_mrs_count; | |
1263 | #endif | |
e2773c06 RD |
1264 | }; |
1265 | ||
1266 | struct ib_uobject { | |
1267 | u64 user_handle; /* handle given to us by userspace */ | |
1268 | struct ib_ucontext *context; /* associated user context */ | |
9ead190b | 1269 | void *object; /* containing object */ |
e2773c06 | 1270 | struct list_head list; /* link to context's list */ |
b3d636b0 | 1271 | int id; /* index into kernel idr */ |
9ead190b RD |
1272 | struct kref ref; |
1273 | struct rw_semaphore mutex; /* protects .live */ | |
1274 | int live; | |
e2773c06 RD |
1275 | }; |
1276 | ||
e2773c06 | 1277 | struct ib_udata { |
309243ec | 1278 | const void __user *inbuf; |
e2773c06 RD |
1279 | void __user *outbuf; |
1280 | size_t inlen; | |
1281 | size_t outlen; | |
1282 | }; | |
1283 | ||
1da177e4 | 1284 | struct ib_pd { |
96249d70 | 1285 | u32 local_dma_lkey; |
e2773c06 RD |
1286 | struct ib_device *device; |
1287 | struct ib_uobject *uobject; | |
1288 | atomic_t usecnt; /* count all resources */ | |
96249d70 | 1289 | struct ib_mr *local_mr; |
1da177e4 LT |
1290 | }; |
1291 | ||
59991f94 SH |
1292 | struct ib_xrcd { |
1293 | struct ib_device *device; | |
d3d72d90 | 1294 | atomic_t usecnt; /* count all exposed resources */ |
53d0bd1e | 1295 | struct inode *inode; |
d3d72d90 SH |
1296 | |
1297 | struct mutex tgt_qp_mutex; | |
1298 | struct list_head tgt_qp_list; | |
59991f94 SH |
1299 | }; |
1300 | ||
1da177e4 LT |
1301 | struct ib_ah { |
1302 | struct ib_device *device; | |
1303 | struct ib_pd *pd; | |
e2773c06 | 1304 | struct ib_uobject *uobject; |
1da177e4 LT |
1305 | }; |
1306 | ||
1307 | typedef void (*ib_comp_handler)(struct ib_cq *cq, void *cq_context); | |
1308 | ||
1309 | struct ib_cq { | |
e2773c06 RD |
1310 | struct ib_device *device; |
1311 | struct ib_uobject *uobject; | |
1312 | ib_comp_handler comp_handler; | |
1313 | void (*event_handler)(struct ib_event *, void *); | |
4deccd6d | 1314 | void *cq_context; |
e2773c06 RD |
1315 | int cqe; |
1316 | atomic_t usecnt; /* count number of work queues */ | |
1da177e4 LT |
1317 | }; |
1318 | ||
1319 | struct ib_srq { | |
d41fcc67 RD |
1320 | struct ib_device *device; |
1321 | struct ib_pd *pd; | |
1322 | struct ib_uobject *uobject; | |
1323 | void (*event_handler)(struct ib_event *, void *); | |
1324 | void *srq_context; | |
96104eda | 1325 | enum ib_srq_type srq_type; |
1da177e4 | 1326 | atomic_t usecnt; |
418d5130 SH |
1327 | |
1328 | union { | |
1329 | struct { | |
1330 | struct ib_xrcd *xrcd; | |
1331 | struct ib_cq *cq; | |
1332 | u32 srq_num; | |
1333 | } xrc; | |
1334 | } ext; | |
1da177e4 LT |
1335 | }; |
1336 | ||
1337 | struct ib_qp { | |
1338 | struct ib_device *device; | |
1339 | struct ib_pd *pd; | |
1340 | struct ib_cq *send_cq; | |
1341 | struct ib_cq *recv_cq; | |
1342 | struct ib_srq *srq; | |
b42b63cf | 1343 | struct ib_xrcd *xrcd; /* XRC TGT QPs only */ |
d3d72d90 | 1344 | struct list_head xrcd_list; |
319a441d HHZ |
1345 | /* count times opened, mcast attaches, flow attaches */ |
1346 | atomic_t usecnt; | |
0e0ec7e0 SH |
1347 | struct list_head open_list; |
1348 | struct ib_qp *real_qp; | |
e2773c06 | 1349 | struct ib_uobject *uobject; |
1da177e4 LT |
1350 | void (*event_handler)(struct ib_event *, void *); |
1351 | void *qp_context; | |
1352 | u32 qp_num; | |
1353 | enum ib_qp_type qp_type; | |
1354 | }; | |
1355 | ||
1356 | struct ib_mr { | |
e2773c06 RD |
1357 | struct ib_device *device; |
1358 | struct ib_pd *pd; | |
1359 | struct ib_uobject *uobject; | |
1360 | u32 lkey; | |
1361 | u32 rkey; | |
4c67e2bf SG |
1362 | u64 iova; |
1363 | u32 length; | |
1364 | unsigned int page_size; | |
e2773c06 | 1365 | atomic_t usecnt; /* count number of MWs */ |
1da177e4 LT |
1366 | }; |
1367 | ||
1368 | struct ib_mw { | |
1369 | struct ib_device *device; | |
1370 | struct ib_pd *pd; | |
e2773c06 | 1371 | struct ib_uobject *uobject; |
1da177e4 | 1372 | u32 rkey; |
7083e42e | 1373 | enum ib_mw_type type; |
1da177e4 LT |
1374 | }; |
1375 | ||
1376 | struct ib_fmr { | |
1377 | struct ib_device *device; | |
1378 | struct ib_pd *pd; | |
1379 | struct list_head list; | |
1380 | u32 lkey; | |
1381 | u32 rkey; | |
1382 | }; | |
1383 | ||
319a441d HHZ |
1384 | /* Supported steering options */ |
1385 | enum ib_flow_attr_type { | |
1386 | /* steering according to rule specifications */ | |
1387 | IB_FLOW_ATTR_NORMAL = 0x0, | |
1388 | /* default unicast and multicast rule - | |
1389 | * receive all Eth traffic which isn't steered to any QP | |
1390 | */ | |
1391 | IB_FLOW_ATTR_ALL_DEFAULT = 0x1, | |
1392 | /* default multicast rule - | |
1393 | * receive all Eth multicast traffic which isn't steered to any QP | |
1394 | */ | |
1395 | IB_FLOW_ATTR_MC_DEFAULT = 0x2, | |
1396 | /* sniffer rule - receive all port traffic */ | |
1397 | IB_FLOW_ATTR_SNIFFER = 0x3 | |
1398 | }; | |
1399 | ||
1400 | /* Supported steering header types */ | |
1401 | enum ib_flow_spec_type { | |
1402 | /* L2 headers*/ | |
1403 | IB_FLOW_SPEC_ETH = 0x20, | |
240ae00e | 1404 | IB_FLOW_SPEC_IB = 0x22, |
319a441d HHZ |
1405 | /* L3 header*/ |
1406 | IB_FLOW_SPEC_IPV4 = 0x30, | |
1407 | /* L4 headers*/ | |
1408 | IB_FLOW_SPEC_TCP = 0x40, | |
1409 | IB_FLOW_SPEC_UDP = 0x41 | |
1410 | }; | |
240ae00e | 1411 | #define IB_FLOW_SPEC_LAYER_MASK 0xF0 |
22878dbc MB |
1412 | #define IB_FLOW_SPEC_SUPPORT_LAYERS 4 |
1413 | ||
319a441d HHZ |
1414 | /* Flow steering rule priority is set according to it's domain. |
1415 | * Lower domain value means higher priority. | |
1416 | */ | |
1417 | enum ib_flow_domain { | |
1418 | IB_FLOW_DOMAIN_USER, | |
1419 | IB_FLOW_DOMAIN_ETHTOOL, | |
1420 | IB_FLOW_DOMAIN_RFS, | |
1421 | IB_FLOW_DOMAIN_NIC, | |
1422 | IB_FLOW_DOMAIN_NUM /* Must be last */ | |
1423 | }; | |
1424 | ||
1425 | struct ib_flow_eth_filter { | |
1426 | u8 dst_mac[6]; | |
1427 | u8 src_mac[6]; | |
1428 | __be16 ether_type; | |
1429 | __be16 vlan_tag; | |
1430 | }; | |
1431 | ||
1432 | struct ib_flow_spec_eth { | |
1433 | enum ib_flow_spec_type type; | |
1434 | u16 size; | |
1435 | struct ib_flow_eth_filter val; | |
1436 | struct ib_flow_eth_filter mask; | |
1437 | }; | |
1438 | ||
240ae00e MB |
1439 | struct ib_flow_ib_filter { |
1440 | __be16 dlid; | |
1441 | __u8 sl; | |
1442 | }; | |
1443 | ||
1444 | struct ib_flow_spec_ib { | |
1445 | enum ib_flow_spec_type type; | |
1446 | u16 size; | |
1447 | struct ib_flow_ib_filter val; | |
1448 | struct ib_flow_ib_filter mask; | |
1449 | }; | |
1450 | ||
319a441d HHZ |
1451 | struct ib_flow_ipv4_filter { |
1452 | __be32 src_ip; | |
1453 | __be32 dst_ip; | |
1454 | }; | |
1455 | ||
1456 | struct ib_flow_spec_ipv4 { | |
1457 | enum ib_flow_spec_type type; | |
1458 | u16 size; | |
1459 | struct ib_flow_ipv4_filter val; | |
1460 | struct ib_flow_ipv4_filter mask; | |
1461 | }; | |
1462 | ||
1463 | struct ib_flow_tcp_udp_filter { | |
1464 | __be16 dst_port; | |
1465 | __be16 src_port; | |
1466 | }; | |
1467 | ||
1468 | struct ib_flow_spec_tcp_udp { | |
1469 | enum ib_flow_spec_type type; | |
1470 | u16 size; | |
1471 | struct ib_flow_tcp_udp_filter val; | |
1472 | struct ib_flow_tcp_udp_filter mask; | |
1473 | }; | |
1474 | ||
1475 | union ib_flow_spec { | |
1476 | struct { | |
1477 | enum ib_flow_spec_type type; | |
1478 | u16 size; | |
1479 | }; | |
1480 | struct ib_flow_spec_eth eth; | |
240ae00e | 1481 | struct ib_flow_spec_ib ib; |
319a441d HHZ |
1482 | struct ib_flow_spec_ipv4 ipv4; |
1483 | struct ib_flow_spec_tcp_udp tcp_udp; | |
1484 | }; | |
1485 | ||
1486 | struct ib_flow_attr { | |
1487 | enum ib_flow_attr_type type; | |
1488 | u16 size; | |
1489 | u16 priority; | |
1490 | u32 flags; | |
1491 | u8 num_of_specs; | |
1492 | u8 port; | |
1493 | /* Following are the optional layers according to user request | |
1494 | * struct ib_flow_spec_xxx | |
1495 | * struct ib_flow_spec_yyy | |
1496 | */ | |
1497 | }; | |
1498 | ||
1499 | struct ib_flow { | |
1500 | struct ib_qp *qp; | |
1501 | struct ib_uobject *uobject; | |
1502 | }; | |
1503 | ||
4cd7c947 | 1504 | struct ib_mad_hdr; |
1da177e4 LT |
1505 | struct ib_grh; |
1506 | ||
1507 | enum ib_process_mad_flags { | |
1508 | IB_MAD_IGNORE_MKEY = 1, | |
1509 | IB_MAD_IGNORE_BKEY = 2, | |
1510 | IB_MAD_IGNORE_ALL = IB_MAD_IGNORE_MKEY | IB_MAD_IGNORE_BKEY | |
1511 | }; | |
1512 | ||
1513 | enum ib_mad_result { | |
1514 | IB_MAD_RESULT_FAILURE = 0, /* (!SUCCESS is the important flag) */ | |
1515 | IB_MAD_RESULT_SUCCESS = 1 << 0, /* MAD was successfully processed */ | |
1516 | IB_MAD_RESULT_REPLY = 1 << 1, /* Reply packet needs to be sent */ | |
1517 | IB_MAD_RESULT_CONSUMED = 1 << 2 /* Packet consumed: stop processing */ | |
1518 | }; | |
1519 | ||
1520 | #define IB_DEVICE_NAME_MAX 64 | |
1521 | ||
1522 | struct ib_cache { | |
1523 | rwlock_t lock; | |
1524 | struct ib_event_handler event_handler; | |
1525 | struct ib_pkey_cache **pkey_cache; | |
03db3a2d | 1526 | struct ib_gid_table **gid_cache; |
6fb9cdbf | 1527 | u8 *lmc_cache; |
1da177e4 LT |
1528 | }; |
1529 | ||
9b513090 RC |
1530 | struct ib_dma_mapping_ops { |
1531 | int (*mapping_error)(struct ib_device *dev, | |
1532 | u64 dma_addr); | |
1533 | u64 (*map_single)(struct ib_device *dev, | |
1534 | void *ptr, size_t size, | |
1535 | enum dma_data_direction direction); | |
1536 | void (*unmap_single)(struct ib_device *dev, | |
1537 | u64 addr, size_t size, | |
1538 | enum dma_data_direction direction); | |
1539 | u64 (*map_page)(struct ib_device *dev, | |
1540 | struct page *page, unsigned long offset, | |
1541 | size_t size, | |
1542 | enum dma_data_direction direction); | |
1543 | void (*unmap_page)(struct ib_device *dev, | |
1544 | u64 addr, size_t size, | |
1545 | enum dma_data_direction direction); | |
1546 | int (*map_sg)(struct ib_device *dev, | |
1547 | struct scatterlist *sg, int nents, | |
1548 | enum dma_data_direction direction); | |
1549 | void (*unmap_sg)(struct ib_device *dev, | |
1550 | struct scatterlist *sg, int nents, | |
1551 | enum dma_data_direction direction); | |
9b513090 RC |
1552 | void (*sync_single_for_cpu)(struct ib_device *dev, |
1553 | u64 dma_handle, | |
1554 | size_t size, | |
4deccd6d | 1555 | enum dma_data_direction dir); |
9b513090 RC |
1556 | void (*sync_single_for_device)(struct ib_device *dev, |
1557 | u64 dma_handle, | |
1558 | size_t size, | |
1559 | enum dma_data_direction dir); | |
1560 | void *(*alloc_coherent)(struct ib_device *dev, | |
1561 | size_t size, | |
1562 | u64 *dma_handle, | |
1563 | gfp_t flag); | |
1564 | void (*free_coherent)(struct ib_device *dev, | |
1565 | size_t size, void *cpu_addr, | |
1566 | u64 dma_handle); | |
1567 | }; | |
1568 | ||
07ebafba TT |
1569 | struct iw_cm_verbs; |
1570 | ||
7738613e IW |
1571 | struct ib_port_immutable { |
1572 | int pkey_tbl_len; | |
1573 | int gid_tbl_len; | |
f9b22e35 | 1574 | u32 core_cap_flags; |
337877a4 | 1575 | u32 max_mad_size; |
7738613e IW |
1576 | }; |
1577 | ||
1da177e4 LT |
1578 | struct ib_device { |
1579 | struct device *dma_device; | |
1580 | ||
1581 | char name[IB_DEVICE_NAME_MAX]; | |
1582 | ||
1583 | struct list_head event_handler_list; | |
1584 | spinlock_t event_handler_lock; | |
1585 | ||
17a55f79 | 1586 | spinlock_t client_data_lock; |
1da177e4 | 1587 | struct list_head core_list; |
7c1eb45a HE |
1588 | /* Access to the client_data_list is protected by the client_data_lock |
1589 | * spinlock and the lists_rwsem read-write semaphore */ | |
1da177e4 | 1590 | struct list_head client_data_list; |
1da177e4 LT |
1591 | |
1592 | struct ib_cache cache; | |
7738613e IW |
1593 | /** |
1594 | * port_immutable is indexed by port number | |
1595 | */ | |
1596 | struct ib_port_immutable *port_immutable; | |
1da177e4 | 1597 | |
f4fd0b22 MT |
1598 | int num_comp_vectors; |
1599 | ||
07ebafba TT |
1600 | struct iw_cm_verbs *iwcm; |
1601 | ||
7f624d02 SW |
1602 | int (*get_protocol_stats)(struct ib_device *device, |
1603 | union rdma_protocol_stats *stats); | |
1da177e4 | 1604 | int (*query_device)(struct ib_device *device, |
2528e33e MB |
1605 | struct ib_device_attr *device_attr, |
1606 | struct ib_udata *udata); | |
1da177e4 LT |
1607 | int (*query_port)(struct ib_device *device, |
1608 | u8 port_num, | |
1609 | struct ib_port_attr *port_attr); | |
a3f5adaf EC |
1610 | enum rdma_link_layer (*get_link_layer)(struct ib_device *device, |
1611 | u8 port_num); | |
03db3a2d MB |
1612 | /* When calling get_netdev, the HW vendor's driver should return the |
1613 | * net device of device @device at port @port_num or NULL if such | |
1614 | * a net device doesn't exist. The vendor driver should call dev_hold | |
1615 | * on this net device. The HW vendor's device driver must guarantee | |
1616 | * that this function returns NULL before the net device reaches | |
1617 | * NETDEV_UNREGISTER_FINAL state. | |
1618 | */ | |
1619 | struct net_device *(*get_netdev)(struct ib_device *device, | |
1620 | u8 port_num); | |
1da177e4 LT |
1621 | int (*query_gid)(struct ib_device *device, |
1622 | u8 port_num, int index, | |
1623 | union ib_gid *gid); | |
03db3a2d MB |
1624 | /* When calling add_gid, the HW vendor's driver should |
1625 | * add the gid of device @device at gid index @index of | |
1626 | * port @port_num to be @gid. Meta-info of that gid (for example, | |
1627 | * the network device related to this gid is available | |
1628 | * at @attr. @context allows the HW vendor driver to store extra | |
1629 | * information together with a GID entry. The HW vendor may allocate | |
1630 | * memory to contain this information and store it in @context when a | |
1631 | * new GID entry is written to. Params are consistent until the next | |
1632 | * call of add_gid or delete_gid. The function should return 0 on | |
1633 | * success or error otherwise. The function could be called | |
1634 | * concurrently for different ports. This function is only called | |
1635 | * when roce_gid_table is used. | |
1636 | */ | |
1637 | int (*add_gid)(struct ib_device *device, | |
1638 | u8 port_num, | |
1639 | unsigned int index, | |
1640 | const union ib_gid *gid, | |
1641 | const struct ib_gid_attr *attr, | |
1642 | void **context); | |
1643 | /* When calling del_gid, the HW vendor's driver should delete the | |
1644 | * gid of device @device at gid index @index of port @port_num. | |
1645 | * Upon the deletion of a GID entry, the HW vendor must free any | |
1646 | * allocated memory. The caller will clear @context afterwards. | |
1647 | * This function is only called when roce_gid_table is used. | |
1648 | */ | |
1649 | int (*del_gid)(struct ib_device *device, | |
1650 | u8 port_num, | |
1651 | unsigned int index, | |
1652 | void **context); | |
1da177e4 LT |
1653 | int (*query_pkey)(struct ib_device *device, |
1654 | u8 port_num, u16 index, u16 *pkey); | |
1655 | int (*modify_device)(struct ib_device *device, | |
1656 | int device_modify_mask, | |
1657 | struct ib_device_modify *device_modify); | |
1658 | int (*modify_port)(struct ib_device *device, | |
1659 | u8 port_num, int port_modify_mask, | |
1660 | struct ib_port_modify *port_modify); | |
e2773c06 RD |
1661 | struct ib_ucontext * (*alloc_ucontext)(struct ib_device *device, |
1662 | struct ib_udata *udata); | |
1663 | int (*dealloc_ucontext)(struct ib_ucontext *context); | |
1664 | int (*mmap)(struct ib_ucontext *context, | |
1665 | struct vm_area_struct *vma); | |
1666 | struct ib_pd * (*alloc_pd)(struct ib_device *device, | |
1667 | struct ib_ucontext *context, | |
1668 | struct ib_udata *udata); | |
1da177e4 LT |
1669 | int (*dealloc_pd)(struct ib_pd *pd); |
1670 | struct ib_ah * (*create_ah)(struct ib_pd *pd, | |
1671 | struct ib_ah_attr *ah_attr); | |
1672 | int (*modify_ah)(struct ib_ah *ah, | |
1673 | struct ib_ah_attr *ah_attr); | |
1674 | int (*query_ah)(struct ib_ah *ah, | |
1675 | struct ib_ah_attr *ah_attr); | |
1676 | int (*destroy_ah)(struct ib_ah *ah); | |
d41fcc67 RD |
1677 | struct ib_srq * (*create_srq)(struct ib_pd *pd, |
1678 | struct ib_srq_init_attr *srq_init_attr, | |
1679 | struct ib_udata *udata); | |
1680 | int (*modify_srq)(struct ib_srq *srq, | |
1681 | struct ib_srq_attr *srq_attr, | |
9bc57e2d RC |
1682 | enum ib_srq_attr_mask srq_attr_mask, |
1683 | struct ib_udata *udata); | |
d41fcc67 RD |
1684 | int (*query_srq)(struct ib_srq *srq, |
1685 | struct ib_srq_attr *srq_attr); | |
1686 | int (*destroy_srq)(struct ib_srq *srq); | |
1687 | int (*post_srq_recv)(struct ib_srq *srq, | |
1688 | struct ib_recv_wr *recv_wr, | |
1689 | struct ib_recv_wr **bad_recv_wr); | |
1da177e4 | 1690 | struct ib_qp * (*create_qp)(struct ib_pd *pd, |
e2773c06 RD |
1691 | struct ib_qp_init_attr *qp_init_attr, |
1692 | struct ib_udata *udata); | |
1da177e4 LT |
1693 | int (*modify_qp)(struct ib_qp *qp, |
1694 | struct ib_qp_attr *qp_attr, | |
9bc57e2d RC |
1695 | int qp_attr_mask, |
1696 | struct ib_udata *udata); | |
1da177e4 LT |
1697 | int (*query_qp)(struct ib_qp *qp, |
1698 | struct ib_qp_attr *qp_attr, | |
1699 | int qp_attr_mask, | |
1700 | struct ib_qp_init_attr *qp_init_attr); | |
1701 | int (*destroy_qp)(struct ib_qp *qp); | |
1702 | int (*post_send)(struct ib_qp *qp, | |
1703 | struct ib_send_wr *send_wr, | |
1704 | struct ib_send_wr **bad_send_wr); | |
1705 | int (*post_recv)(struct ib_qp *qp, | |
1706 | struct ib_recv_wr *recv_wr, | |
1707 | struct ib_recv_wr **bad_recv_wr); | |
bcf4c1ea MB |
1708 | struct ib_cq * (*create_cq)(struct ib_device *device, |
1709 | const struct ib_cq_init_attr *attr, | |
e2773c06 RD |
1710 | struct ib_ucontext *context, |
1711 | struct ib_udata *udata); | |
2dd57162 EC |
1712 | int (*modify_cq)(struct ib_cq *cq, u16 cq_count, |
1713 | u16 cq_period); | |
1da177e4 | 1714 | int (*destroy_cq)(struct ib_cq *cq); |
33b9b3ee RD |
1715 | int (*resize_cq)(struct ib_cq *cq, int cqe, |
1716 | struct ib_udata *udata); | |
1da177e4 LT |
1717 | int (*poll_cq)(struct ib_cq *cq, int num_entries, |
1718 | struct ib_wc *wc); | |
1719 | int (*peek_cq)(struct ib_cq *cq, int wc_cnt); | |
1720 | int (*req_notify_cq)(struct ib_cq *cq, | |
ed23a727 | 1721 | enum ib_cq_notify_flags flags); |
1da177e4 LT |
1722 | int (*req_ncomp_notif)(struct ib_cq *cq, |
1723 | int wc_cnt); | |
1724 | struct ib_mr * (*get_dma_mr)(struct ib_pd *pd, | |
1725 | int mr_access_flags); | |
1726 | struct ib_mr * (*reg_phys_mr)(struct ib_pd *pd, | |
1727 | struct ib_phys_buf *phys_buf_array, | |
1728 | int num_phys_buf, | |
1729 | int mr_access_flags, | |
1730 | u64 *iova_start); | |
e2773c06 | 1731 | struct ib_mr * (*reg_user_mr)(struct ib_pd *pd, |
f7c6a7b5 RD |
1732 | u64 start, u64 length, |
1733 | u64 virt_addr, | |
e2773c06 RD |
1734 | int mr_access_flags, |
1735 | struct ib_udata *udata); | |
7e6edb9b MB |
1736 | int (*rereg_user_mr)(struct ib_mr *mr, |
1737 | int flags, | |
1738 | u64 start, u64 length, | |
1739 | u64 virt_addr, | |
1740 | int mr_access_flags, | |
1741 | struct ib_pd *pd, | |
1742 | struct ib_udata *udata); | |
1da177e4 LT |
1743 | int (*query_mr)(struct ib_mr *mr, |
1744 | struct ib_mr_attr *mr_attr); | |
1745 | int (*dereg_mr)(struct ib_mr *mr); | |
9bee178b SG |
1746 | struct ib_mr * (*alloc_mr)(struct ib_pd *pd, |
1747 | enum ib_mr_type mr_type, | |
1748 | u32 max_num_sg); | |
4c67e2bf SG |
1749 | int (*map_mr_sg)(struct ib_mr *mr, |
1750 | struct scatterlist *sg, | |
1751 | int sg_nents); | |
1da177e4 LT |
1752 | int (*rereg_phys_mr)(struct ib_mr *mr, |
1753 | int mr_rereg_mask, | |
1754 | struct ib_pd *pd, | |
1755 | struct ib_phys_buf *phys_buf_array, | |
1756 | int num_phys_buf, | |
1757 | int mr_access_flags, | |
1758 | u64 *iova_start); | |
7083e42e SM |
1759 | struct ib_mw * (*alloc_mw)(struct ib_pd *pd, |
1760 | enum ib_mw_type type); | |
1da177e4 LT |
1761 | int (*bind_mw)(struct ib_qp *qp, |
1762 | struct ib_mw *mw, | |
1763 | struct ib_mw_bind *mw_bind); | |
1764 | int (*dealloc_mw)(struct ib_mw *mw); | |
1765 | struct ib_fmr * (*alloc_fmr)(struct ib_pd *pd, | |
1766 | int mr_access_flags, | |
1767 | struct ib_fmr_attr *fmr_attr); | |
1768 | int (*map_phys_fmr)(struct ib_fmr *fmr, | |
1769 | u64 *page_list, int list_len, | |
1770 | u64 iova); | |
1771 | int (*unmap_fmr)(struct list_head *fmr_list); | |
1772 | int (*dealloc_fmr)(struct ib_fmr *fmr); | |
1773 | int (*attach_mcast)(struct ib_qp *qp, | |
1774 | union ib_gid *gid, | |
1775 | u16 lid); | |
1776 | int (*detach_mcast)(struct ib_qp *qp, | |
1777 | union ib_gid *gid, | |
1778 | u16 lid); | |
1779 | int (*process_mad)(struct ib_device *device, | |
1780 | int process_mad_flags, | |
1781 | u8 port_num, | |
a97e2d86 IW |
1782 | const struct ib_wc *in_wc, |
1783 | const struct ib_grh *in_grh, | |
4cd7c947 IW |
1784 | const struct ib_mad_hdr *in_mad, |
1785 | size_t in_mad_size, | |
1786 | struct ib_mad_hdr *out_mad, | |
1787 | size_t *out_mad_size, | |
1788 | u16 *out_mad_pkey_index); | |
59991f94 SH |
1789 | struct ib_xrcd * (*alloc_xrcd)(struct ib_device *device, |
1790 | struct ib_ucontext *ucontext, | |
1791 | struct ib_udata *udata); | |
1792 | int (*dealloc_xrcd)(struct ib_xrcd *xrcd); | |
319a441d HHZ |
1793 | struct ib_flow * (*create_flow)(struct ib_qp *qp, |
1794 | struct ib_flow_attr | |
1795 | *flow_attr, | |
1796 | int domain); | |
1797 | int (*destroy_flow)(struct ib_flow *flow_id); | |
1b01d335 SG |
1798 | int (*check_mr_status)(struct ib_mr *mr, u32 check_mask, |
1799 | struct ib_mr_status *mr_status); | |
036b1063 | 1800 | void (*disassociate_ucontext)(struct ib_ucontext *ibcontext); |
1da177e4 | 1801 | |
9b513090 RC |
1802 | struct ib_dma_mapping_ops *dma_ops; |
1803 | ||
e2773c06 | 1804 | struct module *owner; |
f4e91eb4 | 1805 | struct device dev; |
35be0681 | 1806 | struct kobject *ports_parent; |
1da177e4 LT |
1807 | struct list_head port_list; |
1808 | ||
1809 | enum { | |
1810 | IB_DEV_UNINITIALIZED, | |
1811 | IB_DEV_REGISTERED, | |
1812 | IB_DEV_UNREGISTERED | |
1813 | } reg_state; | |
1814 | ||
274c0891 | 1815 | int uverbs_abi_ver; |
17a55f79 | 1816 | u64 uverbs_cmd_mask; |
f21519b2 | 1817 | u64 uverbs_ex_cmd_mask; |
274c0891 | 1818 | |
c5bcbbb9 | 1819 | char node_desc[64]; |
cf311cd4 | 1820 | __be64 node_guid; |
96f15c03 | 1821 | u32 local_dma_lkey; |
4139032b | 1822 | u16 is_switch:1; |
1da177e4 LT |
1823 | u8 node_type; |
1824 | u8 phys_port_cnt; | |
7738613e IW |
1825 | |
1826 | /** | |
1827 | * The following mandatory functions are used only at device | |
1828 | * registration. Keep functions such as these at the end of this | |
1829 | * structure to avoid cache line misses when accessing struct ib_device | |
1830 | * in fast paths. | |
1831 | */ | |
1832 | int (*get_port_immutable)(struct ib_device *, u8, struct ib_port_immutable *); | |
1da177e4 LT |
1833 | }; |
1834 | ||
1835 | struct ib_client { | |
1836 | char *name; | |
1837 | void (*add) (struct ib_device *); | |
7c1eb45a | 1838 | void (*remove)(struct ib_device *, void *client_data); |
1da177e4 | 1839 | |
9268f72d YK |
1840 | /* Returns the net_dev belonging to this ib_client and matching the |
1841 | * given parameters. | |
1842 | * @dev: An RDMA device that the net_dev use for communication. | |
1843 | * @port: A physical port number on the RDMA device. | |
1844 | * @pkey: P_Key that the net_dev uses if applicable. | |
1845 | * @gid: A GID that the net_dev uses to communicate. | |
1846 | * @addr: An IP address the net_dev is configured with. | |
1847 | * @client_data: The device's client data set by ib_set_client_data(). | |
1848 | * | |
1849 | * An ib_client that implements a net_dev on top of RDMA devices | |
1850 | * (such as IP over IB) should implement this callback, allowing the | |
1851 | * rdma_cm module to find the right net_dev for a given request. | |
1852 | * | |
1853 | * The caller is responsible for calling dev_put on the returned | |
1854 | * netdev. */ | |
1855 | struct net_device *(*get_net_dev_by_params)( | |
1856 | struct ib_device *dev, | |
1857 | u8 port, | |
1858 | u16 pkey, | |
1859 | const union ib_gid *gid, | |
1860 | const struct sockaddr *addr, | |
1861 | void *client_data); | |
1da177e4 LT |
1862 | struct list_head list; |
1863 | }; | |
1864 | ||
1865 | struct ib_device *ib_alloc_device(size_t size); | |
1866 | void ib_dealloc_device(struct ib_device *device); | |
1867 | ||
9a6edb60 RC |
1868 | int ib_register_device(struct ib_device *device, |
1869 | int (*port_callback)(struct ib_device *, | |
1870 | u8, struct kobject *)); | |
1da177e4 LT |
1871 | void ib_unregister_device(struct ib_device *device); |
1872 | ||
1873 | int ib_register_client (struct ib_client *client); | |
1874 | void ib_unregister_client(struct ib_client *client); | |
1875 | ||
1876 | void *ib_get_client_data(struct ib_device *device, struct ib_client *client); | |
1877 | void ib_set_client_data(struct ib_device *device, struct ib_client *client, | |
1878 | void *data); | |
1879 | ||
e2773c06 RD |
1880 | static inline int ib_copy_from_udata(void *dest, struct ib_udata *udata, size_t len) |
1881 | { | |
1882 | return copy_from_user(dest, udata->inbuf, len) ? -EFAULT : 0; | |
1883 | } | |
1884 | ||
1885 | static inline int ib_copy_to_udata(struct ib_udata *udata, void *src, size_t len) | |
1886 | { | |
43c61165 | 1887 | return copy_to_user(udata->outbuf, src, len) ? -EFAULT : 0; |
e2773c06 RD |
1888 | } |
1889 | ||
8a51866f RD |
1890 | /** |
1891 | * ib_modify_qp_is_ok - Check that the supplied attribute mask | |
1892 | * contains all required attributes and no attributes not allowed for | |
1893 | * the given QP state transition. | |
1894 | * @cur_state: Current QP state | |
1895 | * @next_state: Next QP state | |
1896 | * @type: QP type | |
1897 | * @mask: Mask of supplied QP attributes | |
dd5f03be | 1898 | * @ll : link layer of port |
8a51866f RD |
1899 | * |
1900 | * This function is a helper function that a low-level driver's | |
1901 | * modify_qp method can use to validate the consumer's input. It | |
1902 | * checks that cur_state and next_state are valid QP states, that a | |
1903 | * transition from cur_state to next_state is allowed by the IB spec, | |
1904 | * and that the attribute mask supplied is allowed for the transition. | |
1905 | */ | |
1906 | int ib_modify_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state next_state, | |
dd5f03be MB |
1907 | enum ib_qp_type type, enum ib_qp_attr_mask mask, |
1908 | enum rdma_link_layer ll); | |
8a51866f | 1909 | |
1da177e4 LT |
1910 | int ib_register_event_handler (struct ib_event_handler *event_handler); |
1911 | int ib_unregister_event_handler(struct ib_event_handler *event_handler); | |
1912 | void ib_dispatch_event(struct ib_event *event); | |
1913 | ||
1914 | int ib_query_device(struct ib_device *device, | |
1915 | struct ib_device_attr *device_attr); | |
1916 | ||
1917 | int ib_query_port(struct ib_device *device, | |
1918 | u8 port_num, struct ib_port_attr *port_attr); | |
1919 | ||
a3f5adaf EC |
1920 | enum rdma_link_layer rdma_port_get_link_layer(struct ib_device *device, |
1921 | u8 port_num); | |
1922 | ||
4139032b HR |
1923 | /** |
1924 | * rdma_cap_ib_switch - Check if the device is IB switch | |
1925 | * @device: Device to check | |
1926 | * | |
1927 | * Device driver is responsible for setting is_switch bit on | |
1928 | * in ib_device structure at init time. | |
1929 | * | |
1930 | * Return: true if the device is IB switch. | |
1931 | */ | |
1932 | static inline bool rdma_cap_ib_switch(const struct ib_device *device) | |
1933 | { | |
1934 | return device->is_switch; | |
1935 | } | |
1936 | ||
0cf18d77 IW |
1937 | /** |
1938 | * rdma_start_port - Return the first valid port number for the device | |
1939 | * specified | |
1940 | * | |
1941 | * @device: Device to be checked | |
1942 | * | |
1943 | * Return start port number | |
1944 | */ | |
1945 | static inline u8 rdma_start_port(const struct ib_device *device) | |
1946 | { | |
4139032b | 1947 | return rdma_cap_ib_switch(device) ? 0 : 1; |
0cf18d77 IW |
1948 | } |
1949 | ||
1950 | /** | |
1951 | * rdma_end_port - Return the last valid port number for the device | |
1952 | * specified | |
1953 | * | |
1954 | * @device: Device to be checked | |
1955 | * | |
1956 | * Return last port number | |
1957 | */ | |
1958 | static inline u8 rdma_end_port(const struct ib_device *device) | |
1959 | { | |
4139032b | 1960 | return rdma_cap_ib_switch(device) ? 0 : device->phys_port_cnt; |
0cf18d77 IW |
1961 | } |
1962 | ||
5ede9289 | 1963 | static inline bool rdma_protocol_ib(const struct ib_device *device, u8 port_num) |
de66be94 | 1964 | { |
f9b22e35 | 1965 | return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_PROT_IB; |
de66be94 MW |
1966 | } |
1967 | ||
5ede9289 | 1968 | static inline bool rdma_protocol_roce(const struct ib_device *device, u8 port_num) |
de66be94 | 1969 | { |
f9b22e35 | 1970 | return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_PROT_ROCE; |
de66be94 MW |
1971 | } |
1972 | ||
5ede9289 | 1973 | static inline bool rdma_protocol_iwarp(const struct ib_device *device, u8 port_num) |
de66be94 | 1974 | { |
f9b22e35 | 1975 | return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_PROT_IWARP; |
de66be94 MW |
1976 | } |
1977 | ||
5ede9289 | 1978 | static inline bool rdma_ib_or_roce(const struct ib_device *device, u8 port_num) |
de66be94 | 1979 | { |
f9b22e35 IW |
1980 | return device->port_immutable[port_num].core_cap_flags & |
1981 | (RDMA_CORE_CAP_PROT_IB | RDMA_CORE_CAP_PROT_ROCE); | |
de66be94 MW |
1982 | } |
1983 | ||
c757dea8 | 1984 | /** |
296ec009 | 1985 | * rdma_cap_ib_mad - Check if the port of a device supports Infiniband |
c757dea8 | 1986 | * Management Datagrams. |
296ec009 MW |
1987 | * @device: Device to check |
1988 | * @port_num: Port number to check | |
c757dea8 | 1989 | * |
296ec009 MW |
1990 | * Management Datagrams (MAD) are a required part of the InfiniBand |
1991 | * specification and are supported on all InfiniBand devices. A slightly | |
1992 | * extended version are also supported on OPA interfaces. | |
c757dea8 | 1993 | * |
296ec009 | 1994 | * Return: true if the port supports sending/receiving of MAD packets. |
c757dea8 | 1995 | */ |
5ede9289 | 1996 | static inline bool rdma_cap_ib_mad(const struct ib_device *device, u8 port_num) |
c757dea8 | 1997 | { |
f9b22e35 | 1998 | return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IB_MAD; |
c757dea8 MW |
1999 | } |
2000 | ||
65995fee IW |
2001 | /** |
2002 | * rdma_cap_opa_mad - Check if the port of device provides support for OPA | |
2003 | * Management Datagrams. | |
2004 | * @device: Device to check | |
2005 | * @port_num: Port number to check | |
2006 | * | |
2007 | * Intel OmniPath devices extend and/or replace the InfiniBand Management | |
2008 | * datagrams with their own versions. These OPA MADs share many but not all of | |
2009 | * the characteristics of InfiniBand MADs. | |
2010 | * | |
2011 | * OPA MADs differ in the following ways: | |
2012 | * | |
2013 | * 1) MADs are variable size up to 2K | |
2014 | * IBTA defined MADs remain fixed at 256 bytes | |
2015 | * 2) OPA SMPs must carry valid PKeys | |
2016 | * 3) OPA SMP packets are a different format | |
2017 | * | |
2018 | * Return: true if the port supports OPA MAD packet formats. | |
2019 | */ | |
2020 | static inline bool rdma_cap_opa_mad(struct ib_device *device, u8 port_num) | |
2021 | { | |
2022 | return (device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_OPA_MAD) | |
2023 | == RDMA_CORE_CAP_OPA_MAD; | |
2024 | } | |
2025 | ||
29541e3a | 2026 | /** |
296ec009 MW |
2027 | * rdma_cap_ib_smi - Check if the port of a device provides an Infiniband |
2028 | * Subnet Management Agent (SMA) on the Subnet Management Interface (SMI). | |
2029 | * @device: Device to check | |
2030 | * @port_num: Port number to check | |
29541e3a | 2031 | * |
296ec009 MW |
2032 | * Each InfiniBand node is required to provide a Subnet Management Agent |
2033 | * that the subnet manager can access. Prior to the fabric being fully | |
2034 | * configured by the subnet manager, the SMA is accessed via a well known | |
2035 | * interface called the Subnet Management Interface (SMI). This interface | |
2036 | * uses directed route packets to communicate with the SM to get around the | |
2037 | * chicken and egg problem of the SM needing to know what's on the fabric | |
2038 | * in order to configure the fabric, and needing to configure the fabric in | |
2039 | * order to send packets to the devices on the fabric. These directed | |
2040 | * route packets do not need the fabric fully configured in order to reach | |
2041 | * their destination. The SMI is the only method allowed to send | |
2042 | * directed route packets on an InfiniBand fabric. | |
29541e3a | 2043 | * |
296ec009 | 2044 | * Return: true if the port provides an SMI. |
29541e3a | 2045 | */ |
5ede9289 | 2046 | static inline bool rdma_cap_ib_smi(const struct ib_device *device, u8 port_num) |
29541e3a | 2047 | { |
f9b22e35 | 2048 | return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IB_SMI; |
29541e3a MW |
2049 | } |
2050 | ||
72219cea MW |
2051 | /** |
2052 | * rdma_cap_ib_cm - Check if the port of device has the capability Infiniband | |
2053 | * Communication Manager. | |
296ec009 MW |
2054 | * @device: Device to check |
2055 | * @port_num: Port number to check | |
72219cea | 2056 | * |
296ec009 MW |
2057 | * The InfiniBand Communication Manager is one of many pre-defined General |
2058 | * Service Agents (GSA) that are accessed via the General Service | |
2059 | * Interface (GSI). It's role is to facilitate establishment of connections | |
2060 | * between nodes as well as other management related tasks for established | |
2061 | * connections. | |
72219cea | 2062 | * |
296ec009 MW |
2063 | * Return: true if the port supports an IB CM (this does not guarantee that |
2064 | * a CM is actually running however). | |
72219cea | 2065 | */ |
5ede9289 | 2066 | static inline bool rdma_cap_ib_cm(const struct ib_device *device, u8 port_num) |
72219cea | 2067 | { |
f9b22e35 | 2068 | return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IB_CM; |
72219cea MW |
2069 | } |
2070 | ||
04215330 MW |
2071 | /** |
2072 | * rdma_cap_iw_cm - Check if the port of device has the capability IWARP | |
2073 | * Communication Manager. | |
296ec009 MW |
2074 | * @device: Device to check |
2075 | * @port_num: Port number to check | |
04215330 | 2076 | * |
296ec009 MW |
2077 | * Similar to above, but specific to iWARP connections which have a different |
2078 | * managment protocol than InfiniBand. | |
04215330 | 2079 | * |
296ec009 MW |
2080 | * Return: true if the port supports an iWARP CM (this does not guarantee that |
2081 | * a CM is actually running however). | |
04215330 | 2082 | */ |
5ede9289 | 2083 | static inline bool rdma_cap_iw_cm(const struct ib_device *device, u8 port_num) |
04215330 | 2084 | { |
f9b22e35 | 2085 | return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IW_CM; |
04215330 MW |
2086 | } |
2087 | ||
fe53ba2f MW |
2088 | /** |
2089 | * rdma_cap_ib_sa - Check if the port of device has the capability Infiniband | |
2090 | * Subnet Administration. | |
296ec009 MW |
2091 | * @device: Device to check |
2092 | * @port_num: Port number to check | |
fe53ba2f | 2093 | * |
296ec009 MW |
2094 | * An InfiniBand Subnet Administration (SA) service is a pre-defined General |
2095 | * Service Agent (GSA) provided by the Subnet Manager (SM). On InfiniBand | |
2096 | * fabrics, devices should resolve routes to other hosts by contacting the | |
2097 | * SA to query the proper route. | |
fe53ba2f | 2098 | * |
296ec009 MW |
2099 | * Return: true if the port should act as a client to the fabric Subnet |
2100 | * Administration interface. This does not imply that the SA service is | |
2101 | * running locally. | |
fe53ba2f | 2102 | */ |
5ede9289 | 2103 | static inline bool rdma_cap_ib_sa(const struct ib_device *device, u8 port_num) |
fe53ba2f | 2104 | { |
f9b22e35 | 2105 | return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IB_SA; |
fe53ba2f MW |
2106 | } |
2107 | ||
a31ad3b0 MW |
2108 | /** |
2109 | * rdma_cap_ib_mcast - Check if the port of device has the capability Infiniband | |
2110 | * Multicast. | |
296ec009 MW |
2111 | * @device: Device to check |
2112 | * @port_num: Port number to check | |
a31ad3b0 | 2113 | * |
296ec009 MW |
2114 | * InfiniBand multicast registration is more complex than normal IPv4 or |
2115 | * IPv6 multicast registration. Each Host Channel Adapter must register | |
2116 | * with the Subnet Manager when it wishes to join a multicast group. It | |
2117 | * should do so only once regardless of how many queue pairs it subscribes | |
2118 | * to this group. And it should leave the group only after all queue pairs | |
2119 | * attached to the group have been detached. | |
a31ad3b0 | 2120 | * |
296ec009 MW |
2121 | * Return: true if the port must undertake the additional adminstrative |
2122 | * overhead of registering/unregistering with the SM and tracking of the | |
2123 | * total number of queue pairs attached to the multicast group. | |
a31ad3b0 | 2124 | */ |
5ede9289 | 2125 | static inline bool rdma_cap_ib_mcast(const struct ib_device *device, u8 port_num) |
a31ad3b0 MW |
2126 | { |
2127 | return rdma_cap_ib_sa(device, port_num); | |
2128 | } | |
2129 | ||
30a74ef4 MW |
2130 | /** |
2131 | * rdma_cap_af_ib - Check if the port of device has the capability | |
2132 | * Native Infiniband Address. | |
296ec009 MW |
2133 | * @device: Device to check |
2134 | * @port_num: Port number to check | |
30a74ef4 | 2135 | * |
296ec009 MW |
2136 | * InfiniBand addressing uses a port's GUID + Subnet Prefix to make a default |
2137 | * GID. RoCE uses a different mechanism, but still generates a GID via | |
2138 | * a prescribed mechanism and port specific data. | |
30a74ef4 | 2139 | * |
296ec009 MW |
2140 | * Return: true if the port uses a GID address to identify devices on the |
2141 | * network. | |
30a74ef4 | 2142 | */ |
5ede9289 | 2143 | static inline bool rdma_cap_af_ib(const struct ib_device *device, u8 port_num) |
30a74ef4 | 2144 | { |
f9b22e35 | 2145 | return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_AF_IB; |
30a74ef4 MW |
2146 | } |
2147 | ||
227128fc MW |
2148 | /** |
2149 | * rdma_cap_eth_ah - Check if the port of device has the capability | |
296ec009 MW |
2150 | * Ethernet Address Handle. |
2151 | * @device: Device to check | |
2152 | * @port_num: Port number to check | |
227128fc | 2153 | * |
296ec009 MW |
2154 | * RoCE is InfiniBand over Ethernet, and it uses a well defined technique |
2155 | * to fabricate GIDs over Ethernet/IP specific addresses native to the | |
2156 | * port. Normally, packet headers are generated by the sending host | |
2157 | * adapter, but when sending connectionless datagrams, we must manually | |
2158 | * inject the proper headers for the fabric we are communicating over. | |
227128fc | 2159 | * |
296ec009 MW |
2160 | * Return: true if we are running as a RoCE port and must force the |
2161 | * addition of a Global Route Header built from our Ethernet Address | |
2162 | * Handle into our header list for connectionless packets. | |
227128fc | 2163 | */ |
5ede9289 | 2164 | static inline bool rdma_cap_eth_ah(const struct ib_device *device, u8 port_num) |
227128fc | 2165 | { |
f9b22e35 | 2166 | return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_ETH_AH; |
227128fc MW |
2167 | } |
2168 | ||
337877a4 IW |
2169 | /** |
2170 | * rdma_max_mad_size - Return the max MAD size required by this RDMA Port. | |
2171 | * | |
2172 | * @device: Device | |
2173 | * @port_num: Port number | |
2174 | * | |
2175 | * This MAD size includes the MAD headers and MAD payload. No other headers | |
2176 | * are included. | |
2177 | * | |
2178 | * Return the max MAD size required by the Port. Will return 0 if the port | |
2179 | * does not support MADs | |
2180 | */ | |
2181 | static inline size_t rdma_max_mad_size(const struct ib_device *device, u8 port_num) | |
2182 | { | |
2183 | return device->port_immutable[port_num].max_mad_size; | |
2184 | } | |
2185 | ||
03db3a2d MB |
2186 | /** |
2187 | * rdma_cap_roce_gid_table - Check if the port of device uses roce_gid_table | |
2188 | * @device: Device to check | |
2189 | * @port_num: Port number to check | |
2190 | * | |
2191 | * RoCE GID table mechanism manages the various GIDs for a device. | |
2192 | * | |
2193 | * NOTE: if allocating the port's GID table has failed, this call will still | |
2194 | * return true, but any RoCE GID table API will fail. | |
2195 | * | |
2196 | * Return: true if the port uses RoCE GID table mechanism in order to manage | |
2197 | * its GIDs. | |
2198 | */ | |
2199 | static inline bool rdma_cap_roce_gid_table(const struct ib_device *device, | |
2200 | u8 port_num) | |
2201 | { | |
2202 | return rdma_protocol_roce(device, port_num) && | |
2203 | device->add_gid && device->del_gid; | |
2204 | } | |
2205 | ||
1da177e4 | 2206 | int ib_query_gid(struct ib_device *device, |
55ee3ab2 MB |
2207 | u8 port_num, int index, union ib_gid *gid, |
2208 | struct ib_gid_attr *attr); | |
1da177e4 LT |
2209 | |
2210 | int ib_query_pkey(struct ib_device *device, | |
2211 | u8 port_num, u16 index, u16 *pkey); | |
2212 | ||
2213 | int ib_modify_device(struct ib_device *device, | |
2214 | int device_modify_mask, | |
2215 | struct ib_device_modify *device_modify); | |
2216 | ||
2217 | int ib_modify_port(struct ib_device *device, | |
2218 | u8 port_num, int port_modify_mask, | |
2219 | struct ib_port_modify *port_modify); | |
2220 | ||
5eb620c8 | 2221 | int ib_find_gid(struct ib_device *device, union ib_gid *gid, |
55ee3ab2 | 2222 | struct net_device *ndev, u8 *port_num, u16 *index); |
5eb620c8 YE |
2223 | |
2224 | int ib_find_pkey(struct ib_device *device, | |
2225 | u8 port_num, u16 pkey, u16 *index); | |
2226 | ||
1da177e4 LT |
2227 | struct ib_pd *ib_alloc_pd(struct ib_device *device); |
2228 | ||
7dd78647 | 2229 | void ib_dealloc_pd(struct ib_pd *pd); |
1da177e4 LT |
2230 | |
2231 | /** | |
2232 | * ib_create_ah - Creates an address handle for the given address vector. | |
2233 | * @pd: The protection domain associated with the address handle. | |
2234 | * @ah_attr: The attributes of the address vector. | |
2235 | * | |
2236 | * The address handle is used to reference a local or global destination | |
2237 | * in all UD QP post sends. | |
2238 | */ | |
2239 | struct ib_ah *ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr); | |
2240 | ||
4e00d694 SH |
2241 | /** |
2242 | * ib_init_ah_from_wc - Initializes address handle attributes from a | |
2243 | * work completion. | |
2244 | * @device: Device on which the received message arrived. | |
2245 | * @port_num: Port on which the received message arrived. | |
2246 | * @wc: Work completion associated with the received message. | |
2247 | * @grh: References the received global route header. This parameter is | |
2248 | * ignored unless the work completion indicates that the GRH is valid. | |
2249 | * @ah_attr: Returned attributes that can be used when creating an address | |
2250 | * handle for replying to the message. | |
2251 | */ | |
73cdaaee IW |
2252 | int ib_init_ah_from_wc(struct ib_device *device, u8 port_num, |
2253 | const struct ib_wc *wc, const struct ib_grh *grh, | |
2254 | struct ib_ah_attr *ah_attr); | |
4e00d694 | 2255 | |
513789ed HR |
2256 | /** |
2257 | * ib_create_ah_from_wc - Creates an address handle associated with the | |
2258 | * sender of the specified work completion. | |
2259 | * @pd: The protection domain associated with the address handle. | |
2260 | * @wc: Work completion information associated with a received message. | |
2261 | * @grh: References the received global route header. This parameter is | |
2262 | * ignored unless the work completion indicates that the GRH is valid. | |
2263 | * @port_num: The outbound port number to associate with the address. | |
2264 | * | |
2265 | * The address handle is used to reference a local or global destination | |
2266 | * in all UD QP post sends. | |
2267 | */ | |
73cdaaee IW |
2268 | struct ib_ah *ib_create_ah_from_wc(struct ib_pd *pd, const struct ib_wc *wc, |
2269 | const struct ib_grh *grh, u8 port_num); | |
513789ed | 2270 | |
1da177e4 LT |
2271 | /** |
2272 | * ib_modify_ah - Modifies the address vector associated with an address | |
2273 | * handle. | |
2274 | * @ah: The address handle to modify. | |
2275 | * @ah_attr: The new address vector attributes to associate with the | |
2276 | * address handle. | |
2277 | */ | |
2278 | int ib_modify_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr); | |
2279 | ||
2280 | /** | |
2281 | * ib_query_ah - Queries the address vector associated with an address | |
2282 | * handle. | |
2283 | * @ah: The address handle to query. | |
2284 | * @ah_attr: The address vector attributes associated with the address | |
2285 | * handle. | |
2286 | */ | |
2287 | int ib_query_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr); | |
2288 | ||
2289 | /** | |
2290 | * ib_destroy_ah - Destroys an address handle. | |
2291 | * @ah: The address handle to destroy. | |
2292 | */ | |
2293 | int ib_destroy_ah(struct ib_ah *ah); | |
2294 | ||
d41fcc67 RD |
2295 | /** |
2296 | * ib_create_srq - Creates a SRQ associated with the specified protection | |
2297 | * domain. | |
2298 | * @pd: The protection domain associated with the SRQ. | |
abb6e9ba DB |
2299 | * @srq_init_attr: A list of initial attributes required to create the |
2300 | * SRQ. If SRQ creation succeeds, then the attributes are updated to | |
2301 | * the actual capabilities of the created SRQ. | |
d41fcc67 RD |
2302 | * |
2303 | * srq_attr->max_wr and srq_attr->max_sge are read the determine the | |
2304 | * requested size of the SRQ, and set to the actual values allocated | |
2305 | * on return. If ib_create_srq() succeeds, then max_wr and max_sge | |
2306 | * will always be at least as large as the requested values. | |
2307 | */ | |
2308 | struct ib_srq *ib_create_srq(struct ib_pd *pd, | |
2309 | struct ib_srq_init_attr *srq_init_attr); | |
2310 | ||
2311 | /** | |
2312 | * ib_modify_srq - Modifies the attributes for the specified SRQ. | |
2313 | * @srq: The SRQ to modify. | |
2314 | * @srq_attr: On input, specifies the SRQ attributes to modify. On output, | |
2315 | * the current values of selected SRQ attributes are returned. | |
2316 | * @srq_attr_mask: A bit-mask used to specify which attributes of the SRQ | |
2317 | * are being modified. | |
2318 | * | |
2319 | * The mask may contain IB_SRQ_MAX_WR to resize the SRQ and/or | |
2320 | * IB_SRQ_LIMIT to set the SRQ's limit and request notification when | |
2321 | * the number of receives queued drops below the limit. | |
2322 | */ | |
2323 | int ib_modify_srq(struct ib_srq *srq, | |
2324 | struct ib_srq_attr *srq_attr, | |
2325 | enum ib_srq_attr_mask srq_attr_mask); | |
2326 | ||
2327 | /** | |
2328 | * ib_query_srq - Returns the attribute list and current values for the | |
2329 | * specified SRQ. | |
2330 | * @srq: The SRQ to query. | |
2331 | * @srq_attr: The attributes of the specified SRQ. | |
2332 | */ | |
2333 | int ib_query_srq(struct ib_srq *srq, | |
2334 | struct ib_srq_attr *srq_attr); | |
2335 | ||
2336 | /** | |
2337 | * ib_destroy_srq - Destroys the specified SRQ. | |
2338 | * @srq: The SRQ to destroy. | |
2339 | */ | |
2340 | int ib_destroy_srq(struct ib_srq *srq); | |
2341 | ||
2342 | /** | |
2343 | * ib_post_srq_recv - Posts a list of work requests to the specified SRQ. | |
2344 | * @srq: The SRQ to post the work request on. | |
2345 | * @recv_wr: A list of work requests to post on the receive queue. | |
2346 | * @bad_recv_wr: On an immediate failure, this parameter will reference | |
2347 | * the work request that failed to be posted on the QP. | |
2348 | */ | |
2349 | static inline int ib_post_srq_recv(struct ib_srq *srq, | |
2350 | struct ib_recv_wr *recv_wr, | |
2351 | struct ib_recv_wr **bad_recv_wr) | |
2352 | { | |
2353 | return srq->device->post_srq_recv(srq, recv_wr, bad_recv_wr); | |
2354 | } | |
2355 | ||
1da177e4 LT |
2356 | /** |
2357 | * ib_create_qp - Creates a QP associated with the specified protection | |
2358 | * domain. | |
2359 | * @pd: The protection domain associated with the QP. | |
abb6e9ba DB |
2360 | * @qp_init_attr: A list of initial attributes required to create the |
2361 | * QP. If QP creation succeeds, then the attributes are updated to | |
2362 | * the actual capabilities of the created QP. | |
1da177e4 LT |
2363 | */ |
2364 | struct ib_qp *ib_create_qp(struct ib_pd *pd, | |
2365 | struct ib_qp_init_attr *qp_init_attr); | |
2366 | ||
2367 | /** | |
2368 | * ib_modify_qp - Modifies the attributes for the specified QP and then | |
2369 | * transitions the QP to the given state. | |
2370 | * @qp: The QP to modify. | |
2371 | * @qp_attr: On input, specifies the QP attributes to modify. On output, | |
2372 | * the current values of selected QP attributes are returned. | |
2373 | * @qp_attr_mask: A bit-mask used to specify which attributes of the QP | |
2374 | * are being modified. | |
2375 | */ | |
2376 | int ib_modify_qp(struct ib_qp *qp, | |
2377 | struct ib_qp_attr *qp_attr, | |
2378 | int qp_attr_mask); | |
2379 | ||
2380 | /** | |
2381 | * ib_query_qp - Returns the attribute list and current values for the | |
2382 | * specified QP. | |
2383 | * @qp: The QP to query. | |
2384 | * @qp_attr: The attributes of the specified QP. | |
2385 | * @qp_attr_mask: A bit-mask used to select specific attributes to query. | |
2386 | * @qp_init_attr: Additional attributes of the selected QP. | |
2387 | * | |
2388 | * The qp_attr_mask may be used to limit the query to gathering only the | |
2389 | * selected attributes. | |
2390 | */ | |
2391 | int ib_query_qp(struct ib_qp *qp, | |
2392 | struct ib_qp_attr *qp_attr, | |
2393 | int qp_attr_mask, | |
2394 | struct ib_qp_init_attr *qp_init_attr); | |
2395 | ||
2396 | /** | |
2397 | * ib_destroy_qp - Destroys the specified QP. | |
2398 | * @qp: The QP to destroy. | |
2399 | */ | |
2400 | int ib_destroy_qp(struct ib_qp *qp); | |
2401 | ||
d3d72d90 | 2402 | /** |
0e0ec7e0 SH |
2403 | * ib_open_qp - Obtain a reference to an existing sharable QP. |
2404 | * @xrcd - XRC domain | |
2405 | * @qp_open_attr: Attributes identifying the QP to open. | |
2406 | * | |
2407 | * Returns a reference to a sharable QP. | |
2408 | */ | |
2409 | struct ib_qp *ib_open_qp(struct ib_xrcd *xrcd, | |
2410 | struct ib_qp_open_attr *qp_open_attr); | |
2411 | ||
2412 | /** | |
2413 | * ib_close_qp - Release an external reference to a QP. | |
d3d72d90 SH |
2414 | * @qp: The QP handle to release |
2415 | * | |
0e0ec7e0 SH |
2416 | * The opened QP handle is released by the caller. The underlying |
2417 | * shared QP is not destroyed until all internal references are released. | |
d3d72d90 | 2418 | */ |
0e0ec7e0 | 2419 | int ib_close_qp(struct ib_qp *qp); |
d3d72d90 | 2420 | |
1da177e4 LT |
2421 | /** |
2422 | * ib_post_send - Posts a list of work requests to the send queue of | |
2423 | * the specified QP. | |
2424 | * @qp: The QP to post the work request on. | |
2425 | * @send_wr: A list of work requests to post on the send queue. | |
2426 | * @bad_send_wr: On an immediate failure, this parameter will reference | |
2427 | * the work request that failed to be posted on the QP. | |
55464d46 BVA |
2428 | * |
2429 | * While IBA Vol. 1 section 11.4.1.1 specifies that if an immediate | |
2430 | * error is returned, the QP state shall not be affected, | |
2431 | * ib_post_send() will return an immediate error after queueing any | |
2432 | * earlier work requests in the list. | |
1da177e4 LT |
2433 | */ |
2434 | static inline int ib_post_send(struct ib_qp *qp, | |
2435 | struct ib_send_wr *send_wr, | |
2436 | struct ib_send_wr **bad_send_wr) | |
2437 | { | |
2438 | return qp->device->post_send(qp, send_wr, bad_send_wr); | |
2439 | } | |
2440 | ||
2441 | /** | |
2442 | * ib_post_recv - Posts a list of work requests to the receive queue of | |
2443 | * the specified QP. | |
2444 | * @qp: The QP to post the work request on. | |
2445 | * @recv_wr: A list of work requests to post on the receive queue. | |
2446 | * @bad_recv_wr: On an immediate failure, this parameter will reference | |
2447 | * the work request that failed to be posted on the QP. | |
2448 | */ | |
2449 | static inline int ib_post_recv(struct ib_qp *qp, | |
2450 | struct ib_recv_wr *recv_wr, | |
2451 | struct ib_recv_wr **bad_recv_wr) | |
2452 | { | |
2453 | return qp->device->post_recv(qp, recv_wr, bad_recv_wr); | |
2454 | } | |
2455 | ||
2456 | /** | |
2457 | * ib_create_cq - Creates a CQ on the specified device. | |
2458 | * @device: The device on which to create the CQ. | |
2459 | * @comp_handler: A user-specified callback that is invoked when a | |
2460 | * completion event occurs on the CQ. | |
2461 | * @event_handler: A user-specified callback that is invoked when an | |
2462 | * asynchronous event not associated with a completion occurs on the CQ. | |
2463 | * @cq_context: Context associated with the CQ returned to the user via | |
2464 | * the associated completion and event handlers. | |
8e37210b | 2465 | * @cq_attr: The attributes the CQ should be created upon. |
1da177e4 LT |
2466 | * |
2467 | * Users can examine the cq structure to determine the actual CQ size. | |
2468 | */ | |
2469 | struct ib_cq *ib_create_cq(struct ib_device *device, | |
2470 | ib_comp_handler comp_handler, | |
2471 | void (*event_handler)(struct ib_event *, void *), | |
8e37210b MB |
2472 | void *cq_context, |
2473 | const struct ib_cq_init_attr *cq_attr); | |
1da177e4 LT |
2474 | |
2475 | /** | |
2476 | * ib_resize_cq - Modifies the capacity of the CQ. | |
2477 | * @cq: The CQ to resize. | |
2478 | * @cqe: The minimum size of the CQ. | |
2479 | * | |
2480 | * Users can examine the cq structure to determine the actual CQ size. | |
2481 | */ | |
2482 | int ib_resize_cq(struct ib_cq *cq, int cqe); | |
2483 | ||
2dd57162 EC |
2484 | /** |
2485 | * ib_modify_cq - Modifies moderation params of the CQ | |
2486 | * @cq: The CQ to modify. | |
2487 | * @cq_count: number of CQEs that will trigger an event | |
2488 | * @cq_period: max period of time in usec before triggering an event | |
2489 | * | |
2490 | */ | |
2491 | int ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period); | |
2492 | ||
1da177e4 LT |
2493 | /** |
2494 | * ib_destroy_cq - Destroys the specified CQ. | |
2495 | * @cq: The CQ to destroy. | |
2496 | */ | |
2497 | int ib_destroy_cq(struct ib_cq *cq); | |
2498 | ||
2499 | /** | |
2500 | * ib_poll_cq - poll a CQ for completion(s) | |
2501 | * @cq:the CQ being polled | |
2502 | * @num_entries:maximum number of completions to return | |
2503 | * @wc:array of at least @num_entries &struct ib_wc where completions | |
2504 | * will be returned | |
2505 | * | |
2506 | * Poll a CQ for (possibly multiple) completions. If the return value | |
2507 | * is < 0, an error occurred. If the return value is >= 0, it is the | |
2508 | * number of completions returned. If the return value is | |
2509 | * non-negative and < num_entries, then the CQ was emptied. | |
2510 | */ | |
2511 | static inline int ib_poll_cq(struct ib_cq *cq, int num_entries, | |
2512 | struct ib_wc *wc) | |
2513 | { | |
2514 | return cq->device->poll_cq(cq, num_entries, wc); | |
2515 | } | |
2516 | ||
2517 | /** | |
2518 | * ib_peek_cq - Returns the number of unreaped completions currently | |
2519 | * on the specified CQ. | |
2520 | * @cq: The CQ to peek. | |
2521 | * @wc_cnt: A minimum number of unreaped completions to check for. | |
2522 | * | |
2523 | * If the number of unreaped completions is greater than or equal to wc_cnt, | |
2524 | * this function returns wc_cnt, otherwise, it returns the actual number of | |
2525 | * unreaped completions. | |
2526 | */ | |
2527 | int ib_peek_cq(struct ib_cq *cq, int wc_cnt); | |
2528 | ||
2529 | /** | |
2530 | * ib_req_notify_cq - Request completion notification on a CQ. | |
2531 | * @cq: The CQ to generate an event for. | |
ed23a727 RD |
2532 | * @flags: |
2533 | * Must contain exactly one of %IB_CQ_SOLICITED or %IB_CQ_NEXT_COMP | |
2534 | * to request an event on the next solicited event or next work | |
2535 | * completion at any type, respectively. %IB_CQ_REPORT_MISSED_EVENTS | |
2536 | * may also be |ed in to request a hint about missed events, as | |
2537 | * described below. | |
2538 | * | |
2539 | * Return Value: | |
2540 | * < 0 means an error occurred while requesting notification | |
2541 | * == 0 means notification was requested successfully, and if | |
2542 | * IB_CQ_REPORT_MISSED_EVENTS was passed in, then no events | |
2543 | * were missed and it is safe to wait for another event. In | |
2544 | * this case is it guaranteed that any work completions added | |
2545 | * to the CQ since the last CQ poll will trigger a completion | |
2546 | * notification event. | |
2547 | * > 0 is only returned if IB_CQ_REPORT_MISSED_EVENTS was passed | |
2548 | * in. It means that the consumer must poll the CQ again to | |
2549 | * make sure it is empty to avoid missing an event because of a | |
2550 | * race between requesting notification and an entry being | |
2551 | * added to the CQ. This return value means it is possible | |
2552 | * (but not guaranteed) that a work completion has been added | |
2553 | * to the CQ since the last poll without triggering a | |
2554 | * completion notification event. | |
1da177e4 LT |
2555 | */ |
2556 | static inline int ib_req_notify_cq(struct ib_cq *cq, | |
ed23a727 | 2557 | enum ib_cq_notify_flags flags) |
1da177e4 | 2558 | { |
ed23a727 | 2559 | return cq->device->req_notify_cq(cq, flags); |
1da177e4 LT |
2560 | } |
2561 | ||
2562 | /** | |
2563 | * ib_req_ncomp_notif - Request completion notification when there are | |
2564 | * at least the specified number of unreaped completions on the CQ. | |
2565 | * @cq: The CQ to generate an event for. | |
2566 | * @wc_cnt: The number of unreaped completions that should be on the | |
2567 | * CQ before an event is generated. | |
2568 | */ | |
2569 | static inline int ib_req_ncomp_notif(struct ib_cq *cq, int wc_cnt) | |
2570 | { | |
2571 | return cq->device->req_ncomp_notif ? | |
2572 | cq->device->req_ncomp_notif(cq, wc_cnt) : | |
2573 | -ENOSYS; | |
2574 | } | |
2575 | ||
2576 | /** | |
2577 | * ib_get_dma_mr - Returns a memory region for system memory that is | |
2578 | * usable for DMA. | |
2579 | * @pd: The protection domain associated with the memory region. | |
2580 | * @mr_access_flags: Specifies the memory access rights. | |
9b513090 RC |
2581 | * |
2582 | * Note that the ib_dma_*() functions defined below must be used | |
2583 | * to create/destroy addresses used with the Lkey or Rkey returned | |
2584 | * by ib_get_dma_mr(). | |
1da177e4 LT |
2585 | */ |
2586 | struct ib_mr *ib_get_dma_mr(struct ib_pd *pd, int mr_access_flags); | |
2587 | ||
9b513090 RC |
2588 | /** |
2589 | * ib_dma_mapping_error - check a DMA addr for error | |
2590 | * @dev: The device for which the dma_addr was created | |
2591 | * @dma_addr: The DMA address to check | |
2592 | */ | |
2593 | static inline int ib_dma_mapping_error(struct ib_device *dev, u64 dma_addr) | |
2594 | { | |
d1998ef3 BC |
2595 | if (dev->dma_ops) |
2596 | return dev->dma_ops->mapping_error(dev, dma_addr); | |
8d8bb39b | 2597 | return dma_mapping_error(dev->dma_device, dma_addr); |
9b513090 RC |
2598 | } |
2599 | ||
2600 | /** | |
2601 | * ib_dma_map_single - Map a kernel virtual address to DMA address | |
2602 | * @dev: The device for which the dma_addr is to be created | |
2603 | * @cpu_addr: The kernel virtual address | |
2604 | * @size: The size of the region in bytes | |
2605 | * @direction: The direction of the DMA | |
2606 | */ | |
2607 | static inline u64 ib_dma_map_single(struct ib_device *dev, | |
2608 | void *cpu_addr, size_t size, | |
2609 | enum dma_data_direction direction) | |
2610 | { | |
d1998ef3 BC |
2611 | if (dev->dma_ops) |
2612 | return dev->dma_ops->map_single(dev, cpu_addr, size, direction); | |
2613 | return dma_map_single(dev->dma_device, cpu_addr, size, direction); | |
9b513090 RC |
2614 | } |
2615 | ||
2616 | /** | |
2617 | * ib_dma_unmap_single - Destroy a mapping created by ib_dma_map_single() | |
2618 | * @dev: The device for which the DMA address was created | |
2619 | * @addr: The DMA address | |
2620 | * @size: The size of the region in bytes | |
2621 | * @direction: The direction of the DMA | |
2622 | */ | |
2623 | static inline void ib_dma_unmap_single(struct ib_device *dev, | |
2624 | u64 addr, size_t size, | |
2625 | enum dma_data_direction direction) | |
2626 | { | |
d1998ef3 BC |
2627 | if (dev->dma_ops) |
2628 | dev->dma_ops->unmap_single(dev, addr, size, direction); | |
2629 | else | |
9b513090 RC |
2630 | dma_unmap_single(dev->dma_device, addr, size, direction); |
2631 | } | |
2632 | ||
cb9fbc5c AK |
2633 | static inline u64 ib_dma_map_single_attrs(struct ib_device *dev, |
2634 | void *cpu_addr, size_t size, | |
2635 | enum dma_data_direction direction, | |
2636 | struct dma_attrs *attrs) | |
2637 | { | |
2638 | return dma_map_single_attrs(dev->dma_device, cpu_addr, size, | |
2639 | direction, attrs); | |
2640 | } | |
2641 | ||
2642 | static inline void ib_dma_unmap_single_attrs(struct ib_device *dev, | |
2643 | u64 addr, size_t size, | |
2644 | enum dma_data_direction direction, | |
2645 | struct dma_attrs *attrs) | |
2646 | { | |
2647 | return dma_unmap_single_attrs(dev->dma_device, addr, size, | |
2648 | direction, attrs); | |
2649 | } | |
2650 | ||
9b513090 RC |
2651 | /** |
2652 | * ib_dma_map_page - Map a physical page to DMA address | |
2653 | * @dev: The device for which the dma_addr is to be created | |
2654 | * @page: The page to be mapped | |
2655 | * @offset: The offset within the page | |
2656 | * @size: The size of the region in bytes | |
2657 | * @direction: The direction of the DMA | |
2658 | */ | |
2659 | static inline u64 ib_dma_map_page(struct ib_device *dev, | |
2660 | struct page *page, | |
2661 | unsigned long offset, | |
2662 | size_t size, | |
2663 | enum dma_data_direction direction) | |
2664 | { | |
d1998ef3 BC |
2665 | if (dev->dma_ops) |
2666 | return dev->dma_ops->map_page(dev, page, offset, size, direction); | |
2667 | return dma_map_page(dev->dma_device, page, offset, size, direction); | |
9b513090 RC |
2668 | } |
2669 | ||
2670 | /** | |
2671 | * ib_dma_unmap_page - Destroy a mapping created by ib_dma_map_page() | |
2672 | * @dev: The device for which the DMA address was created | |
2673 | * @addr: The DMA address | |
2674 | * @size: The size of the region in bytes | |
2675 | * @direction: The direction of the DMA | |
2676 | */ | |
2677 | static inline void ib_dma_unmap_page(struct ib_device *dev, | |
2678 | u64 addr, size_t size, | |
2679 | enum dma_data_direction direction) | |
2680 | { | |
d1998ef3 BC |
2681 | if (dev->dma_ops) |
2682 | dev->dma_ops->unmap_page(dev, addr, size, direction); | |
2683 | else | |
9b513090 RC |
2684 | dma_unmap_page(dev->dma_device, addr, size, direction); |
2685 | } | |
2686 | ||
2687 | /** | |
2688 | * ib_dma_map_sg - Map a scatter/gather list to DMA addresses | |
2689 | * @dev: The device for which the DMA addresses are to be created | |
2690 | * @sg: The array of scatter/gather entries | |
2691 | * @nents: The number of scatter/gather entries | |
2692 | * @direction: The direction of the DMA | |
2693 | */ | |
2694 | static inline int ib_dma_map_sg(struct ib_device *dev, | |
2695 | struct scatterlist *sg, int nents, | |
2696 | enum dma_data_direction direction) | |
2697 | { | |
d1998ef3 BC |
2698 | if (dev->dma_ops) |
2699 | return dev->dma_ops->map_sg(dev, sg, nents, direction); | |
2700 | return dma_map_sg(dev->dma_device, sg, nents, direction); | |
9b513090 RC |
2701 | } |
2702 | ||
2703 | /** | |
2704 | * ib_dma_unmap_sg - Unmap a scatter/gather list of DMA addresses | |
2705 | * @dev: The device for which the DMA addresses were created | |
2706 | * @sg: The array of scatter/gather entries | |
2707 | * @nents: The number of scatter/gather entries | |
2708 | * @direction: The direction of the DMA | |
2709 | */ | |
2710 | static inline void ib_dma_unmap_sg(struct ib_device *dev, | |
2711 | struct scatterlist *sg, int nents, | |
2712 | enum dma_data_direction direction) | |
2713 | { | |
d1998ef3 BC |
2714 | if (dev->dma_ops) |
2715 | dev->dma_ops->unmap_sg(dev, sg, nents, direction); | |
2716 | else | |
9b513090 RC |
2717 | dma_unmap_sg(dev->dma_device, sg, nents, direction); |
2718 | } | |
2719 | ||
cb9fbc5c AK |
2720 | static inline int ib_dma_map_sg_attrs(struct ib_device *dev, |
2721 | struct scatterlist *sg, int nents, | |
2722 | enum dma_data_direction direction, | |
2723 | struct dma_attrs *attrs) | |
2724 | { | |
2725 | return dma_map_sg_attrs(dev->dma_device, sg, nents, direction, attrs); | |
2726 | } | |
2727 | ||
2728 | static inline void ib_dma_unmap_sg_attrs(struct ib_device *dev, | |
2729 | struct scatterlist *sg, int nents, | |
2730 | enum dma_data_direction direction, | |
2731 | struct dma_attrs *attrs) | |
2732 | { | |
2733 | dma_unmap_sg_attrs(dev->dma_device, sg, nents, direction, attrs); | |
2734 | } | |
9b513090 RC |
2735 | /** |
2736 | * ib_sg_dma_address - Return the DMA address from a scatter/gather entry | |
2737 | * @dev: The device for which the DMA addresses were created | |
2738 | * @sg: The scatter/gather entry | |
ea58a595 MM |
2739 | * |
2740 | * Note: this function is obsolete. To do: change all occurrences of | |
2741 | * ib_sg_dma_address() into sg_dma_address(). | |
9b513090 RC |
2742 | */ |
2743 | static inline u64 ib_sg_dma_address(struct ib_device *dev, | |
2744 | struct scatterlist *sg) | |
2745 | { | |
d1998ef3 | 2746 | return sg_dma_address(sg); |
9b513090 RC |
2747 | } |
2748 | ||
2749 | /** | |
2750 | * ib_sg_dma_len - Return the DMA length from a scatter/gather entry | |
2751 | * @dev: The device for which the DMA addresses were created | |
2752 | * @sg: The scatter/gather entry | |
ea58a595 MM |
2753 | * |
2754 | * Note: this function is obsolete. To do: change all occurrences of | |
2755 | * ib_sg_dma_len() into sg_dma_len(). | |
9b513090 RC |
2756 | */ |
2757 | static inline unsigned int ib_sg_dma_len(struct ib_device *dev, | |
2758 | struct scatterlist *sg) | |
2759 | { | |
d1998ef3 | 2760 | return sg_dma_len(sg); |
9b513090 RC |
2761 | } |
2762 | ||
2763 | /** | |
2764 | * ib_dma_sync_single_for_cpu - Prepare DMA region to be accessed by CPU | |
2765 | * @dev: The device for which the DMA address was created | |
2766 | * @addr: The DMA address | |
2767 | * @size: The size of the region in bytes | |
2768 | * @dir: The direction of the DMA | |
2769 | */ | |
2770 | static inline void ib_dma_sync_single_for_cpu(struct ib_device *dev, | |
2771 | u64 addr, | |
2772 | size_t size, | |
2773 | enum dma_data_direction dir) | |
2774 | { | |
d1998ef3 BC |
2775 | if (dev->dma_ops) |
2776 | dev->dma_ops->sync_single_for_cpu(dev, addr, size, dir); | |
2777 | else | |
9b513090 RC |
2778 | dma_sync_single_for_cpu(dev->dma_device, addr, size, dir); |
2779 | } | |
2780 | ||
2781 | /** | |
2782 | * ib_dma_sync_single_for_device - Prepare DMA region to be accessed by device | |
2783 | * @dev: The device for which the DMA address was created | |
2784 | * @addr: The DMA address | |
2785 | * @size: The size of the region in bytes | |
2786 | * @dir: The direction of the DMA | |
2787 | */ | |
2788 | static inline void ib_dma_sync_single_for_device(struct ib_device *dev, | |
2789 | u64 addr, | |
2790 | size_t size, | |
2791 | enum dma_data_direction dir) | |
2792 | { | |
d1998ef3 BC |
2793 | if (dev->dma_ops) |
2794 | dev->dma_ops->sync_single_for_device(dev, addr, size, dir); | |
2795 | else | |
9b513090 RC |
2796 | dma_sync_single_for_device(dev->dma_device, addr, size, dir); |
2797 | } | |
2798 | ||
2799 | /** | |
2800 | * ib_dma_alloc_coherent - Allocate memory and map it for DMA | |
2801 | * @dev: The device for which the DMA address is requested | |
2802 | * @size: The size of the region to allocate in bytes | |
2803 | * @dma_handle: A pointer for returning the DMA address of the region | |
2804 | * @flag: memory allocator flags | |
2805 | */ | |
2806 | static inline void *ib_dma_alloc_coherent(struct ib_device *dev, | |
2807 | size_t size, | |
2808 | u64 *dma_handle, | |
2809 | gfp_t flag) | |
2810 | { | |
d1998ef3 BC |
2811 | if (dev->dma_ops) |
2812 | return dev->dma_ops->alloc_coherent(dev, size, dma_handle, flag); | |
c59a3da1 RD |
2813 | else { |
2814 | dma_addr_t handle; | |
2815 | void *ret; | |
2816 | ||
2817 | ret = dma_alloc_coherent(dev->dma_device, size, &handle, flag); | |
2818 | *dma_handle = handle; | |
2819 | return ret; | |
2820 | } | |
9b513090 RC |
2821 | } |
2822 | ||
2823 | /** | |
2824 | * ib_dma_free_coherent - Free memory allocated by ib_dma_alloc_coherent() | |
2825 | * @dev: The device for which the DMA addresses were allocated | |
2826 | * @size: The size of the region | |
2827 | * @cpu_addr: the address returned by ib_dma_alloc_coherent() | |
2828 | * @dma_handle: the DMA address returned by ib_dma_alloc_coherent() | |
2829 | */ | |
2830 | static inline void ib_dma_free_coherent(struct ib_device *dev, | |
2831 | size_t size, void *cpu_addr, | |
2832 | u64 dma_handle) | |
2833 | { | |
d1998ef3 BC |
2834 | if (dev->dma_ops) |
2835 | dev->dma_ops->free_coherent(dev, size, cpu_addr, dma_handle); | |
2836 | else | |
9b513090 RC |
2837 | dma_free_coherent(dev->dma_device, size, cpu_addr, dma_handle); |
2838 | } | |
2839 | ||
1da177e4 LT |
2840 | /** |
2841 | * ib_query_mr - Retrieves information about a specific memory region. | |
2842 | * @mr: The memory region to retrieve information about. | |
2843 | * @mr_attr: The attributes of the specified memory region. | |
2844 | */ | |
2845 | int ib_query_mr(struct ib_mr *mr, struct ib_mr_attr *mr_attr); | |
2846 | ||
2847 | /** | |
2848 | * ib_dereg_mr - Deregisters a memory region and removes it from the | |
2849 | * HCA translation table. | |
2850 | * @mr: The memory region to deregister. | |
7083e42e SM |
2851 | * |
2852 | * This function can fail, if the memory region has memory windows bound to it. | |
1da177e4 LT |
2853 | */ |
2854 | int ib_dereg_mr(struct ib_mr *mr); | |
2855 | ||
9bee178b SG |
2856 | struct ib_mr *ib_alloc_mr(struct ib_pd *pd, |
2857 | enum ib_mr_type mr_type, | |
2858 | u32 max_num_sg); | |
00f7ec36 | 2859 | |
00f7ec36 SW |
2860 | /** |
2861 | * ib_update_fast_reg_key - updates the key portion of the fast_reg MR | |
2862 | * R_Key and L_Key. | |
2863 | * @mr - struct ib_mr pointer to be updated. | |
2864 | * @newkey - new key to be used. | |
2865 | */ | |
2866 | static inline void ib_update_fast_reg_key(struct ib_mr *mr, u8 newkey) | |
2867 | { | |
2868 | mr->lkey = (mr->lkey & 0xffffff00) | newkey; | |
2869 | mr->rkey = (mr->rkey & 0xffffff00) | newkey; | |
2870 | } | |
2871 | ||
7083e42e SM |
2872 | /** |
2873 | * ib_inc_rkey - increments the key portion of the given rkey. Can be used | |
2874 | * for calculating a new rkey for type 2 memory windows. | |
2875 | * @rkey - the rkey to increment. | |
2876 | */ | |
2877 | static inline u32 ib_inc_rkey(u32 rkey) | |
2878 | { | |
2879 | const u32 mask = 0x000000ff; | |
2880 | return ((rkey + 1) & mask) | (rkey & ~mask); | |
2881 | } | |
2882 | ||
1da177e4 LT |
2883 | /** |
2884 | * ib_alloc_mw - Allocates a memory window. | |
2885 | * @pd: The protection domain associated with the memory window. | |
7083e42e | 2886 | * @type: The type of the memory window (1 or 2). |
1da177e4 | 2887 | */ |
7083e42e | 2888 | struct ib_mw *ib_alloc_mw(struct ib_pd *pd, enum ib_mw_type type); |
1da177e4 LT |
2889 | |
2890 | /** | |
2891 | * ib_bind_mw - Posts a work request to the send queue of the specified | |
2892 | * QP, which binds the memory window to the given address range and | |
2893 | * remote access attributes. | |
2894 | * @qp: QP to post the bind work request on. | |
2895 | * @mw: The memory window to bind. | |
2896 | * @mw_bind: Specifies information about the memory window, including | |
2897 | * its address range, remote access rights, and associated memory region. | |
7083e42e SM |
2898 | * |
2899 | * If there is no immediate error, the function will update the rkey member | |
2900 | * of the mw parameter to its new value. The bind operation can still fail | |
2901 | * asynchronously. | |
1da177e4 LT |
2902 | */ |
2903 | static inline int ib_bind_mw(struct ib_qp *qp, | |
2904 | struct ib_mw *mw, | |
2905 | struct ib_mw_bind *mw_bind) | |
2906 | { | |
2907 | /* XXX reference counting in corresponding MR? */ | |
2908 | return mw->device->bind_mw ? | |
2909 | mw->device->bind_mw(qp, mw, mw_bind) : | |
2910 | -ENOSYS; | |
2911 | } | |
2912 | ||
2913 | /** | |
2914 | * ib_dealloc_mw - Deallocates a memory window. | |
2915 | * @mw: The memory window to deallocate. | |
2916 | */ | |
2917 | int ib_dealloc_mw(struct ib_mw *mw); | |
2918 | ||
2919 | /** | |
2920 | * ib_alloc_fmr - Allocates a unmapped fast memory region. | |
2921 | * @pd: The protection domain associated with the unmapped region. | |
2922 | * @mr_access_flags: Specifies the memory access rights. | |
2923 | * @fmr_attr: Attributes of the unmapped region. | |
2924 | * | |
2925 | * A fast memory region must be mapped before it can be used as part of | |
2926 | * a work request. | |
2927 | */ | |
2928 | struct ib_fmr *ib_alloc_fmr(struct ib_pd *pd, | |
2929 | int mr_access_flags, | |
2930 | struct ib_fmr_attr *fmr_attr); | |
2931 | ||
2932 | /** | |
2933 | * ib_map_phys_fmr - Maps a list of physical pages to a fast memory region. | |
2934 | * @fmr: The fast memory region to associate with the pages. | |
2935 | * @page_list: An array of physical pages to map to the fast memory region. | |
2936 | * @list_len: The number of pages in page_list. | |
2937 | * @iova: The I/O virtual address to use with the mapped region. | |
2938 | */ | |
2939 | static inline int ib_map_phys_fmr(struct ib_fmr *fmr, | |
2940 | u64 *page_list, int list_len, | |
2941 | u64 iova) | |
2942 | { | |
2943 | return fmr->device->map_phys_fmr(fmr, page_list, list_len, iova); | |
2944 | } | |
2945 | ||
2946 | /** | |
2947 | * ib_unmap_fmr - Removes the mapping from a list of fast memory regions. | |
2948 | * @fmr_list: A linked list of fast memory regions to unmap. | |
2949 | */ | |
2950 | int ib_unmap_fmr(struct list_head *fmr_list); | |
2951 | ||
2952 | /** | |
2953 | * ib_dealloc_fmr - Deallocates a fast memory region. | |
2954 | * @fmr: The fast memory region to deallocate. | |
2955 | */ | |
2956 | int ib_dealloc_fmr(struct ib_fmr *fmr); | |
2957 | ||
2958 | /** | |
2959 | * ib_attach_mcast - Attaches the specified QP to a multicast group. | |
2960 | * @qp: QP to attach to the multicast group. The QP must be type | |
2961 | * IB_QPT_UD. | |
2962 | * @gid: Multicast group GID. | |
2963 | * @lid: Multicast group LID in host byte order. | |
2964 | * | |
2965 | * In order to send and receive multicast packets, subnet | |
2966 | * administration must have created the multicast group and configured | |
2967 | * the fabric appropriately. The port associated with the specified | |
2968 | * QP must also be a member of the multicast group. | |
2969 | */ | |
2970 | int ib_attach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid); | |
2971 | ||
2972 | /** | |
2973 | * ib_detach_mcast - Detaches the specified QP from a multicast group. | |
2974 | * @qp: QP to detach from the multicast group. | |
2975 | * @gid: Multicast group GID. | |
2976 | * @lid: Multicast group LID in host byte order. | |
2977 | */ | |
2978 | int ib_detach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid); | |
2979 | ||
59991f94 SH |
2980 | /** |
2981 | * ib_alloc_xrcd - Allocates an XRC domain. | |
2982 | * @device: The device on which to allocate the XRC domain. | |
2983 | */ | |
2984 | struct ib_xrcd *ib_alloc_xrcd(struct ib_device *device); | |
2985 | ||
2986 | /** | |
2987 | * ib_dealloc_xrcd - Deallocates an XRC domain. | |
2988 | * @xrcd: The XRC domain to deallocate. | |
2989 | */ | |
2990 | int ib_dealloc_xrcd(struct ib_xrcd *xrcd); | |
2991 | ||
319a441d HHZ |
2992 | struct ib_flow *ib_create_flow(struct ib_qp *qp, |
2993 | struct ib_flow_attr *flow_attr, int domain); | |
2994 | int ib_destroy_flow(struct ib_flow *flow_id); | |
2995 | ||
1c636f80 EC |
2996 | static inline int ib_check_mr_access(int flags) |
2997 | { | |
2998 | /* | |
2999 | * Local write permission is required if remote write or | |
3000 | * remote atomic permission is also requested. | |
3001 | */ | |
3002 | if (flags & (IB_ACCESS_REMOTE_ATOMIC | IB_ACCESS_REMOTE_WRITE) && | |
3003 | !(flags & IB_ACCESS_LOCAL_WRITE)) | |
3004 | return -EINVAL; | |
3005 | ||
3006 | return 0; | |
3007 | } | |
3008 | ||
1b01d335 SG |
3009 | /** |
3010 | * ib_check_mr_status: lightweight check of MR status. | |
3011 | * This routine may provide status checks on a selected | |
3012 | * ib_mr. first use is for signature status check. | |
3013 | * | |
3014 | * @mr: A memory region. | |
3015 | * @check_mask: Bitmask of which checks to perform from | |
3016 | * ib_mr_status_check enumeration. | |
3017 | * @mr_status: The container of relevant status checks. | |
3018 | * failed checks will be indicated in the status bitmask | |
3019 | * and the relevant info shall be in the error item. | |
3020 | */ | |
3021 | int ib_check_mr_status(struct ib_mr *mr, u32 check_mask, | |
3022 | struct ib_mr_status *mr_status); | |
3023 | ||
9268f72d YK |
3024 | struct net_device *ib_get_net_dev_by_params(struct ib_device *dev, u8 port, |
3025 | u16 pkey, const union ib_gid *gid, | |
3026 | const struct sockaddr *addr); | |
3027 | ||
4c67e2bf SG |
3028 | int ib_map_mr_sg(struct ib_mr *mr, |
3029 | struct scatterlist *sg, | |
3030 | int sg_nents, | |
3031 | unsigned int page_size); | |
3032 | ||
3033 | static inline int | |
3034 | ib_map_mr_sg_zbva(struct ib_mr *mr, | |
3035 | struct scatterlist *sg, | |
3036 | int sg_nents, | |
3037 | unsigned int page_size) | |
3038 | { | |
3039 | int n; | |
3040 | ||
3041 | n = ib_map_mr_sg(mr, sg, sg_nents, page_size); | |
3042 | mr->iova = 0; | |
3043 | ||
3044 | return n; | |
3045 | } | |
3046 | ||
3047 | int ib_sg_to_pages(struct ib_mr *mr, | |
3048 | struct scatterlist *sgl, | |
3049 | int sg_nents, | |
3050 | int (*set_page)(struct ib_mr *, u64)); | |
3051 | ||
1da177e4 | 3052 | #endif /* IB_VERBS_H */ |