x86: lapic address print out like io apic addr
[deliverable/linux.git] / include / sound / asound.h
CommitLineData
1da177e4
LT
1/*
2 * Advanced Linux Sound Architecture - ALSA - Driver
c1017a4c 3 * Copyright (c) 1994-2003 by Jaroslav Kysela <perex@perex.cz>,
1da177e4
LT
4 * Abramo Bagnara <abramo@alsa-project.org>
5 *
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 */
22
23#ifndef __SOUND_ASOUND_H
24#define __SOUND_ASOUND_H
25
1da177e4 26#ifdef __KERNEL__
6560c349 27#include <linux/ioctl.h>
1da177e4
LT
28#include <linux/types.h>
29#include <linux/time.h>
30#include <asm/byteorder.h>
31
32#ifdef __LITTLE_ENDIAN
33#define SNDRV_LITTLE_ENDIAN
34#else
35#ifdef __BIG_ENDIAN
36#define SNDRV_BIG_ENDIAN
37#else
38#error "Unsupported endian..."
39#endif
40#endif
41
6560c349 42#endif /* __KERNEL__ **/
1da177e4
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43
44/*
45 * protocol version
46 */
47
48#define SNDRV_PROTOCOL_VERSION(major, minor, subminor) (((major)<<16)|((minor)<<8)|(subminor))
49#define SNDRV_PROTOCOL_MAJOR(version) (((version)>>16)&0xffff)
50#define SNDRV_PROTOCOL_MINOR(version) (((version)>>8)&0xff)
51#define SNDRV_PROTOCOL_MICRO(version) ((version)&0xff)
52#define SNDRV_PROTOCOL_INCOMPATIBLE(kversion, uversion) \
53 (SNDRV_PROTOCOL_MAJOR(kversion) != SNDRV_PROTOCOL_MAJOR(uversion) || \
54 (SNDRV_PROTOCOL_MAJOR(kversion) == SNDRV_PROTOCOL_MAJOR(uversion) && \
55 SNDRV_PROTOCOL_MINOR(kversion) != SNDRV_PROTOCOL_MINOR(uversion)))
56
57/****************************************************************************
58 * *
59 * Digital audio interface *
60 * *
61 ****************************************************************************/
62
512bbd6a 63struct snd_aes_iec958 {
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64 unsigned char status[24]; /* AES/IEC958 channel status bits */
65 unsigned char subcode[147]; /* AES/IEC958 subcode bits */
66 unsigned char pad; /* nothing */
67 unsigned char dig_subframe[4]; /* AES/IEC958 subframe bits */
68};
69
70/****************************************************************************
71 * *
72 * Section for driver hardware dependent interface - /dev/snd/hw? *
73 * *
74 ****************************************************************************/
75
76#define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1)
77
512bbd6a 78enum {
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79 SNDRV_HWDEP_IFACE_OPL2 = 0,
80 SNDRV_HWDEP_IFACE_OPL3,
81 SNDRV_HWDEP_IFACE_OPL4,
82 SNDRV_HWDEP_IFACE_SB16CSP, /* Creative Signal Processor */
83 SNDRV_HWDEP_IFACE_EMU10K1, /* FX8010 processor in EMU10K1 chip */
84 SNDRV_HWDEP_IFACE_YSS225, /* Yamaha FX processor */
85 SNDRV_HWDEP_IFACE_ICS2115, /* Wavetable synth */
86 SNDRV_HWDEP_IFACE_SSCAPE, /* Ensoniq SoundScape ISA card (MC68EC000) */
87 SNDRV_HWDEP_IFACE_VX, /* Digigram VX cards */
88 SNDRV_HWDEP_IFACE_MIXART, /* Digigram miXart cards */
89 SNDRV_HWDEP_IFACE_USX2Y, /* Tascam US122, US224 & US428 usb */
90 SNDRV_HWDEP_IFACE_EMUX_WAVETABLE, /* EmuX wavetable */
91 SNDRV_HWDEP_IFACE_BLUETOOTH, /* Bluetooth audio */
92 SNDRV_HWDEP_IFACE_USX2Y_PCM, /* Tascam US122, US224 & US428 rawusb pcm */
93 SNDRV_HWDEP_IFACE_PCXHR, /* Digigram PCXHR */
b259b10c 94 SNDRV_HWDEP_IFACE_SB_RC, /* SB Extigy/Audigy2NX remote control */
2807314d 95 SNDRV_HWDEP_IFACE_HDA, /* HD-audio */
030a07e4 96 SNDRV_HWDEP_IFACE_USB_STREAM, /* direct access to usb stream */
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97
98 /* Don't forget to change the following: */
030a07e4 99 SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_USB_STREAM
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100};
101
512bbd6a 102struct snd_hwdep_info {
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103 unsigned int device; /* WR: device number */
104 int card; /* R: card number */
105 unsigned char id[64]; /* ID (user selectable) */
106 unsigned char name[80]; /* hwdep name */
512bbd6a 107 int iface; /* hwdep interface */
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108 unsigned char reserved[64]; /* reserved for future */
109};
110
111/* generic DSP loader */
512bbd6a 112struct snd_hwdep_dsp_status {
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113 unsigned int version; /* R: driver-specific version */
114 unsigned char id[32]; /* R: driver-specific ID string */
115 unsigned int num_dsps; /* R: number of DSP images to transfer */
116 unsigned int dsp_loaded; /* R: bit flags indicating the loaded DSPs */
117 unsigned int chip_ready; /* R: 1 = initialization finished */
118 unsigned char reserved[16]; /* reserved for future use */
119};
120
512bbd6a 121struct snd_hwdep_dsp_image {
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122 unsigned int index; /* W: DSP index */
123 unsigned char name[64]; /* W: ID (e.g. file name) */
124 unsigned char __user *image; /* W: binary image */
125 size_t length; /* W: size of image in bytes */
126 unsigned long driver_data; /* W: driver-specific data */
127};
128
129enum {
130 SNDRV_HWDEP_IOCTL_PVERSION = _IOR ('H', 0x00, int),
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131 SNDRV_HWDEP_IOCTL_INFO = _IOR ('H', 0x01, struct snd_hwdep_info),
132 SNDRV_HWDEP_IOCTL_DSP_STATUS = _IOR('H', 0x02, struct snd_hwdep_dsp_status),
133 SNDRV_HWDEP_IOCTL_DSP_LOAD = _IOW('H', 0x03, struct snd_hwdep_dsp_image)
1da177e4
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134};
135
136/*****************************************************************************
137 * *
138 * Digital Audio (PCM) interface - /dev/snd/pcm?? *
139 * *
140 *****************************************************************************/
141
b751eef1 142#define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 9)
1da177e4 143
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144typedef unsigned long snd_pcm_uframes_t;
145typedef signed long snd_pcm_sframes_t;
1da177e4 146
512bbd6a 147enum {
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148 SNDRV_PCM_CLASS_GENERIC = 0, /* standard mono or stereo device */
149 SNDRV_PCM_CLASS_MULTI, /* multichannel device */
150 SNDRV_PCM_CLASS_MODEM, /* software modem class */
151 SNDRV_PCM_CLASS_DIGITIZER, /* digitizer class */
152 /* Don't forget to change the following: */
153 SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER,
154};
155
512bbd6a 156enum {
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157 SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0, /* mono or stereo subdevices are mixed together */
158 SNDRV_PCM_SUBCLASS_MULTI_MIX, /* multichannel subdevices are mixed together */
159 /* Don't forget to change the following: */
160 SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX,
161};
162
512bbd6a 163enum {
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164 SNDRV_PCM_STREAM_PLAYBACK = 0,
165 SNDRV_PCM_STREAM_CAPTURE,
166 SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE,
167};
168
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169typedef int __bitwise snd_pcm_access_t;
170#define SNDRV_PCM_ACCESS_MMAP_INTERLEAVED ((__force snd_pcm_access_t) 0) /* interleaved mmap */
171#define SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED ((__force snd_pcm_access_t) 1) /* noninterleaved mmap */
172#define SNDRV_PCM_ACCESS_MMAP_COMPLEX ((__force snd_pcm_access_t) 2) /* complex mmap */
173#define SNDRV_PCM_ACCESS_RW_INTERLEAVED ((__force snd_pcm_access_t) 3) /* readi/writei */
174#define SNDRV_PCM_ACCESS_RW_NONINTERLEAVED ((__force snd_pcm_access_t) 4) /* readn/writen */
175#define SNDRV_PCM_ACCESS_LAST SNDRV_PCM_ACCESS_RW_NONINTERLEAVED
176
177typedef int __bitwise snd_pcm_format_t;
178#define SNDRV_PCM_FORMAT_S8 ((__force snd_pcm_format_t) 0)
179#define SNDRV_PCM_FORMAT_U8 ((__force snd_pcm_format_t) 1)
180#define SNDRV_PCM_FORMAT_S16_LE ((__force snd_pcm_format_t) 2)
181#define SNDRV_PCM_FORMAT_S16_BE ((__force snd_pcm_format_t) 3)
182#define SNDRV_PCM_FORMAT_U16_LE ((__force snd_pcm_format_t) 4)
183#define SNDRV_PCM_FORMAT_U16_BE ((__force snd_pcm_format_t) 5)
184#define SNDRV_PCM_FORMAT_S24_LE ((__force snd_pcm_format_t) 6) /* low three bytes */
185#define SNDRV_PCM_FORMAT_S24_BE ((__force snd_pcm_format_t) 7) /* low three bytes */
186#define SNDRV_PCM_FORMAT_U24_LE ((__force snd_pcm_format_t) 8) /* low three bytes */
187#define SNDRV_PCM_FORMAT_U24_BE ((__force snd_pcm_format_t) 9) /* low three bytes */
188#define SNDRV_PCM_FORMAT_S32_LE ((__force snd_pcm_format_t) 10)
189#define SNDRV_PCM_FORMAT_S32_BE ((__force snd_pcm_format_t) 11)
190#define SNDRV_PCM_FORMAT_U32_LE ((__force snd_pcm_format_t) 12)
191#define SNDRV_PCM_FORMAT_U32_BE ((__force snd_pcm_format_t) 13)
192#define SNDRV_PCM_FORMAT_FLOAT_LE ((__force snd_pcm_format_t) 14) /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */
193#define SNDRV_PCM_FORMAT_FLOAT_BE ((__force snd_pcm_format_t) 15) /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */
194#define SNDRV_PCM_FORMAT_FLOAT64_LE ((__force snd_pcm_format_t) 16) /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */
195#define SNDRV_PCM_FORMAT_FLOAT64_BE ((__force snd_pcm_format_t) 17) /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */
196#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE ((__force snd_pcm_format_t) 18) /* IEC-958 subframe, Little Endian */
197#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE ((__force snd_pcm_format_t) 19) /* IEC-958 subframe, Big Endian */
198#define SNDRV_PCM_FORMAT_MU_LAW ((__force snd_pcm_format_t) 20)
199#define SNDRV_PCM_FORMAT_A_LAW ((__force snd_pcm_format_t) 21)
200#define SNDRV_PCM_FORMAT_IMA_ADPCM ((__force snd_pcm_format_t) 22)
201#define SNDRV_PCM_FORMAT_MPEG ((__force snd_pcm_format_t) 23)
202#define SNDRV_PCM_FORMAT_GSM ((__force snd_pcm_format_t) 24)
203#define SNDRV_PCM_FORMAT_SPECIAL ((__force snd_pcm_format_t) 31)
204#define SNDRV_PCM_FORMAT_S24_3LE ((__force snd_pcm_format_t) 32) /* in three bytes */
205#define SNDRV_PCM_FORMAT_S24_3BE ((__force snd_pcm_format_t) 33) /* in three bytes */
206#define SNDRV_PCM_FORMAT_U24_3LE ((__force snd_pcm_format_t) 34) /* in three bytes */
207#define SNDRV_PCM_FORMAT_U24_3BE ((__force snd_pcm_format_t) 35) /* in three bytes */
208#define SNDRV_PCM_FORMAT_S20_3LE ((__force snd_pcm_format_t) 36) /* in three bytes */
209#define SNDRV_PCM_FORMAT_S20_3BE ((__force snd_pcm_format_t) 37) /* in three bytes */
210#define SNDRV_PCM_FORMAT_U20_3LE ((__force snd_pcm_format_t) 38) /* in three bytes */
211#define SNDRV_PCM_FORMAT_U20_3BE ((__force snd_pcm_format_t) 39) /* in three bytes */
212#define SNDRV_PCM_FORMAT_S18_3LE ((__force snd_pcm_format_t) 40) /* in three bytes */
213#define SNDRV_PCM_FORMAT_S18_3BE ((__force snd_pcm_format_t) 41) /* in three bytes */
214#define SNDRV_PCM_FORMAT_U18_3LE ((__force snd_pcm_format_t) 42) /* in three bytes */
215#define SNDRV_PCM_FORMAT_U18_3BE ((__force snd_pcm_format_t) 43) /* in three bytes */
216#define SNDRV_PCM_FORMAT_LAST SNDRV_PCM_FORMAT_U18_3BE
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217
218#ifdef SNDRV_LITTLE_ENDIAN
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219#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_LE
220#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_LE
221#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_LE
222#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_LE
223#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_LE
224#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_LE
225#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_LE
226#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_LE
227#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE
1da177e4
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228#endif
229#ifdef SNDRV_BIG_ENDIAN
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230#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_BE
231#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_BE
232#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_BE
233#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_BE
234#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_BE
235#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_BE
236#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_BE
237#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_BE
238#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE
1da177e4 239#endif
1da177e4 240
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241typedef int __bitwise snd_pcm_subformat_t;
242#define SNDRV_PCM_SUBFORMAT_STD ((__force snd_pcm_subformat_t) 0)
243#define SNDRV_PCM_SUBFORMAT_LAST SNDRV_PCM_SUBFORMAT_STD
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244
245#define SNDRV_PCM_INFO_MMAP 0x00000001 /* hardware supports mmap */
246#define SNDRV_PCM_INFO_MMAP_VALID 0x00000002 /* period data are valid during transfer */
247#define SNDRV_PCM_INFO_DOUBLE 0x00000004 /* Double buffering needed for PCM start/stop */
248#define SNDRV_PCM_INFO_BATCH 0x00000010 /* double buffering */
249#define SNDRV_PCM_INFO_INTERLEAVED 0x00000100 /* channels are interleaved */
250#define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200 /* channels are not interleaved */
251#define SNDRV_PCM_INFO_COMPLEX 0x00000400 /* complex frame organization (mmap only) */
252#define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000 /* hardware transfer block of samples */
253#define SNDRV_PCM_INFO_OVERRANGE 0x00020000 /* hardware supports ADC (capture) overrange detection */
254#define SNDRV_PCM_INFO_RESUME 0x00040000 /* hardware supports stream resume after suspend */
255#define SNDRV_PCM_INFO_PAUSE 0x00080000 /* pause ioctl is supported */
256#define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000 /* only half duplex */
257#define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000 /* playback and capture stream are somewhat correlated */
258#define SNDRV_PCM_INFO_SYNC_START 0x00400000 /* pcm support some kind of sync go */
259
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260typedef int __bitwise snd_pcm_state_t;
261#define SNDRV_PCM_STATE_OPEN ((__force snd_pcm_state_t) 0) /* stream is open */
262#define SNDRV_PCM_STATE_SETUP ((__force snd_pcm_state_t) 1) /* stream has a setup */
263#define SNDRV_PCM_STATE_PREPARED ((__force snd_pcm_state_t) 2) /* stream is ready to start */
264#define SNDRV_PCM_STATE_RUNNING ((__force snd_pcm_state_t) 3) /* stream is running */
265#define SNDRV_PCM_STATE_XRUN ((__force snd_pcm_state_t) 4) /* stream reached an xrun */
266#define SNDRV_PCM_STATE_DRAINING ((__force snd_pcm_state_t) 5) /* stream is draining */
267#define SNDRV_PCM_STATE_PAUSED ((__force snd_pcm_state_t) 6) /* stream is paused */
268#define SNDRV_PCM_STATE_SUSPENDED ((__force snd_pcm_state_t) 7) /* hardware is suspended */
269#define SNDRV_PCM_STATE_DISCONNECTED ((__force snd_pcm_state_t) 8) /* hardware is disconnected */
270#define SNDRV_PCM_STATE_LAST SNDRV_PCM_STATE_DISCONNECTED
1da177e4
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271
272enum {
273 SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000,
274 SNDRV_PCM_MMAP_OFFSET_STATUS = 0x80000000,
275 SNDRV_PCM_MMAP_OFFSET_CONTROL = 0x81000000,
276};
277
512bbd6a 278union snd_pcm_sync_id {
1da177e4
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279 unsigned char id[16];
280 unsigned short id16[8];
281 unsigned int id32[4];
282};
283
512bbd6a 284struct snd_pcm_info {
1da177e4
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285 unsigned int device; /* RO/WR (control): device number */
286 unsigned int subdevice; /* RO/WR (control): subdevice number */
512bbd6a 287 int stream; /* RO/WR (control): stream direction */
1da177e4
LT
288 int card; /* R: card number */
289 unsigned char id[64]; /* ID (user selectable) */
290 unsigned char name[80]; /* name of this device */
291 unsigned char subname[32]; /* subdevice name */
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292 int dev_class; /* SNDRV_PCM_CLASS_* */
293 int dev_subclass; /* SNDRV_PCM_SUBCLASS_* */
1da177e4
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294 unsigned int subdevices_count;
295 unsigned int subdevices_avail;
512bbd6a 296 union snd_pcm_sync_id sync; /* hardware synchronization ID */
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297 unsigned char reserved[64]; /* reserved for future... */
298};
299
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300typedef int snd_pcm_hw_param_t;
301#define SNDRV_PCM_HW_PARAM_ACCESS 0 /* Access type */
302#define SNDRV_PCM_HW_PARAM_FORMAT 1 /* Format */
303#define SNDRV_PCM_HW_PARAM_SUBFORMAT 2 /* Subformat */
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304#define SNDRV_PCM_HW_PARAM_FIRST_MASK SNDRV_PCM_HW_PARAM_ACCESS
305#define SNDRV_PCM_HW_PARAM_LAST_MASK SNDRV_PCM_HW_PARAM_SUBFORMAT
306
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307#define SNDRV_PCM_HW_PARAM_SAMPLE_BITS 8 /* Bits per sample */
308#define SNDRV_PCM_HW_PARAM_FRAME_BITS 9 /* Bits per frame */
309#define SNDRV_PCM_HW_PARAM_CHANNELS 10 /* Channels */
310#define SNDRV_PCM_HW_PARAM_RATE 11 /* Approx rate */
311#define SNDRV_PCM_HW_PARAM_PERIOD_TIME 12 /* Approx distance between
312 * interrupts in us
313 */
314#define SNDRV_PCM_HW_PARAM_PERIOD_SIZE 13 /* Approx frames between
315 * interrupts
316 */
317#define SNDRV_PCM_HW_PARAM_PERIOD_BYTES 14 /* Approx bytes between
318 * interrupts
319 */
320#define SNDRV_PCM_HW_PARAM_PERIODS 15 /* Approx interrupts per
321 * buffer
322 */
323#define SNDRV_PCM_HW_PARAM_BUFFER_TIME 16 /* Approx duration of buffer
324 * in us
325 */
326#define SNDRV_PCM_HW_PARAM_BUFFER_SIZE 17 /* Size of buffer in frames */
327#define SNDRV_PCM_HW_PARAM_BUFFER_BYTES 18 /* Size of buffer in bytes */
328#define SNDRV_PCM_HW_PARAM_TICK_TIME 19 /* Approx tick duration in us */
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329#define SNDRV_PCM_HW_PARAM_FIRST_INTERVAL SNDRV_PCM_HW_PARAM_SAMPLE_BITS
330#define SNDRV_PCM_HW_PARAM_LAST_INTERVAL SNDRV_PCM_HW_PARAM_TICK_TIME
1da177e4 331
a99606d2 332#define SNDRV_PCM_HW_PARAMS_NORESAMPLE (1<<0) /* avoid rate resampling */
1da177e4 333
512bbd6a 334struct snd_interval {
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LT
335 unsigned int min, max;
336 unsigned int openmin:1,
337 openmax:1,
338 integer:1,
339 empty:1;
340};
341
342#define SNDRV_MASK_MAX 256
343
512bbd6a 344struct snd_mask {
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345 u_int32_t bits[(SNDRV_MASK_MAX+31)/32];
346};
347
512bbd6a 348struct snd_pcm_hw_params {
1da177e4 349 unsigned int flags;
512bbd6a 350 struct snd_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK -
1da177e4 351 SNDRV_PCM_HW_PARAM_FIRST_MASK + 1];
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352 struct snd_mask mres[5]; /* reserved masks */
353 struct snd_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL -
1da177e4 354 SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1];
512bbd6a 355 struct snd_interval ires[9]; /* reserved intervals */
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LT
356 unsigned int rmask; /* W: requested masks */
357 unsigned int cmask; /* R: changed masks */
358 unsigned int info; /* R: Info flags for returned setup */
359 unsigned int msbits; /* R: used most significant bits */
360 unsigned int rate_num; /* R: rate numerator */
361 unsigned int rate_den; /* R: rate denominator */
512bbd6a 362 snd_pcm_uframes_t fifo_size; /* R: chip FIFO size in frames */
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363 unsigned char reserved[64]; /* reserved for future */
364};
365
512bbd6a 366enum {
1da177e4 367 SNDRV_PCM_TSTAMP_NONE = 0,
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368 SNDRV_PCM_TSTAMP_ENABLE,
369 SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_ENABLE,
1da177e4
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370};
371
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372struct snd_pcm_sw_params {
373 int tstamp_mode; /* timestamp mode */
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LT
374 unsigned int period_step;
375 unsigned int sleep_min; /* min ticks to sleep */
512bbd6a 376 snd_pcm_uframes_t avail_min; /* min avail frames for wakeup */
d948035a 377 snd_pcm_uframes_t xfer_align; /* obsolete: xfer size need to be a multiple */
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TI
378 snd_pcm_uframes_t start_threshold; /* min hw_avail frames for automatic start */
379 snd_pcm_uframes_t stop_threshold; /* min avail frames for automatic stop */
380 snd_pcm_uframes_t silence_threshold; /* min distance from noise for silence filling */
381 snd_pcm_uframes_t silence_size; /* silence block size */
382 snd_pcm_uframes_t boundary; /* pointers wrap point */
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LT
383 unsigned char reserved[64]; /* reserved for future */
384};
385
512bbd6a 386struct snd_pcm_channel_info {
1da177e4
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387 unsigned int channel;
388 off_t offset; /* mmap offset */
389 unsigned int first; /* offset to first sample in bits */
390 unsigned int step; /* samples distance in bits */
391};
392
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393struct snd_pcm_status {
394 snd_pcm_state_t state; /* stream state */
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LT
395 struct timespec trigger_tstamp; /* time when stream was started/stopped/paused */
396 struct timespec tstamp; /* reference timestamp */
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397 snd_pcm_uframes_t appl_ptr; /* appl ptr */
398 snd_pcm_uframes_t hw_ptr; /* hw ptr */
399 snd_pcm_sframes_t delay; /* current delay in frames */
400 snd_pcm_uframes_t avail; /* number of frames available */
401 snd_pcm_uframes_t avail_max; /* max frames available on hw since last status */
402 snd_pcm_uframes_t overrange; /* count of ADC (capture) overrange detections from last status */
403 snd_pcm_state_t suspended_state; /* suspended stream state */
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LT
404 unsigned char reserved[60]; /* must be filled with zero */
405};
406
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407struct snd_pcm_mmap_status {
408 snd_pcm_state_t state; /* RO: state - SNDRV_PCM_STATE_XXXX */
1da177e4 409 int pad1; /* Needed for 64 bit alignment */
512bbd6a 410 snd_pcm_uframes_t hw_ptr; /* RO: hw ptr (0...boundary-1) */
1da177e4 411 struct timespec tstamp; /* Timestamp */
512bbd6a 412 snd_pcm_state_t suspended_state; /* RO: suspended stream state */
1da177e4
LT
413};
414
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415struct snd_pcm_mmap_control {
416 snd_pcm_uframes_t appl_ptr; /* RW: appl ptr (0...boundary-1) */
417 snd_pcm_uframes_t avail_min; /* RW: min available frames for wakeup */
1da177e4
LT
418};
419
420#define SNDRV_PCM_SYNC_PTR_HWSYNC (1<<0) /* execute hwsync */
421#define SNDRV_PCM_SYNC_PTR_APPL (1<<1) /* get appl_ptr from driver (r/w op) */
422#define SNDRV_PCM_SYNC_PTR_AVAIL_MIN (1<<2) /* get avail_min from driver */
423
512bbd6a 424struct snd_pcm_sync_ptr {
1da177e4
LT
425 unsigned int flags;
426 union {
512bbd6a 427 struct snd_pcm_mmap_status status;
1da177e4
LT
428 unsigned char reserved[64];
429 } s;
430 union {
512bbd6a 431 struct snd_pcm_mmap_control control;
1da177e4
LT
432 unsigned char reserved[64];
433 } c;
434};
435
512bbd6a
TI
436struct snd_xferi {
437 snd_pcm_sframes_t result;
1da177e4 438 void __user *buf;
512bbd6a 439 snd_pcm_uframes_t frames;
1da177e4
LT
440};
441
512bbd6a
TI
442struct snd_xfern {
443 snd_pcm_sframes_t result;
1da177e4 444 void __user * __user *bufs;
512bbd6a 445 snd_pcm_uframes_t frames;
1da177e4
LT
446};
447
b751eef1
JK
448enum {
449 SNDRV_PCM_TSTAMP_TYPE_GETTIMEOFDAY = 0, /* gettimeofday equivalent */
450 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC, /* posix_clock_monotonic equivalent */
451 SNDRV_PCM_TSTAMP_TYPE_LAST = SNDRV_PCM_TSTAMP_TYPE_MONOTONIC,
452};
453
1da177e4
LT
454enum {
455 SNDRV_PCM_IOCTL_PVERSION = _IOR('A', 0x00, int),
512bbd6a 456 SNDRV_PCM_IOCTL_INFO = _IOR('A', 0x01, struct snd_pcm_info),
28e9e473 457 SNDRV_PCM_IOCTL_TSTAMP = _IOW('A', 0x02, int),
b751eef1 458 SNDRV_PCM_IOCTL_TTSTAMP = _IOW('A', 0x03, int),
512bbd6a
TI
459 SNDRV_PCM_IOCTL_HW_REFINE = _IOWR('A', 0x10, struct snd_pcm_hw_params),
460 SNDRV_PCM_IOCTL_HW_PARAMS = _IOWR('A', 0x11, struct snd_pcm_hw_params),
1da177e4 461 SNDRV_PCM_IOCTL_HW_FREE = _IO('A', 0x12),
512bbd6a
TI
462 SNDRV_PCM_IOCTL_SW_PARAMS = _IOWR('A', 0x13, struct snd_pcm_sw_params),
463 SNDRV_PCM_IOCTL_STATUS = _IOR('A', 0x20, struct snd_pcm_status),
464 SNDRV_PCM_IOCTL_DELAY = _IOR('A', 0x21, snd_pcm_sframes_t),
1da177e4 465 SNDRV_PCM_IOCTL_HWSYNC = _IO('A', 0x22),
512bbd6a
TI
466 SNDRV_PCM_IOCTL_SYNC_PTR = _IOWR('A', 0x23, struct snd_pcm_sync_ptr),
467 SNDRV_PCM_IOCTL_CHANNEL_INFO = _IOR('A', 0x32, struct snd_pcm_channel_info),
1da177e4
LT
468 SNDRV_PCM_IOCTL_PREPARE = _IO('A', 0x40),
469 SNDRV_PCM_IOCTL_RESET = _IO('A', 0x41),
470 SNDRV_PCM_IOCTL_START = _IO('A', 0x42),
471 SNDRV_PCM_IOCTL_DROP = _IO('A', 0x43),
472 SNDRV_PCM_IOCTL_DRAIN = _IO('A', 0x44),
473 SNDRV_PCM_IOCTL_PAUSE = _IOW('A', 0x45, int),
512bbd6a 474 SNDRV_PCM_IOCTL_REWIND = _IOW('A', 0x46, snd_pcm_uframes_t),
1da177e4
LT
475 SNDRV_PCM_IOCTL_RESUME = _IO('A', 0x47),
476 SNDRV_PCM_IOCTL_XRUN = _IO('A', 0x48),
512bbd6a
TI
477 SNDRV_PCM_IOCTL_FORWARD = _IOW('A', 0x49, snd_pcm_uframes_t),
478 SNDRV_PCM_IOCTL_WRITEI_FRAMES = _IOW('A', 0x50, struct snd_xferi),
479 SNDRV_PCM_IOCTL_READI_FRAMES = _IOR('A', 0x51, struct snd_xferi),
480 SNDRV_PCM_IOCTL_WRITEN_FRAMES = _IOW('A', 0x52, struct snd_xfern),
481 SNDRV_PCM_IOCTL_READN_FRAMES = _IOR('A', 0x53, struct snd_xfern),
1da177e4
LT
482 SNDRV_PCM_IOCTL_LINK = _IOW('A', 0x60, int),
483 SNDRV_PCM_IOCTL_UNLINK = _IO('A', 0x61),
484};
485
486/* Trick to make alsa-lib/acinclude.m4 happy */
487#define SNDRV_PCM_IOCTL_REWIND SNDRV_PCM_IOCTL_REWIND
488
489/*****************************************************************************
490 * *
491 * MIDI v1.0 interface *
492 * *
493 *****************************************************************************/
494
495/*
496 * Raw MIDI section - /dev/snd/midi??
497 */
498
499#define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 0)
500
512bbd6a 501enum {
1da177e4
LT
502 SNDRV_RAWMIDI_STREAM_OUTPUT = 0,
503 SNDRV_RAWMIDI_STREAM_INPUT,
504 SNDRV_RAWMIDI_STREAM_LAST = SNDRV_RAWMIDI_STREAM_INPUT,
505};
506
507#define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001
508#define SNDRV_RAWMIDI_INFO_INPUT 0x00000002
509#define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004
510
512bbd6a 511struct snd_rawmidi_info {
1da177e4
LT
512 unsigned int device; /* RO/WR (control): device number */
513 unsigned int subdevice; /* RO/WR (control): subdevice number */
512bbd6a 514 int stream; /* WR: stream */
1da177e4
LT
515 int card; /* R: card number */
516 unsigned int flags; /* SNDRV_RAWMIDI_INFO_XXXX */
517 unsigned char id[64]; /* ID (user selectable) */
518 unsigned char name[80]; /* name of device */
519 unsigned char subname[32]; /* name of active or selected subdevice */
520 unsigned int subdevices_count;
521 unsigned int subdevices_avail;
522 unsigned char reserved[64]; /* reserved for future use */
523};
524
512bbd6a
TI
525struct snd_rawmidi_params {
526 int stream;
1da177e4
LT
527 size_t buffer_size; /* queue size in bytes */
528 size_t avail_min; /* minimum avail bytes for wakeup */
529 unsigned int no_active_sensing: 1; /* do not send active sensing byte in close() */
530 unsigned char reserved[16]; /* reserved for future use */
531};
532
512bbd6a
TI
533struct snd_rawmidi_status {
534 int stream;
1da177e4
LT
535 struct timespec tstamp; /* Timestamp */
536 size_t avail; /* available bytes */
537 size_t xruns; /* count of overruns since last status (in bytes) */
538 unsigned char reserved[16]; /* reserved for future use */
539};
540
541enum {
542 SNDRV_RAWMIDI_IOCTL_PVERSION = _IOR('W', 0x00, int),
512bbd6a
TI
543 SNDRV_RAWMIDI_IOCTL_INFO = _IOR('W', 0x01, struct snd_rawmidi_info),
544 SNDRV_RAWMIDI_IOCTL_PARAMS = _IOWR('W', 0x10, struct snd_rawmidi_params),
545 SNDRV_RAWMIDI_IOCTL_STATUS = _IOWR('W', 0x20, struct snd_rawmidi_status),
1da177e4
LT
546 SNDRV_RAWMIDI_IOCTL_DROP = _IOW('W', 0x30, int),
547 SNDRV_RAWMIDI_IOCTL_DRAIN = _IOW('W', 0x31, int),
548};
549
550/*
551 * Timer section - /dev/snd/timer
552 */
553
a501dfa3 554#define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 5)
1da177e4 555
512bbd6a 556enum {
1da177e4
LT
557 SNDRV_TIMER_CLASS_NONE = -1,
558 SNDRV_TIMER_CLASS_SLAVE = 0,
559 SNDRV_TIMER_CLASS_GLOBAL,
560 SNDRV_TIMER_CLASS_CARD,
561 SNDRV_TIMER_CLASS_PCM,
562 SNDRV_TIMER_CLASS_LAST = SNDRV_TIMER_CLASS_PCM,
563};
564
565/* slave timer classes */
512bbd6a 566enum {
1da177e4
LT
567 SNDRV_TIMER_SCLASS_NONE = 0,
568 SNDRV_TIMER_SCLASS_APPLICATION,
569 SNDRV_TIMER_SCLASS_SEQUENCER, /* alias */
570 SNDRV_TIMER_SCLASS_OSS_SEQUENCER, /* alias */
571 SNDRV_TIMER_SCLASS_LAST = SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
572};
573
574/* global timers (device member) */
575#define SNDRV_TIMER_GLOBAL_SYSTEM 0
576#define SNDRV_TIMER_GLOBAL_RTC 1
577#define SNDRV_TIMER_GLOBAL_HPET 2
578
579/* info flags */
580#define SNDRV_TIMER_FLG_SLAVE (1<<0) /* cannot be controlled */
581
512bbd6a
TI
582struct snd_timer_id {
583 int dev_class;
584 int dev_sclass;
1da177e4
LT
585 int card;
586 int device;
587 int subdevice;
588};
589
512bbd6a
TI
590struct snd_timer_ginfo {
591 struct snd_timer_id tid; /* requested timer ID */
1da177e4
LT
592 unsigned int flags; /* timer flags - SNDRV_TIMER_FLG_* */
593 int card; /* card number */
594 unsigned char id[64]; /* timer identification */
595 unsigned char name[80]; /* timer name */
596 unsigned long reserved0; /* reserved for future use */
597 unsigned long resolution; /* average period resolution in ns */
598 unsigned long resolution_min; /* minimal period resolution in ns */
599 unsigned long resolution_max; /* maximal period resolution in ns */
600 unsigned int clients; /* active timer clients */
601 unsigned char reserved[32];
602};
603
512bbd6a
TI
604struct snd_timer_gparams {
605 struct snd_timer_id tid; /* requested timer ID */
1da177e4
LT
606 unsigned long period_num; /* requested precise period duration (in seconds) - numerator */
607 unsigned long period_den; /* requested precise period duration (in seconds) - denominator */
608 unsigned char reserved[32];
609};
610
512bbd6a
TI
611struct snd_timer_gstatus {
612 struct snd_timer_id tid; /* requested timer ID */
1da177e4
LT
613 unsigned long resolution; /* current period resolution in ns */
614 unsigned long resolution_num; /* precise current period resolution (in seconds) - numerator */
615 unsigned long resolution_den; /* precise current period resolution (in seconds) - denominator */
616 unsigned char reserved[32];
617};
618
512bbd6a
TI
619struct snd_timer_select {
620 struct snd_timer_id id; /* bind to timer ID */
1da177e4
LT
621 unsigned char reserved[32]; /* reserved */
622};
623
512bbd6a 624struct snd_timer_info {
1da177e4
LT
625 unsigned int flags; /* timer flags - SNDRV_TIMER_FLG_* */
626 int card; /* card number */
627 unsigned char id[64]; /* timer identificator */
628 unsigned char name[80]; /* timer name */
629 unsigned long reserved0; /* reserved for future use */
630 unsigned long resolution; /* average period resolution in ns */
631 unsigned char reserved[64]; /* reserved */
632};
633
634#define SNDRV_TIMER_PSFLG_AUTO (1<<0) /* auto start, otherwise one-shot */
635#define SNDRV_TIMER_PSFLG_EXCLUSIVE (1<<1) /* exclusive use, precise start/stop/pause/continue */
636#define SNDRV_TIMER_PSFLG_EARLY_EVENT (1<<2) /* write early event to the poll queue */
637
512bbd6a 638struct snd_timer_params {
1da177e4
LT
639 unsigned int flags; /* flags - SNDRV_MIXER_PSFLG_* */
640 unsigned int ticks; /* requested resolution in ticks */
641 unsigned int queue_size; /* total size of queue (32-1024) */
642 unsigned int reserved0; /* reserved, was: failure locations */
643 unsigned int filter; /* event filter (bitmask of SNDRV_TIMER_EVENT_*) */
644 unsigned char reserved[60]; /* reserved */
645};
646
512bbd6a 647struct snd_timer_status {
1da177e4
LT
648 struct timespec tstamp; /* Timestamp - last update */
649 unsigned int resolution; /* current period resolution in ns */
650 unsigned int lost; /* counter of master tick lost */
651 unsigned int overrun; /* count of read queue overruns */
652 unsigned int queue; /* used queue size */
653 unsigned char reserved[64]; /* reserved */
654};
655
656enum {
657 SNDRV_TIMER_IOCTL_PVERSION = _IOR('T', 0x00, int),
512bbd6a 658 SNDRV_TIMER_IOCTL_NEXT_DEVICE = _IOWR('T', 0x01, struct snd_timer_id),
1da177e4 659 SNDRV_TIMER_IOCTL_TREAD = _IOW('T', 0x02, int),
512bbd6a
TI
660 SNDRV_TIMER_IOCTL_GINFO = _IOWR('T', 0x03, struct snd_timer_ginfo),
661 SNDRV_TIMER_IOCTL_GPARAMS = _IOW('T', 0x04, struct snd_timer_gparams),
662 SNDRV_TIMER_IOCTL_GSTATUS = _IOWR('T', 0x05, struct snd_timer_gstatus),
663 SNDRV_TIMER_IOCTL_SELECT = _IOW('T', 0x10, struct snd_timer_select),
664 SNDRV_TIMER_IOCTL_INFO = _IOR('T', 0x11, struct snd_timer_info),
665 SNDRV_TIMER_IOCTL_PARAMS = _IOW('T', 0x12, struct snd_timer_params),
666 SNDRV_TIMER_IOCTL_STATUS = _IOR('T', 0x14, struct snd_timer_status),
8c50b37c
TI
667 /* The following four ioctls are changed since 1.0.9 due to confliction */
668 SNDRV_TIMER_IOCTL_START = _IO('T', 0xa0),
669 SNDRV_TIMER_IOCTL_STOP = _IO('T', 0xa1),
670 SNDRV_TIMER_IOCTL_CONTINUE = _IO('T', 0xa2),
671 SNDRV_TIMER_IOCTL_PAUSE = _IO('T', 0xa3),
1da177e4
LT
672};
673
512bbd6a 674struct snd_timer_read {
1da177e4
LT
675 unsigned int resolution;
676 unsigned int ticks;
677};
678
512bbd6a 679enum {
1da177e4
LT
680 SNDRV_TIMER_EVENT_RESOLUTION = 0, /* val = resolution in ns */
681 SNDRV_TIMER_EVENT_TICK, /* val = ticks */
682 SNDRV_TIMER_EVENT_START, /* val = resolution in ns */
683 SNDRV_TIMER_EVENT_STOP, /* val = 0 */
684 SNDRV_TIMER_EVENT_CONTINUE, /* val = resolution in ns */
685 SNDRV_TIMER_EVENT_PAUSE, /* val = 0 */
686 SNDRV_TIMER_EVENT_EARLY, /* val = 0, early event */
a501dfa3 687 SNDRV_TIMER_EVENT_SUSPEND, /* val = 0 */
5ca307b2 688 SNDRV_TIMER_EVENT_RESUME, /* val = resolution in ns */
1da177e4
LT
689 /* master timer events for slave timer instances */
690 SNDRV_TIMER_EVENT_MSTART = SNDRV_TIMER_EVENT_START + 10,
691 SNDRV_TIMER_EVENT_MSTOP = SNDRV_TIMER_EVENT_STOP + 10,
692 SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10,
693 SNDRV_TIMER_EVENT_MPAUSE = SNDRV_TIMER_EVENT_PAUSE + 10,
a501dfa3
JK
694 SNDRV_TIMER_EVENT_MSUSPEND = SNDRV_TIMER_EVENT_SUSPEND + 10,
695 SNDRV_TIMER_EVENT_MRESUME = SNDRV_TIMER_EVENT_RESUME + 10,
1da177e4
LT
696};
697
512bbd6a
TI
698struct snd_timer_tread {
699 int event;
1da177e4
LT
700 struct timespec tstamp;
701 unsigned int val;
702};
703
704/****************************************************************************
705 * *
706 * Section for driver control interface - /dev/snd/control? *
707 * *
708 ****************************************************************************/
709
ff33f230 710#define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 6)
1da177e4 711
512bbd6a 712struct snd_ctl_card_info {
1da177e4
LT
713 int card; /* card number */
714 int pad; /* reserved for future (was type) */
715 unsigned char id[16]; /* ID of card (user selectable) */
716 unsigned char driver[16]; /* Driver name */
717 unsigned char name[32]; /* Short name of soundcard */
718 unsigned char longname[80]; /* name + info text about soundcard */
719 unsigned char reserved_[16]; /* reserved for future (was ID of mixer) */
720 unsigned char mixername[80]; /* visual mixer identification */
ff33f230 721 unsigned char components[128]; /* card components / fine identification, delimited with one space (AC97 etc..) */
1da177e4
LT
722};
723
512bbd6a
TI
724typedef int __bitwise snd_ctl_elem_type_t;
725#define SNDRV_CTL_ELEM_TYPE_NONE ((__force snd_ctl_elem_type_t) 0) /* invalid */
726#define SNDRV_CTL_ELEM_TYPE_BOOLEAN ((__force snd_ctl_elem_type_t) 1) /* boolean type */
727#define SNDRV_CTL_ELEM_TYPE_INTEGER ((__force snd_ctl_elem_type_t) 2) /* integer type */
728#define SNDRV_CTL_ELEM_TYPE_ENUMERATED ((__force snd_ctl_elem_type_t) 3) /* enumerated type */
729#define SNDRV_CTL_ELEM_TYPE_BYTES ((__force snd_ctl_elem_type_t) 4) /* byte array */
730#define SNDRV_CTL_ELEM_TYPE_IEC958 ((__force snd_ctl_elem_type_t) 5) /* IEC958 (S/PDIF) setup */
731#define SNDRV_CTL_ELEM_TYPE_INTEGER64 ((__force snd_ctl_elem_type_t) 6) /* 64-bit integer type */
732#define SNDRV_CTL_ELEM_TYPE_LAST SNDRV_CTL_ELEM_TYPE_INTEGER64
733
734typedef int __bitwise snd_ctl_elem_iface_t;
735#define SNDRV_CTL_ELEM_IFACE_CARD ((__force snd_ctl_elem_iface_t) 0) /* global control */
736#define SNDRV_CTL_ELEM_IFACE_HWDEP ((__force snd_ctl_elem_iface_t) 1) /* hardware dependent device */
737#define SNDRV_CTL_ELEM_IFACE_MIXER ((__force snd_ctl_elem_iface_t) 2) /* virtual mixer device */
738#define SNDRV_CTL_ELEM_IFACE_PCM ((__force snd_ctl_elem_iface_t) 3) /* PCM device */
739#define SNDRV_CTL_ELEM_IFACE_RAWMIDI ((__force snd_ctl_elem_iface_t) 4) /* RawMidi device */
740#define SNDRV_CTL_ELEM_IFACE_TIMER ((__force snd_ctl_elem_iface_t) 5) /* timer device */
741#define SNDRV_CTL_ELEM_IFACE_SEQUENCER ((__force snd_ctl_elem_iface_t) 6) /* sequencer client */
742#define SNDRV_CTL_ELEM_IFACE_LAST SNDRV_CTL_ELEM_IFACE_SEQUENCER
1da177e4
LT
743
744#define SNDRV_CTL_ELEM_ACCESS_READ (1<<0)
745#define SNDRV_CTL_ELEM_ACCESS_WRITE (1<<1)
746#define SNDRV_CTL_ELEM_ACCESS_READWRITE (SNDRV_CTL_ELEM_ACCESS_READ|SNDRV_CTL_ELEM_ACCESS_WRITE)
747#define SNDRV_CTL_ELEM_ACCESS_VOLATILE (1<<2) /* control value may be changed without a notification */
8aa9b586
JK
748#define SNDRV_CTL_ELEM_ACCESS_TIMESTAMP (1<<3) /* when was control changed */
749#define SNDRV_CTL_ELEM_ACCESS_TLV_READ (1<<4) /* TLV read is possible */
750#define SNDRV_CTL_ELEM_ACCESS_TLV_WRITE (1<<5) /* TLV write is possible */
751#define SNDRV_CTL_ELEM_ACCESS_TLV_READWRITE (SNDRV_CTL_ELEM_ACCESS_TLV_READ|SNDRV_CTL_ELEM_ACCESS_TLV_WRITE)
752#define SNDRV_CTL_ELEM_ACCESS_TLV_COMMAND (1<<6) /* TLV command is possible */
1da177e4
LT
753#define SNDRV_CTL_ELEM_ACCESS_INACTIVE (1<<8) /* control does actually nothing, but may be updated */
754#define SNDRV_CTL_ELEM_ACCESS_LOCK (1<<9) /* write lock */
755#define SNDRV_CTL_ELEM_ACCESS_OWNER (1<<10) /* write lock owner */
8aa9b586 756#define SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK (1<<28) /* kernel use a TLV callback */
1da177e4 757#define SNDRV_CTL_ELEM_ACCESS_USER (1<<29) /* user space element */
8ace4f3c 758/* bits 30 and 31 are obsoleted (for indirect access) */
1da177e4
LT
759
760/* for further details see the ACPI and PCI power management specification */
761#define SNDRV_CTL_POWER_D0 0x0000 /* full On */
762#define SNDRV_CTL_POWER_D1 0x0100 /* partial On */
763#define SNDRV_CTL_POWER_D2 0x0200 /* partial On */
764#define SNDRV_CTL_POWER_D3 0x0300 /* Off */
765#define SNDRV_CTL_POWER_D3hot (SNDRV_CTL_POWER_D3|0x0000) /* Off, with power */
766#define SNDRV_CTL_POWER_D3cold (SNDRV_CTL_POWER_D3|0x0001) /* Off, without power */
767
512bbd6a 768struct snd_ctl_elem_id {
1da177e4 769 unsigned int numid; /* numeric identifier, zero = invalid */
512bbd6a 770 snd_ctl_elem_iface_t iface; /* interface identifier */
1da177e4
LT
771 unsigned int device; /* device/client number */
772 unsigned int subdevice; /* subdevice (substream) number */
773 unsigned char name[44]; /* ASCII name of item */
774 unsigned int index; /* index of item */
775};
776
512bbd6a 777struct snd_ctl_elem_list {
1da177e4
LT
778 unsigned int offset; /* W: first element ID to get */
779 unsigned int space; /* W: count of element IDs to get */
780 unsigned int used; /* R: count of element IDs set */
781 unsigned int count; /* R: count of all elements */
512bbd6a 782 struct snd_ctl_elem_id __user *pids; /* R: IDs */
1da177e4
LT
783 unsigned char reserved[50];
784};
785
512bbd6a
TI
786struct snd_ctl_elem_info {
787 struct snd_ctl_elem_id id; /* W: element ID */
788 snd_ctl_elem_type_t type; /* R: value type - SNDRV_CTL_ELEM_TYPE_* */
1da177e4
LT
789 unsigned int access; /* R: value access (bitmask) - SNDRV_CTL_ELEM_ACCESS_* */
790 unsigned int count; /* count of values */
791 pid_t owner; /* owner's PID of this control */
792 union {
793 struct {
794 long min; /* R: minimum value */
795 long max; /* R: maximum value */
796 long step; /* R: step (0 variable) */
797 } integer;
798 struct {
799 long long min; /* R: minimum value */
800 long long max; /* R: maximum value */
801 long long step; /* R: step (0 variable) */
802 } integer64;
803 struct {
804 unsigned int items; /* R: number of items */
805 unsigned int item; /* W: item number */
806 char name[64]; /* R: value name */
807 } enumerated;
808 unsigned char reserved[128];
809 } value;
810 union {
811 unsigned short d[4]; /* dimensions */
8ace4f3c 812 unsigned short *d_ptr; /* indirect - obsoleted */
1da177e4
LT
813 } dimen;
814 unsigned char reserved[64-4*sizeof(unsigned short)];
815};
816
512bbd6a
TI
817struct snd_ctl_elem_value {
818 struct snd_ctl_elem_id id; /* W: element ID */
8ace4f3c 819 unsigned int indirect: 1; /* W: indirect access - obsoleted */
1da177e4
LT
820 union {
821 union {
822 long value[128];
8ace4f3c 823 long *value_ptr; /* obsoleted */
1da177e4
LT
824 } integer;
825 union {
826 long long value[64];
8ace4f3c 827 long long *value_ptr; /* obsoleted */
1da177e4
LT
828 } integer64;
829 union {
830 unsigned int item[128];
8ace4f3c 831 unsigned int *item_ptr; /* obsoleted */
1da177e4
LT
832 } enumerated;
833 union {
834 unsigned char data[512];
8ace4f3c 835 unsigned char *data_ptr; /* obsoleted */
1da177e4 836 } bytes;
512bbd6a 837 struct snd_aes_iec958 iec958;
1da177e4
LT
838 } value; /* RO */
839 struct timespec tstamp;
840 unsigned char reserved[128-sizeof(struct timespec)];
841};
842
42750b04
JK
843struct snd_ctl_tlv {
844 unsigned int numid; /* control element numeric identification */
845 unsigned int length; /* in bytes aligned to 4 */
846 unsigned int tlv[0]; /* first TLV */
847};
848
1da177e4
LT
849enum {
850 SNDRV_CTL_IOCTL_PVERSION = _IOR('U', 0x00, int),
512bbd6a
TI
851 SNDRV_CTL_IOCTL_CARD_INFO = _IOR('U', 0x01, struct snd_ctl_card_info),
852 SNDRV_CTL_IOCTL_ELEM_LIST = _IOWR('U', 0x10, struct snd_ctl_elem_list),
853 SNDRV_CTL_IOCTL_ELEM_INFO = _IOWR('U', 0x11, struct snd_ctl_elem_info),
854 SNDRV_CTL_IOCTL_ELEM_READ = _IOWR('U', 0x12, struct snd_ctl_elem_value),
855 SNDRV_CTL_IOCTL_ELEM_WRITE = _IOWR('U', 0x13, struct snd_ctl_elem_value),
856 SNDRV_CTL_IOCTL_ELEM_LOCK = _IOW('U', 0x14, struct snd_ctl_elem_id),
857 SNDRV_CTL_IOCTL_ELEM_UNLOCK = _IOW('U', 0x15, struct snd_ctl_elem_id),
1da177e4 858 SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS = _IOWR('U', 0x16, int),
512bbd6a
TI
859 SNDRV_CTL_IOCTL_ELEM_ADD = _IOWR('U', 0x17, struct snd_ctl_elem_info),
860 SNDRV_CTL_IOCTL_ELEM_REPLACE = _IOWR('U', 0x18, struct snd_ctl_elem_info),
861 SNDRV_CTL_IOCTL_ELEM_REMOVE = _IOWR('U', 0x19, struct snd_ctl_elem_id),
42750b04 862 SNDRV_CTL_IOCTL_TLV_READ = _IOWR('U', 0x1a, struct snd_ctl_tlv),
8aa9b586
JK
863 SNDRV_CTL_IOCTL_TLV_WRITE = _IOWR('U', 0x1b, struct snd_ctl_tlv),
864 SNDRV_CTL_IOCTL_TLV_COMMAND = _IOWR('U', 0x1c, struct snd_ctl_tlv),
1da177e4 865 SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE = _IOWR('U', 0x20, int),
512bbd6a 866 SNDRV_CTL_IOCTL_HWDEP_INFO = _IOR('U', 0x21, struct snd_hwdep_info),
1da177e4 867 SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE = _IOR('U', 0x30, int),
512bbd6a 868 SNDRV_CTL_IOCTL_PCM_INFO = _IOWR('U', 0x31, struct snd_pcm_info),
1da177e4
LT
869 SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE = _IOW('U', 0x32, int),
870 SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE = _IOWR('U', 0x40, int),
512bbd6a 871 SNDRV_CTL_IOCTL_RAWMIDI_INFO = _IOWR('U', 0x41, struct snd_rawmidi_info),
1da177e4
LT
872 SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE = _IOW('U', 0x42, int),
873 SNDRV_CTL_IOCTL_POWER = _IOWR('U', 0xd0, int),
874 SNDRV_CTL_IOCTL_POWER_STATE = _IOR('U', 0xd1, int),
875};
876
877/*
878 * Read interface.
879 */
880
881enum sndrv_ctl_event_type {
882 SNDRV_CTL_EVENT_ELEM = 0,
883 SNDRV_CTL_EVENT_LAST = SNDRV_CTL_EVENT_ELEM,
884};
885
886#define SNDRV_CTL_EVENT_MASK_VALUE (1<<0) /* element value was changed */
887#define SNDRV_CTL_EVENT_MASK_INFO (1<<1) /* element info was changed */
888#define SNDRV_CTL_EVENT_MASK_ADD (1<<2) /* element was added */
8aa9b586 889#define SNDRV_CTL_EVENT_MASK_TLV (1<<3) /* element TLV tree was changed */
1da177e4
LT
890#define SNDRV_CTL_EVENT_MASK_REMOVE (~0U) /* element was removed */
891
512bbd6a
TI
892struct snd_ctl_event {
893 int type; /* event type - SNDRV_CTL_EVENT_* */
1da177e4
LT
894 union {
895 struct {
896 unsigned int mask;
512bbd6a 897 struct snd_ctl_elem_id id;
1da177e4
LT
898 } elem;
899 unsigned char data8[60];
900 } data;
901};
902
903/*
904 * Control names
905 */
906
907#define SNDRV_CTL_NAME_NONE ""
908#define SNDRV_CTL_NAME_PLAYBACK "Playback "
909#define SNDRV_CTL_NAME_CAPTURE "Capture "
910
911#define SNDRV_CTL_NAME_IEC958_NONE ""
912#define SNDRV_CTL_NAME_IEC958_SWITCH "Switch"
913#define SNDRV_CTL_NAME_IEC958_VOLUME "Volume"
914#define SNDRV_CTL_NAME_IEC958_DEFAULT "Default"
915#define SNDRV_CTL_NAME_IEC958_MASK "Mask"
916#define SNDRV_CTL_NAME_IEC958_CON_MASK "Con Mask"
917#define SNDRV_CTL_NAME_IEC958_PRO_MASK "Pro Mask"
918#define SNDRV_CTL_NAME_IEC958_PCM_STREAM "PCM Stream"
919#define SNDRV_CTL_NAME_IEC958(expl,direction,what) "IEC958 " expl SNDRV_CTL_NAME_##direction SNDRV_CTL_NAME_IEC958_##what
920
921/*
922 *
923 */
924
512bbd6a 925struct snd_xferv {
1da177e4
LT
926 const struct iovec *vector;
927 unsigned long count;
928};
929
930enum {
512bbd6a
TI
931 SNDRV_IOCTL_READV = _IOW('K', 0x00, struct snd_xferv),
932 SNDRV_IOCTL_WRITEV = _IOW('K', 0x01, struct snd_xferv),
1da177e4
LT
933};
934
935#endif /* __SOUND_ASOUND_H */
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