sh: Renesas R0P7785LC0011RL board support
[deliverable/linux.git] / include / sound / asound.h
CommitLineData
1da177e4
LT
1/*
2 * Advanced Linux Sound Architecture - ALSA - Driver
c1017a4c 3 * Copyright (c) 1994-2003 by Jaroslav Kysela <perex@perex.cz>,
1da177e4
LT
4 * Abramo Bagnara <abramo@alsa-project.org>
5 *
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 */
22
23#ifndef __SOUND_ASOUND_H
24#define __SOUND_ASOUND_H
25
1da177e4 26#ifdef __KERNEL__
6560c349 27#include <linux/ioctl.h>
1da177e4
LT
28#include <linux/types.h>
29#include <linux/time.h>
30#include <asm/byteorder.h>
31
32#ifdef __LITTLE_ENDIAN
33#define SNDRV_LITTLE_ENDIAN
34#else
35#ifdef __BIG_ENDIAN
36#define SNDRV_BIG_ENDIAN
37#else
38#error "Unsupported endian..."
39#endif
40#endif
41
6560c349 42#endif /* __KERNEL__ **/
1da177e4
LT
43
44/*
45 * protocol version
46 */
47
48#define SNDRV_PROTOCOL_VERSION(major, minor, subminor) (((major)<<16)|((minor)<<8)|(subminor))
49#define SNDRV_PROTOCOL_MAJOR(version) (((version)>>16)&0xffff)
50#define SNDRV_PROTOCOL_MINOR(version) (((version)>>8)&0xff)
51#define SNDRV_PROTOCOL_MICRO(version) ((version)&0xff)
52#define SNDRV_PROTOCOL_INCOMPATIBLE(kversion, uversion) \
53 (SNDRV_PROTOCOL_MAJOR(kversion) != SNDRV_PROTOCOL_MAJOR(uversion) || \
54 (SNDRV_PROTOCOL_MAJOR(kversion) == SNDRV_PROTOCOL_MAJOR(uversion) && \
55 SNDRV_PROTOCOL_MINOR(kversion) != SNDRV_PROTOCOL_MINOR(uversion)))
56
57/****************************************************************************
58 * *
59 * Digital audio interface *
60 * *
61 ****************************************************************************/
62
512bbd6a 63struct snd_aes_iec958 {
1da177e4
LT
64 unsigned char status[24]; /* AES/IEC958 channel status bits */
65 unsigned char subcode[147]; /* AES/IEC958 subcode bits */
66 unsigned char pad; /* nothing */
67 unsigned char dig_subframe[4]; /* AES/IEC958 subframe bits */
68};
69
70/****************************************************************************
71 * *
72 * Section for driver hardware dependent interface - /dev/snd/hw? *
73 * *
74 ****************************************************************************/
75
76#define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1)
77
512bbd6a 78enum {
1da177e4
LT
79 SNDRV_HWDEP_IFACE_OPL2 = 0,
80 SNDRV_HWDEP_IFACE_OPL3,
81 SNDRV_HWDEP_IFACE_OPL4,
82 SNDRV_HWDEP_IFACE_SB16CSP, /* Creative Signal Processor */
83 SNDRV_HWDEP_IFACE_EMU10K1, /* FX8010 processor in EMU10K1 chip */
84 SNDRV_HWDEP_IFACE_YSS225, /* Yamaha FX processor */
85 SNDRV_HWDEP_IFACE_ICS2115, /* Wavetable synth */
86 SNDRV_HWDEP_IFACE_SSCAPE, /* Ensoniq SoundScape ISA card (MC68EC000) */
87 SNDRV_HWDEP_IFACE_VX, /* Digigram VX cards */
88 SNDRV_HWDEP_IFACE_MIXART, /* Digigram miXart cards */
89 SNDRV_HWDEP_IFACE_USX2Y, /* Tascam US122, US224 & US428 usb */
90 SNDRV_HWDEP_IFACE_EMUX_WAVETABLE, /* EmuX wavetable */
91 SNDRV_HWDEP_IFACE_BLUETOOTH, /* Bluetooth audio */
92 SNDRV_HWDEP_IFACE_USX2Y_PCM, /* Tascam US122, US224 & US428 rawusb pcm */
93 SNDRV_HWDEP_IFACE_PCXHR, /* Digigram PCXHR */
b259b10c 94 SNDRV_HWDEP_IFACE_SB_RC, /* SB Extigy/Audigy2NX remote control */
2807314d 95 SNDRV_HWDEP_IFACE_HDA, /* HD-audio */
1da177e4
LT
96
97 /* Don't forget to change the following: */
85db3848 98 SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_HDA
1da177e4
LT
99};
100
512bbd6a 101struct snd_hwdep_info {
1da177e4
LT
102 unsigned int device; /* WR: device number */
103 int card; /* R: card number */
104 unsigned char id[64]; /* ID (user selectable) */
105 unsigned char name[80]; /* hwdep name */
512bbd6a 106 int iface; /* hwdep interface */
1da177e4
LT
107 unsigned char reserved[64]; /* reserved for future */
108};
109
110/* generic DSP loader */
512bbd6a 111struct snd_hwdep_dsp_status {
1da177e4
LT
112 unsigned int version; /* R: driver-specific version */
113 unsigned char id[32]; /* R: driver-specific ID string */
114 unsigned int num_dsps; /* R: number of DSP images to transfer */
115 unsigned int dsp_loaded; /* R: bit flags indicating the loaded DSPs */
116 unsigned int chip_ready; /* R: 1 = initialization finished */
117 unsigned char reserved[16]; /* reserved for future use */
118};
119
512bbd6a 120struct snd_hwdep_dsp_image {
1da177e4
LT
121 unsigned int index; /* W: DSP index */
122 unsigned char name[64]; /* W: ID (e.g. file name) */
123 unsigned char __user *image; /* W: binary image */
124 size_t length; /* W: size of image in bytes */
125 unsigned long driver_data; /* W: driver-specific data */
126};
127
128enum {
129 SNDRV_HWDEP_IOCTL_PVERSION = _IOR ('H', 0x00, int),
512bbd6a
TI
130 SNDRV_HWDEP_IOCTL_INFO = _IOR ('H', 0x01, struct snd_hwdep_info),
131 SNDRV_HWDEP_IOCTL_DSP_STATUS = _IOR('H', 0x02, struct snd_hwdep_dsp_status),
132 SNDRV_HWDEP_IOCTL_DSP_LOAD = _IOW('H', 0x03, struct snd_hwdep_dsp_image)
1da177e4
LT
133};
134
135/*****************************************************************************
136 * *
137 * Digital Audio (PCM) interface - /dev/snd/pcm?? *
138 * *
139 *****************************************************************************/
140
b751eef1 141#define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 9)
1da177e4 142
512bbd6a
TI
143typedef unsigned long snd_pcm_uframes_t;
144typedef signed long snd_pcm_sframes_t;
1da177e4 145
512bbd6a 146enum {
1da177e4
LT
147 SNDRV_PCM_CLASS_GENERIC = 0, /* standard mono or stereo device */
148 SNDRV_PCM_CLASS_MULTI, /* multichannel device */
149 SNDRV_PCM_CLASS_MODEM, /* software modem class */
150 SNDRV_PCM_CLASS_DIGITIZER, /* digitizer class */
151 /* Don't forget to change the following: */
152 SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER,
153};
154
512bbd6a 155enum {
1da177e4
LT
156 SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0, /* mono or stereo subdevices are mixed together */
157 SNDRV_PCM_SUBCLASS_MULTI_MIX, /* multichannel subdevices are mixed together */
158 /* Don't forget to change the following: */
159 SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX,
160};
161
512bbd6a 162enum {
1da177e4
LT
163 SNDRV_PCM_STREAM_PLAYBACK = 0,
164 SNDRV_PCM_STREAM_CAPTURE,
165 SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE,
166};
167
512bbd6a
TI
168typedef int __bitwise snd_pcm_access_t;
169#define SNDRV_PCM_ACCESS_MMAP_INTERLEAVED ((__force snd_pcm_access_t) 0) /* interleaved mmap */
170#define SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED ((__force snd_pcm_access_t) 1) /* noninterleaved mmap */
171#define SNDRV_PCM_ACCESS_MMAP_COMPLEX ((__force snd_pcm_access_t) 2) /* complex mmap */
172#define SNDRV_PCM_ACCESS_RW_INTERLEAVED ((__force snd_pcm_access_t) 3) /* readi/writei */
173#define SNDRV_PCM_ACCESS_RW_NONINTERLEAVED ((__force snd_pcm_access_t) 4) /* readn/writen */
174#define SNDRV_PCM_ACCESS_LAST SNDRV_PCM_ACCESS_RW_NONINTERLEAVED
175
176typedef int __bitwise snd_pcm_format_t;
177#define SNDRV_PCM_FORMAT_S8 ((__force snd_pcm_format_t) 0)
178#define SNDRV_PCM_FORMAT_U8 ((__force snd_pcm_format_t) 1)
179#define SNDRV_PCM_FORMAT_S16_LE ((__force snd_pcm_format_t) 2)
180#define SNDRV_PCM_FORMAT_S16_BE ((__force snd_pcm_format_t) 3)
181#define SNDRV_PCM_FORMAT_U16_LE ((__force snd_pcm_format_t) 4)
182#define SNDRV_PCM_FORMAT_U16_BE ((__force snd_pcm_format_t) 5)
183#define SNDRV_PCM_FORMAT_S24_LE ((__force snd_pcm_format_t) 6) /* low three bytes */
184#define SNDRV_PCM_FORMAT_S24_BE ((__force snd_pcm_format_t) 7) /* low three bytes */
185#define SNDRV_PCM_FORMAT_U24_LE ((__force snd_pcm_format_t) 8) /* low three bytes */
186#define SNDRV_PCM_FORMAT_U24_BE ((__force snd_pcm_format_t) 9) /* low three bytes */
187#define SNDRV_PCM_FORMAT_S32_LE ((__force snd_pcm_format_t) 10)
188#define SNDRV_PCM_FORMAT_S32_BE ((__force snd_pcm_format_t) 11)
189#define SNDRV_PCM_FORMAT_U32_LE ((__force snd_pcm_format_t) 12)
190#define SNDRV_PCM_FORMAT_U32_BE ((__force snd_pcm_format_t) 13)
191#define SNDRV_PCM_FORMAT_FLOAT_LE ((__force snd_pcm_format_t) 14) /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */
192#define SNDRV_PCM_FORMAT_FLOAT_BE ((__force snd_pcm_format_t) 15) /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */
193#define SNDRV_PCM_FORMAT_FLOAT64_LE ((__force snd_pcm_format_t) 16) /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */
194#define SNDRV_PCM_FORMAT_FLOAT64_BE ((__force snd_pcm_format_t) 17) /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */
195#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE ((__force snd_pcm_format_t) 18) /* IEC-958 subframe, Little Endian */
196#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE ((__force snd_pcm_format_t) 19) /* IEC-958 subframe, Big Endian */
197#define SNDRV_PCM_FORMAT_MU_LAW ((__force snd_pcm_format_t) 20)
198#define SNDRV_PCM_FORMAT_A_LAW ((__force snd_pcm_format_t) 21)
199#define SNDRV_PCM_FORMAT_IMA_ADPCM ((__force snd_pcm_format_t) 22)
200#define SNDRV_PCM_FORMAT_MPEG ((__force snd_pcm_format_t) 23)
201#define SNDRV_PCM_FORMAT_GSM ((__force snd_pcm_format_t) 24)
202#define SNDRV_PCM_FORMAT_SPECIAL ((__force snd_pcm_format_t) 31)
203#define SNDRV_PCM_FORMAT_S24_3LE ((__force snd_pcm_format_t) 32) /* in three bytes */
204#define SNDRV_PCM_FORMAT_S24_3BE ((__force snd_pcm_format_t) 33) /* in three bytes */
205#define SNDRV_PCM_FORMAT_U24_3LE ((__force snd_pcm_format_t) 34) /* in three bytes */
206#define SNDRV_PCM_FORMAT_U24_3BE ((__force snd_pcm_format_t) 35) /* in three bytes */
207#define SNDRV_PCM_FORMAT_S20_3LE ((__force snd_pcm_format_t) 36) /* in three bytes */
208#define SNDRV_PCM_FORMAT_S20_3BE ((__force snd_pcm_format_t) 37) /* in three bytes */
209#define SNDRV_PCM_FORMAT_U20_3LE ((__force snd_pcm_format_t) 38) /* in three bytes */
210#define SNDRV_PCM_FORMAT_U20_3BE ((__force snd_pcm_format_t) 39) /* in three bytes */
211#define SNDRV_PCM_FORMAT_S18_3LE ((__force snd_pcm_format_t) 40) /* in three bytes */
212#define SNDRV_PCM_FORMAT_S18_3BE ((__force snd_pcm_format_t) 41) /* in three bytes */
213#define SNDRV_PCM_FORMAT_U18_3LE ((__force snd_pcm_format_t) 42) /* in three bytes */
214#define SNDRV_PCM_FORMAT_U18_3BE ((__force snd_pcm_format_t) 43) /* in three bytes */
215#define SNDRV_PCM_FORMAT_LAST SNDRV_PCM_FORMAT_U18_3BE
1da177e4
LT
216
217#ifdef SNDRV_LITTLE_ENDIAN
512bbd6a
TI
218#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_LE
219#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_LE
220#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_LE
221#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_LE
222#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_LE
223#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_LE
224#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_LE
225#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_LE
226#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE
1da177e4
LT
227#endif
228#ifdef SNDRV_BIG_ENDIAN
512bbd6a
TI
229#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_BE
230#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_BE
231#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_BE
232#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_BE
233#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_BE
234#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_BE
235#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_BE
236#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_BE
237#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE
1da177e4 238#endif
1da177e4 239
512bbd6a
TI
240typedef int __bitwise snd_pcm_subformat_t;
241#define SNDRV_PCM_SUBFORMAT_STD ((__force snd_pcm_subformat_t) 0)
242#define SNDRV_PCM_SUBFORMAT_LAST SNDRV_PCM_SUBFORMAT_STD
1da177e4
LT
243
244#define SNDRV_PCM_INFO_MMAP 0x00000001 /* hardware supports mmap */
245#define SNDRV_PCM_INFO_MMAP_VALID 0x00000002 /* period data are valid during transfer */
246#define SNDRV_PCM_INFO_DOUBLE 0x00000004 /* Double buffering needed for PCM start/stop */
247#define SNDRV_PCM_INFO_BATCH 0x00000010 /* double buffering */
248#define SNDRV_PCM_INFO_INTERLEAVED 0x00000100 /* channels are interleaved */
249#define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200 /* channels are not interleaved */
250#define SNDRV_PCM_INFO_COMPLEX 0x00000400 /* complex frame organization (mmap only) */
251#define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000 /* hardware transfer block of samples */
252#define SNDRV_PCM_INFO_OVERRANGE 0x00020000 /* hardware supports ADC (capture) overrange detection */
253#define SNDRV_PCM_INFO_RESUME 0x00040000 /* hardware supports stream resume after suspend */
254#define SNDRV_PCM_INFO_PAUSE 0x00080000 /* pause ioctl is supported */
255#define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000 /* only half duplex */
256#define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000 /* playback and capture stream are somewhat correlated */
257#define SNDRV_PCM_INFO_SYNC_START 0x00400000 /* pcm support some kind of sync go */
258
512bbd6a
TI
259typedef int __bitwise snd_pcm_state_t;
260#define SNDRV_PCM_STATE_OPEN ((__force snd_pcm_state_t) 0) /* stream is open */
261#define SNDRV_PCM_STATE_SETUP ((__force snd_pcm_state_t) 1) /* stream has a setup */
262#define SNDRV_PCM_STATE_PREPARED ((__force snd_pcm_state_t) 2) /* stream is ready to start */
263#define SNDRV_PCM_STATE_RUNNING ((__force snd_pcm_state_t) 3) /* stream is running */
264#define SNDRV_PCM_STATE_XRUN ((__force snd_pcm_state_t) 4) /* stream reached an xrun */
265#define SNDRV_PCM_STATE_DRAINING ((__force snd_pcm_state_t) 5) /* stream is draining */
266#define SNDRV_PCM_STATE_PAUSED ((__force snd_pcm_state_t) 6) /* stream is paused */
267#define SNDRV_PCM_STATE_SUSPENDED ((__force snd_pcm_state_t) 7) /* hardware is suspended */
268#define SNDRV_PCM_STATE_DISCONNECTED ((__force snd_pcm_state_t) 8) /* hardware is disconnected */
269#define SNDRV_PCM_STATE_LAST SNDRV_PCM_STATE_DISCONNECTED
1da177e4
LT
270
271enum {
272 SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000,
273 SNDRV_PCM_MMAP_OFFSET_STATUS = 0x80000000,
274 SNDRV_PCM_MMAP_OFFSET_CONTROL = 0x81000000,
275};
276
512bbd6a 277union snd_pcm_sync_id {
1da177e4
LT
278 unsigned char id[16];
279 unsigned short id16[8];
280 unsigned int id32[4];
281};
282
512bbd6a 283struct snd_pcm_info {
1da177e4
LT
284 unsigned int device; /* RO/WR (control): device number */
285 unsigned int subdevice; /* RO/WR (control): subdevice number */
512bbd6a 286 int stream; /* RO/WR (control): stream direction */
1da177e4
LT
287 int card; /* R: card number */
288 unsigned char id[64]; /* ID (user selectable) */
289 unsigned char name[80]; /* name of this device */
290 unsigned char subname[32]; /* subdevice name */
512bbd6a
TI
291 int dev_class; /* SNDRV_PCM_CLASS_* */
292 int dev_subclass; /* SNDRV_PCM_SUBCLASS_* */
1da177e4
LT
293 unsigned int subdevices_count;
294 unsigned int subdevices_avail;
512bbd6a 295 union snd_pcm_sync_id sync; /* hardware synchronization ID */
1da177e4
LT
296 unsigned char reserved[64]; /* reserved for future... */
297};
298
512bbd6a
TI
299typedef int __bitwise snd_pcm_hw_param_t;
300#define SNDRV_PCM_HW_PARAM_ACCESS ((__force snd_pcm_hw_param_t) 0) /* Access type */
301#define SNDRV_PCM_HW_PARAM_FORMAT ((__force snd_pcm_hw_param_t) 1) /* Format */
302#define SNDRV_PCM_HW_PARAM_SUBFORMAT ((__force snd_pcm_hw_param_t) 2) /* Subformat */
303#define SNDRV_PCM_HW_PARAM_FIRST_MASK SNDRV_PCM_HW_PARAM_ACCESS
304#define SNDRV_PCM_HW_PARAM_LAST_MASK SNDRV_PCM_HW_PARAM_SUBFORMAT
305
306#define SNDRV_PCM_HW_PARAM_SAMPLE_BITS ((__force snd_pcm_hw_param_t) 8) /* Bits per sample */
307#define SNDRV_PCM_HW_PARAM_FRAME_BITS ((__force snd_pcm_hw_param_t) 9) /* Bits per frame */
308#define SNDRV_PCM_HW_PARAM_CHANNELS ((__force snd_pcm_hw_param_t) 10) /* Channels */
309#define SNDRV_PCM_HW_PARAM_RATE ((__force snd_pcm_hw_param_t) 11) /* Approx rate */
310#define SNDRV_PCM_HW_PARAM_PERIOD_TIME ((__force snd_pcm_hw_param_t) 12) /* Approx distance between interrupts in us */
311#define SNDRV_PCM_HW_PARAM_PERIOD_SIZE ((__force snd_pcm_hw_param_t) 13) /* Approx frames between interrupts */
312#define SNDRV_PCM_HW_PARAM_PERIOD_BYTES ((__force snd_pcm_hw_param_t) 14) /* Approx bytes between interrupts */
313#define SNDRV_PCM_HW_PARAM_PERIODS ((__force snd_pcm_hw_param_t) 15) /* Approx interrupts per buffer */
314#define SNDRV_PCM_HW_PARAM_BUFFER_TIME ((__force snd_pcm_hw_param_t) 16) /* Approx duration of buffer in us */
315#define SNDRV_PCM_HW_PARAM_BUFFER_SIZE ((__force snd_pcm_hw_param_t) 17) /* Size of buffer in frames */
316#define SNDRV_PCM_HW_PARAM_BUFFER_BYTES ((__force snd_pcm_hw_param_t) 18) /* Size of buffer in bytes */
317#define SNDRV_PCM_HW_PARAM_TICK_TIME ((__force snd_pcm_hw_param_t) 19) /* Approx tick duration in us */
318#define SNDRV_PCM_HW_PARAM_FIRST_INTERVAL SNDRV_PCM_HW_PARAM_SAMPLE_BITS
319#define SNDRV_PCM_HW_PARAM_LAST_INTERVAL SNDRV_PCM_HW_PARAM_TICK_TIME
1da177e4 320
267cdf40 321#define SNDRV_PCM_HW_PARAMS_NORESAMPLE (1<<0) /* avoid rate resampling */
1da177e4 322
512bbd6a 323struct snd_interval {
1da177e4
LT
324 unsigned int min, max;
325 unsigned int openmin:1,
326 openmax:1,
327 integer:1,
328 empty:1;
329};
330
331#define SNDRV_MASK_MAX 256
332
512bbd6a 333struct snd_mask {
1da177e4
LT
334 u_int32_t bits[(SNDRV_MASK_MAX+31)/32];
335};
336
512bbd6a 337struct snd_pcm_hw_params {
1da177e4 338 unsigned int flags;
512bbd6a 339 struct snd_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK -
1da177e4 340 SNDRV_PCM_HW_PARAM_FIRST_MASK + 1];
512bbd6a
TI
341 struct snd_mask mres[5]; /* reserved masks */
342 struct snd_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL -
1da177e4 343 SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1];
512bbd6a 344 struct snd_interval ires[9]; /* reserved intervals */
1da177e4
LT
345 unsigned int rmask; /* W: requested masks */
346 unsigned int cmask; /* R: changed masks */
347 unsigned int info; /* R: Info flags for returned setup */
348 unsigned int msbits; /* R: used most significant bits */
349 unsigned int rate_num; /* R: rate numerator */
350 unsigned int rate_den; /* R: rate denominator */
512bbd6a 351 snd_pcm_uframes_t fifo_size; /* R: chip FIFO size in frames */
1da177e4
LT
352 unsigned char reserved[64]; /* reserved for future */
353};
354
512bbd6a 355enum {
1da177e4 356 SNDRV_PCM_TSTAMP_NONE = 0,
8c121586
JK
357 SNDRV_PCM_TSTAMP_ENABLE,
358 SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_ENABLE,
1da177e4
LT
359};
360
512bbd6a
TI
361struct snd_pcm_sw_params {
362 int tstamp_mode; /* timestamp mode */
1da177e4
LT
363 unsigned int period_step;
364 unsigned int sleep_min; /* min ticks to sleep */
512bbd6a 365 snd_pcm_uframes_t avail_min; /* min avail frames for wakeup */
d948035a 366 snd_pcm_uframes_t xfer_align; /* obsolete: xfer size need to be a multiple */
512bbd6a
TI
367 snd_pcm_uframes_t start_threshold; /* min hw_avail frames for automatic start */
368 snd_pcm_uframes_t stop_threshold; /* min avail frames for automatic stop */
369 snd_pcm_uframes_t silence_threshold; /* min distance from noise for silence filling */
370 snd_pcm_uframes_t silence_size; /* silence block size */
371 snd_pcm_uframes_t boundary; /* pointers wrap point */
1da177e4
LT
372 unsigned char reserved[64]; /* reserved for future */
373};
374
512bbd6a 375struct snd_pcm_channel_info {
1da177e4
LT
376 unsigned int channel;
377 off_t offset; /* mmap offset */
378 unsigned int first; /* offset to first sample in bits */
379 unsigned int step; /* samples distance in bits */
380};
381
512bbd6a
TI
382struct snd_pcm_status {
383 snd_pcm_state_t state; /* stream state */
1da177e4
LT
384 struct timespec trigger_tstamp; /* time when stream was started/stopped/paused */
385 struct timespec tstamp; /* reference timestamp */
512bbd6a
TI
386 snd_pcm_uframes_t appl_ptr; /* appl ptr */
387 snd_pcm_uframes_t hw_ptr; /* hw ptr */
388 snd_pcm_sframes_t delay; /* current delay in frames */
389 snd_pcm_uframes_t avail; /* number of frames available */
390 snd_pcm_uframes_t avail_max; /* max frames available on hw since last status */
391 snd_pcm_uframes_t overrange; /* count of ADC (capture) overrange detections from last status */
392 snd_pcm_state_t suspended_state; /* suspended stream state */
1da177e4
LT
393 unsigned char reserved[60]; /* must be filled with zero */
394};
395
512bbd6a
TI
396struct snd_pcm_mmap_status {
397 snd_pcm_state_t state; /* RO: state - SNDRV_PCM_STATE_XXXX */
1da177e4 398 int pad1; /* Needed for 64 bit alignment */
512bbd6a 399 snd_pcm_uframes_t hw_ptr; /* RO: hw ptr (0...boundary-1) */
1da177e4 400 struct timespec tstamp; /* Timestamp */
512bbd6a 401 snd_pcm_state_t suspended_state; /* RO: suspended stream state */
1da177e4
LT
402};
403
512bbd6a
TI
404struct snd_pcm_mmap_control {
405 snd_pcm_uframes_t appl_ptr; /* RW: appl ptr (0...boundary-1) */
406 snd_pcm_uframes_t avail_min; /* RW: min available frames for wakeup */
1da177e4
LT
407};
408
409#define SNDRV_PCM_SYNC_PTR_HWSYNC (1<<0) /* execute hwsync */
410#define SNDRV_PCM_SYNC_PTR_APPL (1<<1) /* get appl_ptr from driver (r/w op) */
411#define SNDRV_PCM_SYNC_PTR_AVAIL_MIN (1<<2) /* get avail_min from driver */
412
512bbd6a 413struct snd_pcm_sync_ptr {
1da177e4
LT
414 unsigned int flags;
415 union {
512bbd6a 416 struct snd_pcm_mmap_status status;
1da177e4
LT
417 unsigned char reserved[64];
418 } s;
419 union {
512bbd6a 420 struct snd_pcm_mmap_control control;
1da177e4
LT
421 unsigned char reserved[64];
422 } c;
423};
424
512bbd6a
TI
425struct snd_xferi {
426 snd_pcm_sframes_t result;
1da177e4 427 void __user *buf;
512bbd6a 428 snd_pcm_uframes_t frames;
1da177e4
LT
429};
430
512bbd6a
TI
431struct snd_xfern {
432 snd_pcm_sframes_t result;
1da177e4 433 void __user * __user *bufs;
512bbd6a 434 snd_pcm_uframes_t frames;
1da177e4
LT
435};
436
b751eef1
JK
437enum {
438 SNDRV_PCM_TSTAMP_TYPE_GETTIMEOFDAY = 0, /* gettimeofday equivalent */
439 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC, /* posix_clock_monotonic equivalent */
440 SNDRV_PCM_TSTAMP_TYPE_LAST = SNDRV_PCM_TSTAMP_TYPE_MONOTONIC,
441};
442
1da177e4
LT
443enum {
444 SNDRV_PCM_IOCTL_PVERSION = _IOR('A', 0x00, int),
512bbd6a 445 SNDRV_PCM_IOCTL_INFO = _IOR('A', 0x01, struct snd_pcm_info),
28e9e473 446 SNDRV_PCM_IOCTL_TSTAMP = _IOW('A', 0x02, int),
b751eef1 447 SNDRV_PCM_IOCTL_TTSTAMP = _IOW('A', 0x03, int),
512bbd6a
TI
448 SNDRV_PCM_IOCTL_HW_REFINE = _IOWR('A', 0x10, struct snd_pcm_hw_params),
449 SNDRV_PCM_IOCTL_HW_PARAMS = _IOWR('A', 0x11, struct snd_pcm_hw_params),
1da177e4 450 SNDRV_PCM_IOCTL_HW_FREE = _IO('A', 0x12),
512bbd6a
TI
451 SNDRV_PCM_IOCTL_SW_PARAMS = _IOWR('A', 0x13, struct snd_pcm_sw_params),
452 SNDRV_PCM_IOCTL_STATUS = _IOR('A', 0x20, struct snd_pcm_status),
453 SNDRV_PCM_IOCTL_DELAY = _IOR('A', 0x21, snd_pcm_sframes_t),
1da177e4 454 SNDRV_PCM_IOCTL_HWSYNC = _IO('A', 0x22),
512bbd6a
TI
455 SNDRV_PCM_IOCTL_SYNC_PTR = _IOWR('A', 0x23, struct snd_pcm_sync_ptr),
456 SNDRV_PCM_IOCTL_CHANNEL_INFO = _IOR('A', 0x32, struct snd_pcm_channel_info),
1da177e4
LT
457 SNDRV_PCM_IOCTL_PREPARE = _IO('A', 0x40),
458 SNDRV_PCM_IOCTL_RESET = _IO('A', 0x41),
459 SNDRV_PCM_IOCTL_START = _IO('A', 0x42),
460 SNDRV_PCM_IOCTL_DROP = _IO('A', 0x43),
461 SNDRV_PCM_IOCTL_DRAIN = _IO('A', 0x44),
462 SNDRV_PCM_IOCTL_PAUSE = _IOW('A', 0x45, int),
512bbd6a 463 SNDRV_PCM_IOCTL_REWIND = _IOW('A', 0x46, snd_pcm_uframes_t),
1da177e4
LT
464 SNDRV_PCM_IOCTL_RESUME = _IO('A', 0x47),
465 SNDRV_PCM_IOCTL_XRUN = _IO('A', 0x48),
512bbd6a
TI
466 SNDRV_PCM_IOCTL_FORWARD = _IOW('A', 0x49, snd_pcm_uframes_t),
467 SNDRV_PCM_IOCTL_WRITEI_FRAMES = _IOW('A', 0x50, struct snd_xferi),
468 SNDRV_PCM_IOCTL_READI_FRAMES = _IOR('A', 0x51, struct snd_xferi),
469 SNDRV_PCM_IOCTL_WRITEN_FRAMES = _IOW('A', 0x52, struct snd_xfern),
470 SNDRV_PCM_IOCTL_READN_FRAMES = _IOR('A', 0x53, struct snd_xfern),
1da177e4
LT
471 SNDRV_PCM_IOCTL_LINK = _IOW('A', 0x60, int),
472 SNDRV_PCM_IOCTL_UNLINK = _IO('A', 0x61),
473};
474
475/* Trick to make alsa-lib/acinclude.m4 happy */
476#define SNDRV_PCM_IOCTL_REWIND SNDRV_PCM_IOCTL_REWIND
477
478/*****************************************************************************
479 * *
480 * MIDI v1.0 interface *
481 * *
482 *****************************************************************************/
483
484/*
485 * Raw MIDI section - /dev/snd/midi??
486 */
487
488#define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 0)
489
512bbd6a 490enum {
1da177e4
LT
491 SNDRV_RAWMIDI_STREAM_OUTPUT = 0,
492 SNDRV_RAWMIDI_STREAM_INPUT,
493 SNDRV_RAWMIDI_STREAM_LAST = SNDRV_RAWMIDI_STREAM_INPUT,
494};
495
496#define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001
497#define SNDRV_RAWMIDI_INFO_INPUT 0x00000002
498#define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004
499
512bbd6a 500struct snd_rawmidi_info {
1da177e4
LT
501 unsigned int device; /* RO/WR (control): device number */
502 unsigned int subdevice; /* RO/WR (control): subdevice number */
512bbd6a 503 int stream; /* WR: stream */
1da177e4
LT
504 int card; /* R: card number */
505 unsigned int flags; /* SNDRV_RAWMIDI_INFO_XXXX */
506 unsigned char id[64]; /* ID (user selectable) */
507 unsigned char name[80]; /* name of device */
508 unsigned char subname[32]; /* name of active or selected subdevice */
509 unsigned int subdevices_count;
510 unsigned int subdevices_avail;
511 unsigned char reserved[64]; /* reserved for future use */
512};
513
512bbd6a
TI
514struct snd_rawmidi_params {
515 int stream;
1da177e4
LT
516 size_t buffer_size; /* queue size in bytes */
517 size_t avail_min; /* minimum avail bytes for wakeup */
518 unsigned int no_active_sensing: 1; /* do not send active sensing byte in close() */
519 unsigned char reserved[16]; /* reserved for future use */
520};
521
512bbd6a
TI
522struct snd_rawmidi_status {
523 int stream;
1da177e4
LT
524 struct timespec tstamp; /* Timestamp */
525 size_t avail; /* available bytes */
526 size_t xruns; /* count of overruns since last status (in bytes) */
527 unsigned char reserved[16]; /* reserved for future use */
528};
529
530enum {
531 SNDRV_RAWMIDI_IOCTL_PVERSION = _IOR('W', 0x00, int),
512bbd6a
TI
532 SNDRV_RAWMIDI_IOCTL_INFO = _IOR('W', 0x01, struct snd_rawmidi_info),
533 SNDRV_RAWMIDI_IOCTL_PARAMS = _IOWR('W', 0x10, struct snd_rawmidi_params),
534 SNDRV_RAWMIDI_IOCTL_STATUS = _IOWR('W', 0x20, struct snd_rawmidi_status),
1da177e4
LT
535 SNDRV_RAWMIDI_IOCTL_DROP = _IOW('W', 0x30, int),
536 SNDRV_RAWMIDI_IOCTL_DRAIN = _IOW('W', 0x31, int),
537};
538
539/*
540 * Timer section - /dev/snd/timer
541 */
542
a501dfa3 543#define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 5)
1da177e4 544
512bbd6a 545enum {
1da177e4
LT
546 SNDRV_TIMER_CLASS_NONE = -1,
547 SNDRV_TIMER_CLASS_SLAVE = 0,
548 SNDRV_TIMER_CLASS_GLOBAL,
549 SNDRV_TIMER_CLASS_CARD,
550 SNDRV_TIMER_CLASS_PCM,
551 SNDRV_TIMER_CLASS_LAST = SNDRV_TIMER_CLASS_PCM,
552};
553
554/* slave timer classes */
512bbd6a 555enum {
1da177e4
LT
556 SNDRV_TIMER_SCLASS_NONE = 0,
557 SNDRV_TIMER_SCLASS_APPLICATION,
558 SNDRV_TIMER_SCLASS_SEQUENCER, /* alias */
559 SNDRV_TIMER_SCLASS_OSS_SEQUENCER, /* alias */
560 SNDRV_TIMER_SCLASS_LAST = SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
561};
562
563/* global timers (device member) */
564#define SNDRV_TIMER_GLOBAL_SYSTEM 0
565#define SNDRV_TIMER_GLOBAL_RTC 1
566#define SNDRV_TIMER_GLOBAL_HPET 2
567
568/* info flags */
569#define SNDRV_TIMER_FLG_SLAVE (1<<0) /* cannot be controlled */
570
512bbd6a
TI
571struct snd_timer_id {
572 int dev_class;
573 int dev_sclass;
1da177e4
LT
574 int card;
575 int device;
576 int subdevice;
577};
578
512bbd6a
TI
579struct snd_timer_ginfo {
580 struct snd_timer_id tid; /* requested timer ID */
1da177e4
LT
581 unsigned int flags; /* timer flags - SNDRV_TIMER_FLG_* */
582 int card; /* card number */
583 unsigned char id[64]; /* timer identification */
584 unsigned char name[80]; /* timer name */
585 unsigned long reserved0; /* reserved for future use */
586 unsigned long resolution; /* average period resolution in ns */
587 unsigned long resolution_min; /* minimal period resolution in ns */
588 unsigned long resolution_max; /* maximal period resolution in ns */
589 unsigned int clients; /* active timer clients */
590 unsigned char reserved[32];
591};
592
512bbd6a
TI
593struct snd_timer_gparams {
594 struct snd_timer_id tid; /* requested timer ID */
1da177e4
LT
595 unsigned long period_num; /* requested precise period duration (in seconds) - numerator */
596 unsigned long period_den; /* requested precise period duration (in seconds) - denominator */
597 unsigned char reserved[32];
598};
599
512bbd6a
TI
600struct snd_timer_gstatus {
601 struct snd_timer_id tid; /* requested timer ID */
1da177e4
LT
602 unsigned long resolution; /* current period resolution in ns */
603 unsigned long resolution_num; /* precise current period resolution (in seconds) - numerator */
604 unsigned long resolution_den; /* precise current period resolution (in seconds) - denominator */
605 unsigned char reserved[32];
606};
607
512bbd6a
TI
608struct snd_timer_select {
609 struct snd_timer_id id; /* bind to timer ID */
1da177e4
LT
610 unsigned char reserved[32]; /* reserved */
611};
612
512bbd6a 613struct snd_timer_info {
1da177e4
LT
614 unsigned int flags; /* timer flags - SNDRV_TIMER_FLG_* */
615 int card; /* card number */
616 unsigned char id[64]; /* timer identificator */
617 unsigned char name[80]; /* timer name */
618 unsigned long reserved0; /* reserved for future use */
619 unsigned long resolution; /* average period resolution in ns */
620 unsigned char reserved[64]; /* reserved */
621};
622
623#define SNDRV_TIMER_PSFLG_AUTO (1<<0) /* auto start, otherwise one-shot */
624#define SNDRV_TIMER_PSFLG_EXCLUSIVE (1<<1) /* exclusive use, precise start/stop/pause/continue */
625#define SNDRV_TIMER_PSFLG_EARLY_EVENT (1<<2) /* write early event to the poll queue */
626
512bbd6a 627struct snd_timer_params {
1da177e4
LT
628 unsigned int flags; /* flags - SNDRV_MIXER_PSFLG_* */
629 unsigned int ticks; /* requested resolution in ticks */
630 unsigned int queue_size; /* total size of queue (32-1024) */
631 unsigned int reserved0; /* reserved, was: failure locations */
632 unsigned int filter; /* event filter (bitmask of SNDRV_TIMER_EVENT_*) */
633 unsigned char reserved[60]; /* reserved */
634};
635
512bbd6a 636struct snd_timer_status {
1da177e4
LT
637 struct timespec tstamp; /* Timestamp - last update */
638 unsigned int resolution; /* current period resolution in ns */
639 unsigned int lost; /* counter of master tick lost */
640 unsigned int overrun; /* count of read queue overruns */
641 unsigned int queue; /* used queue size */
642 unsigned char reserved[64]; /* reserved */
643};
644
645enum {
646 SNDRV_TIMER_IOCTL_PVERSION = _IOR('T', 0x00, int),
512bbd6a 647 SNDRV_TIMER_IOCTL_NEXT_DEVICE = _IOWR('T', 0x01, struct snd_timer_id),
1da177e4 648 SNDRV_TIMER_IOCTL_TREAD = _IOW('T', 0x02, int),
512bbd6a
TI
649 SNDRV_TIMER_IOCTL_GINFO = _IOWR('T', 0x03, struct snd_timer_ginfo),
650 SNDRV_TIMER_IOCTL_GPARAMS = _IOW('T', 0x04, struct snd_timer_gparams),
651 SNDRV_TIMER_IOCTL_GSTATUS = _IOWR('T', 0x05, struct snd_timer_gstatus),
652 SNDRV_TIMER_IOCTL_SELECT = _IOW('T', 0x10, struct snd_timer_select),
653 SNDRV_TIMER_IOCTL_INFO = _IOR('T', 0x11, struct snd_timer_info),
654 SNDRV_TIMER_IOCTL_PARAMS = _IOW('T', 0x12, struct snd_timer_params),
655 SNDRV_TIMER_IOCTL_STATUS = _IOR('T', 0x14, struct snd_timer_status),
8c50b37c
TI
656 /* The following four ioctls are changed since 1.0.9 due to confliction */
657 SNDRV_TIMER_IOCTL_START = _IO('T', 0xa0),
658 SNDRV_TIMER_IOCTL_STOP = _IO('T', 0xa1),
659 SNDRV_TIMER_IOCTL_CONTINUE = _IO('T', 0xa2),
660 SNDRV_TIMER_IOCTL_PAUSE = _IO('T', 0xa3),
1da177e4
LT
661};
662
512bbd6a 663struct snd_timer_read {
1da177e4
LT
664 unsigned int resolution;
665 unsigned int ticks;
666};
667
512bbd6a 668enum {
1da177e4
LT
669 SNDRV_TIMER_EVENT_RESOLUTION = 0, /* val = resolution in ns */
670 SNDRV_TIMER_EVENT_TICK, /* val = ticks */
671 SNDRV_TIMER_EVENT_START, /* val = resolution in ns */
672 SNDRV_TIMER_EVENT_STOP, /* val = 0 */
673 SNDRV_TIMER_EVENT_CONTINUE, /* val = resolution in ns */
674 SNDRV_TIMER_EVENT_PAUSE, /* val = 0 */
675 SNDRV_TIMER_EVENT_EARLY, /* val = 0, early event */
a501dfa3 676 SNDRV_TIMER_EVENT_SUSPEND, /* val = 0 */
5ca307b2 677 SNDRV_TIMER_EVENT_RESUME, /* val = resolution in ns */
1da177e4
LT
678 /* master timer events for slave timer instances */
679 SNDRV_TIMER_EVENT_MSTART = SNDRV_TIMER_EVENT_START + 10,
680 SNDRV_TIMER_EVENT_MSTOP = SNDRV_TIMER_EVENT_STOP + 10,
681 SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10,
682 SNDRV_TIMER_EVENT_MPAUSE = SNDRV_TIMER_EVENT_PAUSE + 10,
a501dfa3
JK
683 SNDRV_TIMER_EVENT_MSUSPEND = SNDRV_TIMER_EVENT_SUSPEND + 10,
684 SNDRV_TIMER_EVENT_MRESUME = SNDRV_TIMER_EVENT_RESUME + 10,
1da177e4
LT
685};
686
512bbd6a
TI
687struct snd_timer_tread {
688 int event;
1da177e4
LT
689 struct timespec tstamp;
690 unsigned int val;
691};
692
693/****************************************************************************
694 * *
695 * Section for driver control interface - /dev/snd/control? *
696 * *
697 ****************************************************************************/
698
8ace4f3c 699#define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 5)
1da177e4 700
512bbd6a 701struct snd_ctl_card_info {
1da177e4
LT
702 int card; /* card number */
703 int pad; /* reserved for future (was type) */
704 unsigned char id[16]; /* ID of card (user selectable) */
705 unsigned char driver[16]; /* Driver name */
706 unsigned char name[32]; /* Short name of soundcard */
707 unsigned char longname[80]; /* name + info text about soundcard */
708 unsigned char reserved_[16]; /* reserved for future (was ID of mixer) */
709 unsigned char mixername[80]; /* visual mixer identification */
710 unsigned char components[80]; /* card components / fine identification, delimited with one space (AC97 etc..) */
711 unsigned char reserved[48]; /* reserved for future */
712};
713
512bbd6a
TI
714typedef int __bitwise snd_ctl_elem_type_t;
715#define SNDRV_CTL_ELEM_TYPE_NONE ((__force snd_ctl_elem_type_t) 0) /* invalid */
716#define SNDRV_CTL_ELEM_TYPE_BOOLEAN ((__force snd_ctl_elem_type_t) 1) /* boolean type */
717#define SNDRV_CTL_ELEM_TYPE_INTEGER ((__force snd_ctl_elem_type_t) 2) /* integer type */
718#define SNDRV_CTL_ELEM_TYPE_ENUMERATED ((__force snd_ctl_elem_type_t) 3) /* enumerated type */
719#define SNDRV_CTL_ELEM_TYPE_BYTES ((__force snd_ctl_elem_type_t) 4) /* byte array */
720#define SNDRV_CTL_ELEM_TYPE_IEC958 ((__force snd_ctl_elem_type_t) 5) /* IEC958 (S/PDIF) setup */
721#define SNDRV_CTL_ELEM_TYPE_INTEGER64 ((__force snd_ctl_elem_type_t) 6) /* 64-bit integer type */
722#define SNDRV_CTL_ELEM_TYPE_LAST SNDRV_CTL_ELEM_TYPE_INTEGER64
723
724typedef int __bitwise snd_ctl_elem_iface_t;
725#define SNDRV_CTL_ELEM_IFACE_CARD ((__force snd_ctl_elem_iface_t) 0) /* global control */
726#define SNDRV_CTL_ELEM_IFACE_HWDEP ((__force snd_ctl_elem_iface_t) 1) /* hardware dependent device */
727#define SNDRV_CTL_ELEM_IFACE_MIXER ((__force snd_ctl_elem_iface_t) 2) /* virtual mixer device */
728#define SNDRV_CTL_ELEM_IFACE_PCM ((__force snd_ctl_elem_iface_t) 3) /* PCM device */
729#define SNDRV_CTL_ELEM_IFACE_RAWMIDI ((__force snd_ctl_elem_iface_t) 4) /* RawMidi device */
730#define SNDRV_CTL_ELEM_IFACE_TIMER ((__force snd_ctl_elem_iface_t) 5) /* timer device */
731#define SNDRV_CTL_ELEM_IFACE_SEQUENCER ((__force snd_ctl_elem_iface_t) 6) /* sequencer client */
732#define SNDRV_CTL_ELEM_IFACE_LAST SNDRV_CTL_ELEM_IFACE_SEQUENCER
1da177e4
LT
733
734#define SNDRV_CTL_ELEM_ACCESS_READ (1<<0)
735#define SNDRV_CTL_ELEM_ACCESS_WRITE (1<<1)
736#define SNDRV_CTL_ELEM_ACCESS_READWRITE (SNDRV_CTL_ELEM_ACCESS_READ|SNDRV_CTL_ELEM_ACCESS_WRITE)
737#define SNDRV_CTL_ELEM_ACCESS_VOLATILE (1<<2) /* control value may be changed without a notification */
8aa9b586
JK
738#define SNDRV_CTL_ELEM_ACCESS_TIMESTAMP (1<<3) /* when was control changed */
739#define SNDRV_CTL_ELEM_ACCESS_TLV_READ (1<<4) /* TLV read is possible */
740#define SNDRV_CTL_ELEM_ACCESS_TLV_WRITE (1<<5) /* TLV write is possible */
741#define SNDRV_CTL_ELEM_ACCESS_TLV_READWRITE (SNDRV_CTL_ELEM_ACCESS_TLV_READ|SNDRV_CTL_ELEM_ACCESS_TLV_WRITE)
742#define SNDRV_CTL_ELEM_ACCESS_TLV_COMMAND (1<<6) /* TLV command is possible */
1da177e4
LT
743#define SNDRV_CTL_ELEM_ACCESS_INACTIVE (1<<8) /* control does actually nothing, but may be updated */
744#define SNDRV_CTL_ELEM_ACCESS_LOCK (1<<9) /* write lock */
745#define SNDRV_CTL_ELEM_ACCESS_OWNER (1<<10) /* write lock owner */
8aa9b586 746#define SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK (1<<28) /* kernel use a TLV callback */
1da177e4 747#define SNDRV_CTL_ELEM_ACCESS_USER (1<<29) /* user space element */
8ace4f3c 748/* bits 30 and 31 are obsoleted (for indirect access) */
1da177e4
LT
749
750/* for further details see the ACPI and PCI power management specification */
751#define SNDRV_CTL_POWER_D0 0x0000 /* full On */
752#define SNDRV_CTL_POWER_D1 0x0100 /* partial On */
753#define SNDRV_CTL_POWER_D2 0x0200 /* partial On */
754#define SNDRV_CTL_POWER_D3 0x0300 /* Off */
755#define SNDRV_CTL_POWER_D3hot (SNDRV_CTL_POWER_D3|0x0000) /* Off, with power */
756#define SNDRV_CTL_POWER_D3cold (SNDRV_CTL_POWER_D3|0x0001) /* Off, without power */
757
512bbd6a 758struct snd_ctl_elem_id {
1da177e4 759 unsigned int numid; /* numeric identifier, zero = invalid */
512bbd6a 760 snd_ctl_elem_iface_t iface; /* interface identifier */
1da177e4
LT
761 unsigned int device; /* device/client number */
762 unsigned int subdevice; /* subdevice (substream) number */
763 unsigned char name[44]; /* ASCII name of item */
764 unsigned int index; /* index of item */
765};
766
512bbd6a 767struct snd_ctl_elem_list {
1da177e4
LT
768 unsigned int offset; /* W: first element ID to get */
769 unsigned int space; /* W: count of element IDs to get */
770 unsigned int used; /* R: count of element IDs set */
771 unsigned int count; /* R: count of all elements */
512bbd6a 772 struct snd_ctl_elem_id __user *pids; /* R: IDs */
1da177e4
LT
773 unsigned char reserved[50];
774};
775
512bbd6a
TI
776struct snd_ctl_elem_info {
777 struct snd_ctl_elem_id id; /* W: element ID */
778 snd_ctl_elem_type_t type; /* R: value type - SNDRV_CTL_ELEM_TYPE_* */
1da177e4
LT
779 unsigned int access; /* R: value access (bitmask) - SNDRV_CTL_ELEM_ACCESS_* */
780 unsigned int count; /* count of values */
781 pid_t owner; /* owner's PID of this control */
782 union {
783 struct {
784 long min; /* R: minimum value */
785 long max; /* R: maximum value */
786 long step; /* R: step (0 variable) */
787 } integer;
788 struct {
789 long long min; /* R: minimum value */
790 long long max; /* R: maximum value */
791 long long step; /* R: step (0 variable) */
792 } integer64;
793 struct {
794 unsigned int items; /* R: number of items */
795 unsigned int item; /* W: item number */
796 char name[64]; /* R: value name */
797 } enumerated;
798 unsigned char reserved[128];
799 } value;
800 union {
801 unsigned short d[4]; /* dimensions */
8ace4f3c 802 unsigned short *d_ptr; /* indirect - obsoleted */
1da177e4
LT
803 } dimen;
804 unsigned char reserved[64-4*sizeof(unsigned short)];
805};
806
512bbd6a
TI
807struct snd_ctl_elem_value {
808 struct snd_ctl_elem_id id; /* W: element ID */
8ace4f3c 809 unsigned int indirect: 1; /* W: indirect access - obsoleted */
1da177e4
LT
810 union {
811 union {
812 long value[128];
8ace4f3c 813 long *value_ptr; /* obsoleted */
1da177e4
LT
814 } integer;
815 union {
816 long long value[64];
8ace4f3c 817 long long *value_ptr; /* obsoleted */
1da177e4
LT
818 } integer64;
819 union {
820 unsigned int item[128];
8ace4f3c 821 unsigned int *item_ptr; /* obsoleted */
1da177e4
LT
822 } enumerated;
823 union {
824 unsigned char data[512];
8ace4f3c 825 unsigned char *data_ptr; /* obsoleted */
1da177e4 826 } bytes;
512bbd6a 827 struct snd_aes_iec958 iec958;
1da177e4
LT
828 } value; /* RO */
829 struct timespec tstamp;
830 unsigned char reserved[128-sizeof(struct timespec)];
831};
832
42750b04
JK
833struct snd_ctl_tlv {
834 unsigned int numid; /* control element numeric identification */
835 unsigned int length; /* in bytes aligned to 4 */
836 unsigned int tlv[0]; /* first TLV */
837};
838
1da177e4
LT
839enum {
840 SNDRV_CTL_IOCTL_PVERSION = _IOR('U', 0x00, int),
512bbd6a
TI
841 SNDRV_CTL_IOCTL_CARD_INFO = _IOR('U', 0x01, struct snd_ctl_card_info),
842 SNDRV_CTL_IOCTL_ELEM_LIST = _IOWR('U', 0x10, struct snd_ctl_elem_list),
843 SNDRV_CTL_IOCTL_ELEM_INFO = _IOWR('U', 0x11, struct snd_ctl_elem_info),
844 SNDRV_CTL_IOCTL_ELEM_READ = _IOWR('U', 0x12, struct snd_ctl_elem_value),
845 SNDRV_CTL_IOCTL_ELEM_WRITE = _IOWR('U', 0x13, struct snd_ctl_elem_value),
846 SNDRV_CTL_IOCTL_ELEM_LOCK = _IOW('U', 0x14, struct snd_ctl_elem_id),
847 SNDRV_CTL_IOCTL_ELEM_UNLOCK = _IOW('U', 0x15, struct snd_ctl_elem_id),
1da177e4 848 SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS = _IOWR('U', 0x16, int),
512bbd6a
TI
849 SNDRV_CTL_IOCTL_ELEM_ADD = _IOWR('U', 0x17, struct snd_ctl_elem_info),
850 SNDRV_CTL_IOCTL_ELEM_REPLACE = _IOWR('U', 0x18, struct snd_ctl_elem_info),
851 SNDRV_CTL_IOCTL_ELEM_REMOVE = _IOWR('U', 0x19, struct snd_ctl_elem_id),
42750b04 852 SNDRV_CTL_IOCTL_TLV_READ = _IOWR('U', 0x1a, struct snd_ctl_tlv),
8aa9b586
JK
853 SNDRV_CTL_IOCTL_TLV_WRITE = _IOWR('U', 0x1b, struct snd_ctl_tlv),
854 SNDRV_CTL_IOCTL_TLV_COMMAND = _IOWR('U', 0x1c, struct snd_ctl_tlv),
1da177e4 855 SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE = _IOWR('U', 0x20, int),
512bbd6a 856 SNDRV_CTL_IOCTL_HWDEP_INFO = _IOR('U', 0x21, struct snd_hwdep_info),
1da177e4 857 SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE = _IOR('U', 0x30, int),
512bbd6a 858 SNDRV_CTL_IOCTL_PCM_INFO = _IOWR('U', 0x31, struct snd_pcm_info),
1da177e4
LT
859 SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE = _IOW('U', 0x32, int),
860 SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE = _IOWR('U', 0x40, int),
512bbd6a 861 SNDRV_CTL_IOCTL_RAWMIDI_INFO = _IOWR('U', 0x41, struct snd_rawmidi_info),
1da177e4
LT
862 SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE = _IOW('U', 0x42, int),
863 SNDRV_CTL_IOCTL_POWER = _IOWR('U', 0xd0, int),
864 SNDRV_CTL_IOCTL_POWER_STATE = _IOR('U', 0xd1, int),
865};
866
867/*
868 * Read interface.
869 */
870
871enum sndrv_ctl_event_type {
872 SNDRV_CTL_EVENT_ELEM = 0,
873 SNDRV_CTL_EVENT_LAST = SNDRV_CTL_EVENT_ELEM,
874};
875
876#define SNDRV_CTL_EVENT_MASK_VALUE (1<<0) /* element value was changed */
877#define SNDRV_CTL_EVENT_MASK_INFO (1<<1) /* element info was changed */
878#define SNDRV_CTL_EVENT_MASK_ADD (1<<2) /* element was added */
8aa9b586 879#define SNDRV_CTL_EVENT_MASK_TLV (1<<3) /* element TLV tree was changed */
1da177e4
LT
880#define SNDRV_CTL_EVENT_MASK_REMOVE (~0U) /* element was removed */
881
512bbd6a
TI
882struct snd_ctl_event {
883 int type; /* event type - SNDRV_CTL_EVENT_* */
1da177e4
LT
884 union {
885 struct {
886 unsigned int mask;
512bbd6a 887 struct snd_ctl_elem_id id;
1da177e4
LT
888 } elem;
889 unsigned char data8[60];
890 } data;
891};
892
893/*
894 * Control names
895 */
896
897#define SNDRV_CTL_NAME_NONE ""
898#define SNDRV_CTL_NAME_PLAYBACK "Playback "
899#define SNDRV_CTL_NAME_CAPTURE "Capture "
900
901#define SNDRV_CTL_NAME_IEC958_NONE ""
902#define SNDRV_CTL_NAME_IEC958_SWITCH "Switch"
903#define SNDRV_CTL_NAME_IEC958_VOLUME "Volume"
904#define SNDRV_CTL_NAME_IEC958_DEFAULT "Default"
905#define SNDRV_CTL_NAME_IEC958_MASK "Mask"
906#define SNDRV_CTL_NAME_IEC958_CON_MASK "Con Mask"
907#define SNDRV_CTL_NAME_IEC958_PRO_MASK "Pro Mask"
908#define SNDRV_CTL_NAME_IEC958_PCM_STREAM "PCM Stream"
909#define SNDRV_CTL_NAME_IEC958(expl,direction,what) "IEC958 " expl SNDRV_CTL_NAME_##direction SNDRV_CTL_NAME_IEC958_##what
910
911/*
912 *
913 */
914
512bbd6a 915struct snd_xferv {
1da177e4
LT
916 const struct iovec *vector;
917 unsigned long count;
918};
919
920enum {
512bbd6a
TI
921 SNDRV_IOCTL_READV = _IOW('K', 0x00, struct snd_xferv),
922 SNDRV_IOCTL_WRITEV = _IOW('K', 0x01, struct snd_xferv),
1da177e4
LT
923};
924
925#endif /* __SOUND_ASOUND_H */
This page took 0.402027 seconds and 5 git commands to generate.