[deliverable/linux.git] / include / uapi / drm / drm_mode.h

/*
 * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
 * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
 * Copyright (c) 2008 Red Hat Inc.
 * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
 * Copyright (c) 2007-2008 Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
 * IN THE SOFTWARE.
 */

#ifndef _DRM_MODE_H
#define _DRM_MODE_H

#include <linux/types.h>

#define DRM_DISPLAY_INFO_LEN	32
#define DRM_CONNECTOR_NAME_LEN	32
#define DRM_DISPLAY_MODE_LEN	32
#define DRM_PROP_NAME_LEN	32

#define DRM_MODE_TYPE_BUILTIN	(1<<0)
#define DRM_MODE_TYPE_CLOCK_C	((1<<1) | DRM_MODE_TYPE_BUILTIN)
#define DRM_MODE_TYPE_CRTC_C	((1<<2) | DRM_MODE_TYPE_BUILTIN)
#define DRM_MODE_TYPE_PREFERRED	(1<<3)
#define DRM_MODE_TYPE_DEFAULT	(1<<4)
#define DRM_MODE_TYPE_USERDEF	(1<<5)
#define DRM_MODE_TYPE_DRIVER	(1<<6)

/* Video mode flags */
/* bit compatible with the xorg definitions. */
#define DRM_MODE_FLAG_PHSYNC			(1<<0)
#define DRM_MODE_FLAG_NHSYNC			(1<<1)
#define DRM_MODE_FLAG_PVSYNC			(1<<2)
#define DRM_MODE_FLAG_NVSYNC			(1<<3)
#define DRM_MODE_FLAG_INTERLACE			(1<<4)
#define DRM_MODE_FLAG_DBLSCAN			(1<<5)
#define DRM_MODE_FLAG_CSYNC			(1<<6)
#define DRM_MODE_FLAG_PCSYNC			(1<<7)
#define DRM_MODE_FLAG_NCSYNC			(1<<8)
#define DRM_MODE_FLAG_HSKEW			(1<<9) /* hskew provided */
#define DRM_MODE_FLAG_BCAST			(1<<10)
#define DRM_MODE_FLAG_PIXMUX			(1<<11)
#define DRM_MODE_FLAG_DBLCLK			(1<<12)
#define DRM_MODE_FLAG_CLKDIV2			(1<<13)
 /*
  * When adding a new stereo mode don't forget to adjust DRM_MODE_FLAGS_3D_MAX
  * (define not exposed to user space).
  */
#define DRM_MODE_FLAG_3D_MASK			(0x1f<<14)
#define  DRM_MODE_FLAG_3D_NONE			(0<<14)
#define  DRM_MODE_FLAG_3D_FRAME_PACKING		(1<<14)
#define  DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE	(2<<14)
#define  DRM_MODE_FLAG_3D_LINE_ALTERNATIVE	(3<<14)
#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL	(4<<14)
#define  DRM_MODE_FLAG_3D_L_DEPTH		(5<<14)
#define  DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH	(6<<14)
#define  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM	(7<<14)
#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF	(8<<14)


/* DPMS flags */
/* bit compatible with the xorg definitions. */
#define DRM_MODE_DPMS_ON	0
#define DRM_MODE_DPMS_STANDBY	1
#define DRM_MODE_DPMS_SUSPEND	2
#define DRM_MODE_DPMS_OFF	3

/* Scaling mode options */
#define DRM_MODE_SCALE_NONE		0 /* Unmodified timing (display or
					     software can still scale) */
#define DRM_MODE_SCALE_FULLSCREEN	1 /* Full screen, ignore aspect */
#define DRM_MODE_SCALE_CENTER		2 /* Centered, no scaling */
#define DRM_MODE_SCALE_ASPECT		3 /* Full screen, preserve aspect */

/* Picture aspect ratio options */
#define DRM_MODE_PICTURE_ASPECT_NONE	0
#define DRM_MODE_PICTURE_ASPECT_4_3	1
#define DRM_MODE_PICTURE_ASPECT_16_9	2

/* Dithering mode options */
#define DRM_MODE_DITHERING_OFF	0
#define DRM_MODE_DITHERING_ON	1
#define DRM_MODE_DITHERING_AUTO 2

/* Dirty info options */
#define DRM_MODE_DIRTY_OFF      0
#define DRM_MODE_DIRTY_ON       1
#define DRM_MODE_DIRTY_ANNOTATE 2

struct drm_mode_modeinfo {
	__u32 clock;
	__u16 hdisplay;
	__u16 hsync_start;
	__u16 hsync_end;
	__u16 htotal;
	__u16 hskew;
	__u16 vdisplay;
	__u16 vsync_start;
	__u16 vsync_end;
	__u16 vtotal;
	__u16 vscan;

	__u32 vrefresh;

	__u32 flags;
	__u32 type;
	char name[DRM_DISPLAY_MODE_LEN];
};

struct drm_mode_card_res {
	__u64 fb_id_ptr;
	__u64 crtc_id_ptr;
	__u64 connector_id_ptr;
	__u64 encoder_id_ptr;
	__u32 count_fbs;
	__u32 count_crtcs;
	__u32 count_connectors;
	__u32 count_encoders;
	__u32 min_width;
	__u32 max_width;
	__u32 min_height;
	__u32 max_height;
};

struct drm_mode_crtc {
	__u64 set_connectors_ptr;
	__u32 count_connectors;

	__u32 crtc_id; /**< Id */
	__u32 fb_id; /**< Id of framebuffer */

	__u32 x; /**< x Position on the framebuffer */
	__u32 y; /**< y Position on the framebuffer */

	__u32 gamma_size;
	__u32 mode_valid;
	struct drm_mode_modeinfo mode;
};

#define DRM_MODE_PRESENT_TOP_FIELD	(1<<0)
#define DRM_MODE_PRESENT_BOTTOM_FIELD	(1<<1)

/* Planes blend with or override other bits on the CRTC */
struct drm_mode_set_plane {
	__u32 plane_id;
	__u32 crtc_id;
	__u32 fb_id; /* fb object contains surface format type */
	__u32 flags; /* see above flags */

	/* Signed dest location allows it to be partially off screen */
	__s32 crtc_x;
	__s32 crtc_y;
	__u32 crtc_w;
	__u32 crtc_h;

	/* Source values are 16.16 fixed point */
	__u32 src_x;
	__u32 src_y;
	__u32 src_h;
	__u32 src_w;
};

struct drm_mode_get_plane {
	__u32 plane_id;

	__u32 crtc_id;
	__u32 fb_id;

	__u32 possible_crtcs;
	__u32 gamma_size;

	__u32 count_format_types;
	__u64 format_type_ptr;
};

struct drm_mode_get_plane_res {
	__u64 plane_id_ptr;
	__u32 count_planes;
};

#define DRM_MODE_ENCODER_NONE	0
#define DRM_MODE_ENCODER_DAC	1
#define DRM_MODE_ENCODER_TMDS	2
#define DRM_MODE_ENCODER_LVDS	3
#define DRM_MODE_ENCODER_TVDAC	4
#define DRM_MODE_ENCODER_VIRTUAL 5
#define DRM_MODE_ENCODER_DSI	6
#define DRM_MODE_ENCODER_DPMST	7

struct drm_mode_get_encoder {
	__u32 encoder_id;
	__u32 encoder_type;

	__u32 crtc_id; /**< Id of crtc */

	__u32 possible_crtcs;
	__u32 possible_clones;
};

/* This is for connectors with multiple signal types. */
/* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
#define DRM_MODE_SUBCONNECTOR_Automatic	0
#define DRM_MODE_SUBCONNECTOR_Unknown	0
#define DRM_MODE_SUBCONNECTOR_DVID	3
#define DRM_MODE_SUBCONNECTOR_DVIA	4
#define DRM_MODE_SUBCONNECTOR_Composite	5
#define DRM_MODE_SUBCONNECTOR_SVIDEO	6
#define DRM_MODE_SUBCONNECTOR_Component	8
#define DRM_MODE_SUBCONNECTOR_SCART	9

#define DRM_MODE_CONNECTOR_Unknown	0
#define DRM_MODE_CONNECTOR_VGA		1
#define DRM_MODE_CONNECTOR_DVII		2
#define DRM_MODE_CONNECTOR_DVID		3
#define DRM_MODE_CONNECTOR_DVIA		4
#define DRM_MODE_CONNECTOR_Composite	5
#define DRM_MODE_CONNECTOR_SVIDEO	6
#define DRM_MODE_CONNECTOR_LVDS		7
#define DRM_MODE_CONNECTOR_Component	8
#define DRM_MODE_CONNECTOR_9PinDIN	9
#define DRM_MODE_CONNECTOR_DisplayPort	10
#define DRM_MODE_CONNECTOR_HDMIA	11
#define DRM_MODE_CONNECTOR_HDMIB	12
#define DRM_MODE_CONNECTOR_TV		13
#define DRM_MODE_CONNECTOR_eDP		14
#define DRM_MODE_CONNECTOR_VIRTUAL      15
#define DRM_MODE_CONNECTOR_DSI		16

struct drm_mode_get_connector {

	__u64 encoders_ptr;
	__u64 modes_ptr;
	__u64 props_ptr;
	__u64 prop_values_ptr;

	__u32 count_modes;
	__u32 count_props;
	__u32 count_encoders;

	__u32 encoder_id; /**< Current Encoder */
	__u32 connector_id; /**< Id */
	__u32 connector_type;
	__u32 connector_type_id;

	__u32 connection;
	__u32 mm_width;  /**< width in millimeters */
	__u32 mm_height; /**< height in millimeters */
	__u32 subpixel;

	__u32 pad;
};

#define DRM_MODE_PROP_PENDING	(1<<0)
#define DRM_MODE_PROP_RANGE	(1<<1)
#define DRM_MODE_PROP_IMMUTABLE	(1<<2)
#define DRM_MODE_PROP_ENUM	(1<<3) /* enumerated type with text strings */
#define DRM_MODE_PROP_BLOB	(1<<4)
#define DRM_MODE_PROP_BITMASK	(1<<5) /* bitmask of enumerated types */

/* non-extended types: legacy bitmask, one bit per type: */
#define DRM_MODE_PROP_LEGACY_TYPE  ( \
		DRM_MODE_PROP_RANGE | \
		DRM_MODE_PROP_ENUM | \
		DRM_MODE_PROP_BLOB | \
		DRM_MODE_PROP_BITMASK)

/* extended-types: rather than continue to consume a bit per type,
 * grab a chunk of the bits to use as integer type id.
 */
#define DRM_MODE_PROP_EXTENDED_TYPE	0x0000ffc0
#define DRM_MODE_PROP_TYPE(n)		((n) << 6)
#define DRM_MODE_PROP_OBJECT		DRM_MODE_PROP_TYPE(1)
#define DRM_MODE_PROP_SIGNED_RANGE	DRM_MODE_PROP_TYPE(2)

/* the PROP_ATOMIC flag is used to hide properties from userspace that
 * is not aware of atomic properties.  This is mostly to work around
 * older userspace (DDX drivers) that read/write each prop they find,
 * witout being aware that this could be triggering a lengthy modeset.
 */
#define DRM_MODE_PROP_ATOMIC        0x80000000

struct drm_mode_property_enum {
	__u64 value;
	char name[DRM_PROP_NAME_LEN];
};

struct drm_mode_get_property {
	__u64 values_ptr; /* values and blob lengths */
	__u64 enum_blob_ptr; /* enum and blob id ptrs */

	__u32 prop_id;
	__u32 flags;
	char name[DRM_PROP_NAME_LEN];

	__u32 count_values;
	/* This is only used to count enum values, not blobs. The _blobs is
	 * simply because of a historical reason, i.e. backwards compat. */
	__u32 count_enum_blobs;
};

struct drm_mode_connector_set_property {
	__u64 value;
	__u32 prop_id;
	__u32 connector_id;
};

struct drm_mode_obj_get_properties {
	__u64 props_ptr;
	__u64 prop_values_ptr;
	__u32 count_props;
	__u32 obj_id;
	__u32 obj_type;
};

struct drm_mode_obj_set_property {
	__u64 value;
	__u32 prop_id;
	__u32 obj_id;
	__u32 obj_type;
};

struct drm_mode_get_blob {
	__u32 blob_id;
	__u32 length;
	__u64 data;
};

struct drm_mode_fb_cmd {
	__u32 fb_id;
	__u32 width;
	__u32 height;
	__u32 pitch;
	__u32 bpp;
	__u32 depth;
	/* driver specific handle */
	__u32 handle;
};

#define DRM_MODE_FB_INTERLACED	(1<<0) /* for interlaced framebuffers */
#define DRM_MODE_FB_MODIFIERS	(1<<1) /* enables ->modifer[] */

struct drm_mode_fb_cmd2 {
	__u32 fb_id;
	__u32 width;
	__u32 height;
	__u32 pixel_format; /* fourcc code from drm_fourcc.h */
	__u32 flags; /* see above flags */

	/*
	 * In case of planar formats, this ioctl allows up to 4
	 * buffer objects with offsets and pitches per plane.
	 * The pitch and offset order is dictated by the fourcc,
	 * e.g. NV12 (http://fourcc.org/yuv.php#NV12) is described as:
	 *
	 *   YUV 4:2:0 image with a plane of 8 bit Y samples
	 *   followed by an interleaved U/V plane containing
	 *   8 bit 2x2 subsampled colour difference samples.
	 *
	 * So it would consist of Y as offsets[0] and UV as
	 * offsets[1].  Note that offsets[0] will generally
	 * be 0 (but this is not required).
	 *
	 * To accommodate tiled, compressed, etc formats, a per-plane
	 * modifier can be specified.  The default value of zero
	 * indicates "native" format as specified by the fourcc.
	 * Vendor specific modifier token.  This allows, for example,
	 * different tiling/swizzling pattern on different planes.
	 * See discussion above of DRM_FORMAT_MOD_xxx.
	 */
	__u32 handles[4];
	__u32 pitches[4]; /* pitch for each plane */
	__u32 offsets[4]; /* offset of each plane */
	__u64 modifier[4]; /* ie, tiling, compressed (per plane) */
};

#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
#define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
#define DRM_MODE_FB_DIRTY_FLAGS         0x03

#define DRM_MODE_FB_DIRTY_MAX_CLIPS     256

/*
 * Mark a region of a framebuffer as dirty.
 *
 * Some hardware does not automatically update display contents
 * as a hardware or software draw to a framebuffer. This ioctl
 * allows userspace to tell the kernel and the hardware what
 * regions of the framebuffer have changed.
 *
 * The kernel or hardware is free to update more then just the
 * region specified by the clip rects. The kernel or hardware
 * may also delay and/or coalesce several calls to dirty into a
 * single update.
 *
 * Userspace may annotate the updates, the annotates are a
 * promise made by the caller that the change is either a copy
 * of pixels or a fill of a single color in the region specified.
 *
 * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then
 * the number of updated regions are half of num_clips given,
 * where the clip rects are paired in src and dst. The width and
 * height of each one of the pairs must match.
 *
 * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller
 * promises that the region specified of the clip rects is filled
 * completely with a single color as given in the color argument.
 */

struct drm_mode_fb_dirty_cmd {
	__u32 fb_id;
	__u32 flags;
	__u32 color;
	__u32 num_clips;
	__u64 clips_ptr;
};

struct drm_mode_mode_cmd {
	__u32 connector_id;
	struct drm_mode_modeinfo mode;
};

#define DRM_MODE_CURSOR_BO	0x01
#define DRM_MODE_CURSOR_MOVE	0x02
#define DRM_MODE_CURSOR_FLAGS	0x03

/*
 * depending on the value in flags different members are used.
 *
 * CURSOR_BO uses
 *    crtc_id
 *    width
 *    height
 *    handle - if 0 turns the cursor off
 *
 * CURSOR_MOVE uses
 *    crtc_id
 *    x
 *    y
 */
struct drm_mode_cursor {
	__u32 flags;
	__u32 crtc_id;
	__s32 x;
	__s32 y;
	__u32 width;
	__u32 height;
	/* driver specific handle */
	__u32 handle;
};

struct drm_mode_cursor2 {
	__u32 flags;
	__u32 crtc_id;
	__s32 x;
	__s32 y;
	__u32 width;
	__u32 height;
	/* driver specific handle */
	__u32 handle;
	__s32 hot_x;
	__s32 hot_y;
};

struct drm_mode_crtc_lut {
	__u32 crtc_id;
	__u32 gamma_size;

	/* pointers to arrays */
	__u64 red;
	__u64 green;
	__u64 blue;
};

#define DRM_MODE_PAGE_FLIP_EVENT 0x01
#define DRM_MODE_PAGE_FLIP_ASYNC 0x02
#define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT|DRM_MODE_PAGE_FLIP_ASYNC)

/*
 * Request a page flip on the specified crtc.
 *
 * This ioctl will ask KMS to schedule a page flip for the specified
 * crtc.  Once any pending rendering targeting the specified fb (as of
 * ioctl time) has completed, the crtc will be reprogrammed to display
 * that fb after the next vertical refresh.  The ioctl returns
 * immediately, but subsequent rendering to the current fb will block
 * in the execbuffer ioctl until the page flip happens.  If a page
 * flip is already pending as the ioctl is called, EBUSY will be
 * returned.
 *
 * Flag DRM_MODE_PAGE_FLIP_EVENT requests that drm sends back a vblank
 * event (see drm.h: struct drm_event_vblank) when the page flip is
 * done.  The user_data field passed in with this ioctl will be
 * returned as the user_data field in the vblank event struct.
 *
 * Flag DRM_MODE_PAGE_FLIP_ASYNC requests that the flip happen
 * 'as soon as possible', meaning that it not delay waiting for vblank.
 * This may cause tearing on the screen.
 *
 * The reserved field must be zero until we figure out something
 * clever to use it for.
 */

struct drm_mode_crtc_page_flip {
	__u32 crtc_id;
	__u32 fb_id;
	__u32 flags;
	__u32 reserved;
	__u64 user_data;
};

/* create a dumb scanout buffer */
struct drm_mode_create_dumb {
	__u32 height;
	__u32 width;
	__u32 bpp;
	__u32 flags;
	/* handle, pitch, size will be returned */
	__u32 handle;
	__u32 pitch;
	__u64 size;
};

/* set up for mmap of a dumb scanout buffer */
struct drm_mode_map_dumb {
	/** Handle for the object being mapped. */
	__u32 handle;
	__u32 pad;
	/**
	 * Fake offset to use for subsequent mmap call
	 *
	 * This is a fixed-size type for 32/64 compatibility.
	 */
	__u64 offset;
};

struct drm_mode_destroy_dumb {
	__u32 handle;
};

/* page-flip flags are valid, plus: */
#define DRM_MODE_ATOMIC_TEST_ONLY 0x0100
#define DRM_MODE_ATOMIC_NONBLOCK  0x0200
#define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400

#define DRM_MODE_ATOMIC_FLAGS (\
		DRM_MODE_PAGE_FLIP_EVENT |\
		DRM_MODE_PAGE_FLIP_ASYNC |\
		DRM_MODE_ATOMIC_TEST_ONLY |\
		DRM_MODE_ATOMIC_NONBLOCK |\
		DRM_MODE_ATOMIC_ALLOW_MODESET)

struct drm_mode_atomic {
	__u32 flags;
	__u32 count_objs;
	__u64 objs_ptr;
	__u64 count_props_ptr;
	__u64 props_ptr;
	__u64 prop_values_ptr;
	__u64 reserved;
	__u64 user_data;
};

/**
 * Create a new 'blob' data property, copying length bytes from data pointer,
 * and returning new blob ID.
 */
struct drm_mode_create_blob {
	/** Pointer to data to copy. */
	__u64 data;
	/** Length of data to copy. */
	__u32 length;
	/** Return: new property ID. */
	__u32 blob_id;
};

/**
 * Destroy a user-created blob property.
 */
struct drm_mode_destroy_blob {
	__u32 blob_id;
};

#endif
Commit	Line	Data
f453ba04 DA	1	/*
	2	* Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
	3	* Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
	4	* Copyright (c) 2008 Red Hat Inc.
	5	* Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
	6	* Copyright (c) 2007-2008 Intel Corporation
	7	*
	8	* Permission is hereby granted, free of charge, to any person obtaining a
	9	* copy of this software and associated documentation files (the "Software"),
	10	* to deal in the Software without restriction, including without limitation
	11	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	12	* and/or sell copies of the Software, and to permit persons to whom the
	13	* Software is furnished to do so, subject to the following conditions:
	14	*
	15	* The above copyright notice and this permission notice shall be included in
	16	* all copies or substantial portions of the Software.
	17	*
	18	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	19	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	20	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
	21	* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	22	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	23	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
	24	* IN THE SOFTWARE.
	25	*/
	26
	27	#ifndef _DRM_MODE_H
	28	#define _DRM_MODE_H
	29
10db4e1e BP	30	#include <linux/types.h>
10db4e1e BP	31
e0c8463a JB	32	#define DRM_DISPLAY_INFO_LEN 32
	33	#define DRM_CONNECTOR_NAME_LEN 32
	34	#define DRM_DISPLAY_MODE_LEN 32
	35	#define DRM_PROP_NAME_LEN 32
f453ba04 DA	36
	37	#define DRM_MODE_TYPE_BUILTIN (1<<0)
	38	#define DRM_MODE_TYPE_CLOCK_C ((1<<1) \| DRM_MODE_TYPE_BUILTIN)
	39	#define DRM_MODE_TYPE_CRTC_C ((1<<2) \| DRM_MODE_TYPE_BUILTIN)
	40	#define DRM_MODE_TYPE_PREFERRED (1<<3)
	41	#define DRM_MODE_TYPE_DEFAULT (1<<4)
	42	#define DRM_MODE_TYPE_USERDEF (1<<5)
	43	#define DRM_MODE_TYPE_DRIVER (1<<6)
	44
	45	/* Video mode flags */
	46	/* bit compatible with the xorg definitions. */
4aa17cf0 DL	47	#define DRM_MODE_FLAG_PHSYNC (1<<0)
	48	#define DRM_MODE_FLAG_NHSYNC (1<<1)
	49	#define DRM_MODE_FLAG_PVSYNC (1<<2)
	50	#define DRM_MODE_FLAG_NVSYNC (1<<3)
	51	#define DRM_MODE_FLAG_INTERLACE (1<<4)
	52	#define DRM_MODE_FLAG_DBLSCAN (1<<5)
	53	#define DRM_MODE_FLAG_CSYNC (1<<6)
	54	#define DRM_MODE_FLAG_PCSYNC (1<<7)
	55	#define DRM_MODE_FLAG_NCSYNC (1<<8)
	56	#define DRM_MODE_FLAG_HSKEW (1<<9) /* hskew provided */
	57	#define DRM_MODE_FLAG_BCAST (1<<10)
	58	#define DRM_MODE_FLAG_PIXMUX (1<<11)
	59	#define DRM_MODE_FLAG_DBLCLK (1<<12)
	60	#define DRM_MODE_FLAG_CLKDIV2 (1<<13)
5848ad40 DL	61	/*
	62	* When adding a new stereo mode don't forget to adjust DRM_MODE_FLAGS_3D_MAX
	63	* (define not exposed to user space).
	64	*/
f7e121b7 DL	65	#define DRM_MODE_FLAG_3D_MASK (0x1f<<14)
	66	#define DRM_MODE_FLAG_3D_NONE (0<<14)
	67	#define DRM_MODE_FLAG_3D_FRAME_PACKING (1<<14)
	68	#define DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE (2<<14)
	69	#define DRM_MODE_FLAG_3D_LINE_ALTERNATIVE (3<<14)
	70	#define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL (4<<14)
	71	#define DRM_MODE_FLAG_3D_L_DEPTH (5<<14)
	72	#define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6<<14)
	73	#define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7<<14)
	74	#define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8<<14)
	75
f453ba04 DA	76
	77	/* DPMS flags */
	78	/* bit compatible with the xorg definitions. */
e0c8463a JB	79	#define DRM_MODE_DPMS_ON 0
	80	#define DRM_MODE_DPMS_STANDBY 1
	81	#define DRM_MODE_DPMS_SUSPEND 2
	82	#define DRM_MODE_DPMS_OFF 3
f453ba04 DA	83
f453ba04 DA	84	/* Scaling mode options */
53bd8389 JB	85	#define DRM_MODE_SCALE_NONE 0 /* Unmodified timing (display or
	86	software can still scale) */
	87	#define DRM_MODE_SCALE_FULLSCREEN 1 /* Full screen, ignore aspect */
	88	#define DRM_MODE_SCALE_CENTER 2 /* Centered, no scaling */
	89	#define DRM_MODE_SCALE_ASPECT 3 /* Full screen, preserve aspect */
f453ba04	90
ff587e45 VK	91	/* Picture aspect ratio options */
	92	#define DRM_MODE_PICTURE_ASPECT_NONE 0
	93	#define DRM_MODE_PICTURE_ASPECT_4_3 1
	94	#define DRM_MODE_PICTURE_ASPECT_16_9 2
	95
f453ba04	96	/* Dithering mode options */
e0c8463a JB	97	#define DRM_MODE_DITHERING_OFF 0
e0c8463a JB	98	#define DRM_MODE_DITHERING_ON 1
92897b5c	99	#define DRM_MODE_DITHERING_AUTO 2
f453ba04	100
884840aa JB	101	/* Dirty info options */
	102	#define DRM_MODE_DIRTY_OFF 0
	103	#define DRM_MODE_DIRTY_ON 1
	104	#define DRM_MODE_DIRTY_ANNOTATE 2
	105
f453ba04	106	struct drm_mode_modeinfo {
1d7f83d5	107	__u32 clock;
bbda9c1f RC	108	__u16 hdisplay;
	109	__u16 hsync_start;
	110	__u16 hsync_end;
	111	__u16 htotal;
	112	__u16 hskew;
	113	__u16 vdisplay;
	114	__u16 vsync_start;
	115	__u16 vsync_end;
	116	__u16 vtotal;
	117	__u16 vscan;
f453ba04	118
fa5829b3	119	__u32 vrefresh;
f453ba04	120
1d7f83d5 AB	121	__u32 flags;
1d7f83d5 AB	122	__u32 type;
f453ba04 DA	123	char name[DRM_DISPLAY_MODE_LEN];
	124	};
	125
	126	struct drm_mode_card_res {
1d7f83d5 AB	127	__u64 fb_id_ptr;
	128	__u64 crtc_id_ptr;
	129	__u64 connector_id_ptr;
	130	__u64 encoder_id_ptr;
	131	__u32 count_fbs;
	132	__u32 count_crtcs;
	133	__u32 count_connectors;
	134	__u32 count_encoders;
bbda9c1f RC	135	__u32 min_width;
	136	__u32 max_width;
	137	__u32 min_height;
	138	__u32 max_height;
f453ba04 DA	139	};
	140
	141	struct drm_mode_crtc {
1d7f83d5 AB	142	__u64 set_connectors_ptr;
1d7f83d5 AB	143	__u32 count_connectors;
f453ba04	144
1d7f83d5 AB	145	__u32 crtc_id; /*< Id /
1d7f83d5 AB	146	__u32 fb_id; /*< Id of framebuffer /
f453ba04	147
bbda9c1f RC	148	__u32 x; /*< x Position on the framebuffer /
bbda9c1f RC	149	__u32 y; /*< y Position on the framebuffer /
f453ba04	150
1d7f83d5 AB	151	__u32 gamma_size;
1d7f83d5 AB	152	__u32 mode_valid;
f453ba04 DA	153	struct drm_mode_modeinfo mode;
	154	};
	155
8cf5c917 JB	156	#define DRM_MODE_PRESENT_TOP_FIELD (1<<0)
	157	#define DRM_MODE_PRESENT_BOTTOM_FIELD (1<<1)
	158
	159	/* Planes blend with or override other bits on the CRTC */
	160	struct drm_mode_set_plane {
	161	__u32 plane_id;
	162	__u32 crtc_id;
	163	__u32 fb_id; /* fb object contains surface format type */
	164	__u32 flags; /* see above flags */
	165
	166	/* Signed dest location allows it to be partially off screen */
bbda9c1f RC	167	__s32 crtc_x;
	168	__s32 crtc_y;
	169	__u32 crtc_w;
	170	__u32 crtc_h;
8cf5c917 JB	171
8cf5c917 JB	172	/* Source values are 16.16 fixed point */
bbda9c1f RC	173	__u32 src_x;
	174	__u32 src_y;
	175	__u32 src_h;
	176	__u32 src_w;
8cf5c917 JB	177	};
	178
	179	struct drm_mode_get_plane {
	180	__u32 plane_id;
	181
	182	__u32 crtc_id;
	183	__u32 fb_id;
	184
	185	__u32 possible_crtcs;
	186	__u32 gamma_size;
	187
	188	__u32 count_format_types;
	189	__u64 format_type_ptr;
	190	};
	191
	192	struct drm_mode_get_plane_res {
	193	__u64 plane_id_ptr;
	194	__u32 count_planes;
	195	};
	196
	197	#define DRM_MODE_ENCODER_NONE 0
	198	#define DRM_MODE_ENCODER_DAC 1
	199	#define DRM_MODE_ENCODER_TMDS 2
	200	#define DRM_MODE_ENCODER_LVDS 3
	201	#define DRM_MODE_ENCODER_TVDAC 4
a7331e5c	202	#define DRM_MODE_ENCODER_VIRTUAL 5
b8923273	203	#define DRM_MODE_ENCODER_DSI 6
182407a6	204	#define DRM_MODE_ENCODER_DPMST 7
f453ba04 DA	205
f453ba04 DA	206	struct drm_mode_get_encoder {
1d7f83d5 AB	207	__u32 encoder_id;
1d7f83d5 AB	208	__u32 encoder_type;
f453ba04	209
1d7f83d5	210	__u32 crtc_id; /*< Id of crtc /
f453ba04	211
1d7f83d5 AB	212	__u32 possible_crtcs;
1d7f83d5 AB	213	__u32 possible_clones;
f453ba04 DA	214	};
	215
	216	/* This is for connectors with multiple signal types. */
	217	/* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
e0c8463a JB	218	#define DRM_MODE_SUBCONNECTOR_Automatic 0
	219	#define DRM_MODE_SUBCONNECTOR_Unknown 0
	220	#define DRM_MODE_SUBCONNECTOR_DVID 3
	221	#define DRM_MODE_SUBCONNECTOR_DVIA 4
	222	#define DRM_MODE_SUBCONNECTOR_Composite 5
	223	#define DRM_MODE_SUBCONNECTOR_SVIDEO 6
	224	#define DRM_MODE_SUBCONNECTOR_Component 8
aeaa1ad3	225	#define DRM_MODE_SUBCONNECTOR_SCART 9
e0c8463a JB	226
	227	#define DRM_MODE_CONNECTOR_Unknown 0
	228	#define DRM_MODE_CONNECTOR_VGA 1
	229	#define DRM_MODE_CONNECTOR_DVII 2
	230	#define DRM_MODE_CONNECTOR_DVID 3
	231	#define DRM_MODE_CONNECTOR_DVIA 4
	232	#define DRM_MODE_CONNECTOR_Composite 5
	233	#define DRM_MODE_CONNECTOR_SVIDEO 6
	234	#define DRM_MODE_CONNECTOR_LVDS 7
	235	#define DRM_MODE_CONNECTOR_Component 8
	236	#define DRM_MODE_CONNECTOR_9PinDIN 9
	237	#define DRM_MODE_CONNECTOR_DisplayPort 10
	238	#define DRM_MODE_CONNECTOR_HDMIA 11
	239	#define DRM_MODE_CONNECTOR_HDMIB 12
74bd3c26	240	#define DRM_MODE_CONNECTOR_TV 13
7970e677	241	#define DRM_MODE_CONNECTOR_eDP 14
a7331e5c	242	#define DRM_MODE_CONNECTOR_VIRTUAL 15
b8923273	243	#define DRM_MODE_CONNECTOR_DSI 16
f453ba04 DA	244
	245	struct drm_mode_get_connector {
	246
1d7f83d5 AB	247	__u64 encoders_ptr;
	248	__u64 modes_ptr;
	249	__u64 props_ptr;
	250	__u64 prop_values_ptr;
f453ba04	251
1d7f83d5 AB	252	__u32 count_modes;
	253	__u32 count_props;
	254	__u32 count_encoders;
f453ba04	255
1d7f83d5 AB	256	__u32 encoder_id; /*< Current Encoder /
	257	__u32 connector_id; /*< Id /
	258	__u32 connector_type;
	259	__u32 connector_type_id;
f453ba04	260
1d7f83d5	261	__u32 connection;
bbda9c1f RC	262	__u32 mm_width; /*< width in millimeters /
bbda9c1f RC	263	__u32 mm_height; /*< height in millimeters /
1d7f83d5	264	__u32 subpixel;
bc5bd37c CW	265
bc5bd37c CW	266	__u32 pad;
f453ba04 DA	267	};
f453ba04 DA	268
e0c8463a JB	269	#define DRM_MODE_PROP_PENDING (1<<0)
	270	#define DRM_MODE_PROP_RANGE (1<<1)
	271	#define DRM_MODE_PROP_IMMUTABLE (1<<2)
	272	#define DRM_MODE_PROP_ENUM (1<<3) /* enumerated type with text strings */
	273	#define DRM_MODE_PROP_BLOB (1<<4)
49e27545	274	#define DRM_MODE_PROP_BITMASK (1<<5) /* bitmask of enumerated types */
f453ba04	275
5ea22f24 RC	276	/* non-extended types: legacy bitmask, one bit per type: */
	277	#define DRM_MODE_PROP_LEGACY_TYPE ( \
	278	DRM_MODE_PROP_RANGE \| \
	279	DRM_MODE_PROP_ENUM \| \
	280	DRM_MODE_PROP_BLOB \| \
	281	DRM_MODE_PROP_BITMASK)
	282
	283	/* extended-types: rather than continue to consume a bit per type,
	284	* grab a chunk of the bits to use as integer type id.
	285	*/
	286	#define DRM_MODE_PROP_EXTENDED_TYPE 0x0000ffc0
	287	#define DRM_MODE_PROP_TYPE(n) ((n) << 6)
98f75de4	288	#define DRM_MODE_PROP_OBJECT DRM_MODE_PROP_TYPE(1)
ebc44cf3	289	#define DRM_MODE_PROP_SIGNED_RANGE DRM_MODE_PROP_TYPE(2)
5ea22f24	290
88a48e29 RC	291	/* the PROP_ATOMIC flag is used to hide properties from userspace that
	292	* is not aware of atomic properties. This is mostly to work around
	293	* older userspace (DDX drivers) that read/write each prop they find,
	294	* witout being aware that this could be triggering a lengthy modeset.
	295	*/
	296	#define DRM_MODE_PROP_ATOMIC 0x80000000
	297
f453ba04	298	struct drm_mode_property_enum {
1d7f83d5	299	__u64 value;
e0c8463a	300	char name[DRM_PROP_NAME_LEN];
f453ba04 DA	301	};
	302
	303	struct drm_mode_get_property {
1d7f83d5 AB	304	__u64 values_ptr; /* values and blob lengths */
1d7f83d5 AB	305	__u64 enum_blob_ptr; /* enum and blob id ptrs */
f453ba04	306
1d7f83d5 AB	307	__u32 prop_id;
1d7f83d5 AB	308	__u32 flags;
e0c8463a	309	char name[DRM_PROP_NAME_LEN];
f453ba04	310
1d7f83d5	311	__u32 count_values;
3758b341 DV	312	/* This is only used to count enum values, not blobs. The _blobs is
3758b341 DV	313	* simply because of a historical reason, i.e. backwards compat. */
1d7f83d5	314	__u32 count_enum_blobs;
f453ba04 DA	315	};
	316
	317	struct drm_mode_connector_set_property {
1d7f83d5 AB	318	__u64 value;
	319	__u32 prop_id;
	320	__u32 connector_id;
f453ba04 DA	321	};
f453ba04 DA	322
c543188a PZ	323	struct drm_mode_obj_get_properties {
	324	__u64 props_ptr;
	325	__u64 prop_values_ptr;
	326	__u32 count_props;
	327	__u32 obj_id;
	328	__u32 obj_type;
	329	};
	330
	331	struct drm_mode_obj_set_property {
	332	__u64 value;
	333	__u32 prop_id;
	334	__u32 obj_id;
	335	__u32 obj_type;
	336	};
	337
f453ba04	338	struct drm_mode_get_blob {
1d7f83d5 AB	339	__u32 blob_id;
	340	__u32 length;
	341	__u64 data;
f453ba04 DA	342	};
	343
	344	struct drm_mode_fb_cmd {
1d7f83d5	345	__u32 fb_id;
bbda9c1f RC	346	__u32 width;
bbda9c1f RC	347	__u32 height;
1d7f83d5 AB	348	__u32 pitch;
	349	__u32 bpp;
	350	__u32 depth;
e0c8463a	351	/* driver specific handle */
1d7f83d5	352	__u32 handle;
f453ba04 DA	353	};
f453ba04 DA	354
cc5b6f00	355	#define DRM_MODE_FB_INTERLACED (1<<0) /* for interlaced framebuffers */
e3eb3250	356	#define DRM_MODE_FB_MODIFIERS (1<<1) /* enables ->modifer[] */
308e5bcb JB	357
	358	struct drm_mode_fb_cmd2 {
	359	__u32 fb_id;
bbda9c1f RC	360	__u32 width;
bbda9c1f RC	361	__u32 height;
308e5bcb JB	362	__u32 pixel_format; /* fourcc code from drm_fourcc.h */
	363	__u32 flags; /* see above flags */
	364
	365	/*
	366	* In case of planar formats, this ioctl allows up to 4
ae28290b	367	* buffer objects with offsets and pitches per plane.
308e5bcb JB	368	* The pitch and offset order is dictated by the fourcc,
	369	* e.g. NV12 (http://fourcc.org/yuv.php#NV12) is described as:
	370	*
	371	* YUV 4:2:0 image with a plane of 8 bit Y samples
	372	* followed by an interleaved U/V plane containing
	373	* 8 bit 2x2 subsampled colour difference samples.
	374	*
ae28290b RC	375	* So it would consist of Y as offsets[0] and UV as
	376	* offsets[1]. Note that offsets[0] will generally
	377	* be 0 (but this is not required).
e3eb3250 RC	378	*
	379	* To accommodate tiled, compressed, etc formats, a per-plane
	380	* modifier can be specified. The default value of zero
	381	* indicates "native" format as specified by the fourcc.
	382	* Vendor specific modifier token. This allows, for example,
	383	* different tiling/swizzling pattern on different planes.
	384	* See discussion above of DRM_FORMAT_MOD_xxx.
308e5bcb JB	385	*/
	386	__u32 handles[4];
	387	__u32 pitches[4]; /* pitch for each plane */
	388	__u32 offsets[4]; /* offset of each plane */
e3eb3250	389	__u64 modifier[4]; /* ie, tiling, compressed (per plane) */
308e5bcb JB	390	};
308e5bcb JB	391
884840aa JB	392	#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
	393	#define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
	394	#define DRM_MODE_FB_DIRTY_FLAGS 0x03
	395
a5cd3351 XW	396	#define DRM_MODE_FB_DIRTY_MAX_CLIPS 256
a5cd3351 XW	397
884840aa JB	398	/*
	399	* Mark a region of a framebuffer as dirty.
	400	*
	401	* Some hardware does not automatically update display contents
	402	* as a hardware or software draw to a framebuffer. This ioctl
	403	* allows userspace to tell the kernel and the hardware what
	404	* regions of the framebuffer have changed.
	405	*
	406	* The kernel or hardware is free to update more then just the
	407	* region specified by the clip rects. The kernel or hardware
	408	* may also delay and/or coalesce several calls to dirty into a
	409	* single update.
	410	*
	411	* Userspace may annotate the updates, the annotates are a
	412	* promise made by the caller that the change is either a copy
	413	* of pixels or a fill of a single color in the region specified.
	414	*
	415	* If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then
	416	* the number of updated regions are half of num_clips given,
	417	* where the clip rects are paired in src and dst. The width and
	418	* height of each one of the pairs must match.
	419	*
	420	* If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller
	421	* promises that the region specified of the clip rects is filled
	422	* completely with a single color as given in the color argument.
	423	*/
	424
	425	struct drm_mode_fb_dirty_cmd {
	426	__u32 fb_id;
	427	__u32 flags;
	428	__u32 color;
	429	__u32 num_clips;
	430	__u64 clips_ptr;
	431	};
	432
f453ba04	433	struct drm_mode_mode_cmd {
1d7f83d5	434	__u32 connector_id;
f453ba04 DA	435	struct drm_mode_modeinfo mode;
	436	};
	437
7c4eaca4 JB	438	#define DRM_MODE_CURSOR_BO 0x01
	439	#define DRM_MODE_CURSOR_MOVE 0x02
	440	#define DRM_MODE_CURSOR_FLAGS 0x03
f453ba04 DA	441
f453ba04 DA	442	/*
25985edc	443	* depending on the value in flags different members are used.
f453ba04 DA	444	*
f453ba04 DA	445	* CURSOR_BO uses
715f59cc	446	* crtc_id
f453ba04 DA	447	* width
f453ba04 DA	448	* height
715f59cc	449	* handle - if 0 turns the cursor off
f453ba04 DA	450	*
f453ba04 DA	451	* CURSOR_MOVE uses
715f59cc	452	* crtc_id
f453ba04 DA	453	* x
	454	* y
	455	*/
	456	struct drm_mode_cursor {
1d7f83d5 AB	457	__u32 flags;
	458	__u32 crtc_id;
	459	__s32 x;
	460	__s32 y;
	461	__u32 width;
	462	__u32 height;
e0c8463a	463	/* driver specific handle */
1d7f83d5	464	__u32 handle;
f453ba04 DA	465	};
f453ba04 DA	466
4c813d4d DA	467	struct drm_mode_cursor2 {
	468	__u32 flags;
	469	__u32 crtc_id;
	470	__s32 x;
	471	__s32 y;
	472	__u32 width;
	473	__u32 height;
	474	/* driver specific handle */
	475	__u32 handle;
	476	__s32 hot_x;
	477	__s32 hot_y;
	478	};
	479
f453ba04	480	struct drm_mode_crtc_lut {
1d7f83d5 AB	481	__u32 crtc_id;
1d7f83d5 AB	482	__u32 gamma_size;
f453ba04 DA	483
f453ba04 DA	484	/* pointers to arrays */
1d7f83d5 AB	485	__u64 red;
	486	__u64 green;
	487	__u64 blue;
f453ba04 DA	488	};
f453ba04 DA	489
d91d8a3f	490	#define DRM_MODE_PAGE_FLIP_EVENT 0x01
9bba0c42 KP	491	#define DRM_MODE_PAGE_FLIP_ASYNC 0x02
9bba0c42 KP	492	#define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT\|DRM_MODE_PAGE_FLIP_ASYNC)
d91d8a3f KH	493
	494	/*
	495	* Request a page flip on the specified crtc.
	496	*
	497	* This ioctl will ask KMS to schedule a page flip for the specified
	498	* crtc. Once any pending rendering targeting the specified fb (as of
	499	* ioctl time) has completed, the crtc will be reprogrammed to display
	500	* that fb after the next vertical refresh. The ioctl returns
	501	* immediately, but subsequent rendering to the current fb will block
	502	* in the execbuffer ioctl until the page flip happens. If a page
	503	* flip is already pending as the ioctl is called, EBUSY will be
	504	* returned.
	505	*
9bba0c42 KP	506	* Flag DRM_MODE_PAGE_FLIP_EVENT requests that drm sends back a vblank
	507	* event (see drm.h: struct drm_event_vblank) when the page flip is
	508	* done. The user_data field passed in with this ioctl will be
	509	* returned as the user_data field in the vblank event struct.
	510	*
	511	* Flag DRM_MODE_PAGE_FLIP_ASYNC requests that the flip happen
	512	* 'as soon as possible', meaning that it not delay waiting for vblank.
	513	* This may cause tearing on the screen.
d91d8a3f KH	514	*
	515	* The reserved field must be zero until we figure out something
	516	* clever to use it for.
	517	*/
	518
	519	struct drm_mode_crtc_page_flip {
	520	__u32 crtc_id;
	521	__u32 fb_id;
	522	__u32 flags;
	523	__u32 reserved;
	524	__u64 user_data;
	525	};
	526
ff72145b DA	527	/* create a dumb scanout buffer */
ff72145b DA	528	struct drm_mode_create_dumb {
05623b7f MR	529	__u32 height;
	530	__u32 width;
	531	__u32 bpp;
	532	__u32 flags;
ff72145b	533	/* handle, pitch, size will be returned */
05623b7f MR	534	__u32 handle;
	535	__u32 pitch;
	536	__u64 size;
ff72145b DA	537	};
	538
	539	/* set up for mmap of a dumb scanout buffer */
	540	struct drm_mode_map_dumb {
	541	/** Handle for the object being mapped. */
	542	__u32 handle;
	543	__u32 pad;
	544	/**
	545	* Fake offset to use for subsequent mmap call
	546	*
	547	* This is a fixed-size type for 32/64 compatibility.
	548	*/
	549	__u64 offset;
	550	};
	551
	552	struct drm_mode_destroy_dumb {
05623b7f	553	__u32 handle;
ff72145b DA	554	};
ff72145b DA	555
d34f20d6 RC	556	/* page-flip flags are valid, plus: */
	557	#define DRM_MODE_ATOMIC_TEST_ONLY 0x0100
	558	#define DRM_MODE_ATOMIC_NONBLOCK 0x0200
	559	#define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400
	560
	561	#define DRM_MODE_ATOMIC_FLAGS (\
	562	DRM_MODE_PAGE_FLIP_EVENT \|\
	563	DRM_MODE_PAGE_FLIP_ASYNC \|\
	564	DRM_MODE_ATOMIC_TEST_ONLY \|\
	565	DRM_MODE_ATOMIC_NONBLOCK \|\
	566	DRM_MODE_ATOMIC_ALLOW_MODESET)
	567
	568	struct drm_mode_atomic {
	569	__u32 flags;
	570	__u32 count_objs;
	571	__u64 objs_ptr;
	572	__u64 count_props_ptr;
	573	__u64 props_ptr;
	574	__u64 prop_values_ptr;
	575	__u64 reserved;
	576	__u64 user_data;
	577	};
	578
e2f5d2ea DS	579	/**
	580	* Create a new 'blob' data property, copying length bytes from data pointer,
	581	* and returning new blob ID.
	582	*/
	583	struct drm_mode_create_blob {
	584	/** Pointer to data to copy. */
	585	__u64 data;
	586	/** Length of data to copy. */
	587	__u32 length;
	588	/** Return: new property ID. */
	589	__u32 blob_id;
	590	};
	591
	592	/**
	593	* Destroy a user-created blob property.
	594	*/
	595	struct drm_mode_destroy_blob {
	596	__u32 blob_id;
	597	};
	598
f453ba04	599	#endif