[deliverable/linux.git] / include / uapi / linux / ndctl.h

/*
 * Copyright (c) 2014-2016, Intel Corporation.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU Lesser General Public License,
 * version 2.1, as published by the Free Software Foundation.
 *
 * This program is distributed in the hope it will be useful, but WITHOUT ANY
 * WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
 * FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public License for
 * more details.
 */
#ifndef __NDCTL_H__
#define __NDCTL_H__

#include <linux/types.h>

struct nd_cmd_smart {
	__u32 status;
	__u8 data[128];
} __packed;

#define ND_SMART_HEALTH_VALID	(1 << 0)
#define ND_SMART_TEMP_VALID 	(1 << 1)
#define ND_SMART_SPARES_VALID	(1 << 2)
#define ND_SMART_ALARM_VALID	(1 << 3)
#define ND_SMART_USED_VALID	(1 << 4)
#define ND_SMART_SHUTDOWN_VALID	(1 << 5)
#define ND_SMART_VENDOR_VALID	(1 << 6)
#define ND_SMART_TEMP_TRIP	(1 << 0)
#define ND_SMART_SPARE_TRIP	(1 << 1)
#define ND_SMART_NON_CRITICAL_HEALTH	(1 << 0)
#define ND_SMART_CRITICAL_HEALTH	(1 << 1)
#define ND_SMART_FATAL_HEALTH		(1 << 2)

struct nd_smart_payload {
	__u32 flags;
	__u8 reserved0[4];
	__u8 health;
	__u16 temperature;
	__u8 spares;
	__u8 alarm_flags;
	__u8 life_used;
	__u8 shutdown_state;
	__u8 reserved1;
	__u32 vendor_size;
	__u8 vendor_data[108];
} __packed;

struct nd_cmd_smart_threshold {
	__u32 status;
	__u8 data[8];
} __packed;

struct nd_smart_threshold_payload {
	__u16 alarm_control;
	__u16 temperature;
	__u8 spares;
	__u8 reserved[3];
} __packed;

struct nd_cmd_dimm_flags {
	__u32 status;
	__u32 flags;
} __packed;

struct nd_cmd_get_config_size {
	__u32 status;
	__u32 config_size;
	__u32 max_xfer;
} __packed;

struct nd_cmd_get_config_data_hdr {
	__u32 in_offset;
	__u32 in_length;
	__u32 status;
	__u8 out_buf[0];
} __packed;

struct nd_cmd_set_config_hdr {
	__u32 in_offset;
	__u32 in_length;
	__u8 in_buf[0];
} __packed;

struct nd_cmd_vendor_hdr {
	__u32 opcode;
	__u32 in_length;
	__u8 in_buf[0];
} __packed;

struct nd_cmd_vendor_tail {
	__u32 status;
	__u32 out_length;
	__u8 out_buf[0];
} __packed;

struct nd_cmd_ars_cap {
	__u64 address;
	__u64 length;
	__u32 status;
	__u32 max_ars_out;
	__u32 clear_err_unit;
	__u32 reserved;
} __packed;

struct nd_cmd_ars_start {
	__u64 address;
	__u64 length;
	__u16 type;
	__u8 flags;
	__u8 reserved[5];
	__u32 status;
	__u32 scrub_time;
} __packed;

struct nd_cmd_ars_status {
	__u32 status;
	__u32 out_length;
	__u64 address;
	__u64 length;
	__u64 restart_address;
	__u64 restart_length;
	__u16 type;
	__u16 flags;
	__u32 num_records;
	struct nd_ars_record {
		__u32 handle;
		__u32 reserved;
		__u64 err_address;
		__u64 length;
	} __packed records[0];
} __packed;

struct nd_cmd_clear_error {
	__u64 address;
	__u64 length;
	__u32 status;
	__u8 reserved[4];
	__u64 cleared;
} __packed;

enum {
	ND_CMD_IMPLEMENTED = 0,

	/* bus commands */
	ND_CMD_ARS_CAP = 1,
	ND_CMD_ARS_START = 2,
	ND_CMD_ARS_STATUS = 3,
	ND_CMD_CLEAR_ERROR = 4,

	/* per-dimm commands */
	ND_CMD_SMART = 1,
	ND_CMD_SMART_THRESHOLD = 2,
	ND_CMD_DIMM_FLAGS = 3,
	ND_CMD_GET_CONFIG_SIZE = 4,
	ND_CMD_GET_CONFIG_DATA = 5,
	ND_CMD_SET_CONFIG_DATA = 6,
	ND_CMD_VENDOR_EFFECT_LOG_SIZE = 7,
	ND_CMD_VENDOR_EFFECT_LOG = 8,
	ND_CMD_VENDOR = 9,
	ND_CMD_CALL = 10,
};

enum {
	ND_ARS_VOLATILE = 1,
	ND_ARS_PERSISTENT = 2,
};

static inline const char *nvdimm_bus_cmd_name(unsigned cmd)
{
	static const char * const names[] = {
		[ND_CMD_ARS_CAP] = "ars_cap",
		[ND_CMD_ARS_START] = "ars_start",
		[ND_CMD_ARS_STATUS] = "ars_status",
		[ND_CMD_CLEAR_ERROR] = "clear_error",
	};

	if (cmd < ARRAY_SIZE(names) && names[cmd])
		return names[cmd];
	return "unknown";
}

static inline const char *nvdimm_cmd_name(unsigned cmd)
{
	static const char * const names[] = {
		[ND_CMD_SMART] = "smart",
		[ND_CMD_SMART_THRESHOLD] = "smart_thresh",
		[ND_CMD_DIMM_FLAGS] = "flags",
		[ND_CMD_GET_CONFIG_SIZE] = "get_size",
		[ND_CMD_GET_CONFIG_DATA] = "get_data",
		[ND_CMD_SET_CONFIG_DATA] = "set_data",
		[ND_CMD_VENDOR_EFFECT_LOG_SIZE] = "effect_size",
		[ND_CMD_VENDOR_EFFECT_LOG] = "effect_log",
		[ND_CMD_VENDOR] = "vendor",
		[ND_CMD_CALL] = "cmd_call",
	};

	if (cmd < ARRAY_SIZE(names) && names[cmd])
		return names[cmd];
	return "unknown";
}

#define ND_IOCTL 'N'

#define ND_IOCTL_SMART			_IOWR(ND_IOCTL, ND_CMD_SMART,\
					struct nd_cmd_smart)

#define ND_IOCTL_SMART_THRESHOLD	_IOWR(ND_IOCTL, ND_CMD_SMART_THRESHOLD,\
					struct nd_cmd_smart_threshold)

#define ND_IOCTL_DIMM_FLAGS		_IOWR(ND_IOCTL, ND_CMD_DIMM_FLAGS,\
					struct nd_cmd_dimm_flags)

#define ND_IOCTL_GET_CONFIG_SIZE	_IOWR(ND_IOCTL, ND_CMD_GET_CONFIG_SIZE,\
					struct nd_cmd_get_config_size)

#define ND_IOCTL_GET_CONFIG_DATA	_IOWR(ND_IOCTL, ND_CMD_GET_CONFIG_DATA,\
					struct nd_cmd_get_config_data_hdr)

#define ND_IOCTL_SET_CONFIG_DATA	_IOWR(ND_IOCTL, ND_CMD_SET_CONFIG_DATA,\
					struct nd_cmd_set_config_hdr)

#define ND_IOCTL_VENDOR			_IOWR(ND_IOCTL, ND_CMD_VENDOR,\
					struct nd_cmd_vendor_hdr)

#define ND_IOCTL_ARS_CAP		_IOWR(ND_IOCTL, ND_CMD_ARS_CAP,\
					struct nd_cmd_ars_cap)

#define ND_IOCTL_ARS_START		_IOWR(ND_IOCTL, ND_CMD_ARS_START,\
					struct nd_cmd_ars_start)

#define ND_IOCTL_ARS_STATUS		_IOWR(ND_IOCTL, ND_CMD_ARS_STATUS,\
					struct nd_cmd_ars_status)

#define ND_IOCTL_CLEAR_ERROR		_IOWR(ND_IOCTL, ND_CMD_CLEAR_ERROR,\
					struct nd_cmd_clear_error)

#define ND_DEVICE_DIMM 1            /* nd_dimm: container for "config data" */
#define ND_DEVICE_REGION_PMEM 2     /* nd_region: (parent of PMEM namespaces) */
#define ND_DEVICE_REGION_BLK 3      /* nd_region: (parent of BLK namespaces) */
#define ND_DEVICE_NAMESPACE_IO 4    /* legacy persistent memory */
#define ND_DEVICE_NAMESPACE_PMEM 5  /* PMEM namespace (may alias with BLK) */
#define ND_DEVICE_NAMESPACE_BLK 6   /* BLK namespace (may alias with PMEM) */
#define ND_DEVICE_DAX_PMEM 7        /* Device DAX interface to pmem */

enum nd_driver_flags {
	ND_DRIVER_DIMM            = 1 << ND_DEVICE_DIMM,
	ND_DRIVER_REGION_PMEM     = 1 << ND_DEVICE_REGION_PMEM,
	ND_DRIVER_REGION_BLK      = 1 << ND_DEVICE_REGION_BLK,
	ND_DRIVER_NAMESPACE_IO    = 1 << ND_DEVICE_NAMESPACE_IO,
	ND_DRIVER_NAMESPACE_PMEM  = 1 << ND_DEVICE_NAMESPACE_PMEM,
	ND_DRIVER_NAMESPACE_BLK   = 1 << ND_DEVICE_NAMESPACE_BLK,
	ND_DRIVER_DAX_PMEM	  = 1 << ND_DEVICE_DAX_PMEM,
};

enum {
	ND_MIN_NAMESPACE_SIZE = 0x00400000,
};

enum ars_masks {
	ARS_STATUS_MASK = 0x0000FFFF,
	ARS_EXT_STATUS_SHIFT = 16,
};

/*
 * struct nd_cmd_pkg
 *
 * is a wrapper to a quasi pass thru interface for invoking firmware
 * associated with nvdimms.
 *
 * INPUT PARAMETERS
 *
 * nd_family corresponds to the firmware (e.g. DSM) interface.
 *
 * nd_command are the function index advertised by the firmware.
 *
 * nd_size_in is the size of the input parameters being passed to firmware
 *
 * OUTPUT PARAMETERS
 *
 * nd_fw_size is the size of the data firmware wants to return for
 * the call.  If nd_fw_size is greater than size of nd_size_out, only
 * the first nd_size_out bytes are returned.
 */

struct nd_cmd_pkg {
	__u64   nd_family;		/* family of commands */
	__u64   nd_command;
	__u32   nd_size_in;		/* INPUT: size of input args */
	__u32   nd_size_out;		/* INPUT: size of payload */
	__u32   nd_reserved2[9];	/* reserved must be zero */
	__u32   nd_fw_size;		/* OUTPUT: size fw wants to return */
	unsigned char nd_payload[];	/* Contents of call      */
};

/* These NVDIMM families represent pre-standardization command sets */
#define NVDIMM_FAMILY_INTEL 0
#define NVDIMM_FAMILY_HPE1 1
#define NVDIMM_FAMILY_HPE2 2
#define NVDIMM_FAMILY_MSFT 3

#define ND_IOCTL_CALL			_IOWR(ND_IOCTL, ND_CMD_CALL,\
					struct nd_cmd_pkg)

#endif /* __NDCTL_H__ */
Commit	Line	Data
62232e45	1	/*
baa51277	2	* Copyright (c) 2014-2016, Intel Corporation.
62232e45 DW	3	*
	4	* This program is free software; you can redistribute it and/or modify it
	5	* under the terms and conditions of the GNU Lesser General Public License,
	6	* version 2.1, as published by the Free Software Foundation.
	7	*
	8	* This program is distributed in the hope it will be useful, but WITHOUT ANY
	9	* WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
	10	* FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for
	11	* more details.
	12	*/
	13	#ifndef __NDCTL_H__
	14	#define __NDCTL_H__
	15
	16	#include <linux/types.h>
	17
	18	struct nd_cmd_smart {
	19	__u32 status;
	20	__u8 data[128];
	21	} __packed;
	22
baa51277 DW	23	#define ND_SMART_HEALTH_VALID (1 << 0)
	24	#define ND_SMART_TEMP_VALID (1 << 1)
	25	#define ND_SMART_SPARES_VALID (1 << 2)
	26	#define ND_SMART_ALARM_VALID (1 << 3)
	27	#define ND_SMART_USED_VALID (1 << 4)
	28	#define ND_SMART_SHUTDOWN_VALID (1 << 5)
	29	#define ND_SMART_VENDOR_VALID (1 << 6)
	30	#define ND_SMART_TEMP_TRIP (1 << 0)
	31	#define ND_SMART_SPARE_TRIP (1 << 1)
	32	#define ND_SMART_NON_CRITICAL_HEALTH (1 << 0)
	33	#define ND_SMART_CRITICAL_HEALTH (1 << 1)
	34	#define ND_SMART_FATAL_HEALTH (1 << 2)
	35
	36	struct nd_smart_payload {
	37	__u32 flags;
	38	__u8 reserved0[4];
	39	__u8 health;
	40	__u16 temperature;
	41	__u8 spares;
	42	__u8 alarm_flags;
	43	__u8 life_used;
	44	__u8 shutdown_state;
	45	__u8 reserved1;
	46	__u32 vendor_size;
	47	__u8 vendor_data[108];
	48	} __packed;
	49
62232e45 DW	50	struct nd_cmd_smart_threshold {
	51	__u32 status;
	52	__u8 data[8];
	53	} __packed;
	54
baa51277 DW	55	struct nd_smart_threshold_payload {
	56	__u16 alarm_control;
	57	__u16 temperature;
	58	__u8 spares;
	59	__u8 reserved[3];
	60	} __packed;
	61
62232e45 DW	62	struct nd_cmd_dimm_flags {
	63	__u32 status;
	64	__u32 flags;
	65	} __packed;
	66
	67	struct nd_cmd_get_config_size {
	68	__u32 status;
	69	__u32 config_size;
	70	__u32 max_xfer;
	71	} __packed;
	72
	73	struct nd_cmd_get_config_data_hdr {
	74	__u32 in_offset;
	75	__u32 in_length;
	76	__u32 status;
	77	__u8 out_buf[0];
	78	} __packed;
	79
	80	struct nd_cmd_set_config_hdr {
	81	__u32 in_offset;
	82	__u32 in_length;
	83	__u8 in_buf[0];
	84	} __packed;
	85
	86	struct nd_cmd_vendor_hdr {
	87	__u32 opcode;
	88	__u32 in_length;
	89	__u8 in_buf[0];
	90	} __packed;
	91
	92	struct nd_cmd_vendor_tail {
	93	__u32 status;
	94	__u32 out_length;
	95	__u8 out_buf[0];
	96	} __packed;
	97
	98	struct nd_cmd_ars_cap {
	99	__u64 address;
	100	__u64 length;
	101	__u32 status;
	102	__u32 max_ars_out;
4577b066 DW	103	__u32 clear_err_unit;
4577b066 DW	104	__u32 reserved;
62232e45 DW	105	} __packed;
	106
	107	struct nd_cmd_ars_start {
	108	__u64 address;
	109	__u64 length;
	110	__u16 type;
4577b066 DW	111	__u8 flags;
4577b066 DW	112	__u8 reserved[5];
62232e45	113	__u32 status;
4577b066	114	__u32 scrub_time;
62232e45 DW	115	} __packed;
	116
	117	struct nd_cmd_ars_status {
	118	__u32 status;
	119	__u32 out_length;
	120	__u64 address;
	121	__u64 length;
4577b066 DW	122	__u64 restart_address;
4577b066 DW	123	__u64 restart_length;
62232e45	124	__u16 type;
4577b066	125	__u16 flags;
62232e45 DW	126	__u32 num_records;
	127	struct nd_ars_record {
	128	__u32 handle;
4577b066	129	__u32 reserved;
62232e45	130	__u64 err_address;
ec92777f	131	__u64 length;
62232e45 DW	132	} __packed records[0];
	133	} __packed;
	134
d4f32367 DW	135	struct nd_cmd_clear_error {
	136	__u64 address;
	137	__u64 length;
	138	__u32 status;
	139	__u8 reserved[4];
	140	__u64 cleared;
	141	} __packed;
	142
62232e45 DW	143	enum {
	144	ND_CMD_IMPLEMENTED = 0,
	145
	146	/* bus commands */
	147	ND_CMD_ARS_CAP = 1,
	148	ND_CMD_ARS_START = 2,
	149	ND_CMD_ARS_STATUS = 3,
d4f32367	150	ND_CMD_CLEAR_ERROR = 4,
62232e45 DW	151
	152	/* per-dimm commands */
	153	ND_CMD_SMART = 1,
	154	ND_CMD_SMART_THRESHOLD = 2,
	155	ND_CMD_DIMM_FLAGS = 3,
	156	ND_CMD_GET_CONFIG_SIZE = 4,
	157	ND_CMD_GET_CONFIG_DATA = 5,
	158	ND_CMD_SET_CONFIG_DATA = 6,
	159	ND_CMD_VENDOR_EFFECT_LOG_SIZE = 7,
	160	ND_CMD_VENDOR_EFFECT_LOG = 8,
	161	ND_CMD_VENDOR = 9,
31eca76b	162	ND_CMD_CALL = 10,
62232e45 DW	163	};
62232e45 DW	164
39c686b8 VV	165	enum {
	166	ND_ARS_VOLATILE = 1,
	167	ND_ARS_PERSISTENT = 2,
	168	};
	169
62232e45 DW	170	static inline const char *nvdimm_bus_cmd_name(unsigned cmd)
	171	{
	172	static const char * const names[] = {
	173	[ND_CMD_ARS_CAP] = "ars_cap",
	174	[ND_CMD_ARS_START] = "ars_start",
	175	[ND_CMD_ARS_STATUS] = "ars_status",
d4f32367	176	[ND_CMD_CLEAR_ERROR] = "clear_error",
62232e45 DW	177	};
	178
	179	if (cmd < ARRAY_SIZE(names) && names[cmd])
	180	return names[cmd];
	181	return "unknown";
	182	}
	183
	184	static inline const char *nvdimm_cmd_name(unsigned cmd)
	185	{
	186	static const char * const names[] = {
	187	[ND_CMD_SMART] = "smart",
	188	[ND_CMD_SMART_THRESHOLD] = "smart_thresh",
	189	[ND_CMD_DIMM_FLAGS] = "flags",
	190	[ND_CMD_GET_CONFIG_SIZE] = "get_size",
	191	[ND_CMD_GET_CONFIG_DATA] = "get_data",
	192	[ND_CMD_SET_CONFIG_DATA] = "set_data",
	193	[ND_CMD_VENDOR_EFFECT_LOG_SIZE] = "effect_size",
	194	[ND_CMD_VENDOR_EFFECT_LOG] = "effect_log",
	195	[ND_CMD_VENDOR] = "vendor",
31eca76b	196	[ND_CMD_CALL] = "cmd_call",
62232e45 DW	197	};
	198
	199	if (cmd < ARRAY_SIZE(names) && names[cmd])
	200	return names[cmd];
	201	return "unknown";
	202	}
	203
	204	#define ND_IOCTL 'N'
	205
	206	#define ND_IOCTL_SMART _IOWR(ND_IOCTL, ND_CMD_SMART,\
	207	struct nd_cmd_smart)
	208
	209	#define ND_IOCTL_SMART_THRESHOLD _IOWR(ND_IOCTL, ND_CMD_SMART_THRESHOLD,\
	210	struct nd_cmd_smart_threshold)
	211
	212	#define ND_IOCTL_DIMM_FLAGS _IOWR(ND_IOCTL, ND_CMD_DIMM_FLAGS,\
	213	struct nd_cmd_dimm_flags)
	214
	215	#define ND_IOCTL_GET_CONFIG_SIZE _IOWR(ND_IOCTL, ND_CMD_GET_CONFIG_SIZE,\
	216	struct nd_cmd_get_config_size)
	217
	218	#define ND_IOCTL_GET_CONFIG_DATA _IOWR(ND_IOCTL, ND_CMD_GET_CONFIG_DATA,\
	219	struct nd_cmd_get_config_data_hdr)
	220
	221	#define ND_IOCTL_SET_CONFIG_DATA _IOWR(ND_IOCTL, ND_CMD_SET_CONFIG_DATA,\
	222	struct nd_cmd_set_config_hdr)
	223
	224	#define ND_IOCTL_VENDOR _IOWR(ND_IOCTL, ND_CMD_VENDOR,\
	225	struct nd_cmd_vendor_hdr)
	226
	227	#define ND_IOCTL_ARS_CAP _IOWR(ND_IOCTL, ND_CMD_ARS_CAP,\
	228	struct nd_cmd_ars_cap)
	229
	230	#define ND_IOCTL_ARS_START _IOWR(ND_IOCTL, ND_CMD_ARS_START,\
	231	struct nd_cmd_ars_start)
	232
	233	#define ND_IOCTL_ARS_STATUS _IOWR(ND_IOCTL, ND_CMD_ARS_STATUS,\
	234	struct nd_cmd_ars_status)
	235
d4f32367 DW	236	#define ND_IOCTL_CLEAR_ERROR _IOWR(ND_IOCTL, ND_CMD_CLEAR_ERROR,\
	237	struct nd_cmd_clear_error)
	238
4d88a97a	239	#define ND_DEVICE_DIMM 1 /* nd_dimm: container for "config data" */
3d88002e DW	240	#define ND_DEVICE_REGION_PMEM 2 /* nd_region: (parent of PMEM namespaces) */
	241	#define ND_DEVICE_REGION_BLK 3 /* nd_region: (parent of BLK namespaces) */
	242	#define ND_DEVICE_NAMESPACE_IO 4 /* legacy persistent memory */
	243	#define ND_DEVICE_NAMESPACE_PMEM 5 /* PMEM namespace (may alias with BLK) */
	244	#define ND_DEVICE_NAMESPACE_BLK 6 /* BLK namespace (may alias with PMEM) */
cd03412a	245	#define ND_DEVICE_DAX_PMEM 7 /* Device DAX interface to pmem */
4d88a97a DW	246
	247	enum nd_driver_flags {
	248	ND_DRIVER_DIMM = 1 << ND_DEVICE_DIMM,
3d88002e DW	249	ND_DRIVER_REGION_PMEM = 1 << ND_DEVICE_REGION_PMEM,
	250	ND_DRIVER_REGION_BLK = 1 << ND_DEVICE_REGION_BLK,
	251	ND_DRIVER_NAMESPACE_IO = 1 << ND_DEVICE_NAMESPACE_IO,
	252	ND_DRIVER_NAMESPACE_PMEM = 1 << ND_DEVICE_NAMESPACE_PMEM,
	253	ND_DRIVER_NAMESPACE_BLK = 1 << ND_DEVICE_NAMESPACE_BLK,
cd03412a	254	ND_DRIVER_DAX_PMEM = 1 << ND_DEVICE_DAX_PMEM,
4d88a97a	255	};
bf9bccc1 DW	256
	257	enum {
	258	ND_MIN_NAMESPACE_SIZE = 0x00400000,
	259	};
39c686b8 VV	260
	261	enum ars_masks {
	262	ARS_STATUS_MASK = 0x0000FFFF,
	263	ARS_EXT_STATUS_SHIFT = 16,
	264	};
31eca76b DW	265
	266	/*
	267	* struct nd_cmd_pkg
	268	*
	269	* is a wrapper to a quasi pass thru interface for invoking firmware
	270	* associated with nvdimms.
	271	*
	272	* INPUT PARAMETERS
	273	*
	274	* nd_family corresponds to the firmware (e.g. DSM) interface.
	275	*
	276	* nd_command are the function index advertised by the firmware.
	277	*
	278	* nd_size_in is the size of the input parameters being passed to firmware
	279	*
	280	* OUTPUT PARAMETERS
	281	*
	282	* nd_fw_size is the size of the data firmware wants to return for
	283	* the call. If nd_fw_size is greater than size of nd_size_out, only
	284	* the first nd_size_out bytes are returned.
	285	*/
	286
	287	struct nd_cmd_pkg {
	288	__u64 nd_family; /* family of commands */
	289	__u64 nd_command;
	290	__u32 nd_size_in; /* INPUT: size of input args */
	291	__u32 nd_size_out; /* INPUT: size of payload */
	292	__u32 nd_reserved2[9]; /* reserved must be zero */
	293	__u32 nd_fw_size; /* OUTPUT: size fw wants to return */
	294	unsigned char nd_payload[]; /* Contents of call */
	295	};
	296
	297	/* These NVDIMM families represent pre-standardization command sets */
	298	#define NVDIMM_FAMILY_INTEL 0
	299	#define NVDIMM_FAMILY_HPE1 1
	300	#define NVDIMM_FAMILY_HPE2 2
e02fb726	301	#define NVDIMM_FAMILY_MSFT 3
31eca76b DW	302
	303	#define ND_IOCTL_CALL _IOWR(ND_IOCTL, ND_CMD_CALL,\
	304	struct nd_cmd_pkg)
	305
62232e45	306	#endif /* __NDCTL_H__ */