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59393bb9 ZZ |
1 | /* |
2 | * linux/include/video/mmp_disp.h | |
3 | * Header file for Marvell MMP Display Controller | |
4 | * | |
5 | * Copyright (C) 2012 Marvell Technology Group Ltd. | |
6 | * Authors: Zhou Zhu <zzhu3@marvell.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License as published by the | |
10 | * Free Software Foundation; either version 2 of the License, or (at your | |
11 | * option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
14 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
15 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
16 | * more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License along with | |
19 | * this program. If not, see <http://www.gnu.org/licenses/>. | |
20 | * | |
21 | */ | |
22 | ||
23 | #ifndef _MMP_DISP_H_ | |
24 | #define _MMP_DISP_H_ | |
25 | #include <linux/kthread.h> | |
26 | ||
27 | enum { | |
28 | PIXFMT_UYVY = 0, | |
29 | PIXFMT_VYUY, | |
30 | PIXFMT_YUYV, | |
31 | PIXFMT_YUV422P, | |
32 | PIXFMT_YVU422P, | |
33 | PIXFMT_YUV420P, | |
34 | PIXFMT_YVU420P, | |
35 | PIXFMT_RGB565 = 0x100, | |
36 | PIXFMT_BGR565, | |
37 | PIXFMT_RGB1555, | |
38 | PIXFMT_BGR1555, | |
39 | PIXFMT_RGB888PACK, | |
40 | PIXFMT_BGR888PACK, | |
41 | PIXFMT_RGB888UNPACK, | |
42 | PIXFMT_BGR888UNPACK, | |
43 | PIXFMT_RGBA888, | |
44 | PIXFMT_BGRA888, | |
45 | PIXFMT_RGB666, /* for output usage */ | |
46 | PIXFMT_PSEUDOCOLOR = 0x200, | |
47 | }; | |
48 | ||
49 | static inline int pixfmt_to_stride(int pix_fmt) | |
50 | { | |
51 | switch (pix_fmt) { | |
52 | case PIXFMT_RGB565: | |
53 | case PIXFMT_BGR565: | |
54 | case PIXFMT_RGB1555: | |
55 | case PIXFMT_BGR1555: | |
56 | case PIXFMT_UYVY: | |
57 | case PIXFMT_VYUY: | |
58 | case PIXFMT_YUYV: | |
59 | return 2; | |
60 | case PIXFMT_RGB888UNPACK: | |
61 | case PIXFMT_BGR888UNPACK: | |
62 | case PIXFMT_RGBA888: | |
63 | case PIXFMT_BGRA888: | |
64 | return 4; | |
65 | case PIXFMT_RGB888PACK: | |
66 | case PIXFMT_BGR888PACK: | |
67 | return 3; | |
68 | case PIXFMT_YUV422P: | |
69 | case PIXFMT_YVU422P: | |
70 | case PIXFMT_YUV420P: | |
71 | case PIXFMT_YVU420P: | |
72 | case PIXFMT_PSEUDOCOLOR: | |
73 | return 1; | |
74 | default: | |
75 | return 0; | |
76 | } | |
77 | } | |
78 | ||
79 | /* parameters used by path/overlay */ | |
80 | /* overlay related para: win/addr */ | |
81 | struct mmp_win { | |
82 | /* position/size of window */ | |
83 | u16 xsrc; | |
84 | u16 ysrc; | |
85 | u16 xdst; | |
86 | u16 ydst; | |
87 | u16 xpos; | |
88 | u16 ypos; | |
89 | u16 left_crop; | |
90 | u16 right_crop; | |
91 | u16 up_crop; | |
92 | u16 bottom_crop; | |
93 | int pix_fmt; | |
24586d83 JX |
94 | /* |
95 | * pitch[0]: graphics/video layer line length or y pitch | |
96 | * pitch[1]/pitch[2]: video u/v pitch if non-zero | |
97 | */ | |
98 | u32 pitch[3]; | |
59393bb9 ZZ |
99 | }; |
100 | ||
101 | struct mmp_addr { | |
102 | /* phys address */ | |
103 | u32 phys[6]; | |
104 | }; | |
105 | ||
106 | /* path related para: mode */ | |
107 | struct mmp_mode { | |
108 | const char *name; | |
109 | u32 refresh; | |
110 | u32 xres; | |
111 | u32 yres; | |
112 | u32 left_margin; | |
113 | u32 right_margin; | |
114 | u32 upper_margin; | |
115 | u32 lower_margin; | |
116 | u32 hsync_len; | |
117 | u32 vsync_len; | |
118 | u32 hsync_invert; | |
119 | u32 vsync_invert; | |
120 | u32 invert_pixclock; | |
121 | u32 pixclock_freq; | |
122 | int pix_fmt_out; | |
123 | }; | |
124 | ||
125 | /* main structures */ | |
126 | struct mmp_path; | |
127 | struct mmp_overlay; | |
128 | struct mmp_panel; | |
129 | ||
130 | /* status types */ | |
131 | enum { | |
132 | MMP_OFF = 0, | |
133 | MMP_ON, | |
134 | }; | |
135 | ||
136 | static inline const char *stat_name(int stat) | |
137 | { | |
138 | switch (stat) { | |
139 | case MMP_OFF: | |
140 | return "OFF"; | |
141 | case MMP_ON: | |
142 | return "ON"; | |
143 | default: | |
144 | return "UNKNOWNSTAT"; | |
145 | } | |
146 | } | |
147 | ||
148 | struct mmp_overlay_ops { | |
149 | /* should be provided by driver */ | |
150 | void (*set_fetch)(struct mmp_overlay *overlay, int fetch_id); | |
151 | void (*set_onoff)(struct mmp_overlay *overlay, int status); | |
152 | void (*set_win)(struct mmp_overlay *overlay, struct mmp_win *win); | |
153 | int (*set_addr)(struct mmp_overlay *overlay, struct mmp_addr *addr); | |
154 | }; | |
155 | ||
156 | /* overlay describes a z-order indexed slot in each path. */ | |
157 | struct mmp_overlay { | |
158 | int id; | |
159 | const char *name; | |
160 | struct mmp_path *path; | |
161 | ||
162 | /* overlay info: private data */ | |
163 | int dmafetch_id; | |
164 | struct mmp_addr addr; | |
165 | struct mmp_win win; | |
166 | ||
167 | /* state */ | |
168 | int open_count; | |
169 | int status; | |
170 | struct mutex access_ok; | |
171 | ||
172 | struct mmp_overlay_ops *ops; | |
173 | }; | |
174 | ||
175 | /* panel type */ | |
176 | enum { | |
177 | PANELTYPE_ACTIVE = 0, | |
178 | PANELTYPE_SMART, | |
179 | PANELTYPE_TV, | |
180 | PANELTYPE_DSI_CMD, | |
181 | PANELTYPE_DSI_VIDEO, | |
182 | }; | |
183 | ||
184 | struct mmp_panel { | |
185 | /* use node to register to list */ | |
186 | struct list_head node; | |
187 | const char *name; | |
188 | /* path name used to connect to proper path configed */ | |
189 | const char *plat_path_name; | |
190 | struct device *dev; | |
191 | int panel_type; | |
192 | void *plat_data; | |
193 | int (*get_modelist)(struct mmp_panel *panel, | |
194 | struct mmp_mode **modelist); | |
195 | void (*set_mode)(struct mmp_panel *panel, | |
196 | struct mmp_mode *mode); | |
197 | void (*set_onoff)(struct mmp_panel *panel, | |
198 | int status); | |
199 | }; | |
200 | ||
201 | struct mmp_path_ops { | |
202 | int (*check_status)(struct mmp_path *path); | |
203 | struct mmp_overlay *(*get_overlay)(struct mmp_path *path, | |
204 | int overlay_id); | |
205 | int (*get_modelist)(struct mmp_path *path, | |
206 | struct mmp_mode **modelist); | |
207 | ||
208 | /* follow ops should be provided by driver */ | |
209 | void (*set_mode)(struct mmp_path *path, struct mmp_mode *mode); | |
210 | void (*set_onoff)(struct mmp_path *path, int status); | |
211 | /* todo: add query */ | |
212 | }; | |
213 | ||
214 | /* path output types */ | |
215 | enum { | |
216 | PATH_OUT_PARALLEL, | |
217 | PATH_OUT_DSI, | |
218 | PATH_OUT_HDMI, | |
219 | }; | |
220 | ||
221 | /* path is main part of mmp-disp */ | |
222 | struct mmp_path { | |
223 | /* use node to register to list */ | |
224 | struct list_head node; | |
225 | ||
226 | /* init data */ | |
227 | struct device *dev; | |
228 | ||
229 | int id; | |
230 | const char *name; | |
231 | int output_type; | |
232 | struct mmp_panel *panel; | |
233 | void *plat_data; | |
234 | ||
235 | /* dynamic use */ | |
236 | struct mmp_mode mode; | |
237 | ||
238 | /* state */ | |
239 | int open_count; | |
240 | int status; | |
241 | struct mutex access_ok; | |
242 | ||
243 | struct mmp_path_ops ops; | |
244 | ||
245 | /* layers */ | |
246 | int overlay_num; | |
247 | struct mmp_overlay overlays[0]; | |
248 | }; | |
249 | ||
250 | extern struct mmp_path *mmp_get_path(const char *name); | |
251 | static inline void mmp_path_set_mode(struct mmp_path *path, | |
252 | struct mmp_mode *mode) | |
253 | { | |
254 | if (path) | |
255 | path->ops.set_mode(path, mode); | |
256 | } | |
257 | static inline void mmp_path_set_onoff(struct mmp_path *path, int status) | |
258 | { | |
259 | if (path) | |
260 | path->ops.set_onoff(path, status); | |
261 | } | |
262 | static inline int mmp_path_get_modelist(struct mmp_path *path, | |
263 | struct mmp_mode **modelist) | |
264 | { | |
265 | if (path) | |
266 | return path->ops.get_modelist(path, modelist); | |
267 | return 0; | |
268 | } | |
269 | static inline struct mmp_overlay *mmp_path_get_overlay( | |
270 | struct mmp_path *path, int overlay_id) | |
271 | { | |
272 | if (path) | |
273 | return path->ops.get_overlay(path, overlay_id); | |
274 | return NULL; | |
275 | } | |
276 | static inline void mmp_overlay_set_fetch(struct mmp_overlay *overlay, | |
277 | int fetch_id) | |
278 | { | |
279 | if (overlay) | |
280 | overlay->ops->set_fetch(overlay, fetch_id); | |
281 | } | |
282 | static inline void mmp_overlay_set_onoff(struct mmp_overlay *overlay, | |
283 | int status) | |
284 | { | |
285 | if (overlay) | |
286 | overlay->ops->set_onoff(overlay, status); | |
287 | } | |
288 | static inline void mmp_overlay_set_win(struct mmp_overlay *overlay, | |
289 | struct mmp_win *win) | |
290 | { | |
291 | if (overlay) | |
292 | overlay->ops->set_win(overlay, win); | |
293 | } | |
294 | static inline int mmp_overlay_set_addr(struct mmp_overlay *overlay, | |
295 | struct mmp_addr *addr) | |
296 | { | |
297 | if (overlay) | |
298 | return overlay->ops->set_addr(overlay, addr); | |
299 | return 0; | |
300 | } | |
301 | ||
302 | /* | |
303 | * driver data is set from each detailed ctrl driver for path usage | |
304 | * it defined a common interface that plat driver need to implement | |
305 | */ | |
306 | struct mmp_path_info { | |
307 | /* driver data, set when registed*/ | |
308 | const char *name; | |
309 | struct device *dev; | |
310 | int id; | |
311 | int output_type; | |
312 | int overlay_num; | |
313 | void (*set_mode)(struct mmp_path *path, struct mmp_mode *mode); | |
314 | void (*set_onoff)(struct mmp_path *path, int status); | |
315 | struct mmp_overlay_ops *overlay_ops; | |
316 | void *plat_data; | |
317 | }; | |
318 | ||
319 | extern struct mmp_path *mmp_register_path( | |
320 | struct mmp_path_info *info); | |
321 | extern void mmp_unregister_path(struct mmp_path *path); | |
322 | extern void mmp_register_panel(struct mmp_panel *panel); | |
323 | extern void mmp_unregister_panel(struct mmp_panel *panel); | |
324 | ||
325 | /* defintions for platform data */ | |
326 | /* interface for buffer driver */ | |
327 | struct mmp_buffer_driver_mach_info { | |
328 | const char *name; | |
329 | const char *path_name; | |
330 | int overlay_id; | |
331 | int dmafetch_id; | |
332 | int default_pixfmt; | |
333 | }; | |
334 | ||
335 | /* interface for controllers driver */ | |
336 | struct mmp_mach_path_config { | |
337 | const char *name; | |
338 | int overlay_num; | |
339 | int output_type; | |
340 | u32 path_config; | |
341 | u32 link_config; | |
9a27d591 | 342 | u32 dsi_rbswap; |
59393bb9 ZZ |
343 | }; |
344 | ||
345 | struct mmp_mach_plat_info { | |
346 | const char *name; | |
347 | const char *clk_name; | |
348 | int path_num; | |
349 | struct mmp_mach_path_config *paths; | |
350 | }; | |
351 | ||
352 | /* interface for panel drivers */ | |
353 | struct mmp_mach_panel_info { | |
354 | const char *name; | |
355 | void (*plat_set_onoff)(int status); | |
356 | const char *plat_path_name; | |
357 | }; | |
358 | #endif /* _MMP_DISP_H_ */ |