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omapfb: Create new header file for omapfb DSS implementation
[deliverable/linux.git] / include / video / omapfb_dss.h
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62d9e44e
PU		 1/*
2 * Copyright (C) 2016 Texas Instruments, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10#ifndef __OMAPFB_DSS_H
11#define __OMAPFB_DSS_H
12
13#include <linux/list.h>
14#include <linux/kobject.h>
15#include <linux/device.h>
16#include <linux/interrupt.h>
17#include <linux/platform_data/omapdss.h>
18
19#include <video/videomode.h>
20
21#define DISPC_IRQ_FRAMEDONE (1 << 0)
22#define DISPC_IRQ_VSYNC (1 << 1)
23#define DISPC_IRQ_EVSYNC_EVEN (1 << 2)
24#define DISPC_IRQ_EVSYNC_ODD (1 << 3)
25#define DISPC_IRQ_ACBIAS_COUNT_STAT (1 << 4)
26#define DISPC_IRQ_PROG_LINE_NUM (1 << 5)
27#define DISPC_IRQ_GFX_FIFO_UNDERFLOW (1 << 6)
28#define DISPC_IRQ_GFX_END_WIN (1 << 7)
29#define DISPC_IRQ_PAL_GAMMA_MASK (1 << 8)
30#define DISPC_IRQ_OCP_ERR (1 << 9)
31#define DISPC_IRQ_VID1_FIFO_UNDERFLOW (1 << 10)
32#define DISPC_IRQ_VID1_END_WIN (1 << 11)
33#define DISPC_IRQ_VID2_FIFO_UNDERFLOW (1 << 12)
34#define DISPC_IRQ_VID2_END_WIN (1 << 13)
35#define DISPC_IRQ_SYNC_LOST (1 << 14)
36#define DISPC_IRQ_SYNC_LOST_DIGIT (1 << 15)
37#define DISPC_IRQ_WAKEUP (1 << 16)
38#define DISPC_IRQ_SYNC_LOST2 (1 << 17)
39#define DISPC_IRQ_VSYNC2 (1 << 18)
40#define DISPC_IRQ_VID3_END_WIN (1 << 19)
41#define DISPC_IRQ_VID3_FIFO_UNDERFLOW (1 << 20)
42#define DISPC_IRQ_ACBIAS_COUNT_STAT2 (1 << 21)
43#define DISPC_IRQ_FRAMEDONE2 (1 << 22)
44#define DISPC_IRQ_FRAMEDONEWB (1 << 23)
45#define DISPC_IRQ_FRAMEDONETV (1 << 24)
46#define DISPC_IRQ_WBBUFFEROVERFLOW (1 << 25)
47#define DISPC_IRQ_WBUNCOMPLETEERROR (1 << 26)
48#define DISPC_IRQ_SYNC_LOST3 (1 << 27)
49#define DISPC_IRQ_VSYNC3 (1 << 28)
50#define DISPC_IRQ_ACBIAS_COUNT_STAT3 (1 << 29)
51#define DISPC_IRQ_FRAMEDONE3 (1 << 30)
52
53struct omap_dss_device;
54struct omap_overlay_manager;
55struct dss_lcd_mgr_config;
56struct snd_aes_iec958;
57struct snd_cea_861_aud_if;
58struct hdmi_avi_infoframe;
59
60enum omap_display_type {
61 OMAP_DISPLAY_TYPE_NONE = 0,
62 OMAP_DISPLAY_TYPE_DPI = 1 << 0,
63 OMAP_DISPLAY_TYPE_DBI = 1 << 1,
64 OMAP_DISPLAY_TYPE_SDI = 1 << 2,
65 OMAP_DISPLAY_TYPE_DSI = 1 << 3,
66 OMAP_DISPLAY_TYPE_VENC = 1 << 4,
67 OMAP_DISPLAY_TYPE_HDMI = 1 << 5,
68 OMAP_DISPLAY_TYPE_DVI = 1 << 6,
69};
70
71enum omap_plane {
72 OMAP_DSS_GFX = 0,
73 OMAP_DSS_VIDEO1 = 1,
74 OMAP_DSS_VIDEO2 = 2,
75 OMAP_DSS_VIDEO3 = 3,
76 OMAP_DSS_WB = 4,
77};
78
79enum omap_channel {
80 OMAP_DSS_CHANNEL_LCD = 0,
81 OMAP_DSS_CHANNEL_DIGIT = 1,
82 OMAP_DSS_CHANNEL_LCD2 = 2,
83 OMAP_DSS_CHANNEL_LCD3 = 3,
84 OMAP_DSS_CHANNEL_WB = 4,
85};
86
87enum omap_color_mode {
88 OMAP_DSS_COLOR_CLUT1 = 1 << 0, /* BITMAP 1 */
89 OMAP_DSS_COLOR_CLUT2 = 1 << 1, /* BITMAP 2 */
90 OMAP_DSS_COLOR_CLUT4 = 1 << 2, /* BITMAP 4 */
91 OMAP_DSS_COLOR_CLUT8 = 1 << 3, /* BITMAP 8 */
92 OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */
93 OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */
94 OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */
95 OMAP_DSS_COLOR_RGB24U = 1 << 7, /* RGB24, 32-bit container */
96 OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24, 24-bit container */
97 OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */
98 OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */
99 OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */
100 OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */
101 OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */
102 OMAP_DSS_COLOR_NV12 = 1 << 14, /* NV12 format: YUV 4:2:0 */
103 OMAP_DSS_COLOR_RGBA16 = 1 << 15, /* RGBA16 - 4444 */
104 OMAP_DSS_COLOR_RGBX16 = 1 << 16, /* RGBx16 - 4444 */
105 OMAP_DSS_COLOR_ARGB16_1555 = 1 << 17, /* ARGB16 - 1555 */
106 OMAP_DSS_COLOR_XRGB16_1555 = 1 << 18, /* xRGB16 - 1555 */
107};
108
109enum omap_dss_load_mode {
110 OMAP_DSS_LOAD_CLUT_AND_FRAME = 0,
111 OMAP_DSS_LOAD_CLUT_ONLY = 1,
112 OMAP_DSS_LOAD_FRAME_ONLY = 2,
113 OMAP_DSS_LOAD_CLUT_ONCE_FRAME = 3,
114};
115
116enum omap_dss_trans_key_type {
117 OMAP_DSS_COLOR_KEY_GFX_DST = 0,
118 OMAP_DSS_COLOR_KEY_VID_SRC = 1,
119};
120
121enum omap_rfbi_te_mode {
122 OMAP_DSS_RFBI_TE_MODE_1 = 1,
123 OMAP_DSS_RFBI_TE_MODE_2 = 2,
124};
125
126enum omap_dss_signal_level {
127 OMAPDSS_SIG_ACTIVE_LOW,
128 OMAPDSS_SIG_ACTIVE_HIGH,
129};
130
131enum omap_dss_signal_edge {
132 OMAPDSS_DRIVE_SIG_FALLING_EDGE,
133 OMAPDSS_DRIVE_SIG_RISING_EDGE,
134};
135
136enum omap_dss_venc_type {
137 OMAP_DSS_VENC_TYPE_COMPOSITE,
138 OMAP_DSS_VENC_TYPE_SVIDEO,
139};
140
141enum omap_dss_dsi_pixel_format {
142 OMAP_DSS_DSI_FMT_RGB888,
143 OMAP_DSS_DSI_FMT_RGB666,
144 OMAP_DSS_DSI_FMT_RGB666_PACKED,
145 OMAP_DSS_DSI_FMT_RGB565,
146};
147
148enum omap_dss_dsi_mode {
149 OMAP_DSS_DSI_CMD_MODE = 0,
150 OMAP_DSS_DSI_VIDEO_MODE,
151};
152
153enum omap_display_caps {
154 OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0,
155 OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1,
156};
157
158enum omap_dss_display_state {
159 OMAP_DSS_DISPLAY_DISABLED = 0,
160 OMAP_DSS_DISPLAY_ACTIVE,
161};
162
163enum omap_dss_rotation_type {
164 OMAP_DSS_ROT_DMA = 1 << 0,
165 OMAP_DSS_ROT_VRFB = 1 << 1,
166 OMAP_DSS_ROT_TILER = 1 << 2,
167};
168
169/* clockwise rotation angle */
170enum omap_dss_rotation_angle {
171 OMAP_DSS_ROT_0 = 0,
172 OMAP_DSS_ROT_90 = 1,
173 OMAP_DSS_ROT_180 = 2,
174 OMAP_DSS_ROT_270 = 3,
175};
176
177enum omap_overlay_caps {
178 OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
179 OMAP_DSS_OVL_CAP_GLOBAL_ALPHA = 1 << 1,
180 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA = 1 << 2,
181 OMAP_DSS_OVL_CAP_ZORDER = 1 << 3,
182 OMAP_DSS_OVL_CAP_POS = 1 << 4,
183 OMAP_DSS_OVL_CAP_REPLICATION = 1 << 5,
184};
185
186enum omap_overlay_manager_caps {
187 OMAP_DSS_DUMMY_VALUE, /* add a dummy value to prevent compiler error */
188};
189
190enum omap_dss_clk_source {
191 OMAP_DSS_CLK_SRC_FCK = 0, /* OMAP2/3: DSS1_ALWON_FCLK
192 * OMAP4: DSS_FCLK */
193 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, /* OMAP3: DSI1_PLL_FCLK
194 * OMAP4: PLL1_CLK1 */
195 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, /* OMAP3: DSI2_PLL_FCLK
196 * OMAP4: PLL1_CLK2 */
197 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC, /* OMAP4: PLL2_CLK1 */
198 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI, /* OMAP4: PLL2_CLK2 */
199};
200
201enum omap_hdmi_flags {
202 OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP = 1 << 0,
203};
204
205enum omap_dss_output_id {
206 OMAP_DSS_OUTPUT_DPI = 1 << 0,
207 OMAP_DSS_OUTPUT_DBI = 1 << 1,
208 OMAP_DSS_OUTPUT_SDI = 1 << 2,
209 OMAP_DSS_OUTPUT_DSI1 = 1 << 3,
210 OMAP_DSS_OUTPUT_DSI2 = 1 << 4,
211 OMAP_DSS_OUTPUT_VENC = 1 << 5,
212 OMAP_DSS_OUTPUT_HDMI = 1 << 6,
213};
214
215/* RFBI */
216
217struct rfbi_timings {
218 int cs_on_time;
219 int cs_off_time;
220 int we_on_time;
221 int we_off_time;
222 int re_on_time;
223 int re_off_time;
224 int we_cycle_time;
225 int re_cycle_time;
226 int cs_pulse_width;
227 int access_time;
228
229 int clk_div;
230
231 u32 tim[5]; /* set by rfbi_convert_timings() */
232
233 int converted;
234};
235
236/* DSI */
237
238enum omap_dss_dsi_trans_mode {
239 /* Sync Pulses: both sync start and end packets sent */
240 OMAP_DSS_DSI_PULSE_MODE,
241 /* Sync Events: only sync start packets sent */
242 OMAP_DSS_DSI_EVENT_MODE,
243 /* Burst: only sync start packets sent, pixels are time compressed */
244 OMAP_DSS_DSI_BURST_MODE,
245};
246
247struct omap_dss_dsi_videomode_timings {
248 unsigned long hsclk;
249
250 unsigned ndl;
251 unsigned bitspp;
252
253 /* pixels */
254 u16 hact;
255 /* lines */
256 u16 vact;
257
258 /* DSI video mode blanking data */
259 /* Unit: byte clock cycles */
260 u16 hss;
261 u16 hsa;
262 u16 hse;
263 u16 hfp;
264 u16 hbp;
265 /* Unit: line clocks */
266 u16 vsa;
267 u16 vfp;
268 u16 vbp;
269
270 /* DSI blanking modes */
271 int blanking_mode;
272 int hsa_blanking_mode;
273 int hbp_blanking_mode;
274 int hfp_blanking_mode;
275
276 enum omap_dss_dsi_trans_mode trans_mode;
277
278 bool ddr_clk_always_on;
279 int window_sync;
280};
281
282struct omap_dss_dsi_config {
283 enum omap_dss_dsi_mode mode;
284 enum omap_dss_dsi_pixel_format pixel_format;
285 const struct omap_video_timings *timings;
286
287 unsigned long hs_clk_min, hs_clk_max;
288 unsigned long lp_clk_min, lp_clk_max;
289
290 bool ddr_clk_always_on;
291 enum omap_dss_dsi_trans_mode trans_mode;
292};
293
294struct omap_video_timings {
295 /* Unit: pixels */
296 u16 x_res;
297 /* Unit: pixels */
298 u16 y_res;
299 /* Unit: Hz */
300 u32 pixelclock;
301 /* Unit: pixel clocks */
302 u16 hsw; /* Horizontal synchronization pulse width */
303 /* Unit: pixel clocks */
304 u16 hfp; /* Horizontal front porch */
305 /* Unit: pixel clocks */
306 u16 hbp; /* Horizontal back porch */
307 /* Unit: line clocks */
308 u16 vsw; /* Vertical synchronization pulse width */
309 /* Unit: line clocks */
310 u16 vfp; /* Vertical front porch */
311 /* Unit: line clocks */
312 u16 vbp; /* Vertical back porch */
313
314 /* Vsync logic level */
315 enum omap_dss_signal_level vsync_level;
316 /* Hsync logic level */
317 enum omap_dss_signal_level hsync_level;
318 /* Interlaced or Progressive timings */
319 bool interlace;
320 /* Pixel clock edge to drive LCD data */
321 enum omap_dss_signal_edge data_pclk_edge;
322 /* Data enable logic level */
323 enum omap_dss_signal_level de_level;
324 /* Pixel clock edges to drive HSYNC and VSYNC signals */
325 enum omap_dss_signal_edge sync_pclk_edge;
326
327 bool double_pixel;
328};
329
330/* Hardcoded timings for tv modes. Venc only uses these to
331 * identify the mode, and does not actually use the configs
332 * itself. However, the configs should be something that
333 * a normal monitor can also show */
334extern const struct omap_video_timings omap_dss_pal_timings;
335extern const struct omap_video_timings omap_dss_ntsc_timings;
336
337struct omap_dss_cpr_coefs {
338 s16 rr, rg, rb;
339 s16 gr, gg, gb;
340 s16 br, bg, bb;
341};
342
343struct omap_overlay_info {
344 dma_addr_t paddr;
345 dma_addr_t p_uv_addr; /* for NV12 format */
346 u16 screen_width;
347 u16 width;
348 u16 height;
349 enum omap_color_mode color_mode;
350 u8 rotation;
351 enum omap_dss_rotation_type rotation_type;
352 bool mirror;
353
354 u16 pos_x;
355 u16 pos_y;
356 u16 out_width; /* if 0, out_width == width */
357 u16 out_height; /* if 0, out_height == height */
358 u8 global_alpha;
359 u8 pre_mult_alpha;
360 u8 zorder;
361};
362
363struct omap_overlay {
364 struct kobject kobj;
365 struct list_head list;
366
367 /* static fields */
368 const char *name;
369 enum omap_plane id;
370 enum omap_color_mode supported_modes;
371 enum omap_overlay_caps caps;
372
373 /* dynamic fields */
374 struct omap_overlay_manager *manager;
375
376 /*
377 * The following functions do not block:
378 *
379 * is_enabled
380 * set_overlay_info
381 * get_overlay_info
382 *
383 * The rest of the functions may block and cannot be called from
384 * interrupt context
385 */
386
387 int (*enable)(struct omap_overlay *ovl);
388 int (*disable)(struct omap_overlay *ovl);
389 bool (*is_enabled)(struct omap_overlay *ovl);
390
391 int (*set_manager)(struct omap_overlay *ovl,
392 struct omap_overlay_manager *mgr);
393 int (*unset_manager)(struct omap_overlay *ovl);
394
395 int (*set_overlay_info)(struct omap_overlay *ovl,
396 struct omap_overlay_info *info);
397 void (*get_overlay_info)(struct omap_overlay *ovl,
398 struct omap_overlay_info *info);
399
400 int (*wait_for_go)(struct omap_overlay *ovl);
401
402 struct omap_dss_device *(*get_device)(struct omap_overlay *ovl);
403};
404
405struct omap_overlay_manager_info {
406 u32 default_color;
407
408 enum omap_dss_trans_key_type trans_key_type;
409 u32 trans_key;
410 bool trans_enabled;
411
412 bool partial_alpha_enabled;
413
414 bool cpr_enable;
415 struct omap_dss_cpr_coefs cpr_coefs;
416};
417
418struct omap_overlay_manager {
419 struct kobject kobj;
420
421 /* static fields */
422 const char *name;
423 enum omap_channel id;
424 enum omap_overlay_manager_caps caps;
425 struct list_head overlays;
426 enum omap_display_type supported_displays;
427 enum omap_dss_output_id supported_outputs;
428
429 /* dynamic fields */
430 struct omap_dss_device *output;
431
432 /*
433 * The following functions do not block:
434 *
435 * set_manager_info
436 * get_manager_info
437 * apply
438 *
439 * The rest of the functions may block and cannot be called from
440 * interrupt context
441 */
442
443 int (*set_output)(struct omap_overlay_manager *mgr,
444 struct omap_dss_device *output);
445 int (*unset_output)(struct omap_overlay_manager *mgr);
446
447 int (*set_manager_info)(struct omap_overlay_manager *mgr,
448 struct omap_overlay_manager_info *info);
449 void (*get_manager_info)(struct omap_overlay_manager *mgr,
450 struct omap_overlay_manager_info *info);
451
452 int (*apply)(struct omap_overlay_manager *mgr);
453 int (*wait_for_go)(struct omap_overlay_manager *mgr);
454 int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
455
456 struct omap_dss_device *(*get_device)(struct omap_overlay_manager *mgr);
457};
458
459/* 22 pins means 1 clk lane and 10 data lanes */
460#define OMAP_DSS_MAX_DSI_PINS 22
461
462struct omap_dsi_pin_config {
463 int num_pins;
464 /*
465 * pin numbers in the following order:
466 * clk+, clk-
467 * data1+, data1-
468 * data2+, data2-
469 * ...
470 */
471 int pins[OMAP_DSS_MAX_DSI_PINS];
472};
473
474struct omap_dss_writeback_info {
475 u32 paddr;
476 u32 p_uv_addr;
477 u16 buf_width;
478 u16 width;
479 u16 height;
480 enum omap_color_mode color_mode;
481 u8 rotation;
482 enum omap_dss_rotation_type rotation_type;
483 bool mirror;
484 u8 pre_mult_alpha;
485};
486
487struct omapdss_dpi_ops {
488 int (*connect)(struct omap_dss_device *dssdev,
489 struct omap_dss_device *dst);
490 void (*disconnect)(struct omap_dss_device *dssdev,
491 struct omap_dss_device *dst);
492
493 int (*enable)(struct omap_dss_device *dssdev);
494 void (*disable)(struct omap_dss_device *dssdev);
495
496 int (*check_timings)(struct omap_dss_device *dssdev,
497 struct omap_video_timings *timings);
498 void (*set_timings)(struct omap_dss_device *dssdev,
499 struct omap_video_timings *timings);
500 void (*get_timings)(struct omap_dss_device *dssdev,
501 struct omap_video_timings *timings);
502
503 void (*set_data_lines)(struct omap_dss_device *dssdev, int data_lines);
504};
505
506struct omapdss_sdi_ops {
507 int (*connect)(struct omap_dss_device *dssdev,
508 struct omap_dss_device *dst);
509 void (*disconnect)(struct omap_dss_device *dssdev,
510 struct omap_dss_device *dst);
511
512 int (*enable)(struct omap_dss_device *dssdev);
513 void (*disable)(struct omap_dss_device *dssdev);
514
515 int (*check_timings)(struct omap_dss_device *dssdev,
516 struct omap_video_timings *timings);
517 void (*set_timings)(struct omap_dss_device *dssdev,
518 struct omap_video_timings *timings);
519 void (*get_timings)(struct omap_dss_device *dssdev,
520 struct omap_video_timings *timings);
521
522 void (*set_datapairs)(struct omap_dss_device *dssdev, int datapairs);
523};
524
525struct omapdss_dvi_ops {
526 int (*connect)(struct omap_dss_device *dssdev,
527 struct omap_dss_device *dst);
528 void (*disconnect)(struct omap_dss_device *dssdev,
529 struct omap_dss_device *dst);
530
531 int (*enable)(struct omap_dss_device *dssdev);
532 void (*disable)(struct omap_dss_device *dssdev);
533
534 int (*check_timings)(struct omap_dss_device *dssdev,
535 struct omap_video_timings *timings);
536 void (*set_timings)(struct omap_dss_device *dssdev,
537 struct omap_video_timings *timings);
538 void (*get_timings)(struct omap_dss_device *dssdev,
539 struct omap_video_timings *timings);
540};
541
542struct omapdss_atv_ops {
543 int (*connect)(struct omap_dss_device *dssdev,
544 struct omap_dss_device *dst);
545 void (*disconnect)(struct omap_dss_device *dssdev,
546 struct omap_dss_device *dst);
547
548 int (*enable)(struct omap_dss_device *dssdev);
549 void (*disable)(struct omap_dss_device *dssdev);
550
551 int (*check_timings)(struct omap_dss_device *dssdev,
552 struct omap_video_timings *timings);
553 void (*set_timings)(struct omap_dss_device *dssdev,
554 struct omap_video_timings *timings);
555 void (*get_timings)(struct omap_dss_device *dssdev,
556 struct omap_video_timings *timings);
557
558 void (*set_type)(struct omap_dss_device *dssdev,
559 enum omap_dss_venc_type type);
560 void (*invert_vid_out_polarity)(struct omap_dss_device *dssdev,
561 bool invert_polarity);
562
563 int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
564 u32 (*get_wss)(struct omap_dss_device *dssdev);
565};
566
567struct omapdss_hdmi_ops {
568 int (*connect)(struct omap_dss_device *dssdev,
569 struct omap_dss_device *dst);
570 void (*disconnect)(struct omap_dss_device *dssdev,
571 struct omap_dss_device *dst);
572
573 int (*enable)(struct omap_dss_device *dssdev);
574 void (*disable)(struct omap_dss_device *dssdev);
575
576 int (*check_timings)(struct omap_dss_device *dssdev,
577 struct omap_video_timings *timings);
578 void (*set_timings)(struct omap_dss_device *dssdev,
579 struct omap_video_timings *timings);
580 void (*get_timings)(struct omap_dss_device *dssdev,
581 struct omap_video_timings *timings);
582
583 int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
584 bool (*detect)(struct omap_dss_device *dssdev);
585
586 int (*set_hdmi_mode)(struct omap_dss_device *dssdev, bool hdmi_mode);
587 int (*set_infoframe)(struct omap_dss_device *dssdev,
588 const struct hdmi_avi_infoframe *avi);
589};
590
591struct omapdss_dsi_ops {
592 int (*connect)(struct omap_dss_device *dssdev,
593 struct omap_dss_device *dst);
594 void (*disconnect)(struct omap_dss_device *dssdev,
595 struct omap_dss_device *dst);
596
597 int (*enable)(struct omap_dss_device *dssdev);
598 void (*disable)(struct omap_dss_device *dssdev, bool disconnect_lanes,
599 bool enter_ulps);
600
601 /* bus configuration */
602 int (*set_config)(struct omap_dss_device *dssdev,
603 const struct omap_dss_dsi_config *cfg);
604 int (*configure_pins)(struct omap_dss_device *dssdev,
605 const struct omap_dsi_pin_config *pin_cfg);
606
607 void (*enable_hs)(struct omap_dss_device *dssdev, int channel,
608 bool enable);
609 int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
610
611 int (*update)(struct omap_dss_device *dssdev, int channel,
612 void (*callback)(int, void *), void *data);
613
614 void (*bus_lock)(struct omap_dss_device *dssdev);
615 void (*bus_unlock)(struct omap_dss_device *dssdev);
616
617 int (*enable_video_output)(struct omap_dss_device *dssdev, int channel);
618 void (*disable_video_output)(struct omap_dss_device *dssdev,
619 int channel);
620
621 int (*request_vc)(struct omap_dss_device *dssdev, int *channel);
622 int (*set_vc_id)(struct omap_dss_device *dssdev, int channel,
623 int vc_id);
624 void (*release_vc)(struct omap_dss_device *dssdev, int channel);
625
626 /* data transfer */
627 int (*dcs_write)(struct omap_dss_device *dssdev, int channel,
628 u8 *data, int len);
629 int (*dcs_write_nosync)(struct omap_dss_device *dssdev, int channel,
630 u8 *data, int len);
631 int (*dcs_read)(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
632 u8 *data, int len);
633
634 int (*gen_write)(struct omap_dss_device *dssdev, int channel,
635 u8 *data, int len);
636 int (*gen_write_nosync)(struct omap_dss_device *dssdev, int channel,
637 u8 *data, int len);
638 int (*gen_read)(struct omap_dss_device *dssdev, int channel,
639 u8 *reqdata, int reqlen,
640 u8 *data, int len);
641
642 int (*bta_sync)(struct omap_dss_device *dssdev, int channel);
643
644 int (*set_max_rx_packet_size)(struct omap_dss_device *dssdev,
645 int channel, u16 plen);
646};
647
648struct omap_dss_device {
649 struct kobject kobj;
650 struct device *dev;
651
652 struct module *owner;
653
654 struct list_head panel_list;
655
656 /* alias in the form of "display%d" */
657 char alias[16];
658
659 enum omap_display_type type;
660 enum omap_display_type output_type;
661
662 union {
663 struct {
664 u8 data_lines;
665 } dpi;
666
667 struct {
668 u8 channel;
669 u8 data_lines;
670 } rfbi;
671
672 struct {
673 u8 datapairs;
674 } sdi;
675
676 struct {
677 int module;
678 } dsi;
679
680 struct {
681 enum omap_dss_venc_type type;
682 bool invert_polarity;
683 } venc;
684 } phy;
685
686 struct {
687 struct omap_video_timings timings;
688
689 enum omap_dss_dsi_pixel_format dsi_pix_fmt;
690 enum omap_dss_dsi_mode dsi_mode;
691 } panel;
692
693 struct {
694 u8 pixel_size;
695 struct rfbi_timings rfbi_timings;
696 } ctrl;
697
698 const char *name;
699
700 /* used to match device to driver */
701 const char *driver_name;
702
703 void *data;
704
705 struct omap_dss_driver *driver;
706
707 union {
708 const struct omapdss_dpi_ops *dpi;
709 const struct omapdss_sdi_ops *sdi;
710 const struct omapdss_dvi_ops *dvi;
711 const struct omapdss_hdmi_ops *hdmi;
712 const struct omapdss_atv_ops *atv;
713 const struct omapdss_dsi_ops *dsi;
714 } ops;
715
716 /* helper variable for driver suspend/resume */
717 bool activate_after_resume;
718
719 enum omap_display_caps caps;
720
721 struct omap_dss_device *src;
722
723 enum omap_dss_display_state state;
724
725 /* OMAP DSS output specific fields */
726
727 struct list_head list;
728
729 /* DISPC channel for this output */
730 enum omap_channel dispc_channel;
731 bool dispc_channel_connected;
732
733 /* output instance */
734 enum omap_dss_output_id id;
735
736 /* the port number in the DT node */
737 int port_num;
738
739 /* dynamic fields */
740 struct omap_overlay_manager *manager;
741
742 struct omap_dss_device *dst;
743};
744
745struct omap_dss_driver {
746 int (*probe)(struct omap_dss_device *);
747 void (*remove)(struct omap_dss_device *);
748
749 int (*connect)(struct omap_dss_device *dssdev);
750 void (*disconnect)(struct omap_dss_device *dssdev);
751
752 int (*enable)(struct omap_dss_device *display);
753 void (*disable)(struct omap_dss_device *display);
754 int (*run_test)(struct omap_dss_device *display, int test);
755
756 int (*update)(struct omap_dss_device *dssdev,
757 u16 x, u16 y, u16 w, u16 h);
758 int (*sync)(struct omap_dss_device *dssdev);
759
760 int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
761 int (*get_te)(struct omap_dss_device *dssdev);
762
763 u8 (*get_rotate)(struct omap_dss_device *dssdev);
764 int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
765
766 bool (*get_mirror)(struct omap_dss_device *dssdev);
767 int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
768
769 int (*memory_read)(struct omap_dss_device *dssdev,
770 void *buf, size_t size,
771 u16 x, u16 y, u16 w, u16 h);
772
773 void (*get_resolution)(struct omap_dss_device *dssdev,
774 u16 *xres, u16 *yres);
775 void (*get_dimensions)(struct omap_dss_device *dssdev,
776 u32 *width, u32 *height);
777 int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
778
779 int (*check_timings)(struct omap_dss_device *dssdev,
780 struct omap_video_timings *timings);
781 void (*set_timings)(struct omap_dss_device *dssdev,
782 struct omap_video_timings *timings);
783 void (*get_timings)(struct omap_dss_device *dssdev,
784 struct omap_video_timings *timings);
785
786 int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
787 u32 (*get_wss)(struct omap_dss_device *dssdev);
788
789 int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
790 bool (*detect)(struct omap_dss_device *dssdev);
791
792 int (*set_hdmi_mode)(struct omap_dss_device *dssdev, bool hdmi_mode);
793 int (*set_hdmi_infoframe)(struct omap_dss_device *dssdev,
794 const struct hdmi_avi_infoframe *avi);
795};
796
797enum omapdss_version omapdss_get_version(void);
798bool omapdss_is_initialized(void);
799
800int omap_dss_register_driver(struct omap_dss_driver *);
801void omap_dss_unregister_driver(struct omap_dss_driver *);
802
803int omapdss_register_display(struct omap_dss_device *dssdev);
804void omapdss_unregister_display(struct omap_dss_device *dssdev);
805
806struct omap_dss_device *omap_dss_get_device(struct omap_dss_device *dssdev);
807void omap_dss_put_device(struct omap_dss_device *dssdev);
808#define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
809struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
810struct omap_dss_device *omap_dss_find_device(void *data,
811 int (*match)(struct omap_dss_device *dssdev, void *data));
812const char *omapdss_get_default_display_name(void);
813
814void videomode_to_omap_video_timings(const struct videomode *vm,
815 struct omap_video_timings *ovt);
816void omap_video_timings_to_videomode(const struct omap_video_timings *ovt,
817 struct videomode *vm);
818
819int dss_feat_get_num_mgrs(void);
820int dss_feat_get_num_ovls(void);
821enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane);
822
823
824
825int omap_dss_get_num_overlay_managers(void);
826struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
827
828int omap_dss_get_num_overlays(void);
829struct omap_overlay *omap_dss_get_overlay(int num);
830
831int omapdss_register_output(struct omap_dss_device *output);
832void omapdss_unregister_output(struct omap_dss_device *output);
833struct omap_dss_device *omap_dss_get_output(enum omap_dss_output_id id);
834struct omap_dss_device *omap_dss_find_output(const char *name);
835struct omap_dss_device *omap_dss_find_output_by_port_node(struct device_node *port);
836int omapdss_output_set_device(struct omap_dss_device *out,
837 struct omap_dss_device *dssdev);
838int omapdss_output_unset_device(struct omap_dss_device *out);
839
840struct omap_dss_device *omapdss_find_output_from_display(struct omap_dss_device *dssdev);
841struct omap_overlay_manager *omapdss_find_mgr_from_display(struct omap_dss_device *dssdev);
842
843void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
844 u16 *xres, u16 *yres);
845int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
846void omapdss_default_get_timings(struct omap_dss_device *dssdev,
847 struct omap_video_timings *timings);
848
849typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
850int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
851int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
852
853int omapdss_compat_init(void);
854void omapdss_compat_uninit(void);
855
856static inline bool omapdss_device_is_connected(struct omap_dss_device *dssdev)
857{
858 return dssdev->src;
859}
860
861static inline bool omapdss_device_is_enabled(struct omap_dss_device *dssdev)
862{
863 return dssdev->state == OMAP_DSS_DISPLAY_ACTIVE;
864}
865
866struct device_node *
867omapdss_of_get_next_port(const struct device_node *parent,
868 struct device_node *prev);
869
870struct device_node *
871omapdss_of_get_next_endpoint(const struct device_node *parent,
872 struct device_node *prev);
873
874struct device_node *
875omapdss_of_get_first_endpoint(const struct device_node *parent);
876
877struct omap_dss_device *
878omapdss_of_find_source_for_first_ep(struct device_node *node);
879
880#endif /* __OMAPFB_DSS_H */
Linux kernel - Deliverables
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