Commit | Line | Data |
---|---|---|
0793a61d | 1 | /* |
57c0c15b | 2 | * Performance events core code: |
0793a61d | 3 | * |
98144511 | 4 | * Copyright (C) 2008 Thomas Gleixner <tglx@linutronix.de> |
e7e7ee2e IM |
5 | * Copyright (C) 2008-2011 Red Hat, Inc., Ingo Molnar |
6 | * Copyright (C) 2008-2011 Red Hat, Inc., Peter Zijlstra <pzijlstr@redhat.com> | |
d36b6910 | 7 | * Copyright © 2009 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com> |
7b732a75 | 8 | * |
57c0c15b | 9 | * For licensing details see kernel-base/COPYING |
0793a61d TG |
10 | */ |
11 | ||
12 | #include <linux/fs.h> | |
b9cacc7b | 13 | #include <linux/mm.h> |
0793a61d TG |
14 | #include <linux/cpu.h> |
15 | #include <linux/smp.h> | |
2e80a82a | 16 | #include <linux/idr.h> |
04289bb9 | 17 | #include <linux/file.h> |
0793a61d | 18 | #include <linux/poll.h> |
5a0e3ad6 | 19 | #include <linux/slab.h> |
76e1d904 | 20 | #include <linux/hash.h> |
12351ef8 | 21 | #include <linux/tick.h> |
0793a61d | 22 | #include <linux/sysfs.h> |
22a4f650 | 23 | #include <linux/dcache.h> |
0793a61d | 24 | #include <linux/percpu.h> |
22a4f650 | 25 | #include <linux/ptrace.h> |
c277443c | 26 | #include <linux/reboot.h> |
b9cacc7b | 27 | #include <linux/vmstat.h> |
abe43400 | 28 | #include <linux/device.h> |
6e5fdeed | 29 | #include <linux/export.h> |
906010b2 | 30 | #include <linux/vmalloc.h> |
b9cacc7b PZ |
31 | #include <linux/hardirq.h> |
32 | #include <linux/rculist.h> | |
0793a61d TG |
33 | #include <linux/uaccess.h> |
34 | #include <linux/syscalls.h> | |
35 | #include <linux/anon_inodes.h> | |
aa9c4c0f | 36 | #include <linux/kernel_stat.h> |
cdd6c482 | 37 | #include <linux/perf_event.h> |
6fb2915d | 38 | #include <linux/ftrace_event.h> |
3c502e7a | 39 | #include <linux/hw_breakpoint.h> |
c5ebcedb | 40 | #include <linux/mm_types.h> |
877c6856 | 41 | #include <linux/cgroup.h> |
0793a61d | 42 | |
76369139 FW |
43 | #include "internal.h" |
44 | ||
4e193bd4 TB |
45 | #include <asm/irq_regs.h> |
46 | ||
fe4b04fa | 47 | struct remote_function_call { |
e7e7ee2e IM |
48 | struct task_struct *p; |
49 | int (*func)(void *info); | |
50 | void *info; | |
51 | int ret; | |
fe4b04fa PZ |
52 | }; |
53 | ||
54 | static void remote_function(void *data) | |
55 | { | |
56 | struct remote_function_call *tfc = data; | |
57 | struct task_struct *p = tfc->p; | |
58 | ||
59 | if (p) { | |
60 | tfc->ret = -EAGAIN; | |
61 | if (task_cpu(p) != smp_processor_id() || !task_curr(p)) | |
62 | return; | |
63 | } | |
64 | ||
65 | tfc->ret = tfc->func(tfc->info); | |
66 | } | |
67 | ||
68 | /** | |
69 | * task_function_call - call a function on the cpu on which a task runs | |
70 | * @p: the task to evaluate | |
71 | * @func: the function to be called | |
72 | * @info: the function call argument | |
73 | * | |
74 | * Calls the function @func when the task is currently running. This might | |
75 | * be on the current CPU, which just calls the function directly | |
76 | * | |
77 | * returns: @func return value, or | |
78 | * -ESRCH - when the process isn't running | |
79 | * -EAGAIN - when the process moved away | |
80 | */ | |
81 | static int | |
82 | task_function_call(struct task_struct *p, int (*func) (void *info), void *info) | |
83 | { | |
84 | struct remote_function_call data = { | |
e7e7ee2e IM |
85 | .p = p, |
86 | .func = func, | |
87 | .info = info, | |
88 | .ret = -ESRCH, /* No such (running) process */ | |
fe4b04fa PZ |
89 | }; |
90 | ||
91 | if (task_curr(p)) | |
92 | smp_call_function_single(task_cpu(p), remote_function, &data, 1); | |
93 | ||
94 | return data.ret; | |
95 | } | |
96 | ||
97 | /** | |
98 | * cpu_function_call - call a function on the cpu | |
99 | * @func: the function to be called | |
100 | * @info: the function call argument | |
101 | * | |
102 | * Calls the function @func on the remote cpu. | |
103 | * | |
104 | * returns: @func return value or -ENXIO when the cpu is offline | |
105 | */ | |
106 | static int cpu_function_call(int cpu, int (*func) (void *info), void *info) | |
107 | { | |
108 | struct remote_function_call data = { | |
e7e7ee2e IM |
109 | .p = NULL, |
110 | .func = func, | |
111 | .info = info, | |
112 | .ret = -ENXIO, /* No such CPU */ | |
fe4b04fa PZ |
113 | }; |
114 | ||
115 | smp_call_function_single(cpu, remote_function, &data, 1); | |
116 | ||
117 | return data.ret; | |
118 | } | |
119 | ||
e5d1367f SE |
120 | #define PERF_FLAG_ALL (PERF_FLAG_FD_NO_GROUP |\ |
121 | PERF_FLAG_FD_OUTPUT |\ | |
a21b0b35 YD |
122 | PERF_FLAG_PID_CGROUP |\ |
123 | PERF_FLAG_FD_CLOEXEC) | |
e5d1367f | 124 | |
bce38cd5 SE |
125 | /* |
126 | * branch priv levels that need permission checks | |
127 | */ | |
128 | #define PERF_SAMPLE_BRANCH_PERM_PLM \ | |
129 | (PERF_SAMPLE_BRANCH_KERNEL |\ | |
130 | PERF_SAMPLE_BRANCH_HV) | |
131 | ||
0b3fcf17 SE |
132 | enum event_type_t { |
133 | EVENT_FLEXIBLE = 0x1, | |
134 | EVENT_PINNED = 0x2, | |
135 | EVENT_ALL = EVENT_FLEXIBLE | EVENT_PINNED, | |
136 | }; | |
137 | ||
e5d1367f SE |
138 | /* |
139 | * perf_sched_events : >0 events exist | |
140 | * perf_cgroup_events: >0 per-cpu cgroup events exist on this cpu | |
141 | */ | |
c5905afb | 142 | struct static_key_deferred perf_sched_events __read_mostly; |
e5d1367f | 143 | static DEFINE_PER_CPU(atomic_t, perf_cgroup_events); |
d010b332 | 144 | static DEFINE_PER_CPU(atomic_t, perf_branch_stack_events); |
e5d1367f | 145 | |
cdd6c482 IM |
146 | static atomic_t nr_mmap_events __read_mostly; |
147 | static atomic_t nr_comm_events __read_mostly; | |
148 | static atomic_t nr_task_events __read_mostly; | |
948b26b6 | 149 | static atomic_t nr_freq_events __read_mostly; |
9ee318a7 | 150 | |
108b02cf PZ |
151 | static LIST_HEAD(pmus); |
152 | static DEFINE_MUTEX(pmus_lock); | |
153 | static struct srcu_struct pmus_srcu; | |
154 | ||
0764771d | 155 | /* |
cdd6c482 | 156 | * perf event paranoia level: |
0fbdea19 IM |
157 | * -1 - not paranoid at all |
158 | * 0 - disallow raw tracepoint access for unpriv | |
cdd6c482 | 159 | * 1 - disallow cpu events for unpriv |
0fbdea19 | 160 | * 2 - disallow kernel profiling for unpriv |
0764771d | 161 | */ |
cdd6c482 | 162 | int sysctl_perf_event_paranoid __read_mostly = 1; |
0764771d | 163 | |
20443384 FW |
164 | /* Minimum for 512 kiB + 1 user control page */ |
165 | int sysctl_perf_event_mlock __read_mostly = 512 + (PAGE_SIZE / 1024); /* 'free' kiB per user */ | |
df58ab24 PZ |
166 | |
167 | /* | |
cdd6c482 | 168 | * max perf event sample rate |
df58ab24 | 169 | */ |
14c63f17 DH |
170 | #define DEFAULT_MAX_SAMPLE_RATE 100000 |
171 | #define DEFAULT_SAMPLE_PERIOD_NS (NSEC_PER_SEC / DEFAULT_MAX_SAMPLE_RATE) | |
172 | #define DEFAULT_CPU_TIME_MAX_PERCENT 25 | |
173 | ||
174 | int sysctl_perf_event_sample_rate __read_mostly = DEFAULT_MAX_SAMPLE_RATE; | |
175 | ||
176 | static int max_samples_per_tick __read_mostly = DIV_ROUND_UP(DEFAULT_MAX_SAMPLE_RATE, HZ); | |
177 | static int perf_sample_period_ns __read_mostly = DEFAULT_SAMPLE_PERIOD_NS; | |
178 | ||
d9494cb4 PZ |
179 | static int perf_sample_allowed_ns __read_mostly = |
180 | DEFAULT_SAMPLE_PERIOD_NS * DEFAULT_CPU_TIME_MAX_PERCENT / 100; | |
14c63f17 DH |
181 | |
182 | void update_perf_cpu_limits(void) | |
183 | { | |
184 | u64 tmp = perf_sample_period_ns; | |
185 | ||
186 | tmp *= sysctl_perf_cpu_time_max_percent; | |
e5302920 | 187 | do_div(tmp, 100); |
d9494cb4 | 188 | ACCESS_ONCE(perf_sample_allowed_ns) = tmp; |
14c63f17 | 189 | } |
163ec435 | 190 | |
9e630205 SE |
191 | static int perf_rotate_context(struct perf_cpu_context *cpuctx); |
192 | ||
163ec435 PZ |
193 | int perf_proc_update_handler(struct ctl_table *table, int write, |
194 | void __user *buffer, size_t *lenp, | |
195 | loff_t *ppos) | |
196 | { | |
723478c8 | 197 | int ret = proc_dointvec_minmax(table, write, buffer, lenp, ppos); |
163ec435 PZ |
198 | |
199 | if (ret || !write) | |
200 | return ret; | |
201 | ||
202 | max_samples_per_tick = DIV_ROUND_UP(sysctl_perf_event_sample_rate, HZ); | |
14c63f17 DH |
203 | perf_sample_period_ns = NSEC_PER_SEC / sysctl_perf_event_sample_rate; |
204 | update_perf_cpu_limits(); | |
205 | ||
206 | return 0; | |
207 | } | |
208 | ||
209 | int sysctl_perf_cpu_time_max_percent __read_mostly = DEFAULT_CPU_TIME_MAX_PERCENT; | |
210 | ||
211 | int perf_cpu_time_max_percent_handler(struct ctl_table *table, int write, | |
212 | void __user *buffer, size_t *lenp, | |
213 | loff_t *ppos) | |
214 | { | |
215 | int ret = proc_dointvec(table, write, buffer, lenp, ppos); | |
216 | ||
217 | if (ret || !write) | |
218 | return ret; | |
219 | ||
220 | update_perf_cpu_limits(); | |
163ec435 PZ |
221 | |
222 | return 0; | |
223 | } | |
1ccd1549 | 224 | |
14c63f17 DH |
225 | /* |
226 | * perf samples are done in some very critical code paths (NMIs). | |
227 | * If they take too much CPU time, the system can lock up and not | |
228 | * get any real work done. This will drop the sample rate when | |
229 | * we detect that events are taking too long. | |
230 | */ | |
231 | #define NR_ACCUMULATED_SAMPLES 128 | |
d9494cb4 | 232 | static DEFINE_PER_CPU(u64, running_sample_length); |
14c63f17 DH |
233 | |
234 | void perf_sample_event_took(u64 sample_len_ns) | |
235 | { | |
236 | u64 avg_local_sample_len; | |
e5302920 | 237 | u64 local_samples_len; |
d9494cb4 | 238 | u64 allowed_ns = ACCESS_ONCE(perf_sample_allowed_ns); |
14c63f17 | 239 | |
d9494cb4 | 240 | if (allowed_ns == 0) |
14c63f17 DH |
241 | return; |
242 | ||
243 | /* decay the counter by 1 average sample */ | |
244 | local_samples_len = __get_cpu_var(running_sample_length); | |
245 | local_samples_len -= local_samples_len/NR_ACCUMULATED_SAMPLES; | |
246 | local_samples_len += sample_len_ns; | |
247 | __get_cpu_var(running_sample_length) = local_samples_len; | |
248 | ||
249 | /* | |
250 | * note: this will be biased artifically low until we have | |
251 | * seen NR_ACCUMULATED_SAMPLES. Doing it this way keeps us | |
252 | * from having to maintain a count. | |
253 | */ | |
254 | avg_local_sample_len = local_samples_len/NR_ACCUMULATED_SAMPLES; | |
255 | ||
d9494cb4 | 256 | if (avg_local_sample_len <= allowed_ns) |
14c63f17 DH |
257 | return; |
258 | ||
259 | if (max_samples_per_tick <= 1) | |
260 | return; | |
261 | ||
262 | max_samples_per_tick = DIV_ROUND_UP(max_samples_per_tick, 2); | |
263 | sysctl_perf_event_sample_rate = max_samples_per_tick * HZ; | |
264 | perf_sample_period_ns = NSEC_PER_SEC / sysctl_perf_event_sample_rate; | |
265 | ||
266 | printk_ratelimited(KERN_WARNING | |
d9494cb4 | 267 | "perf samples too long (%lld > %lld), lowering " |
14c63f17 | 268 | "kernel.perf_event_max_sample_rate to %d\n", |
d9494cb4 | 269 | avg_local_sample_len, allowed_ns, |
14c63f17 DH |
270 | sysctl_perf_event_sample_rate); |
271 | ||
272 | update_perf_cpu_limits(); | |
273 | } | |
274 | ||
cdd6c482 | 275 | static atomic64_t perf_event_id; |
a96bbc16 | 276 | |
0b3fcf17 SE |
277 | static void cpu_ctx_sched_out(struct perf_cpu_context *cpuctx, |
278 | enum event_type_t event_type); | |
279 | ||
280 | static void cpu_ctx_sched_in(struct perf_cpu_context *cpuctx, | |
e5d1367f SE |
281 | enum event_type_t event_type, |
282 | struct task_struct *task); | |
283 | ||
284 | static void update_context_time(struct perf_event_context *ctx); | |
285 | static u64 perf_event_time(struct perf_event *event); | |
0b3fcf17 | 286 | |
cdd6c482 | 287 | void __weak perf_event_print_debug(void) { } |
0793a61d | 288 | |
84c79910 | 289 | extern __weak const char *perf_pmu_name(void) |
0793a61d | 290 | { |
84c79910 | 291 | return "pmu"; |
0793a61d TG |
292 | } |
293 | ||
0b3fcf17 SE |
294 | static inline u64 perf_clock(void) |
295 | { | |
296 | return local_clock(); | |
297 | } | |
298 | ||
e5d1367f SE |
299 | static inline struct perf_cpu_context * |
300 | __get_cpu_context(struct perf_event_context *ctx) | |
301 | { | |
302 | return this_cpu_ptr(ctx->pmu->pmu_cpu_context); | |
303 | } | |
304 | ||
facc4307 PZ |
305 | static void perf_ctx_lock(struct perf_cpu_context *cpuctx, |
306 | struct perf_event_context *ctx) | |
307 | { | |
308 | raw_spin_lock(&cpuctx->ctx.lock); | |
309 | if (ctx) | |
310 | raw_spin_lock(&ctx->lock); | |
311 | } | |
312 | ||
313 | static void perf_ctx_unlock(struct perf_cpu_context *cpuctx, | |
314 | struct perf_event_context *ctx) | |
315 | { | |
316 | if (ctx) | |
317 | raw_spin_unlock(&ctx->lock); | |
318 | raw_spin_unlock(&cpuctx->ctx.lock); | |
319 | } | |
320 | ||
e5d1367f SE |
321 | #ifdef CONFIG_CGROUP_PERF |
322 | ||
877c6856 LZ |
323 | /* |
324 | * perf_cgroup_info keeps track of time_enabled for a cgroup. | |
325 | * This is a per-cpu dynamically allocated data structure. | |
326 | */ | |
327 | struct perf_cgroup_info { | |
328 | u64 time; | |
329 | u64 timestamp; | |
330 | }; | |
331 | ||
332 | struct perf_cgroup { | |
333 | struct cgroup_subsys_state css; | |
86e213e1 | 334 | struct perf_cgroup_info __percpu *info; |
877c6856 LZ |
335 | }; |
336 | ||
3f7cce3c SE |
337 | /* |
338 | * Must ensure cgroup is pinned (css_get) before calling | |
339 | * this function. In other words, we cannot call this function | |
340 | * if there is no cgroup event for the current CPU context. | |
341 | */ | |
e5d1367f SE |
342 | static inline struct perf_cgroup * |
343 | perf_cgroup_from_task(struct task_struct *task) | |
344 | { | |
073219e9 | 345 | return container_of(task_css(task, perf_event_cgrp_id), |
8af01f56 | 346 | struct perf_cgroup, css); |
e5d1367f SE |
347 | } |
348 | ||
349 | static inline bool | |
350 | perf_cgroup_match(struct perf_event *event) | |
351 | { | |
352 | struct perf_event_context *ctx = event->ctx; | |
353 | struct perf_cpu_context *cpuctx = __get_cpu_context(ctx); | |
354 | ||
ef824fa1 TH |
355 | /* @event doesn't care about cgroup */ |
356 | if (!event->cgrp) | |
357 | return true; | |
358 | ||
359 | /* wants specific cgroup scope but @cpuctx isn't associated with any */ | |
360 | if (!cpuctx->cgrp) | |
361 | return false; | |
362 | ||
363 | /* | |
364 | * Cgroup scoping is recursive. An event enabled for a cgroup is | |
365 | * also enabled for all its descendant cgroups. If @cpuctx's | |
366 | * cgroup is a descendant of @event's (the test covers identity | |
367 | * case), it's a match. | |
368 | */ | |
369 | return cgroup_is_descendant(cpuctx->cgrp->css.cgroup, | |
370 | event->cgrp->css.cgroup); | |
e5d1367f SE |
371 | } |
372 | ||
9c5da09d | 373 | static inline bool perf_tryget_cgroup(struct perf_event *event) |
e5d1367f | 374 | { |
9c5da09d | 375 | return css_tryget(&event->cgrp->css); |
e5d1367f SE |
376 | } |
377 | ||
378 | static inline void perf_put_cgroup(struct perf_event *event) | |
379 | { | |
380 | css_put(&event->cgrp->css); | |
381 | } | |
382 | ||
383 | static inline void perf_detach_cgroup(struct perf_event *event) | |
384 | { | |
385 | perf_put_cgroup(event); | |
386 | event->cgrp = NULL; | |
387 | } | |
388 | ||
389 | static inline int is_cgroup_event(struct perf_event *event) | |
390 | { | |
391 | return event->cgrp != NULL; | |
392 | } | |
393 | ||
394 | static inline u64 perf_cgroup_event_time(struct perf_event *event) | |
395 | { | |
396 | struct perf_cgroup_info *t; | |
397 | ||
398 | t = per_cpu_ptr(event->cgrp->info, event->cpu); | |
399 | return t->time; | |
400 | } | |
401 | ||
402 | static inline void __update_cgrp_time(struct perf_cgroup *cgrp) | |
403 | { | |
404 | struct perf_cgroup_info *info; | |
405 | u64 now; | |
406 | ||
407 | now = perf_clock(); | |
408 | ||
409 | info = this_cpu_ptr(cgrp->info); | |
410 | ||
411 | info->time += now - info->timestamp; | |
412 | info->timestamp = now; | |
413 | } | |
414 | ||
415 | static inline void update_cgrp_time_from_cpuctx(struct perf_cpu_context *cpuctx) | |
416 | { | |
417 | struct perf_cgroup *cgrp_out = cpuctx->cgrp; | |
418 | if (cgrp_out) | |
419 | __update_cgrp_time(cgrp_out); | |
420 | } | |
421 | ||
422 | static inline void update_cgrp_time_from_event(struct perf_event *event) | |
423 | { | |
3f7cce3c SE |
424 | struct perf_cgroup *cgrp; |
425 | ||
e5d1367f | 426 | /* |
3f7cce3c SE |
427 | * ensure we access cgroup data only when needed and |
428 | * when we know the cgroup is pinned (css_get) | |
e5d1367f | 429 | */ |
3f7cce3c | 430 | if (!is_cgroup_event(event)) |
e5d1367f SE |
431 | return; |
432 | ||
3f7cce3c SE |
433 | cgrp = perf_cgroup_from_task(current); |
434 | /* | |
435 | * Do not update time when cgroup is not active | |
436 | */ | |
437 | if (cgrp == event->cgrp) | |
438 | __update_cgrp_time(event->cgrp); | |
e5d1367f SE |
439 | } |
440 | ||
441 | static inline void | |
3f7cce3c SE |
442 | perf_cgroup_set_timestamp(struct task_struct *task, |
443 | struct perf_event_context *ctx) | |
e5d1367f SE |
444 | { |
445 | struct perf_cgroup *cgrp; | |
446 | struct perf_cgroup_info *info; | |
447 | ||
3f7cce3c SE |
448 | /* |
449 | * ctx->lock held by caller | |
450 | * ensure we do not access cgroup data | |
451 | * unless we have the cgroup pinned (css_get) | |
452 | */ | |
453 | if (!task || !ctx->nr_cgroups) | |
e5d1367f SE |
454 | return; |
455 | ||
456 | cgrp = perf_cgroup_from_task(task); | |
457 | info = this_cpu_ptr(cgrp->info); | |
3f7cce3c | 458 | info->timestamp = ctx->timestamp; |
e5d1367f SE |
459 | } |
460 | ||
461 | #define PERF_CGROUP_SWOUT 0x1 /* cgroup switch out every event */ | |
462 | #define PERF_CGROUP_SWIN 0x2 /* cgroup switch in events based on task */ | |
463 | ||
464 | /* | |
465 | * reschedule events based on the cgroup constraint of task. | |
466 | * | |
467 | * mode SWOUT : schedule out everything | |
468 | * mode SWIN : schedule in based on cgroup for next | |
469 | */ | |
470 | void perf_cgroup_switch(struct task_struct *task, int mode) | |
471 | { | |
472 | struct perf_cpu_context *cpuctx; | |
473 | struct pmu *pmu; | |
474 | unsigned long flags; | |
475 | ||
476 | /* | |
477 | * disable interrupts to avoid geting nr_cgroup | |
478 | * changes via __perf_event_disable(). Also | |
479 | * avoids preemption. | |
480 | */ | |
481 | local_irq_save(flags); | |
482 | ||
483 | /* | |
484 | * we reschedule only in the presence of cgroup | |
485 | * constrained events. | |
486 | */ | |
487 | rcu_read_lock(); | |
488 | ||
489 | list_for_each_entry_rcu(pmu, &pmus, entry) { | |
e5d1367f | 490 | cpuctx = this_cpu_ptr(pmu->pmu_cpu_context); |
95cf59ea PZ |
491 | if (cpuctx->unique_pmu != pmu) |
492 | continue; /* ensure we process each cpuctx once */ | |
e5d1367f | 493 | |
e5d1367f SE |
494 | /* |
495 | * perf_cgroup_events says at least one | |
496 | * context on this CPU has cgroup events. | |
497 | * | |
498 | * ctx->nr_cgroups reports the number of cgroup | |
499 | * events for a context. | |
500 | */ | |
501 | if (cpuctx->ctx.nr_cgroups > 0) { | |
facc4307 PZ |
502 | perf_ctx_lock(cpuctx, cpuctx->task_ctx); |
503 | perf_pmu_disable(cpuctx->ctx.pmu); | |
e5d1367f SE |
504 | |
505 | if (mode & PERF_CGROUP_SWOUT) { | |
506 | cpu_ctx_sched_out(cpuctx, EVENT_ALL); | |
507 | /* | |
508 | * must not be done before ctxswout due | |
509 | * to event_filter_match() in event_sched_out() | |
510 | */ | |
511 | cpuctx->cgrp = NULL; | |
512 | } | |
513 | ||
514 | if (mode & PERF_CGROUP_SWIN) { | |
e566b76e | 515 | WARN_ON_ONCE(cpuctx->cgrp); |
95cf59ea PZ |
516 | /* |
517 | * set cgrp before ctxsw in to allow | |
518 | * event_filter_match() to not have to pass | |
519 | * task around | |
e5d1367f SE |
520 | */ |
521 | cpuctx->cgrp = perf_cgroup_from_task(task); | |
522 | cpu_ctx_sched_in(cpuctx, EVENT_ALL, task); | |
523 | } | |
facc4307 PZ |
524 | perf_pmu_enable(cpuctx->ctx.pmu); |
525 | perf_ctx_unlock(cpuctx, cpuctx->task_ctx); | |
e5d1367f | 526 | } |
e5d1367f SE |
527 | } |
528 | ||
529 | rcu_read_unlock(); | |
530 | ||
531 | local_irq_restore(flags); | |
532 | } | |
533 | ||
a8d757ef SE |
534 | static inline void perf_cgroup_sched_out(struct task_struct *task, |
535 | struct task_struct *next) | |
e5d1367f | 536 | { |
a8d757ef SE |
537 | struct perf_cgroup *cgrp1; |
538 | struct perf_cgroup *cgrp2 = NULL; | |
539 | ||
540 | /* | |
541 | * we come here when we know perf_cgroup_events > 0 | |
542 | */ | |
543 | cgrp1 = perf_cgroup_from_task(task); | |
544 | ||
545 | /* | |
546 | * next is NULL when called from perf_event_enable_on_exec() | |
547 | * that will systematically cause a cgroup_switch() | |
548 | */ | |
549 | if (next) | |
550 | cgrp2 = perf_cgroup_from_task(next); | |
551 | ||
552 | /* | |
553 | * only schedule out current cgroup events if we know | |
554 | * that we are switching to a different cgroup. Otherwise, | |
555 | * do no touch the cgroup events. | |
556 | */ | |
557 | if (cgrp1 != cgrp2) | |
558 | perf_cgroup_switch(task, PERF_CGROUP_SWOUT); | |
e5d1367f SE |
559 | } |
560 | ||
a8d757ef SE |
561 | static inline void perf_cgroup_sched_in(struct task_struct *prev, |
562 | struct task_struct *task) | |
e5d1367f | 563 | { |
a8d757ef SE |
564 | struct perf_cgroup *cgrp1; |
565 | struct perf_cgroup *cgrp2 = NULL; | |
566 | ||
567 | /* | |
568 | * we come here when we know perf_cgroup_events > 0 | |
569 | */ | |
570 | cgrp1 = perf_cgroup_from_task(task); | |
571 | ||
572 | /* prev can never be NULL */ | |
573 | cgrp2 = perf_cgroup_from_task(prev); | |
574 | ||
575 | /* | |
576 | * only need to schedule in cgroup events if we are changing | |
577 | * cgroup during ctxsw. Cgroup events were not scheduled | |
578 | * out of ctxsw out if that was not the case. | |
579 | */ | |
580 | if (cgrp1 != cgrp2) | |
581 | perf_cgroup_switch(task, PERF_CGROUP_SWIN); | |
e5d1367f SE |
582 | } |
583 | ||
584 | static inline int perf_cgroup_connect(int fd, struct perf_event *event, | |
585 | struct perf_event_attr *attr, | |
586 | struct perf_event *group_leader) | |
587 | { | |
588 | struct perf_cgroup *cgrp; | |
589 | struct cgroup_subsys_state *css; | |
2903ff01 AV |
590 | struct fd f = fdget(fd); |
591 | int ret = 0; | |
e5d1367f | 592 | |
2903ff01 | 593 | if (!f.file) |
e5d1367f SE |
594 | return -EBADF; |
595 | ||
b77d7b60 TH |
596 | rcu_read_lock(); |
597 | ||
073219e9 | 598 | css = css_from_dir(f.file->f_dentry, &perf_event_cgrp_subsys); |
3db272c0 LZ |
599 | if (IS_ERR(css)) { |
600 | ret = PTR_ERR(css); | |
601 | goto out; | |
602 | } | |
e5d1367f SE |
603 | |
604 | cgrp = container_of(css, struct perf_cgroup, css); | |
605 | event->cgrp = cgrp; | |
606 | ||
f75e18cb | 607 | /* must be done before we fput() the file */ |
9c5da09d SQ |
608 | if (!perf_tryget_cgroup(event)) { |
609 | event->cgrp = NULL; | |
610 | ret = -ENOENT; | |
611 | goto out; | |
612 | } | |
f75e18cb | 613 | |
e5d1367f SE |
614 | /* |
615 | * all events in a group must monitor | |
616 | * the same cgroup because a task belongs | |
617 | * to only one perf cgroup at a time | |
618 | */ | |
619 | if (group_leader && group_leader->cgrp != cgrp) { | |
620 | perf_detach_cgroup(event); | |
621 | ret = -EINVAL; | |
e5d1367f | 622 | } |
3db272c0 | 623 | out: |
b77d7b60 | 624 | rcu_read_unlock(); |
2903ff01 | 625 | fdput(f); |
e5d1367f SE |
626 | return ret; |
627 | } | |
628 | ||
629 | static inline void | |
630 | perf_cgroup_set_shadow_time(struct perf_event *event, u64 now) | |
631 | { | |
632 | struct perf_cgroup_info *t; | |
633 | t = per_cpu_ptr(event->cgrp->info, event->cpu); | |
634 | event->shadow_ctx_time = now - t->timestamp; | |
635 | } | |
636 | ||
637 | static inline void | |
638 | perf_cgroup_defer_enabled(struct perf_event *event) | |
639 | { | |
640 | /* | |
641 | * when the current task's perf cgroup does not match | |
642 | * the event's, we need to remember to call the | |
643 | * perf_mark_enable() function the first time a task with | |
644 | * a matching perf cgroup is scheduled in. | |
645 | */ | |
646 | if (is_cgroup_event(event) && !perf_cgroup_match(event)) | |
647 | event->cgrp_defer_enabled = 1; | |
648 | } | |
649 | ||
650 | static inline void | |
651 | perf_cgroup_mark_enabled(struct perf_event *event, | |
652 | struct perf_event_context *ctx) | |
653 | { | |
654 | struct perf_event *sub; | |
655 | u64 tstamp = perf_event_time(event); | |
656 | ||
657 | if (!event->cgrp_defer_enabled) | |
658 | return; | |
659 | ||
660 | event->cgrp_defer_enabled = 0; | |
661 | ||
662 | event->tstamp_enabled = tstamp - event->total_time_enabled; | |
663 | list_for_each_entry(sub, &event->sibling_list, group_entry) { | |
664 | if (sub->state >= PERF_EVENT_STATE_INACTIVE) { | |
665 | sub->tstamp_enabled = tstamp - sub->total_time_enabled; | |
666 | sub->cgrp_defer_enabled = 0; | |
667 | } | |
668 | } | |
669 | } | |
670 | #else /* !CONFIG_CGROUP_PERF */ | |
671 | ||
672 | static inline bool | |
673 | perf_cgroup_match(struct perf_event *event) | |
674 | { | |
675 | return true; | |
676 | } | |
677 | ||
678 | static inline void perf_detach_cgroup(struct perf_event *event) | |
679 | {} | |
680 | ||
681 | static inline int is_cgroup_event(struct perf_event *event) | |
682 | { | |
683 | return 0; | |
684 | } | |
685 | ||
686 | static inline u64 perf_cgroup_event_cgrp_time(struct perf_event *event) | |
687 | { | |
688 | return 0; | |
689 | } | |
690 | ||
691 | static inline void update_cgrp_time_from_event(struct perf_event *event) | |
692 | { | |
693 | } | |
694 | ||
695 | static inline void update_cgrp_time_from_cpuctx(struct perf_cpu_context *cpuctx) | |
696 | { | |
697 | } | |
698 | ||
a8d757ef SE |
699 | static inline void perf_cgroup_sched_out(struct task_struct *task, |
700 | struct task_struct *next) | |
e5d1367f SE |
701 | { |
702 | } | |
703 | ||
a8d757ef SE |
704 | static inline void perf_cgroup_sched_in(struct task_struct *prev, |
705 | struct task_struct *task) | |
e5d1367f SE |
706 | { |
707 | } | |
708 | ||
709 | static inline int perf_cgroup_connect(pid_t pid, struct perf_event *event, | |
710 | struct perf_event_attr *attr, | |
711 | struct perf_event *group_leader) | |
712 | { | |
713 | return -EINVAL; | |
714 | } | |
715 | ||
716 | static inline void | |
3f7cce3c SE |
717 | perf_cgroup_set_timestamp(struct task_struct *task, |
718 | struct perf_event_context *ctx) | |
e5d1367f SE |
719 | { |
720 | } | |
721 | ||
722 | void | |
723 | perf_cgroup_switch(struct task_struct *task, struct task_struct *next) | |
724 | { | |
725 | } | |
726 | ||
727 | static inline void | |
728 | perf_cgroup_set_shadow_time(struct perf_event *event, u64 now) | |
729 | { | |
730 | } | |
731 | ||
732 | static inline u64 perf_cgroup_event_time(struct perf_event *event) | |
733 | { | |
734 | return 0; | |
735 | } | |
736 | ||
737 | static inline void | |
738 | perf_cgroup_defer_enabled(struct perf_event *event) | |
739 | { | |
740 | } | |
741 | ||
742 | static inline void | |
743 | perf_cgroup_mark_enabled(struct perf_event *event, | |
744 | struct perf_event_context *ctx) | |
745 | { | |
746 | } | |
747 | #endif | |
748 | ||
9e630205 SE |
749 | /* |
750 | * set default to be dependent on timer tick just | |
751 | * like original code | |
752 | */ | |
753 | #define PERF_CPU_HRTIMER (1000 / HZ) | |
754 | /* | |
755 | * function must be called with interrupts disbled | |
756 | */ | |
757 | static enum hrtimer_restart perf_cpu_hrtimer_handler(struct hrtimer *hr) | |
758 | { | |
759 | struct perf_cpu_context *cpuctx; | |
760 | enum hrtimer_restart ret = HRTIMER_NORESTART; | |
761 | int rotations = 0; | |
762 | ||
763 | WARN_ON(!irqs_disabled()); | |
764 | ||
765 | cpuctx = container_of(hr, struct perf_cpu_context, hrtimer); | |
766 | ||
767 | rotations = perf_rotate_context(cpuctx); | |
768 | ||
769 | /* | |
770 | * arm timer if needed | |
771 | */ | |
772 | if (rotations) { | |
773 | hrtimer_forward_now(hr, cpuctx->hrtimer_interval); | |
774 | ret = HRTIMER_RESTART; | |
775 | } | |
776 | ||
777 | return ret; | |
778 | } | |
779 | ||
780 | /* CPU is going down */ | |
781 | void perf_cpu_hrtimer_cancel(int cpu) | |
782 | { | |
783 | struct perf_cpu_context *cpuctx; | |
784 | struct pmu *pmu; | |
785 | unsigned long flags; | |
786 | ||
787 | if (WARN_ON(cpu != smp_processor_id())) | |
788 | return; | |
789 | ||
790 | local_irq_save(flags); | |
791 | ||
792 | rcu_read_lock(); | |
793 | ||
794 | list_for_each_entry_rcu(pmu, &pmus, entry) { | |
795 | cpuctx = this_cpu_ptr(pmu->pmu_cpu_context); | |
796 | ||
797 | if (pmu->task_ctx_nr == perf_sw_context) | |
798 | continue; | |
799 | ||
800 | hrtimer_cancel(&cpuctx->hrtimer); | |
801 | } | |
802 | ||
803 | rcu_read_unlock(); | |
804 | ||
805 | local_irq_restore(flags); | |
806 | } | |
807 | ||
808 | static void __perf_cpu_hrtimer_init(struct perf_cpu_context *cpuctx, int cpu) | |
809 | { | |
810 | struct hrtimer *hr = &cpuctx->hrtimer; | |
811 | struct pmu *pmu = cpuctx->ctx.pmu; | |
62b85639 | 812 | int timer; |
9e630205 SE |
813 | |
814 | /* no multiplexing needed for SW PMU */ | |
815 | if (pmu->task_ctx_nr == perf_sw_context) | |
816 | return; | |
817 | ||
62b85639 SE |
818 | /* |
819 | * check default is sane, if not set then force to | |
820 | * default interval (1/tick) | |
821 | */ | |
822 | timer = pmu->hrtimer_interval_ms; | |
823 | if (timer < 1) | |
824 | timer = pmu->hrtimer_interval_ms = PERF_CPU_HRTIMER; | |
825 | ||
826 | cpuctx->hrtimer_interval = ns_to_ktime(NSEC_PER_MSEC * timer); | |
9e630205 SE |
827 | |
828 | hrtimer_init(hr, CLOCK_MONOTONIC, HRTIMER_MODE_REL_PINNED); | |
829 | hr->function = perf_cpu_hrtimer_handler; | |
830 | } | |
831 | ||
832 | static void perf_cpu_hrtimer_restart(struct perf_cpu_context *cpuctx) | |
833 | { | |
834 | struct hrtimer *hr = &cpuctx->hrtimer; | |
835 | struct pmu *pmu = cpuctx->ctx.pmu; | |
836 | ||
837 | /* not for SW PMU */ | |
838 | if (pmu->task_ctx_nr == perf_sw_context) | |
839 | return; | |
840 | ||
841 | if (hrtimer_active(hr)) | |
842 | return; | |
843 | ||
844 | if (!hrtimer_callback_running(hr)) | |
845 | __hrtimer_start_range_ns(hr, cpuctx->hrtimer_interval, | |
846 | 0, HRTIMER_MODE_REL_PINNED, 0); | |
847 | } | |
848 | ||
33696fc0 | 849 | void perf_pmu_disable(struct pmu *pmu) |
9e35ad38 | 850 | { |
33696fc0 PZ |
851 | int *count = this_cpu_ptr(pmu->pmu_disable_count); |
852 | if (!(*count)++) | |
853 | pmu->pmu_disable(pmu); | |
9e35ad38 | 854 | } |
9e35ad38 | 855 | |
33696fc0 | 856 | void perf_pmu_enable(struct pmu *pmu) |
9e35ad38 | 857 | { |
33696fc0 PZ |
858 | int *count = this_cpu_ptr(pmu->pmu_disable_count); |
859 | if (!--(*count)) | |
860 | pmu->pmu_enable(pmu); | |
9e35ad38 | 861 | } |
9e35ad38 | 862 | |
e9d2b064 PZ |
863 | static DEFINE_PER_CPU(struct list_head, rotation_list); |
864 | ||
865 | /* | |
866 | * perf_pmu_rotate_start() and perf_rotate_context() are fully serialized | |
867 | * because they're strictly cpu affine and rotate_start is called with IRQs | |
868 | * disabled, while rotate_context is called from IRQ context. | |
869 | */ | |
108b02cf | 870 | static void perf_pmu_rotate_start(struct pmu *pmu) |
9e35ad38 | 871 | { |
108b02cf | 872 | struct perf_cpu_context *cpuctx = this_cpu_ptr(pmu->pmu_cpu_context); |
e9d2b064 | 873 | struct list_head *head = &__get_cpu_var(rotation_list); |
b5ab4cd5 | 874 | |
e9d2b064 | 875 | WARN_ON(!irqs_disabled()); |
b5ab4cd5 | 876 | |
d84153d6 | 877 | if (list_empty(&cpuctx->rotation_list)) |
e9d2b064 | 878 | list_add(&cpuctx->rotation_list, head); |
9e35ad38 | 879 | } |
9e35ad38 | 880 | |
cdd6c482 | 881 | static void get_ctx(struct perf_event_context *ctx) |
a63eaf34 | 882 | { |
e5289d4a | 883 | WARN_ON(!atomic_inc_not_zero(&ctx->refcount)); |
a63eaf34 PM |
884 | } |
885 | ||
cdd6c482 | 886 | static void put_ctx(struct perf_event_context *ctx) |
a63eaf34 | 887 | { |
564c2b21 PM |
888 | if (atomic_dec_and_test(&ctx->refcount)) { |
889 | if (ctx->parent_ctx) | |
890 | put_ctx(ctx->parent_ctx); | |
c93f7669 PM |
891 | if (ctx->task) |
892 | put_task_struct(ctx->task); | |
cb796ff3 | 893 | kfree_rcu(ctx, rcu_head); |
564c2b21 | 894 | } |
a63eaf34 PM |
895 | } |
896 | ||
cdd6c482 | 897 | static void unclone_ctx(struct perf_event_context *ctx) |
71a851b4 PZ |
898 | { |
899 | if (ctx->parent_ctx) { | |
900 | put_ctx(ctx->parent_ctx); | |
901 | ctx->parent_ctx = NULL; | |
902 | } | |
5a3126d4 | 903 | ctx->generation++; |
71a851b4 PZ |
904 | } |
905 | ||
6844c09d ACM |
906 | static u32 perf_event_pid(struct perf_event *event, struct task_struct *p) |
907 | { | |
908 | /* | |
909 | * only top level events have the pid namespace they were created in | |
910 | */ | |
911 | if (event->parent) | |
912 | event = event->parent; | |
913 | ||
914 | return task_tgid_nr_ns(p, event->ns); | |
915 | } | |
916 | ||
917 | static u32 perf_event_tid(struct perf_event *event, struct task_struct *p) | |
918 | { | |
919 | /* | |
920 | * only top level events have the pid namespace they were created in | |
921 | */ | |
922 | if (event->parent) | |
923 | event = event->parent; | |
924 | ||
925 | return task_pid_nr_ns(p, event->ns); | |
926 | } | |
927 | ||
7f453c24 | 928 | /* |
cdd6c482 | 929 | * If we inherit events we want to return the parent event id |
7f453c24 PZ |
930 | * to userspace. |
931 | */ | |
cdd6c482 | 932 | static u64 primary_event_id(struct perf_event *event) |
7f453c24 | 933 | { |
cdd6c482 | 934 | u64 id = event->id; |
7f453c24 | 935 | |
cdd6c482 IM |
936 | if (event->parent) |
937 | id = event->parent->id; | |
7f453c24 PZ |
938 | |
939 | return id; | |
940 | } | |
941 | ||
25346b93 | 942 | /* |
cdd6c482 | 943 | * Get the perf_event_context for a task and lock it. |
25346b93 PM |
944 | * This has to cope with with the fact that until it is locked, |
945 | * the context could get moved to another task. | |
946 | */ | |
cdd6c482 | 947 | static struct perf_event_context * |
8dc85d54 | 948 | perf_lock_task_context(struct task_struct *task, int ctxn, unsigned long *flags) |
25346b93 | 949 | { |
cdd6c482 | 950 | struct perf_event_context *ctx; |
25346b93 | 951 | |
9ed6060d | 952 | retry: |
058ebd0e PZ |
953 | /* |
954 | * One of the few rules of preemptible RCU is that one cannot do | |
955 | * rcu_read_unlock() while holding a scheduler (or nested) lock when | |
956 | * part of the read side critical section was preemptible -- see | |
957 | * rcu_read_unlock_special(). | |
958 | * | |
959 | * Since ctx->lock nests under rq->lock we must ensure the entire read | |
960 | * side critical section is non-preemptible. | |
961 | */ | |
962 | preempt_disable(); | |
963 | rcu_read_lock(); | |
8dc85d54 | 964 | ctx = rcu_dereference(task->perf_event_ctxp[ctxn]); |
25346b93 PM |
965 | if (ctx) { |
966 | /* | |
967 | * If this context is a clone of another, it might | |
968 | * get swapped for another underneath us by | |
cdd6c482 | 969 | * perf_event_task_sched_out, though the |
25346b93 PM |
970 | * rcu_read_lock() protects us from any context |
971 | * getting freed. Lock the context and check if it | |
972 | * got swapped before we could get the lock, and retry | |
973 | * if so. If we locked the right context, then it | |
974 | * can't get swapped on us any more. | |
975 | */ | |
e625cce1 | 976 | raw_spin_lock_irqsave(&ctx->lock, *flags); |
8dc85d54 | 977 | if (ctx != rcu_dereference(task->perf_event_ctxp[ctxn])) { |
e625cce1 | 978 | raw_spin_unlock_irqrestore(&ctx->lock, *flags); |
058ebd0e PZ |
979 | rcu_read_unlock(); |
980 | preempt_enable(); | |
25346b93 PM |
981 | goto retry; |
982 | } | |
b49a9e7e PZ |
983 | |
984 | if (!atomic_inc_not_zero(&ctx->refcount)) { | |
e625cce1 | 985 | raw_spin_unlock_irqrestore(&ctx->lock, *flags); |
b49a9e7e PZ |
986 | ctx = NULL; |
987 | } | |
25346b93 PM |
988 | } |
989 | rcu_read_unlock(); | |
058ebd0e | 990 | preempt_enable(); |
25346b93 PM |
991 | return ctx; |
992 | } | |
993 | ||
994 | /* | |
995 | * Get the context for a task and increment its pin_count so it | |
996 | * can't get swapped to another task. This also increments its | |
997 | * reference count so that the context can't get freed. | |
998 | */ | |
8dc85d54 PZ |
999 | static struct perf_event_context * |
1000 | perf_pin_task_context(struct task_struct *task, int ctxn) | |
25346b93 | 1001 | { |
cdd6c482 | 1002 | struct perf_event_context *ctx; |
25346b93 PM |
1003 | unsigned long flags; |
1004 | ||
8dc85d54 | 1005 | ctx = perf_lock_task_context(task, ctxn, &flags); |
25346b93 PM |
1006 | if (ctx) { |
1007 | ++ctx->pin_count; | |
e625cce1 | 1008 | raw_spin_unlock_irqrestore(&ctx->lock, flags); |
25346b93 PM |
1009 | } |
1010 | return ctx; | |
1011 | } | |
1012 | ||
cdd6c482 | 1013 | static void perf_unpin_context(struct perf_event_context *ctx) |
25346b93 PM |
1014 | { |
1015 | unsigned long flags; | |
1016 | ||
e625cce1 | 1017 | raw_spin_lock_irqsave(&ctx->lock, flags); |
25346b93 | 1018 | --ctx->pin_count; |
e625cce1 | 1019 | raw_spin_unlock_irqrestore(&ctx->lock, flags); |
25346b93 PM |
1020 | } |
1021 | ||
f67218c3 PZ |
1022 | /* |
1023 | * Update the record of the current time in a context. | |
1024 | */ | |
1025 | static void update_context_time(struct perf_event_context *ctx) | |
1026 | { | |
1027 | u64 now = perf_clock(); | |
1028 | ||
1029 | ctx->time += now - ctx->timestamp; | |
1030 | ctx->timestamp = now; | |
1031 | } | |
1032 | ||
4158755d SE |
1033 | static u64 perf_event_time(struct perf_event *event) |
1034 | { | |
1035 | struct perf_event_context *ctx = event->ctx; | |
e5d1367f SE |
1036 | |
1037 | if (is_cgroup_event(event)) | |
1038 | return perf_cgroup_event_time(event); | |
1039 | ||
4158755d SE |
1040 | return ctx ? ctx->time : 0; |
1041 | } | |
1042 | ||
f67218c3 PZ |
1043 | /* |
1044 | * Update the total_time_enabled and total_time_running fields for a event. | |
b7526f0c | 1045 | * The caller of this function needs to hold the ctx->lock. |
f67218c3 PZ |
1046 | */ |
1047 | static void update_event_times(struct perf_event *event) | |
1048 | { | |
1049 | struct perf_event_context *ctx = event->ctx; | |
1050 | u64 run_end; | |
1051 | ||
1052 | if (event->state < PERF_EVENT_STATE_INACTIVE || | |
1053 | event->group_leader->state < PERF_EVENT_STATE_INACTIVE) | |
1054 | return; | |
e5d1367f SE |
1055 | /* |
1056 | * in cgroup mode, time_enabled represents | |
1057 | * the time the event was enabled AND active | |
1058 | * tasks were in the monitored cgroup. This is | |
1059 | * independent of the activity of the context as | |
1060 | * there may be a mix of cgroup and non-cgroup events. | |
1061 | * | |
1062 | * That is why we treat cgroup events differently | |
1063 | * here. | |
1064 | */ | |
1065 | if (is_cgroup_event(event)) | |
46cd6a7f | 1066 | run_end = perf_cgroup_event_time(event); |
e5d1367f SE |
1067 | else if (ctx->is_active) |
1068 | run_end = ctx->time; | |
acd1d7c1 PZ |
1069 | else |
1070 | run_end = event->tstamp_stopped; | |
1071 | ||
1072 | event->total_time_enabled = run_end - event->tstamp_enabled; | |
f67218c3 PZ |
1073 | |
1074 | if (event->state == PERF_EVENT_STATE_INACTIVE) | |
1075 | run_end = event->tstamp_stopped; | |
1076 | else | |
4158755d | 1077 | run_end = perf_event_time(event); |
f67218c3 PZ |
1078 | |
1079 | event->total_time_running = run_end - event->tstamp_running; | |
e5d1367f | 1080 | |
f67218c3 PZ |
1081 | } |
1082 | ||
96c21a46 PZ |
1083 | /* |
1084 | * Update total_time_enabled and total_time_running for all events in a group. | |
1085 | */ | |
1086 | static void update_group_times(struct perf_event *leader) | |
1087 | { | |
1088 | struct perf_event *event; | |
1089 | ||
1090 | update_event_times(leader); | |
1091 | list_for_each_entry(event, &leader->sibling_list, group_entry) | |
1092 | update_event_times(event); | |
1093 | } | |
1094 | ||
889ff015 FW |
1095 | static struct list_head * |
1096 | ctx_group_list(struct perf_event *event, struct perf_event_context *ctx) | |
1097 | { | |
1098 | if (event->attr.pinned) | |
1099 | return &ctx->pinned_groups; | |
1100 | else | |
1101 | return &ctx->flexible_groups; | |
1102 | } | |
1103 | ||
fccc714b | 1104 | /* |
cdd6c482 | 1105 | * Add a event from the lists for its context. |
fccc714b PZ |
1106 | * Must be called with ctx->mutex and ctx->lock held. |
1107 | */ | |
04289bb9 | 1108 | static void |
cdd6c482 | 1109 | list_add_event(struct perf_event *event, struct perf_event_context *ctx) |
04289bb9 | 1110 | { |
8a49542c PZ |
1111 | WARN_ON_ONCE(event->attach_state & PERF_ATTACH_CONTEXT); |
1112 | event->attach_state |= PERF_ATTACH_CONTEXT; | |
04289bb9 IM |
1113 | |
1114 | /* | |
8a49542c PZ |
1115 | * If we're a stand alone event or group leader, we go to the context |
1116 | * list, group events are kept attached to the group so that | |
1117 | * perf_group_detach can, at all times, locate all siblings. | |
04289bb9 | 1118 | */ |
8a49542c | 1119 | if (event->group_leader == event) { |
889ff015 FW |
1120 | struct list_head *list; |
1121 | ||
d6f962b5 FW |
1122 | if (is_software_event(event)) |
1123 | event->group_flags |= PERF_GROUP_SOFTWARE; | |
1124 | ||
889ff015 FW |
1125 | list = ctx_group_list(event, ctx); |
1126 | list_add_tail(&event->group_entry, list); | |
5c148194 | 1127 | } |
592903cd | 1128 | |
08309379 | 1129 | if (is_cgroup_event(event)) |
e5d1367f | 1130 | ctx->nr_cgroups++; |
e5d1367f | 1131 | |
d010b332 SE |
1132 | if (has_branch_stack(event)) |
1133 | ctx->nr_branch_stack++; | |
1134 | ||
cdd6c482 | 1135 | list_add_rcu(&event->event_entry, &ctx->event_list); |
b5ab4cd5 | 1136 | if (!ctx->nr_events) |
108b02cf | 1137 | perf_pmu_rotate_start(ctx->pmu); |
cdd6c482 IM |
1138 | ctx->nr_events++; |
1139 | if (event->attr.inherit_stat) | |
bfbd3381 | 1140 | ctx->nr_stat++; |
5a3126d4 PZ |
1141 | |
1142 | ctx->generation++; | |
04289bb9 IM |
1143 | } |
1144 | ||
0231bb53 JO |
1145 | /* |
1146 | * Initialize event state based on the perf_event_attr::disabled. | |
1147 | */ | |
1148 | static inline void perf_event__state_init(struct perf_event *event) | |
1149 | { | |
1150 | event->state = event->attr.disabled ? PERF_EVENT_STATE_OFF : | |
1151 | PERF_EVENT_STATE_INACTIVE; | |
1152 | } | |
1153 | ||
c320c7b7 ACM |
1154 | /* |
1155 | * Called at perf_event creation and when events are attached/detached from a | |
1156 | * group. | |
1157 | */ | |
1158 | static void perf_event__read_size(struct perf_event *event) | |
1159 | { | |
1160 | int entry = sizeof(u64); /* value */ | |
1161 | int size = 0; | |
1162 | int nr = 1; | |
1163 | ||
1164 | if (event->attr.read_format & PERF_FORMAT_TOTAL_TIME_ENABLED) | |
1165 | size += sizeof(u64); | |
1166 | ||
1167 | if (event->attr.read_format & PERF_FORMAT_TOTAL_TIME_RUNNING) | |
1168 | size += sizeof(u64); | |
1169 | ||
1170 | if (event->attr.read_format & PERF_FORMAT_ID) | |
1171 | entry += sizeof(u64); | |
1172 | ||
1173 | if (event->attr.read_format & PERF_FORMAT_GROUP) { | |
1174 | nr += event->group_leader->nr_siblings; | |
1175 | size += sizeof(u64); | |
1176 | } | |
1177 | ||
1178 | size += entry * nr; | |
1179 | event->read_size = size; | |
1180 | } | |
1181 | ||
1182 | static void perf_event__header_size(struct perf_event *event) | |
1183 | { | |
1184 | struct perf_sample_data *data; | |
1185 | u64 sample_type = event->attr.sample_type; | |
1186 | u16 size = 0; | |
1187 | ||
1188 | perf_event__read_size(event); | |
1189 | ||
1190 | if (sample_type & PERF_SAMPLE_IP) | |
1191 | size += sizeof(data->ip); | |
1192 | ||
6844c09d ACM |
1193 | if (sample_type & PERF_SAMPLE_ADDR) |
1194 | size += sizeof(data->addr); | |
1195 | ||
1196 | if (sample_type & PERF_SAMPLE_PERIOD) | |
1197 | size += sizeof(data->period); | |
1198 | ||
c3feedf2 AK |
1199 | if (sample_type & PERF_SAMPLE_WEIGHT) |
1200 | size += sizeof(data->weight); | |
1201 | ||
6844c09d ACM |
1202 | if (sample_type & PERF_SAMPLE_READ) |
1203 | size += event->read_size; | |
1204 | ||
d6be9ad6 SE |
1205 | if (sample_type & PERF_SAMPLE_DATA_SRC) |
1206 | size += sizeof(data->data_src.val); | |
1207 | ||
fdfbbd07 AK |
1208 | if (sample_type & PERF_SAMPLE_TRANSACTION) |
1209 | size += sizeof(data->txn); | |
1210 | ||
6844c09d ACM |
1211 | event->header_size = size; |
1212 | } | |
1213 | ||
1214 | static void perf_event__id_header_size(struct perf_event *event) | |
1215 | { | |
1216 | struct perf_sample_data *data; | |
1217 | u64 sample_type = event->attr.sample_type; | |
1218 | u16 size = 0; | |
1219 | ||
c320c7b7 ACM |
1220 | if (sample_type & PERF_SAMPLE_TID) |
1221 | size += sizeof(data->tid_entry); | |
1222 | ||
1223 | if (sample_type & PERF_SAMPLE_TIME) | |
1224 | size += sizeof(data->time); | |
1225 | ||
ff3d527c AH |
1226 | if (sample_type & PERF_SAMPLE_IDENTIFIER) |
1227 | size += sizeof(data->id); | |
1228 | ||
c320c7b7 ACM |
1229 | if (sample_type & PERF_SAMPLE_ID) |
1230 | size += sizeof(data->id); | |
1231 | ||
1232 | if (sample_type & PERF_SAMPLE_STREAM_ID) | |
1233 | size += sizeof(data->stream_id); | |
1234 | ||
1235 | if (sample_type & PERF_SAMPLE_CPU) | |
1236 | size += sizeof(data->cpu_entry); | |
1237 | ||
6844c09d | 1238 | event->id_header_size = size; |
c320c7b7 ACM |
1239 | } |
1240 | ||
8a49542c PZ |
1241 | static void perf_group_attach(struct perf_event *event) |
1242 | { | |
c320c7b7 | 1243 | struct perf_event *group_leader = event->group_leader, *pos; |
8a49542c | 1244 | |
74c3337c PZ |
1245 | /* |
1246 | * We can have double attach due to group movement in perf_event_open. | |
1247 | */ | |
1248 | if (event->attach_state & PERF_ATTACH_GROUP) | |
1249 | return; | |
1250 | ||
8a49542c PZ |
1251 | event->attach_state |= PERF_ATTACH_GROUP; |
1252 | ||
1253 | if (group_leader == event) | |
1254 | return; | |
1255 | ||
1256 | if (group_leader->group_flags & PERF_GROUP_SOFTWARE && | |
1257 | !is_software_event(event)) | |
1258 | group_leader->group_flags &= ~PERF_GROUP_SOFTWARE; | |
1259 | ||
1260 | list_add_tail(&event->group_entry, &group_leader->sibling_list); | |
1261 | group_leader->nr_siblings++; | |
c320c7b7 ACM |
1262 | |
1263 | perf_event__header_size(group_leader); | |
1264 | ||
1265 | list_for_each_entry(pos, &group_leader->sibling_list, group_entry) | |
1266 | perf_event__header_size(pos); | |
8a49542c PZ |
1267 | } |
1268 | ||
a63eaf34 | 1269 | /* |
cdd6c482 | 1270 | * Remove a event from the lists for its context. |
fccc714b | 1271 | * Must be called with ctx->mutex and ctx->lock held. |
a63eaf34 | 1272 | */ |
04289bb9 | 1273 | static void |
cdd6c482 | 1274 | list_del_event(struct perf_event *event, struct perf_event_context *ctx) |
04289bb9 | 1275 | { |
68cacd29 | 1276 | struct perf_cpu_context *cpuctx; |
8a49542c PZ |
1277 | /* |
1278 | * We can have double detach due to exit/hot-unplug + close. | |
1279 | */ | |
1280 | if (!(event->attach_state & PERF_ATTACH_CONTEXT)) | |
a63eaf34 | 1281 | return; |
8a49542c PZ |
1282 | |
1283 | event->attach_state &= ~PERF_ATTACH_CONTEXT; | |
1284 | ||
68cacd29 | 1285 | if (is_cgroup_event(event)) { |
e5d1367f | 1286 | ctx->nr_cgroups--; |
68cacd29 SE |
1287 | cpuctx = __get_cpu_context(ctx); |
1288 | /* | |
1289 | * if there are no more cgroup events | |
1290 | * then cler cgrp to avoid stale pointer | |
1291 | * in update_cgrp_time_from_cpuctx() | |
1292 | */ | |
1293 | if (!ctx->nr_cgroups) | |
1294 | cpuctx->cgrp = NULL; | |
1295 | } | |
e5d1367f | 1296 | |
d010b332 SE |
1297 | if (has_branch_stack(event)) |
1298 | ctx->nr_branch_stack--; | |
1299 | ||
cdd6c482 IM |
1300 | ctx->nr_events--; |
1301 | if (event->attr.inherit_stat) | |
bfbd3381 | 1302 | ctx->nr_stat--; |
8bc20959 | 1303 | |
cdd6c482 | 1304 | list_del_rcu(&event->event_entry); |
04289bb9 | 1305 | |
8a49542c PZ |
1306 | if (event->group_leader == event) |
1307 | list_del_init(&event->group_entry); | |
5c148194 | 1308 | |
96c21a46 | 1309 | update_group_times(event); |
b2e74a26 SE |
1310 | |
1311 | /* | |
1312 | * If event was in error state, then keep it | |
1313 | * that way, otherwise bogus counts will be | |
1314 | * returned on read(). The only way to get out | |
1315 | * of error state is by explicit re-enabling | |
1316 | * of the event | |
1317 | */ | |
1318 | if (event->state > PERF_EVENT_STATE_OFF) | |
1319 | event->state = PERF_EVENT_STATE_OFF; | |
5a3126d4 PZ |
1320 | |
1321 | ctx->generation++; | |
050735b0 PZ |
1322 | } |
1323 | ||
8a49542c | 1324 | static void perf_group_detach(struct perf_event *event) |
050735b0 PZ |
1325 | { |
1326 | struct perf_event *sibling, *tmp; | |
8a49542c PZ |
1327 | struct list_head *list = NULL; |
1328 | ||
1329 | /* | |
1330 | * We can have double detach due to exit/hot-unplug + close. | |
1331 | */ | |
1332 | if (!(event->attach_state & PERF_ATTACH_GROUP)) | |
1333 | return; | |
1334 | ||
1335 | event->attach_state &= ~PERF_ATTACH_GROUP; | |
1336 | ||
1337 | /* | |
1338 | * If this is a sibling, remove it from its group. | |
1339 | */ | |
1340 | if (event->group_leader != event) { | |
1341 | list_del_init(&event->group_entry); | |
1342 | event->group_leader->nr_siblings--; | |
c320c7b7 | 1343 | goto out; |
8a49542c PZ |
1344 | } |
1345 | ||
1346 | if (!list_empty(&event->group_entry)) | |
1347 | list = &event->group_entry; | |
2e2af50b | 1348 | |
04289bb9 | 1349 | /* |
cdd6c482 IM |
1350 | * If this was a group event with sibling events then |
1351 | * upgrade the siblings to singleton events by adding them | |
8a49542c | 1352 | * to whatever list we are on. |
04289bb9 | 1353 | */ |
cdd6c482 | 1354 | list_for_each_entry_safe(sibling, tmp, &event->sibling_list, group_entry) { |
8a49542c PZ |
1355 | if (list) |
1356 | list_move_tail(&sibling->group_entry, list); | |
04289bb9 | 1357 | sibling->group_leader = sibling; |
d6f962b5 FW |
1358 | |
1359 | /* Inherit group flags from the previous leader */ | |
1360 | sibling->group_flags = event->group_flags; | |
04289bb9 | 1361 | } |
c320c7b7 ACM |
1362 | |
1363 | out: | |
1364 | perf_event__header_size(event->group_leader); | |
1365 | ||
1366 | list_for_each_entry(tmp, &event->group_leader->sibling_list, group_entry) | |
1367 | perf_event__header_size(tmp); | |
04289bb9 IM |
1368 | } |
1369 | ||
fa66f07a SE |
1370 | static inline int |
1371 | event_filter_match(struct perf_event *event) | |
1372 | { | |
e5d1367f SE |
1373 | return (event->cpu == -1 || event->cpu == smp_processor_id()) |
1374 | && perf_cgroup_match(event); | |
fa66f07a SE |
1375 | } |
1376 | ||
9ffcfa6f SE |
1377 | static void |
1378 | event_sched_out(struct perf_event *event, | |
3b6f9e5c | 1379 | struct perf_cpu_context *cpuctx, |
cdd6c482 | 1380 | struct perf_event_context *ctx) |
3b6f9e5c | 1381 | { |
4158755d | 1382 | u64 tstamp = perf_event_time(event); |
fa66f07a SE |
1383 | u64 delta; |
1384 | /* | |
1385 | * An event which could not be activated because of | |
1386 | * filter mismatch still needs to have its timings | |
1387 | * maintained, otherwise bogus information is return | |
1388 | * via read() for time_enabled, time_running: | |
1389 | */ | |
1390 | if (event->state == PERF_EVENT_STATE_INACTIVE | |
1391 | && !event_filter_match(event)) { | |
e5d1367f | 1392 | delta = tstamp - event->tstamp_stopped; |
fa66f07a | 1393 | event->tstamp_running += delta; |
4158755d | 1394 | event->tstamp_stopped = tstamp; |
fa66f07a SE |
1395 | } |
1396 | ||
cdd6c482 | 1397 | if (event->state != PERF_EVENT_STATE_ACTIVE) |
9ffcfa6f | 1398 | return; |
3b6f9e5c | 1399 | |
44377277 AS |
1400 | perf_pmu_disable(event->pmu); |
1401 | ||
cdd6c482 IM |
1402 | event->state = PERF_EVENT_STATE_INACTIVE; |
1403 | if (event->pending_disable) { | |
1404 | event->pending_disable = 0; | |
1405 | event->state = PERF_EVENT_STATE_OFF; | |
970892a9 | 1406 | } |
4158755d | 1407 | event->tstamp_stopped = tstamp; |
a4eaf7f1 | 1408 | event->pmu->del(event, 0); |
cdd6c482 | 1409 | event->oncpu = -1; |
3b6f9e5c | 1410 | |
cdd6c482 | 1411 | if (!is_software_event(event)) |
3b6f9e5c PM |
1412 | cpuctx->active_oncpu--; |
1413 | ctx->nr_active--; | |
0f5a2601 PZ |
1414 | if (event->attr.freq && event->attr.sample_freq) |
1415 | ctx->nr_freq--; | |
cdd6c482 | 1416 | if (event->attr.exclusive || !cpuctx->active_oncpu) |
3b6f9e5c | 1417 | cpuctx->exclusive = 0; |
44377277 AS |
1418 | |
1419 | perf_pmu_enable(event->pmu); | |
3b6f9e5c PM |
1420 | } |
1421 | ||
d859e29f | 1422 | static void |
cdd6c482 | 1423 | group_sched_out(struct perf_event *group_event, |
d859e29f | 1424 | struct perf_cpu_context *cpuctx, |
cdd6c482 | 1425 | struct perf_event_context *ctx) |
d859e29f | 1426 | { |
cdd6c482 | 1427 | struct perf_event *event; |
fa66f07a | 1428 | int state = group_event->state; |
d859e29f | 1429 | |
cdd6c482 | 1430 | event_sched_out(group_event, cpuctx, ctx); |
d859e29f PM |
1431 | |
1432 | /* | |
1433 | * Schedule out siblings (if any): | |
1434 | */ | |
cdd6c482 IM |
1435 | list_for_each_entry(event, &group_event->sibling_list, group_entry) |
1436 | event_sched_out(event, cpuctx, ctx); | |
d859e29f | 1437 | |
fa66f07a | 1438 | if (state == PERF_EVENT_STATE_ACTIVE && group_event->attr.exclusive) |
d859e29f PM |
1439 | cpuctx->exclusive = 0; |
1440 | } | |
1441 | ||
0793a61d | 1442 | /* |
cdd6c482 | 1443 | * Cross CPU call to remove a performance event |
0793a61d | 1444 | * |
cdd6c482 | 1445 | * We disable the event on the hardware level first. After that we |
0793a61d TG |
1446 | * remove it from the context list. |
1447 | */ | |
fe4b04fa | 1448 | static int __perf_remove_from_context(void *info) |
0793a61d | 1449 | { |
cdd6c482 IM |
1450 | struct perf_event *event = info; |
1451 | struct perf_event_context *ctx = event->ctx; | |
108b02cf | 1452 | struct perf_cpu_context *cpuctx = __get_cpu_context(ctx); |
0793a61d | 1453 | |
e625cce1 | 1454 | raw_spin_lock(&ctx->lock); |
cdd6c482 | 1455 | event_sched_out(event, cpuctx, ctx); |
cdd6c482 | 1456 | list_del_event(event, ctx); |
64ce3126 PZ |
1457 | if (!ctx->nr_events && cpuctx->task_ctx == ctx) { |
1458 | ctx->is_active = 0; | |
1459 | cpuctx->task_ctx = NULL; | |
1460 | } | |
e625cce1 | 1461 | raw_spin_unlock(&ctx->lock); |
fe4b04fa PZ |
1462 | |
1463 | return 0; | |
0793a61d TG |
1464 | } |
1465 | ||
1466 | ||
1467 | /* | |
cdd6c482 | 1468 | * Remove the event from a task's (or a CPU's) list of events. |
0793a61d | 1469 | * |
cdd6c482 | 1470 | * CPU events are removed with a smp call. For task events we only |
0793a61d | 1471 | * call when the task is on a CPU. |
c93f7669 | 1472 | * |
cdd6c482 IM |
1473 | * If event->ctx is a cloned context, callers must make sure that |
1474 | * every task struct that event->ctx->task could possibly point to | |
c93f7669 PM |
1475 | * remains valid. This is OK when called from perf_release since |
1476 | * that only calls us on the top-level context, which can't be a clone. | |
cdd6c482 | 1477 | * When called from perf_event_exit_task, it's OK because the |
c93f7669 | 1478 | * context has been detached from its task. |
0793a61d | 1479 | */ |
fe4b04fa | 1480 | static void perf_remove_from_context(struct perf_event *event) |
0793a61d | 1481 | { |
cdd6c482 | 1482 | struct perf_event_context *ctx = event->ctx; |
0793a61d TG |
1483 | struct task_struct *task = ctx->task; |
1484 | ||
fe4b04fa PZ |
1485 | lockdep_assert_held(&ctx->mutex); |
1486 | ||
0793a61d TG |
1487 | if (!task) { |
1488 | /* | |
cdd6c482 | 1489 | * Per cpu events are removed via an smp call and |
af901ca1 | 1490 | * the removal is always successful. |
0793a61d | 1491 | */ |
fe4b04fa | 1492 | cpu_function_call(event->cpu, __perf_remove_from_context, event); |
0793a61d TG |
1493 | return; |
1494 | } | |
1495 | ||
1496 | retry: | |
fe4b04fa PZ |
1497 | if (!task_function_call(task, __perf_remove_from_context, event)) |
1498 | return; | |
0793a61d | 1499 | |
e625cce1 | 1500 | raw_spin_lock_irq(&ctx->lock); |
0793a61d | 1501 | /* |
fe4b04fa PZ |
1502 | * If we failed to find a running task, but find the context active now |
1503 | * that we've acquired the ctx->lock, retry. | |
0793a61d | 1504 | */ |
fe4b04fa | 1505 | if (ctx->is_active) { |
e625cce1 | 1506 | raw_spin_unlock_irq(&ctx->lock); |
0793a61d TG |
1507 | goto retry; |
1508 | } | |
1509 | ||
1510 | /* | |
fe4b04fa PZ |
1511 | * Since the task isn't running, its safe to remove the event, us |
1512 | * holding the ctx->lock ensures the task won't get scheduled in. | |
0793a61d | 1513 | */ |
fe4b04fa | 1514 | list_del_event(event, ctx); |
e625cce1 | 1515 | raw_spin_unlock_irq(&ctx->lock); |
0793a61d TG |
1516 | } |
1517 | ||
d859e29f | 1518 | /* |
cdd6c482 | 1519 | * Cross CPU call to disable a performance event |
d859e29f | 1520 | */ |
500ad2d8 | 1521 | int __perf_event_disable(void *info) |
d859e29f | 1522 | { |
cdd6c482 | 1523 | struct perf_event *event = info; |
cdd6c482 | 1524 | struct perf_event_context *ctx = event->ctx; |
108b02cf | 1525 | struct perf_cpu_context *cpuctx = __get_cpu_context(ctx); |
d859e29f PM |
1526 | |
1527 | /* | |
cdd6c482 IM |
1528 | * If this is a per-task event, need to check whether this |
1529 | * event's task is the current task on this cpu. | |
fe4b04fa PZ |
1530 | * |
1531 | * Can trigger due to concurrent perf_event_context_sched_out() | |
1532 | * flipping contexts around. | |
d859e29f | 1533 | */ |
665c2142 | 1534 | if (ctx->task && cpuctx->task_ctx != ctx) |
fe4b04fa | 1535 | return -EINVAL; |
d859e29f | 1536 | |
e625cce1 | 1537 | raw_spin_lock(&ctx->lock); |
d859e29f PM |
1538 | |
1539 | /* | |
cdd6c482 | 1540 | * If the event is on, turn it off. |
d859e29f PM |
1541 | * If it is in error state, leave it in error state. |
1542 | */ | |
cdd6c482 | 1543 | if (event->state >= PERF_EVENT_STATE_INACTIVE) { |
4af4998b | 1544 | update_context_time(ctx); |
e5d1367f | 1545 | update_cgrp_time_from_event(event); |
cdd6c482 IM |
1546 | update_group_times(event); |
1547 | if (event == event->group_leader) | |
1548 | group_sched_out(event, cpuctx, ctx); | |
d859e29f | 1549 | else |
cdd6c482 IM |
1550 | event_sched_out(event, cpuctx, ctx); |
1551 | event->state = PERF_EVENT_STATE_OFF; | |
d859e29f PM |
1552 | } |
1553 | ||
e625cce1 | 1554 | raw_spin_unlock(&ctx->lock); |
fe4b04fa PZ |
1555 | |
1556 | return 0; | |
d859e29f PM |
1557 | } |
1558 | ||
1559 | /* | |
cdd6c482 | 1560 | * Disable a event. |
c93f7669 | 1561 | * |
cdd6c482 IM |
1562 | * If event->ctx is a cloned context, callers must make sure that |
1563 | * every task struct that event->ctx->task could possibly point to | |
c93f7669 | 1564 | * remains valid. This condition is satisifed when called through |
cdd6c482 IM |
1565 | * perf_event_for_each_child or perf_event_for_each because they |
1566 | * hold the top-level event's child_mutex, so any descendant that | |
1567 | * goes to exit will block in sync_child_event. | |
1568 | * When called from perf_pending_event it's OK because event->ctx | |
c93f7669 | 1569 | * is the current context on this CPU and preemption is disabled, |
cdd6c482 | 1570 | * hence we can't get into perf_event_task_sched_out for this context. |
d859e29f | 1571 | */ |
44234adc | 1572 | void perf_event_disable(struct perf_event *event) |
d859e29f | 1573 | { |
cdd6c482 | 1574 | struct perf_event_context *ctx = event->ctx; |
d859e29f PM |
1575 | struct task_struct *task = ctx->task; |
1576 | ||
1577 | if (!task) { | |
1578 | /* | |
cdd6c482 | 1579 | * Disable the event on the cpu that it's on |
d859e29f | 1580 | */ |
fe4b04fa | 1581 | cpu_function_call(event->cpu, __perf_event_disable, event); |
d859e29f PM |
1582 | return; |
1583 | } | |
1584 | ||
9ed6060d | 1585 | retry: |
fe4b04fa PZ |
1586 | if (!task_function_call(task, __perf_event_disable, event)) |
1587 | return; | |
d859e29f | 1588 | |
e625cce1 | 1589 | raw_spin_lock_irq(&ctx->lock); |
d859e29f | 1590 | /* |
cdd6c482 | 1591 | * If the event is still active, we need to retry the cross-call. |
d859e29f | 1592 | */ |
cdd6c482 | 1593 | if (event->state == PERF_EVENT_STATE_ACTIVE) { |
e625cce1 | 1594 | raw_spin_unlock_irq(&ctx->lock); |
fe4b04fa PZ |
1595 | /* |
1596 | * Reload the task pointer, it might have been changed by | |
1597 | * a concurrent perf_event_context_sched_out(). | |
1598 | */ | |
1599 | task = ctx->task; | |
d859e29f PM |
1600 | goto retry; |
1601 | } | |
1602 | ||
1603 | /* | |
1604 | * Since we have the lock this context can't be scheduled | |
1605 | * in, so we can change the state safely. | |
1606 | */ | |
cdd6c482 IM |
1607 | if (event->state == PERF_EVENT_STATE_INACTIVE) { |
1608 | update_group_times(event); | |
1609 | event->state = PERF_EVENT_STATE_OFF; | |
53cfbf59 | 1610 | } |
e625cce1 | 1611 | raw_spin_unlock_irq(&ctx->lock); |
d859e29f | 1612 | } |
dcfce4a0 | 1613 | EXPORT_SYMBOL_GPL(perf_event_disable); |
d859e29f | 1614 | |
e5d1367f SE |
1615 | static void perf_set_shadow_time(struct perf_event *event, |
1616 | struct perf_event_context *ctx, | |
1617 | u64 tstamp) | |
1618 | { | |
1619 | /* | |
1620 | * use the correct time source for the time snapshot | |
1621 | * | |
1622 | * We could get by without this by leveraging the | |
1623 | * fact that to get to this function, the caller | |
1624 | * has most likely already called update_context_time() | |
1625 | * and update_cgrp_time_xx() and thus both timestamp | |
1626 | * are identical (or very close). Given that tstamp is, | |
1627 | * already adjusted for cgroup, we could say that: | |
1628 | * tstamp - ctx->timestamp | |
1629 | * is equivalent to | |
1630 | * tstamp - cgrp->timestamp. | |
1631 | * | |
1632 | * Then, in perf_output_read(), the calculation would | |
1633 | * work with no changes because: | |
1634 | * - event is guaranteed scheduled in | |
1635 | * - no scheduled out in between | |
1636 | * - thus the timestamp would be the same | |
1637 | * | |
1638 | * But this is a bit hairy. | |
1639 | * | |
1640 | * So instead, we have an explicit cgroup call to remain | |
1641 | * within the time time source all along. We believe it | |
1642 | * is cleaner and simpler to understand. | |
1643 | */ | |
1644 | if (is_cgroup_event(event)) | |
1645 | perf_cgroup_set_shadow_time(event, tstamp); | |
1646 | else | |
1647 | event->shadow_ctx_time = tstamp - ctx->timestamp; | |
1648 | } | |
1649 | ||
4fe757dd PZ |
1650 | #define MAX_INTERRUPTS (~0ULL) |
1651 | ||
1652 | static void perf_log_throttle(struct perf_event *event, int enable); | |
1653 | ||
235c7fc7 | 1654 | static int |
9ffcfa6f | 1655 | event_sched_in(struct perf_event *event, |
235c7fc7 | 1656 | struct perf_cpu_context *cpuctx, |
6e37738a | 1657 | struct perf_event_context *ctx) |
235c7fc7 | 1658 | { |
4158755d | 1659 | u64 tstamp = perf_event_time(event); |
44377277 | 1660 | int ret = 0; |
4158755d | 1661 | |
cdd6c482 | 1662 | if (event->state <= PERF_EVENT_STATE_OFF) |
235c7fc7 IM |
1663 | return 0; |
1664 | ||
cdd6c482 | 1665 | event->state = PERF_EVENT_STATE_ACTIVE; |
6e37738a | 1666 | event->oncpu = smp_processor_id(); |
4fe757dd PZ |
1667 | |
1668 | /* | |
1669 | * Unthrottle events, since we scheduled we might have missed several | |
1670 | * ticks already, also for a heavily scheduling task there is little | |
1671 | * guarantee it'll get a tick in a timely manner. | |
1672 | */ | |
1673 | if (unlikely(event->hw.interrupts == MAX_INTERRUPTS)) { | |
1674 | perf_log_throttle(event, 1); | |
1675 | event->hw.interrupts = 0; | |
1676 | } | |
1677 | ||
235c7fc7 IM |
1678 | /* |
1679 | * The new state must be visible before we turn it on in the hardware: | |
1680 | */ | |
1681 | smp_wmb(); | |
1682 | ||
44377277 AS |
1683 | perf_pmu_disable(event->pmu); |
1684 | ||
a4eaf7f1 | 1685 | if (event->pmu->add(event, PERF_EF_START)) { |
cdd6c482 IM |
1686 | event->state = PERF_EVENT_STATE_INACTIVE; |
1687 | event->oncpu = -1; | |
44377277 AS |
1688 | ret = -EAGAIN; |
1689 | goto out; | |
235c7fc7 IM |
1690 | } |
1691 | ||
4158755d | 1692 | event->tstamp_running += tstamp - event->tstamp_stopped; |
9ffcfa6f | 1693 | |
e5d1367f | 1694 | perf_set_shadow_time(event, ctx, tstamp); |
eed01528 | 1695 | |
cdd6c482 | 1696 | if (!is_software_event(event)) |
3b6f9e5c | 1697 | cpuctx->active_oncpu++; |
235c7fc7 | 1698 | ctx->nr_active++; |
0f5a2601 PZ |
1699 | if (event->attr.freq && event->attr.sample_freq) |
1700 | ctx->nr_freq++; | |
235c7fc7 | 1701 | |
cdd6c482 | 1702 | if (event->attr.exclusive) |
3b6f9e5c PM |
1703 | cpuctx->exclusive = 1; |
1704 | ||
44377277 AS |
1705 | out: |
1706 | perf_pmu_enable(event->pmu); | |
1707 | ||
1708 | return ret; | |
235c7fc7 IM |
1709 | } |
1710 | ||
6751b71e | 1711 | static int |
cdd6c482 | 1712 | group_sched_in(struct perf_event *group_event, |
6751b71e | 1713 | struct perf_cpu_context *cpuctx, |
6e37738a | 1714 | struct perf_event_context *ctx) |
6751b71e | 1715 | { |
6bde9b6c | 1716 | struct perf_event *event, *partial_group = NULL; |
51b0fe39 | 1717 | struct pmu *pmu = group_event->pmu; |
d7842da4 SE |
1718 | u64 now = ctx->time; |
1719 | bool simulate = false; | |
6751b71e | 1720 | |
cdd6c482 | 1721 | if (group_event->state == PERF_EVENT_STATE_OFF) |
6751b71e PM |
1722 | return 0; |
1723 | ||
ad5133b7 | 1724 | pmu->start_txn(pmu); |
6bde9b6c | 1725 | |
9ffcfa6f | 1726 | if (event_sched_in(group_event, cpuctx, ctx)) { |
ad5133b7 | 1727 | pmu->cancel_txn(pmu); |
9e630205 | 1728 | perf_cpu_hrtimer_restart(cpuctx); |
6751b71e | 1729 | return -EAGAIN; |
90151c35 | 1730 | } |
6751b71e PM |
1731 | |
1732 | /* | |
1733 | * Schedule in siblings as one group (if any): | |
1734 | */ | |
cdd6c482 | 1735 | list_for_each_entry(event, &group_event->sibling_list, group_entry) { |
9ffcfa6f | 1736 | if (event_sched_in(event, cpuctx, ctx)) { |
cdd6c482 | 1737 | partial_group = event; |
6751b71e PM |
1738 | goto group_error; |
1739 | } | |
1740 | } | |
1741 | ||
9ffcfa6f | 1742 | if (!pmu->commit_txn(pmu)) |
6e85158c | 1743 | return 0; |
9ffcfa6f | 1744 | |
6751b71e PM |
1745 | group_error: |
1746 | /* | |
1747 | * Groups can be scheduled in as one unit only, so undo any | |
1748 | * partial group before returning: | |
d7842da4 SE |
1749 | * The events up to the failed event are scheduled out normally, |
1750 | * tstamp_stopped will be updated. | |
1751 | * | |
1752 | * The failed events and the remaining siblings need to have | |
1753 | * their timings updated as if they had gone thru event_sched_in() | |
1754 | * and event_sched_out(). This is required to get consistent timings | |
1755 | * across the group. This also takes care of the case where the group | |
1756 | * could never be scheduled by ensuring tstamp_stopped is set to mark | |
1757 | * the time the event was actually stopped, such that time delta | |
1758 | * calculation in update_event_times() is correct. | |
6751b71e | 1759 | */ |
cdd6c482 IM |
1760 | list_for_each_entry(event, &group_event->sibling_list, group_entry) { |
1761 | if (event == partial_group) | |
d7842da4 SE |
1762 | simulate = true; |
1763 | ||
1764 | if (simulate) { | |
1765 | event->tstamp_running += now - event->tstamp_stopped; | |
1766 | event->tstamp_stopped = now; | |
1767 | } else { | |
1768 | event_sched_out(event, cpuctx, ctx); | |
1769 | } | |
6751b71e | 1770 | } |
9ffcfa6f | 1771 | event_sched_out(group_event, cpuctx, ctx); |
6751b71e | 1772 | |
ad5133b7 | 1773 | pmu->cancel_txn(pmu); |
90151c35 | 1774 | |
9e630205 SE |
1775 | perf_cpu_hrtimer_restart(cpuctx); |
1776 | ||
6751b71e PM |
1777 | return -EAGAIN; |
1778 | } | |
1779 | ||
3b6f9e5c | 1780 | /* |
cdd6c482 | 1781 | * Work out whether we can put this event group on the CPU now. |
3b6f9e5c | 1782 | */ |
cdd6c482 | 1783 | static int group_can_go_on(struct perf_event *event, |
3b6f9e5c PM |
1784 | struct perf_cpu_context *cpuctx, |
1785 | int can_add_hw) | |
1786 | { | |
1787 | /* | |
cdd6c482 | 1788 | * Groups consisting entirely of software events can always go on. |
3b6f9e5c | 1789 | */ |
d6f962b5 | 1790 | if (event->group_flags & PERF_GROUP_SOFTWARE) |
3b6f9e5c PM |
1791 | return 1; |
1792 | /* | |
1793 | * If an exclusive group is already on, no other hardware | |
cdd6c482 | 1794 | * events can go on. |
3b6f9e5c PM |
1795 | */ |
1796 | if (cpuctx->exclusive) | |
1797 | return 0; | |
1798 | /* | |
1799 | * If this group is exclusive and there are already | |
cdd6c482 | 1800 | * events on the CPU, it can't go on. |
3b6f9e5c | 1801 | */ |
cdd6c482 | 1802 | if (event->attr.exclusive && cpuctx->active_oncpu) |
3b6f9e5c PM |
1803 | return 0; |
1804 | /* | |
1805 | * Otherwise, try to add it if all previous groups were able | |
1806 | * to go on. | |
1807 | */ | |
1808 | return can_add_hw; | |
1809 | } | |
1810 | ||
cdd6c482 IM |
1811 | static void add_event_to_ctx(struct perf_event *event, |
1812 | struct perf_event_context *ctx) | |
53cfbf59 | 1813 | { |
4158755d SE |
1814 | u64 tstamp = perf_event_time(event); |
1815 | ||
cdd6c482 | 1816 | list_add_event(event, ctx); |
8a49542c | 1817 | perf_group_attach(event); |
4158755d SE |
1818 | event->tstamp_enabled = tstamp; |
1819 | event->tstamp_running = tstamp; | |
1820 | event->tstamp_stopped = tstamp; | |
53cfbf59 PM |
1821 | } |
1822 | ||
2c29ef0f PZ |
1823 | static void task_ctx_sched_out(struct perf_event_context *ctx); |
1824 | static void | |
1825 | ctx_sched_in(struct perf_event_context *ctx, | |
1826 | struct perf_cpu_context *cpuctx, | |
1827 | enum event_type_t event_type, | |
1828 | struct task_struct *task); | |
fe4b04fa | 1829 | |
dce5855b PZ |
1830 | static void perf_event_sched_in(struct perf_cpu_context *cpuctx, |
1831 | struct perf_event_context *ctx, | |
1832 | struct task_struct *task) | |
1833 | { | |
1834 | cpu_ctx_sched_in(cpuctx, EVENT_PINNED, task); | |
1835 | if (ctx) | |
1836 | ctx_sched_in(ctx, cpuctx, EVENT_PINNED, task); | |
1837 | cpu_ctx_sched_in(cpuctx, EVENT_FLEXIBLE, task); | |
1838 | if (ctx) | |
1839 | ctx_sched_in(ctx, cpuctx, EVENT_FLEXIBLE, task); | |
1840 | } | |
1841 | ||
0793a61d | 1842 | /* |
cdd6c482 | 1843 | * Cross CPU call to install and enable a performance event |
682076ae PZ |
1844 | * |
1845 | * Must be called with ctx->mutex held | |
0793a61d | 1846 | */ |
fe4b04fa | 1847 | static int __perf_install_in_context(void *info) |
0793a61d | 1848 | { |
cdd6c482 IM |
1849 | struct perf_event *event = info; |
1850 | struct perf_event_context *ctx = event->ctx; | |
108b02cf | 1851 | struct perf_cpu_context *cpuctx = __get_cpu_context(ctx); |
2c29ef0f PZ |
1852 | struct perf_event_context *task_ctx = cpuctx->task_ctx; |
1853 | struct task_struct *task = current; | |
1854 | ||
b58f6b0d | 1855 | perf_ctx_lock(cpuctx, task_ctx); |
2c29ef0f | 1856 | perf_pmu_disable(cpuctx->ctx.pmu); |
0793a61d TG |
1857 | |
1858 | /* | |
2c29ef0f | 1859 | * If there was an active task_ctx schedule it out. |
0793a61d | 1860 | */ |
b58f6b0d | 1861 | if (task_ctx) |
2c29ef0f | 1862 | task_ctx_sched_out(task_ctx); |
b58f6b0d PZ |
1863 | |
1864 | /* | |
1865 | * If the context we're installing events in is not the | |
1866 | * active task_ctx, flip them. | |
1867 | */ | |
1868 | if (ctx->task && task_ctx != ctx) { | |
1869 | if (task_ctx) | |
1870 | raw_spin_unlock(&task_ctx->lock); | |
1871 | raw_spin_lock(&ctx->lock); | |
1872 | task_ctx = ctx; | |
1873 | } | |
1874 | ||
1875 | if (task_ctx) { | |
1876 | cpuctx->task_ctx = task_ctx; | |
2c29ef0f PZ |
1877 | task = task_ctx->task; |
1878 | } | |
b58f6b0d | 1879 | |
2c29ef0f | 1880 | cpu_ctx_sched_out(cpuctx, EVENT_ALL); |
0793a61d | 1881 | |
4af4998b | 1882 | update_context_time(ctx); |
e5d1367f SE |
1883 | /* |
1884 | * update cgrp time only if current cgrp | |
1885 | * matches event->cgrp. Must be done before | |
1886 | * calling add_event_to_ctx() | |
1887 | */ | |
1888 | update_cgrp_time_from_event(event); | |
0793a61d | 1889 | |
cdd6c482 | 1890 | add_event_to_ctx(event, ctx); |
0793a61d | 1891 | |
d859e29f | 1892 | /* |
2c29ef0f | 1893 | * Schedule everything back in |
d859e29f | 1894 | */ |
dce5855b | 1895 | perf_event_sched_in(cpuctx, task_ctx, task); |
2c29ef0f PZ |
1896 | |
1897 | perf_pmu_enable(cpuctx->ctx.pmu); | |
1898 | perf_ctx_unlock(cpuctx, task_ctx); | |
fe4b04fa PZ |
1899 | |
1900 | return 0; | |
0793a61d TG |
1901 | } |
1902 | ||
1903 | /* | |
cdd6c482 | 1904 | * Attach a performance event to a context |
0793a61d | 1905 | * |
cdd6c482 IM |
1906 | * First we add the event to the list with the hardware enable bit |
1907 | * in event->hw_config cleared. | |
0793a61d | 1908 | * |
cdd6c482 | 1909 | * If the event is attached to a task which is on a CPU we use a smp |
0793a61d TG |
1910 | * call to enable it in the task context. The task might have been |
1911 | * scheduled away, but we check this in the smp call again. | |
1912 | */ | |
1913 | static void | |
cdd6c482 IM |
1914 | perf_install_in_context(struct perf_event_context *ctx, |
1915 | struct perf_event *event, | |
0793a61d TG |
1916 | int cpu) |
1917 | { | |
1918 | struct task_struct *task = ctx->task; | |
1919 | ||
fe4b04fa PZ |
1920 | lockdep_assert_held(&ctx->mutex); |
1921 | ||
c3f00c70 | 1922 | event->ctx = ctx; |
0cda4c02 YZ |
1923 | if (event->cpu != -1) |
1924 | event->cpu = cpu; | |
c3f00c70 | 1925 | |
0793a61d TG |
1926 | if (!task) { |
1927 | /* | |
cdd6c482 | 1928 | * Per cpu events are installed via an smp call and |
af901ca1 | 1929 | * the install is always successful. |
0793a61d | 1930 | */ |
fe4b04fa | 1931 | cpu_function_call(cpu, __perf_install_in_context, event); |
0793a61d TG |
1932 | return; |
1933 | } | |
1934 | ||
0793a61d | 1935 | retry: |
fe4b04fa PZ |
1936 | if (!task_function_call(task, __perf_install_in_context, event)) |
1937 | return; | |
0793a61d | 1938 | |
e625cce1 | 1939 | raw_spin_lock_irq(&ctx->lock); |
0793a61d | 1940 | /* |
fe4b04fa PZ |
1941 | * If we failed to find a running task, but find the context active now |
1942 | * that we've acquired the ctx->lock, retry. | |
0793a61d | 1943 | */ |
fe4b04fa | 1944 | if (ctx->is_active) { |
e625cce1 | 1945 | raw_spin_unlock_irq(&ctx->lock); |
0793a61d TG |
1946 | goto retry; |
1947 | } | |
1948 | ||
1949 | /* | |
fe4b04fa PZ |
1950 | * Since the task isn't running, its safe to add the event, us holding |
1951 | * the ctx->lock ensures the task won't get scheduled in. | |
0793a61d | 1952 | */ |
fe4b04fa | 1953 | add_event_to_ctx(event, ctx); |
e625cce1 | 1954 | raw_spin_unlock_irq(&ctx->lock); |
0793a61d TG |
1955 | } |
1956 | ||
fa289bec | 1957 | /* |
cdd6c482 | 1958 | * Put a event into inactive state and update time fields. |
fa289bec PM |
1959 | * Enabling the leader of a group effectively enables all |
1960 | * the group members that aren't explicitly disabled, so we | |
1961 | * have to update their ->tstamp_enabled also. | |
1962 | * Note: this works for group members as well as group leaders | |
1963 | * since the non-leader members' sibling_lists will be empty. | |
1964 | */ | |
1d9b482e | 1965 | static void __perf_event_mark_enabled(struct perf_event *event) |
fa289bec | 1966 | { |
cdd6c482 | 1967 | struct perf_event *sub; |
4158755d | 1968 | u64 tstamp = perf_event_time(event); |
fa289bec | 1969 | |
cdd6c482 | 1970 | event->state = PERF_EVENT_STATE_INACTIVE; |
4158755d | 1971 | event->tstamp_enabled = tstamp - event->total_time_enabled; |
9ed6060d | 1972 | list_for_each_entry(sub, &event->sibling_list, group_entry) { |
4158755d SE |
1973 | if (sub->state >= PERF_EVENT_STATE_INACTIVE) |
1974 | sub->tstamp_enabled = tstamp - sub->total_time_enabled; | |
9ed6060d | 1975 | } |
fa289bec PM |
1976 | } |
1977 | ||
d859e29f | 1978 | /* |
cdd6c482 | 1979 | * Cross CPU call to enable a performance event |
d859e29f | 1980 | */ |
fe4b04fa | 1981 | static int __perf_event_enable(void *info) |
04289bb9 | 1982 | { |
cdd6c482 | 1983 | struct perf_event *event = info; |
cdd6c482 IM |
1984 | struct perf_event_context *ctx = event->ctx; |
1985 | struct perf_event *leader = event->group_leader; | |
108b02cf | 1986 | struct perf_cpu_context *cpuctx = __get_cpu_context(ctx); |
d859e29f | 1987 | int err; |
04289bb9 | 1988 | |
06f41796 JO |
1989 | /* |
1990 | * There's a time window between 'ctx->is_active' check | |
1991 | * in perf_event_enable function and this place having: | |
1992 | * - IRQs on | |
1993 | * - ctx->lock unlocked | |
1994 | * | |
1995 | * where the task could be killed and 'ctx' deactivated | |
1996 | * by perf_event_exit_task. | |
1997 | */ | |
1998 | if (!ctx->is_active) | |
fe4b04fa | 1999 | return -EINVAL; |
3cbed429 | 2000 | |
e625cce1 | 2001 | raw_spin_lock(&ctx->lock); |
4af4998b | 2002 | update_context_time(ctx); |
d859e29f | 2003 | |
cdd6c482 | 2004 | if (event->state >= PERF_EVENT_STATE_INACTIVE) |
d859e29f | 2005 | goto unlock; |
e5d1367f SE |
2006 | |
2007 | /* | |
2008 | * set current task's cgroup time reference point | |
2009 | */ | |
3f7cce3c | 2010 | perf_cgroup_set_timestamp(current, ctx); |
e5d1367f | 2011 | |
1d9b482e | 2012 | __perf_event_mark_enabled(event); |
04289bb9 | 2013 | |
e5d1367f SE |
2014 | if (!event_filter_match(event)) { |
2015 | if (is_cgroup_event(event)) | |
2016 | perf_cgroup_defer_enabled(event); | |
f4c4176f | 2017 | goto unlock; |
e5d1367f | 2018 | } |
f4c4176f | 2019 | |
04289bb9 | 2020 | /* |
cdd6c482 | 2021 | * If the event is in a group and isn't the group leader, |
d859e29f | 2022 | * then don't put it on unless the group is on. |
04289bb9 | 2023 | */ |
cdd6c482 | 2024 | if (leader != event && leader->state != PERF_EVENT_STATE_ACTIVE) |
d859e29f | 2025 | goto unlock; |
3b6f9e5c | 2026 | |
cdd6c482 | 2027 | if (!group_can_go_on(event, cpuctx, 1)) { |
d859e29f | 2028 | err = -EEXIST; |
e758a33d | 2029 | } else { |
cdd6c482 | 2030 | if (event == leader) |
6e37738a | 2031 | err = group_sched_in(event, cpuctx, ctx); |
e758a33d | 2032 | else |
6e37738a | 2033 | err = event_sched_in(event, cpuctx, ctx); |
e758a33d | 2034 | } |
d859e29f PM |
2035 | |
2036 | if (err) { | |
2037 | /* | |
cdd6c482 | 2038 | * If this event can't go on and it's part of a |
d859e29f PM |
2039 | * group, then the whole group has to come off. |
2040 | */ | |
9e630205 | 2041 | if (leader != event) { |
d859e29f | 2042 | group_sched_out(leader, cpuctx, ctx); |
9e630205 SE |
2043 | perf_cpu_hrtimer_restart(cpuctx); |
2044 | } | |
0d48696f | 2045 | if (leader->attr.pinned) { |
53cfbf59 | 2046 | update_group_times(leader); |
cdd6c482 | 2047 | leader->state = PERF_EVENT_STATE_ERROR; |
53cfbf59 | 2048 | } |
d859e29f PM |
2049 | } |
2050 | ||
9ed6060d | 2051 | unlock: |
e625cce1 | 2052 | raw_spin_unlock(&ctx->lock); |
fe4b04fa PZ |
2053 | |
2054 | return 0; | |
d859e29f PM |
2055 | } |
2056 | ||
2057 | /* | |
cdd6c482 | 2058 | * Enable a event. |
c93f7669 | 2059 | * |
cdd6c482 IM |
2060 | * If event->ctx is a cloned context, callers must make sure that |
2061 | * every task struct that event->ctx->task could possibly point to | |
c93f7669 | 2062 | * remains valid. This condition is satisfied when called through |
cdd6c482 IM |
2063 | * perf_event_for_each_child or perf_event_for_each as described |
2064 | * for perf_event_disable. | |
d859e29f | 2065 | */ |
44234adc | 2066 | void perf_event_enable(struct perf_event *event) |
d859e29f | 2067 | { |
cdd6c482 | 2068 | struct perf_event_context *ctx = event->ctx; |
d859e29f PM |
2069 | struct task_struct *task = ctx->task; |
2070 | ||
2071 | if (!task) { | |
2072 | /* | |
cdd6c482 | 2073 | * Enable the event on the cpu that it's on |
d859e29f | 2074 | */ |
fe4b04fa | 2075 | cpu_function_call(event->cpu, __perf_event_enable, event); |
d859e29f PM |
2076 | return; |
2077 | } | |
2078 | ||
e625cce1 | 2079 | raw_spin_lock_irq(&ctx->lock); |
cdd6c482 | 2080 | if (event->state >= PERF_EVENT_STATE_INACTIVE) |
d859e29f PM |
2081 | goto out; |
2082 | ||
2083 | /* | |
cdd6c482 IM |
2084 | * If the event is in error state, clear that first. |
2085 | * That way, if we see the event in error state below, we | |
d859e29f PM |
2086 | * know that it has gone back into error state, as distinct |
2087 | * from the task having been scheduled away before the | |
2088 | * cross-call arrived. | |
2089 | */ | |
cdd6c482 IM |
2090 | if (event->state == PERF_EVENT_STATE_ERROR) |
2091 | event->state = PERF_EVENT_STATE_OFF; | |
d859e29f | 2092 | |
9ed6060d | 2093 | retry: |
fe4b04fa | 2094 | if (!ctx->is_active) { |
1d9b482e | 2095 | __perf_event_mark_enabled(event); |
fe4b04fa PZ |
2096 | goto out; |
2097 | } | |
2098 | ||
e625cce1 | 2099 | raw_spin_unlock_irq(&ctx->lock); |
fe4b04fa PZ |
2100 | |
2101 | if (!task_function_call(task, __perf_event_enable, event)) | |
2102 | return; | |
d859e29f | 2103 | |
e625cce1 | 2104 | raw_spin_lock_irq(&ctx->lock); |
d859e29f PM |
2105 | |
2106 | /* | |
cdd6c482 | 2107 | * If the context is active and the event is still off, |
d859e29f PM |
2108 | * we need to retry the cross-call. |
2109 | */ | |
fe4b04fa PZ |
2110 | if (ctx->is_active && event->state == PERF_EVENT_STATE_OFF) { |
2111 | /* | |
2112 | * task could have been flipped by a concurrent | |
2113 | * perf_event_context_sched_out() | |
2114 | */ | |
2115 | task = ctx->task; | |
d859e29f | 2116 | goto retry; |
fe4b04fa | 2117 | } |
fa289bec | 2118 | |
9ed6060d | 2119 | out: |
e625cce1 | 2120 | raw_spin_unlock_irq(&ctx->lock); |
d859e29f | 2121 | } |
dcfce4a0 | 2122 | EXPORT_SYMBOL_GPL(perf_event_enable); |
d859e29f | 2123 | |
26ca5c11 | 2124 | int perf_event_refresh(struct perf_event *event, int refresh) |
79f14641 | 2125 | { |
2023b359 | 2126 | /* |
cdd6c482 | 2127 | * not supported on inherited events |
2023b359 | 2128 | */ |
2e939d1d | 2129 | if (event->attr.inherit || !is_sampling_event(event)) |
2023b359 PZ |
2130 | return -EINVAL; |
2131 | ||
cdd6c482 IM |
2132 | atomic_add(refresh, &event->event_limit); |
2133 | perf_event_enable(event); | |
2023b359 PZ |
2134 | |
2135 | return 0; | |
79f14641 | 2136 | } |
26ca5c11 | 2137 | EXPORT_SYMBOL_GPL(perf_event_refresh); |
79f14641 | 2138 | |
5b0311e1 FW |
2139 | static void ctx_sched_out(struct perf_event_context *ctx, |
2140 | struct perf_cpu_context *cpuctx, | |
2141 | enum event_type_t event_type) | |
235c7fc7 | 2142 | { |
cdd6c482 | 2143 | struct perf_event *event; |
db24d33e | 2144 | int is_active = ctx->is_active; |
235c7fc7 | 2145 | |
db24d33e | 2146 | ctx->is_active &= ~event_type; |
cdd6c482 | 2147 | if (likely(!ctx->nr_events)) |
facc4307 PZ |
2148 | return; |
2149 | ||
4af4998b | 2150 | update_context_time(ctx); |
e5d1367f | 2151 | update_cgrp_time_from_cpuctx(cpuctx); |
5b0311e1 | 2152 | if (!ctx->nr_active) |
facc4307 | 2153 | return; |
5b0311e1 | 2154 | |
075e0b00 | 2155 | perf_pmu_disable(ctx->pmu); |
db24d33e | 2156 | if ((is_active & EVENT_PINNED) && (event_type & EVENT_PINNED)) { |
889ff015 FW |
2157 | list_for_each_entry(event, &ctx->pinned_groups, group_entry) |
2158 | group_sched_out(event, cpuctx, ctx); | |
9ed6060d | 2159 | } |
889ff015 | 2160 | |
db24d33e | 2161 | if ((is_active & EVENT_FLEXIBLE) && (event_type & EVENT_FLEXIBLE)) { |
889ff015 | 2162 | list_for_each_entry(event, &ctx->flexible_groups, group_entry) |
8c9ed8e1 | 2163 | group_sched_out(event, cpuctx, ctx); |
9ed6060d | 2164 | } |
1b9a644f | 2165 | perf_pmu_enable(ctx->pmu); |
235c7fc7 IM |
2166 | } |
2167 | ||
564c2b21 | 2168 | /* |
5a3126d4 PZ |
2169 | * Test whether two contexts are equivalent, i.e. whether they have both been |
2170 | * cloned from the same version of the same context. | |
2171 | * | |
2172 | * Equivalence is measured using a generation number in the context that is | |
2173 | * incremented on each modification to it; see unclone_ctx(), list_add_event() | |
2174 | * and list_del_event(). | |
564c2b21 | 2175 | */ |
cdd6c482 IM |
2176 | static int context_equiv(struct perf_event_context *ctx1, |
2177 | struct perf_event_context *ctx2) | |
564c2b21 | 2178 | { |
5a3126d4 PZ |
2179 | /* Pinning disables the swap optimization */ |
2180 | if (ctx1->pin_count || ctx2->pin_count) | |
2181 | return 0; | |
2182 | ||
2183 | /* If ctx1 is the parent of ctx2 */ | |
2184 | if (ctx1 == ctx2->parent_ctx && ctx1->generation == ctx2->parent_gen) | |
2185 | return 1; | |
2186 | ||
2187 | /* If ctx2 is the parent of ctx1 */ | |
2188 | if (ctx1->parent_ctx == ctx2 && ctx1->parent_gen == ctx2->generation) | |
2189 | return 1; | |
2190 | ||
2191 | /* | |
2192 | * If ctx1 and ctx2 have the same parent; we flatten the parent | |
2193 | * hierarchy, see perf_event_init_context(). | |
2194 | */ | |
2195 | if (ctx1->parent_ctx && ctx1->parent_ctx == ctx2->parent_ctx && | |
2196 | ctx1->parent_gen == ctx2->parent_gen) | |
2197 | return 1; | |
2198 | ||
2199 | /* Unmatched */ | |
2200 | return 0; | |
564c2b21 PM |
2201 | } |
2202 | ||
cdd6c482 IM |
2203 | static void __perf_event_sync_stat(struct perf_event *event, |
2204 | struct perf_event *next_event) | |
bfbd3381 PZ |
2205 | { |
2206 | u64 value; | |
2207 | ||
cdd6c482 | 2208 | if (!event->attr.inherit_stat) |
bfbd3381 PZ |
2209 | return; |
2210 | ||
2211 | /* | |
cdd6c482 | 2212 | * Update the event value, we cannot use perf_event_read() |
bfbd3381 PZ |
2213 | * because we're in the middle of a context switch and have IRQs |
2214 | * disabled, which upsets smp_call_function_single(), however | |
cdd6c482 | 2215 | * we know the event must be on the current CPU, therefore we |
bfbd3381 PZ |
2216 | * don't need to use it. |
2217 | */ | |
cdd6c482 IM |
2218 | switch (event->state) { |
2219 | case PERF_EVENT_STATE_ACTIVE: | |
3dbebf15 PZ |
2220 | event->pmu->read(event); |
2221 | /* fall-through */ | |
bfbd3381 | 2222 | |
cdd6c482 IM |
2223 | case PERF_EVENT_STATE_INACTIVE: |
2224 | update_event_times(event); | |
bfbd3381 PZ |
2225 | break; |
2226 | ||
2227 | default: | |
2228 | break; | |
2229 | } | |
2230 | ||
2231 | /* | |
cdd6c482 | 2232 | * In order to keep per-task stats reliable we need to flip the event |
bfbd3381 PZ |
2233 | * values when we flip the contexts. |
2234 | */ | |
e7850595 PZ |
2235 | value = local64_read(&next_event->count); |
2236 | value = local64_xchg(&event->count, value); | |
2237 | local64_set(&next_event->count, value); | |
bfbd3381 | 2238 | |
cdd6c482 IM |
2239 | swap(event->total_time_enabled, next_event->total_time_enabled); |
2240 | swap(event->total_time_running, next_event->total_time_running); | |
19d2e755 | 2241 | |
bfbd3381 | 2242 | /* |
19d2e755 | 2243 | * Since we swizzled the values, update the user visible data too. |
bfbd3381 | 2244 | */ |
cdd6c482 IM |
2245 | perf_event_update_userpage(event); |
2246 | perf_event_update_userpage(next_event); | |
bfbd3381 PZ |
2247 | } |
2248 | ||
cdd6c482 IM |
2249 | static void perf_event_sync_stat(struct perf_event_context *ctx, |
2250 | struct perf_event_context *next_ctx) | |
bfbd3381 | 2251 | { |
cdd6c482 | 2252 | struct perf_event *event, *next_event; |
bfbd3381 PZ |
2253 | |
2254 | if (!ctx->nr_stat) | |
2255 | return; | |
2256 | ||
02ffdbc8 PZ |
2257 | update_context_time(ctx); |
2258 | ||
cdd6c482 IM |
2259 | event = list_first_entry(&ctx->event_list, |
2260 | struct perf_event, event_entry); | |
bfbd3381 | 2261 | |
cdd6c482 IM |
2262 | next_event = list_first_entry(&next_ctx->event_list, |
2263 | struct perf_event, event_entry); | |
bfbd3381 | 2264 | |
cdd6c482 IM |
2265 | while (&event->event_entry != &ctx->event_list && |
2266 | &next_event->event_entry != &next_ctx->event_list) { | |
bfbd3381 | 2267 | |
cdd6c482 | 2268 | __perf_event_sync_stat(event, next_event); |
bfbd3381 | 2269 | |
cdd6c482 IM |
2270 | event = list_next_entry(event, event_entry); |
2271 | next_event = list_next_entry(next_event, event_entry); | |
bfbd3381 PZ |
2272 | } |
2273 | } | |
2274 | ||
fe4b04fa PZ |
2275 | static void perf_event_context_sched_out(struct task_struct *task, int ctxn, |
2276 | struct task_struct *next) | |
0793a61d | 2277 | { |
8dc85d54 | 2278 | struct perf_event_context *ctx = task->perf_event_ctxp[ctxn]; |
cdd6c482 | 2279 | struct perf_event_context *next_ctx; |
5a3126d4 | 2280 | struct perf_event_context *parent, *next_parent; |
108b02cf | 2281 | struct perf_cpu_context *cpuctx; |
c93f7669 | 2282 | int do_switch = 1; |
0793a61d | 2283 | |
108b02cf PZ |
2284 | if (likely(!ctx)) |
2285 | return; | |
10989fb2 | 2286 | |
108b02cf PZ |
2287 | cpuctx = __get_cpu_context(ctx); |
2288 | if (!cpuctx->task_ctx) | |
0793a61d TG |
2289 | return; |
2290 | ||
c93f7669 | 2291 | rcu_read_lock(); |
8dc85d54 | 2292 | next_ctx = next->perf_event_ctxp[ctxn]; |
5a3126d4 PZ |
2293 | if (!next_ctx) |
2294 | goto unlock; | |
2295 | ||
2296 | parent = rcu_dereference(ctx->parent_ctx); | |
2297 | next_parent = rcu_dereference(next_ctx->parent_ctx); | |
2298 | ||
2299 | /* If neither context have a parent context; they cannot be clones. */ | |
2300 | if (!parent && !next_parent) | |
2301 | goto unlock; | |
2302 | ||
2303 | if (next_parent == ctx || next_ctx == parent || next_parent == parent) { | |
c93f7669 PM |
2304 | /* |
2305 | * Looks like the two contexts are clones, so we might be | |
2306 | * able to optimize the context switch. We lock both | |
2307 | * contexts and check that they are clones under the | |
2308 | * lock (including re-checking that neither has been | |
2309 | * uncloned in the meantime). It doesn't matter which | |
2310 | * order we take the locks because no other cpu could | |
2311 | * be trying to lock both of these tasks. | |
2312 | */ | |
e625cce1 TG |
2313 | raw_spin_lock(&ctx->lock); |
2314 | raw_spin_lock_nested(&next_ctx->lock, SINGLE_DEPTH_NESTING); | |
c93f7669 | 2315 | if (context_equiv(ctx, next_ctx)) { |
665c2142 PZ |
2316 | /* |
2317 | * XXX do we need a memory barrier of sorts | |
cdd6c482 | 2318 | * wrt to rcu_dereference() of perf_event_ctxp |
665c2142 | 2319 | */ |
8dc85d54 PZ |
2320 | task->perf_event_ctxp[ctxn] = next_ctx; |
2321 | next->perf_event_ctxp[ctxn] = ctx; | |
c93f7669 PM |
2322 | ctx->task = next; |
2323 | next_ctx->task = task; | |
2324 | do_switch = 0; | |
bfbd3381 | 2325 | |
cdd6c482 | 2326 | perf_event_sync_stat(ctx, next_ctx); |
c93f7669 | 2327 | } |
e625cce1 TG |
2328 | raw_spin_unlock(&next_ctx->lock); |
2329 | raw_spin_unlock(&ctx->lock); | |
564c2b21 | 2330 | } |
5a3126d4 | 2331 | unlock: |
c93f7669 | 2332 | rcu_read_unlock(); |
564c2b21 | 2333 | |
c93f7669 | 2334 | if (do_switch) { |
facc4307 | 2335 | raw_spin_lock(&ctx->lock); |
5b0311e1 | 2336 | ctx_sched_out(ctx, cpuctx, EVENT_ALL); |
c93f7669 | 2337 | cpuctx->task_ctx = NULL; |
facc4307 | 2338 | raw_spin_unlock(&ctx->lock); |
c93f7669 | 2339 | } |
0793a61d TG |
2340 | } |
2341 | ||
8dc85d54 PZ |
2342 | #define for_each_task_context_nr(ctxn) \ |
2343 | for ((ctxn) = 0; (ctxn) < perf_nr_task_contexts; (ctxn)++) | |
2344 | ||
2345 | /* | |
2346 | * Called from scheduler to remove the events of the current task, | |
2347 | * with interrupts disabled. | |
2348 | * | |
2349 | * We stop each event and update the event value in event->count. | |
2350 | * | |
2351 | * This does not protect us against NMI, but disable() | |
2352 | * sets the disabled bit in the control field of event _before_ | |
2353 | * accessing the event control register. If a NMI hits, then it will | |
2354 | * not restart the event. | |
2355 | */ | |
ab0cce56 JO |
2356 | void __perf_event_task_sched_out(struct task_struct *task, |
2357 | struct task_struct *next) | |
8dc85d54 PZ |
2358 | { |
2359 | int ctxn; | |
2360 | ||
8dc85d54 PZ |
2361 | for_each_task_context_nr(ctxn) |
2362 | perf_event_context_sched_out(task, ctxn, next); | |
e5d1367f SE |
2363 | |
2364 | /* | |
2365 | * if cgroup events exist on this CPU, then we need | |
2366 | * to check if we have to switch out PMU state. | |
2367 | * cgroup event are system-wide mode only | |
2368 | */ | |
2369 | if (atomic_read(&__get_cpu_var(perf_cgroup_events))) | |
a8d757ef | 2370 | perf_cgroup_sched_out(task, next); |
8dc85d54 PZ |
2371 | } |
2372 | ||
04dc2dbb | 2373 | static void task_ctx_sched_out(struct perf_event_context *ctx) |
a08b159f | 2374 | { |
108b02cf | 2375 | struct perf_cpu_context *cpuctx = __get_cpu_context(ctx); |
a08b159f | 2376 | |
a63eaf34 PM |
2377 | if (!cpuctx->task_ctx) |
2378 | return; | |
012b84da IM |
2379 | |
2380 | if (WARN_ON_ONCE(ctx != cpuctx->task_ctx)) | |
2381 | return; | |
2382 | ||
04dc2dbb | 2383 | ctx_sched_out(ctx, cpuctx, EVENT_ALL); |
a08b159f PM |
2384 | cpuctx->task_ctx = NULL; |
2385 | } | |
2386 | ||
5b0311e1 FW |
2387 | /* |
2388 | * Called with IRQs disabled | |
2389 | */ | |
2390 | static void cpu_ctx_sched_out(struct perf_cpu_context *cpuctx, | |
2391 | enum event_type_t event_type) | |
2392 | { | |
2393 | ctx_sched_out(&cpuctx->ctx, cpuctx, event_type); | |
04289bb9 IM |
2394 | } |
2395 | ||
235c7fc7 | 2396 | static void |
5b0311e1 | 2397 | ctx_pinned_sched_in(struct perf_event_context *ctx, |
6e37738a | 2398 | struct perf_cpu_context *cpuctx) |
0793a61d | 2399 | { |
cdd6c482 | 2400 | struct perf_event *event; |
0793a61d | 2401 | |
889ff015 FW |
2402 | list_for_each_entry(event, &ctx->pinned_groups, group_entry) { |
2403 | if (event->state <= PERF_EVENT_STATE_OFF) | |
3b6f9e5c | 2404 | continue; |
5632ab12 | 2405 | if (!event_filter_match(event)) |
3b6f9e5c PM |
2406 | continue; |
2407 | ||
e5d1367f SE |
2408 | /* may need to reset tstamp_enabled */ |
2409 | if (is_cgroup_event(event)) | |
2410 | perf_cgroup_mark_enabled(event, ctx); | |
2411 | ||
8c9ed8e1 | 2412 | if (group_can_go_on(event, cpuctx, 1)) |
6e37738a | 2413 | group_sched_in(event, cpuctx, ctx); |
3b6f9e5c PM |
2414 | |
2415 | /* | |
2416 | * If this pinned group hasn't been scheduled, | |
2417 | * put it in error state. | |
2418 | */ | |
cdd6c482 IM |
2419 | if (event->state == PERF_EVENT_STATE_INACTIVE) { |
2420 | update_group_times(event); | |
2421 | event->state = PERF_EVENT_STATE_ERROR; | |
53cfbf59 | 2422 | } |
3b6f9e5c | 2423 | } |
5b0311e1 FW |
2424 | } |
2425 | ||
2426 | static void | |
2427 | ctx_flexible_sched_in(struct perf_event_context *ctx, | |
6e37738a | 2428 | struct perf_cpu_context *cpuctx) |
5b0311e1 FW |
2429 | { |
2430 | struct perf_event *event; | |
2431 | int can_add_hw = 1; | |
3b6f9e5c | 2432 | |
889ff015 FW |
2433 | list_for_each_entry(event, &ctx->flexible_groups, group_entry) { |
2434 | /* Ignore events in OFF or ERROR state */ | |
2435 | if (event->state <= PERF_EVENT_STATE_OFF) | |
3b6f9e5c | 2436 | continue; |
04289bb9 IM |
2437 | /* |
2438 | * Listen to the 'cpu' scheduling filter constraint | |
cdd6c482 | 2439 | * of events: |
04289bb9 | 2440 | */ |
5632ab12 | 2441 | if (!event_filter_match(event)) |
0793a61d TG |
2442 | continue; |
2443 | ||
e5d1367f SE |
2444 | /* may need to reset tstamp_enabled */ |
2445 | if (is_cgroup_event(event)) | |
2446 | perf_cgroup_mark_enabled(event, ctx); | |
2447 | ||
9ed6060d | 2448 | if (group_can_go_on(event, cpuctx, can_add_hw)) { |
6e37738a | 2449 | if (group_sched_in(event, cpuctx, ctx)) |
dd0e6ba2 | 2450 | can_add_hw = 0; |
9ed6060d | 2451 | } |
0793a61d | 2452 | } |
5b0311e1 FW |
2453 | } |
2454 | ||
2455 | static void | |
2456 | ctx_sched_in(struct perf_event_context *ctx, | |
2457 | struct perf_cpu_context *cpuctx, | |
e5d1367f SE |
2458 | enum event_type_t event_type, |
2459 | struct task_struct *task) | |
5b0311e1 | 2460 | { |
e5d1367f | 2461 | u64 now; |
db24d33e | 2462 | int is_active = ctx->is_active; |
e5d1367f | 2463 | |
db24d33e | 2464 | ctx->is_active |= event_type; |
5b0311e1 | 2465 | if (likely(!ctx->nr_events)) |
facc4307 | 2466 | return; |
5b0311e1 | 2467 | |
e5d1367f SE |
2468 | now = perf_clock(); |
2469 | ctx->timestamp = now; | |
3f7cce3c | 2470 | perf_cgroup_set_timestamp(task, ctx); |
5b0311e1 FW |
2471 | /* |
2472 | * First go through the list and put on any pinned groups | |
2473 | * in order to give them the best chance of going on. | |
2474 | */ | |
db24d33e | 2475 | if (!(is_active & EVENT_PINNED) && (event_type & EVENT_PINNED)) |
6e37738a | 2476 | ctx_pinned_sched_in(ctx, cpuctx); |
5b0311e1 FW |
2477 | |
2478 | /* Then walk through the lower prio flexible groups */ | |
db24d33e | 2479 | if (!(is_active & EVENT_FLEXIBLE) && (event_type & EVENT_FLEXIBLE)) |
6e37738a | 2480 | ctx_flexible_sched_in(ctx, cpuctx); |
235c7fc7 IM |
2481 | } |
2482 | ||
329c0e01 | 2483 | static void cpu_ctx_sched_in(struct perf_cpu_context *cpuctx, |
e5d1367f SE |
2484 | enum event_type_t event_type, |
2485 | struct task_struct *task) | |
329c0e01 FW |
2486 | { |
2487 | struct perf_event_context *ctx = &cpuctx->ctx; | |
2488 | ||
e5d1367f | 2489 | ctx_sched_in(ctx, cpuctx, event_type, task); |
329c0e01 FW |
2490 | } |
2491 | ||
e5d1367f SE |
2492 | static void perf_event_context_sched_in(struct perf_event_context *ctx, |
2493 | struct task_struct *task) | |
235c7fc7 | 2494 | { |
108b02cf | 2495 | struct perf_cpu_context *cpuctx; |
235c7fc7 | 2496 | |
108b02cf | 2497 | cpuctx = __get_cpu_context(ctx); |
329c0e01 FW |
2498 | if (cpuctx->task_ctx == ctx) |
2499 | return; | |
2500 | ||
facc4307 | 2501 | perf_ctx_lock(cpuctx, ctx); |
1b9a644f | 2502 | perf_pmu_disable(ctx->pmu); |
329c0e01 FW |
2503 | /* |
2504 | * We want to keep the following priority order: | |
2505 | * cpu pinned (that don't need to move), task pinned, | |
2506 | * cpu flexible, task flexible. | |
2507 | */ | |
2508 | cpu_ctx_sched_out(cpuctx, EVENT_FLEXIBLE); | |
2509 | ||
1d5f003f GN |
2510 | if (ctx->nr_events) |
2511 | cpuctx->task_ctx = ctx; | |
9b33fa6b | 2512 | |
86b47c25 GN |
2513 | perf_event_sched_in(cpuctx, cpuctx->task_ctx, task); |
2514 | ||
facc4307 PZ |
2515 | perf_pmu_enable(ctx->pmu); |
2516 | perf_ctx_unlock(cpuctx, ctx); | |
2517 | ||
b5ab4cd5 PZ |
2518 | /* |
2519 | * Since these rotations are per-cpu, we need to ensure the | |
2520 | * cpu-context we got scheduled on is actually rotating. | |
2521 | */ | |
108b02cf | 2522 | perf_pmu_rotate_start(ctx->pmu); |
235c7fc7 IM |
2523 | } |
2524 | ||
d010b332 SE |
2525 | /* |
2526 | * When sampling the branck stack in system-wide, it may be necessary | |
2527 | * to flush the stack on context switch. This happens when the branch | |
2528 | * stack does not tag its entries with the pid of the current task. | |
2529 | * Otherwise it becomes impossible to associate a branch entry with a | |
2530 | * task. This ambiguity is more likely to appear when the branch stack | |
2531 | * supports priv level filtering and the user sets it to monitor only | |
2532 | * at the user level (which could be a useful measurement in system-wide | |
2533 | * mode). In that case, the risk is high of having a branch stack with | |
2534 | * branch from multiple tasks. Flushing may mean dropping the existing | |
2535 | * entries or stashing them somewhere in the PMU specific code layer. | |
2536 | * | |
2537 | * This function provides the context switch callback to the lower code | |
2538 | * layer. It is invoked ONLY when there is at least one system-wide context | |
2539 | * with at least one active event using taken branch sampling. | |
2540 | */ | |
2541 | static void perf_branch_stack_sched_in(struct task_struct *prev, | |
2542 | struct task_struct *task) | |
2543 | { | |
2544 | struct perf_cpu_context *cpuctx; | |
2545 | struct pmu *pmu; | |
2546 | unsigned long flags; | |
2547 | ||
2548 | /* no need to flush branch stack if not changing task */ | |
2549 | if (prev == task) | |
2550 | return; | |
2551 | ||
2552 | local_irq_save(flags); | |
2553 | ||
2554 | rcu_read_lock(); | |
2555 | ||
2556 | list_for_each_entry_rcu(pmu, &pmus, entry) { | |
2557 | cpuctx = this_cpu_ptr(pmu->pmu_cpu_context); | |
2558 | ||
2559 | /* | |
2560 | * check if the context has at least one | |
2561 | * event using PERF_SAMPLE_BRANCH_STACK | |
2562 | */ | |
2563 | if (cpuctx->ctx.nr_branch_stack > 0 | |
2564 | && pmu->flush_branch_stack) { | |
2565 | ||
2566 | pmu = cpuctx->ctx.pmu; | |
2567 | ||
2568 | perf_ctx_lock(cpuctx, cpuctx->task_ctx); | |
2569 | ||
2570 | perf_pmu_disable(pmu); | |
2571 | ||
2572 | pmu->flush_branch_stack(); | |
2573 | ||
2574 | perf_pmu_enable(pmu); | |
2575 | ||
2576 | perf_ctx_unlock(cpuctx, cpuctx->task_ctx); | |
2577 | } | |
2578 | } | |
2579 | ||
2580 | rcu_read_unlock(); | |
2581 | ||
2582 | local_irq_restore(flags); | |
2583 | } | |
2584 | ||
8dc85d54 PZ |
2585 | /* |
2586 | * Called from scheduler to add the events of the current task | |
2587 | * with interrupts disabled. | |
2588 | * | |
2589 | * We restore the event value and then enable it. | |
2590 | * | |
2591 | * This does not protect us against NMI, but enable() | |
2592 | * sets the enabled bit in the control field of event _before_ | |
2593 | * accessing the event control register. If a NMI hits, then it will | |
2594 | * keep the event running. | |
2595 | */ | |
ab0cce56 JO |
2596 | void __perf_event_task_sched_in(struct task_struct *prev, |
2597 | struct task_struct *task) | |
8dc85d54 PZ |
2598 | { |
2599 | struct perf_event_context *ctx; | |
2600 | int ctxn; | |
2601 | ||
2602 | for_each_task_context_nr(ctxn) { | |
2603 | ctx = task->perf_event_ctxp[ctxn]; | |
2604 | if (likely(!ctx)) | |
2605 | continue; | |
2606 | ||
e5d1367f | 2607 | perf_event_context_sched_in(ctx, task); |
8dc85d54 | 2608 | } |
e5d1367f SE |
2609 | /* |
2610 | * if cgroup events exist on this CPU, then we need | |
2611 | * to check if we have to switch in PMU state. | |
2612 | * cgroup event are system-wide mode only | |
2613 | */ | |
2614 | if (atomic_read(&__get_cpu_var(perf_cgroup_events))) | |
a8d757ef | 2615 | perf_cgroup_sched_in(prev, task); |
d010b332 SE |
2616 | |
2617 | /* check for system-wide branch_stack events */ | |
2618 | if (atomic_read(&__get_cpu_var(perf_branch_stack_events))) | |
2619 | perf_branch_stack_sched_in(prev, task); | |
235c7fc7 IM |
2620 | } |
2621 | ||
abd50713 PZ |
2622 | static u64 perf_calculate_period(struct perf_event *event, u64 nsec, u64 count) |
2623 | { | |
2624 | u64 frequency = event->attr.sample_freq; | |
2625 | u64 sec = NSEC_PER_SEC; | |
2626 | u64 divisor, dividend; | |
2627 | ||
2628 | int count_fls, nsec_fls, frequency_fls, sec_fls; | |
2629 | ||
2630 | count_fls = fls64(count); | |
2631 | nsec_fls = fls64(nsec); | |
2632 | frequency_fls = fls64(frequency); | |
2633 | sec_fls = 30; | |
2634 | ||
2635 | /* | |
2636 | * We got @count in @nsec, with a target of sample_freq HZ | |
2637 | * the target period becomes: | |
2638 | * | |
2639 | * @count * 10^9 | |
2640 | * period = ------------------- | |
2641 | * @nsec * sample_freq | |
2642 | * | |
2643 | */ | |
2644 | ||
2645 | /* | |
2646 | * Reduce accuracy by one bit such that @a and @b converge | |
2647 | * to a similar magnitude. | |
2648 | */ | |
fe4b04fa | 2649 | #define REDUCE_FLS(a, b) \ |
abd50713 PZ |
2650 | do { \ |
2651 | if (a##_fls > b##_fls) { \ | |
2652 | a >>= 1; \ | |
2653 | a##_fls--; \ | |
2654 | } else { \ | |
2655 | b >>= 1; \ | |
2656 | b##_fls--; \ | |
2657 | } \ | |
2658 | } while (0) | |
2659 | ||
2660 | /* | |
2661 | * Reduce accuracy until either term fits in a u64, then proceed with | |
2662 | * the other, so that finally we can do a u64/u64 division. | |
2663 | */ | |
2664 | while (count_fls + sec_fls > 64 && nsec_fls + frequency_fls > 64) { | |
2665 | REDUCE_FLS(nsec, frequency); | |
2666 | REDUCE_FLS(sec, count); | |
2667 | } | |
2668 | ||
2669 | if (count_fls + sec_fls > 64) { | |
2670 | divisor = nsec * frequency; | |
2671 | ||
2672 | while (count_fls + sec_fls > 64) { | |
2673 | REDUCE_FLS(count, sec); | |
2674 | divisor >>= 1; | |
2675 | } | |
2676 | ||
2677 | dividend = count * sec; | |
2678 | } else { | |
2679 | dividend = count * sec; | |
2680 | ||
2681 | while (nsec_fls + frequency_fls > 64) { | |
2682 | REDUCE_FLS(nsec, frequency); | |
2683 | dividend >>= 1; | |
2684 | } | |
2685 | ||
2686 | divisor = nsec * frequency; | |
2687 | } | |
2688 | ||
f6ab91ad PZ |
2689 | if (!divisor) |
2690 | return dividend; | |
2691 | ||
abd50713 PZ |
2692 | return div64_u64(dividend, divisor); |
2693 | } | |
2694 | ||
e050e3f0 SE |
2695 | static DEFINE_PER_CPU(int, perf_throttled_count); |
2696 | static DEFINE_PER_CPU(u64, perf_throttled_seq); | |
2697 | ||
f39d47ff | 2698 | static void perf_adjust_period(struct perf_event *event, u64 nsec, u64 count, bool disable) |
bd2b5b12 | 2699 | { |
cdd6c482 | 2700 | struct hw_perf_event *hwc = &event->hw; |
f6ab91ad | 2701 | s64 period, sample_period; |
bd2b5b12 PZ |
2702 | s64 delta; |
2703 | ||
abd50713 | 2704 | period = perf_calculate_period(event, nsec, count); |
bd2b5b12 PZ |
2705 | |
2706 | delta = (s64)(period - hwc->sample_period); | |
2707 | delta = (delta + 7) / 8; /* low pass filter */ | |
2708 | ||
2709 | sample_period = hwc->sample_period + delta; | |
2710 | ||
2711 | if (!sample_period) | |
2712 | sample_period = 1; | |
2713 | ||
bd2b5b12 | 2714 | hwc->sample_period = sample_period; |
abd50713 | 2715 | |
e7850595 | 2716 | if (local64_read(&hwc->period_left) > 8*sample_period) { |
f39d47ff SE |
2717 | if (disable) |
2718 | event->pmu->stop(event, PERF_EF_UPDATE); | |
2719 | ||
e7850595 | 2720 | local64_set(&hwc->period_left, 0); |
f39d47ff SE |
2721 | |
2722 | if (disable) | |
2723 | event->pmu->start(event, PERF_EF_RELOAD); | |
abd50713 | 2724 | } |
bd2b5b12 PZ |
2725 | } |
2726 | ||
e050e3f0 SE |
2727 | /* |
2728 | * combine freq adjustment with unthrottling to avoid two passes over the | |
2729 | * events. At the same time, make sure, having freq events does not change | |
2730 | * the rate of unthrottling as that would introduce bias. | |
2731 | */ | |
2732 | static void perf_adjust_freq_unthr_context(struct perf_event_context *ctx, | |
2733 | int needs_unthr) | |
60db5e09 | 2734 | { |
cdd6c482 IM |
2735 | struct perf_event *event; |
2736 | struct hw_perf_event *hwc; | |
e050e3f0 | 2737 | u64 now, period = TICK_NSEC; |
abd50713 | 2738 | s64 delta; |
60db5e09 | 2739 | |
e050e3f0 SE |
2740 | /* |
2741 | * only need to iterate over all events iff: | |
2742 | * - context have events in frequency mode (needs freq adjust) | |
2743 | * - there are events to unthrottle on this cpu | |
2744 | */ | |
2745 | if (!(ctx->nr_freq || needs_unthr)) | |
0f5a2601 PZ |
2746 | return; |
2747 | ||
e050e3f0 | 2748 | raw_spin_lock(&ctx->lock); |
f39d47ff | 2749 | perf_pmu_disable(ctx->pmu); |
e050e3f0 | 2750 | |
03541f8b | 2751 | list_for_each_entry_rcu(event, &ctx->event_list, event_entry) { |
cdd6c482 | 2752 | if (event->state != PERF_EVENT_STATE_ACTIVE) |
60db5e09 PZ |
2753 | continue; |
2754 | ||
5632ab12 | 2755 | if (!event_filter_match(event)) |
5d27c23d PZ |
2756 | continue; |
2757 | ||
44377277 AS |
2758 | perf_pmu_disable(event->pmu); |
2759 | ||
cdd6c482 | 2760 | hwc = &event->hw; |
6a24ed6c | 2761 | |
ae23bff1 | 2762 | if (hwc->interrupts == MAX_INTERRUPTS) { |
e050e3f0 | 2763 | hwc->interrupts = 0; |
cdd6c482 | 2764 | perf_log_throttle(event, 1); |
a4eaf7f1 | 2765 | event->pmu->start(event, 0); |
a78ac325 PZ |
2766 | } |
2767 | ||
cdd6c482 | 2768 | if (!event->attr.freq || !event->attr.sample_freq) |
44377277 | 2769 | goto next; |
60db5e09 | 2770 | |
e050e3f0 SE |
2771 | /* |
2772 | * stop the event and update event->count | |
2773 | */ | |
2774 | event->pmu->stop(event, PERF_EF_UPDATE); | |
2775 | ||
e7850595 | 2776 | now = local64_read(&event->count); |
abd50713 PZ |
2777 | delta = now - hwc->freq_count_stamp; |
2778 | hwc->freq_count_stamp = now; | |
60db5e09 | 2779 | |
e050e3f0 SE |
2780 | /* |
2781 | * restart the event | |
2782 | * reload only if value has changed | |
f39d47ff SE |
2783 | * we have stopped the event so tell that |
2784 | * to perf_adjust_period() to avoid stopping it | |
2785 | * twice. | |
e050e3f0 | 2786 | */ |
abd50713 | 2787 | if (delta > 0) |
f39d47ff | 2788 | perf_adjust_period(event, period, delta, false); |
e050e3f0 SE |
2789 | |
2790 | event->pmu->start(event, delta > 0 ? PERF_EF_RELOAD : 0); | |
44377277 AS |
2791 | next: |
2792 | perf_pmu_enable(event->pmu); | |
60db5e09 | 2793 | } |
e050e3f0 | 2794 | |
f39d47ff | 2795 | perf_pmu_enable(ctx->pmu); |
e050e3f0 | 2796 | raw_spin_unlock(&ctx->lock); |
60db5e09 PZ |
2797 | } |
2798 | ||
235c7fc7 | 2799 | /* |
cdd6c482 | 2800 | * Round-robin a context's events: |
235c7fc7 | 2801 | */ |
cdd6c482 | 2802 | static void rotate_ctx(struct perf_event_context *ctx) |
0793a61d | 2803 | { |
dddd3379 TG |
2804 | /* |
2805 | * Rotate the first entry last of non-pinned groups. Rotation might be | |
2806 | * disabled by the inheritance code. | |
2807 | */ | |
2808 | if (!ctx->rotate_disable) | |
2809 | list_rotate_left(&ctx->flexible_groups); | |
235c7fc7 IM |
2810 | } |
2811 | ||
b5ab4cd5 | 2812 | /* |
e9d2b064 PZ |
2813 | * perf_pmu_rotate_start() and perf_rotate_context() are fully serialized |
2814 | * because they're strictly cpu affine and rotate_start is called with IRQs | |
2815 | * disabled, while rotate_context is called from IRQ context. | |
b5ab4cd5 | 2816 | */ |
9e630205 | 2817 | static int perf_rotate_context(struct perf_cpu_context *cpuctx) |
235c7fc7 | 2818 | { |
8dc85d54 | 2819 | struct perf_event_context *ctx = NULL; |
e050e3f0 | 2820 | int rotate = 0, remove = 1; |
7fc23a53 | 2821 | |
b5ab4cd5 | 2822 | if (cpuctx->ctx.nr_events) { |
e9d2b064 | 2823 | remove = 0; |
b5ab4cd5 PZ |
2824 | if (cpuctx->ctx.nr_events != cpuctx->ctx.nr_active) |
2825 | rotate = 1; | |
2826 | } | |
235c7fc7 | 2827 | |
8dc85d54 | 2828 | ctx = cpuctx->task_ctx; |
b5ab4cd5 | 2829 | if (ctx && ctx->nr_events) { |
e9d2b064 | 2830 | remove = 0; |
b5ab4cd5 PZ |
2831 | if (ctx->nr_events != ctx->nr_active) |
2832 | rotate = 1; | |
2833 | } | |
9717e6cd | 2834 | |
e050e3f0 | 2835 | if (!rotate) |
0f5a2601 PZ |
2836 | goto done; |
2837 | ||
facc4307 | 2838 | perf_ctx_lock(cpuctx, cpuctx->task_ctx); |
1b9a644f | 2839 | perf_pmu_disable(cpuctx->ctx.pmu); |
60db5e09 | 2840 | |
e050e3f0 SE |
2841 | cpu_ctx_sched_out(cpuctx, EVENT_FLEXIBLE); |
2842 | if (ctx) | |
2843 | ctx_sched_out(ctx, cpuctx, EVENT_FLEXIBLE); | |
0793a61d | 2844 | |
e050e3f0 SE |
2845 | rotate_ctx(&cpuctx->ctx); |
2846 | if (ctx) | |
2847 | rotate_ctx(ctx); | |
235c7fc7 | 2848 | |
e050e3f0 | 2849 | perf_event_sched_in(cpuctx, ctx, current); |
235c7fc7 | 2850 | |
0f5a2601 PZ |
2851 | perf_pmu_enable(cpuctx->ctx.pmu); |
2852 | perf_ctx_unlock(cpuctx, cpuctx->task_ctx); | |
b5ab4cd5 | 2853 | done: |
e9d2b064 PZ |
2854 | if (remove) |
2855 | list_del_init(&cpuctx->rotation_list); | |
9e630205 SE |
2856 | |
2857 | return rotate; | |
e9d2b064 PZ |
2858 | } |
2859 | ||
026249ef FW |
2860 | #ifdef CONFIG_NO_HZ_FULL |
2861 | bool perf_event_can_stop_tick(void) | |
2862 | { | |
948b26b6 | 2863 | if (atomic_read(&nr_freq_events) || |
d84153d6 | 2864 | __this_cpu_read(perf_throttled_count)) |
026249ef | 2865 | return false; |
d84153d6 FW |
2866 | else |
2867 | return true; | |
026249ef FW |
2868 | } |
2869 | #endif | |
2870 | ||
e9d2b064 PZ |
2871 | void perf_event_task_tick(void) |
2872 | { | |
2873 | struct list_head *head = &__get_cpu_var(rotation_list); | |
2874 | struct perf_cpu_context *cpuctx, *tmp; | |
e050e3f0 SE |
2875 | struct perf_event_context *ctx; |
2876 | int throttled; | |
b5ab4cd5 | 2877 | |
e9d2b064 PZ |
2878 | WARN_ON(!irqs_disabled()); |
2879 | ||
e050e3f0 SE |
2880 | __this_cpu_inc(perf_throttled_seq); |
2881 | throttled = __this_cpu_xchg(perf_throttled_count, 0); | |
2882 | ||
e9d2b064 | 2883 | list_for_each_entry_safe(cpuctx, tmp, head, rotation_list) { |
e050e3f0 SE |
2884 | ctx = &cpuctx->ctx; |
2885 | perf_adjust_freq_unthr_context(ctx, throttled); | |
2886 | ||
2887 | ctx = cpuctx->task_ctx; | |
2888 | if (ctx) | |
2889 | perf_adjust_freq_unthr_context(ctx, throttled); | |
e9d2b064 | 2890 | } |
0793a61d TG |
2891 | } |
2892 | ||
889ff015 FW |
2893 | static int event_enable_on_exec(struct perf_event *event, |
2894 | struct perf_event_context *ctx) | |
2895 | { | |
2896 | if (!event->attr.enable_on_exec) | |
2897 | return 0; | |
2898 | ||
2899 | event->attr.enable_on_exec = 0; | |
2900 | if (event->state >= PERF_EVENT_STATE_INACTIVE) | |
2901 | return 0; | |
2902 | ||
1d9b482e | 2903 | __perf_event_mark_enabled(event); |
889ff015 FW |
2904 | |
2905 | return 1; | |
2906 | } | |
2907 | ||
57e7986e | 2908 | /* |
cdd6c482 | 2909 | * Enable all of a task's events that have been marked enable-on-exec. |
57e7986e PM |
2910 | * This expects task == current. |
2911 | */ | |
8dc85d54 | 2912 | static void perf_event_enable_on_exec(struct perf_event_context *ctx) |
57e7986e | 2913 | { |
cdd6c482 | 2914 | struct perf_event *event; |
57e7986e PM |
2915 | unsigned long flags; |
2916 | int enabled = 0; | |
889ff015 | 2917 | int ret; |
57e7986e PM |
2918 | |
2919 | local_irq_save(flags); | |
cdd6c482 | 2920 | if (!ctx || !ctx->nr_events) |
57e7986e PM |
2921 | goto out; |
2922 | ||
e566b76e SE |
2923 | /* |
2924 | * We must ctxsw out cgroup events to avoid conflict | |
2925 | * when invoking perf_task_event_sched_in() later on | |
2926 | * in this function. Otherwise we end up trying to | |
2927 | * ctxswin cgroup events which are already scheduled | |
2928 | * in. | |
2929 | */ | |
a8d757ef | 2930 | perf_cgroup_sched_out(current, NULL); |
57e7986e | 2931 | |
e625cce1 | 2932 | raw_spin_lock(&ctx->lock); |
04dc2dbb | 2933 | task_ctx_sched_out(ctx); |
57e7986e | 2934 | |
b79387ef | 2935 | list_for_each_entry(event, &ctx->event_list, event_entry) { |
889ff015 FW |
2936 | ret = event_enable_on_exec(event, ctx); |
2937 | if (ret) | |
2938 | enabled = 1; | |
57e7986e PM |
2939 | } |
2940 | ||
2941 | /* | |
cdd6c482 | 2942 | * Unclone this context if we enabled any event. |
57e7986e | 2943 | */ |
71a851b4 PZ |
2944 | if (enabled) |
2945 | unclone_ctx(ctx); | |
57e7986e | 2946 | |
e625cce1 | 2947 | raw_spin_unlock(&ctx->lock); |
57e7986e | 2948 | |
e566b76e SE |
2949 | /* |
2950 | * Also calls ctxswin for cgroup events, if any: | |
2951 | */ | |
e5d1367f | 2952 | perf_event_context_sched_in(ctx, ctx->task); |
9ed6060d | 2953 | out: |
57e7986e PM |
2954 | local_irq_restore(flags); |
2955 | } | |
2956 | ||
0793a61d | 2957 | /* |
cdd6c482 | 2958 | * Cross CPU call to read the hardware event |
0793a61d | 2959 | */ |
cdd6c482 | 2960 | static void __perf_event_read(void *info) |
0793a61d | 2961 | { |
cdd6c482 IM |
2962 | struct perf_event *event = info; |
2963 | struct perf_event_context *ctx = event->ctx; | |
108b02cf | 2964 | struct perf_cpu_context *cpuctx = __get_cpu_context(ctx); |
621a01ea | 2965 | |
e1ac3614 PM |
2966 | /* |
2967 | * If this is a task context, we need to check whether it is | |
2968 | * the current task context of this cpu. If not it has been | |
2969 | * scheduled out before the smp call arrived. In that case | |
cdd6c482 IM |
2970 | * event->count would have been updated to a recent sample |
2971 | * when the event was scheduled out. | |
e1ac3614 PM |
2972 | */ |
2973 | if (ctx->task && cpuctx->task_ctx != ctx) | |
2974 | return; | |
2975 | ||
e625cce1 | 2976 | raw_spin_lock(&ctx->lock); |
e5d1367f | 2977 | if (ctx->is_active) { |
542e72fc | 2978 | update_context_time(ctx); |
e5d1367f SE |
2979 | update_cgrp_time_from_event(event); |
2980 | } | |
cdd6c482 | 2981 | update_event_times(event); |
542e72fc PZ |
2982 | if (event->state == PERF_EVENT_STATE_ACTIVE) |
2983 | event->pmu->read(event); | |
e625cce1 | 2984 | raw_spin_unlock(&ctx->lock); |
0793a61d TG |
2985 | } |
2986 | ||
b5e58793 PZ |
2987 | static inline u64 perf_event_count(struct perf_event *event) |
2988 | { | |
e7850595 | 2989 | return local64_read(&event->count) + atomic64_read(&event->child_count); |
b5e58793 PZ |
2990 | } |
2991 | ||
cdd6c482 | 2992 | static u64 perf_event_read(struct perf_event *event) |
0793a61d TG |
2993 | { |
2994 | /* | |
cdd6c482 IM |
2995 | * If event is enabled and currently active on a CPU, update the |
2996 | * value in the event structure: | |
0793a61d | 2997 | */ |
cdd6c482 IM |
2998 | if (event->state == PERF_EVENT_STATE_ACTIVE) { |
2999 | smp_call_function_single(event->oncpu, | |
3000 | __perf_event_read, event, 1); | |
3001 | } else if (event->state == PERF_EVENT_STATE_INACTIVE) { | |
2b8988c9 PZ |
3002 | struct perf_event_context *ctx = event->ctx; |
3003 | unsigned long flags; | |
3004 | ||
e625cce1 | 3005 | raw_spin_lock_irqsave(&ctx->lock, flags); |
c530ccd9 SE |
3006 | /* |
3007 | * may read while context is not active | |
3008 | * (e.g., thread is blocked), in that case | |
3009 | * we cannot update context time | |
3010 | */ | |
e5d1367f | 3011 | if (ctx->is_active) { |
c530ccd9 | 3012 | update_context_time(ctx); |
e5d1367f SE |
3013 | update_cgrp_time_from_event(event); |
3014 | } | |
cdd6c482 | 3015 | update_event_times(event); |
e625cce1 | 3016 | raw_spin_unlock_irqrestore(&ctx->lock, flags); |
0793a61d TG |
3017 | } |
3018 | ||
b5e58793 | 3019 | return perf_event_count(event); |
0793a61d TG |
3020 | } |
3021 | ||
a63eaf34 | 3022 | /* |
cdd6c482 | 3023 | * Initialize the perf_event context in a task_struct: |
a63eaf34 | 3024 | */ |
eb184479 | 3025 | static void __perf_event_init_context(struct perf_event_context *ctx) |
a63eaf34 | 3026 | { |
e625cce1 | 3027 | raw_spin_lock_init(&ctx->lock); |
a63eaf34 | 3028 | mutex_init(&ctx->mutex); |
889ff015 FW |
3029 | INIT_LIST_HEAD(&ctx->pinned_groups); |
3030 | INIT_LIST_HEAD(&ctx->flexible_groups); | |
a63eaf34 PM |
3031 | INIT_LIST_HEAD(&ctx->event_list); |
3032 | atomic_set(&ctx->refcount, 1); | |
eb184479 PZ |
3033 | } |
3034 | ||
3035 | static struct perf_event_context * | |
3036 | alloc_perf_context(struct pmu *pmu, struct task_struct *task) | |
3037 | { | |
3038 | struct perf_event_context *ctx; | |
3039 | ||
3040 | ctx = kzalloc(sizeof(struct perf_event_context), GFP_KERNEL); | |
3041 | if (!ctx) | |
3042 | return NULL; | |
3043 | ||
3044 | __perf_event_init_context(ctx); | |
3045 | if (task) { | |
3046 | ctx->task = task; | |
3047 | get_task_struct(task); | |
0793a61d | 3048 | } |
eb184479 PZ |
3049 | ctx->pmu = pmu; |
3050 | ||
3051 | return ctx; | |
a63eaf34 PM |
3052 | } |
3053 | ||
2ebd4ffb MH |
3054 | static struct task_struct * |
3055 | find_lively_task_by_vpid(pid_t vpid) | |
3056 | { | |
3057 | struct task_struct *task; | |
3058 | int err; | |
0793a61d TG |
3059 | |
3060 | rcu_read_lock(); | |
2ebd4ffb | 3061 | if (!vpid) |
0793a61d TG |
3062 | task = current; |
3063 | else | |
2ebd4ffb | 3064 | task = find_task_by_vpid(vpid); |
0793a61d TG |
3065 | if (task) |
3066 | get_task_struct(task); | |
3067 | rcu_read_unlock(); | |
3068 | ||
3069 | if (!task) | |
3070 | return ERR_PTR(-ESRCH); | |
3071 | ||
0793a61d | 3072 | /* Reuse ptrace permission checks for now. */ |
c93f7669 PM |
3073 | err = -EACCES; |
3074 | if (!ptrace_may_access(task, PTRACE_MODE_READ)) | |
3075 | goto errout; | |
3076 | ||
2ebd4ffb MH |
3077 | return task; |
3078 | errout: | |
3079 | put_task_struct(task); | |
3080 | return ERR_PTR(err); | |
3081 | ||
3082 | } | |
3083 | ||
fe4b04fa PZ |
3084 | /* |
3085 | * Returns a matching context with refcount and pincount. | |
3086 | */ | |
108b02cf | 3087 | static struct perf_event_context * |
38a81da2 | 3088 | find_get_context(struct pmu *pmu, struct task_struct *task, int cpu) |
0793a61d | 3089 | { |
cdd6c482 | 3090 | struct perf_event_context *ctx; |
22a4f650 | 3091 | struct perf_cpu_context *cpuctx; |
25346b93 | 3092 | unsigned long flags; |
8dc85d54 | 3093 | int ctxn, err; |
0793a61d | 3094 | |
22a4ec72 | 3095 | if (!task) { |
cdd6c482 | 3096 | /* Must be root to operate on a CPU event: */ |
0764771d | 3097 | if (perf_paranoid_cpu() && !capable(CAP_SYS_ADMIN)) |
0793a61d TG |
3098 | return ERR_PTR(-EACCES); |
3099 | ||
0793a61d | 3100 | /* |
cdd6c482 | 3101 | * We could be clever and allow to attach a event to an |
0793a61d TG |
3102 | * offline CPU and activate it when the CPU comes up, but |
3103 | * that's for later. | |
3104 | */ | |
f6325e30 | 3105 | if (!cpu_online(cpu)) |
0793a61d TG |
3106 | return ERR_PTR(-ENODEV); |
3107 | ||
108b02cf | 3108 | cpuctx = per_cpu_ptr(pmu->pmu_cpu_context, cpu); |
0793a61d | 3109 | ctx = &cpuctx->ctx; |
c93f7669 | 3110 | get_ctx(ctx); |
fe4b04fa | 3111 | ++ctx->pin_count; |
0793a61d | 3112 | |
0793a61d TG |
3113 | return ctx; |
3114 | } | |
3115 | ||
8dc85d54 PZ |
3116 | err = -EINVAL; |
3117 | ctxn = pmu->task_ctx_nr; | |
3118 | if (ctxn < 0) | |
3119 | goto errout; | |
3120 | ||
9ed6060d | 3121 | retry: |
8dc85d54 | 3122 | ctx = perf_lock_task_context(task, ctxn, &flags); |
c93f7669 | 3123 | if (ctx) { |
71a851b4 | 3124 | unclone_ctx(ctx); |
fe4b04fa | 3125 | ++ctx->pin_count; |
e625cce1 | 3126 | raw_spin_unlock_irqrestore(&ctx->lock, flags); |
9137fb28 | 3127 | } else { |
eb184479 | 3128 | ctx = alloc_perf_context(pmu, task); |
c93f7669 PM |
3129 | err = -ENOMEM; |
3130 | if (!ctx) | |
3131 | goto errout; | |
eb184479 | 3132 | |
dbe08d82 ON |
3133 | err = 0; |
3134 | mutex_lock(&task->perf_event_mutex); | |
3135 | /* | |
3136 | * If it has already passed perf_event_exit_task(). | |
3137 | * we must see PF_EXITING, it takes this mutex too. | |
3138 | */ | |
3139 | if (task->flags & PF_EXITING) | |
3140 | err = -ESRCH; | |
3141 | else if (task->perf_event_ctxp[ctxn]) | |
3142 | err = -EAGAIN; | |
fe4b04fa | 3143 | else { |
9137fb28 | 3144 | get_ctx(ctx); |
fe4b04fa | 3145 | ++ctx->pin_count; |
dbe08d82 | 3146 | rcu_assign_pointer(task->perf_event_ctxp[ctxn], ctx); |
fe4b04fa | 3147 | } |
dbe08d82 ON |
3148 | mutex_unlock(&task->perf_event_mutex); |
3149 | ||
3150 | if (unlikely(err)) { | |
9137fb28 | 3151 | put_ctx(ctx); |
dbe08d82 ON |
3152 | |
3153 | if (err == -EAGAIN) | |
3154 | goto retry; | |
3155 | goto errout; | |
a63eaf34 PM |
3156 | } |
3157 | } | |
3158 | ||
0793a61d | 3159 | return ctx; |
c93f7669 | 3160 | |
9ed6060d | 3161 | errout: |
c93f7669 | 3162 | return ERR_PTR(err); |
0793a61d TG |
3163 | } |
3164 | ||
6fb2915d LZ |
3165 | static void perf_event_free_filter(struct perf_event *event); |
3166 | ||
cdd6c482 | 3167 | static void free_event_rcu(struct rcu_head *head) |
592903cd | 3168 | { |
cdd6c482 | 3169 | struct perf_event *event; |
592903cd | 3170 | |
cdd6c482 IM |
3171 | event = container_of(head, struct perf_event, rcu_head); |
3172 | if (event->ns) | |
3173 | put_pid_ns(event->ns); | |
6fb2915d | 3174 | perf_event_free_filter(event); |
cdd6c482 | 3175 | kfree(event); |
592903cd PZ |
3176 | } |
3177 | ||
76369139 | 3178 | static void ring_buffer_put(struct ring_buffer *rb); |
9bb5d40c | 3179 | static void ring_buffer_detach(struct perf_event *event, struct ring_buffer *rb); |
925d519a | 3180 | |
4beb31f3 | 3181 | static void unaccount_event_cpu(struct perf_event *event, int cpu) |
f1600952 | 3182 | { |
4beb31f3 FW |
3183 | if (event->parent) |
3184 | return; | |
3185 | ||
3186 | if (has_branch_stack(event)) { | |
3187 | if (!(event->attach_state & PERF_ATTACH_TASK)) | |
3188 | atomic_dec(&per_cpu(perf_branch_stack_events, cpu)); | |
3189 | } | |
3190 | if (is_cgroup_event(event)) | |
3191 | atomic_dec(&per_cpu(perf_cgroup_events, cpu)); | |
3192 | } | |
925d519a | 3193 | |
4beb31f3 FW |
3194 | static void unaccount_event(struct perf_event *event) |
3195 | { | |
3196 | if (event->parent) | |
3197 | return; | |
3198 | ||
3199 | if (event->attach_state & PERF_ATTACH_TASK) | |
3200 | static_key_slow_dec_deferred(&perf_sched_events); | |
3201 | if (event->attr.mmap || event->attr.mmap_data) | |
3202 | atomic_dec(&nr_mmap_events); | |
3203 | if (event->attr.comm) | |
3204 | atomic_dec(&nr_comm_events); | |
3205 | if (event->attr.task) | |
3206 | atomic_dec(&nr_task_events); | |
948b26b6 FW |
3207 | if (event->attr.freq) |
3208 | atomic_dec(&nr_freq_events); | |
4beb31f3 FW |
3209 | if (is_cgroup_event(event)) |
3210 | static_key_slow_dec_deferred(&perf_sched_events); | |
3211 | if (has_branch_stack(event)) | |
3212 | static_key_slow_dec_deferred(&perf_sched_events); | |
3213 | ||
3214 | unaccount_event_cpu(event, event->cpu); | |
3215 | } | |
925d519a | 3216 | |
766d6c07 FW |
3217 | static void __free_event(struct perf_event *event) |
3218 | { | |
cdd6c482 | 3219 | if (!event->parent) { |
927c7a9e FW |
3220 | if (event->attr.sample_type & PERF_SAMPLE_CALLCHAIN) |
3221 | put_callchain_buffers(); | |
f344011c | 3222 | } |
9ee318a7 | 3223 | |
766d6c07 FW |
3224 | if (event->destroy) |
3225 | event->destroy(event); | |
3226 | ||
3227 | if (event->ctx) | |
3228 | put_ctx(event->ctx); | |
3229 | ||
3230 | call_rcu(&event->rcu_head, free_event_rcu); | |
3231 | } | |
cdd6c482 | 3232 | static void free_event(struct perf_event *event) |
f1600952 | 3233 | { |
e360adbe | 3234 | irq_work_sync(&event->pending); |
925d519a | 3235 | |
4beb31f3 | 3236 | unaccount_event(event); |
9ee318a7 | 3237 | |
76369139 | 3238 | if (event->rb) { |
9bb5d40c PZ |
3239 | struct ring_buffer *rb; |
3240 | ||
3241 | /* | |
3242 | * Can happen when we close an event with re-directed output. | |
3243 | * | |
3244 | * Since we have a 0 refcount, perf_mmap_close() will skip | |
3245 | * over us; possibly making our ring_buffer_put() the last. | |
3246 | */ | |
3247 | mutex_lock(&event->mmap_mutex); | |
3248 | rb = event->rb; | |
3249 | if (rb) { | |
3250 | rcu_assign_pointer(event->rb, NULL); | |
3251 | ring_buffer_detach(event, rb); | |
3252 | ring_buffer_put(rb); /* could be last */ | |
3253 | } | |
3254 | mutex_unlock(&event->mmap_mutex); | |
a4be7c27 PZ |
3255 | } |
3256 | ||
e5d1367f SE |
3257 | if (is_cgroup_event(event)) |
3258 | perf_detach_cgroup(event); | |
3259 | ||
0c67b408 | 3260 | |
766d6c07 | 3261 | __free_event(event); |
f1600952 PZ |
3262 | } |
3263 | ||
a66a3052 | 3264 | int perf_event_release_kernel(struct perf_event *event) |
0793a61d | 3265 | { |
cdd6c482 | 3266 | struct perf_event_context *ctx = event->ctx; |
0793a61d | 3267 | |
ad3a37de | 3268 | WARN_ON_ONCE(ctx->parent_ctx); |
a0507c84 PZ |
3269 | /* |
3270 | * There are two ways this annotation is useful: | |
3271 | * | |
3272 | * 1) there is a lock recursion from perf_event_exit_task | |
3273 | * see the comment there. | |
3274 | * | |
3275 | * 2) there is a lock-inversion with mmap_sem through | |
3276 | * perf_event_read_group(), which takes faults while | |
3277 | * holding ctx->mutex, however this is called after | |
3278 | * the last filedesc died, so there is no possibility | |
3279 | * to trigger the AB-BA case. | |
3280 | */ | |
3281 | mutex_lock_nested(&ctx->mutex, SINGLE_DEPTH_NESTING); | |
050735b0 | 3282 | raw_spin_lock_irq(&ctx->lock); |
8a49542c | 3283 | perf_group_detach(event); |
050735b0 | 3284 | raw_spin_unlock_irq(&ctx->lock); |
e03a9a55 | 3285 | perf_remove_from_context(event); |
d859e29f | 3286 | mutex_unlock(&ctx->mutex); |
0793a61d | 3287 | |
cdd6c482 | 3288 | free_event(event); |
0793a61d TG |
3289 | |
3290 | return 0; | |
3291 | } | |
a66a3052 | 3292 | EXPORT_SYMBOL_GPL(perf_event_release_kernel); |
0793a61d | 3293 | |
a66a3052 PZ |
3294 | /* |
3295 | * Called when the last reference to the file is gone. | |
3296 | */ | |
a6fa941d | 3297 | static void put_event(struct perf_event *event) |
fb0459d7 | 3298 | { |
8882135b | 3299 | struct task_struct *owner; |
fb0459d7 | 3300 | |
a6fa941d AV |
3301 | if (!atomic_long_dec_and_test(&event->refcount)) |
3302 | return; | |
fb0459d7 | 3303 | |
8882135b PZ |
3304 | rcu_read_lock(); |
3305 | owner = ACCESS_ONCE(event->owner); | |
3306 | /* | |
3307 | * Matches the smp_wmb() in perf_event_exit_task(). If we observe | |
3308 | * !owner it means the list deletion is complete and we can indeed | |
3309 | * free this event, otherwise we need to serialize on | |
3310 | * owner->perf_event_mutex. | |
3311 | */ | |
3312 | smp_read_barrier_depends(); | |
3313 | if (owner) { | |
3314 | /* | |
3315 | * Since delayed_put_task_struct() also drops the last | |
3316 | * task reference we can safely take a new reference | |
3317 | * while holding the rcu_read_lock(). | |
3318 | */ | |
3319 | get_task_struct(owner); | |
3320 | } | |
3321 | rcu_read_unlock(); | |
3322 | ||
3323 | if (owner) { | |
3324 | mutex_lock(&owner->perf_event_mutex); | |
3325 | /* | |
3326 | * We have to re-check the event->owner field, if it is cleared | |
3327 | * we raced with perf_event_exit_task(), acquiring the mutex | |
3328 | * ensured they're done, and we can proceed with freeing the | |
3329 | * event. | |
3330 | */ | |
3331 | if (event->owner) | |
3332 | list_del_init(&event->owner_entry); | |
3333 | mutex_unlock(&owner->perf_event_mutex); | |
3334 | put_task_struct(owner); | |
3335 | } | |
3336 | ||
a6fa941d AV |
3337 | perf_event_release_kernel(event); |
3338 | } | |
3339 | ||
3340 | static int perf_release(struct inode *inode, struct file *file) | |
3341 | { | |
3342 | put_event(file->private_data); | |
3343 | return 0; | |
fb0459d7 | 3344 | } |
fb0459d7 | 3345 | |
59ed446f | 3346 | u64 perf_event_read_value(struct perf_event *event, u64 *enabled, u64 *running) |
e53c0994 | 3347 | { |
cdd6c482 | 3348 | struct perf_event *child; |
e53c0994 PZ |
3349 | u64 total = 0; |
3350 | ||
59ed446f PZ |
3351 | *enabled = 0; |
3352 | *running = 0; | |
3353 | ||
6f10581a | 3354 | mutex_lock(&event->child_mutex); |
cdd6c482 | 3355 | total += perf_event_read(event); |
59ed446f PZ |
3356 | *enabled += event->total_time_enabled + |
3357 | atomic64_read(&event->child_total_time_enabled); | |
3358 | *running += event->total_time_running + | |
3359 | atomic64_read(&event->child_total_time_running); | |
3360 | ||
3361 | list_for_each_entry(child, &event->child_list, child_list) { | |
cdd6c482 | 3362 | total += perf_event_read(child); |
59ed446f PZ |
3363 | *enabled += child->total_time_enabled; |
3364 | *running += child->total_time_running; | |
3365 | } | |
6f10581a | 3366 | mutex_unlock(&event->child_mutex); |
e53c0994 PZ |
3367 | |
3368 | return total; | |
3369 | } | |
fb0459d7 | 3370 | EXPORT_SYMBOL_GPL(perf_event_read_value); |
e53c0994 | 3371 | |
cdd6c482 | 3372 | static int perf_event_read_group(struct perf_event *event, |
3dab77fb PZ |
3373 | u64 read_format, char __user *buf) |
3374 | { | |
cdd6c482 | 3375 | struct perf_event *leader = event->group_leader, *sub; |
6f10581a PZ |
3376 | int n = 0, size = 0, ret = -EFAULT; |
3377 | struct perf_event_context *ctx = leader->ctx; | |
abf4868b | 3378 | u64 values[5]; |
59ed446f | 3379 | u64 count, enabled, running; |
abf4868b | 3380 | |
6f10581a | 3381 | mutex_lock(&ctx->mutex); |
59ed446f | 3382 | count = perf_event_read_value(leader, &enabled, &running); |
3dab77fb PZ |
3383 | |
3384 | values[n++] = 1 + leader->nr_siblings; | |
59ed446f PZ |
3385 | if (read_format & PERF_FORMAT_TOTAL_TIME_ENABLED) |
3386 | values[n++] = enabled; | |
3387 | if (read_format & PERF_FORMAT_TOTAL_TIME_RUNNING) | |
3388 | values[n++] = running; | |
abf4868b PZ |
3389 | values[n++] = count; |
3390 | if (read_format & PERF_FORMAT_ID) | |
3391 | values[n++] = primary_event_id(leader); | |
3dab77fb PZ |
3392 | |
3393 | size = n * sizeof(u64); | |
3394 | ||
3395 | if (copy_to_user(buf, values, size)) | |
6f10581a | 3396 | goto unlock; |
3dab77fb | 3397 | |
6f10581a | 3398 | ret = size; |
3dab77fb | 3399 | |
65abc865 | 3400 | list_for_each_entry(sub, &leader->sibling_list, group_entry) { |
abf4868b | 3401 | n = 0; |
3dab77fb | 3402 | |
59ed446f | 3403 | values[n++] = perf_event_read_value(sub, &enabled, &running); |
abf4868b PZ |
3404 | if (read_format & PERF_FORMAT_ID) |
3405 | values[n++] = primary_event_id(sub); | |
3406 | ||
3407 | size = n * sizeof(u64); | |
3408 | ||
184d3da8 | 3409 | if (copy_to_user(buf + ret, values, size)) { |
6f10581a PZ |
3410 | ret = -EFAULT; |
3411 | goto unlock; | |
3412 | } | |
abf4868b PZ |
3413 | |
3414 | ret += size; | |
3dab77fb | 3415 | } |
6f10581a PZ |
3416 | unlock: |
3417 | mutex_unlock(&ctx->mutex); | |
3dab77fb | 3418 | |
abf4868b | 3419 | return ret; |
3dab77fb PZ |
3420 | } |
3421 | ||
cdd6c482 | 3422 | static int perf_event_read_one(struct perf_event *event, |
3dab77fb PZ |
3423 | u64 read_format, char __user *buf) |
3424 | { | |
59ed446f | 3425 | u64 enabled, running; |
3dab77fb PZ |
3426 | u64 values[4]; |
3427 | int n = 0; | |
3428 | ||
59ed446f PZ |
3429 | values[n++] = perf_event_read_value(event, &enabled, &running); |
3430 | if (read_format & PERF_FORMAT_TOTAL_TIME_ENABLED) | |
3431 | values[n++] = enabled; | |
3432 | if (read_format & PERF_FORMAT_TOTAL_TIME_RUNNING) | |
3433 | values[n++] = running; | |
3dab77fb | 3434 | if (read_format & PERF_FORMAT_ID) |
cdd6c482 | 3435 | values[n++] = primary_event_id(event); |
3dab77fb PZ |
3436 | |
3437 | if (copy_to_user(buf, values, n * sizeof(u64))) | |
3438 | return -EFAULT; | |
3439 | ||
3440 | return n * sizeof(u64); | |
3441 | } | |
3442 | ||
0793a61d | 3443 | /* |
cdd6c482 | 3444 | * Read the performance event - simple non blocking version for now |
0793a61d TG |
3445 | */ |
3446 | static ssize_t | |
cdd6c482 | 3447 | perf_read_hw(struct perf_event *event, char __user *buf, size_t count) |
0793a61d | 3448 | { |
cdd6c482 | 3449 | u64 read_format = event->attr.read_format; |
3dab77fb | 3450 | int ret; |
0793a61d | 3451 | |
3b6f9e5c | 3452 | /* |
cdd6c482 | 3453 | * Return end-of-file for a read on a event that is in |
3b6f9e5c PM |
3454 | * error state (i.e. because it was pinned but it couldn't be |
3455 | * scheduled on to the CPU at some point). | |
3456 | */ | |
cdd6c482 | 3457 | if (event->state == PERF_EVENT_STATE_ERROR) |
3b6f9e5c PM |
3458 | return 0; |
3459 | ||
c320c7b7 | 3460 | if (count < event->read_size) |
3dab77fb PZ |
3461 | return -ENOSPC; |
3462 | ||
cdd6c482 | 3463 | WARN_ON_ONCE(event->ctx->parent_ctx); |
3dab77fb | 3464 | if (read_format & PERF_FORMAT_GROUP) |
cdd6c482 | 3465 | ret = perf_event_read_group(event, read_format, buf); |
3dab77fb | 3466 | else |
cdd6c482 | 3467 | ret = perf_event_read_one(event, read_format, buf); |
0793a61d | 3468 | |
3dab77fb | 3469 | return ret; |
0793a61d TG |
3470 | } |
3471 | ||
0793a61d TG |
3472 | static ssize_t |
3473 | perf_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) | |
3474 | { | |
cdd6c482 | 3475 | struct perf_event *event = file->private_data; |
0793a61d | 3476 | |
cdd6c482 | 3477 | return perf_read_hw(event, buf, count); |
0793a61d TG |
3478 | } |
3479 | ||
3480 | static unsigned int perf_poll(struct file *file, poll_table *wait) | |
3481 | { | |
cdd6c482 | 3482 | struct perf_event *event = file->private_data; |
76369139 | 3483 | struct ring_buffer *rb; |
c33a0bc4 | 3484 | unsigned int events = POLL_HUP; |
c7138f37 | 3485 | |
10c6db11 | 3486 | /* |
9bb5d40c PZ |
3487 | * Pin the event->rb by taking event->mmap_mutex; otherwise |
3488 | * perf_event_set_output() can swizzle our rb and make us miss wakeups. | |
10c6db11 PZ |
3489 | */ |
3490 | mutex_lock(&event->mmap_mutex); | |
9bb5d40c PZ |
3491 | rb = event->rb; |
3492 | if (rb) | |
76369139 | 3493 | events = atomic_xchg(&rb->poll, 0); |
10c6db11 PZ |
3494 | mutex_unlock(&event->mmap_mutex); |
3495 | ||
cdd6c482 | 3496 | poll_wait(file, &event->waitq, wait); |
0793a61d | 3497 | |
0793a61d TG |
3498 | return events; |
3499 | } | |
3500 | ||
cdd6c482 | 3501 | static void perf_event_reset(struct perf_event *event) |
6de6a7b9 | 3502 | { |
cdd6c482 | 3503 | (void)perf_event_read(event); |
e7850595 | 3504 | local64_set(&event->count, 0); |
cdd6c482 | 3505 | perf_event_update_userpage(event); |
3df5edad PZ |
3506 | } |
3507 | ||
c93f7669 | 3508 | /* |
cdd6c482 IM |
3509 | * Holding the top-level event's child_mutex means that any |
3510 | * descendant process that has inherited this event will block | |
3511 | * in sync_child_event if it goes to exit, thus satisfying the | |
3512 | * task existence requirements of perf_event_enable/disable. | |
c93f7669 | 3513 | */ |
cdd6c482 IM |
3514 | static void perf_event_for_each_child(struct perf_event *event, |
3515 | void (*func)(struct perf_event *)) | |
3df5edad | 3516 | { |
cdd6c482 | 3517 | struct perf_event *child; |
3df5edad | 3518 | |
cdd6c482 IM |
3519 | WARN_ON_ONCE(event->ctx->parent_ctx); |
3520 | mutex_lock(&event->child_mutex); | |
3521 | func(event); | |
3522 | list_for_each_entry(child, &event->child_list, child_list) | |
3df5edad | 3523 | func(child); |
cdd6c482 | 3524 | mutex_unlock(&event->child_mutex); |
3df5edad PZ |
3525 | } |
3526 | ||
cdd6c482 IM |
3527 | static void perf_event_for_each(struct perf_event *event, |
3528 | void (*func)(struct perf_event *)) | |
3df5edad | 3529 | { |
cdd6c482 IM |
3530 | struct perf_event_context *ctx = event->ctx; |
3531 | struct perf_event *sibling; | |
3df5edad | 3532 | |
75f937f2 PZ |
3533 | WARN_ON_ONCE(ctx->parent_ctx); |
3534 | mutex_lock(&ctx->mutex); | |
cdd6c482 | 3535 | event = event->group_leader; |
75f937f2 | 3536 | |
cdd6c482 | 3537 | perf_event_for_each_child(event, func); |
cdd6c482 | 3538 | list_for_each_entry(sibling, &event->sibling_list, group_entry) |
724b6daa | 3539 | perf_event_for_each_child(sibling, func); |
75f937f2 | 3540 | mutex_unlock(&ctx->mutex); |
6de6a7b9 PZ |
3541 | } |
3542 | ||
cdd6c482 | 3543 | static int perf_event_period(struct perf_event *event, u64 __user *arg) |
08247e31 | 3544 | { |
cdd6c482 | 3545 | struct perf_event_context *ctx = event->ctx; |
bad7192b | 3546 | int ret = 0, active; |
08247e31 PZ |
3547 | u64 value; |
3548 | ||
6c7e550f | 3549 | if (!is_sampling_event(event)) |
08247e31 PZ |
3550 | return -EINVAL; |
3551 | ||
ad0cf347 | 3552 | if (copy_from_user(&value, arg, sizeof(value))) |
08247e31 PZ |
3553 | return -EFAULT; |
3554 | ||
3555 | if (!value) | |
3556 | return -EINVAL; | |
3557 | ||
e625cce1 | 3558 | raw_spin_lock_irq(&ctx->lock); |
cdd6c482 IM |
3559 | if (event->attr.freq) { |
3560 | if (value > sysctl_perf_event_sample_rate) { | |
08247e31 PZ |
3561 | ret = -EINVAL; |
3562 | goto unlock; | |
3563 | } | |
3564 | ||
cdd6c482 | 3565 | event->attr.sample_freq = value; |
08247e31 | 3566 | } else { |
cdd6c482 IM |
3567 | event->attr.sample_period = value; |
3568 | event->hw.sample_period = value; | |
08247e31 | 3569 | } |
bad7192b PZ |
3570 | |
3571 | active = (event->state == PERF_EVENT_STATE_ACTIVE); | |
3572 | if (active) { | |
3573 | perf_pmu_disable(ctx->pmu); | |
3574 | event->pmu->stop(event, PERF_EF_UPDATE); | |
3575 | } | |
3576 | ||
3577 | local64_set(&event->hw.period_left, 0); | |
3578 | ||
3579 | if (active) { | |
3580 | event->pmu->start(event, PERF_EF_RELOAD); | |
3581 | perf_pmu_enable(ctx->pmu); | |
3582 | } | |
3583 | ||
08247e31 | 3584 | unlock: |
e625cce1 | 3585 | raw_spin_unlock_irq(&ctx->lock); |
08247e31 PZ |
3586 | |
3587 | return ret; | |
3588 | } | |
3589 | ||
ac9721f3 PZ |
3590 | static const struct file_operations perf_fops; |
3591 | ||
2903ff01 | 3592 | static inline int perf_fget_light(int fd, struct fd *p) |
ac9721f3 | 3593 | { |
2903ff01 AV |
3594 | struct fd f = fdget(fd); |
3595 | if (!f.file) | |
3596 | return -EBADF; | |
ac9721f3 | 3597 | |
2903ff01 AV |
3598 | if (f.file->f_op != &perf_fops) { |
3599 | fdput(f); | |
3600 | return -EBADF; | |
ac9721f3 | 3601 | } |
2903ff01 AV |
3602 | *p = f; |
3603 | return 0; | |
ac9721f3 PZ |
3604 | } |
3605 | ||
3606 | static int perf_event_set_output(struct perf_event *event, | |
3607 | struct perf_event *output_event); | |
6fb2915d | 3608 | static int perf_event_set_filter(struct perf_event *event, void __user *arg); |
a4be7c27 | 3609 | |
d859e29f PM |
3610 | static long perf_ioctl(struct file *file, unsigned int cmd, unsigned long arg) |
3611 | { | |
cdd6c482 IM |
3612 | struct perf_event *event = file->private_data; |
3613 | void (*func)(struct perf_event *); | |
3df5edad | 3614 | u32 flags = arg; |
d859e29f PM |
3615 | |
3616 | switch (cmd) { | |
cdd6c482 IM |
3617 | case PERF_EVENT_IOC_ENABLE: |
3618 | func = perf_event_enable; | |
d859e29f | 3619 | break; |
cdd6c482 IM |
3620 | case PERF_EVENT_IOC_DISABLE: |
3621 | func = perf_event_disable; | |
79f14641 | 3622 | break; |
cdd6c482 IM |
3623 | case PERF_EVENT_IOC_RESET: |
3624 | func = perf_event_reset; | |
6de6a7b9 | 3625 | break; |
3df5edad | 3626 | |
cdd6c482 IM |
3627 | case PERF_EVENT_IOC_REFRESH: |
3628 | return perf_event_refresh(event, arg); | |
08247e31 | 3629 | |
cdd6c482 IM |
3630 | case PERF_EVENT_IOC_PERIOD: |
3631 | return perf_event_period(event, (u64 __user *)arg); | |
08247e31 | 3632 | |
cf4957f1 JO |
3633 | case PERF_EVENT_IOC_ID: |
3634 | { | |
3635 | u64 id = primary_event_id(event); | |
3636 | ||
3637 | if (copy_to_user((void __user *)arg, &id, sizeof(id))) | |
3638 | return -EFAULT; | |
3639 | return 0; | |
3640 | } | |
3641 | ||
cdd6c482 | 3642 | case PERF_EVENT_IOC_SET_OUTPUT: |
ac9721f3 | 3643 | { |
ac9721f3 | 3644 | int ret; |
ac9721f3 | 3645 | if (arg != -1) { |
2903ff01 AV |
3646 | struct perf_event *output_event; |
3647 | struct fd output; | |
3648 | ret = perf_fget_light(arg, &output); | |
3649 | if (ret) | |
3650 | return ret; | |
3651 | output_event = output.file->private_data; | |
3652 | ret = perf_event_set_output(event, output_event); | |
3653 | fdput(output); | |
3654 | } else { | |
3655 | ret = perf_event_set_output(event, NULL); | |
ac9721f3 | 3656 | } |
ac9721f3 PZ |
3657 | return ret; |
3658 | } | |
a4be7c27 | 3659 | |
6fb2915d LZ |
3660 | case PERF_EVENT_IOC_SET_FILTER: |
3661 | return perf_event_set_filter(event, (void __user *)arg); | |
3662 | ||
d859e29f | 3663 | default: |
3df5edad | 3664 | return -ENOTTY; |
d859e29f | 3665 | } |
3df5edad PZ |
3666 | |
3667 | if (flags & PERF_IOC_FLAG_GROUP) | |
cdd6c482 | 3668 | perf_event_for_each(event, func); |
3df5edad | 3669 | else |
cdd6c482 | 3670 | perf_event_for_each_child(event, func); |
3df5edad PZ |
3671 | |
3672 | return 0; | |
d859e29f PM |
3673 | } |
3674 | ||
cdd6c482 | 3675 | int perf_event_task_enable(void) |
771d7cde | 3676 | { |
cdd6c482 | 3677 | struct perf_event *event; |
771d7cde | 3678 | |
cdd6c482 IM |
3679 | mutex_lock(¤t->perf_event_mutex); |
3680 | list_for_each_entry(event, ¤t->perf_event_list, owner_entry) | |
3681 | perf_event_for_each_child(event, perf_event_enable); | |
3682 | mutex_unlock(¤t->perf_event_mutex); | |
771d7cde PZ |
3683 | |
3684 | return 0; | |
3685 | } | |
3686 | ||
cdd6c482 | 3687 | int perf_event_task_disable(void) |
771d7cde | 3688 | { |
cdd6c482 | 3689 | struct perf_event *event; |
771d7cde | 3690 | |
cdd6c482 IM |
3691 | mutex_lock(¤t->perf_event_mutex); |
3692 | list_for_each_entry(event, ¤t->perf_event_list, owner_entry) | |
3693 | perf_event_for_each_child(event, perf_event_disable); | |
3694 | mutex_unlock(¤t->perf_event_mutex); | |
771d7cde PZ |
3695 | |
3696 | return 0; | |
3697 | } | |
3698 | ||
cdd6c482 | 3699 | static int perf_event_index(struct perf_event *event) |
194002b2 | 3700 | { |
a4eaf7f1 PZ |
3701 | if (event->hw.state & PERF_HES_STOPPED) |
3702 | return 0; | |
3703 | ||
cdd6c482 | 3704 | if (event->state != PERF_EVENT_STATE_ACTIVE) |
194002b2 PZ |
3705 | return 0; |
3706 | ||
35edc2a5 | 3707 | return event->pmu->event_idx(event); |
194002b2 PZ |
3708 | } |
3709 | ||
c4794295 | 3710 | static void calc_timer_values(struct perf_event *event, |
e3f3541c | 3711 | u64 *now, |
7f310a5d EM |
3712 | u64 *enabled, |
3713 | u64 *running) | |
c4794295 | 3714 | { |
e3f3541c | 3715 | u64 ctx_time; |
c4794295 | 3716 | |
e3f3541c PZ |
3717 | *now = perf_clock(); |
3718 | ctx_time = event->shadow_ctx_time + *now; | |
c4794295 EM |
3719 | *enabled = ctx_time - event->tstamp_enabled; |
3720 | *running = ctx_time - event->tstamp_running; | |
3721 | } | |
3722 | ||
fa731587 PZ |
3723 | static void perf_event_init_userpage(struct perf_event *event) |
3724 | { | |
3725 | struct perf_event_mmap_page *userpg; | |
3726 | struct ring_buffer *rb; | |
3727 | ||
3728 | rcu_read_lock(); | |
3729 | rb = rcu_dereference(event->rb); | |
3730 | if (!rb) | |
3731 | goto unlock; | |
3732 | ||
3733 | userpg = rb->user_page; | |
3734 | ||
3735 | /* Allow new userspace to detect that bit 0 is deprecated */ | |
3736 | userpg->cap_bit0_is_deprecated = 1; | |
3737 | userpg->size = offsetof(struct perf_event_mmap_page, __reserved); | |
3738 | ||
3739 | unlock: | |
3740 | rcu_read_unlock(); | |
3741 | } | |
3742 | ||
c7206205 | 3743 | void __weak arch_perf_update_userpage(struct perf_event_mmap_page *userpg, u64 now) |
e3f3541c PZ |
3744 | { |
3745 | } | |
3746 | ||
38ff667b PZ |
3747 | /* |
3748 | * Callers need to ensure there can be no nesting of this function, otherwise | |
3749 | * the seqlock logic goes bad. We can not serialize this because the arch | |
3750 | * code calls this from NMI context. | |
3751 | */ | |
cdd6c482 | 3752 | void perf_event_update_userpage(struct perf_event *event) |
37d81828 | 3753 | { |
cdd6c482 | 3754 | struct perf_event_mmap_page *userpg; |
76369139 | 3755 | struct ring_buffer *rb; |
e3f3541c | 3756 | u64 enabled, running, now; |
38ff667b PZ |
3757 | |
3758 | rcu_read_lock(); | |
5ec4c599 PZ |
3759 | rb = rcu_dereference(event->rb); |
3760 | if (!rb) | |
3761 | goto unlock; | |
3762 | ||
0d641208 EM |
3763 | /* |
3764 | * compute total_time_enabled, total_time_running | |
3765 | * based on snapshot values taken when the event | |
3766 | * was last scheduled in. | |
3767 | * | |
3768 | * we cannot simply called update_context_time() | |
3769 | * because of locking issue as we can be called in | |
3770 | * NMI context | |
3771 | */ | |
e3f3541c | 3772 | calc_timer_values(event, &now, &enabled, &running); |
38ff667b | 3773 | |
76369139 | 3774 | userpg = rb->user_page; |
7b732a75 PZ |
3775 | /* |
3776 | * Disable preemption so as to not let the corresponding user-space | |
3777 | * spin too long if we get preempted. | |
3778 | */ | |
3779 | preempt_disable(); | |
37d81828 | 3780 | ++userpg->lock; |
92f22a38 | 3781 | barrier(); |
cdd6c482 | 3782 | userpg->index = perf_event_index(event); |
b5e58793 | 3783 | userpg->offset = perf_event_count(event); |
365a4038 | 3784 | if (userpg->index) |
e7850595 | 3785 | userpg->offset -= local64_read(&event->hw.prev_count); |
7b732a75 | 3786 | |
0d641208 | 3787 | userpg->time_enabled = enabled + |
cdd6c482 | 3788 | atomic64_read(&event->child_total_time_enabled); |
7f8b4e4e | 3789 | |
0d641208 | 3790 | userpg->time_running = running + |
cdd6c482 | 3791 | atomic64_read(&event->child_total_time_running); |
7f8b4e4e | 3792 | |
c7206205 | 3793 | arch_perf_update_userpage(userpg, now); |
e3f3541c | 3794 | |
92f22a38 | 3795 | barrier(); |
37d81828 | 3796 | ++userpg->lock; |
7b732a75 | 3797 | preempt_enable(); |
38ff667b | 3798 | unlock: |
7b732a75 | 3799 | rcu_read_unlock(); |
37d81828 PM |
3800 | } |
3801 | ||
906010b2 PZ |
3802 | static int perf_mmap_fault(struct vm_area_struct *vma, struct vm_fault *vmf) |
3803 | { | |
3804 | struct perf_event *event = vma->vm_file->private_data; | |
76369139 | 3805 | struct ring_buffer *rb; |
906010b2 PZ |
3806 | int ret = VM_FAULT_SIGBUS; |
3807 | ||
3808 | if (vmf->flags & FAULT_FLAG_MKWRITE) { | |
3809 | if (vmf->pgoff == 0) | |
3810 | ret = 0; | |
3811 | return ret; | |
3812 | } | |
3813 | ||
3814 | rcu_read_lock(); | |
76369139 FW |
3815 | rb = rcu_dereference(event->rb); |
3816 | if (!rb) | |
906010b2 PZ |
3817 | goto unlock; |
3818 | ||
3819 | if (vmf->pgoff && (vmf->flags & FAULT_FLAG_WRITE)) | |
3820 | goto unlock; | |
3821 | ||
76369139 | 3822 | vmf->page = perf_mmap_to_page(rb, vmf->pgoff); |
906010b2 PZ |
3823 | if (!vmf->page) |
3824 | goto unlock; | |
3825 | ||
3826 | get_page(vmf->page); | |
3827 | vmf->page->mapping = vma->vm_file->f_mapping; | |
3828 | vmf->page->index = vmf->pgoff; | |
3829 | ||
3830 | ret = 0; | |
3831 | unlock: | |
3832 | rcu_read_unlock(); | |
3833 | ||
3834 | return ret; | |
3835 | } | |
3836 | ||
10c6db11 PZ |
3837 | static void ring_buffer_attach(struct perf_event *event, |
3838 | struct ring_buffer *rb) | |
3839 | { | |
3840 | unsigned long flags; | |
3841 | ||
3842 | if (!list_empty(&event->rb_entry)) | |
3843 | return; | |
3844 | ||
3845 | spin_lock_irqsave(&rb->event_lock, flags); | |
9bb5d40c PZ |
3846 | if (list_empty(&event->rb_entry)) |
3847 | list_add(&event->rb_entry, &rb->event_list); | |
10c6db11 PZ |
3848 | spin_unlock_irqrestore(&rb->event_lock, flags); |
3849 | } | |
3850 | ||
9bb5d40c | 3851 | static void ring_buffer_detach(struct perf_event *event, struct ring_buffer *rb) |
10c6db11 PZ |
3852 | { |
3853 | unsigned long flags; | |
3854 | ||
3855 | if (list_empty(&event->rb_entry)) | |
3856 | return; | |
3857 | ||
3858 | spin_lock_irqsave(&rb->event_lock, flags); | |
3859 | list_del_init(&event->rb_entry); | |
3860 | wake_up_all(&event->waitq); | |
3861 | spin_unlock_irqrestore(&rb->event_lock, flags); | |
3862 | } | |
3863 | ||
3864 | static void ring_buffer_wakeup(struct perf_event *event) | |
3865 | { | |
3866 | struct ring_buffer *rb; | |
3867 | ||
3868 | rcu_read_lock(); | |
3869 | rb = rcu_dereference(event->rb); | |
9bb5d40c PZ |
3870 | if (rb) { |
3871 | list_for_each_entry_rcu(event, &rb->event_list, rb_entry) | |
3872 | wake_up_all(&event->waitq); | |
3873 | } | |
10c6db11 PZ |
3874 | rcu_read_unlock(); |
3875 | } | |
3876 | ||
76369139 | 3877 | static void rb_free_rcu(struct rcu_head *rcu_head) |
906010b2 | 3878 | { |
76369139 | 3879 | struct ring_buffer *rb; |
906010b2 | 3880 | |
76369139 FW |
3881 | rb = container_of(rcu_head, struct ring_buffer, rcu_head); |
3882 | rb_free(rb); | |
7b732a75 PZ |
3883 | } |
3884 | ||
76369139 | 3885 | static struct ring_buffer *ring_buffer_get(struct perf_event *event) |
7b732a75 | 3886 | { |
76369139 | 3887 | struct ring_buffer *rb; |
7b732a75 | 3888 | |
ac9721f3 | 3889 | rcu_read_lock(); |
76369139 FW |
3890 | rb = rcu_dereference(event->rb); |
3891 | if (rb) { | |
3892 | if (!atomic_inc_not_zero(&rb->refcount)) | |
3893 | rb = NULL; | |
ac9721f3 PZ |
3894 | } |
3895 | rcu_read_unlock(); | |
3896 | ||
76369139 | 3897 | return rb; |
ac9721f3 PZ |
3898 | } |
3899 | ||
76369139 | 3900 | static void ring_buffer_put(struct ring_buffer *rb) |
ac9721f3 | 3901 | { |
76369139 | 3902 | if (!atomic_dec_and_test(&rb->refcount)) |
ac9721f3 | 3903 | return; |
7b732a75 | 3904 | |
9bb5d40c | 3905 | WARN_ON_ONCE(!list_empty(&rb->event_list)); |
10c6db11 | 3906 | |
76369139 | 3907 | call_rcu(&rb->rcu_head, rb_free_rcu); |
7b732a75 PZ |
3908 | } |
3909 | ||
3910 | static void perf_mmap_open(struct vm_area_struct *vma) | |
3911 | { | |
cdd6c482 | 3912 | struct perf_event *event = vma->vm_file->private_data; |
7b732a75 | 3913 | |
cdd6c482 | 3914 | atomic_inc(&event->mmap_count); |
9bb5d40c | 3915 | atomic_inc(&event->rb->mmap_count); |
7b732a75 PZ |
3916 | } |
3917 | ||
9bb5d40c PZ |
3918 | /* |
3919 | * A buffer can be mmap()ed multiple times; either directly through the same | |
3920 | * event, or through other events by use of perf_event_set_output(). | |
3921 | * | |
3922 | * In order to undo the VM accounting done by perf_mmap() we need to destroy | |
3923 | * the buffer here, where we still have a VM context. This means we need | |
3924 | * to detach all events redirecting to us. | |
3925 | */ | |
7b732a75 PZ |
3926 | static void perf_mmap_close(struct vm_area_struct *vma) |
3927 | { | |
cdd6c482 | 3928 | struct perf_event *event = vma->vm_file->private_data; |
7b732a75 | 3929 | |
9bb5d40c PZ |
3930 | struct ring_buffer *rb = event->rb; |
3931 | struct user_struct *mmap_user = rb->mmap_user; | |
3932 | int mmap_locked = rb->mmap_locked; | |
3933 | unsigned long size = perf_data_size(rb); | |
789f90fc | 3934 | |
9bb5d40c PZ |
3935 | atomic_dec(&rb->mmap_count); |
3936 | ||
3937 | if (!atomic_dec_and_mutex_lock(&event->mmap_count, &event->mmap_mutex)) | |
3938 | return; | |
3939 | ||
3940 | /* Detach current event from the buffer. */ | |
3941 | rcu_assign_pointer(event->rb, NULL); | |
3942 | ring_buffer_detach(event, rb); | |
3943 | mutex_unlock(&event->mmap_mutex); | |
3944 | ||
3945 | /* If there's still other mmap()s of this buffer, we're done. */ | |
3946 | if (atomic_read(&rb->mmap_count)) { | |
3947 | ring_buffer_put(rb); /* can't be last */ | |
3948 | return; | |
3949 | } | |
ac9721f3 | 3950 | |
9bb5d40c PZ |
3951 | /* |
3952 | * No other mmap()s, detach from all other events that might redirect | |
3953 | * into the now unreachable buffer. Somewhat complicated by the | |
3954 | * fact that rb::event_lock otherwise nests inside mmap_mutex. | |
3955 | */ | |
3956 | again: | |
3957 | rcu_read_lock(); | |
3958 | list_for_each_entry_rcu(event, &rb->event_list, rb_entry) { | |
3959 | if (!atomic_long_inc_not_zero(&event->refcount)) { | |
3960 | /* | |
3961 | * This event is en-route to free_event() which will | |
3962 | * detach it and remove it from the list. | |
3963 | */ | |
3964 | continue; | |
3965 | } | |
3966 | rcu_read_unlock(); | |
789f90fc | 3967 | |
9bb5d40c PZ |
3968 | mutex_lock(&event->mmap_mutex); |
3969 | /* | |
3970 | * Check we didn't race with perf_event_set_output() which can | |
3971 | * swizzle the rb from under us while we were waiting to | |
3972 | * acquire mmap_mutex. | |
3973 | * | |
3974 | * If we find a different rb; ignore this event, a next | |
3975 | * iteration will no longer find it on the list. We have to | |
3976 | * still restart the iteration to make sure we're not now | |
3977 | * iterating the wrong list. | |
3978 | */ | |
3979 | if (event->rb == rb) { | |
3980 | rcu_assign_pointer(event->rb, NULL); | |
3981 | ring_buffer_detach(event, rb); | |
3982 | ring_buffer_put(rb); /* can't be last, we still have one */ | |
26cb63ad | 3983 | } |
cdd6c482 | 3984 | mutex_unlock(&event->mmap_mutex); |
9bb5d40c | 3985 | put_event(event); |
ac9721f3 | 3986 | |
9bb5d40c PZ |
3987 | /* |
3988 | * Restart the iteration; either we're on the wrong list or | |
3989 | * destroyed its integrity by doing a deletion. | |
3990 | */ | |
3991 | goto again; | |
7b732a75 | 3992 | } |
9bb5d40c PZ |
3993 | rcu_read_unlock(); |
3994 | ||
3995 | /* | |
3996 | * It could be there's still a few 0-ref events on the list; they'll | |
3997 | * get cleaned up by free_event() -- they'll also still have their | |
3998 | * ref on the rb and will free it whenever they are done with it. | |
3999 | * | |
4000 | * Aside from that, this buffer is 'fully' detached and unmapped, | |
4001 | * undo the VM accounting. | |
4002 | */ | |
4003 | ||
4004 | atomic_long_sub((size >> PAGE_SHIFT) + 1, &mmap_user->locked_vm); | |
4005 | vma->vm_mm->pinned_vm -= mmap_locked; | |
4006 | free_uid(mmap_user); | |
4007 | ||
4008 | ring_buffer_put(rb); /* could be last */ | |
37d81828 PM |
4009 | } |
4010 | ||
f0f37e2f | 4011 | static const struct vm_operations_struct perf_mmap_vmops = { |
43a21ea8 PZ |
4012 | .open = perf_mmap_open, |
4013 | .close = perf_mmap_close, | |
4014 | .fault = perf_mmap_fault, | |
4015 | .page_mkwrite = perf_mmap_fault, | |
37d81828 PM |
4016 | }; |
4017 | ||
4018 | static int perf_mmap(struct file *file, struct vm_area_struct *vma) | |
4019 | { | |
cdd6c482 | 4020 | struct perf_event *event = file->private_data; |
22a4f650 | 4021 | unsigned long user_locked, user_lock_limit; |
789f90fc | 4022 | struct user_struct *user = current_user(); |
22a4f650 | 4023 | unsigned long locked, lock_limit; |
76369139 | 4024 | struct ring_buffer *rb; |
7b732a75 PZ |
4025 | unsigned long vma_size; |
4026 | unsigned long nr_pages; | |
789f90fc | 4027 | long user_extra, extra; |
d57e34fd | 4028 | int ret = 0, flags = 0; |
37d81828 | 4029 | |
c7920614 PZ |
4030 | /* |
4031 | * Don't allow mmap() of inherited per-task counters. This would | |
4032 | * create a performance issue due to all children writing to the | |
76369139 | 4033 | * same rb. |
c7920614 PZ |
4034 | */ |
4035 | if (event->cpu == -1 && event->attr.inherit) | |
4036 | return -EINVAL; | |
4037 | ||
43a21ea8 | 4038 | if (!(vma->vm_flags & VM_SHARED)) |
37d81828 | 4039 | return -EINVAL; |
7b732a75 PZ |
4040 | |
4041 | vma_size = vma->vm_end - vma->vm_start; | |
4042 | nr_pages = (vma_size / PAGE_SIZE) - 1; | |
4043 | ||
7730d865 | 4044 | /* |
76369139 | 4045 | * If we have rb pages ensure they're a power-of-two number, so we |
7730d865 PZ |
4046 | * can do bitmasks instead of modulo. |
4047 | */ | |
4048 | if (nr_pages != 0 && !is_power_of_2(nr_pages)) | |
37d81828 PM |
4049 | return -EINVAL; |
4050 | ||
7b732a75 | 4051 | if (vma_size != PAGE_SIZE * (1 + nr_pages)) |
37d81828 PM |
4052 | return -EINVAL; |
4053 | ||
7b732a75 PZ |
4054 | if (vma->vm_pgoff != 0) |
4055 | return -EINVAL; | |
37d81828 | 4056 | |
cdd6c482 | 4057 | WARN_ON_ONCE(event->ctx->parent_ctx); |
9bb5d40c | 4058 | again: |
cdd6c482 | 4059 | mutex_lock(&event->mmap_mutex); |
76369139 | 4060 | if (event->rb) { |
9bb5d40c | 4061 | if (event->rb->nr_pages != nr_pages) { |
ebb3c4c4 | 4062 | ret = -EINVAL; |
9bb5d40c PZ |
4063 | goto unlock; |
4064 | } | |
4065 | ||
4066 | if (!atomic_inc_not_zero(&event->rb->mmap_count)) { | |
4067 | /* | |
4068 | * Raced against perf_mmap_close() through | |
4069 | * perf_event_set_output(). Try again, hope for better | |
4070 | * luck. | |
4071 | */ | |
4072 | mutex_unlock(&event->mmap_mutex); | |
4073 | goto again; | |
4074 | } | |
4075 | ||
ebb3c4c4 PZ |
4076 | goto unlock; |
4077 | } | |
4078 | ||
789f90fc | 4079 | user_extra = nr_pages + 1; |
cdd6c482 | 4080 | user_lock_limit = sysctl_perf_event_mlock >> (PAGE_SHIFT - 10); |
a3862d3f IM |
4081 | |
4082 | /* | |
4083 | * Increase the limit linearly with more CPUs: | |
4084 | */ | |
4085 | user_lock_limit *= num_online_cpus(); | |
4086 | ||
789f90fc | 4087 | user_locked = atomic_long_read(&user->locked_vm) + user_extra; |
c5078f78 | 4088 | |
789f90fc PZ |
4089 | extra = 0; |
4090 | if (user_locked > user_lock_limit) | |
4091 | extra = user_locked - user_lock_limit; | |
7b732a75 | 4092 | |
78d7d407 | 4093 | lock_limit = rlimit(RLIMIT_MEMLOCK); |
7b732a75 | 4094 | lock_limit >>= PAGE_SHIFT; |
bc3e53f6 | 4095 | locked = vma->vm_mm->pinned_vm + extra; |
7b732a75 | 4096 | |
459ec28a IM |
4097 | if ((locked > lock_limit) && perf_paranoid_tracepoint_raw() && |
4098 | !capable(CAP_IPC_LOCK)) { | |
ebb3c4c4 PZ |
4099 | ret = -EPERM; |
4100 | goto unlock; | |
4101 | } | |
7b732a75 | 4102 | |
76369139 | 4103 | WARN_ON(event->rb); |
906010b2 | 4104 | |
d57e34fd | 4105 | if (vma->vm_flags & VM_WRITE) |
76369139 | 4106 | flags |= RING_BUFFER_WRITABLE; |
d57e34fd | 4107 | |
4ec8363d VW |
4108 | rb = rb_alloc(nr_pages, |
4109 | event->attr.watermark ? event->attr.wakeup_watermark : 0, | |
4110 | event->cpu, flags); | |
4111 | ||
76369139 | 4112 | if (!rb) { |
ac9721f3 | 4113 | ret = -ENOMEM; |
ebb3c4c4 | 4114 | goto unlock; |
ac9721f3 | 4115 | } |
26cb63ad | 4116 | |
9bb5d40c | 4117 | atomic_set(&rb->mmap_count, 1); |
26cb63ad PZ |
4118 | rb->mmap_locked = extra; |
4119 | rb->mmap_user = get_current_user(); | |
43a21ea8 | 4120 | |
ac9721f3 | 4121 | atomic_long_add(user_extra, &user->locked_vm); |
26cb63ad PZ |
4122 | vma->vm_mm->pinned_vm += extra; |
4123 | ||
9bb5d40c | 4124 | ring_buffer_attach(event, rb); |
26cb63ad | 4125 | rcu_assign_pointer(event->rb, rb); |
ac9721f3 | 4126 | |
fa731587 | 4127 | perf_event_init_userpage(event); |
9a0f05cb PZ |
4128 | perf_event_update_userpage(event); |
4129 | ||
ebb3c4c4 | 4130 | unlock: |
ac9721f3 PZ |
4131 | if (!ret) |
4132 | atomic_inc(&event->mmap_count); | |
cdd6c482 | 4133 | mutex_unlock(&event->mmap_mutex); |
37d81828 | 4134 | |
9bb5d40c PZ |
4135 | /* |
4136 | * Since pinned accounting is per vm we cannot allow fork() to copy our | |
4137 | * vma. | |
4138 | */ | |
26cb63ad | 4139 | vma->vm_flags |= VM_DONTCOPY | VM_DONTEXPAND | VM_DONTDUMP; |
37d81828 | 4140 | vma->vm_ops = &perf_mmap_vmops; |
7b732a75 PZ |
4141 | |
4142 | return ret; | |
37d81828 PM |
4143 | } |
4144 | ||
3c446b3d PZ |
4145 | static int perf_fasync(int fd, struct file *filp, int on) |
4146 | { | |
496ad9aa | 4147 | struct inode *inode = file_inode(filp); |
cdd6c482 | 4148 | struct perf_event *event = filp->private_data; |
3c446b3d PZ |
4149 | int retval; |
4150 | ||
4151 | mutex_lock(&inode->i_mutex); | |
cdd6c482 | 4152 | retval = fasync_helper(fd, filp, on, &event->fasync); |
3c446b3d PZ |
4153 | mutex_unlock(&inode->i_mutex); |
4154 | ||
4155 | if (retval < 0) | |
4156 | return retval; | |
4157 | ||
4158 | return 0; | |
4159 | } | |
4160 | ||
0793a61d | 4161 | static const struct file_operations perf_fops = { |
3326c1ce | 4162 | .llseek = no_llseek, |
0793a61d TG |
4163 | .release = perf_release, |
4164 | .read = perf_read, | |
4165 | .poll = perf_poll, | |
d859e29f PM |
4166 | .unlocked_ioctl = perf_ioctl, |
4167 | .compat_ioctl = perf_ioctl, | |
37d81828 | 4168 | .mmap = perf_mmap, |
3c446b3d | 4169 | .fasync = perf_fasync, |
0793a61d TG |
4170 | }; |
4171 | ||
925d519a | 4172 | /* |
cdd6c482 | 4173 | * Perf event wakeup |
925d519a PZ |
4174 | * |
4175 | * If there's data, ensure we set the poll() state and publish everything | |
4176 | * to user-space before waking everybody up. | |
4177 | */ | |
4178 | ||
cdd6c482 | 4179 | void perf_event_wakeup(struct perf_event *event) |
925d519a | 4180 | { |
10c6db11 | 4181 | ring_buffer_wakeup(event); |
4c9e2542 | 4182 | |
cdd6c482 IM |
4183 | if (event->pending_kill) { |
4184 | kill_fasync(&event->fasync, SIGIO, event->pending_kill); | |
4185 | event->pending_kill = 0; | |
4c9e2542 | 4186 | } |
925d519a PZ |
4187 | } |
4188 | ||
e360adbe | 4189 | static void perf_pending_event(struct irq_work *entry) |
79f14641 | 4190 | { |
cdd6c482 IM |
4191 | struct perf_event *event = container_of(entry, |
4192 | struct perf_event, pending); | |
79f14641 | 4193 | |
cdd6c482 IM |
4194 | if (event->pending_disable) { |
4195 | event->pending_disable = 0; | |
4196 | __perf_event_disable(event); | |
79f14641 PZ |
4197 | } |
4198 | ||
cdd6c482 IM |
4199 | if (event->pending_wakeup) { |
4200 | event->pending_wakeup = 0; | |
4201 | perf_event_wakeup(event); | |
79f14641 PZ |
4202 | } |
4203 | } | |
4204 | ||
39447b38 ZY |
4205 | /* |
4206 | * We assume there is only KVM supporting the callbacks. | |
4207 | * Later on, we might change it to a list if there is | |
4208 | * another virtualization implementation supporting the callbacks. | |
4209 | */ | |
4210 | struct perf_guest_info_callbacks *perf_guest_cbs; | |
4211 | ||
4212 | int perf_register_guest_info_callbacks(struct perf_guest_info_callbacks *cbs) | |
4213 | { | |
4214 | perf_guest_cbs = cbs; | |
4215 | return 0; | |
4216 | } | |
4217 | EXPORT_SYMBOL_GPL(perf_register_guest_info_callbacks); | |
4218 | ||
4219 | int perf_unregister_guest_info_callbacks(struct perf_guest_info_callbacks *cbs) | |
4220 | { | |
4221 | perf_guest_cbs = NULL; | |
4222 | return 0; | |
4223 | } | |
4224 | EXPORT_SYMBOL_GPL(perf_unregister_guest_info_callbacks); | |
4225 | ||
4018994f JO |
4226 | static void |
4227 | perf_output_sample_regs(struct perf_output_handle *handle, | |
4228 | struct pt_regs *regs, u64 mask) | |
4229 | { | |
4230 | int bit; | |
4231 | ||
4232 | for_each_set_bit(bit, (const unsigned long *) &mask, | |
4233 | sizeof(mask) * BITS_PER_BYTE) { | |
4234 | u64 val; | |
4235 | ||
4236 | val = perf_reg_value(regs, bit); | |
4237 | perf_output_put(handle, val); | |
4238 | } | |
4239 | } | |
4240 | ||
4241 | static void perf_sample_regs_user(struct perf_regs_user *regs_user, | |
4242 | struct pt_regs *regs) | |
4243 | { | |
4244 | if (!user_mode(regs)) { | |
4245 | if (current->mm) | |
4246 | regs = task_pt_regs(current); | |
4247 | else | |
4248 | regs = NULL; | |
4249 | } | |
4250 | ||
4251 | if (regs) { | |
4252 | regs_user->regs = regs; | |
4253 | regs_user->abi = perf_reg_abi(current); | |
4254 | } | |
4255 | } | |
4256 | ||
c5ebcedb JO |
4257 | /* |
4258 | * Get remaining task size from user stack pointer. | |
4259 | * | |
4260 | * It'd be better to take stack vma map and limit this more | |
4261 | * precisly, but there's no way to get it safely under interrupt, | |
4262 | * so using TASK_SIZE as limit. | |
4263 | */ | |
4264 | static u64 perf_ustack_task_size(struct pt_regs *regs) | |
4265 | { | |
4266 | unsigned long addr = perf_user_stack_pointer(regs); | |
4267 | ||
4268 | if (!addr || addr >= TASK_SIZE) | |
4269 | return 0; | |
4270 | ||
4271 | return TASK_SIZE - addr; | |
4272 | } | |
4273 | ||
4274 | static u16 | |
4275 | perf_sample_ustack_size(u16 stack_size, u16 header_size, | |
4276 | struct pt_regs *regs) | |
4277 | { | |
4278 | u64 task_size; | |
4279 | ||
4280 | /* No regs, no stack pointer, no dump. */ | |
4281 | if (!regs) | |
4282 | return 0; | |
4283 | ||
4284 | /* | |
4285 | * Check if we fit in with the requested stack size into the: | |
4286 | * - TASK_SIZE | |
4287 | * If we don't, we limit the size to the TASK_SIZE. | |
4288 | * | |
4289 | * - remaining sample size | |
4290 | * If we don't, we customize the stack size to | |
4291 | * fit in to the remaining sample size. | |
4292 | */ | |
4293 | ||
4294 | task_size = min((u64) USHRT_MAX, perf_ustack_task_size(regs)); | |
4295 | stack_size = min(stack_size, (u16) task_size); | |
4296 | ||
4297 | /* Current header size plus static size and dynamic size. */ | |
4298 | header_size += 2 * sizeof(u64); | |
4299 | ||
4300 | /* Do we fit in with the current stack dump size? */ | |
4301 | if ((u16) (header_size + stack_size) < header_size) { | |
4302 | /* | |
4303 | * If we overflow the maximum size for the sample, | |
4304 | * we customize the stack dump size to fit in. | |
4305 | */ | |
4306 | stack_size = USHRT_MAX - header_size - sizeof(u64); | |
4307 | stack_size = round_up(stack_size, sizeof(u64)); | |
4308 | } | |
4309 | ||
4310 | return stack_size; | |
4311 | } | |
4312 | ||
4313 | static void | |
4314 | perf_output_sample_ustack(struct perf_output_handle *handle, u64 dump_size, | |
4315 | struct pt_regs *regs) | |
4316 | { | |
4317 | /* Case of a kernel thread, nothing to dump */ | |
4318 | if (!regs) { | |
4319 | u64 size = 0; | |
4320 | perf_output_put(handle, size); | |
4321 | } else { | |
4322 | unsigned long sp; | |
4323 | unsigned int rem; | |
4324 | u64 dyn_size; | |
4325 | ||
4326 | /* | |
4327 | * We dump: | |
4328 | * static size | |
4329 | * - the size requested by user or the best one we can fit | |
4330 | * in to the sample max size | |
4331 | * data | |
4332 | * - user stack dump data | |
4333 | * dynamic size | |
4334 | * - the actual dumped size | |
4335 | */ | |
4336 | ||
4337 | /* Static size. */ | |
4338 | perf_output_put(handle, dump_size); | |
4339 | ||
4340 | /* Data. */ | |
4341 | sp = perf_user_stack_pointer(regs); | |
4342 | rem = __output_copy_user(handle, (void *) sp, dump_size); | |
4343 | dyn_size = dump_size - rem; | |
4344 | ||
4345 | perf_output_skip(handle, rem); | |
4346 | ||
4347 | /* Dynamic size. */ | |
4348 | perf_output_put(handle, dyn_size); | |
4349 | } | |
4350 | } | |
4351 | ||
c980d109 ACM |
4352 | static void __perf_event_header__init_id(struct perf_event_header *header, |
4353 | struct perf_sample_data *data, | |
4354 | struct perf_event *event) | |
6844c09d ACM |
4355 | { |
4356 | u64 sample_type = event->attr.sample_type; | |
4357 | ||
4358 | data->type = sample_type; | |
4359 | header->size += event->id_header_size; | |
4360 | ||
4361 | if (sample_type & PERF_SAMPLE_TID) { | |
4362 | /* namespace issues */ | |
4363 | data->tid_entry.pid = perf_event_pid(event, current); | |
4364 | data->tid_entry.tid = perf_event_tid(event, current); | |
4365 | } | |
4366 | ||
4367 | if (sample_type & PERF_SAMPLE_TIME) | |
4368 | data->time = perf_clock(); | |
4369 | ||
ff3d527c | 4370 | if (sample_type & (PERF_SAMPLE_ID | PERF_SAMPLE_IDENTIFIER)) |
6844c09d ACM |
4371 | data->id = primary_event_id(event); |
4372 | ||
4373 | if (sample_type & PERF_SAMPLE_STREAM_ID) | |
4374 | data->stream_id = event->id; | |
4375 | ||
4376 | if (sample_type & PERF_SAMPLE_CPU) { | |
4377 | data->cpu_entry.cpu = raw_smp_processor_id(); | |
4378 | data->cpu_entry.reserved = 0; | |
4379 | } | |
4380 | } | |
4381 | ||
76369139 FW |
4382 | void perf_event_header__init_id(struct perf_event_header *header, |
4383 | struct perf_sample_data *data, | |
4384 | struct perf_event *event) | |
c980d109 ACM |
4385 | { |
4386 | if (event->attr.sample_id_all) | |
4387 | __perf_event_header__init_id(header, data, event); | |
4388 | } | |
4389 | ||
4390 | static void __perf_event__output_id_sample(struct perf_output_handle *handle, | |
4391 | struct perf_sample_data *data) | |
4392 | { | |
4393 | u64 sample_type = data->type; | |
4394 | ||
4395 | if (sample_type & PERF_SAMPLE_TID) | |
4396 | perf_output_put(handle, data->tid_entry); | |
4397 | ||
4398 | if (sample_type & PERF_SAMPLE_TIME) | |
4399 | perf_output_put(handle, data->time); | |
4400 | ||
4401 | if (sample_type & PERF_SAMPLE_ID) | |
4402 | perf_output_put(handle, data->id); | |
4403 | ||
4404 | if (sample_type & PERF_SAMPLE_STREAM_ID) | |
4405 | perf_output_put(handle, data->stream_id); | |
4406 | ||
4407 | if (sample_type & PERF_SAMPLE_CPU) | |
4408 | perf_output_put(handle, data->cpu_entry); | |
ff3d527c AH |
4409 | |
4410 | if (sample_type & PERF_SAMPLE_IDENTIFIER) | |
4411 | perf_output_put(handle, data->id); | |
c980d109 ACM |
4412 | } |
4413 | ||
76369139 FW |
4414 | void perf_event__output_id_sample(struct perf_event *event, |
4415 | struct perf_output_handle *handle, | |
4416 | struct perf_sample_data *sample) | |
c980d109 ACM |
4417 | { |
4418 | if (event->attr.sample_id_all) | |
4419 | __perf_event__output_id_sample(handle, sample); | |
4420 | } | |
4421 | ||
3dab77fb | 4422 | static void perf_output_read_one(struct perf_output_handle *handle, |
eed01528 SE |
4423 | struct perf_event *event, |
4424 | u64 enabled, u64 running) | |
3dab77fb | 4425 | { |
cdd6c482 | 4426 | u64 read_format = event->attr.read_format; |
3dab77fb PZ |
4427 | u64 values[4]; |
4428 | int n = 0; | |
4429 | ||
b5e58793 | 4430 | values[n++] = perf_event_count(event); |
3dab77fb | 4431 | if (read_format & PERF_FORMAT_TOTAL_TIME_ENABLED) { |
eed01528 | 4432 | values[n++] = enabled + |
cdd6c482 | 4433 | atomic64_read(&event->child_total_time_enabled); |
3dab77fb PZ |
4434 | } |
4435 | if (read_format & PERF_FORMAT_TOTAL_TIME_RUNNING) { | |
eed01528 | 4436 | values[n++] = running + |
cdd6c482 | 4437 | atomic64_read(&event->child_total_time_running); |
3dab77fb PZ |
4438 | } |
4439 | if (read_format & PERF_FORMAT_ID) | |
cdd6c482 | 4440 | values[n++] = primary_event_id(event); |
3dab77fb | 4441 | |
76369139 | 4442 | __output_copy(handle, values, n * sizeof(u64)); |
3dab77fb PZ |
4443 | } |
4444 | ||
4445 | /* | |
cdd6c482 | 4446 | * XXX PERF_FORMAT_GROUP vs inherited events seems difficult. |
3dab77fb PZ |
4447 | */ |
4448 | static void perf_output_read_group(struct perf_output_handle *handle, | |
eed01528 SE |
4449 | struct perf_event *event, |
4450 | u64 enabled, u64 running) | |
3dab77fb | 4451 | { |
cdd6c482 IM |
4452 | struct perf_event *leader = event->group_leader, *sub; |
4453 | u64 read_format = event->attr.read_format; | |
3dab77fb PZ |
4454 | u64 values[5]; |
4455 | int n = 0; | |
4456 | ||
4457 | values[n++] = 1 + leader->nr_siblings; | |
4458 | ||
4459 | if (read_format & PERF_FORMAT_TOTAL_TIME_ENABLED) | |
eed01528 | 4460 | values[n++] = enabled; |
3dab77fb PZ |
4461 | |
4462 | if (read_format & PERF_FORMAT_TOTAL_TIME_RUNNING) | |
eed01528 | 4463 | values[n++] = running; |
3dab77fb | 4464 | |
cdd6c482 | 4465 | if (leader != event) |
3dab77fb PZ |
4466 | leader->pmu->read(leader); |
4467 | ||
b5e58793 | 4468 | values[n++] = perf_event_count(leader); |
3dab77fb | 4469 | if (read_format & PERF_FORMAT_ID) |
cdd6c482 | 4470 | values[n++] = primary_event_id(leader); |
3dab77fb | 4471 | |
76369139 | 4472 | __output_copy(handle, values, n * sizeof(u64)); |
3dab77fb | 4473 | |
65abc865 | 4474 | list_for_each_entry(sub, &leader->sibling_list, group_entry) { |
3dab77fb PZ |
4475 | n = 0; |
4476 | ||
6f5ab001 JO |
4477 | if ((sub != event) && |
4478 | (sub->state == PERF_EVENT_STATE_ACTIVE)) | |
3dab77fb PZ |
4479 | sub->pmu->read(sub); |
4480 | ||
b5e58793 | 4481 | values[n++] = perf_event_count(sub); |
3dab77fb | 4482 | if (read_format & PERF_FORMAT_ID) |
cdd6c482 | 4483 | values[n++] = primary_event_id(sub); |
3dab77fb | 4484 | |
76369139 | 4485 | __output_copy(handle, values, n * sizeof(u64)); |
3dab77fb PZ |
4486 | } |
4487 | } | |
4488 | ||
eed01528 SE |
4489 | #define PERF_FORMAT_TOTAL_TIMES (PERF_FORMAT_TOTAL_TIME_ENABLED|\ |
4490 | PERF_FORMAT_TOTAL_TIME_RUNNING) | |
4491 | ||
3dab77fb | 4492 | static void perf_output_read(struct perf_output_handle *handle, |
cdd6c482 | 4493 | struct perf_event *event) |
3dab77fb | 4494 | { |
e3f3541c | 4495 | u64 enabled = 0, running = 0, now; |
eed01528 SE |
4496 | u64 read_format = event->attr.read_format; |
4497 | ||
4498 | /* | |
4499 | * compute total_time_enabled, total_time_running | |
4500 | * based on snapshot values taken when the event | |
4501 | * was last scheduled in. | |
4502 | * | |
4503 | * we cannot simply called update_context_time() | |
4504 | * because of locking issue as we are called in | |
4505 | * NMI context | |
4506 | */ | |
c4794295 | 4507 | if (read_format & PERF_FORMAT_TOTAL_TIMES) |
e3f3541c | 4508 | calc_timer_values(event, &now, &enabled, &running); |
eed01528 | 4509 | |
cdd6c482 | 4510 | if (event->attr.read_format & PERF_FORMAT_GROUP) |
eed01528 | 4511 | perf_output_read_group(handle, event, enabled, running); |
3dab77fb | 4512 | else |
eed01528 | 4513 | perf_output_read_one(handle, event, enabled, running); |
3dab77fb PZ |
4514 | } |
4515 | ||
5622f295 MM |
4516 | void perf_output_sample(struct perf_output_handle *handle, |
4517 | struct perf_event_header *header, | |
4518 | struct perf_sample_data *data, | |
cdd6c482 | 4519 | struct perf_event *event) |
5622f295 MM |
4520 | { |
4521 | u64 sample_type = data->type; | |
4522 | ||
4523 | perf_output_put(handle, *header); | |
4524 | ||
ff3d527c AH |
4525 | if (sample_type & PERF_SAMPLE_IDENTIFIER) |
4526 | perf_output_put(handle, data->id); | |
4527 | ||
5622f295 MM |
4528 | if (sample_type & PERF_SAMPLE_IP) |
4529 | perf_output_put(handle, data->ip); | |
4530 | ||
4531 | if (sample_type & PERF_SAMPLE_TID) | |
4532 | perf_output_put(handle, data->tid_entry); | |
4533 | ||
4534 | if (sample_type & PERF_SAMPLE_TIME) | |
4535 | perf_output_put(handle, data->time); | |
4536 | ||
4537 | if (sample_type & PERF_SAMPLE_ADDR) | |
4538 | perf_output_put(handle, data->addr); | |
4539 | ||
4540 | if (sample_type & PERF_SAMPLE_ID) | |
4541 | perf_output_put(handle, data->id); | |
4542 | ||
4543 | if (sample_type & PERF_SAMPLE_STREAM_ID) | |
4544 | perf_output_put(handle, data->stream_id); | |
4545 | ||
4546 | if (sample_type & PERF_SAMPLE_CPU) | |
4547 | perf_output_put(handle, data->cpu_entry); | |
4548 | ||
4549 | if (sample_type & PERF_SAMPLE_PERIOD) | |
4550 | perf_output_put(handle, data->period); | |
4551 | ||
4552 | if (sample_type & PERF_SAMPLE_READ) | |
cdd6c482 | 4553 | perf_output_read(handle, event); |
5622f295 MM |
4554 | |
4555 | if (sample_type & PERF_SAMPLE_CALLCHAIN) { | |
4556 | if (data->callchain) { | |
4557 | int size = 1; | |
4558 | ||
4559 | if (data->callchain) | |
4560 | size += data->callchain->nr; | |
4561 | ||
4562 | size *= sizeof(u64); | |
4563 | ||
76369139 | 4564 | __output_copy(handle, data->callchain, size); |
5622f295 MM |
4565 | } else { |
4566 | u64 nr = 0; | |
4567 | perf_output_put(handle, nr); | |
4568 | } | |
4569 | } | |
4570 | ||
4571 | if (sample_type & PERF_SAMPLE_RAW) { | |
4572 | if (data->raw) { | |
4573 | perf_output_put(handle, data->raw->size); | |
76369139 FW |
4574 | __output_copy(handle, data->raw->data, |
4575 | data->raw->size); | |
5622f295 MM |
4576 | } else { |
4577 | struct { | |
4578 | u32 size; | |
4579 | u32 data; | |
4580 | } raw = { | |
4581 | .size = sizeof(u32), | |
4582 | .data = 0, | |
4583 | }; | |
4584 | perf_output_put(handle, raw); | |
4585 | } | |
4586 | } | |
a7ac67ea | 4587 | |
bce38cd5 SE |
4588 | if (sample_type & PERF_SAMPLE_BRANCH_STACK) { |
4589 | if (data->br_stack) { | |
4590 | size_t size; | |
4591 | ||
4592 | size = data->br_stack->nr | |
4593 | * sizeof(struct perf_branch_entry); | |
4594 | ||
4595 | perf_output_put(handle, data->br_stack->nr); | |
4596 | perf_output_copy(handle, data->br_stack->entries, size); | |
4597 | } else { | |
4598 | /* | |
4599 | * we always store at least the value of nr | |
4600 | */ | |
4601 | u64 nr = 0; | |
4602 | perf_output_put(handle, nr); | |
4603 | } | |
4604 | } | |
4018994f JO |
4605 | |
4606 | if (sample_type & PERF_SAMPLE_REGS_USER) { | |
4607 | u64 abi = data->regs_user.abi; | |
4608 | ||
4609 | /* | |
4610 | * If there are no regs to dump, notice it through | |
4611 | * first u64 being zero (PERF_SAMPLE_REGS_ABI_NONE). | |
4612 | */ | |
4613 | perf_output_put(handle, abi); | |
4614 | ||
4615 | if (abi) { | |
4616 | u64 mask = event->attr.sample_regs_user; | |
4617 | perf_output_sample_regs(handle, | |
4618 | data->regs_user.regs, | |
4619 | mask); | |
4620 | } | |
4621 | } | |
c5ebcedb | 4622 | |
a5cdd40c | 4623 | if (sample_type & PERF_SAMPLE_STACK_USER) { |
c5ebcedb JO |
4624 | perf_output_sample_ustack(handle, |
4625 | data->stack_user_size, | |
4626 | data->regs_user.regs); | |
a5cdd40c | 4627 | } |
c3feedf2 AK |
4628 | |
4629 | if (sample_type & PERF_SAMPLE_WEIGHT) | |
4630 | perf_output_put(handle, data->weight); | |
d6be9ad6 SE |
4631 | |
4632 | if (sample_type & PERF_SAMPLE_DATA_SRC) | |
4633 | perf_output_put(handle, data->data_src.val); | |
a5cdd40c | 4634 | |
fdfbbd07 AK |
4635 | if (sample_type & PERF_SAMPLE_TRANSACTION) |
4636 | perf_output_put(handle, data->txn); | |
4637 | ||
a5cdd40c PZ |
4638 | if (!event->attr.watermark) { |
4639 | int wakeup_events = event->attr.wakeup_events; | |
4640 | ||
4641 | if (wakeup_events) { | |
4642 | struct ring_buffer *rb = handle->rb; | |
4643 | int events = local_inc_return(&rb->events); | |
4644 | ||
4645 | if (events >= wakeup_events) { | |
4646 | local_sub(wakeup_events, &rb->events); | |
4647 | local_inc(&rb->wakeup); | |
4648 | } | |
4649 | } | |
4650 | } | |
5622f295 MM |
4651 | } |
4652 | ||
4653 | void perf_prepare_sample(struct perf_event_header *header, | |
4654 | struct perf_sample_data *data, | |
cdd6c482 | 4655 | struct perf_event *event, |
5622f295 | 4656 | struct pt_regs *regs) |
7b732a75 | 4657 | { |
cdd6c482 | 4658 | u64 sample_type = event->attr.sample_type; |
7b732a75 | 4659 | |
cdd6c482 | 4660 | header->type = PERF_RECORD_SAMPLE; |
c320c7b7 | 4661 | header->size = sizeof(*header) + event->header_size; |
5622f295 MM |
4662 | |
4663 | header->misc = 0; | |
4664 | header->misc |= perf_misc_flags(regs); | |
6fab0192 | 4665 | |
c980d109 | 4666 | __perf_event_header__init_id(header, data, event); |
6844c09d | 4667 | |
c320c7b7 | 4668 | if (sample_type & PERF_SAMPLE_IP) |
5622f295 MM |
4669 | data->ip = perf_instruction_pointer(regs); |
4670 | ||
b23f3325 | 4671 | if (sample_type & PERF_SAMPLE_CALLCHAIN) { |
5622f295 | 4672 | int size = 1; |
394ee076 | 4673 | |
e6dab5ff | 4674 | data->callchain = perf_callchain(event, regs); |
5622f295 MM |
4675 | |
4676 | if (data->callchain) | |
4677 | size += data->callchain->nr; | |
4678 | ||
4679 | header->size += size * sizeof(u64); | |
394ee076 PZ |
4680 | } |
4681 | ||
3a43ce68 | 4682 | if (sample_type & PERF_SAMPLE_RAW) { |
a044560c PZ |
4683 | int size = sizeof(u32); |
4684 | ||
4685 | if (data->raw) | |
4686 | size += data->raw->size; | |
4687 | else | |
4688 | size += sizeof(u32); | |
4689 | ||
4690 | WARN_ON_ONCE(size & (sizeof(u64)-1)); | |
5622f295 | 4691 | header->size += size; |
7f453c24 | 4692 | } |
bce38cd5 SE |
4693 | |
4694 | if (sample_type & PERF_SAMPLE_BRANCH_STACK) { | |
4695 | int size = sizeof(u64); /* nr */ | |
4696 | if (data->br_stack) { | |
4697 | size += data->br_stack->nr | |
4698 | * sizeof(struct perf_branch_entry); | |
4699 | } | |
4700 | header->size += size; | |
4701 | } | |
4018994f JO |
4702 | |
4703 | if (sample_type & PERF_SAMPLE_REGS_USER) { | |
4704 | /* regs dump ABI info */ | |
4705 | int size = sizeof(u64); | |
4706 | ||
4707 | perf_sample_regs_user(&data->regs_user, regs); | |
4708 | ||
4709 | if (data->regs_user.regs) { | |
4710 | u64 mask = event->attr.sample_regs_user; | |
4711 | size += hweight64(mask) * sizeof(u64); | |
4712 | } | |
4713 | ||
4714 | header->size += size; | |
4715 | } | |
c5ebcedb JO |
4716 | |
4717 | if (sample_type & PERF_SAMPLE_STACK_USER) { | |
4718 | /* | |
4719 | * Either we need PERF_SAMPLE_STACK_USER bit to be allways | |
4720 | * processed as the last one or have additional check added | |
4721 | * in case new sample type is added, because we could eat | |
4722 | * up the rest of the sample size. | |
4723 | */ | |
4724 | struct perf_regs_user *uregs = &data->regs_user; | |
4725 | u16 stack_size = event->attr.sample_stack_user; | |
4726 | u16 size = sizeof(u64); | |
4727 | ||
4728 | if (!uregs->abi) | |
4729 | perf_sample_regs_user(uregs, regs); | |
4730 | ||
4731 | stack_size = perf_sample_ustack_size(stack_size, header->size, | |
4732 | uregs->regs); | |
4733 | ||
4734 | /* | |
4735 | * If there is something to dump, add space for the dump | |
4736 | * itself and for the field that tells the dynamic size, | |
4737 | * which is how many have been actually dumped. | |
4738 | */ | |
4739 | if (stack_size) | |
4740 | size += sizeof(u64) + stack_size; | |
4741 | ||
4742 | data->stack_user_size = stack_size; | |
4743 | header->size += size; | |
4744 | } | |
5622f295 | 4745 | } |
7f453c24 | 4746 | |
a8b0ca17 | 4747 | static void perf_event_output(struct perf_event *event, |
5622f295 MM |
4748 | struct perf_sample_data *data, |
4749 | struct pt_regs *regs) | |
4750 | { | |
4751 | struct perf_output_handle handle; | |
4752 | struct perf_event_header header; | |
689802b2 | 4753 | |
927c7a9e FW |
4754 | /* protect the callchain buffers */ |
4755 | rcu_read_lock(); | |
4756 | ||
cdd6c482 | 4757 | perf_prepare_sample(&header, data, event, regs); |
5c148194 | 4758 | |
a7ac67ea | 4759 | if (perf_output_begin(&handle, event, header.size)) |
927c7a9e | 4760 | goto exit; |
0322cd6e | 4761 | |
cdd6c482 | 4762 | perf_output_sample(&handle, &header, data, event); |
f413cdb8 | 4763 | |
8a057d84 | 4764 | perf_output_end(&handle); |
927c7a9e FW |
4765 | |
4766 | exit: | |
4767 | rcu_read_unlock(); | |
0322cd6e PZ |
4768 | } |
4769 | ||
38b200d6 | 4770 | /* |
cdd6c482 | 4771 | * read event_id |
38b200d6 PZ |
4772 | */ |
4773 | ||
4774 | struct perf_read_event { | |
4775 | struct perf_event_header header; | |
4776 | ||
4777 | u32 pid; | |
4778 | u32 tid; | |
38b200d6 PZ |
4779 | }; |
4780 | ||
4781 | static void | |
cdd6c482 | 4782 | perf_event_read_event(struct perf_event *event, |
38b200d6 PZ |
4783 | struct task_struct *task) |
4784 | { | |
4785 | struct perf_output_handle handle; | |
c980d109 | 4786 | struct perf_sample_data sample; |
dfc65094 | 4787 | struct perf_read_event read_event = { |
38b200d6 | 4788 | .header = { |
cdd6c482 | 4789 | .type = PERF_RECORD_READ, |
38b200d6 | 4790 | .misc = 0, |
c320c7b7 | 4791 | .size = sizeof(read_event) + event->read_size, |
38b200d6 | 4792 | }, |
cdd6c482 IM |
4793 | .pid = perf_event_pid(event, task), |
4794 | .tid = perf_event_tid(event, task), | |
38b200d6 | 4795 | }; |
3dab77fb | 4796 | int ret; |
38b200d6 | 4797 | |
c980d109 | 4798 | perf_event_header__init_id(&read_event.header, &sample, event); |
a7ac67ea | 4799 | ret = perf_output_begin(&handle, event, read_event.header.size); |
38b200d6 PZ |
4800 | if (ret) |
4801 | return; | |
4802 | ||
dfc65094 | 4803 | perf_output_put(&handle, read_event); |
cdd6c482 | 4804 | perf_output_read(&handle, event); |
c980d109 | 4805 | perf_event__output_id_sample(event, &handle, &sample); |
3dab77fb | 4806 | |
38b200d6 PZ |
4807 | perf_output_end(&handle); |
4808 | } | |
4809 | ||
52d857a8 JO |
4810 | typedef void (perf_event_aux_output_cb)(struct perf_event *event, void *data); |
4811 | ||
4812 | static void | |
4813 | perf_event_aux_ctx(struct perf_event_context *ctx, | |
52d857a8 JO |
4814 | perf_event_aux_output_cb output, |
4815 | void *data) | |
4816 | { | |
4817 | struct perf_event *event; | |
4818 | ||
4819 | list_for_each_entry_rcu(event, &ctx->event_list, event_entry) { | |
4820 | if (event->state < PERF_EVENT_STATE_INACTIVE) | |
4821 | continue; | |
4822 | if (!event_filter_match(event)) | |
4823 | continue; | |
67516844 | 4824 | output(event, data); |
52d857a8 JO |
4825 | } |
4826 | } | |
4827 | ||
4828 | static void | |
67516844 | 4829 | perf_event_aux(perf_event_aux_output_cb output, void *data, |
52d857a8 JO |
4830 | struct perf_event_context *task_ctx) |
4831 | { | |
4832 | struct perf_cpu_context *cpuctx; | |
4833 | struct perf_event_context *ctx; | |
4834 | struct pmu *pmu; | |
4835 | int ctxn; | |
4836 | ||
4837 | rcu_read_lock(); | |
4838 | list_for_each_entry_rcu(pmu, &pmus, entry) { | |
4839 | cpuctx = get_cpu_ptr(pmu->pmu_cpu_context); | |
4840 | if (cpuctx->unique_pmu != pmu) | |
4841 | goto next; | |
67516844 | 4842 | perf_event_aux_ctx(&cpuctx->ctx, output, data); |
52d857a8 JO |
4843 | if (task_ctx) |
4844 | goto next; | |
4845 | ctxn = pmu->task_ctx_nr; | |
4846 | if (ctxn < 0) | |
4847 | goto next; | |
4848 | ctx = rcu_dereference(current->perf_event_ctxp[ctxn]); | |
4849 | if (ctx) | |
67516844 | 4850 | perf_event_aux_ctx(ctx, output, data); |
52d857a8 JO |
4851 | next: |
4852 | put_cpu_ptr(pmu->pmu_cpu_context); | |
4853 | } | |
4854 | ||
4855 | if (task_ctx) { | |
4856 | preempt_disable(); | |
67516844 | 4857 | perf_event_aux_ctx(task_ctx, output, data); |
52d857a8 JO |
4858 | preempt_enable(); |
4859 | } | |
4860 | rcu_read_unlock(); | |
4861 | } | |
4862 | ||
60313ebe | 4863 | /* |
9f498cc5 PZ |
4864 | * task tracking -- fork/exit |
4865 | * | |
13d7a241 | 4866 | * enabled by: attr.comm | attr.mmap | attr.mmap2 | attr.mmap_data | attr.task |
60313ebe PZ |
4867 | */ |
4868 | ||
9f498cc5 | 4869 | struct perf_task_event { |
3a80b4a3 | 4870 | struct task_struct *task; |
cdd6c482 | 4871 | struct perf_event_context *task_ctx; |
60313ebe PZ |
4872 | |
4873 | struct { | |
4874 | struct perf_event_header header; | |
4875 | ||
4876 | u32 pid; | |
4877 | u32 ppid; | |
9f498cc5 PZ |
4878 | u32 tid; |
4879 | u32 ptid; | |
393b2ad8 | 4880 | u64 time; |
cdd6c482 | 4881 | } event_id; |
60313ebe PZ |
4882 | }; |
4883 | ||
67516844 JO |
4884 | static int perf_event_task_match(struct perf_event *event) |
4885 | { | |
13d7a241 SE |
4886 | return event->attr.comm || event->attr.mmap || |
4887 | event->attr.mmap2 || event->attr.mmap_data || | |
4888 | event->attr.task; | |
67516844 JO |
4889 | } |
4890 | ||
cdd6c482 | 4891 | static void perf_event_task_output(struct perf_event *event, |
52d857a8 | 4892 | void *data) |
60313ebe | 4893 | { |
52d857a8 | 4894 | struct perf_task_event *task_event = data; |
60313ebe | 4895 | struct perf_output_handle handle; |
c980d109 | 4896 | struct perf_sample_data sample; |
9f498cc5 | 4897 | struct task_struct *task = task_event->task; |
c980d109 | 4898 | int ret, size = task_event->event_id.header.size; |
8bb39f9a | 4899 | |
67516844 JO |
4900 | if (!perf_event_task_match(event)) |
4901 | return; | |
4902 | ||
c980d109 | 4903 | perf_event_header__init_id(&task_event->event_id.header, &sample, event); |
60313ebe | 4904 | |
c980d109 | 4905 | ret = perf_output_begin(&handle, event, |
a7ac67ea | 4906 | task_event->event_id.header.size); |
ef60777c | 4907 | if (ret) |
c980d109 | 4908 | goto out; |
60313ebe | 4909 | |
cdd6c482 IM |
4910 | task_event->event_id.pid = perf_event_pid(event, task); |
4911 | task_event->event_id.ppid = perf_event_pid(event, current); | |
60313ebe | 4912 | |
cdd6c482 IM |
4913 | task_event->event_id.tid = perf_event_tid(event, task); |
4914 | task_event->event_id.ptid = perf_event_tid(event, current); | |
9f498cc5 | 4915 | |
cdd6c482 | 4916 | perf_output_put(&handle, task_event->event_id); |
393b2ad8 | 4917 | |
c980d109 ACM |
4918 | perf_event__output_id_sample(event, &handle, &sample); |
4919 | ||
60313ebe | 4920 | perf_output_end(&handle); |
c980d109 ACM |
4921 | out: |
4922 | task_event->event_id.header.size = size; | |
60313ebe PZ |
4923 | } |
4924 | ||
cdd6c482 IM |
4925 | static void perf_event_task(struct task_struct *task, |
4926 | struct perf_event_context *task_ctx, | |
3a80b4a3 | 4927 | int new) |
60313ebe | 4928 | { |
9f498cc5 | 4929 | struct perf_task_event task_event; |
60313ebe | 4930 | |
cdd6c482 IM |
4931 | if (!atomic_read(&nr_comm_events) && |
4932 | !atomic_read(&nr_mmap_events) && | |
4933 | !atomic_read(&nr_task_events)) | |
60313ebe PZ |
4934 | return; |
4935 | ||
9f498cc5 | 4936 | task_event = (struct perf_task_event){ |
3a80b4a3 PZ |
4937 | .task = task, |
4938 | .task_ctx = task_ctx, | |
cdd6c482 | 4939 | .event_id = { |
60313ebe | 4940 | .header = { |
cdd6c482 | 4941 | .type = new ? PERF_RECORD_FORK : PERF_RECORD_EXIT, |
573402db | 4942 | .misc = 0, |
cdd6c482 | 4943 | .size = sizeof(task_event.event_id), |
60313ebe | 4944 | }, |
573402db PZ |
4945 | /* .pid */ |
4946 | /* .ppid */ | |
9f498cc5 PZ |
4947 | /* .tid */ |
4948 | /* .ptid */ | |
6f93d0a7 | 4949 | .time = perf_clock(), |
60313ebe PZ |
4950 | }, |
4951 | }; | |
4952 | ||
67516844 | 4953 | perf_event_aux(perf_event_task_output, |
52d857a8 JO |
4954 | &task_event, |
4955 | task_ctx); | |
9f498cc5 PZ |
4956 | } |
4957 | ||
cdd6c482 | 4958 | void perf_event_fork(struct task_struct *task) |
9f498cc5 | 4959 | { |
cdd6c482 | 4960 | perf_event_task(task, NULL, 1); |
60313ebe PZ |
4961 | } |
4962 | ||
8d1b2d93 PZ |
4963 | /* |
4964 | * comm tracking | |
4965 | */ | |
4966 | ||
4967 | struct perf_comm_event { | |
22a4f650 IM |
4968 | struct task_struct *task; |
4969 | char *comm; | |
8d1b2d93 PZ |
4970 | int comm_size; |
4971 | ||
4972 | struct { | |
4973 | struct perf_event_header header; | |
4974 | ||
4975 | u32 pid; | |
4976 | u32 tid; | |
cdd6c482 | 4977 | } event_id; |
8d1b2d93 PZ |
4978 | }; |
4979 | ||
67516844 JO |
4980 | static int perf_event_comm_match(struct perf_event *event) |
4981 | { | |
4982 | return event->attr.comm; | |
4983 | } | |
4984 | ||
cdd6c482 | 4985 | static void perf_event_comm_output(struct perf_event *event, |
52d857a8 | 4986 | void *data) |
8d1b2d93 | 4987 | { |
52d857a8 | 4988 | struct perf_comm_event *comm_event = data; |
8d1b2d93 | 4989 | struct perf_output_handle handle; |
c980d109 | 4990 | struct perf_sample_data sample; |
cdd6c482 | 4991 | int size = comm_event->event_id.header.size; |
c980d109 ACM |
4992 | int ret; |
4993 | ||
67516844 JO |
4994 | if (!perf_event_comm_match(event)) |
4995 | return; | |
4996 | ||
c980d109 ACM |
4997 | perf_event_header__init_id(&comm_event->event_id.header, &sample, event); |
4998 | ret = perf_output_begin(&handle, event, | |
a7ac67ea | 4999 | comm_event->event_id.header.size); |
8d1b2d93 PZ |
5000 | |
5001 | if (ret) | |
c980d109 | 5002 | goto out; |
8d1b2d93 | 5003 | |
cdd6c482 IM |
5004 | comm_event->event_id.pid = perf_event_pid(event, comm_event->task); |
5005 | comm_event->event_id.tid = perf_event_tid(event, comm_event->task); | |
709e50cf | 5006 | |
cdd6c482 | 5007 | perf_output_put(&handle, comm_event->event_id); |
76369139 | 5008 | __output_copy(&handle, comm_event->comm, |
8d1b2d93 | 5009 | comm_event->comm_size); |
c980d109 ACM |
5010 | |
5011 | perf_event__output_id_sample(event, &handle, &sample); | |
5012 | ||
8d1b2d93 | 5013 | perf_output_end(&handle); |
c980d109 ACM |
5014 | out: |
5015 | comm_event->event_id.header.size = size; | |
8d1b2d93 PZ |
5016 | } |
5017 | ||
cdd6c482 | 5018 | static void perf_event_comm_event(struct perf_comm_event *comm_event) |
8d1b2d93 | 5019 | { |
413ee3b4 | 5020 | char comm[TASK_COMM_LEN]; |
8d1b2d93 | 5021 | unsigned int size; |
8d1b2d93 | 5022 | |
413ee3b4 | 5023 | memset(comm, 0, sizeof(comm)); |
96b02d78 | 5024 | strlcpy(comm, comm_event->task->comm, sizeof(comm)); |
888fcee0 | 5025 | size = ALIGN(strlen(comm)+1, sizeof(u64)); |
8d1b2d93 PZ |
5026 | |
5027 | comm_event->comm = comm; | |
5028 | comm_event->comm_size = size; | |
5029 | ||
cdd6c482 | 5030 | comm_event->event_id.header.size = sizeof(comm_event->event_id) + size; |
8dc85d54 | 5031 | |
67516844 | 5032 | perf_event_aux(perf_event_comm_output, |
52d857a8 JO |
5033 | comm_event, |
5034 | NULL); | |
8d1b2d93 PZ |
5035 | } |
5036 | ||
cdd6c482 | 5037 | void perf_event_comm(struct task_struct *task) |
8d1b2d93 | 5038 | { |
9ee318a7 | 5039 | struct perf_comm_event comm_event; |
8dc85d54 PZ |
5040 | struct perf_event_context *ctx; |
5041 | int ctxn; | |
9ee318a7 | 5042 | |
c79aa0d9 | 5043 | rcu_read_lock(); |
8dc85d54 PZ |
5044 | for_each_task_context_nr(ctxn) { |
5045 | ctx = task->perf_event_ctxp[ctxn]; | |
5046 | if (!ctx) | |
5047 | continue; | |
9ee318a7 | 5048 | |
8dc85d54 PZ |
5049 | perf_event_enable_on_exec(ctx); |
5050 | } | |
c79aa0d9 | 5051 | rcu_read_unlock(); |
9ee318a7 | 5052 | |
cdd6c482 | 5053 | if (!atomic_read(&nr_comm_events)) |
9ee318a7 | 5054 | return; |
a63eaf34 | 5055 | |
9ee318a7 | 5056 | comm_event = (struct perf_comm_event){ |
8d1b2d93 | 5057 | .task = task, |
573402db PZ |
5058 | /* .comm */ |
5059 | /* .comm_size */ | |
cdd6c482 | 5060 | .event_id = { |
573402db | 5061 | .header = { |
cdd6c482 | 5062 | .type = PERF_RECORD_COMM, |
573402db PZ |
5063 | .misc = 0, |
5064 | /* .size */ | |
5065 | }, | |
5066 | /* .pid */ | |
5067 | /* .tid */ | |
8d1b2d93 PZ |
5068 | }, |
5069 | }; | |
5070 | ||
cdd6c482 | 5071 | perf_event_comm_event(&comm_event); |
8d1b2d93 PZ |
5072 | } |
5073 | ||
0a4a9391 PZ |
5074 | /* |
5075 | * mmap tracking | |
5076 | */ | |
5077 | ||
5078 | struct perf_mmap_event { | |
089dd79d PZ |
5079 | struct vm_area_struct *vma; |
5080 | ||
5081 | const char *file_name; | |
5082 | int file_size; | |
13d7a241 SE |
5083 | int maj, min; |
5084 | u64 ino; | |
5085 | u64 ino_generation; | |
0a4a9391 PZ |
5086 | |
5087 | struct { | |
5088 | struct perf_event_header header; | |
5089 | ||
5090 | u32 pid; | |
5091 | u32 tid; | |
5092 | u64 start; | |
5093 | u64 len; | |
5094 | u64 pgoff; | |
cdd6c482 | 5095 | } event_id; |
0a4a9391 PZ |
5096 | }; |
5097 | ||
67516844 JO |
5098 | static int perf_event_mmap_match(struct perf_event *event, |
5099 | void *data) | |
5100 | { | |
5101 | struct perf_mmap_event *mmap_event = data; | |
5102 | struct vm_area_struct *vma = mmap_event->vma; | |
5103 | int executable = vma->vm_flags & VM_EXEC; | |
5104 | ||
5105 | return (!executable && event->attr.mmap_data) || | |
13d7a241 | 5106 | (executable && (event->attr.mmap || event->attr.mmap2)); |
67516844 JO |
5107 | } |
5108 | ||
cdd6c482 | 5109 | static void perf_event_mmap_output(struct perf_event *event, |
52d857a8 | 5110 | void *data) |
0a4a9391 | 5111 | { |
52d857a8 | 5112 | struct perf_mmap_event *mmap_event = data; |
0a4a9391 | 5113 | struct perf_output_handle handle; |
c980d109 | 5114 | struct perf_sample_data sample; |
cdd6c482 | 5115 | int size = mmap_event->event_id.header.size; |
c980d109 | 5116 | int ret; |
0a4a9391 | 5117 | |
67516844 JO |
5118 | if (!perf_event_mmap_match(event, data)) |
5119 | return; | |
5120 | ||
13d7a241 SE |
5121 | if (event->attr.mmap2) { |
5122 | mmap_event->event_id.header.type = PERF_RECORD_MMAP2; | |
5123 | mmap_event->event_id.header.size += sizeof(mmap_event->maj); | |
5124 | mmap_event->event_id.header.size += sizeof(mmap_event->min); | |
5125 | mmap_event->event_id.header.size += sizeof(mmap_event->ino); | |
d008d525 | 5126 | mmap_event->event_id.header.size += sizeof(mmap_event->ino_generation); |
13d7a241 SE |
5127 | } |
5128 | ||
c980d109 ACM |
5129 | perf_event_header__init_id(&mmap_event->event_id.header, &sample, event); |
5130 | ret = perf_output_begin(&handle, event, | |
a7ac67ea | 5131 | mmap_event->event_id.header.size); |
0a4a9391 | 5132 | if (ret) |
c980d109 | 5133 | goto out; |
0a4a9391 | 5134 | |
cdd6c482 IM |
5135 | mmap_event->event_id.pid = perf_event_pid(event, current); |
5136 | mmap_event->event_id.tid = perf_event_tid(event, current); | |
709e50cf | 5137 | |
cdd6c482 | 5138 | perf_output_put(&handle, mmap_event->event_id); |
13d7a241 SE |
5139 | |
5140 | if (event->attr.mmap2) { | |
5141 | perf_output_put(&handle, mmap_event->maj); | |
5142 | perf_output_put(&handle, mmap_event->min); | |
5143 | perf_output_put(&handle, mmap_event->ino); | |
5144 | perf_output_put(&handle, mmap_event->ino_generation); | |
5145 | } | |
5146 | ||
76369139 | 5147 | __output_copy(&handle, mmap_event->file_name, |
0a4a9391 | 5148 | mmap_event->file_size); |
c980d109 ACM |
5149 | |
5150 | perf_event__output_id_sample(event, &handle, &sample); | |
5151 | ||
78d613eb | 5152 | perf_output_end(&handle); |
c980d109 ACM |
5153 | out: |
5154 | mmap_event->event_id.header.size = size; | |
0a4a9391 PZ |
5155 | } |
5156 | ||
cdd6c482 | 5157 | static void perf_event_mmap_event(struct perf_mmap_event *mmap_event) |
0a4a9391 | 5158 | { |
089dd79d PZ |
5159 | struct vm_area_struct *vma = mmap_event->vma; |
5160 | struct file *file = vma->vm_file; | |
13d7a241 SE |
5161 | int maj = 0, min = 0; |
5162 | u64 ino = 0, gen = 0; | |
0a4a9391 PZ |
5163 | unsigned int size; |
5164 | char tmp[16]; | |
5165 | char *buf = NULL; | |
2c42cfbf | 5166 | char *name; |
413ee3b4 | 5167 | |
0a4a9391 | 5168 | if (file) { |
13d7a241 SE |
5169 | struct inode *inode; |
5170 | dev_t dev; | |
3ea2f2b9 | 5171 | |
2c42cfbf | 5172 | buf = kmalloc(PATH_MAX, GFP_KERNEL); |
0a4a9391 | 5173 | if (!buf) { |
c7e548b4 ON |
5174 | name = "//enomem"; |
5175 | goto cpy_name; | |
0a4a9391 | 5176 | } |
413ee3b4 | 5177 | /* |
3ea2f2b9 | 5178 | * d_path() works from the end of the rb backwards, so we |
413ee3b4 AB |
5179 | * need to add enough zero bytes after the string to handle |
5180 | * the 64bit alignment we do later. | |
5181 | */ | |
3ea2f2b9 | 5182 | name = d_path(&file->f_path, buf, PATH_MAX - sizeof(u64)); |
0a4a9391 | 5183 | if (IS_ERR(name)) { |
c7e548b4 ON |
5184 | name = "//toolong"; |
5185 | goto cpy_name; | |
0a4a9391 | 5186 | } |
13d7a241 SE |
5187 | inode = file_inode(vma->vm_file); |
5188 | dev = inode->i_sb->s_dev; | |
5189 | ino = inode->i_ino; | |
5190 | gen = inode->i_generation; | |
5191 | maj = MAJOR(dev); | |
5192 | min = MINOR(dev); | |
c7e548b4 | 5193 | goto got_name; |
0a4a9391 | 5194 | } else { |
2c42cfbf | 5195 | name = (char *)arch_vma_name(vma); |
c7e548b4 ON |
5196 | if (name) |
5197 | goto cpy_name; | |
089dd79d | 5198 | |
32c5fb7e | 5199 | if (vma->vm_start <= vma->vm_mm->start_brk && |
3af9e859 | 5200 | vma->vm_end >= vma->vm_mm->brk) { |
c7e548b4 ON |
5201 | name = "[heap]"; |
5202 | goto cpy_name; | |
32c5fb7e ON |
5203 | } |
5204 | if (vma->vm_start <= vma->vm_mm->start_stack && | |
3af9e859 | 5205 | vma->vm_end >= vma->vm_mm->start_stack) { |
c7e548b4 ON |
5206 | name = "[stack]"; |
5207 | goto cpy_name; | |
089dd79d PZ |
5208 | } |
5209 | ||
c7e548b4 ON |
5210 | name = "//anon"; |
5211 | goto cpy_name; | |
0a4a9391 PZ |
5212 | } |
5213 | ||
c7e548b4 ON |
5214 | cpy_name: |
5215 | strlcpy(tmp, name, sizeof(tmp)); | |
5216 | name = tmp; | |
0a4a9391 | 5217 | got_name: |
2c42cfbf PZ |
5218 | /* |
5219 | * Since our buffer works in 8 byte units we need to align our string | |
5220 | * size to a multiple of 8. However, we must guarantee the tail end is | |
5221 | * zero'd out to avoid leaking random bits to userspace. | |
5222 | */ | |
5223 | size = strlen(name)+1; | |
5224 | while (!IS_ALIGNED(size, sizeof(u64))) | |
5225 | name[size++] = '\0'; | |
0a4a9391 PZ |
5226 | |
5227 | mmap_event->file_name = name; | |
5228 | mmap_event->file_size = size; | |
13d7a241 SE |
5229 | mmap_event->maj = maj; |
5230 | mmap_event->min = min; | |
5231 | mmap_event->ino = ino; | |
5232 | mmap_event->ino_generation = gen; | |
0a4a9391 | 5233 | |
2fe85427 SE |
5234 | if (!(vma->vm_flags & VM_EXEC)) |
5235 | mmap_event->event_id.header.misc |= PERF_RECORD_MISC_MMAP_DATA; | |
5236 | ||
cdd6c482 | 5237 | mmap_event->event_id.header.size = sizeof(mmap_event->event_id) + size; |
0a4a9391 | 5238 | |
67516844 | 5239 | perf_event_aux(perf_event_mmap_output, |
52d857a8 JO |
5240 | mmap_event, |
5241 | NULL); | |
665c2142 | 5242 | |
0a4a9391 PZ |
5243 | kfree(buf); |
5244 | } | |
5245 | ||
3af9e859 | 5246 | void perf_event_mmap(struct vm_area_struct *vma) |
0a4a9391 | 5247 | { |
9ee318a7 PZ |
5248 | struct perf_mmap_event mmap_event; |
5249 | ||
cdd6c482 | 5250 | if (!atomic_read(&nr_mmap_events)) |
9ee318a7 PZ |
5251 | return; |
5252 | ||
5253 | mmap_event = (struct perf_mmap_event){ | |
089dd79d | 5254 | .vma = vma, |
573402db PZ |
5255 | /* .file_name */ |
5256 | /* .file_size */ | |
cdd6c482 | 5257 | .event_id = { |
573402db | 5258 | .header = { |
cdd6c482 | 5259 | .type = PERF_RECORD_MMAP, |
39447b38 | 5260 | .misc = PERF_RECORD_MISC_USER, |
573402db PZ |
5261 | /* .size */ |
5262 | }, | |
5263 | /* .pid */ | |
5264 | /* .tid */ | |
089dd79d PZ |
5265 | .start = vma->vm_start, |
5266 | .len = vma->vm_end - vma->vm_start, | |
3a0304e9 | 5267 | .pgoff = (u64)vma->vm_pgoff << PAGE_SHIFT, |
0a4a9391 | 5268 | }, |
13d7a241 SE |
5269 | /* .maj (attr_mmap2 only) */ |
5270 | /* .min (attr_mmap2 only) */ | |
5271 | /* .ino (attr_mmap2 only) */ | |
5272 | /* .ino_generation (attr_mmap2 only) */ | |
0a4a9391 PZ |
5273 | }; |
5274 | ||
cdd6c482 | 5275 | perf_event_mmap_event(&mmap_event); |
0a4a9391 PZ |
5276 | } |
5277 | ||
a78ac325 PZ |
5278 | /* |
5279 | * IRQ throttle logging | |
5280 | */ | |
5281 | ||
cdd6c482 | 5282 | static void perf_log_throttle(struct perf_event *event, int enable) |
a78ac325 PZ |
5283 | { |
5284 | struct perf_output_handle handle; | |
c980d109 | 5285 | struct perf_sample_data sample; |
a78ac325 PZ |
5286 | int ret; |
5287 | ||
5288 | struct { | |
5289 | struct perf_event_header header; | |
5290 | u64 time; | |
cca3f454 | 5291 | u64 id; |
7f453c24 | 5292 | u64 stream_id; |
a78ac325 PZ |
5293 | } throttle_event = { |
5294 | .header = { | |
cdd6c482 | 5295 | .type = PERF_RECORD_THROTTLE, |
a78ac325 PZ |
5296 | .misc = 0, |
5297 | .size = sizeof(throttle_event), | |
5298 | }, | |
def0a9b2 | 5299 | .time = perf_clock(), |
cdd6c482 IM |
5300 | .id = primary_event_id(event), |
5301 | .stream_id = event->id, | |
a78ac325 PZ |
5302 | }; |
5303 | ||
966ee4d6 | 5304 | if (enable) |
cdd6c482 | 5305 | throttle_event.header.type = PERF_RECORD_UNTHROTTLE; |
966ee4d6 | 5306 | |
c980d109 ACM |
5307 | perf_event_header__init_id(&throttle_event.header, &sample, event); |
5308 | ||
5309 | ret = perf_output_begin(&handle, event, | |
a7ac67ea | 5310 | throttle_event.header.size); |
a78ac325 PZ |
5311 | if (ret) |
5312 | return; | |
5313 | ||
5314 | perf_output_put(&handle, throttle_event); | |
c980d109 | 5315 | perf_event__output_id_sample(event, &handle, &sample); |
a78ac325 PZ |
5316 | perf_output_end(&handle); |
5317 | } | |
5318 | ||
f6c7d5fe | 5319 | /* |
cdd6c482 | 5320 | * Generic event overflow handling, sampling. |
f6c7d5fe PZ |
5321 | */ |
5322 | ||
a8b0ca17 | 5323 | static int __perf_event_overflow(struct perf_event *event, |
5622f295 MM |
5324 | int throttle, struct perf_sample_data *data, |
5325 | struct pt_regs *regs) | |
f6c7d5fe | 5326 | { |
cdd6c482 IM |
5327 | int events = atomic_read(&event->event_limit); |
5328 | struct hw_perf_event *hwc = &event->hw; | |
e050e3f0 | 5329 | u64 seq; |
79f14641 PZ |
5330 | int ret = 0; |
5331 | ||
96398826 PZ |
5332 | /* |
5333 | * Non-sampling counters might still use the PMI to fold short | |
5334 | * hardware counters, ignore those. | |
5335 | */ | |
5336 | if (unlikely(!is_sampling_event(event))) | |
5337 | return 0; | |
5338 | ||
e050e3f0 SE |
5339 | seq = __this_cpu_read(perf_throttled_seq); |
5340 | if (seq != hwc->interrupts_seq) { | |
5341 | hwc->interrupts_seq = seq; | |
5342 | hwc->interrupts = 1; | |
5343 | } else { | |
5344 | hwc->interrupts++; | |
5345 | if (unlikely(throttle | |
5346 | && hwc->interrupts >= max_samples_per_tick)) { | |
5347 | __this_cpu_inc(perf_throttled_count); | |
163ec435 PZ |
5348 | hwc->interrupts = MAX_INTERRUPTS; |
5349 | perf_log_throttle(event, 0); | |
d84153d6 | 5350 | tick_nohz_full_kick(); |
a78ac325 PZ |
5351 | ret = 1; |
5352 | } | |
e050e3f0 | 5353 | } |
60db5e09 | 5354 | |
cdd6c482 | 5355 | if (event->attr.freq) { |
def0a9b2 | 5356 | u64 now = perf_clock(); |
abd50713 | 5357 | s64 delta = now - hwc->freq_time_stamp; |
bd2b5b12 | 5358 | |
abd50713 | 5359 | hwc->freq_time_stamp = now; |
bd2b5b12 | 5360 | |
abd50713 | 5361 | if (delta > 0 && delta < 2*TICK_NSEC) |
f39d47ff | 5362 | perf_adjust_period(event, delta, hwc->last_period, true); |
bd2b5b12 PZ |
5363 | } |
5364 | ||
2023b359 PZ |
5365 | /* |
5366 | * XXX event_limit might not quite work as expected on inherited | |
cdd6c482 | 5367 | * events |
2023b359 PZ |
5368 | */ |
5369 | ||
cdd6c482 IM |
5370 | event->pending_kill = POLL_IN; |
5371 | if (events && atomic_dec_and_test(&event->event_limit)) { | |
79f14641 | 5372 | ret = 1; |
cdd6c482 | 5373 | event->pending_kill = POLL_HUP; |
a8b0ca17 PZ |
5374 | event->pending_disable = 1; |
5375 | irq_work_queue(&event->pending); | |
79f14641 PZ |
5376 | } |
5377 | ||
453f19ee | 5378 | if (event->overflow_handler) |
a8b0ca17 | 5379 | event->overflow_handler(event, data, regs); |
453f19ee | 5380 | else |
a8b0ca17 | 5381 | perf_event_output(event, data, regs); |
453f19ee | 5382 | |
f506b3dc | 5383 | if (event->fasync && event->pending_kill) { |
a8b0ca17 PZ |
5384 | event->pending_wakeup = 1; |
5385 | irq_work_queue(&event->pending); | |
f506b3dc PZ |
5386 | } |
5387 | ||
79f14641 | 5388 | return ret; |
f6c7d5fe PZ |
5389 | } |
5390 | ||
a8b0ca17 | 5391 | int perf_event_overflow(struct perf_event *event, |
5622f295 MM |
5392 | struct perf_sample_data *data, |
5393 | struct pt_regs *regs) | |
850bc73f | 5394 | { |
a8b0ca17 | 5395 | return __perf_event_overflow(event, 1, data, regs); |
850bc73f PZ |
5396 | } |
5397 | ||
15dbf27c | 5398 | /* |
cdd6c482 | 5399 | * Generic software event infrastructure |
15dbf27c PZ |
5400 | */ |
5401 | ||
b28ab83c PZ |
5402 | struct swevent_htable { |
5403 | struct swevent_hlist *swevent_hlist; | |
5404 | struct mutex hlist_mutex; | |
5405 | int hlist_refcount; | |
5406 | ||
5407 | /* Recursion avoidance in each contexts */ | |
5408 | int recursion[PERF_NR_CONTEXTS]; | |
5409 | }; | |
5410 | ||
5411 | static DEFINE_PER_CPU(struct swevent_htable, swevent_htable); | |
5412 | ||
7b4b6658 | 5413 | /* |
cdd6c482 IM |
5414 | * We directly increment event->count and keep a second value in |
5415 | * event->hw.period_left to count intervals. This period event | |
7b4b6658 PZ |
5416 | * is kept in the range [-sample_period, 0] so that we can use the |
5417 | * sign as trigger. | |
5418 | */ | |
5419 | ||
ab573844 | 5420 | u64 perf_swevent_set_period(struct perf_event *event) |
15dbf27c | 5421 | { |
cdd6c482 | 5422 | struct hw_perf_event *hwc = &event->hw; |
7b4b6658 PZ |
5423 | u64 period = hwc->last_period; |
5424 | u64 nr, offset; | |
5425 | s64 old, val; | |
5426 | ||
5427 | hwc->last_period = hwc->sample_period; | |
15dbf27c PZ |
5428 | |
5429 | again: | |
e7850595 | 5430 | old = val = local64_read(&hwc->period_left); |
7b4b6658 PZ |
5431 | if (val < 0) |
5432 | return 0; | |
15dbf27c | 5433 | |
7b4b6658 PZ |
5434 | nr = div64_u64(period + val, period); |
5435 | offset = nr * period; | |
5436 | val -= offset; | |
e7850595 | 5437 | if (local64_cmpxchg(&hwc->period_left, old, val) != old) |
7b4b6658 | 5438 | goto again; |
15dbf27c | 5439 | |
7b4b6658 | 5440 | return nr; |
15dbf27c PZ |
5441 | } |
5442 | ||
0cff784a | 5443 | static void perf_swevent_overflow(struct perf_event *event, u64 overflow, |
a8b0ca17 | 5444 | struct perf_sample_data *data, |
5622f295 | 5445 | struct pt_regs *regs) |
15dbf27c | 5446 | { |
cdd6c482 | 5447 | struct hw_perf_event *hwc = &event->hw; |
850bc73f | 5448 | int throttle = 0; |
15dbf27c | 5449 | |
0cff784a PZ |
5450 | if (!overflow) |
5451 | overflow = perf_swevent_set_period(event); | |
15dbf27c | 5452 | |
7b4b6658 PZ |
5453 | if (hwc->interrupts == MAX_INTERRUPTS) |
5454 | return; | |
15dbf27c | 5455 | |
7b4b6658 | 5456 | for (; overflow; overflow--) { |
a8b0ca17 | 5457 | if (__perf_event_overflow(event, throttle, |
5622f295 | 5458 | data, regs)) { |
7b4b6658 PZ |
5459 | /* |
5460 | * We inhibit the overflow from happening when | |
5461 | * hwc->interrupts == MAX_INTERRUPTS. | |
5462 | */ | |
5463 | break; | |
5464 | } | |
cf450a73 | 5465 | throttle = 1; |
7b4b6658 | 5466 | } |
15dbf27c PZ |
5467 | } |
5468 | ||
a4eaf7f1 | 5469 | static void perf_swevent_event(struct perf_event *event, u64 nr, |
a8b0ca17 | 5470 | struct perf_sample_data *data, |
5622f295 | 5471 | struct pt_regs *regs) |
7b4b6658 | 5472 | { |
cdd6c482 | 5473 | struct hw_perf_event *hwc = &event->hw; |
d6d020e9 | 5474 | |
e7850595 | 5475 | local64_add(nr, &event->count); |
d6d020e9 | 5476 | |
0cff784a PZ |
5477 | if (!regs) |
5478 | return; | |
5479 | ||
6c7e550f | 5480 | if (!is_sampling_event(event)) |
7b4b6658 | 5481 | return; |
d6d020e9 | 5482 | |
5d81e5cf AV |
5483 | if ((event->attr.sample_type & PERF_SAMPLE_PERIOD) && !event->attr.freq) { |
5484 | data->period = nr; | |
5485 | return perf_swevent_overflow(event, 1, data, regs); | |
5486 | } else | |
5487 | data->period = event->hw.last_period; | |
5488 | ||
0cff784a | 5489 | if (nr == 1 && hwc->sample_period == 1 && !event->attr.freq) |
a8b0ca17 | 5490 | return perf_swevent_overflow(event, 1, data, regs); |
0cff784a | 5491 | |
e7850595 | 5492 | if (local64_add_negative(nr, &hwc->period_left)) |
7b4b6658 | 5493 | return; |
df1a132b | 5494 | |
a8b0ca17 | 5495 | perf_swevent_overflow(event, 0, data, regs); |
d6d020e9 PZ |
5496 | } |
5497 | ||
f5ffe02e FW |
5498 | static int perf_exclude_event(struct perf_event *event, |
5499 | struct pt_regs *regs) | |
5500 | { | |
a4eaf7f1 | 5501 | if (event->hw.state & PERF_HES_STOPPED) |
91b2f482 | 5502 | return 1; |
a4eaf7f1 | 5503 | |
f5ffe02e FW |
5504 | if (regs) { |
5505 | if (event->attr.exclude_user && user_mode(regs)) | |
5506 | return 1; | |
5507 | ||
5508 | if (event->attr.exclude_kernel && !user_mode(regs)) | |
5509 | return 1; | |
5510 | } | |
5511 | ||
5512 | return 0; | |
5513 | } | |
5514 | ||
cdd6c482 | 5515 | static int perf_swevent_match(struct perf_event *event, |
1c432d89 | 5516 | enum perf_type_id type, |
6fb2915d LZ |
5517 | u32 event_id, |
5518 | struct perf_sample_data *data, | |
5519 | struct pt_regs *regs) | |
15dbf27c | 5520 | { |
cdd6c482 | 5521 | if (event->attr.type != type) |
a21ca2ca | 5522 | return 0; |
f5ffe02e | 5523 | |
cdd6c482 | 5524 | if (event->attr.config != event_id) |
15dbf27c PZ |
5525 | return 0; |
5526 | ||
f5ffe02e FW |
5527 | if (perf_exclude_event(event, regs)) |
5528 | return 0; | |
15dbf27c PZ |
5529 | |
5530 | return 1; | |
5531 | } | |
5532 | ||
76e1d904 FW |
5533 | static inline u64 swevent_hash(u64 type, u32 event_id) |
5534 | { | |
5535 | u64 val = event_id | (type << 32); | |
5536 | ||
5537 | return hash_64(val, SWEVENT_HLIST_BITS); | |
5538 | } | |
5539 | ||
49f135ed FW |
5540 | static inline struct hlist_head * |
5541 | __find_swevent_head(struct swevent_hlist *hlist, u64 type, u32 event_id) | |
76e1d904 | 5542 | { |
49f135ed FW |
5543 | u64 hash = swevent_hash(type, event_id); |
5544 | ||
5545 | return &hlist->heads[hash]; | |
5546 | } | |
76e1d904 | 5547 | |
49f135ed FW |
5548 | /* For the read side: events when they trigger */ |
5549 | static inline struct hlist_head * | |
b28ab83c | 5550 | find_swevent_head_rcu(struct swevent_htable *swhash, u64 type, u32 event_id) |
49f135ed FW |
5551 | { |
5552 | struct swevent_hlist *hlist; | |
76e1d904 | 5553 | |
b28ab83c | 5554 | hlist = rcu_dereference(swhash->swevent_hlist); |
76e1d904 FW |
5555 | if (!hlist) |
5556 | return NULL; | |
5557 | ||
49f135ed FW |
5558 | return __find_swevent_head(hlist, type, event_id); |
5559 | } | |
5560 | ||
5561 | /* For the event head insertion and removal in the hlist */ | |
5562 | static inline struct hlist_head * | |
b28ab83c | 5563 | find_swevent_head(struct swevent_htable *swhash, struct perf_event *event) |
49f135ed FW |
5564 | { |
5565 | struct swevent_hlist *hlist; | |
5566 | u32 event_id = event->attr.config; | |
5567 | u64 type = event->attr.type; | |
5568 | ||
5569 | /* | |
5570 | * Event scheduling is always serialized against hlist allocation | |
5571 | * and release. Which makes the protected version suitable here. | |
5572 | * The context lock guarantees that. | |
5573 | */ | |
b28ab83c | 5574 | hlist = rcu_dereference_protected(swhash->swevent_hlist, |
49f135ed FW |
5575 | lockdep_is_held(&event->ctx->lock)); |
5576 | if (!hlist) | |
5577 | return NULL; | |
5578 | ||
5579 | return __find_swevent_head(hlist, type, event_id); | |
76e1d904 FW |
5580 | } |
5581 | ||
5582 | static void do_perf_sw_event(enum perf_type_id type, u32 event_id, | |
a8b0ca17 | 5583 | u64 nr, |
76e1d904 FW |
5584 | struct perf_sample_data *data, |
5585 | struct pt_regs *regs) | |
15dbf27c | 5586 | { |
b28ab83c | 5587 | struct swevent_htable *swhash = &__get_cpu_var(swevent_htable); |
cdd6c482 | 5588 | struct perf_event *event; |
76e1d904 | 5589 | struct hlist_head *head; |
15dbf27c | 5590 | |
76e1d904 | 5591 | rcu_read_lock(); |
b28ab83c | 5592 | head = find_swevent_head_rcu(swhash, type, event_id); |
76e1d904 FW |
5593 | if (!head) |
5594 | goto end; | |
5595 | ||
b67bfe0d | 5596 | hlist_for_each_entry_rcu(event, head, hlist_entry) { |
6fb2915d | 5597 | if (perf_swevent_match(event, type, event_id, data, regs)) |
a8b0ca17 | 5598 | perf_swevent_event(event, nr, data, regs); |
15dbf27c | 5599 | } |
76e1d904 FW |
5600 | end: |
5601 | rcu_read_unlock(); | |
15dbf27c PZ |
5602 | } |
5603 | ||
4ed7c92d | 5604 | int perf_swevent_get_recursion_context(void) |
96f6d444 | 5605 | { |
b28ab83c | 5606 | struct swevent_htable *swhash = &__get_cpu_var(swevent_htable); |
96f6d444 | 5607 | |
b28ab83c | 5608 | return get_recursion_context(swhash->recursion); |
96f6d444 | 5609 | } |
645e8cc0 | 5610 | EXPORT_SYMBOL_GPL(perf_swevent_get_recursion_context); |
96f6d444 | 5611 | |
fa9f90be | 5612 | inline void perf_swevent_put_recursion_context(int rctx) |
15dbf27c | 5613 | { |
b28ab83c | 5614 | struct swevent_htable *swhash = &__get_cpu_var(swevent_htable); |
927c7a9e | 5615 | |
b28ab83c | 5616 | put_recursion_context(swhash->recursion, rctx); |
ce71b9df | 5617 | } |
15dbf27c | 5618 | |
a8b0ca17 | 5619 | void __perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) |
b8e83514 | 5620 | { |
a4234bfc | 5621 | struct perf_sample_data data; |
4ed7c92d PZ |
5622 | int rctx; |
5623 | ||
1c024eca | 5624 | preempt_disable_notrace(); |
4ed7c92d PZ |
5625 | rctx = perf_swevent_get_recursion_context(); |
5626 | if (rctx < 0) | |
5627 | return; | |
a4234bfc | 5628 | |
fd0d000b | 5629 | perf_sample_data_init(&data, addr, 0); |
92bf309a | 5630 | |
a8b0ca17 | 5631 | do_perf_sw_event(PERF_TYPE_SOFTWARE, event_id, nr, &data, regs); |
4ed7c92d PZ |
5632 | |
5633 | perf_swevent_put_recursion_context(rctx); | |
1c024eca | 5634 | preempt_enable_notrace(); |
b8e83514 PZ |
5635 | } |
5636 | ||
cdd6c482 | 5637 | static void perf_swevent_read(struct perf_event *event) |
15dbf27c | 5638 | { |
15dbf27c PZ |
5639 | } |
5640 | ||
a4eaf7f1 | 5641 | static int perf_swevent_add(struct perf_event *event, int flags) |
15dbf27c | 5642 | { |
b28ab83c | 5643 | struct swevent_htable *swhash = &__get_cpu_var(swevent_htable); |
cdd6c482 | 5644 | struct hw_perf_event *hwc = &event->hw; |
76e1d904 FW |
5645 | struct hlist_head *head; |
5646 | ||
6c7e550f | 5647 | if (is_sampling_event(event)) { |
7b4b6658 | 5648 | hwc->last_period = hwc->sample_period; |
cdd6c482 | 5649 | perf_swevent_set_period(event); |
7b4b6658 | 5650 | } |
76e1d904 | 5651 | |
a4eaf7f1 PZ |
5652 | hwc->state = !(flags & PERF_EF_START); |
5653 | ||
b28ab83c | 5654 | head = find_swevent_head(swhash, event); |
76e1d904 FW |
5655 | if (WARN_ON_ONCE(!head)) |
5656 | return -EINVAL; | |
5657 | ||
5658 | hlist_add_head_rcu(&event->hlist_entry, head); | |
5659 | ||
15dbf27c PZ |
5660 | return 0; |
5661 | } | |
5662 | ||
a4eaf7f1 | 5663 | static void perf_swevent_del(struct perf_event *event, int flags) |
15dbf27c | 5664 | { |
76e1d904 | 5665 | hlist_del_rcu(&event->hlist_entry); |
15dbf27c PZ |
5666 | } |
5667 | ||
a4eaf7f1 | 5668 | static void perf_swevent_start(struct perf_event *event, int flags) |
5c92d124 | 5669 | { |
a4eaf7f1 | 5670 | event->hw.state = 0; |
d6d020e9 | 5671 | } |
aa9c4c0f | 5672 | |
a4eaf7f1 | 5673 | static void perf_swevent_stop(struct perf_event *event, int flags) |
d6d020e9 | 5674 | { |
a4eaf7f1 | 5675 | event->hw.state = PERF_HES_STOPPED; |
bae43c99 IM |
5676 | } |
5677 | ||
49f135ed FW |
5678 | /* Deref the hlist from the update side */ |
5679 | static inline struct swevent_hlist * | |
b28ab83c | 5680 | swevent_hlist_deref(struct swevent_htable *swhash) |
49f135ed | 5681 | { |
b28ab83c PZ |
5682 | return rcu_dereference_protected(swhash->swevent_hlist, |
5683 | lockdep_is_held(&swhash->hlist_mutex)); | |
49f135ed FW |
5684 | } |
5685 | ||
b28ab83c | 5686 | static void swevent_hlist_release(struct swevent_htable *swhash) |
76e1d904 | 5687 | { |
b28ab83c | 5688 | struct swevent_hlist *hlist = swevent_hlist_deref(swhash); |
76e1d904 | 5689 | |
49f135ed | 5690 | if (!hlist) |
76e1d904 FW |
5691 | return; |
5692 | ||
b28ab83c | 5693 | rcu_assign_pointer(swhash->swevent_hlist, NULL); |
fa4bbc4c | 5694 | kfree_rcu(hlist, rcu_head); |
76e1d904 FW |
5695 | } |
5696 | ||
5697 | static void swevent_hlist_put_cpu(struct perf_event *event, int cpu) | |
5698 | { | |
b28ab83c | 5699 | struct swevent_htable *swhash = &per_cpu(swevent_htable, cpu); |
76e1d904 | 5700 | |
b28ab83c | 5701 | mutex_lock(&swhash->hlist_mutex); |
76e1d904 | 5702 | |
b28ab83c PZ |
5703 | if (!--swhash->hlist_refcount) |
5704 | swevent_hlist_release(swhash); | |
76e1d904 | 5705 | |
b28ab83c | 5706 | mutex_unlock(&swhash->hlist_mutex); |
76e1d904 FW |
5707 | } |
5708 | ||
5709 | static void swevent_hlist_put(struct perf_event *event) | |
5710 | { | |
5711 | int cpu; | |
5712 | ||
76e1d904 FW |
5713 | for_each_possible_cpu(cpu) |
5714 | swevent_hlist_put_cpu(event, cpu); | |
5715 | } | |
5716 | ||
5717 | static int swevent_hlist_get_cpu(struct perf_event *event, int cpu) | |
5718 | { | |
b28ab83c | 5719 | struct swevent_htable *swhash = &per_cpu(swevent_htable, cpu); |
76e1d904 FW |
5720 | int err = 0; |
5721 | ||
b28ab83c | 5722 | mutex_lock(&swhash->hlist_mutex); |
76e1d904 | 5723 | |
b28ab83c | 5724 | if (!swevent_hlist_deref(swhash) && cpu_online(cpu)) { |
76e1d904 FW |
5725 | struct swevent_hlist *hlist; |
5726 | ||
5727 | hlist = kzalloc(sizeof(*hlist), GFP_KERNEL); | |
5728 | if (!hlist) { | |
5729 | err = -ENOMEM; | |
5730 | goto exit; | |
5731 | } | |
b28ab83c | 5732 | rcu_assign_pointer(swhash->swevent_hlist, hlist); |
76e1d904 | 5733 | } |
b28ab83c | 5734 | swhash->hlist_refcount++; |
9ed6060d | 5735 | exit: |
b28ab83c | 5736 | mutex_unlock(&swhash->hlist_mutex); |
76e1d904 FW |
5737 | |
5738 | return err; | |
5739 | } | |
5740 | ||
5741 | static int swevent_hlist_get(struct perf_event *event) | |
5742 | { | |
5743 | int err; | |
5744 | int cpu, failed_cpu; | |
5745 | ||
76e1d904 FW |
5746 | get_online_cpus(); |
5747 | for_each_possible_cpu(cpu) { | |
5748 | err = swevent_hlist_get_cpu(event, cpu); | |
5749 | if (err) { | |
5750 | failed_cpu = cpu; | |
5751 | goto fail; | |
5752 | } | |
5753 | } | |
5754 | put_online_cpus(); | |
5755 | ||
5756 | return 0; | |
9ed6060d | 5757 | fail: |
76e1d904 FW |
5758 | for_each_possible_cpu(cpu) { |
5759 | if (cpu == failed_cpu) | |
5760 | break; | |
5761 | swevent_hlist_put_cpu(event, cpu); | |
5762 | } | |
5763 | ||
5764 | put_online_cpus(); | |
5765 | return err; | |
5766 | } | |
5767 | ||
c5905afb | 5768 | struct static_key perf_swevent_enabled[PERF_COUNT_SW_MAX]; |
95476b64 | 5769 | |
b0a873eb PZ |
5770 | static void sw_perf_event_destroy(struct perf_event *event) |
5771 | { | |
5772 | u64 event_id = event->attr.config; | |
95476b64 | 5773 | |
b0a873eb PZ |
5774 | WARN_ON(event->parent); |
5775 | ||
c5905afb | 5776 | static_key_slow_dec(&perf_swevent_enabled[event_id]); |
b0a873eb PZ |
5777 | swevent_hlist_put(event); |
5778 | } | |
5779 | ||
5780 | static int perf_swevent_init(struct perf_event *event) | |
5781 | { | |
8176cced | 5782 | u64 event_id = event->attr.config; |
b0a873eb PZ |
5783 | |
5784 | if (event->attr.type != PERF_TYPE_SOFTWARE) | |
5785 | return -ENOENT; | |
5786 | ||
2481c5fa SE |
5787 | /* |
5788 | * no branch sampling for software events | |
5789 | */ | |
5790 | if (has_branch_stack(event)) | |
5791 | return -EOPNOTSUPP; | |
5792 | ||
b0a873eb PZ |
5793 | switch (event_id) { |
5794 | case PERF_COUNT_SW_CPU_CLOCK: | |
5795 | case PERF_COUNT_SW_TASK_CLOCK: | |
5796 | return -ENOENT; | |
5797 | ||
5798 | default: | |
5799 | break; | |
5800 | } | |
5801 | ||
ce677831 | 5802 | if (event_id >= PERF_COUNT_SW_MAX) |
b0a873eb PZ |
5803 | return -ENOENT; |
5804 | ||
5805 | if (!event->parent) { | |
5806 | int err; | |
5807 | ||
5808 | err = swevent_hlist_get(event); | |
5809 | if (err) | |
5810 | return err; | |
5811 | ||
c5905afb | 5812 | static_key_slow_inc(&perf_swevent_enabled[event_id]); |
b0a873eb PZ |
5813 | event->destroy = sw_perf_event_destroy; |
5814 | } | |
5815 | ||
5816 | return 0; | |
5817 | } | |
5818 | ||
35edc2a5 PZ |
5819 | static int perf_swevent_event_idx(struct perf_event *event) |
5820 | { | |
5821 | return 0; | |
5822 | } | |
5823 | ||
b0a873eb | 5824 | static struct pmu perf_swevent = { |
89a1e187 | 5825 | .task_ctx_nr = perf_sw_context, |
95476b64 | 5826 | |
b0a873eb | 5827 | .event_init = perf_swevent_init, |
a4eaf7f1 PZ |
5828 | .add = perf_swevent_add, |
5829 | .del = perf_swevent_del, | |
5830 | .start = perf_swevent_start, | |
5831 | .stop = perf_swevent_stop, | |
1c024eca | 5832 | .read = perf_swevent_read, |
35edc2a5 PZ |
5833 | |
5834 | .event_idx = perf_swevent_event_idx, | |
1c024eca PZ |
5835 | }; |
5836 | ||
b0a873eb PZ |
5837 | #ifdef CONFIG_EVENT_TRACING |
5838 | ||
1c024eca PZ |
5839 | static int perf_tp_filter_match(struct perf_event *event, |
5840 | struct perf_sample_data *data) | |
5841 | { | |
5842 | void *record = data->raw->data; | |
5843 | ||
5844 | if (likely(!event->filter) || filter_match_preds(event->filter, record)) | |
5845 | return 1; | |
5846 | return 0; | |
5847 | } | |
5848 | ||
5849 | static int perf_tp_event_match(struct perf_event *event, | |
5850 | struct perf_sample_data *data, | |
5851 | struct pt_regs *regs) | |
5852 | { | |
a0f7d0f7 FW |
5853 | if (event->hw.state & PERF_HES_STOPPED) |
5854 | return 0; | |
580d607c PZ |
5855 | /* |
5856 | * All tracepoints are from kernel-space. | |
5857 | */ | |
5858 | if (event->attr.exclude_kernel) | |
1c024eca PZ |
5859 | return 0; |
5860 | ||
5861 | if (!perf_tp_filter_match(event, data)) | |
5862 | return 0; | |
5863 | ||
5864 | return 1; | |
5865 | } | |
5866 | ||
5867 | void perf_tp_event(u64 addr, u64 count, void *record, int entry_size, | |
e6dab5ff AV |
5868 | struct pt_regs *regs, struct hlist_head *head, int rctx, |
5869 | struct task_struct *task) | |
95476b64 FW |
5870 | { |
5871 | struct perf_sample_data data; | |
1c024eca | 5872 | struct perf_event *event; |
1c024eca | 5873 | |
95476b64 FW |
5874 | struct perf_raw_record raw = { |
5875 | .size = entry_size, | |
5876 | .data = record, | |
5877 | }; | |
5878 | ||
fd0d000b | 5879 | perf_sample_data_init(&data, addr, 0); |
95476b64 FW |
5880 | data.raw = &raw; |
5881 | ||
b67bfe0d | 5882 | hlist_for_each_entry_rcu(event, head, hlist_entry) { |
1c024eca | 5883 | if (perf_tp_event_match(event, &data, regs)) |
a8b0ca17 | 5884 | perf_swevent_event(event, count, &data, regs); |
4f41c013 | 5885 | } |
ecc55f84 | 5886 | |
e6dab5ff AV |
5887 | /* |
5888 | * If we got specified a target task, also iterate its context and | |
5889 | * deliver this event there too. | |
5890 | */ | |
5891 | if (task && task != current) { | |
5892 | struct perf_event_context *ctx; | |
5893 | struct trace_entry *entry = record; | |
5894 | ||
5895 | rcu_read_lock(); | |
5896 | ctx = rcu_dereference(task->perf_event_ctxp[perf_sw_context]); | |
5897 | if (!ctx) | |
5898 | goto unlock; | |
5899 | ||
5900 | list_for_each_entry_rcu(event, &ctx->event_list, event_entry) { | |
5901 | if (event->attr.type != PERF_TYPE_TRACEPOINT) | |
5902 | continue; | |
5903 | if (event->attr.config != entry->type) | |
5904 | continue; | |
5905 | if (perf_tp_event_match(event, &data, regs)) | |
5906 | perf_swevent_event(event, count, &data, regs); | |
5907 | } | |
5908 | unlock: | |
5909 | rcu_read_unlock(); | |
5910 | } | |
5911 | ||
ecc55f84 | 5912 | perf_swevent_put_recursion_context(rctx); |
95476b64 FW |
5913 | } |
5914 | EXPORT_SYMBOL_GPL(perf_tp_event); | |
5915 | ||
cdd6c482 | 5916 | static void tp_perf_event_destroy(struct perf_event *event) |
e077df4f | 5917 | { |
1c024eca | 5918 | perf_trace_destroy(event); |
e077df4f PZ |
5919 | } |
5920 | ||
b0a873eb | 5921 | static int perf_tp_event_init(struct perf_event *event) |
e077df4f | 5922 | { |
76e1d904 FW |
5923 | int err; |
5924 | ||
b0a873eb PZ |
5925 | if (event->attr.type != PERF_TYPE_TRACEPOINT) |
5926 | return -ENOENT; | |
5927 | ||
2481c5fa SE |
5928 | /* |
5929 | * no branch sampling for tracepoint events | |
5930 | */ | |
5931 | if (has_branch_stack(event)) | |
5932 | return -EOPNOTSUPP; | |
5933 | ||
1c024eca PZ |
5934 | err = perf_trace_init(event); |
5935 | if (err) | |
b0a873eb | 5936 | return err; |
e077df4f | 5937 | |
cdd6c482 | 5938 | event->destroy = tp_perf_event_destroy; |
e077df4f | 5939 | |
b0a873eb PZ |
5940 | return 0; |
5941 | } | |
5942 | ||
5943 | static struct pmu perf_tracepoint = { | |
89a1e187 PZ |
5944 | .task_ctx_nr = perf_sw_context, |
5945 | ||
b0a873eb | 5946 | .event_init = perf_tp_event_init, |
a4eaf7f1 PZ |
5947 | .add = perf_trace_add, |
5948 | .del = perf_trace_del, | |
5949 | .start = perf_swevent_start, | |
5950 | .stop = perf_swevent_stop, | |
b0a873eb | 5951 | .read = perf_swevent_read, |
35edc2a5 PZ |
5952 | |
5953 | .event_idx = perf_swevent_event_idx, | |
b0a873eb PZ |
5954 | }; |
5955 | ||
5956 | static inline void perf_tp_register(void) | |
5957 | { | |
2e80a82a | 5958 | perf_pmu_register(&perf_tracepoint, "tracepoint", PERF_TYPE_TRACEPOINT); |
e077df4f | 5959 | } |
6fb2915d LZ |
5960 | |
5961 | static int perf_event_set_filter(struct perf_event *event, void __user *arg) | |
5962 | { | |
5963 | char *filter_str; | |
5964 | int ret; | |
5965 | ||
5966 | if (event->attr.type != PERF_TYPE_TRACEPOINT) | |
5967 | return -EINVAL; | |
5968 | ||
5969 | filter_str = strndup_user(arg, PAGE_SIZE); | |
5970 | if (IS_ERR(filter_str)) | |
5971 | return PTR_ERR(filter_str); | |
5972 | ||
5973 | ret = ftrace_profile_set_filter(event, event->attr.config, filter_str); | |
5974 | ||
5975 | kfree(filter_str); | |
5976 | return ret; | |
5977 | } | |
5978 | ||
5979 | static void perf_event_free_filter(struct perf_event *event) | |
5980 | { | |
5981 | ftrace_profile_free_filter(event); | |
5982 | } | |
5983 | ||
e077df4f | 5984 | #else |
6fb2915d | 5985 | |
b0a873eb | 5986 | static inline void perf_tp_register(void) |
e077df4f | 5987 | { |
e077df4f | 5988 | } |
6fb2915d LZ |
5989 | |
5990 | static int perf_event_set_filter(struct perf_event *event, void __user *arg) | |
5991 | { | |
5992 | return -ENOENT; | |
5993 | } | |
5994 | ||
5995 | static void perf_event_free_filter(struct perf_event *event) | |
5996 | { | |
5997 | } | |
5998 | ||
07b139c8 | 5999 | #endif /* CONFIG_EVENT_TRACING */ |
e077df4f | 6000 | |
24f1e32c | 6001 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
f5ffe02e | 6002 | void perf_bp_event(struct perf_event *bp, void *data) |
24f1e32c | 6003 | { |
f5ffe02e FW |
6004 | struct perf_sample_data sample; |
6005 | struct pt_regs *regs = data; | |
6006 | ||
fd0d000b | 6007 | perf_sample_data_init(&sample, bp->attr.bp_addr, 0); |
f5ffe02e | 6008 | |
a4eaf7f1 | 6009 | if (!bp->hw.state && !perf_exclude_event(bp, regs)) |
a8b0ca17 | 6010 | perf_swevent_event(bp, 1, &sample, regs); |
24f1e32c FW |
6011 | } |
6012 | #endif | |
6013 | ||
b0a873eb PZ |
6014 | /* |
6015 | * hrtimer based swevent callback | |
6016 | */ | |
f29ac756 | 6017 | |
b0a873eb | 6018 | static enum hrtimer_restart perf_swevent_hrtimer(struct hrtimer *hrtimer) |
f29ac756 | 6019 | { |
b0a873eb PZ |
6020 | enum hrtimer_restart ret = HRTIMER_RESTART; |
6021 | struct perf_sample_data data; | |
6022 | struct pt_regs *regs; | |
6023 | struct perf_event *event; | |
6024 | u64 period; | |
f29ac756 | 6025 | |
b0a873eb | 6026 | event = container_of(hrtimer, struct perf_event, hw.hrtimer); |
ba3dd36c PZ |
6027 | |
6028 | if (event->state != PERF_EVENT_STATE_ACTIVE) | |
6029 | return HRTIMER_NORESTART; | |
6030 | ||
b0a873eb | 6031 | event->pmu->read(event); |
f344011c | 6032 | |
fd0d000b | 6033 | perf_sample_data_init(&data, 0, event->hw.last_period); |
b0a873eb PZ |
6034 | regs = get_irq_regs(); |
6035 | ||
6036 | if (regs && !perf_exclude_event(event, regs)) { | |
77aeeebd | 6037 | if (!(event->attr.exclude_idle && is_idle_task(current))) |
33b07b8b | 6038 | if (__perf_event_overflow(event, 1, &data, regs)) |
b0a873eb PZ |
6039 | ret = HRTIMER_NORESTART; |
6040 | } | |
24f1e32c | 6041 | |
b0a873eb PZ |
6042 | period = max_t(u64, 10000, event->hw.sample_period); |
6043 | hrtimer_forward_now(hrtimer, ns_to_ktime(period)); | |
24f1e32c | 6044 | |
b0a873eb | 6045 | return ret; |
f29ac756 PZ |
6046 | } |
6047 | ||
b0a873eb | 6048 | static void perf_swevent_start_hrtimer(struct perf_event *event) |
5c92d124 | 6049 | { |
b0a873eb | 6050 | struct hw_perf_event *hwc = &event->hw; |
5d508e82 FBH |
6051 | s64 period; |
6052 | ||
6053 | if (!is_sampling_event(event)) | |
6054 | return; | |
f5ffe02e | 6055 | |
5d508e82 FBH |
6056 | period = local64_read(&hwc->period_left); |
6057 | if (period) { | |
6058 | if (period < 0) | |
6059 | period = 10000; | |
fa407f35 | 6060 | |
5d508e82 FBH |
6061 | local64_set(&hwc->period_left, 0); |
6062 | } else { | |
6063 | period = max_t(u64, 10000, hwc->sample_period); | |
6064 | } | |
6065 | __hrtimer_start_range_ns(&hwc->hrtimer, | |
b0a873eb | 6066 | ns_to_ktime(period), 0, |
b5ab4cd5 | 6067 | HRTIMER_MODE_REL_PINNED, 0); |
24f1e32c | 6068 | } |
b0a873eb PZ |
6069 | |
6070 | static void perf_swevent_cancel_hrtimer(struct perf_event *event) | |
24f1e32c | 6071 | { |
b0a873eb PZ |
6072 | struct hw_perf_event *hwc = &event->hw; |
6073 | ||
6c7e550f | 6074 | if (is_sampling_event(event)) { |
b0a873eb | 6075 | ktime_t remaining = hrtimer_get_remaining(&hwc->hrtimer); |
fa407f35 | 6076 | local64_set(&hwc->period_left, ktime_to_ns(remaining)); |
b0a873eb PZ |
6077 | |
6078 | hrtimer_cancel(&hwc->hrtimer); | |
6079 | } | |
24f1e32c FW |
6080 | } |
6081 | ||
ba3dd36c PZ |
6082 | static void perf_swevent_init_hrtimer(struct perf_event *event) |
6083 | { | |
6084 | struct hw_perf_event *hwc = &event->hw; | |
6085 | ||
6086 | if (!is_sampling_event(event)) | |
6087 | return; | |
6088 | ||
6089 | hrtimer_init(&hwc->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); | |
6090 | hwc->hrtimer.function = perf_swevent_hrtimer; | |
6091 | ||
6092 | /* | |
6093 | * Since hrtimers have a fixed rate, we can do a static freq->period | |
6094 | * mapping and avoid the whole period adjust feedback stuff. | |
6095 | */ | |
6096 | if (event->attr.freq) { | |
6097 | long freq = event->attr.sample_freq; | |
6098 | ||
6099 | event->attr.sample_period = NSEC_PER_SEC / freq; | |
6100 | hwc->sample_period = event->attr.sample_period; | |
6101 | local64_set(&hwc->period_left, hwc->sample_period); | |
778141e3 | 6102 | hwc->last_period = hwc->sample_period; |
ba3dd36c PZ |
6103 | event->attr.freq = 0; |
6104 | } | |
6105 | } | |
6106 | ||
b0a873eb PZ |
6107 | /* |
6108 | * Software event: cpu wall time clock | |
6109 | */ | |
6110 | ||
6111 | static void cpu_clock_event_update(struct perf_event *event) | |
24f1e32c | 6112 | { |
b0a873eb PZ |
6113 | s64 prev; |
6114 | u64 now; | |
6115 | ||
a4eaf7f1 | 6116 | now = local_clock(); |
b0a873eb PZ |
6117 | prev = local64_xchg(&event->hw.prev_count, now); |
6118 | local64_add(now - prev, &event->count); | |
24f1e32c | 6119 | } |
24f1e32c | 6120 | |
a4eaf7f1 | 6121 | static void cpu_clock_event_start(struct perf_event *event, int flags) |
b0a873eb | 6122 | { |
a4eaf7f1 | 6123 | local64_set(&event->hw.prev_count, local_clock()); |
b0a873eb | 6124 | perf_swevent_start_hrtimer(event); |
b0a873eb PZ |
6125 | } |
6126 | ||
a4eaf7f1 | 6127 | static void cpu_clock_event_stop(struct perf_event *event, int flags) |
f29ac756 | 6128 | { |
b0a873eb PZ |
6129 | perf_swevent_cancel_hrtimer(event); |
6130 | cpu_clock_event_update(event); | |
6131 | } | |
f29ac756 | 6132 | |
a4eaf7f1 PZ |
6133 | static int cpu_clock_event_add(struct perf_event *event, int flags) |
6134 | { | |
6135 | if (flags & PERF_EF_START) | |
6136 | cpu_clock_event_start(event, flags); | |
6137 | ||
6138 | return 0; | |
6139 | } | |
6140 | ||
6141 | static void cpu_clock_event_del(struct perf_event *event, int flags) | |
6142 | { | |
6143 | cpu_clock_event_stop(event, flags); | |
6144 | } | |
6145 | ||
b0a873eb PZ |
6146 | static void cpu_clock_event_read(struct perf_event *event) |
6147 | { | |
6148 | cpu_clock_event_update(event); | |
6149 | } | |
f344011c | 6150 | |
b0a873eb PZ |
6151 | static int cpu_clock_event_init(struct perf_event *event) |
6152 | { | |
6153 | if (event->attr.type != PERF_TYPE_SOFTWARE) | |
6154 | return -ENOENT; | |
6155 | ||
6156 | if (event->attr.config != PERF_COUNT_SW_CPU_CLOCK) | |
6157 | return -ENOENT; | |
6158 | ||
2481c5fa SE |
6159 | /* |
6160 | * no branch sampling for software events | |
6161 | */ | |
6162 | if (has_branch_stack(event)) | |
6163 | return -EOPNOTSUPP; | |
6164 | ||
ba3dd36c PZ |
6165 | perf_swevent_init_hrtimer(event); |
6166 | ||
b0a873eb | 6167 | return 0; |
f29ac756 PZ |
6168 | } |
6169 | ||
b0a873eb | 6170 | static struct pmu perf_cpu_clock = { |
89a1e187 PZ |
6171 | .task_ctx_nr = perf_sw_context, |
6172 | ||
b0a873eb | 6173 | .event_init = cpu_clock_event_init, |
a4eaf7f1 PZ |
6174 | .add = cpu_clock_event_add, |
6175 | .del = cpu_clock_event_del, | |
6176 | .start = cpu_clock_event_start, | |
6177 | .stop = cpu_clock_event_stop, | |
b0a873eb | 6178 | .read = cpu_clock_event_read, |
35edc2a5 PZ |
6179 | |
6180 | .event_idx = perf_swevent_event_idx, | |
b0a873eb PZ |
6181 | }; |
6182 | ||
6183 | /* | |
6184 | * Software event: task time clock | |
6185 | */ | |
6186 | ||
6187 | static void task_clock_event_update(struct perf_event *event, u64 now) | |
5c92d124 | 6188 | { |
b0a873eb PZ |
6189 | u64 prev; |
6190 | s64 delta; | |
5c92d124 | 6191 | |
b0a873eb PZ |
6192 | prev = local64_xchg(&event->hw.prev_count, now); |
6193 | delta = now - prev; | |
6194 | local64_add(delta, &event->count); | |
6195 | } | |
5c92d124 | 6196 | |
a4eaf7f1 | 6197 | static void task_clock_event_start(struct perf_event *event, int flags) |
b0a873eb | 6198 | { |
a4eaf7f1 | 6199 | local64_set(&event->hw.prev_count, event->ctx->time); |
b0a873eb | 6200 | perf_swevent_start_hrtimer(event); |
b0a873eb PZ |
6201 | } |
6202 | ||
a4eaf7f1 | 6203 | static void task_clock_event_stop(struct perf_event *event, int flags) |
b0a873eb PZ |
6204 | { |
6205 | perf_swevent_cancel_hrtimer(event); | |
6206 | task_clock_event_update(event, event->ctx->time); | |
a4eaf7f1 PZ |
6207 | } |
6208 | ||
6209 | static int task_clock_event_add(struct perf_event *event, int flags) | |
6210 | { | |
6211 | if (flags & PERF_EF_START) | |
6212 | task_clock_event_start(event, flags); | |
b0a873eb | 6213 | |
a4eaf7f1 PZ |
6214 | return 0; |
6215 | } | |
6216 | ||
6217 | static void task_clock_event_del(struct perf_event *event, int flags) | |
6218 | { | |
6219 | task_clock_event_stop(event, PERF_EF_UPDATE); | |
b0a873eb PZ |
6220 | } |
6221 | ||
6222 | static void task_clock_event_read(struct perf_event *event) | |
6223 | { | |
768a06e2 PZ |
6224 | u64 now = perf_clock(); |
6225 | u64 delta = now - event->ctx->timestamp; | |
6226 | u64 time = event->ctx->time + delta; | |
b0a873eb PZ |
6227 | |
6228 | task_clock_event_update(event, time); | |
6229 | } | |
6230 | ||
6231 | static int task_clock_event_init(struct perf_event *event) | |
6fb2915d | 6232 | { |
b0a873eb PZ |
6233 | if (event->attr.type != PERF_TYPE_SOFTWARE) |
6234 | return -ENOENT; | |
6235 | ||
6236 | if (event->attr.config != PERF_COUNT_SW_TASK_CLOCK) | |
6237 | return -ENOENT; | |
6238 | ||
2481c5fa SE |
6239 | /* |
6240 | * no branch sampling for software events | |
6241 | */ | |
6242 | if (has_branch_stack(event)) | |
6243 | return -EOPNOTSUPP; | |
6244 | ||
ba3dd36c PZ |
6245 | perf_swevent_init_hrtimer(event); |
6246 | ||
b0a873eb | 6247 | return 0; |
6fb2915d LZ |
6248 | } |
6249 | ||
b0a873eb | 6250 | static struct pmu perf_task_clock = { |
89a1e187 PZ |
6251 | .task_ctx_nr = perf_sw_context, |
6252 | ||
b0a873eb | 6253 | .event_init = task_clock_event_init, |
a4eaf7f1 PZ |
6254 | .add = task_clock_event_add, |
6255 | .del = task_clock_event_del, | |
6256 | .start = task_clock_event_start, | |
6257 | .stop = task_clock_event_stop, | |
b0a873eb | 6258 | .read = task_clock_event_read, |
35edc2a5 PZ |
6259 | |
6260 | .event_idx = perf_swevent_event_idx, | |
b0a873eb | 6261 | }; |
6fb2915d | 6262 | |
ad5133b7 | 6263 | static void perf_pmu_nop_void(struct pmu *pmu) |
e077df4f | 6264 | { |
e077df4f | 6265 | } |
6fb2915d | 6266 | |
ad5133b7 | 6267 | static int perf_pmu_nop_int(struct pmu *pmu) |
6fb2915d | 6268 | { |
ad5133b7 | 6269 | return 0; |
6fb2915d LZ |
6270 | } |
6271 | ||
ad5133b7 | 6272 | static void perf_pmu_start_txn(struct pmu *pmu) |
6fb2915d | 6273 | { |
ad5133b7 | 6274 | perf_pmu_disable(pmu); |
6fb2915d LZ |
6275 | } |
6276 | ||
ad5133b7 PZ |
6277 | static int perf_pmu_commit_txn(struct pmu *pmu) |
6278 | { | |
6279 | perf_pmu_enable(pmu); | |
6280 | return 0; | |
6281 | } | |
e077df4f | 6282 | |
ad5133b7 | 6283 | static void perf_pmu_cancel_txn(struct pmu *pmu) |
24f1e32c | 6284 | { |
ad5133b7 | 6285 | perf_pmu_enable(pmu); |
24f1e32c FW |
6286 | } |
6287 | ||
35edc2a5 PZ |
6288 | static int perf_event_idx_default(struct perf_event *event) |
6289 | { | |
6290 | return event->hw.idx + 1; | |
6291 | } | |
6292 | ||
8dc85d54 PZ |
6293 | /* |
6294 | * Ensures all contexts with the same task_ctx_nr have the same | |
6295 | * pmu_cpu_context too. | |
6296 | */ | |
6297 | static void *find_pmu_context(int ctxn) | |
24f1e32c | 6298 | { |
8dc85d54 | 6299 | struct pmu *pmu; |
b326e956 | 6300 | |
8dc85d54 PZ |
6301 | if (ctxn < 0) |
6302 | return NULL; | |
24f1e32c | 6303 | |
8dc85d54 PZ |
6304 | list_for_each_entry(pmu, &pmus, entry) { |
6305 | if (pmu->task_ctx_nr == ctxn) | |
6306 | return pmu->pmu_cpu_context; | |
6307 | } | |
24f1e32c | 6308 | |
8dc85d54 | 6309 | return NULL; |
24f1e32c FW |
6310 | } |
6311 | ||
51676957 | 6312 | static void update_pmu_context(struct pmu *pmu, struct pmu *old_pmu) |
24f1e32c | 6313 | { |
51676957 PZ |
6314 | int cpu; |
6315 | ||
6316 | for_each_possible_cpu(cpu) { | |
6317 | struct perf_cpu_context *cpuctx; | |
6318 | ||
6319 | cpuctx = per_cpu_ptr(pmu->pmu_cpu_context, cpu); | |
6320 | ||
3f1f3320 PZ |
6321 | if (cpuctx->unique_pmu == old_pmu) |
6322 | cpuctx->unique_pmu = pmu; | |
51676957 PZ |
6323 | } |
6324 | } | |
6325 | ||
6326 | static void free_pmu_context(struct pmu *pmu) | |
6327 | { | |
6328 | struct pmu *i; | |
f5ffe02e | 6329 | |
8dc85d54 | 6330 | mutex_lock(&pmus_lock); |
0475f9ea | 6331 | /* |
8dc85d54 | 6332 | * Like a real lame refcount. |
0475f9ea | 6333 | */ |
51676957 PZ |
6334 | list_for_each_entry(i, &pmus, entry) { |
6335 | if (i->pmu_cpu_context == pmu->pmu_cpu_context) { | |
6336 | update_pmu_context(i, pmu); | |
8dc85d54 | 6337 | goto out; |
51676957 | 6338 | } |
8dc85d54 | 6339 | } |
d6d020e9 | 6340 | |
51676957 | 6341 | free_percpu(pmu->pmu_cpu_context); |
8dc85d54 PZ |
6342 | out: |
6343 | mutex_unlock(&pmus_lock); | |
24f1e32c | 6344 | } |
2e80a82a | 6345 | static struct idr pmu_idr; |
d6d020e9 | 6346 | |
abe43400 PZ |
6347 | static ssize_t |
6348 | type_show(struct device *dev, struct device_attribute *attr, char *page) | |
6349 | { | |
6350 | struct pmu *pmu = dev_get_drvdata(dev); | |
6351 | ||
6352 | return snprintf(page, PAGE_SIZE-1, "%d\n", pmu->type); | |
6353 | } | |
90826ca7 | 6354 | static DEVICE_ATTR_RO(type); |
abe43400 | 6355 | |
62b85639 SE |
6356 | static ssize_t |
6357 | perf_event_mux_interval_ms_show(struct device *dev, | |
6358 | struct device_attribute *attr, | |
6359 | char *page) | |
6360 | { | |
6361 | struct pmu *pmu = dev_get_drvdata(dev); | |
6362 | ||
6363 | return snprintf(page, PAGE_SIZE-1, "%d\n", pmu->hrtimer_interval_ms); | |
6364 | } | |
6365 | ||
6366 | static ssize_t | |
6367 | perf_event_mux_interval_ms_store(struct device *dev, | |
6368 | struct device_attribute *attr, | |
6369 | const char *buf, size_t count) | |
6370 | { | |
6371 | struct pmu *pmu = dev_get_drvdata(dev); | |
6372 | int timer, cpu, ret; | |
6373 | ||
6374 | ret = kstrtoint(buf, 0, &timer); | |
6375 | if (ret) | |
6376 | return ret; | |
6377 | ||
6378 | if (timer < 1) | |
6379 | return -EINVAL; | |
6380 | ||
6381 | /* same value, noting to do */ | |
6382 | if (timer == pmu->hrtimer_interval_ms) | |
6383 | return count; | |
6384 | ||
6385 | pmu->hrtimer_interval_ms = timer; | |
6386 | ||
6387 | /* update all cpuctx for this PMU */ | |
6388 | for_each_possible_cpu(cpu) { | |
6389 | struct perf_cpu_context *cpuctx; | |
6390 | cpuctx = per_cpu_ptr(pmu->pmu_cpu_context, cpu); | |
6391 | cpuctx->hrtimer_interval = ns_to_ktime(NSEC_PER_MSEC * timer); | |
6392 | ||
6393 | if (hrtimer_active(&cpuctx->hrtimer)) | |
6394 | hrtimer_forward_now(&cpuctx->hrtimer, cpuctx->hrtimer_interval); | |
6395 | } | |
6396 | ||
6397 | return count; | |
6398 | } | |
90826ca7 | 6399 | static DEVICE_ATTR_RW(perf_event_mux_interval_ms); |
62b85639 | 6400 | |
90826ca7 GKH |
6401 | static struct attribute *pmu_dev_attrs[] = { |
6402 | &dev_attr_type.attr, | |
6403 | &dev_attr_perf_event_mux_interval_ms.attr, | |
6404 | NULL, | |
abe43400 | 6405 | }; |
90826ca7 | 6406 | ATTRIBUTE_GROUPS(pmu_dev); |
abe43400 PZ |
6407 | |
6408 | static int pmu_bus_running; | |
6409 | static struct bus_type pmu_bus = { | |
6410 | .name = "event_source", | |
90826ca7 | 6411 | .dev_groups = pmu_dev_groups, |
abe43400 PZ |
6412 | }; |
6413 | ||
6414 | static void pmu_dev_release(struct device *dev) | |
6415 | { | |
6416 | kfree(dev); | |
6417 | } | |
6418 | ||
6419 | static int pmu_dev_alloc(struct pmu *pmu) | |
6420 | { | |
6421 | int ret = -ENOMEM; | |
6422 | ||
6423 | pmu->dev = kzalloc(sizeof(struct device), GFP_KERNEL); | |
6424 | if (!pmu->dev) | |
6425 | goto out; | |
6426 | ||
0c9d42ed | 6427 | pmu->dev->groups = pmu->attr_groups; |
abe43400 PZ |
6428 | device_initialize(pmu->dev); |
6429 | ret = dev_set_name(pmu->dev, "%s", pmu->name); | |
6430 | if (ret) | |
6431 | goto free_dev; | |
6432 | ||
6433 | dev_set_drvdata(pmu->dev, pmu); | |
6434 | pmu->dev->bus = &pmu_bus; | |
6435 | pmu->dev->release = pmu_dev_release; | |
6436 | ret = device_add(pmu->dev); | |
6437 | if (ret) | |
6438 | goto free_dev; | |
6439 | ||
6440 | out: | |
6441 | return ret; | |
6442 | ||
6443 | free_dev: | |
6444 | put_device(pmu->dev); | |
6445 | goto out; | |
6446 | } | |
6447 | ||
547e9fd7 | 6448 | static struct lock_class_key cpuctx_mutex; |
facc4307 | 6449 | static struct lock_class_key cpuctx_lock; |
547e9fd7 | 6450 | |
03d8e80b | 6451 | int perf_pmu_register(struct pmu *pmu, const char *name, int type) |
24f1e32c | 6452 | { |
108b02cf | 6453 | int cpu, ret; |
24f1e32c | 6454 | |
b0a873eb | 6455 | mutex_lock(&pmus_lock); |
33696fc0 PZ |
6456 | ret = -ENOMEM; |
6457 | pmu->pmu_disable_count = alloc_percpu(int); | |
6458 | if (!pmu->pmu_disable_count) | |
6459 | goto unlock; | |
f29ac756 | 6460 | |
2e80a82a PZ |
6461 | pmu->type = -1; |
6462 | if (!name) | |
6463 | goto skip_type; | |
6464 | pmu->name = name; | |
6465 | ||
6466 | if (type < 0) { | |
0e9c3be2 TH |
6467 | type = idr_alloc(&pmu_idr, pmu, PERF_TYPE_MAX, 0, GFP_KERNEL); |
6468 | if (type < 0) { | |
6469 | ret = type; | |
2e80a82a PZ |
6470 | goto free_pdc; |
6471 | } | |
6472 | } | |
6473 | pmu->type = type; | |
6474 | ||
abe43400 PZ |
6475 | if (pmu_bus_running) { |
6476 | ret = pmu_dev_alloc(pmu); | |
6477 | if (ret) | |
6478 | goto free_idr; | |
6479 | } | |
6480 | ||
2e80a82a | 6481 | skip_type: |
8dc85d54 PZ |
6482 | pmu->pmu_cpu_context = find_pmu_context(pmu->task_ctx_nr); |
6483 | if (pmu->pmu_cpu_context) | |
6484 | goto got_cpu_context; | |
f29ac756 | 6485 | |
c4814202 | 6486 | ret = -ENOMEM; |
108b02cf PZ |
6487 | pmu->pmu_cpu_context = alloc_percpu(struct perf_cpu_context); |
6488 | if (!pmu->pmu_cpu_context) | |
abe43400 | 6489 | goto free_dev; |
f344011c | 6490 | |
108b02cf PZ |
6491 | for_each_possible_cpu(cpu) { |
6492 | struct perf_cpu_context *cpuctx; | |
6493 | ||
6494 | cpuctx = per_cpu_ptr(pmu->pmu_cpu_context, cpu); | |
eb184479 | 6495 | __perf_event_init_context(&cpuctx->ctx); |
547e9fd7 | 6496 | lockdep_set_class(&cpuctx->ctx.mutex, &cpuctx_mutex); |
facc4307 | 6497 | lockdep_set_class(&cpuctx->ctx.lock, &cpuctx_lock); |
b04243ef | 6498 | cpuctx->ctx.type = cpu_context; |
108b02cf | 6499 | cpuctx->ctx.pmu = pmu; |
9e630205 SE |
6500 | |
6501 | __perf_cpu_hrtimer_init(cpuctx, cpu); | |
6502 | ||
e9d2b064 | 6503 | INIT_LIST_HEAD(&cpuctx->rotation_list); |
3f1f3320 | 6504 | cpuctx->unique_pmu = pmu; |
108b02cf | 6505 | } |
76e1d904 | 6506 | |
8dc85d54 | 6507 | got_cpu_context: |
ad5133b7 PZ |
6508 | if (!pmu->start_txn) { |
6509 | if (pmu->pmu_enable) { | |
6510 | /* | |
6511 | * If we have pmu_enable/pmu_disable calls, install | |
6512 | * transaction stubs that use that to try and batch | |
6513 | * hardware accesses. | |
6514 | */ | |
6515 | pmu->start_txn = perf_pmu_start_txn; | |
6516 | pmu->commit_txn = perf_pmu_commit_txn; | |
6517 | pmu->cancel_txn = perf_pmu_cancel_txn; | |
6518 | } else { | |
6519 | pmu->start_txn = perf_pmu_nop_void; | |
6520 | pmu->commit_txn = perf_pmu_nop_int; | |
6521 | pmu->cancel_txn = perf_pmu_nop_void; | |
f344011c | 6522 | } |
5c92d124 | 6523 | } |
15dbf27c | 6524 | |
ad5133b7 PZ |
6525 | if (!pmu->pmu_enable) { |
6526 | pmu->pmu_enable = perf_pmu_nop_void; | |
6527 | pmu->pmu_disable = perf_pmu_nop_void; | |
6528 | } | |
6529 | ||
35edc2a5 PZ |
6530 | if (!pmu->event_idx) |
6531 | pmu->event_idx = perf_event_idx_default; | |
6532 | ||
b0a873eb | 6533 | list_add_rcu(&pmu->entry, &pmus); |
33696fc0 PZ |
6534 | ret = 0; |
6535 | unlock: | |
b0a873eb PZ |
6536 | mutex_unlock(&pmus_lock); |
6537 | ||
33696fc0 | 6538 | return ret; |
108b02cf | 6539 | |
abe43400 PZ |
6540 | free_dev: |
6541 | device_del(pmu->dev); | |
6542 | put_device(pmu->dev); | |
6543 | ||
2e80a82a PZ |
6544 | free_idr: |
6545 | if (pmu->type >= PERF_TYPE_MAX) | |
6546 | idr_remove(&pmu_idr, pmu->type); | |
6547 | ||
108b02cf PZ |
6548 | free_pdc: |
6549 | free_percpu(pmu->pmu_disable_count); | |
6550 | goto unlock; | |
f29ac756 PZ |
6551 | } |
6552 | ||
b0a873eb | 6553 | void perf_pmu_unregister(struct pmu *pmu) |
5c92d124 | 6554 | { |
b0a873eb PZ |
6555 | mutex_lock(&pmus_lock); |
6556 | list_del_rcu(&pmu->entry); | |
6557 | mutex_unlock(&pmus_lock); | |
5c92d124 | 6558 | |
0475f9ea | 6559 | /* |
cde8e884 PZ |
6560 | * We dereference the pmu list under both SRCU and regular RCU, so |
6561 | * synchronize against both of those. | |
0475f9ea | 6562 | */ |
b0a873eb | 6563 | synchronize_srcu(&pmus_srcu); |
cde8e884 | 6564 | synchronize_rcu(); |
d6d020e9 | 6565 | |
33696fc0 | 6566 | free_percpu(pmu->pmu_disable_count); |
2e80a82a PZ |
6567 | if (pmu->type >= PERF_TYPE_MAX) |
6568 | idr_remove(&pmu_idr, pmu->type); | |
abe43400 PZ |
6569 | device_del(pmu->dev); |
6570 | put_device(pmu->dev); | |
51676957 | 6571 | free_pmu_context(pmu); |
b0a873eb | 6572 | } |
d6d020e9 | 6573 | |
b0a873eb PZ |
6574 | struct pmu *perf_init_event(struct perf_event *event) |
6575 | { | |
6576 | struct pmu *pmu = NULL; | |
6577 | int idx; | |
940c5b29 | 6578 | int ret; |
b0a873eb PZ |
6579 | |
6580 | idx = srcu_read_lock(&pmus_srcu); | |
2e80a82a PZ |
6581 | |
6582 | rcu_read_lock(); | |
6583 | pmu = idr_find(&pmu_idr, event->attr.type); | |
6584 | rcu_read_unlock(); | |
940c5b29 | 6585 | if (pmu) { |
7e5b2a01 | 6586 | event->pmu = pmu; |
940c5b29 LM |
6587 | ret = pmu->event_init(event); |
6588 | if (ret) | |
6589 | pmu = ERR_PTR(ret); | |
2e80a82a | 6590 | goto unlock; |
940c5b29 | 6591 | } |
2e80a82a | 6592 | |
b0a873eb | 6593 | list_for_each_entry_rcu(pmu, &pmus, entry) { |
7e5b2a01 | 6594 | event->pmu = pmu; |
940c5b29 | 6595 | ret = pmu->event_init(event); |
b0a873eb | 6596 | if (!ret) |
e5f4d339 | 6597 | goto unlock; |
76e1d904 | 6598 | |
b0a873eb PZ |
6599 | if (ret != -ENOENT) { |
6600 | pmu = ERR_PTR(ret); | |
e5f4d339 | 6601 | goto unlock; |
f344011c | 6602 | } |
5c92d124 | 6603 | } |
e5f4d339 PZ |
6604 | pmu = ERR_PTR(-ENOENT); |
6605 | unlock: | |
b0a873eb | 6606 | srcu_read_unlock(&pmus_srcu, idx); |
15dbf27c | 6607 | |
4aeb0b42 | 6608 | return pmu; |
5c92d124 IM |
6609 | } |
6610 | ||
4beb31f3 FW |
6611 | static void account_event_cpu(struct perf_event *event, int cpu) |
6612 | { | |
6613 | if (event->parent) | |
6614 | return; | |
6615 | ||
6616 | if (has_branch_stack(event)) { | |
6617 | if (!(event->attach_state & PERF_ATTACH_TASK)) | |
6618 | atomic_inc(&per_cpu(perf_branch_stack_events, cpu)); | |
6619 | } | |
6620 | if (is_cgroup_event(event)) | |
6621 | atomic_inc(&per_cpu(perf_cgroup_events, cpu)); | |
6622 | } | |
6623 | ||
766d6c07 FW |
6624 | static void account_event(struct perf_event *event) |
6625 | { | |
4beb31f3 FW |
6626 | if (event->parent) |
6627 | return; | |
6628 | ||
766d6c07 FW |
6629 | if (event->attach_state & PERF_ATTACH_TASK) |
6630 | static_key_slow_inc(&perf_sched_events.key); | |
6631 | if (event->attr.mmap || event->attr.mmap_data) | |
6632 | atomic_inc(&nr_mmap_events); | |
6633 | if (event->attr.comm) | |
6634 | atomic_inc(&nr_comm_events); | |
6635 | if (event->attr.task) | |
6636 | atomic_inc(&nr_task_events); | |
948b26b6 FW |
6637 | if (event->attr.freq) { |
6638 | if (atomic_inc_return(&nr_freq_events) == 1) | |
6639 | tick_nohz_full_kick_all(); | |
6640 | } | |
4beb31f3 | 6641 | if (has_branch_stack(event)) |
766d6c07 | 6642 | static_key_slow_inc(&perf_sched_events.key); |
4beb31f3 | 6643 | if (is_cgroup_event(event)) |
766d6c07 | 6644 | static_key_slow_inc(&perf_sched_events.key); |
4beb31f3 FW |
6645 | |
6646 | account_event_cpu(event, event->cpu); | |
766d6c07 FW |
6647 | } |
6648 | ||
0793a61d | 6649 | /* |
cdd6c482 | 6650 | * Allocate and initialize a event structure |
0793a61d | 6651 | */ |
cdd6c482 | 6652 | static struct perf_event * |
c3f00c70 | 6653 | perf_event_alloc(struct perf_event_attr *attr, int cpu, |
d580ff86 PZ |
6654 | struct task_struct *task, |
6655 | struct perf_event *group_leader, | |
6656 | struct perf_event *parent_event, | |
4dc0da86 AK |
6657 | perf_overflow_handler_t overflow_handler, |
6658 | void *context) | |
0793a61d | 6659 | { |
51b0fe39 | 6660 | struct pmu *pmu; |
cdd6c482 IM |
6661 | struct perf_event *event; |
6662 | struct hw_perf_event *hwc; | |
90983b16 | 6663 | long err = -EINVAL; |
0793a61d | 6664 | |
66832eb4 ON |
6665 | if ((unsigned)cpu >= nr_cpu_ids) { |
6666 | if (!task || cpu != -1) | |
6667 | return ERR_PTR(-EINVAL); | |
6668 | } | |
6669 | ||
c3f00c70 | 6670 | event = kzalloc(sizeof(*event), GFP_KERNEL); |
cdd6c482 | 6671 | if (!event) |
d5d2bc0d | 6672 | return ERR_PTR(-ENOMEM); |
0793a61d | 6673 | |
04289bb9 | 6674 | /* |
cdd6c482 | 6675 | * Single events are their own group leaders, with an |
04289bb9 IM |
6676 | * empty sibling list: |
6677 | */ | |
6678 | if (!group_leader) | |
cdd6c482 | 6679 | group_leader = event; |
04289bb9 | 6680 | |
cdd6c482 IM |
6681 | mutex_init(&event->child_mutex); |
6682 | INIT_LIST_HEAD(&event->child_list); | |
fccc714b | 6683 | |
cdd6c482 IM |
6684 | INIT_LIST_HEAD(&event->group_entry); |
6685 | INIT_LIST_HEAD(&event->event_entry); | |
6686 | INIT_LIST_HEAD(&event->sibling_list); | |
10c6db11 | 6687 | INIT_LIST_HEAD(&event->rb_entry); |
71ad88ef | 6688 | INIT_LIST_HEAD(&event->active_entry); |
f3ae75de SE |
6689 | INIT_HLIST_NODE(&event->hlist_entry); |
6690 | ||
10c6db11 | 6691 | |
cdd6c482 | 6692 | init_waitqueue_head(&event->waitq); |
e360adbe | 6693 | init_irq_work(&event->pending, perf_pending_event); |
0793a61d | 6694 | |
cdd6c482 | 6695 | mutex_init(&event->mmap_mutex); |
7b732a75 | 6696 | |
a6fa941d | 6697 | atomic_long_set(&event->refcount, 1); |
cdd6c482 IM |
6698 | event->cpu = cpu; |
6699 | event->attr = *attr; | |
6700 | event->group_leader = group_leader; | |
6701 | event->pmu = NULL; | |
cdd6c482 | 6702 | event->oncpu = -1; |
a96bbc16 | 6703 | |
cdd6c482 | 6704 | event->parent = parent_event; |
b84fbc9f | 6705 | |
17cf22c3 | 6706 | event->ns = get_pid_ns(task_active_pid_ns(current)); |
cdd6c482 | 6707 | event->id = atomic64_inc_return(&perf_event_id); |
a96bbc16 | 6708 | |
cdd6c482 | 6709 | event->state = PERF_EVENT_STATE_INACTIVE; |
329d876d | 6710 | |
d580ff86 PZ |
6711 | if (task) { |
6712 | event->attach_state = PERF_ATTACH_TASK; | |
f22c1bb6 ON |
6713 | |
6714 | if (attr->type == PERF_TYPE_TRACEPOINT) | |
6715 | event->hw.tp_target = task; | |
d580ff86 PZ |
6716 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
6717 | /* | |
6718 | * hw_breakpoint is a bit difficult here.. | |
6719 | */ | |
f22c1bb6 | 6720 | else if (attr->type == PERF_TYPE_BREAKPOINT) |
d580ff86 PZ |
6721 | event->hw.bp_target = task; |
6722 | #endif | |
6723 | } | |
6724 | ||
4dc0da86 | 6725 | if (!overflow_handler && parent_event) { |
b326e956 | 6726 | overflow_handler = parent_event->overflow_handler; |
4dc0da86 AK |
6727 | context = parent_event->overflow_handler_context; |
6728 | } | |
66832eb4 | 6729 | |
b326e956 | 6730 | event->overflow_handler = overflow_handler; |
4dc0da86 | 6731 | event->overflow_handler_context = context; |
97eaf530 | 6732 | |
0231bb53 | 6733 | perf_event__state_init(event); |
a86ed508 | 6734 | |
4aeb0b42 | 6735 | pmu = NULL; |
b8e83514 | 6736 | |
cdd6c482 | 6737 | hwc = &event->hw; |
bd2b5b12 | 6738 | hwc->sample_period = attr->sample_period; |
0d48696f | 6739 | if (attr->freq && attr->sample_freq) |
bd2b5b12 | 6740 | hwc->sample_period = 1; |
eced1dfc | 6741 | hwc->last_period = hwc->sample_period; |
bd2b5b12 | 6742 | |
e7850595 | 6743 | local64_set(&hwc->period_left, hwc->sample_period); |
60db5e09 | 6744 | |
2023b359 | 6745 | /* |
cdd6c482 | 6746 | * we currently do not support PERF_FORMAT_GROUP on inherited events |
2023b359 | 6747 | */ |
3dab77fb | 6748 | if (attr->inherit && (attr->read_format & PERF_FORMAT_GROUP)) |
90983b16 | 6749 | goto err_ns; |
2023b359 | 6750 | |
b0a873eb | 6751 | pmu = perf_init_event(event); |
4aeb0b42 | 6752 | if (!pmu) |
90983b16 FW |
6753 | goto err_ns; |
6754 | else if (IS_ERR(pmu)) { | |
4aeb0b42 | 6755 | err = PTR_ERR(pmu); |
90983b16 | 6756 | goto err_ns; |
621a01ea | 6757 | } |
d5d2bc0d | 6758 | |
cdd6c482 | 6759 | if (!event->parent) { |
927c7a9e FW |
6760 | if (event->attr.sample_type & PERF_SAMPLE_CALLCHAIN) { |
6761 | err = get_callchain_buffers(); | |
90983b16 FW |
6762 | if (err) |
6763 | goto err_pmu; | |
d010b332 | 6764 | } |
f344011c | 6765 | } |
9ee318a7 | 6766 | |
cdd6c482 | 6767 | return event; |
90983b16 FW |
6768 | |
6769 | err_pmu: | |
6770 | if (event->destroy) | |
6771 | event->destroy(event); | |
6772 | err_ns: | |
6773 | if (event->ns) | |
6774 | put_pid_ns(event->ns); | |
6775 | kfree(event); | |
6776 | ||
6777 | return ERR_PTR(err); | |
0793a61d TG |
6778 | } |
6779 | ||
cdd6c482 IM |
6780 | static int perf_copy_attr(struct perf_event_attr __user *uattr, |
6781 | struct perf_event_attr *attr) | |
974802ea | 6782 | { |
974802ea | 6783 | u32 size; |
cdf8073d | 6784 | int ret; |
974802ea PZ |
6785 | |
6786 | if (!access_ok(VERIFY_WRITE, uattr, PERF_ATTR_SIZE_VER0)) | |
6787 | return -EFAULT; | |
6788 | ||
6789 | /* | |
6790 | * zero the full structure, so that a short copy will be nice. | |
6791 | */ | |
6792 | memset(attr, 0, sizeof(*attr)); | |
6793 | ||
6794 | ret = get_user(size, &uattr->size); | |
6795 | if (ret) | |
6796 | return ret; | |
6797 | ||
6798 | if (size > PAGE_SIZE) /* silly large */ | |
6799 | goto err_size; | |
6800 | ||
6801 | if (!size) /* abi compat */ | |
6802 | size = PERF_ATTR_SIZE_VER0; | |
6803 | ||
6804 | if (size < PERF_ATTR_SIZE_VER0) | |
6805 | goto err_size; | |
6806 | ||
6807 | /* | |
6808 | * If we're handed a bigger struct than we know of, | |
cdf8073d IS |
6809 | * ensure all the unknown bits are 0 - i.e. new |
6810 | * user-space does not rely on any kernel feature | |
6811 | * extensions we dont know about yet. | |
974802ea PZ |
6812 | */ |
6813 | if (size > sizeof(*attr)) { | |
cdf8073d IS |
6814 | unsigned char __user *addr; |
6815 | unsigned char __user *end; | |
6816 | unsigned char val; | |
974802ea | 6817 | |
cdf8073d IS |
6818 | addr = (void __user *)uattr + sizeof(*attr); |
6819 | end = (void __user *)uattr + size; | |
974802ea | 6820 | |
cdf8073d | 6821 | for (; addr < end; addr++) { |
974802ea PZ |
6822 | ret = get_user(val, addr); |
6823 | if (ret) | |
6824 | return ret; | |
6825 | if (val) | |
6826 | goto err_size; | |
6827 | } | |
b3e62e35 | 6828 | size = sizeof(*attr); |
974802ea PZ |
6829 | } |
6830 | ||
6831 | ret = copy_from_user(attr, uattr, size); | |
6832 | if (ret) | |
6833 | return -EFAULT; | |
6834 | ||
3090ffb5 SE |
6835 | /* disabled for now */ |
6836 | if (attr->mmap2) | |
6837 | return -EINVAL; | |
6838 | ||
cd757645 | 6839 | if (attr->__reserved_1) |
974802ea PZ |
6840 | return -EINVAL; |
6841 | ||
6842 | if (attr->sample_type & ~(PERF_SAMPLE_MAX-1)) | |
6843 | return -EINVAL; | |
6844 | ||
6845 | if (attr->read_format & ~(PERF_FORMAT_MAX-1)) | |
6846 | return -EINVAL; | |
6847 | ||
bce38cd5 SE |
6848 | if (attr->sample_type & PERF_SAMPLE_BRANCH_STACK) { |
6849 | u64 mask = attr->branch_sample_type; | |
6850 | ||
6851 | /* only using defined bits */ | |
6852 | if (mask & ~(PERF_SAMPLE_BRANCH_MAX-1)) | |
6853 | return -EINVAL; | |
6854 | ||
6855 | /* at least one branch bit must be set */ | |
6856 | if (!(mask & ~PERF_SAMPLE_BRANCH_PLM_ALL)) | |
6857 | return -EINVAL; | |
6858 | ||
bce38cd5 SE |
6859 | /* propagate priv level, when not set for branch */ |
6860 | if (!(mask & PERF_SAMPLE_BRANCH_PLM_ALL)) { | |
6861 | ||
6862 | /* exclude_kernel checked on syscall entry */ | |
6863 | if (!attr->exclude_kernel) | |
6864 | mask |= PERF_SAMPLE_BRANCH_KERNEL; | |
6865 | ||
6866 | if (!attr->exclude_user) | |
6867 | mask |= PERF_SAMPLE_BRANCH_USER; | |
6868 | ||
6869 | if (!attr->exclude_hv) | |
6870 | mask |= PERF_SAMPLE_BRANCH_HV; | |
6871 | /* | |
6872 | * adjust user setting (for HW filter setup) | |
6873 | */ | |
6874 | attr->branch_sample_type = mask; | |
6875 | } | |
e712209a SE |
6876 | /* privileged levels capture (kernel, hv): check permissions */ |
6877 | if ((mask & PERF_SAMPLE_BRANCH_PERM_PLM) | |
2b923c8f SE |
6878 | && perf_paranoid_kernel() && !capable(CAP_SYS_ADMIN)) |
6879 | return -EACCES; | |
bce38cd5 | 6880 | } |
4018994f | 6881 | |
c5ebcedb | 6882 | if (attr->sample_type & PERF_SAMPLE_REGS_USER) { |
4018994f | 6883 | ret = perf_reg_validate(attr->sample_regs_user); |
c5ebcedb JO |
6884 | if (ret) |
6885 | return ret; | |
6886 | } | |
6887 | ||
6888 | if (attr->sample_type & PERF_SAMPLE_STACK_USER) { | |
6889 | if (!arch_perf_have_user_stack_dump()) | |
6890 | return -ENOSYS; | |
6891 | ||
6892 | /* | |
6893 | * We have __u32 type for the size, but so far | |
6894 | * we can only use __u16 as maximum due to the | |
6895 | * __u16 sample size limit. | |
6896 | */ | |
6897 | if (attr->sample_stack_user >= USHRT_MAX) | |
6898 | ret = -EINVAL; | |
6899 | else if (!IS_ALIGNED(attr->sample_stack_user, sizeof(u64))) | |
6900 | ret = -EINVAL; | |
6901 | } | |
4018994f | 6902 | |
974802ea PZ |
6903 | out: |
6904 | return ret; | |
6905 | ||
6906 | err_size: | |
6907 | put_user(sizeof(*attr), &uattr->size); | |
6908 | ret = -E2BIG; | |
6909 | goto out; | |
6910 | } | |
6911 | ||
ac9721f3 PZ |
6912 | static int |
6913 | perf_event_set_output(struct perf_event *event, struct perf_event *output_event) | |
a4be7c27 | 6914 | { |
76369139 | 6915 | struct ring_buffer *rb = NULL, *old_rb = NULL; |
a4be7c27 PZ |
6916 | int ret = -EINVAL; |
6917 | ||
ac9721f3 | 6918 | if (!output_event) |
a4be7c27 PZ |
6919 | goto set; |
6920 | ||
ac9721f3 PZ |
6921 | /* don't allow circular references */ |
6922 | if (event == output_event) | |
a4be7c27 PZ |
6923 | goto out; |
6924 | ||
0f139300 PZ |
6925 | /* |
6926 | * Don't allow cross-cpu buffers | |
6927 | */ | |
6928 | if (output_event->cpu != event->cpu) | |
6929 | goto out; | |
6930 | ||
6931 | /* | |
76369139 | 6932 | * If its not a per-cpu rb, it must be the same task. |
0f139300 PZ |
6933 | */ |
6934 | if (output_event->cpu == -1 && output_event->ctx != event->ctx) | |
6935 | goto out; | |
6936 | ||
a4be7c27 | 6937 | set: |
cdd6c482 | 6938 | mutex_lock(&event->mmap_mutex); |
ac9721f3 PZ |
6939 | /* Can't redirect output if we've got an active mmap() */ |
6940 | if (atomic_read(&event->mmap_count)) | |
6941 | goto unlock; | |
a4be7c27 | 6942 | |
9bb5d40c PZ |
6943 | old_rb = event->rb; |
6944 | ||
ac9721f3 | 6945 | if (output_event) { |
76369139 FW |
6946 | /* get the rb we want to redirect to */ |
6947 | rb = ring_buffer_get(output_event); | |
6948 | if (!rb) | |
ac9721f3 | 6949 | goto unlock; |
a4be7c27 PZ |
6950 | } |
6951 | ||
10c6db11 PZ |
6952 | if (old_rb) |
6953 | ring_buffer_detach(event, old_rb); | |
9bb5d40c PZ |
6954 | |
6955 | if (rb) | |
6956 | ring_buffer_attach(event, rb); | |
6957 | ||
6958 | rcu_assign_pointer(event->rb, rb); | |
6959 | ||
6960 | if (old_rb) { | |
6961 | ring_buffer_put(old_rb); | |
6962 | /* | |
6963 | * Since we detached before setting the new rb, so that we | |
6964 | * could attach the new rb, we could have missed a wakeup. | |
6965 | * Provide it now. | |
6966 | */ | |
6967 | wake_up_all(&event->waitq); | |
6968 | } | |
6969 | ||
a4be7c27 | 6970 | ret = 0; |
ac9721f3 PZ |
6971 | unlock: |
6972 | mutex_unlock(&event->mmap_mutex); | |
6973 | ||
a4be7c27 | 6974 | out: |
a4be7c27 PZ |
6975 | return ret; |
6976 | } | |
6977 | ||
0793a61d | 6978 | /** |
cdd6c482 | 6979 | * sys_perf_event_open - open a performance event, associate it to a task/cpu |
9f66a381 | 6980 | * |
cdd6c482 | 6981 | * @attr_uptr: event_id type attributes for monitoring/sampling |
0793a61d | 6982 | * @pid: target pid |
9f66a381 | 6983 | * @cpu: target cpu |
cdd6c482 | 6984 | * @group_fd: group leader event fd |
0793a61d | 6985 | */ |
cdd6c482 IM |
6986 | SYSCALL_DEFINE5(perf_event_open, |
6987 | struct perf_event_attr __user *, attr_uptr, | |
2743a5b0 | 6988 | pid_t, pid, int, cpu, int, group_fd, unsigned long, flags) |
0793a61d | 6989 | { |
b04243ef PZ |
6990 | struct perf_event *group_leader = NULL, *output_event = NULL; |
6991 | struct perf_event *event, *sibling; | |
cdd6c482 IM |
6992 | struct perf_event_attr attr; |
6993 | struct perf_event_context *ctx; | |
6994 | struct file *event_file = NULL; | |
2903ff01 | 6995 | struct fd group = {NULL, 0}; |
38a81da2 | 6996 | struct task_struct *task = NULL; |
89a1e187 | 6997 | struct pmu *pmu; |
ea635c64 | 6998 | int event_fd; |
b04243ef | 6999 | int move_group = 0; |
dc86cabe | 7000 | int err; |
a21b0b35 | 7001 | int f_flags = O_RDWR; |
0793a61d | 7002 | |
2743a5b0 | 7003 | /* for future expandability... */ |
e5d1367f | 7004 | if (flags & ~PERF_FLAG_ALL) |
2743a5b0 PM |
7005 | return -EINVAL; |
7006 | ||
dc86cabe IM |
7007 | err = perf_copy_attr(attr_uptr, &attr); |
7008 | if (err) | |
7009 | return err; | |
eab656ae | 7010 | |
0764771d PZ |
7011 | if (!attr.exclude_kernel) { |
7012 | if (perf_paranoid_kernel() && !capable(CAP_SYS_ADMIN)) | |
7013 | return -EACCES; | |
7014 | } | |
7015 | ||
df58ab24 | 7016 | if (attr.freq) { |
cdd6c482 | 7017 | if (attr.sample_freq > sysctl_perf_event_sample_rate) |
df58ab24 PZ |
7018 | return -EINVAL; |
7019 | } | |
7020 | ||
e5d1367f SE |
7021 | /* |
7022 | * In cgroup mode, the pid argument is used to pass the fd | |
7023 | * opened to the cgroup directory in cgroupfs. The cpu argument | |
7024 | * designates the cpu on which to monitor threads from that | |
7025 | * cgroup. | |
7026 | */ | |
7027 | if ((flags & PERF_FLAG_PID_CGROUP) && (pid == -1 || cpu == -1)) | |
7028 | return -EINVAL; | |
7029 | ||
a21b0b35 YD |
7030 | if (flags & PERF_FLAG_FD_CLOEXEC) |
7031 | f_flags |= O_CLOEXEC; | |
7032 | ||
7033 | event_fd = get_unused_fd_flags(f_flags); | |
ea635c64 AV |
7034 | if (event_fd < 0) |
7035 | return event_fd; | |
7036 | ||
ac9721f3 | 7037 | if (group_fd != -1) { |
2903ff01 AV |
7038 | err = perf_fget_light(group_fd, &group); |
7039 | if (err) | |
d14b12d7 | 7040 | goto err_fd; |
2903ff01 | 7041 | group_leader = group.file->private_data; |
ac9721f3 PZ |
7042 | if (flags & PERF_FLAG_FD_OUTPUT) |
7043 | output_event = group_leader; | |
7044 | if (flags & PERF_FLAG_FD_NO_GROUP) | |
7045 | group_leader = NULL; | |
7046 | } | |
7047 | ||
e5d1367f | 7048 | if (pid != -1 && !(flags & PERF_FLAG_PID_CGROUP)) { |
c6be5a5c PZ |
7049 | task = find_lively_task_by_vpid(pid); |
7050 | if (IS_ERR(task)) { | |
7051 | err = PTR_ERR(task); | |
7052 | goto err_group_fd; | |
7053 | } | |
7054 | } | |
7055 | ||
fbfc623f YZ |
7056 | get_online_cpus(); |
7057 | ||
4dc0da86 AK |
7058 | event = perf_event_alloc(&attr, cpu, task, group_leader, NULL, |
7059 | NULL, NULL); | |
d14b12d7 SE |
7060 | if (IS_ERR(event)) { |
7061 | err = PTR_ERR(event); | |
c6be5a5c | 7062 | goto err_task; |
d14b12d7 SE |
7063 | } |
7064 | ||
e5d1367f SE |
7065 | if (flags & PERF_FLAG_PID_CGROUP) { |
7066 | err = perf_cgroup_connect(pid, event, &attr, group_leader); | |
766d6c07 FW |
7067 | if (err) { |
7068 | __free_event(event); | |
7069 | goto err_task; | |
7070 | } | |
e5d1367f SE |
7071 | } |
7072 | ||
766d6c07 FW |
7073 | account_event(event); |
7074 | ||
89a1e187 PZ |
7075 | /* |
7076 | * Special case software events and allow them to be part of | |
7077 | * any hardware group. | |
7078 | */ | |
7079 | pmu = event->pmu; | |
b04243ef PZ |
7080 | |
7081 | if (group_leader && | |
7082 | (is_software_event(event) != is_software_event(group_leader))) { | |
7083 | if (is_software_event(event)) { | |
7084 | /* | |
7085 | * If event and group_leader are not both a software | |
7086 | * event, and event is, then group leader is not. | |
7087 | * | |
7088 | * Allow the addition of software events to !software | |
7089 | * groups, this is safe because software events never | |
7090 | * fail to schedule. | |
7091 | */ | |
7092 | pmu = group_leader->pmu; | |
7093 | } else if (is_software_event(group_leader) && | |
7094 | (group_leader->group_flags & PERF_GROUP_SOFTWARE)) { | |
7095 | /* | |
7096 | * In case the group is a pure software group, and we | |
7097 | * try to add a hardware event, move the whole group to | |
7098 | * the hardware context. | |
7099 | */ | |
7100 | move_group = 1; | |
7101 | } | |
7102 | } | |
89a1e187 PZ |
7103 | |
7104 | /* | |
7105 | * Get the target context (task or percpu): | |
7106 | */ | |
e2d37cd2 | 7107 | ctx = find_get_context(pmu, task, event->cpu); |
89a1e187 PZ |
7108 | if (IS_ERR(ctx)) { |
7109 | err = PTR_ERR(ctx); | |
c6be5a5c | 7110 | goto err_alloc; |
89a1e187 PZ |
7111 | } |
7112 | ||
fd1edb3a PZ |
7113 | if (task) { |
7114 | put_task_struct(task); | |
7115 | task = NULL; | |
7116 | } | |
7117 | ||
ccff286d | 7118 | /* |
cdd6c482 | 7119 | * Look up the group leader (we will attach this event to it): |
04289bb9 | 7120 | */ |
ac9721f3 | 7121 | if (group_leader) { |
dc86cabe | 7122 | err = -EINVAL; |
04289bb9 | 7123 | |
04289bb9 | 7124 | /* |
ccff286d IM |
7125 | * Do not allow a recursive hierarchy (this new sibling |
7126 | * becoming part of another group-sibling): | |
7127 | */ | |
7128 | if (group_leader->group_leader != group_leader) | |
c3f00c70 | 7129 | goto err_context; |
ccff286d IM |
7130 | /* |
7131 | * Do not allow to attach to a group in a different | |
7132 | * task or CPU context: | |
04289bb9 | 7133 | */ |
b04243ef PZ |
7134 | if (move_group) { |
7135 | if (group_leader->ctx->type != ctx->type) | |
7136 | goto err_context; | |
7137 | } else { | |
7138 | if (group_leader->ctx != ctx) | |
7139 | goto err_context; | |
7140 | } | |
7141 | ||
3b6f9e5c PM |
7142 | /* |
7143 | * Only a group leader can be exclusive or pinned | |
7144 | */ | |
0d48696f | 7145 | if (attr.exclusive || attr.pinned) |
c3f00c70 | 7146 | goto err_context; |
ac9721f3 PZ |
7147 | } |
7148 | ||
7149 | if (output_event) { | |
7150 | err = perf_event_set_output(event, output_event); | |
7151 | if (err) | |
c3f00c70 | 7152 | goto err_context; |
ac9721f3 | 7153 | } |
0793a61d | 7154 | |
a21b0b35 YD |
7155 | event_file = anon_inode_getfile("[perf_event]", &perf_fops, event, |
7156 | f_flags); | |
ea635c64 AV |
7157 | if (IS_ERR(event_file)) { |
7158 | err = PTR_ERR(event_file); | |
c3f00c70 | 7159 | goto err_context; |
ea635c64 | 7160 | } |
9b51f66d | 7161 | |
b04243ef PZ |
7162 | if (move_group) { |
7163 | struct perf_event_context *gctx = group_leader->ctx; | |
7164 | ||
7165 | mutex_lock(&gctx->mutex); | |
fe4b04fa | 7166 | perf_remove_from_context(group_leader); |
0231bb53 JO |
7167 | |
7168 | /* | |
7169 | * Removing from the context ends up with disabled | |
7170 | * event. What we want here is event in the initial | |
7171 | * startup state, ready to be add into new context. | |
7172 | */ | |
7173 | perf_event__state_init(group_leader); | |
b04243ef PZ |
7174 | list_for_each_entry(sibling, &group_leader->sibling_list, |
7175 | group_entry) { | |
fe4b04fa | 7176 | perf_remove_from_context(sibling); |
0231bb53 | 7177 | perf_event__state_init(sibling); |
b04243ef PZ |
7178 | put_ctx(gctx); |
7179 | } | |
7180 | mutex_unlock(&gctx->mutex); | |
7181 | put_ctx(gctx); | |
ea635c64 | 7182 | } |
9b51f66d | 7183 | |
ad3a37de | 7184 | WARN_ON_ONCE(ctx->parent_ctx); |
d859e29f | 7185 | mutex_lock(&ctx->mutex); |
b04243ef PZ |
7186 | |
7187 | if (move_group) { | |
0cda4c02 | 7188 | synchronize_rcu(); |
e2d37cd2 | 7189 | perf_install_in_context(ctx, group_leader, event->cpu); |
b04243ef PZ |
7190 | get_ctx(ctx); |
7191 | list_for_each_entry(sibling, &group_leader->sibling_list, | |
7192 | group_entry) { | |
e2d37cd2 | 7193 | perf_install_in_context(ctx, sibling, event->cpu); |
b04243ef PZ |
7194 | get_ctx(ctx); |
7195 | } | |
7196 | } | |
7197 | ||
e2d37cd2 | 7198 | perf_install_in_context(ctx, event, event->cpu); |
fe4b04fa | 7199 | perf_unpin_context(ctx); |
d859e29f | 7200 | mutex_unlock(&ctx->mutex); |
9b51f66d | 7201 | |
fbfc623f YZ |
7202 | put_online_cpus(); |
7203 | ||
cdd6c482 | 7204 | event->owner = current; |
8882135b | 7205 | |
cdd6c482 IM |
7206 | mutex_lock(¤t->perf_event_mutex); |
7207 | list_add_tail(&event->owner_entry, ¤t->perf_event_list); | |
7208 | mutex_unlock(¤t->perf_event_mutex); | |
082ff5a2 | 7209 | |
c320c7b7 ACM |
7210 | /* |
7211 | * Precalculate sample_data sizes | |
7212 | */ | |
7213 | perf_event__header_size(event); | |
6844c09d | 7214 | perf_event__id_header_size(event); |
c320c7b7 | 7215 | |
8a49542c PZ |
7216 | /* |
7217 | * Drop the reference on the group_event after placing the | |
7218 | * new event on the sibling_list. This ensures destruction | |
7219 | * of the group leader will find the pointer to itself in | |
7220 | * perf_group_detach(). | |
7221 | */ | |
2903ff01 | 7222 | fdput(group); |
ea635c64 AV |
7223 | fd_install(event_fd, event_file); |
7224 | return event_fd; | |
0793a61d | 7225 | |
c3f00c70 | 7226 | err_context: |
fe4b04fa | 7227 | perf_unpin_context(ctx); |
ea635c64 | 7228 | put_ctx(ctx); |
c6be5a5c | 7229 | err_alloc: |
ea635c64 | 7230 | free_event(event); |
e7d0bc04 | 7231 | err_task: |
fbfc623f | 7232 | put_online_cpus(); |
e7d0bc04 PZ |
7233 | if (task) |
7234 | put_task_struct(task); | |
89a1e187 | 7235 | err_group_fd: |
2903ff01 | 7236 | fdput(group); |
ea635c64 AV |
7237 | err_fd: |
7238 | put_unused_fd(event_fd); | |
dc86cabe | 7239 | return err; |
0793a61d TG |
7240 | } |
7241 | ||
fb0459d7 AV |
7242 | /** |
7243 | * perf_event_create_kernel_counter | |
7244 | * | |
7245 | * @attr: attributes of the counter to create | |
7246 | * @cpu: cpu in which the counter is bound | |
38a81da2 | 7247 | * @task: task to profile (NULL for percpu) |
fb0459d7 AV |
7248 | */ |
7249 | struct perf_event * | |
7250 | perf_event_create_kernel_counter(struct perf_event_attr *attr, int cpu, | |
38a81da2 | 7251 | struct task_struct *task, |
4dc0da86 AK |
7252 | perf_overflow_handler_t overflow_handler, |
7253 | void *context) | |
fb0459d7 | 7254 | { |
fb0459d7 | 7255 | struct perf_event_context *ctx; |
c3f00c70 | 7256 | struct perf_event *event; |
fb0459d7 | 7257 | int err; |
d859e29f | 7258 | |
fb0459d7 AV |
7259 | /* |
7260 | * Get the target context (task or percpu): | |
7261 | */ | |
d859e29f | 7262 | |
4dc0da86 AK |
7263 | event = perf_event_alloc(attr, cpu, task, NULL, NULL, |
7264 | overflow_handler, context); | |
c3f00c70 PZ |
7265 | if (IS_ERR(event)) { |
7266 | err = PTR_ERR(event); | |
7267 | goto err; | |
7268 | } | |
d859e29f | 7269 | |
766d6c07 FW |
7270 | account_event(event); |
7271 | ||
38a81da2 | 7272 | ctx = find_get_context(event->pmu, task, cpu); |
c6567f64 FW |
7273 | if (IS_ERR(ctx)) { |
7274 | err = PTR_ERR(ctx); | |
c3f00c70 | 7275 | goto err_free; |
d859e29f | 7276 | } |
fb0459d7 | 7277 | |
fb0459d7 AV |
7278 | WARN_ON_ONCE(ctx->parent_ctx); |
7279 | mutex_lock(&ctx->mutex); | |
7280 | perf_install_in_context(ctx, event, cpu); | |
fe4b04fa | 7281 | perf_unpin_context(ctx); |
fb0459d7 AV |
7282 | mutex_unlock(&ctx->mutex); |
7283 | ||
fb0459d7 AV |
7284 | return event; |
7285 | ||
c3f00c70 PZ |
7286 | err_free: |
7287 | free_event(event); | |
7288 | err: | |
c6567f64 | 7289 | return ERR_PTR(err); |
9b51f66d | 7290 | } |
fb0459d7 | 7291 | EXPORT_SYMBOL_GPL(perf_event_create_kernel_counter); |
9b51f66d | 7292 | |
0cda4c02 YZ |
7293 | void perf_pmu_migrate_context(struct pmu *pmu, int src_cpu, int dst_cpu) |
7294 | { | |
7295 | struct perf_event_context *src_ctx; | |
7296 | struct perf_event_context *dst_ctx; | |
7297 | struct perf_event *event, *tmp; | |
7298 | LIST_HEAD(events); | |
7299 | ||
7300 | src_ctx = &per_cpu_ptr(pmu->pmu_cpu_context, src_cpu)->ctx; | |
7301 | dst_ctx = &per_cpu_ptr(pmu->pmu_cpu_context, dst_cpu)->ctx; | |
7302 | ||
7303 | mutex_lock(&src_ctx->mutex); | |
7304 | list_for_each_entry_safe(event, tmp, &src_ctx->event_list, | |
7305 | event_entry) { | |
7306 | perf_remove_from_context(event); | |
9a545de0 | 7307 | unaccount_event_cpu(event, src_cpu); |
0cda4c02 | 7308 | put_ctx(src_ctx); |
9886167d | 7309 | list_add(&event->migrate_entry, &events); |
0cda4c02 YZ |
7310 | } |
7311 | mutex_unlock(&src_ctx->mutex); | |
7312 | ||
7313 | synchronize_rcu(); | |
7314 | ||
7315 | mutex_lock(&dst_ctx->mutex); | |
9886167d PZ |
7316 | list_for_each_entry_safe(event, tmp, &events, migrate_entry) { |
7317 | list_del(&event->migrate_entry); | |
0cda4c02 YZ |
7318 | if (event->state >= PERF_EVENT_STATE_OFF) |
7319 | event->state = PERF_EVENT_STATE_INACTIVE; | |
9a545de0 | 7320 | account_event_cpu(event, dst_cpu); |
0cda4c02 YZ |
7321 | perf_install_in_context(dst_ctx, event, dst_cpu); |
7322 | get_ctx(dst_ctx); | |
7323 | } | |
7324 | mutex_unlock(&dst_ctx->mutex); | |
7325 | } | |
7326 | EXPORT_SYMBOL_GPL(perf_pmu_migrate_context); | |
7327 | ||
cdd6c482 | 7328 | static void sync_child_event(struct perf_event *child_event, |
38b200d6 | 7329 | struct task_struct *child) |
d859e29f | 7330 | { |
cdd6c482 | 7331 | struct perf_event *parent_event = child_event->parent; |
8bc20959 | 7332 | u64 child_val; |
d859e29f | 7333 | |
cdd6c482 IM |
7334 | if (child_event->attr.inherit_stat) |
7335 | perf_event_read_event(child_event, child); | |
38b200d6 | 7336 | |
b5e58793 | 7337 | child_val = perf_event_count(child_event); |
d859e29f PM |
7338 | |
7339 | /* | |
7340 | * Add back the child's count to the parent's count: | |
7341 | */ | |
a6e6dea6 | 7342 | atomic64_add(child_val, &parent_event->child_count); |
cdd6c482 IM |
7343 | atomic64_add(child_event->total_time_enabled, |
7344 | &parent_event->child_total_time_enabled); | |
7345 | atomic64_add(child_event->total_time_running, | |
7346 | &parent_event->child_total_time_running); | |
d859e29f PM |
7347 | |
7348 | /* | |
cdd6c482 | 7349 | * Remove this event from the parent's list |
d859e29f | 7350 | */ |
cdd6c482 IM |
7351 | WARN_ON_ONCE(parent_event->ctx->parent_ctx); |
7352 | mutex_lock(&parent_event->child_mutex); | |
7353 | list_del_init(&child_event->child_list); | |
7354 | mutex_unlock(&parent_event->child_mutex); | |
d859e29f PM |
7355 | |
7356 | /* | |
cdd6c482 | 7357 | * Release the parent event, if this was the last |
d859e29f PM |
7358 | * reference to it. |
7359 | */ | |
a6fa941d | 7360 | put_event(parent_event); |
d859e29f PM |
7361 | } |
7362 | ||
9b51f66d | 7363 | static void |
cdd6c482 IM |
7364 | __perf_event_exit_task(struct perf_event *child_event, |
7365 | struct perf_event_context *child_ctx, | |
38b200d6 | 7366 | struct task_struct *child) |
9b51f66d | 7367 | { |
38b435b1 PZ |
7368 | if (child_event->parent) { |
7369 | raw_spin_lock_irq(&child_ctx->lock); | |
7370 | perf_group_detach(child_event); | |
7371 | raw_spin_unlock_irq(&child_ctx->lock); | |
7372 | } | |
9b51f66d | 7373 | |
fe4b04fa | 7374 | perf_remove_from_context(child_event); |
0cc0c027 | 7375 | |
9b51f66d | 7376 | /* |
38b435b1 | 7377 | * It can happen that the parent exits first, and has events |
9b51f66d | 7378 | * that are still around due to the child reference. These |
38b435b1 | 7379 | * events need to be zapped. |
9b51f66d | 7380 | */ |
38b435b1 | 7381 | if (child_event->parent) { |
cdd6c482 IM |
7382 | sync_child_event(child_event, child); |
7383 | free_event(child_event); | |
4bcf349a | 7384 | } |
9b51f66d IM |
7385 | } |
7386 | ||
8dc85d54 | 7387 | static void perf_event_exit_task_context(struct task_struct *child, int ctxn) |
9b51f66d | 7388 | { |
cdd6c482 IM |
7389 | struct perf_event *child_event, *tmp; |
7390 | struct perf_event_context *child_ctx; | |
a63eaf34 | 7391 | unsigned long flags; |
9b51f66d | 7392 | |
8dc85d54 | 7393 | if (likely(!child->perf_event_ctxp[ctxn])) { |
cdd6c482 | 7394 | perf_event_task(child, NULL, 0); |
9b51f66d | 7395 | return; |
9f498cc5 | 7396 | } |
9b51f66d | 7397 | |
a63eaf34 | 7398 | local_irq_save(flags); |
ad3a37de PM |
7399 | /* |
7400 | * We can't reschedule here because interrupts are disabled, | |
7401 | * and either child is current or it is a task that can't be | |
7402 | * scheduled, so we are now safe from rescheduling changing | |
7403 | * our context. | |
7404 | */ | |
806839b2 | 7405 | child_ctx = rcu_dereference_raw(child->perf_event_ctxp[ctxn]); |
c93f7669 PM |
7406 | |
7407 | /* | |
7408 | * Take the context lock here so that if find_get_context is | |
cdd6c482 | 7409 | * reading child->perf_event_ctxp, we wait until it has |
c93f7669 PM |
7410 | * incremented the context's refcount before we do put_ctx below. |
7411 | */ | |
e625cce1 | 7412 | raw_spin_lock(&child_ctx->lock); |
04dc2dbb | 7413 | task_ctx_sched_out(child_ctx); |
8dc85d54 | 7414 | child->perf_event_ctxp[ctxn] = NULL; |
71a851b4 PZ |
7415 | /* |
7416 | * If this context is a clone; unclone it so it can't get | |
7417 | * swapped to another process while we're removing all | |
cdd6c482 | 7418 | * the events from it. |
71a851b4 PZ |
7419 | */ |
7420 | unclone_ctx(child_ctx); | |
5e942bb3 | 7421 | update_context_time(child_ctx); |
e625cce1 | 7422 | raw_spin_unlock_irqrestore(&child_ctx->lock, flags); |
9f498cc5 PZ |
7423 | |
7424 | /* | |
cdd6c482 IM |
7425 | * Report the task dead after unscheduling the events so that we |
7426 | * won't get any samples after PERF_RECORD_EXIT. We can however still | |
7427 | * get a few PERF_RECORD_READ events. | |
9f498cc5 | 7428 | */ |
cdd6c482 | 7429 | perf_event_task(child, child_ctx, 0); |
a63eaf34 | 7430 | |
66fff224 PZ |
7431 | /* |
7432 | * We can recurse on the same lock type through: | |
7433 | * | |
cdd6c482 IM |
7434 | * __perf_event_exit_task() |
7435 | * sync_child_event() | |
a6fa941d AV |
7436 | * put_event() |
7437 | * mutex_lock(&ctx->mutex) | |
66fff224 PZ |
7438 | * |
7439 | * But since its the parent context it won't be the same instance. | |
7440 | */ | |
a0507c84 | 7441 | mutex_lock(&child_ctx->mutex); |
a63eaf34 | 7442 | |
8bc20959 | 7443 | again: |
889ff015 FW |
7444 | list_for_each_entry_safe(child_event, tmp, &child_ctx->pinned_groups, |
7445 | group_entry) | |
7446 | __perf_event_exit_task(child_event, child_ctx, child); | |
7447 | ||
7448 | list_for_each_entry_safe(child_event, tmp, &child_ctx->flexible_groups, | |
65abc865 | 7449 | group_entry) |
cdd6c482 | 7450 | __perf_event_exit_task(child_event, child_ctx, child); |
8bc20959 PZ |
7451 | |
7452 | /* | |
cdd6c482 | 7453 | * If the last event was a group event, it will have appended all |
8bc20959 PZ |
7454 | * its siblings to the list, but we obtained 'tmp' before that which |
7455 | * will still point to the list head terminating the iteration. | |
7456 | */ | |
889ff015 FW |
7457 | if (!list_empty(&child_ctx->pinned_groups) || |
7458 | !list_empty(&child_ctx->flexible_groups)) | |
8bc20959 | 7459 | goto again; |
a63eaf34 PM |
7460 | |
7461 | mutex_unlock(&child_ctx->mutex); | |
7462 | ||
7463 | put_ctx(child_ctx); | |
9b51f66d IM |
7464 | } |
7465 | ||
8dc85d54 PZ |
7466 | /* |
7467 | * When a child task exits, feed back event values to parent events. | |
7468 | */ | |
7469 | void perf_event_exit_task(struct task_struct *child) | |
7470 | { | |
8882135b | 7471 | struct perf_event *event, *tmp; |
8dc85d54 PZ |
7472 | int ctxn; |
7473 | ||
8882135b PZ |
7474 | mutex_lock(&child->perf_event_mutex); |
7475 | list_for_each_entry_safe(event, tmp, &child->perf_event_list, | |
7476 | owner_entry) { | |
7477 | list_del_init(&event->owner_entry); | |
7478 | ||
7479 | /* | |
7480 | * Ensure the list deletion is visible before we clear | |
7481 | * the owner, closes a race against perf_release() where | |
7482 | * we need to serialize on the owner->perf_event_mutex. | |
7483 | */ | |
7484 | smp_wmb(); | |
7485 | event->owner = NULL; | |
7486 | } | |
7487 | mutex_unlock(&child->perf_event_mutex); | |
7488 | ||
8dc85d54 PZ |
7489 | for_each_task_context_nr(ctxn) |
7490 | perf_event_exit_task_context(child, ctxn); | |
7491 | } | |
7492 | ||
889ff015 FW |
7493 | static void perf_free_event(struct perf_event *event, |
7494 | struct perf_event_context *ctx) | |
7495 | { | |
7496 | struct perf_event *parent = event->parent; | |
7497 | ||
7498 | if (WARN_ON_ONCE(!parent)) | |
7499 | return; | |
7500 | ||
7501 | mutex_lock(&parent->child_mutex); | |
7502 | list_del_init(&event->child_list); | |
7503 | mutex_unlock(&parent->child_mutex); | |
7504 | ||
a6fa941d | 7505 | put_event(parent); |
889ff015 | 7506 | |
8a49542c | 7507 | perf_group_detach(event); |
889ff015 FW |
7508 | list_del_event(event, ctx); |
7509 | free_event(event); | |
7510 | } | |
7511 | ||
bbbee908 PZ |
7512 | /* |
7513 | * free an unexposed, unused context as created by inheritance by | |
8dc85d54 | 7514 | * perf_event_init_task below, used by fork() in case of fail. |
bbbee908 | 7515 | */ |
cdd6c482 | 7516 | void perf_event_free_task(struct task_struct *task) |
bbbee908 | 7517 | { |
8dc85d54 | 7518 | struct perf_event_context *ctx; |
cdd6c482 | 7519 | struct perf_event *event, *tmp; |
8dc85d54 | 7520 | int ctxn; |
bbbee908 | 7521 | |
8dc85d54 PZ |
7522 | for_each_task_context_nr(ctxn) { |
7523 | ctx = task->perf_event_ctxp[ctxn]; | |
7524 | if (!ctx) | |
7525 | continue; | |
bbbee908 | 7526 | |
8dc85d54 | 7527 | mutex_lock(&ctx->mutex); |
bbbee908 | 7528 | again: |
8dc85d54 PZ |
7529 | list_for_each_entry_safe(event, tmp, &ctx->pinned_groups, |
7530 | group_entry) | |
7531 | perf_free_event(event, ctx); | |
bbbee908 | 7532 | |
8dc85d54 PZ |
7533 | list_for_each_entry_safe(event, tmp, &ctx->flexible_groups, |
7534 | group_entry) | |
7535 | perf_free_event(event, ctx); | |
bbbee908 | 7536 | |
8dc85d54 PZ |
7537 | if (!list_empty(&ctx->pinned_groups) || |
7538 | !list_empty(&ctx->flexible_groups)) | |
7539 | goto again; | |
bbbee908 | 7540 | |
8dc85d54 | 7541 | mutex_unlock(&ctx->mutex); |
bbbee908 | 7542 | |
8dc85d54 PZ |
7543 | put_ctx(ctx); |
7544 | } | |
889ff015 FW |
7545 | } |
7546 | ||
4e231c79 PZ |
7547 | void perf_event_delayed_put(struct task_struct *task) |
7548 | { | |
7549 | int ctxn; | |
7550 | ||
7551 | for_each_task_context_nr(ctxn) | |
7552 | WARN_ON_ONCE(task->perf_event_ctxp[ctxn]); | |
7553 | } | |
7554 | ||
97dee4f3 PZ |
7555 | /* |
7556 | * inherit a event from parent task to child task: | |
7557 | */ | |
7558 | static struct perf_event * | |
7559 | inherit_event(struct perf_event *parent_event, | |
7560 | struct task_struct *parent, | |
7561 | struct perf_event_context *parent_ctx, | |
7562 | struct task_struct *child, | |
7563 | struct perf_event *group_leader, | |
7564 | struct perf_event_context *child_ctx) | |
7565 | { | |
7566 | struct perf_event *child_event; | |
cee010ec | 7567 | unsigned long flags; |
97dee4f3 PZ |
7568 | |
7569 | /* | |
7570 | * Instead of creating recursive hierarchies of events, | |
7571 | * we link inherited events back to the original parent, | |
7572 | * which has a filp for sure, which we use as the reference | |
7573 | * count: | |
7574 | */ | |
7575 | if (parent_event->parent) | |
7576 | parent_event = parent_event->parent; | |
7577 | ||
7578 | child_event = perf_event_alloc(&parent_event->attr, | |
7579 | parent_event->cpu, | |
d580ff86 | 7580 | child, |
97dee4f3 | 7581 | group_leader, parent_event, |
4dc0da86 | 7582 | NULL, NULL); |
97dee4f3 PZ |
7583 | if (IS_ERR(child_event)) |
7584 | return child_event; | |
a6fa941d AV |
7585 | |
7586 | if (!atomic_long_inc_not_zero(&parent_event->refcount)) { | |
7587 | free_event(child_event); | |
7588 | return NULL; | |
7589 | } | |
7590 | ||
97dee4f3 PZ |
7591 | get_ctx(child_ctx); |
7592 | ||
7593 | /* | |
7594 | * Make the child state follow the state of the parent event, | |
7595 | * not its attr.disabled bit. We hold the parent's mutex, | |
7596 | * so we won't race with perf_event_{en, dis}able_family. | |
7597 | */ | |
7598 | if (parent_event->state >= PERF_EVENT_STATE_INACTIVE) | |
7599 | child_event->state = PERF_EVENT_STATE_INACTIVE; | |
7600 | else | |
7601 | child_event->state = PERF_EVENT_STATE_OFF; | |
7602 | ||
7603 | if (parent_event->attr.freq) { | |
7604 | u64 sample_period = parent_event->hw.sample_period; | |
7605 | struct hw_perf_event *hwc = &child_event->hw; | |
7606 | ||
7607 | hwc->sample_period = sample_period; | |
7608 | hwc->last_period = sample_period; | |
7609 | ||
7610 | local64_set(&hwc->period_left, sample_period); | |
7611 | } | |
7612 | ||
7613 | child_event->ctx = child_ctx; | |
7614 | child_event->overflow_handler = parent_event->overflow_handler; | |
4dc0da86 AK |
7615 | child_event->overflow_handler_context |
7616 | = parent_event->overflow_handler_context; | |
97dee4f3 | 7617 | |
614b6780 TG |
7618 | /* |
7619 | * Precalculate sample_data sizes | |
7620 | */ | |
7621 | perf_event__header_size(child_event); | |
6844c09d | 7622 | perf_event__id_header_size(child_event); |
614b6780 | 7623 | |
97dee4f3 PZ |
7624 | /* |
7625 | * Link it up in the child's context: | |
7626 | */ | |
cee010ec | 7627 | raw_spin_lock_irqsave(&child_ctx->lock, flags); |
97dee4f3 | 7628 | add_event_to_ctx(child_event, child_ctx); |
cee010ec | 7629 | raw_spin_unlock_irqrestore(&child_ctx->lock, flags); |
97dee4f3 | 7630 | |
97dee4f3 PZ |
7631 | /* |
7632 | * Link this into the parent event's child list | |
7633 | */ | |
7634 | WARN_ON_ONCE(parent_event->ctx->parent_ctx); | |
7635 | mutex_lock(&parent_event->child_mutex); | |
7636 | list_add_tail(&child_event->child_list, &parent_event->child_list); | |
7637 | mutex_unlock(&parent_event->child_mutex); | |
7638 | ||
7639 | return child_event; | |
7640 | } | |
7641 | ||
7642 | static int inherit_group(struct perf_event *parent_event, | |
7643 | struct task_struct *parent, | |
7644 | struct perf_event_context *parent_ctx, | |
7645 | struct task_struct *child, | |
7646 | struct perf_event_context *child_ctx) | |
7647 | { | |
7648 | struct perf_event *leader; | |
7649 | struct perf_event *sub; | |
7650 | struct perf_event *child_ctr; | |
7651 | ||
7652 | leader = inherit_event(parent_event, parent, parent_ctx, | |
7653 | child, NULL, child_ctx); | |
7654 | if (IS_ERR(leader)) | |
7655 | return PTR_ERR(leader); | |
7656 | list_for_each_entry(sub, &parent_event->sibling_list, group_entry) { | |
7657 | child_ctr = inherit_event(sub, parent, parent_ctx, | |
7658 | child, leader, child_ctx); | |
7659 | if (IS_ERR(child_ctr)) | |
7660 | return PTR_ERR(child_ctr); | |
7661 | } | |
7662 | return 0; | |
889ff015 FW |
7663 | } |
7664 | ||
7665 | static int | |
7666 | inherit_task_group(struct perf_event *event, struct task_struct *parent, | |
7667 | struct perf_event_context *parent_ctx, | |
8dc85d54 | 7668 | struct task_struct *child, int ctxn, |
889ff015 FW |
7669 | int *inherited_all) |
7670 | { | |
7671 | int ret; | |
8dc85d54 | 7672 | struct perf_event_context *child_ctx; |
889ff015 FW |
7673 | |
7674 | if (!event->attr.inherit) { | |
7675 | *inherited_all = 0; | |
7676 | return 0; | |
bbbee908 PZ |
7677 | } |
7678 | ||
fe4b04fa | 7679 | child_ctx = child->perf_event_ctxp[ctxn]; |
889ff015 FW |
7680 | if (!child_ctx) { |
7681 | /* | |
7682 | * This is executed from the parent task context, so | |
7683 | * inherit events that have been marked for cloning. | |
7684 | * First allocate and initialize a context for the | |
7685 | * child. | |
7686 | */ | |
bbbee908 | 7687 | |
734df5ab | 7688 | child_ctx = alloc_perf_context(parent_ctx->pmu, child); |
889ff015 FW |
7689 | if (!child_ctx) |
7690 | return -ENOMEM; | |
bbbee908 | 7691 | |
8dc85d54 | 7692 | child->perf_event_ctxp[ctxn] = child_ctx; |
889ff015 FW |
7693 | } |
7694 | ||
7695 | ret = inherit_group(event, parent, parent_ctx, | |
7696 | child, child_ctx); | |
7697 | ||
7698 | if (ret) | |
7699 | *inherited_all = 0; | |
7700 | ||
7701 | return ret; | |
bbbee908 PZ |
7702 | } |
7703 | ||
9b51f66d | 7704 | /* |
cdd6c482 | 7705 | * Initialize the perf_event context in task_struct |
9b51f66d | 7706 | */ |
8dc85d54 | 7707 | int perf_event_init_context(struct task_struct *child, int ctxn) |
9b51f66d | 7708 | { |
889ff015 | 7709 | struct perf_event_context *child_ctx, *parent_ctx; |
cdd6c482 IM |
7710 | struct perf_event_context *cloned_ctx; |
7711 | struct perf_event *event; | |
9b51f66d | 7712 | struct task_struct *parent = current; |
564c2b21 | 7713 | int inherited_all = 1; |
dddd3379 | 7714 | unsigned long flags; |
6ab423e0 | 7715 | int ret = 0; |
9b51f66d | 7716 | |
8dc85d54 | 7717 | if (likely(!parent->perf_event_ctxp[ctxn])) |
6ab423e0 PZ |
7718 | return 0; |
7719 | ||
ad3a37de | 7720 | /* |
25346b93 PM |
7721 | * If the parent's context is a clone, pin it so it won't get |
7722 | * swapped under us. | |
ad3a37de | 7723 | */ |
8dc85d54 | 7724 | parent_ctx = perf_pin_task_context(parent, ctxn); |
25346b93 | 7725 | |
ad3a37de PM |
7726 | /* |
7727 | * No need to check if parent_ctx != NULL here; since we saw | |
7728 | * it non-NULL earlier, the only reason for it to become NULL | |
7729 | * is if we exit, and since we're currently in the middle of | |
7730 | * a fork we can't be exiting at the same time. | |
7731 | */ | |
ad3a37de | 7732 | |
9b51f66d IM |
7733 | /* |
7734 | * Lock the parent list. No need to lock the child - not PID | |
7735 | * hashed yet and not running, so nobody can access it. | |
7736 | */ | |
d859e29f | 7737 | mutex_lock(&parent_ctx->mutex); |
9b51f66d IM |
7738 | |
7739 | /* | |
7740 | * We dont have to disable NMIs - we are only looking at | |
7741 | * the list, not manipulating it: | |
7742 | */ | |
889ff015 | 7743 | list_for_each_entry(event, &parent_ctx->pinned_groups, group_entry) { |
8dc85d54 PZ |
7744 | ret = inherit_task_group(event, parent, parent_ctx, |
7745 | child, ctxn, &inherited_all); | |
889ff015 FW |
7746 | if (ret) |
7747 | break; | |
7748 | } | |
b93f7978 | 7749 | |
dddd3379 TG |
7750 | /* |
7751 | * We can't hold ctx->lock when iterating the ->flexible_group list due | |
7752 | * to allocations, but we need to prevent rotation because | |
7753 | * rotate_ctx() will change the list from interrupt context. | |
7754 | */ | |
7755 | raw_spin_lock_irqsave(&parent_ctx->lock, flags); | |
7756 | parent_ctx->rotate_disable = 1; | |
7757 | raw_spin_unlock_irqrestore(&parent_ctx->lock, flags); | |
7758 | ||
889ff015 | 7759 | list_for_each_entry(event, &parent_ctx->flexible_groups, group_entry) { |
8dc85d54 PZ |
7760 | ret = inherit_task_group(event, parent, parent_ctx, |
7761 | child, ctxn, &inherited_all); | |
889ff015 | 7762 | if (ret) |
9b51f66d | 7763 | break; |
564c2b21 PM |
7764 | } |
7765 | ||
dddd3379 TG |
7766 | raw_spin_lock_irqsave(&parent_ctx->lock, flags); |
7767 | parent_ctx->rotate_disable = 0; | |
dddd3379 | 7768 | |
8dc85d54 | 7769 | child_ctx = child->perf_event_ctxp[ctxn]; |
889ff015 | 7770 | |
05cbaa28 | 7771 | if (child_ctx && inherited_all) { |
564c2b21 PM |
7772 | /* |
7773 | * Mark the child context as a clone of the parent | |
7774 | * context, or of whatever the parent is a clone of. | |
c5ed5145 PZ |
7775 | * |
7776 | * Note that if the parent is a clone, the holding of | |
7777 | * parent_ctx->lock avoids it from being uncloned. | |
564c2b21 | 7778 | */ |
c5ed5145 | 7779 | cloned_ctx = parent_ctx->parent_ctx; |
ad3a37de PM |
7780 | if (cloned_ctx) { |
7781 | child_ctx->parent_ctx = cloned_ctx; | |
25346b93 | 7782 | child_ctx->parent_gen = parent_ctx->parent_gen; |
564c2b21 PM |
7783 | } else { |
7784 | child_ctx->parent_ctx = parent_ctx; | |
7785 | child_ctx->parent_gen = parent_ctx->generation; | |
7786 | } | |
7787 | get_ctx(child_ctx->parent_ctx); | |
9b51f66d IM |
7788 | } |
7789 | ||
c5ed5145 | 7790 | raw_spin_unlock_irqrestore(&parent_ctx->lock, flags); |
d859e29f | 7791 | mutex_unlock(&parent_ctx->mutex); |
6ab423e0 | 7792 | |
25346b93 | 7793 | perf_unpin_context(parent_ctx); |
fe4b04fa | 7794 | put_ctx(parent_ctx); |
ad3a37de | 7795 | |
6ab423e0 | 7796 | return ret; |
9b51f66d IM |
7797 | } |
7798 | ||
8dc85d54 PZ |
7799 | /* |
7800 | * Initialize the perf_event context in task_struct | |
7801 | */ | |
7802 | int perf_event_init_task(struct task_struct *child) | |
7803 | { | |
7804 | int ctxn, ret; | |
7805 | ||
8550d7cb ON |
7806 | memset(child->perf_event_ctxp, 0, sizeof(child->perf_event_ctxp)); |
7807 | mutex_init(&child->perf_event_mutex); | |
7808 | INIT_LIST_HEAD(&child->perf_event_list); | |
7809 | ||
8dc85d54 PZ |
7810 | for_each_task_context_nr(ctxn) { |
7811 | ret = perf_event_init_context(child, ctxn); | |
7812 | if (ret) | |
7813 | return ret; | |
7814 | } | |
7815 | ||
7816 | return 0; | |
7817 | } | |
7818 | ||
220b140b PM |
7819 | static void __init perf_event_init_all_cpus(void) |
7820 | { | |
b28ab83c | 7821 | struct swevent_htable *swhash; |
220b140b | 7822 | int cpu; |
220b140b PM |
7823 | |
7824 | for_each_possible_cpu(cpu) { | |
b28ab83c PZ |
7825 | swhash = &per_cpu(swevent_htable, cpu); |
7826 | mutex_init(&swhash->hlist_mutex); | |
e9d2b064 | 7827 | INIT_LIST_HEAD(&per_cpu(rotation_list, cpu)); |
220b140b PM |
7828 | } |
7829 | } | |
7830 | ||
0db0628d | 7831 | static void perf_event_init_cpu(int cpu) |
0793a61d | 7832 | { |
108b02cf | 7833 | struct swevent_htable *swhash = &per_cpu(swevent_htable, cpu); |
0793a61d | 7834 | |
b28ab83c | 7835 | mutex_lock(&swhash->hlist_mutex); |
4536e4d1 | 7836 | if (swhash->hlist_refcount > 0) { |
76e1d904 FW |
7837 | struct swevent_hlist *hlist; |
7838 | ||
b28ab83c PZ |
7839 | hlist = kzalloc_node(sizeof(*hlist), GFP_KERNEL, cpu_to_node(cpu)); |
7840 | WARN_ON(!hlist); | |
7841 | rcu_assign_pointer(swhash->swevent_hlist, hlist); | |
76e1d904 | 7842 | } |
b28ab83c | 7843 | mutex_unlock(&swhash->hlist_mutex); |
0793a61d TG |
7844 | } |
7845 | ||
c277443c | 7846 | #if defined CONFIG_HOTPLUG_CPU || defined CONFIG_KEXEC |
e9d2b064 | 7847 | static void perf_pmu_rotate_stop(struct pmu *pmu) |
0793a61d | 7848 | { |
e9d2b064 PZ |
7849 | struct perf_cpu_context *cpuctx = this_cpu_ptr(pmu->pmu_cpu_context); |
7850 | ||
7851 | WARN_ON(!irqs_disabled()); | |
7852 | ||
7853 | list_del_init(&cpuctx->rotation_list); | |
7854 | } | |
7855 | ||
108b02cf | 7856 | static void __perf_event_exit_context(void *__info) |
0793a61d | 7857 | { |
108b02cf | 7858 | struct perf_event_context *ctx = __info; |
cdd6c482 | 7859 | struct perf_event *event, *tmp; |
0793a61d | 7860 | |
108b02cf | 7861 | perf_pmu_rotate_stop(ctx->pmu); |
b5ab4cd5 | 7862 | |
889ff015 | 7863 | list_for_each_entry_safe(event, tmp, &ctx->pinned_groups, group_entry) |
fe4b04fa | 7864 | __perf_remove_from_context(event); |
889ff015 | 7865 | list_for_each_entry_safe(event, tmp, &ctx->flexible_groups, group_entry) |
fe4b04fa | 7866 | __perf_remove_from_context(event); |
0793a61d | 7867 | } |
108b02cf PZ |
7868 | |
7869 | static void perf_event_exit_cpu_context(int cpu) | |
7870 | { | |
7871 | struct perf_event_context *ctx; | |
7872 | struct pmu *pmu; | |
7873 | int idx; | |
7874 | ||
7875 | idx = srcu_read_lock(&pmus_srcu); | |
7876 | list_for_each_entry_rcu(pmu, &pmus, entry) { | |
917bdd1c | 7877 | ctx = &per_cpu_ptr(pmu->pmu_cpu_context, cpu)->ctx; |
108b02cf PZ |
7878 | |
7879 | mutex_lock(&ctx->mutex); | |
7880 | smp_call_function_single(cpu, __perf_event_exit_context, ctx, 1); | |
7881 | mutex_unlock(&ctx->mutex); | |
7882 | } | |
7883 | srcu_read_unlock(&pmus_srcu, idx); | |
108b02cf PZ |
7884 | } |
7885 | ||
cdd6c482 | 7886 | static void perf_event_exit_cpu(int cpu) |
0793a61d | 7887 | { |
b28ab83c | 7888 | struct swevent_htable *swhash = &per_cpu(swevent_htable, cpu); |
d859e29f | 7889 | |
b28ab83c PZ |
7890 | mutex_lock(&swhash->hlist_mutex); |
7891 | swevent_hlist_release(swhash); | |
7892 | mutex_unlock(&swhash->hlist_mutex); | |
76e1d904 | 7893 | |
108b02cf | 7894 | perf_event_exit_cpu_context(cpu); |
0793a61d TG |
7895 | } |
7896 | #else | |
cdd6c482 | 7897 | static inline void perf_event_exit_cpu(int cpu) { } |
0793a61d TG |
7898 | #endif |
7899 | ||
c277443c PZ |
7900 | static int |
7901 | perf_reboot(struct notifier_block *notifier, unsigned long val, void *v) | |
7902 | { | |
7903 | int cpu; | |
7904 | ||
7905 | for_each_online_cpu(cpu) | |
7906 | perf_event_exit_cpu(cpu); | |
7907 | ||
7908 | return NOTIFY_OK; | |
7909 | } | |
7910 | ||
7911 | /* | |
7912 | * Run the perf reboot notifier at the very last possible moment so that | |
7913 | * the generic watchdog code runs as long as possible. | |
7914 | */ | |
7915 | static struct notifier_block perf_reboot_notifier = { | |
7916 | .notifier_call = perf_reboot, | |
7917 | .priority = INT_MIN, | |
7918 | }; | |
7919 | ||
0db0628d | 7920 | static int |
0793a61d TG |
7921 | perf_cpu_notify(struct notifier_block *self, unsigned long action, void *hcpu) |
7922 | { | |
7923 | unsigned int cpu = (long)hcpu; | |
7924 | ||
4536e4d1 | 7925 | switch (action & ~CPU_TASKS_FROZEN) { |
0793a61d TG |
7926 | |
7927 | case CPU_UP_PREPARE: | |
5e11637e | 7928 | case CPU_DOWN_FAILED: |
cdd6c482 | 7929 | perf_event_init_cpu(cpu); |
0793a61d TG |
7930 | break; |
7931 | ||
5e11637e | 7932 | case CPU_UP_CANCELED: |
0793a61d | 7933 | case CPU_DOWN_PREPARE: |
cdd6c482 | 7934 | perf_event_exit_cpu(cpu); |
0793a61d | 7935 | break; |
0793a61d TG |
7936 | default: |
7937 | break; | |
7938 | } | |
7939 | ||
7940 | return NOTIFY_OK; | |
7941 | } | |
7942 | ||
cdd6c482 | 7943 | void __init perf_event_init(void) |
0793a61d | 7944 | { |
3c502e7a JW |
7945 | int ret; |
7946 | ||
2e80a82a PZ |
7947 | idr_init(&pmu_idr); |
7948 | ||
220b140b | 7949 | perf_event_init_all_cpus(); |
b0a873eb | 7950 | init_srcu_struct(&pmus_srcu); |
2e80a82a PZ |
7951 | perf_pmu_register(&perf_swevent, "software", PERF_TYPE_SOFTWARE); |
7952 | perf_pmu_register(&perf_cpu_clock, NULL, -1); | |
7953 | perf_pmu_register(&perf_task_clock, NULL, -1); | |
b0a873eb PZ |
7954 | perf_tp_register(); |
7955 | perf_cpu_notifier(perf_cpu_notify); | |
c277443c | 7956 | register_reboot_notifier(&perf_reboot_notifier); |
3c502e7a JW |
7957 | |
7958 | ret = init_hw_breakpoint(); | |
7959 | WARN(ret, "hw_breakpoint initialization failed with: %d", ret); | |
b2029520 GN |
7960 | |
7961 | /* do not patch jump label more than once per second */ | |
7962 | jump_label_rate_limit(&perf_sched_events, HZ); | |
b01c3a00 JO |
7963 | |
7964 | /* | |
7965 | * Build time assertion that we keep the data_head at the intended | |
7966 | * location. IOW, validation we got the __reserved[] size right. | |
7967 | */ | |
7968 | BUILD_BUG_ON((offsetof(struct perf_event_mmap_page, data_head)) | |
7969 | != 1024); | |
0793a61d | 7970 | } |
abe43400 PZ |
7971 | |
7972 | static int __init perf_event_sysfs_init(void) | |
7973 | { | |
7974 | struct pmu *pmu; | |
7975 | int ret; | |
7976 | ||
7977 | mutex_lock(&pmus_lock); | |
7978 | ||
7979 | ret = bus_register(&pmu_bus); | |
7980 | if (ret) | |
7981 | goto unlock; | |
7982 | ||
7983 | list_for_each_entry(pmu, &pmus, entry) { | |
7984 | if (!pmu->name || pmu->type < 0) | |
7985 | continue; | |
7986 | ||
7987 | ret = pmu_dev_alloc(pmu); | |
7988 | WARN(ret, "Failed to register pmu: %s, reason %d\n", pmu->name, ret); | |
7989 | } | |
7990 | pmu_bus_running = 1; | |
7991 | ret = 0; | |
7992 | ||
7993 | unlock: | |
7994 | mutex_unlock(&pmus_lock); | |
7995 | ||
7996 | return ret; | |
7997 | } | |
7998 | device_initcall(perf_event_sysfs_init); | |
e5d1367f SE |
7999 | |
8000 | #ifdef CONFIG_CGROUP_PERF | |
eb95419b TH |
8001 | static struct cgroup_subsys_state * |
8002 | perf_cgroup_css_alloc(struct cgroup_subsys_state *parent_css) | |
e5d1367f SE |
8003 | { |
8004 | struct perf_cgroup *jc; | |
e5d1367f | 8005 | |
1b15d055 | 8006 | jc = kzalloc(sizeof(*jc), GFP_KERNEL); |
e5d1367f SE |
8007 | if (!jc) |
8008 | return ERR_PTR(-ENOMEM); | |
8009 | ||
e5d1367f SE |
8010 | jc->info = alloc_percpu(struct perf_cgroup_info); |
8011 | if (!jc->info) { | |
8012 | kfree(jc); | |
8013 | return ERR_PTR(-ENOMEM); | |
8014 | } | |
8015 | ||
e5d1367f SE |
8016 | return &jc->css; |
8017 | } | |
8018 | ||
eb95419b | 8019 | static void perf_cgroup_css_free(struct cgroup_subsys_state *css) |
e5d1367f | 8020 | { |
eb95419b TH |
8021 | struct perf_cgroup *jc = container_of(css, struct perf_cgroup, css); |
8022 | ||
e5d1367f SE |
8023 | free_percpu(jc->info); |
8024 | kfree(jc); | |
8025 | } | |
8026 | ||
8027 | static int __perf_cgroup_move(void *info) | |
8028 | { | |
8029 | struct task_struct *task = info; | |
8030 | perf_cgroup_switch(task, PERF_CGROUP_SWOUT | PERF_CGROUP_SWIN); | |
8031 | return 0; | |
8032 | } | |
8033 | ||
eb95419b TH |
8034 | static void perf_cgroup_attach(struct cgroup_subsys_state *css, |
8035 | struct cgroup_taskset *tset) | |
e5d1367f | 8036 | { |
bb9d97b6 TH |
8037 | struct task_struct *task; |
8038 | ||
d99c8727 | 8039 | cgroup_taskset_for_each(task, css, tset) |
bb9d97b6 | 8040 | task_function_call(task, __perf_cgroup_move, task); |
e5d1367f SE |
8041 | } |
8042 | ||
eb95419b TH |
8043 | static void perf_cgroup_exit(struct cgroup_subsys_state *css, |
8044 | struct cgroup_subsys_state *old_css, | |
761b3ef5 | 8045 | struct task_struct *task) |
e5d1367f SE |
8046 | { |
8047 | /* | |
8048 | * cgroup_exit() is called in the copy_process() failure path. | |
8049 | * Ignore this case since the task hasn't ran yet, this avoids | |
8050 | * trying to poke a half freed task state from generic code. | |
8051 | */ | |
8052 | if (!(task->flags & PF_EXITING)) | |
8053 | return; | |
8054 | ||
bb9d97b6 | 8055 | task_function_call(task, __perf_cgroup_move, task); |
e5d1367f SE |
8056 | } |
8057 | ||
073219e9 | 8058 | struct cgroup_subsys perf_event_cgrp_subsys = { |
92fb9748 TH |
8059 | .css_alloc = perf_cgroup_css_alloc, |
8060 | .css_free = perf_cgroup_css_free, | |
e7e7ee2e | 8061 | .exit = perf_cgroup_exit, |
bb9d97b6 | 8062 | .attach = perf_cgroup_attach, |
e5d1367f SE |
8063 | }; |
8064 | #endif /* CONFIG_CGROUP_PERF */ |