fix warning: "x86: sparse_irq needs spin_lock in allocations"
[deliverable/linux.git] / kernel / irq / chip.c
CommitLineData
dd87eb3a
TG
1/*
2 * linux/kernel/irq/chip.c
3 *
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
6 *
7 * This file contains the core interrupt handling code, for irq-chip
8 * based architectures.
9 *
10 * Detailed information is available in Documentation/DocBook/genericirq
11 */
12
13#include <linux/irq.h>
7fe3730d 14#include <linux/msi.h>
dd87eb3a
TG
15#include <linux/module.h>
16#include <linux/interrupt.h>
17#include <linux/kernel_stat.h>
18
19#include "internals.h"
20
3a16d713
EB
21/**
22 * dynamic_irq_init - initialize a dynamically allocated irq
23 * @irq: irq number to initialize
24 */
25void dynamic_irq_init(unsigned int irq)
26{
27 struct irq_desc *desc;
28 unsigned long flags;
29
cb5bc832
YL
30 /* first time to use this irq_desc */
31 desc = irq_to_desc_alloc(irq);
7d94f7ca 32 if (!desc) {
261c40c1 33 WARN(1, KERN_ERR "Trying to initialize invalid IRQ%d\n", irq);
3a16d713
EB
34 return;
35 }
36
37 /* Ensure we don't have left over values from a previous use of this irq */
3a16d713
EB
38 spin_lock_irqsave(&desc->lock, flags);
39 desc->status = IRQ_DISABLED;
40 desc->chip = &no_irq_chip;
41 desc->handle_irq = handle_bad_irq;
42 desc->depth = 1;
5b912c10 43 desc->msi_desc = NULL;
3a16d713
EB
44 desc->handler_data = NULL;
45 desc->chip_data = NULL;
46 desc->action = NULL;
47 desc->irq_count = 0;
48 desc->irqs_unhandled = 0;
49#ifdef CONFIG_SMP
d366f8cb 50 cpus_setall(desc->affinity);
3a16d713
EB
51#endif
52 spin_unlock_irqrestore(&desc->lock, flags);
53}
54
55/**
56 * dynamic_irq_cleanup - cleanup a dynamically allocated irq
57 * @irq: irq number to initialize
58 */
59void dynamic_irq_cleanup(unsigned int irq)
60{
61 struct irq_desc *desc;
62 unsigned long flags;
63
cb5bc832 64 desc = irq_to_desc(irq);
7d94f7ca 65 if (!desc) {
261c40c1 66 WARN(1, KERN_ERR "Trying to cleanup invalid IRQ%d\n", irq);
3a16d713
EB
67 return;
68 }
69
3a16d713 70 spin_lock_irqsave(&desc->lock, flags);
1f80025e
EB
71 if (desc->action) {
72 spin_unlock_irqrestore(&desc->lock, flags);
261c40c1 73 WARN(1, KERN_ERR "Destroying IRQ%d without calling free_irq\n",
1f80025e 74 irq);
1f80025e
EB
75 return;
76 }
5b912c10
EB
77 desc->msi_desc = NULL;
78 desc->handler_data = NULL;
79 desc->chip_data = NULL;
3a16d713
EB
80 desc->handle_irq = handle_bad_irq;
81 desc->chip = &no_irq_chip;
82 spin_unlock_irqrestore(&desc->lock, flags);
83}
84
85
dd87eb3a
TG
86/**
87 * set_irq_chip - set the irq chip for an irq
88 * @irq: irq number
89 * @chip: pointer to irq chip description structure
90 */
91int set_irq_chip(unsigned int irq, struct irq_chip *chip)
92{
93 struct irq_desc *desc;
94 unsigned long flags;
95
cb5bc832 96 desc = irq_to_desc(irq);
7d94f7ca 97 if (!desc) {
261c40c1 98 WARN(1, KERN_ERR "Trying to install chip for IRQ%d\n", irq);
dd87eb3a
TG
99 return -EINVAL;
100 }
101
102 if (!chip)
103 chip = &no_irq_chip;
104
dd87eb3a
TG
105 spin_lock_irqsave(&desc->lock, flags);
106 irq_chip_set_defaults(chip);
107 desc->chip = chip;
dd87eb3a
TG
108 spin_unlock_irqrestore(&desc->lock, flags);
109
110 return 0;
111}
112EXPORT_SYMBOL(set_irq_chip);
113
114/**
0c5d1eb7 115 * set_irq_type - set the irq trigger type for an irq
dd87eb3a 116 * @irq: irq number
0c5d1eb7 117 * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
dd87eb3a
TG
118 */
119int set_irq_type(unsigned int irq, unsigned int type)
120{
121 struct irq_desc *desc;
122 unsigned long flags;
123 int ret = -ENXIO;
124
cb5bc832 125 desc = irq_to_desc(irq);
7d94f7ca 126 if (!desc) {
dd87eb3a
TG
127 printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq);
128 return -ENODEV;
129 }
130
0c5d1eb7
DB
131 if (type == IRQ_TYPE_NONE)
132 return 0;
133
134 spin_lock_irqsave(&desc->lock, flags);
135 ret = __irq_set_trigger(desc, irq, flags);
136 spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
137 return ret;
138}
139EXPORT_SYMBOL(set_irq_type);
140
141/**
142 * set_irq_data - set irq type data for an irq
143 * @irq: Interrupt number
144 * @data: Pointer to interrupt specific data
145 *
146 * Set the hardware irq controller data for an irq
147 */
148int set_irq_data(unsigned int irq, void *data)
149{
150 struct irq_desc *desc;
151 unsigned long flags;
152
cb5bc832 153 desc = irq_to_desc(irq);
7d94f7ca 154 if (!desc) {
dd87eb3a
TG
155 printk(KERN_ERR
156 "Trying to install controller data for IRQ%d\n", irq);
157 return -EINVAL;
158 }
159
dd87eb3a
TG
160 spin_lock_irqsave(&desc->lock, flags);
161 desc->handler_data = data;
162 spin_unlock_irqrestore(&desc->lock, flags);
163 return 0;
164}
165EXPORT_SYMBOL(set_irq_data);
166
5b912c10
EB
167/**
168 * set_irq_data - set irq type data for an irq
169 * @irq: Interrupt number
472900b8 170 * @entry: Pointer to MSI descriptor data
5b912c10
EB
171 *
172 * Set the hardware irq controller data for an irq
173 */
174int set_irq_msi(unsigned int irq, struct msi_desc *entry)
175{
176 struct irq_desc *desc;
177 unsigned long flags;
178
cb5bc832 179 desc = irq_to_desc(irq);
7d94f7ca 180 if (!desc) {
5b912c10
EB
181 printk(KERN_ERR
182 "Trying to install msi data for IRQ%d\n", irq);
183 return -EINVAL;
184 }
7d94f7ca 185
5b912c10
EB
186 spin_lock_irqsave(&desc->lock, flags);
187 desc->msi_desc = entry;
7fe3730d
ME
188 if (entry)
189 entry->irq = irq;
5b912c10
EB
190 spin_unlock_irqrestore(&desc->lock, flags);
191 return 0;
192}
193
dd87eb3a
TG
194/**
195 * set_irq_chip_data - set irq chip data for an irq
196 * @irq: Interrupt number
197 * @data: Pointer to chip specific data
198 *
199 * Set the hardware irq chip data for an irq
200 */
201int set_irq_chip_data(unsigned int irq, void *data)
202{
08678b08 203 struct irq_desc *desc;
dd87eb3a
TG
204 unsigned long flags;
205
cb5bc832 206 desc = irq_to_desc(irq);
7d94f7ca
YL
207 if (!desc) {
208 printk(KERN_ERR
209 "Trying to install chip data for IRQ%d\n", irq);
210 return -EINVAL;
211 }
212
213 if (!desc->chip) {
dd87eb3a
TG
214 printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq);
215 return -EINVAL;
216 }
217
218 spin_lock_irqsave(&desc->lock, flags);
219 desc->chip_data = data;
220 spin_unlock_irqrestore(&desc->lock, flags);
221
222 return 0;
223}
224EXPORT_SYMBOL(set_irq_chip_data);
225
226/*
227 * default enable function
228 */
229static void default_enable(unsigned int irq)
230{
08678b08 231 struct irq_desc *desc;
dd87eb3a 232
08678b08 233 desc = irq_to_desc(irq);
dd87eb3a
TG
234 desc->chip->unmask(irq);
235 desc->status &= ~IRQ_MASKED;
236}
237
238/*
239 * default disable function
240 */
241static void default_disable(unsigned int irq)
242{
dd87eb3a
TG
243}
244
245/*
246 * default startup function
247 */
248static unsigned int default_startup(unsigned int irq)
249{
08678b08
YL
250 struct irq_desc *desc;
251
252 desc = irq_to_desc(irq);
253 desc->chip->enable(irq);
dd87eb3a
TG
254
255 return 0;
256}
257
89d694b9
TG
258/*
259 * default shutdown function
260 */
261static void default_shutdown(unsigned int irq)
262{
08678b08 263 struct irq_desc *desc;
89d694b9 264
08678b08 265 desc = irq_to_desc(irq);
89d694b9
TG
266 desc->chip->mask(irq);
267 desc->status |= IRQ_MASKED;
268}
269
dd87eb3a
TG
270/*
271 * Fixup enable/disable function pointers
272 */
273void irq_chip_set_defaults(struct irq_chip *chip)
274{
275 if (!chip->enable)
276 chip->enable = default_enable;
277 if (!chip->disable)
278 chip->disable = default_disable;
279 if (!chip->startup)
280 chip->startup = default_startup;
89d694b9
TG
281 /*
282 * We use chip->disable, when the user provided its own. When
283 * we have default_disable set for chip->disable, then we need
284 * to use default_shutdown, otherwise the irq line is not
285 * disabled on free_irq():
286 */
dd87eb3a 287 if (!chip->shutdown)
89d694b9
TG
288 chip->shutdown = chip->disable != default_disable ?
289 chip->disable : default_shutdown;
dd87eb3a
TG
290 if (!chip->name)
291 chip->name = chip->typename;
b86432b4
ZY
292 if (!chip->end)
293 chip->end = dummy_irq_chip.end;
dd87eb3a
TG
294}
295
296static inline void mask_ack_irq(struct irq_desc *desc, int irq)
297{
298 if (desc->chip->mask_ack)
299 desc->chip->mask_ack(irq);
300 else {
301 desc->chip->mask(irq);
302 desc->chip->ack(irq);
303 }
304}
305
306/**
307 * handle_simple_irq - Simple and software-decoded IRQs.
308 * @irq: the interrupt number
309 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
310 *
311 * Simple interrupts are either sent from a demultiplexing interrupt
312 * handler or come from hardware, where no interrupt hardware control
313 * is necessary.
314 *
315 * Note: The caller is expected to handle the ack, clear, mask and
316 * unmask issues if necessary.
317 */
7ad5b3a5 318void
7d12e780 319handle_simple_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a
TG
320{
321 struct irqaction *action;
322 irqreturn_t action_ret;
dd87eb3a
TG
323
324 spin_lock(&desc->lock);
325
326 if (unlikely(desc->status & IRQ_INPROGRESS))
327 goto out_unlock;
971e5b35 328 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
8c464a4b 329#ifdef CONFIG_HAVE_DYN_ARRAY
7f95ec9e 330 kstat_irqs_this_cpu(desc)++;
8c464a4b
YL
331#else
332 kstat_irqs_this_cpu(irq)++;
333#endif
dd87eb3a
TG
334
335 action = desc->action;
971e5b35 336 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
dd87eb3a
TG
337 goto out_unlock;
338
339 desc->status |= IRQ_INPROGRESS;
340 spin_unlock(&desc->lock);
341
7d12e780 342 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 343 if (!noirqdebug)
7d12e780 344 note_interrupt(irq, desc, action_ret);
dd87eb3a
TG
345
346 spin_lock(&desc->lock);
347 desc->status &= ~IRQ_INPROGRESS;
348out_unlock:
349 spin_unlock(&desc->lock);
350}
351
352/**
353 * handle_level_irq - Level type irq handler
354 * @irq: the interrupt number
355 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
356 *
357 * Level type interrupts are active as long as the hardware line has
358 * the active level. This may require to mask the interrupt and unmask
359 * it after the associated handler has acknowledged the device, so the
360 * interrupt line is back to inactive.
361 */
7ad5b3a5 362void
7d12e780 363handle_level_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 364{
dd87eb3a
TG
365 struct irqaction *action;
366 irqreturn_t action_ret;
367
368 spin_lock(&desc->lock);
369 mask_ack_irq(desc, irq);
370
371 if (unlikely(desc->status & IRQ_INPROGRESS))
86998aa6 372 goto out_unlock;
dd87eb3a 373 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
8c464a4b 374#ifdef CONFIG_HAVE_DYN_ARRAY
7f95ec9e 375 kstat_irqs_this_cpu(desc)++;
8c464a4b
YL
376#else
377 kstat_irqs_this_cpu(irq)++;
378#endif
dd87eb3a
TG
379
380 /*
381 * If its disabled or no action available
382 * keep it masked and get out of here
383 */
384 action = desc->action;
49663421 385 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
86998aa6 386 goto out_unlock;
dd87eb3a
TG
387
388 desc->status |= IRQ_INPROGRESS;
389 spin_unlock(&desc->lock);
390
7d12e780 391 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 392 if (!noirqdebug)
7d12e780 393 note_interrupt(irq, desc, action_ret);
dd87eb3a
TG
394
395 spin_lock(&desc->lock);
396 desc->status &= ~IRQ_INPROGRESS;
dd87eb3a
TG
397 if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask)
398 desc->chip->unmask(irq);
86998aa6 399out_unlock:
dd87eb3a
TG
400 spin_unlock(&desc->lock);
401}
402
403/**
47c2a3aa 404 * handle_fasteoi_irq - irq handler for transparent controllers
dd87eb3a
TG
405 * @irq: the interrupt number
406 * @desc: the interrupt description structure for this irq
dd87eb3a 407 *
47c2a3aa 408 * Only a single callback will be issued to the chip: an ->eoi()
dd87eb3a
TG
409 * call when the interrupt has been serviced. This enables support
410 * for modern forms of interrupt handlers, which handle the flow
411 * details in hardware, transparently.
412 */
7ad5b3a5 413void
7d12e780 414handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 415{
dd87eb3a
TG
416 struct irqaction *action;
417 irqreturn_t action_ret;
418
419 spin_lock(&desc->lock);
420
421 if (unlikely(desc->status & IRQ_INPROGRESS))
422 goto out;
423
424 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
8c464a4b 425#ifdef CONFIG_HAVE_DYN_ARRAY
7f95ec9e 426 kstat_irqs_this_cpu(desc)++;
8c464a4b
YL
427#else
428 kstat_irqs_this_cpu(irq)++;
429#endif
dd87eb3a
TG
430
431 /*
432 * If its disabled or no action available
76d21601 433 * then mask it and get out of here:
dd87eb3a
TG
434 */
435 action = desc->action;
98bb244b
BH
436 if (unlikely(!action || (desc->status & IRQ_DISABLED))) {
437 desc->status |= IRQ_PENDING;
76d21601
IM
438 if (desc->chip->mask)
439 desc->chip->mask(irq);
dd87eb3a 440 goto out;
98bb244b 441 }
dd87eb3a
TG
442
443 desc->status |= IRQ_INPROGRESS;
98bb244b 444 desc->status &= ~IRQ_PENDING;
dd87eb3a
TG
445 spin_unlock(&desc->lock);
446
7d12e780 447 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 448 if (!noirqdebug)
7d12e780 449 note_interrupt(irq, desc, action_ret);
dd87eb3a
TG
450
451 spin_lock(&desc->lock);
452 desc->status &= ~IRQ_INPROGRESS;
453out:
47c2a3aa 454 desc->chip->eoi(irq);
dd87eb3a
TG
455
456 spin_unlock(&desc->lock);
457}
458
459/**
460 * handle_edge_irq - edge type IRQ handler
461 * @irq: the interrupt number
462 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
463 *
464 * Interrupt occures on the falling and/or rising edge of a hardware
465 * signal. The occurence is latched into the irq controller hardware
466 * and must be acked in order to be reenabled. After the ack another
467 * interrupt can happen on the same source even before the first one
468 * is handled by the assosiacted event handler. If this happens it
469 * might be necessary to disable (mask) the interrupt depending on the
470 * controller hardware. This requires to reenable the interrupt inside
471 * of the loop which handles the interrupts which have arrived while
472 * the handler was running. If all pending interrupts are handled, the
473 * loop is left.
474 */
7ad5b3a5 475void
7d12e780 476handle_edge_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 477{
dd87eb3a
TG
478 spin_lock(&desc->lock);
479
480 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
481
482 /*
483 * If we're currently running this IRQ, or its disabled,
484 * we shouldn't process the IRQ. Mark it pending, handle
485 * the necessary masking and go out
486 */
487 if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) ||
488 !desc->action)) {
489 desc->status |= (IRQ_PENDING | IRQ_MASKED);
490 mask_ack_irq(desc, irq);
491 goto out_unlock;
492 }
8c464a4b 493#ifdef CONFIG_HAVE_DYN_ARRAY
7f95ec9e 494 kstat_irqs_this_cpu(desc)++;
8c464a4b
YL
495#else
496 kstat_irqs_this_cpu(irq)++;
497#endif
dd87eb3a
TG
498
499 /* Start handling the irq */
500 desc->chip->ack(irq);
501
502 /* Mark the IRQ currently in progress.*/
503 desc->status |= IRQ_INPROGRESS;
504
505 do {
506 struct irqaction *action = desc->action;
507 irqreturn_t action_ret;
508
509 if (unlikely(!action)) {
510 desc->chip->mask(irq);
511 goto out_unlock;
512 }
513
514 /*
515 * When another irq arrived while we were handling
516 * one, we could have masked the irq.
517 * Renable it, if it was not disabled in meantime.
518 */
519 if (unlikely((desc->status &
520 (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) ==
521 (IRQ_PENDING | IRQ_MASKED))) {
522 desc->chip->unmask(irq);
523 desc->status &= ~IRQ_MASKED;
524 }
525
526 desc->status &= ~IRQ_PENDING;
527 spin_unlock(&desc->lock);
7d12e780 528 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 529 if (!noirqdebug)
7d12e780 530 note_interrupt(irq, desc, action_ret);
dd87eb3a
TG
531 spin_lock(&desc->lock);
532
533 } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING);
534
535 desc->status &= ~IRQ_INPROGRESS;
536out_unlock:
537 spin_unlock(&desc->lock);
538}
539
dd87eb3a
TG
540/**
541 * handle_percpu_IRQ - Per CPU local irq handler
542 * @irq: the interrupt number
543 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
544 *
545 * Per CPU interrupts on SMP machines without locking requirements
546 */
7ad5b3a5 547void
7d12e780 548handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a
TG
549{
550 irqreturn_t action_ret;
551
8c464a4b 552#ifdef CONFIG_HAVE_DYN_ARRAY
7f95ec9e 553 kstat_irqs_this_cpu(desc)++;
8c464a4b
YL
554#else
555 kstat_irqs_this_cpu(irq)++;
556#endif
dd87eb3a
TG
557
558 if (desc->chip->ack)
559 desc->chip->ack(irq);
560
7d12e780 561 action_ret = handle_IRQ_event(irq, desc->action);
dd87eb3a 562 if (!noirqdebug)
7d12e780 563 note_interrupt(irq, desc, action_ret);
dd87eb3a
TG
564
565 if (desc->chip->eoi)
566 desc->chip->eoi(irq);
567}
568
dd87eb3a 569void
a460e745
IM
570__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
571 const char *name)
dd87eb3a
TG
572{
573 struct irq_desc *desc;
574 unsigned long flags;
575
cb5bc832 576 desc = irq_to_desc(irq);
7d94f7ca 577 if (!desc) {
dd87eb3a
TG
578 printk(KERN_ERR
579 "Trying to install type control for IRQ%d\n", irq);
580 return;
581 }
582
dd87eb3a
TG
583 if (!handle)
584 handle = handle_bad_irq;
9d7ac8be 585 else if (desc->chip == &no_irq_chip) {
f8b5473f 586 printk(KERN_WARNING "Trying to install %sinterrupt handler "
b039db8e 587 "for IRQ%d\n", is_chained ? "chained " : "", irq);
f8b5473f
TG
588 /*
589 * Some ARM implementations install a handler for really dumb
590 * interrupt hardware without setting an irq_chip. This worked
591 * with the ARM no_irq_chip but the check in setup_irq would
592 * prevent us to setup the interrupt at all. Switch it to
593 * dummy_irq_chip for easy transition.
594 */
595 desc->chip = &dummy_irq_chip;
596 }
dd87eb3a
TG
597
598 spin_lock_irqsave(&desc->lock, flags);
599
600 /* Uninstall? */
601 if (handle == handle_bad_irq) {
5575ddf7
JB
602 if (desc->chip != &no_irq_chip)
603 mask_ack_irq(desc, irq);
dd87eb3a
TG
604 desc->status |= IRQ_DISABLED;
605 desc->depth = 1;
606 }
607 desc->handle_irq = handle;
a460e745 608 desc->name = name;
dd87eb3a
TG
609
610 if (handle != handle_bad_irq && is_chained) {
611 desc->status &= ~IRQ_DISABLED;
612 desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE;
613 desc->depth = 0;
7e6e178a 614 desc->chip->startup(irq);
dd87eb3a
TG
615 }
616 spin_unlock_irqrestore(&desc->lock, flags);
617}
618
619void
620set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
57a58a94 621 irq_flow_handler_t handle)
dd87eb3a
TG
622{
623 set_irq_chip(irq, chip);
a460e745 624 __set_irq_handler(irq, handle, 0, NULL);
dd87eb3a
TG
625}
626
a460e745
IM
627void
628set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
629 irq_flow_handler_t handle, const char *name)
dd87eb3a 630{
a460e745
IM
631 set_irq_chip(irq, chip);
632 __set_irq_handler(irq, handle, 0, name);
dd87eb3a 633}
46f4f8f6
RB
634
635void __init set_irq_noprobe(unsigned int irq)
636{
637 struct irq_desc *desc;
638 unsigned long flags;
639
cb5bc832 640 desc = irq_to_desc(irq);
7d94f7ca 641 if (!desc) {
46f4f8f6
RB
642 printk(KERN_ERR "Trying to mark IRQ%d non-probeable\n", irq);
643
644 return;
645 }
646
46f4f8f6
RB
647 spin_lock_irqsave(&desc->lock, flags);
648 desc->status |= IRQ_NOPROBE;
649 spin_unlock_irqrestore(&desc->lock, flags);
650}
651
652void __init set_irq_probe(unsigned int irq)
653{
654 struct irq_desc *desc;
655 unsigned long flags;
656
cb5bc832 657 desc = irq_to_desc(irq);
7d94f7ca 658 if (!desc) {
46f4f8f6
RB
659 printk(KERN_ERR "Trying to mark IRQ%d probeable\n", irq);
660
661 return;
662 }
663
46f4f8f6
RB
664 spin_lock_irqsave(&desc->lock, flags);
665 desc->status &= ~IRQ_NOPROBE;
666 spin_unlock_irqrestore(&desc->lock, flags);
667}
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