Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/kernel/irq/handle.c | |
3 | * | |
a34db9b2 IM |
4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar |
5 | * Copyright (C) 2005-2006, Thomas Gleixner, Russell King | |
1da177e4 LT |
6 | * |
7 | * This file contains the core interrupt handling code. | |
a34db9b2 IM |
8 | * |
9 | * Detailed information is available in Documentation/DocBook/genericirq | |
10 | * | |
1da177e4 LT |
11 | */ |
12 | ||
13 | #include <linux/irq.h> | |
14 | #include <linux/module.h> | |
15 | #include <linux/random.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/kernel_stat.h> | |
0b8f1efa YL |
18 | #include <linux/rculist.h> |
19 | #include <linux/hash.h> | |
af39241b | 20 | #include <trace/irq.h> |
0fa0ebbf | 21 | #include <linux/bootmem.h> |
1da177e4 LT |
22 | |
23 | #include "internals.h" | |
24 | ||
0b8f1efa YL |
25 | /* |
26 | * lockdep: we want to handle all irq_desc locks as a single lock-class: | |
27 | */ | |
48a1b10a | 28 | struct lock_class_key irq_desc_lock_class; |
0b8f1efa | 29 | |
6a6de9ef TG |
30 | /** |
31 | * handle_bad_irq - handle spurious and unhandled irqs | |
43a1dd50 HK |
32 | * @irq: the interrupt number |
33 | * @desc: description of the interrupt | |
43a1dd50 HK |
34 | * |
35 | * Handles spurious and unhandled IRQ's. It also prints a debugmessage. | |
6a6de9ef | 36 | */ |
d6c88a50 | 37 | void handle_bad_irq(unsigned int irq, struct irq_desc *desc) |
6a6de9ef | 38 | { |
43f77759 | 39 | print_irq_desc(irq, desc); |
d6c88a50 | 40 | kstat_incr_irqs_this_cpu(irq, desc); |
6a6de9ef TG |
41 | ack_bad_irq(irq); |
42 | } | |
43 | ||
97179fd4 DD |
44 | #if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_HARDIRQS) |
45 | static void __init init_irq_default_affinity(void) | |
46 | { | |
47 | alloc_bootmem_cpumask_var(&irq_default_affinity); | |
48 | cpumask_setall(irq_default_affinity); | |
49 | } | |
50 | #else | |
51 | static void __init init_irq_default_affinity(void) | |
52 | { | |
53 | } | |
54 | #endif | |
55 | ||
1da177e4 LT |
56 | /* |
57 | * Linux has a controller-independent interrupt architecture. | |
58 | * Every controller has a 'controller-template', that is used | |
59 | * by the main code to do the right thing. Each driver-visible | |
06fcb0c6 | 60 | * interrupt source is transparently wired to the appropriate |
1da177e4 LT |
61 | * controller. Thus drivers need not be aware of the |
62 | * interrupt-controller. | |
63 | * | |
64 | * The code is designed to be easily extended with new/different | |
65 | * interrupt controllers, without having to do assembly magic or | |
66 | * having to touch the generic code. | |
67 | * | |
68 | * Controller mappings for all interrupt sources: | |
69 | */ | |
85c0f909 | 70 | int nr_irqs = NR_IRQS; |
fa42d10d | 71 | EXPORT_SYMBOL_GPL(nr_irqs); |
d60458b2 | 72 | |
0b8f1efa | 73 | #ifdef CONFIG_SPARSE_IRQ |
92296c6d | 74 | |
0b8f1efa YL |
75 | static struct irq_desc irq_desc_init = { |
76 | .irq = -1, | |
77 | .status = IRQ_DISABLED, | |
78 | .chip = &no_irq_chip, | |
79 | .handle_irq = handle_bad_irq, | |
80 | .depth = 1, | |
81 | .lock = __SPIN_LOCK_UNLOCKED(irq_desc_init.lock), | |
0b8f1efa YL |
82 | }; |
83 | ||
48a1b10a | 84 | void init_kstat_irqs(struct irq_desc *desc, int cpu, int nr) |
0b8f1efa | 85 | { |
0b8f1efa | 86 | int node; |
005bf0e6 | 87 | void *ptr; |
0b8f1efa YL |
88 | |
89 | node = cpu_to_node(cpu); | |
005bf0e6 | 90 | ptr = kzalloc_node(nr * sizeof(*desc->kstat_irqs), GFP_ATOMIC, node); |
0b8f1efa | 91 | |
005bf0e6 YL |
92 | /* |
93 | * don't overwite if can not get new one | |
94 | * init_copy_kstat_irqs() could still use old one | |
95 | */ | |
96 | if (ptr) { | |
97 | printk(KERN_DEBUG " alloc kstat_irqs on cpu %d node %d\n", | |
98 | cpu, node); | |
99 | desc->kstat_irqs = ptr; | |
100 | } | |
0b8f1efa YL |
101 | } |
102 | ||
0b8f1efa YL |
103 | static void init_one_irq_desc(int irq, struct irq_desc *desc, int cpu) |
104 | { | |
105 | memcpy(desc, &irq_desc_init, sizeof(struct irq_desc)); | |
793f7b12 IM |
106 | |
107 | spin_lock_init(&desc->lock); | |
0b8f1efa YL |
108 | desc->irq = irq; |
109 | #ifdef CONFIG_SMP | |
110 | desc->cpu = cpu; | |
111 | #endif | |
112 | lockdep_set_class(&desc->lock, &irq_desc_lock_class); | |
113 | init_kstat_irqs(desc, cpu, nr_cpu_ids); | |
114 | if (!desc->kstat_irqs) { | |
115 | printk(KERN_ERR "can not alloc kstat_irqs\n"); | |
116 | BUG_ON(1); | |
117 | } | |
802bf931 | 118 | if (!init_alloc_desc_masks(desc, cpu, false)) { |
7f7ace0c MT |
119 | printk(KERN_ERR "can not alloc irq_desc cpumasks\n"); |
120 | BUG_ON(1); | |
121 | } | |
0b8f1efa YL |
122 | arch_init_chip_data(desc, cpu); |
123 | } | |
124 | ||
125 | /* | |
126 | * Protect the sparse_irqs: | |
127 | */ | |
48a1b10a | 128 | DEFINE_SPINLOCK(sparse_irq_lock); |
0b8f1efa | 129 | |
0fa0ebbf | 130 | struct irq_desc **irq_desc_ptrs __read_mostly; |
0b8f1efa | 131 | |
99d093d1 YL |
132 | static struct irq_desc irq_desc_legacy[NR_IRQS_LEGACY] __cacheline_aligned_in_smp = { |
133 | [0 ... NR_IRQS_LEGACY-1] = { | |
0b8f1efa YL |
134 | .irq = -1, |
135 | .status = IRQ_DISABLED, | |
136 | .chip = &no_irq_chip, | |
137 | .handle_irq = handle_bad_irq, | |
138 | .depth = 1, | |
139 | .lock = __SPIN_LOCK_UNLOCKED(irq_desc_init.lock), | |
0b8f1efa YL |
140 | } |
141 | }; | |
142 | ||
542d865b | 143 | static unsigned int *kstat_irqs_legacy; |
0b8f1efa | 144 | |
13a0c3c2 | 145 | int __init early_irq_init(void) |
0b8f1efa YL |
146 | { |
147 | struct irq_desc *desc; | |
148 | int legacy_count; | |
149 | int i; | |
150 | ||
97179fd4 DD |
151 | init_irq_default_affinity(); |
152 | ||
4a046d17 YL |
153 | /* initialize nr_irqs based on nr_cpu_ids */ |
154 | arch_probe_nr_irqs(); | |
9594949b MT |
155 | printk(KERN_INFO "NR_IRQS:%d nr_irqs:%d\n", NR_IRQS, nr_irqs); |
156 | ||
0b8f1efa YL |
157 | desc = irq_desc_legacy; |
158 | legacy_count = ARRAY_SIZE(irq_desc_legacy); | |
159 | ||
0fa0ebbf MT |
160 | /* allocate irq_desc_ptrs array based on nr_irqs */ |
161 | irq_desc_ptrs = alloc_bootmem(nr_irqs * sizeof(void *)); | |
162 | ||
542d865b MT |
163 | /* allocate based on nr_cpu_ids */ |
164 | /* FIXME: invert kstat_irgs, and it'd be a per_cpu_alloc'd thing */ | |
165 | kstat_irqs_legacy = alloc_bootmem(NR_IRQS_LEGACY * nr_cpu_ids * | |
166 | sizeof(int)); | |
167 | ||
0b8f1efa YL |
168 | for (i = 0; i < legacy_count; i++) { |
169 | desc[i].irq = i; | |
542d865b | 170 | desc[i].kstat_irqs = kstat_irqs_legacy + i * nr_cpu_ids; |
fa6beb37 | 171 | lockdep_set_class(&desc[i].lock, &irq_desc_lock_class); |
7f7ace0c | 172 | init_alloc_desc_masks(&desc[i], 0, true); |
0b8f1efa YL |
173 | irq_desc_ptrs[i] = desc + i; |
174 | } | |
175 | ||
9594949b | 176 | for (i = legacy_count; i < nr_irqs; i++) |
0b8f1efa YL |
177 | irq_desc_ptrs[i] = NULL; |
178 | ||
13a0c3c2 | 179 | return arch_early_irq_init(); |
0b8f1efa YL |
180 | } |
181 | ||
182 | struct irq_desc *irq_to_desc(unsigned int irq) | |
183 | { | |
0fa0ebbf MT |
184 | if (irq_desc_ptrs && irq < nr_irqs) |
185 | return irq_desc_ptrs[irq]; | |
186 | ||
187 | return NULL; | |
0b8f1efa YL |
188 | } |
189 | ||
190 | struct irq_desc *irq_to_desc_alloc_cpu(unsigned int irq, int cpu) | |
191 | { | |
192 | struct irq_desc *desc; | |
193 | unsigned long flags; | |
194 | int node; | |
195 | ||
9594949b | 196 | if (irq >= nr_irqs) { |
e2f4d065 MT |
197 | WARN(1, "irq (%d) >= nr_irqs (%d) in irq_to_desc_alloc\n", |
198 | irq, nr_irqs); | |
0b8f1efa YL |
199 | return NULL; |
200 | } | |
201 | ||
202 | desc = irq_desc_ptrs[irq]; | |
203 | if (desc) | |
204 | return desc; | |
205 | ||
206 | spin_lock_irqsave(&sparse_irq_lock, flags); | |
207 | ||
208 | /* We have to check it to avoid races with another CPU */ | |
209 | desc = irq_desc_ptrs[irq]; | |
210 | if (desc) | |
211 | goto out_unlock; | |
212 | ||
213 | node = cpu_to_node(cpu); | |
214 | desc = kzalloc_node(sizeof(*desc), GFP_ATOMIC, node); | |
215 | printk(KERN_DEBUG " alloc irq_desc for %d on cpu %d node %d\n", | |
216 | irq, cpu, node); | |
217 | if (!desc) { | |
218 | printk(KERN_ERR "can not alloc irq_desc\n"); | |
219 | BUG_ON(1); | |
220 | } | |
221 | init_one_irq_desc(irq, desc, cpu); | |
222 | ||
223 | irq_desc_ptrs[irq] = desc; | |
224 | ||
225 | out_unlock: | |
226 | spin_unlock_irqrestore(&sparse_irq_lock, flags); | |
227 | ||
228 | return desc; | |
229 | } | |
230 | ||
f9af0e70 | 231 | #else /* !CONFIG_SPARSE_IRQ */ |
0b8f1efa | 232 | |
e729aa16 | 233 | struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned_in_smp = { |
1da177e4 | 234 | [0 ... NR_IRQS-1] = { |
4f167fb4 | 235 | .status = IRQ_DISABLED, |
f1c2662c | 236 | .chip = &no_irq_chip, |
7a55713a | 237 | .handle_irq = handle_bad_irq, |
94d39e1f | 238 | .depth = 1, |
aac3f2b6 | 239 | .lock = __SPIN_LOCK_UNLOCKED(irq_desc->lock), |
1da177e4 LT |
240 | } |
241 | }; | |
08678b08 | 242 | |
d7e51e66 | 243 | static unsigned int kstat_irqs_all[NR_IRQS][NR_CPUS]; |
12026ea1 YL |
244 | int __init early_irq_init(void) |
245 | { | |
246 | struct irq_desc *desc; | |
247 | int count; | |
248 | int i; | |
249 | ||
97179fd4 DD |
250 | init_irq_default_affinity(); |
251 | ||
9594949b MT |
252 | printk(KERN_INFO "NR_IRQS:%d\n", NR_IRQS); |
253 | ||
12026ea1 YL |
254 | desc = irq_desc; |
255 | count = ARRAY_SIZE(irq_desc); | |
256 | ||
d7e51e66 | 257 | for (i = 0; i < count; i++) { |
12026ea1 | 258 | desc[i].irq = i; |
7f7ace0c | 259 | init_alloc_desc_masks(&desc[i], 0, true); |
d7e51e66 YL |
260 | desc[i].kstat_irqs = kstat_irqs_all[i]; |
261 | } | |
12026ea1 YL |
262 | return arch_early_irq_init(); |
263 | } | |
264 | ||
f9af0e70 KM |
265 | struct irq_desc *irq_to_desc(unsigned int irq) |
266 | { | |
267 | return (irq < NR_IRQS) ? irq_desc + irq : NULL; | |
268 | } | |
269 | ||
270 | struct irq_desc *irq_to_desc_alloc_cpu(unsigned int irq, int cpu) | |
271 | { | |
272 | return irq_to_desc(irq); | |
273 | } | |
274 | #endif /* !CONFIG_SPARSE_IRQ */ | |
0b8f1efa | 275 | |
0f3c2a89 YL |
276 | void clear_kstat_irqs(struct irq_desc *desc) |
277 | { | |
278 | memset(desc->kstat_irqs, 0, nr_cpu_ids * sizeof(*(desc->kstat_irqs))); | |
279 | } | |
280 | ||
1da177e4 | 281 | /* |
77a5afec IM |
282 | * What should we do if we get a hw irq event on an illegal vector? |
283 | * Each architecture has to answer this themself. | |
1da177e4 | 284 | */ |
77a5afec | 285 | static void ack_bad(unsigned int irq) |
1da177e4 | 286 | { |
d3c60047 | 287 | struct irq_desc *desc = irq_to_desc(irq); |
08678b08 | 288 | |
08678b08 | 289 | print_irq_desc(irq, desc); |
1da177e4 LT |
290 | ack_bad_irq(irq); |
291 | } | |
292 | ||
77a5afec IM |
293 | /* |
294 | * NOP functions | |
295 | */ | |
296 | static void noop(unsigned int irq) | |
297 | { | |
298 | } | |
299 | ||
300 | static unsigned int noop_ret(unsigned int irq) | |
301 | { | |
302 | return 0; | |
303 | } | |
304 | ||
305 | /* | |
306 | * Generic no controller implementation | |
307 | */ | |
f1c2662c IM |
308 | struct irq_chip no_irq_chip = { |
309 | .name = "none", | |
77a5afec IM |
310 | .startup = noop_ret, |
311 | .shutdown = noop, | |
312 | .enable = noop, | |
313 | .disable = noop, | |
314 | .ack = ack_bad, | |
315 | .end = noop, | |
1da177e4 LT |
316 | }; |
317 | ||
f8b5473f TG |
318 | /* |
319 | * Generic dummy implementation which can be used for | |
320 | * real dumb interrupt sources | |
321 | */ | |
322 | struct irq_chip dummy_irq_chip = { | |
323 | .name = "dummy", | |
324 | .startup = noop_ret, | |
325 | .shutdown = noop, | |
326 | .enable = noop, | |
327 | .disable = noop, | |
328 | .ack = noop, | |
329 | .mask = noop, | |
330 | .unmask = noop, | |
331 | .end = noop, | |
332 | }; | |
333 | ||
1da177e4 LT |
334 | /* |
335 | * Special, empty irq handler: | |
336 | */ | |
7d12e780 | 337 | irqreturn_t no_action(int cpl, void *dev_id) |
1da177e4 LT |
338 | { |
339 | return IRQ_NONE; | |
340 | } | |
341 | ||
f48fe81e TG |
342 | static void warn_no_thread(unsigned int irq, struct irqaction *action) |
343 | { | |
344 | if (test_and_set_bit(IRQTF_WARNED, &action->thread_flags)) | |
345 | return; | |
346 | ||
347 | printk(KERN_WARNING "IRQ %d device %s returned IRQ_WAKE_THREAD " | |
348 | "but no thread function available.", irq, action->name); | |
349 | } | |
350 | ||
af39241b JB |
351 | DEFINE_TRACE(irq_handler_entry); |
352 | DEFINE_TRACE(irq_handler_exit); | |
353 | ||
8d28bc75 IM |
354 | /** |
355 | * handle_IRQ_event - irq action chain handler | |
356 | * @irq: the interrupt number | |
8d28bc75 IM |
357 | * @action: the interrupt action chain for this irq |
358 | * | |
359 | * Handles the action chain of an irq event | |
1da177e4 | 360 | */ |
7d12e780 | 361 | irqreturn_t handle_IRQ_event(unsigned int irq, struct irqaction *action) |
1da177e4 | 362 | { |
908dcecd JB |
363 | irqreturn_t ret, retval = IRQ_NONE; |
364 | unsigned int status = 0; | |
1da177e4 | 365 | |
3cca53b0 | 366 | if (!(action->flags & IRQF_DISABLED)) |
366c7f55 | 367 | local_irq_enable_in_hardirq(); |
1da177e4 LT |
368 | |
369 | do { | |
af39241b | 370 | trace_irq_handler_entry(irq, action); |
7d12e780 | 371 | ret = action->handler(irq, action->dev_id); |
af39241b | 372 | trace_irq_handler_exit(irq, action, ret); |
3aa551c9 TG |
373 | |
374 | switch (ret) { | |
375 | case IRQ_WAKE_THREAD: | |
f48fe81e TG |
376 | /* |
377 | * Set result to handled so the spurious check | |
378 | * does not trigger. | |
379 | */ | |
380 | ret = IRQ_HANDLED; | |
381 | ||
382 | /* | |
383 | * Catch drivers which return WAKE_THREAD but | |
384 | * did not set up a thread function | |
385 | */ | |
386 | if (unlikely(!action->thread_fn)) { | |
387 | warn_no_thread(irq, action); | |
388 | break; | |
389 | } | |
390 | ||
3aa551c9 TG |
391 | /* |
392 | * Wake up the handler thread for this | |
393 | * action. In case the thread crashed and was | |
394 | * killed we just pretend that we handled the | |
395 | * interrupt. The hardirq handler above has | |
396 | * disabled the device interrupt, so no irq | |
397 | * storm is lurking. | |
398 | */ | |
399 | if (likely(!test_bit(IRQTF_DIED, | |
400 | &action->thread_flags))) { | |
401 | set_bit(IRQTF_RUNTHREAD, &action->thread_flags); | |
402 | wake_up_process(action->thread); | |
403 | } | |
404 | ||
3aa551c9 TG |
405 | /* Fall through to add to randomness */ |
406 | case IRQ_HANDLED: | |
1da177e4 | 407 | status |= action->flags; |
3aa551c9 TG |
408 | break; |
409 | ||
410 | default: | |
411 | break; | |
412 | } | |
413 | ||
1da177e4 LT |
414 | retval |= ret; |
415 | action = action->next; | |
416 | } while (action); | |
417 | ||
3cca53b0 | 418 | if (status & IRQF_SAMPLE_RANDOM) |
1da177e4 LT |
419 | add_interrupt_randomness(irq); |
420 | local_irq_disable(); | |
421 | ||
422 | return retval; | |
423 | } | |
424 | ||
af8c65b5 | 425 | #ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ |
0e57aa11 TG |
426 | |
427 | #ifdef CONFIG_ENABLE_WARN_DEPRECATED | |
428 | # warning __do_IRQ is deprecated. Please convert to proper flow handlers | |
429 | #endif | |
430 | ||
8d28bc75 IM |
431 | /** |
432 | * __do_IRQ - original all in one highlevel IRQ handler | |
433 | * @irq: the interrupt number | |
8d28bc75 IM |
434 | * |
435 | * __do_IRQ handles all normal device IRQ's (the special | |
1da177e4 LT |
436 | * SMP cross-CPU interrupts have their own specific |
437 | * handlers). | |
8d28bc75 IM |
438 | * |
439 | * This is the original x86 implementation which is used for every | |
440 | * interrupt type. | |
1da177e4 | 441 | */ |
7ad5b3a5 | 442 | unsigned int __do_IRQ(unsigned int irq) |
1da177e4 | 443 | { |
08678b08 | 444 | struct irq_desc *desc = irq_to_desc(irq); |
06fcb0c6 | 445 | struct irqaction *action; |
1da177e4 LT |
446 | unsigned int status; |
447 | ||
d6c88a50 TG |
448 | kstat_incr_irqs_this_cpu(irq, desc); |
449 | ||
f26fdd59 | 450 | if (CHECK_IRQ_PER_CPU(desc->status)) { |
1da177e4 LT |
451 | irqreturn_t action_ret; |
452 | ||
453 | /* | |
454 | * No locking required for CPU-local interrupts: | |
455 | */ | |
48a1b10a | 456 | if (desc->chip->ack) { |
d1bef4ed | 457 | desc->chip->ack(irq); |
48a1b10a YL |
458 | /* get new one */ |
459 | desc = irq_remap_to_desc(irq, desc); | |
460 | } | |
c642b839 RA |
461 | if (likely(!(desc->status & IRQ_DISABLED))) { |
462 | action_ret = handle_IRQ_event(irq, desc->action); | |
463 | if (!noirqdebug) | |
464 | note_interrupt(irq, desc, action_ret); | |
465 | } | |
d1bef4ed | 466 | desc->chip->end(irq); |
1da177e4 LT |
467 | return 1; |
468 | } | |
469 | ||
470 | spin_lock(&desc->lock); | |
48a1b10a | 471 | if (desc->chip->ack) { |
d1bef4ed | 472 | desc->chip->ack(irq); |
48a1b10a YL |
473 | desc = irq_remap_to_desc(irq, desc); |
474 | } | |
1da177e4 LT |
475 | /* |
476 | * REPLAY is when Linux resends an IRQ that was dropped earlier | |
477 | * WAITING is used by probe to mark irqs that are being tested | |
478 | */ | |
479 | status = desc->status & ~(IRQ_REPLAY | IRQ_WAITING); | |
480 | status |= IRQ_PENDING; /* we _want_ to handle it */ | |
481 | ||
482 | /* | |
483 | * If the IRQ is disabled for whatever reason, we cannot | |
484 | * use the action we have. | |
485 | */ | |
486 | action = NULL; | |
487 | if (likely(!(status & (IRQ_DISABLED | IRQ_INPROGRESS)))) { | |
488 | action = desc->action; | |
489 | status &= ~IRQ_PENDING; /* we commit to handling */ | |
490 | status |= IRQ_INPROGRESS; /* we are handling it */ | |
491 | } | |
492 | desc->status = status; | |
493 | ||
494 | /* | |
495 | * If there is no IRQ handler or it was disabled, exit early. | |
496 | * Since we set PENDING, if another processor is handling | |
497 | * a different instance of this same irq, the other processor | |
498 | * will take care of it. | |
499 | */ | |
500 | if (unlikely(!action)) | |
501 | goto out; | |
502 | ||
503 | /* | |
504 | * Edge triggered interrupts need to remember | |
505 | * pending events. | |
506 | * This applies to any hw interrupts that allow a second | |
507 | * instance of the same irq to arrive while we are in do_IRQ | |
508 | * or in the handler. But the code here only handles the _second_ | |
509 | * instance of the irq, not the third or fourth. So it is mostly | |
510 | * useful for irq hardware that does not mask cleanly in an | |
511 | * SMP environment. | |
512 | */ | |
513 | for (;;) { | |
514 | irqreturn_t action_ret; | |
515 | ||
516 | spin_unlock(&desc->lock); | |
517 | ||
7d12e780 | 518 | action_ret = handle_IRQ_event(irq, action); |
1da177e4 | 519 | if (!noirqdebug) |
7d12e780 | 520 | note_interrupt(irq, desc, action_ret); |
b42172fc LT |
521 | |
522 | spin_lock(&desc->lock); | |
1da177e4 LT |
523 | if (likely(!(desc->status & IRQ_PENDING))) |
524 | break; | |
525 | desc->status &= ~IRQ_PENDING; | |
526 | } | |
527 | desc->status &= ~IRQ_INPROGRESS; | |
528 | ||
529 | out: | |
530 | /* | |
531 | * The ->end() handler has to deal with interrupts which got | |
532 | * disabled while the handler was running. | |
533 | */ | |
d1bef4ed | 534 | desc->chip->end(irq); |
1da177e4 LT |
535 | spin_unlock(&desc->lock); |
536 | ||
537 | return 1; | |
538 | } | |
af8c65b5 | 539 | #endif |
1da177e4 | 540 | |
243c7621 IM |
541 | void early_init_irq_lock_class(void) |
542 | { | |
10e58084 | 543 | struct irq_desc *desc; |
243c7621 IM |
544 | int i; |
545 | ||
0b8f1efa | 546 | for_each_irq_desc(i, desc) { |
10e58084 | 547 | lockdep_set_class(&desc->lock, &irq_desc_lock_class); |
0b8f1efa | 548 | } |
0b8f1efa | 549 | } |
0b8f1efa | 550 | |
0b8f1efa YL |
551 | unsigned int kstat_irqs_cpu(unsigned int irq, int cpu) |
552 | { | |
553 | struct irq_desc *desc = irq_to_desc(irq); | |
26ddd8d5 | 554 | return desc ? desc->kstat_irqs[cpu] : 0; |
243c7621 | 555 | } |
0b8f1efa YL |
556 | EXPORT_SYMBOL(kstat_irqs_cpu); |
557 |