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1da177e4 LT |
1 | /* |
2 | * linux/kernel/irq/handle.c | |
3 | * | |
a34db9b2 IM |
4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar |
5 | * Copyright (C) 2005-2006, Thomas Gleixner, Russell King | |
1da177e4 LT |
6 | * |
7 | * This file contains the core interrupt handling code. | |
a34db9b2 IM |
8 | * |
9 | * Detailed information is available in Documentation/DocBook/genericirq | |
10 | * | |
1da177e4 LT |
11 | */ |
12 | ||
13 | #include <linux/irq.h> | |
14 | #include <linux/module.h> | |
15 | #include <linux/random.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/kernel_stat.h> | |
18 | ||
19 | #include "internals.h" | |
20 | ||
08678b08 YL |
21 | /* |
22 | * lockdep: we want to handle all irq_desc locks as a single lock-class: | |
23 | */ | |
24 | static struct lock_class_key irq_desc_lock_class; | |
08678b08 | 25 | |
6a6de9ef TG |
26 | /** |
27 | * handle_bad_irq - handle spurious and unhandled irqs | |
43a1dd50 HK |
28 | * @irq: the interrupt number |
29 | * @desc: description of the interrupt | |
43a1dd50 HK |
30 | * |
31 | * Handles spurious and unhandled IRQ's. It also prints a debugmessage. | |
6a6de9ef | 32 | */ |
7ad5b3a5 | 33 | void |
7d12e780 | 34 | handle_bad_irq(unsigned int irq, struct irq_desc *desc) |
6a6de9ef | 35 | { |
43f77759 | 36 | print_irq_desc(irq, desc); |
8c464a4b | 37 | #ifdef CONFIG_HAVE_DYN_ARRAY |
7f95ec9e | 38 | kstat_irqs_this_cpu(desc)++; |
8c464a4b YL |
39 | #else |
40 | kstat_irqs_this_cpu(irq)++; | |
41 | #endif | |
6a6de9ef TG |
42 | ack_bad_irq(irq); |
43 | } | |
44 | ||
1da177e4 LT |
45 | /* |
46 | * Linux has a controller-independent interrupt architecture. | |
47 | * Every controller has a 'controller-template', that is used | |
48 | * by the main code to do the right thing. Each driver-visible | |
06fcb0c6 | 49 | * interrupt source is transparently wired to the appropriate |
1da177e4 LT |
50 | * controller. Thus drivers need not be aware of the |
51 | * interrupt-controller. | |
52 | * | |
53 | * The code is designed to be easily extended with new/different | |
54 | * interrupt controllers, without having to do assembly magic or | |
55 | * having to touch the generic code. | |
56 | * | |
57 | * Controller mappings for all interrupt sources: | |
58 | */ | |
85c0f909 | 59 | int nr_irqs = NR_IRQS; |
fa42d10d | 60 | EXPORT_SYMBOL_GPL(nr_irqs); |
d60458b2 YL |
61 | |
62 | #ifdef CONFIG_HAVE_DYN_ARRAY | |
08678b08 YL |
63 | static struct irq_desc irq_desc_init = { |
64 | .irq = -1U, | |
d60458b2 YL |
65 | .status = IRQ_DISABLED, |
66 | .chip = &no_irq_chip, | |
67 | .handle_irq = handle_bad_irq, | |
68 | .depth = 1, | |
69 | .lock = __SPIN_LOCK_UNLOCKED(irq_desc_init.lock), | |
70 | #ifdef CONFIG_SMP | |
71 | .affinity = CPU_MASK_ALL | |
72 | #endif | |
73 | }; | |
74 | ||
08678b08 YL |
75 | |
76 | static void init_one_irq_desc(struct irq_desc *desc) | |
77 | { | |
78 | memcpy(desc, &irq_desc_init, sizeof(struct irq_desc)); | |
08678b08 | 79 | lockdep_set_class(&desc->lock, &irq_desc_lock_class); |
08678b08 YL |
80 | } |
81 | ||
7f95ec9e YL |
82 | extern int after_bootmem; |
83 | extern void *__alloc_bootmem_nopanic(unsigned long size, | |
84 | unsigned long align, | |
85 | unsigned long goal); | |
08678b08 | 86 | |
7f95ec9e | 87 | static void init_kstat_irqs(struct irq_desc *desc, int nr_desc, int nr) |
08678b08 | 88 | { |
7f95ec9e YL |
89 | unsigned long bytes, total_bytes; |
90 | char *ptr; | |
91 | int i; | |
92 | unsigned long phys; | |
93 | ||
94 | /* Compute how many bytes we need per irq and allocate them */ | |
95 | bytes = nr * sizeof(unsigned int); | |
96 | total_bytes = bytes * nr_desc; | |
97 | if (after_bootmem) | |
98 | ptr = kzalloc(total_bytes, GFP_ATOMIC); | |
99 | else | |
100 | ptr = __alloc_bootmem_nopanic(total_bytes, PAGE_SIZE, 0); | |
101 | ||
102 | if (!ptr) | |
103 | panic(" can not allocate kstat_irqs\n"); | |
104 | ||
105 | phys = __pa(ptr); | |
106 | printk(KERN_DEBUG "kstat_irqs ==> [%#lx - %#lx]\n", phys, phys + total_bytes); | |
107 | ||
108 | for (i = 0; i < nr_desc; i++) { | |
109 | desc[i].kstat_irqs = (unsigned int *)ptr; | |
110 | ptr += bytes; | |
111 | } | |
08678b08 YL |
112 | } |
113 | ||
d60458b2 YL |
114 | static void __init init_work(void *data) |
115 | { | |
116 | struct dyn_array *da = data; | |
117 | int i; | |
118 | struct irq_desc *desc; | |
119 | ||
120 | desc = *da->name; | |
121 | ||
7f95ec9e | 122 | for (i = 0; i < *da->nr; i++) { |
08678b08 | 123 | init_one_irq_desc(&desc[i]); |
7f95ec9e | 124 | desc[i].irq = i; |
7f95ec9e | 125 | } |
08678b08 | 126 | |
67fb283e YL |
127 | /* init kstat_irqs, nr_cpu_ids is ready already */ |
128 | init_kstat_irqs(desc, *da->nr, nr_cpu_ids); | |
7f95ec9e YL |
129 | } |
130 | ||
9059d8fa | 131 | struct irq_desc *irq_desc; |
d60458b2 YL |
132 | DEFINE_DYN_ARRAY(irq_desc, sizeof(struct irq_desc), nr_irqs, PAGE_SIZE, init_work); |
133 | ||
134 | #else | |
135 | ||
e729aa16 | 136 | struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned_in_smp = { |
1da177e4 | 137 | [0 ... NR_IRQS-1] = { |
4f167fb4 | 138 | .status = IRQ_DISABLED, |
f1c2662c | 139 | .chip = &no_irq_chip, |
7a55713a | 140 | .handle_irq = handle_bad_irq, |
94d39e1f | 141 | .depth = 1, |
aac3f2b6 | 142 | .lock = __SPIN_LOCK_UNLOCKED(irq_desc->lock), |
a53da52f IM |
143 | #ifdef CONFIG_SMP |
144 | .affinity = CPU_MASK_ALL | |
145 | #endif | |
1da177e4 LT |
146 | } |
147 | }; | |
08678b08 YL |
148 | |
149 | #endif | |
150 | ||
1da177e4 | 151 | /* |
77a5afec IM |
152 | * What should we do if we get a hw irq event on an illegal vector? |
153 | * Each architecture has to answer this themself. | |
1da177e4 | 154 | */ |
77a5afec | 155 | static void ack_bad(unsigned int irq) |
1da177e4 | 156 | { |
08678b08 YL |
157 | struct irq_desc *desc; |
158 | ||
159 | desc = irq_to_desc(irq); | |
160 | print_irq_desc(irq, desc); | |
1da177e4 LT |
161 | ack_bad_irq(irq); |
162 | } | |
163 | ||
77a5afec IM |
164 | /* |
165 | * NOP functions | |
166 | */ | |
167 | static void noop(unsigned int irq) | |
168 | { | |
169 | } | |
170 | ||
171 | static unsigned int noop_ret(unsigned int irq) | |
172 | { | |
173 | return 0; | |
174 | } | |
175 | ||
176 | /* | |
177 | * Generic no controller implementation | |
178 | */ | |
f1c2662c IM |
179 | struct irq_chip no_irq_chip = { |
180 | .name = "none", | |
77a5afec IM |
181 | .startup = noop_ret, |
182 | .shutdown = noop, | |
183 | .enable = noop, | |
184 | .disable = noop, | |
185 | .ack = ack_bad, | |
186 | .end = noop, | |
1da177e4 LT |
187 | }; |
188 | ||
f8b5473f TG |
189 | /* |
190 | * Generic dummy implementation which can be used for | |
191 | * real dumb interrupt sources | |
192 | */ | |
193 | struct irq_chip dummy_irq_chip = { | |
194 | .name = "dummy", | |
195 | .startup = noop_ret, | |
196 | .shutdown = noop, | |
197 | .enable = noop, | |
198 | .disable = noop, | |
199 | .ack = noop, | |
200 | .mask = noop, | |
201 | .unmask = noop, | |
202 | .end = noop, | |
203 | }; | |
204 | ||
1da177e4 LT |
205 | /* |
206 | * Special, empty irq handler: | |
207 | */ | |
7d12e780 | 208 | irqreturn_t no_action(int cpl, void *dev_id) |
1da177e4 LT |
209 | { |
210 | return IRQ_NONE; | |
211 | } | |
212 | ||
8d28bc75 IM |
213 | /** |
214 | * handle_IRQ_event - irq action chain handler | |
215 | * @irq: the interrupt number | |
8d28bc75 IM |
216 | * @action: the interrupt action chain for this irq |
217 | * | |
218 | * Handles the action chain of an irq event | |
1da177e4 | 219 | */ |
7d12e780 | 220 | irqreturn_t handle_IRQ_event(unsigned int irq, struct irqaction *action) |
1da177e4 | 221 | { |
908dcecd JB |
222 | irqreturn_t ret, retval = IRQ_NONE; |
223 | unsigned int status = 0; | |
1da177e4 | 224 | |
3cca53b0 | 225 | if (!(action->flags & IRQF_DISABLED)) |
366c7f55 | 226 | local_irq_enable_in_hardirq(); |
1da177e4 LT |
227 | |
228 | do { | |
7d12e780 | 229 | ret = action->handler(irq, action->dev_id); |
1da177e4 LT |
230 | if (ret == IRQ_HANDLED) |
231 | status |= action->flags; | |
232 | retval |= ret; | |
233 | action = action->next; | |
234 | } while (action); | |
235 | ||
3cca53b0 | 236 | if (status & IRQF_SAMPLE_RANDOM) |
1da177e4 LT |
237 | add_interrupt_randomness(irq); |
238 | local_irq_disable(); | |
239 | ||
240 | return retval; | |
241 | } | |
242 | ||
af8c65b5 | 243 | #ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ |
8d28bc75 IM |
244 | /** |
245 | * __do_IRQ - original all in one highlevel IRQ handler | |
246 | * @irq: the interrupt number | |
8d28bc75 IM |
247 | * |
248 | * __do_IRQ handles all normal device IRQ's (the special | |
1da177e4 LT |
249 | * SMP cross-CPU interrupts have their own specific |
250 | * handlers). | |
8d28bc75 IM |
251 | * |
252 | * This is the original x86 implementation which is used for every | |
253 | * interrupt type. | |
1da177e4 | 254 | */ |
7ad5b3a5 | 255 | unsigned int __do_IRQ(unsigned int irq) |
1da177e4 | 256 | { |
08678b08 | 257 | struct irq_desc *desc = irq_to_desc(irq); |
06fcb0c6 | 258 | struct irqaction *action; |
1da177e4 LT |
259 | unsigned int status; |
260 | ||
8c464a4b | 261 | #ifdef CONFIG_HAVE_DYN_ARRAY |
7f95ec9e | 262 | kstat_irqs_this_cpu(desc)++; |
8c464a4b YL |
263 | #else |
264 | kstat_irqs_this_cpu(irq)++; | |
265 | #endif | |
f26fdd59 | 266 | if (CHECK_IRQ_PER_CPU(desc->status)) { |
1da177e4 LT |
267 | irqreturn_t action_ret; |
268 | ||
269 | /* | |
270 | * No locking required for CPU-local interrupts: | |
271 | */ | |
d1bef4ed IM |
272 | if (desc->chip->ack) |
273 | desc->chip->ack(irq); | |
c642b839 RA |
274 | if (likely(!(desc->status & IRQ_DISABLED))) { |
275 | action_ret = handle_IRQ_event(irq, desc->action); | |
276 | if (!noirqdebug) | |
277 | note_interrupt(irq, desc, action_ret); | |
278 | } | |
d1bef4ed | 279 | desc->chip->end(irq); |
1da177e4 LT |
280 | return 1; |
281 | } | |
282 | ||
283 | spin_lock(&desc->lock); | |
d1bef4ed IM |
284 | if (desc->chip->ack) |
285 | desc->chip->ack(irq); | |
1da177e4 LT |
286 | /* |
287 | * REPLAY is when Linux resends an IRQ that was dropped earlier | |
288 | * WAITING is used by probe to mark irqs that are being tested | |
289 | */ | |
290 | status = desc->status & ~(IRQ_REPLAY | IRQ_WAITING); | |
291 | status |= IRQ_PENDING; /* we _want_ to handle it */ | |
292 | ||
293 | /* | |
294 | * If the IRQ is disabled for whatever reason, we cannot | |
295 | * use the action we have. | |
296 | */ | |
297 | action = NULL; | |
298 | if (likely(!(status & (IRQ_DISABLED | IRQ_INPROGRESS)))) { | |
299 | action = desc->action; | |
300 | status &= ~IRQ_PENDING; /* we commit to handling */ | |
301 | status |= IRQ_INPROGRESS; /* we are handling it */ | |
302 | } | |
303 | desc->status = status; | |
304 | ||
305 | /* | |
306 | * If there is no IRQ handler or it was disabled, exit early. | |
307 | * Since we set PENDING, if another processor is handling | |
308 | * a different instance of this same irq, the other processor | |
309 | * will take care of it. | |
310 | */ | |
311 | if (unlikely(!action)) | |
312 | goto out; | |
313 | ||
314 | /* | |
315 | * Edge triggered interrupts need to remember | |
316 | * pending events. | |
317 | * This applies to any hw interrupts that allow a second | |
318 | * instance of the same irq to arrive while we are in do_IRQ | |
319 | * or in the handler. But the code here only handles the _second_ | |
320 | * instance of the irq, not the third or fourth. So it is mostly | |
321 | * useful for irq hardware that does not mask cleanly in an | |
322 | * SMP environment. | |
323 | */ | |
324 | for (;;) { | |
325 | irqreturn_t action_ret; | |
326 | ||
327 | spin_unlock(&desc->lock); | |
328 | ||
7d12e780 | 329 | action_ret = handle_IRQ_event(irq, action); |
1da177e4 | 330 | if (!noirqdebug) |
7d12e780 | 331 | note_interrupt(irq, desc, action_ret); |
b42172fc LT |
332 | |
333 | spin_lock(&desc->lock); | |
1da177e4 LT |
334 | if (likely(!(desc->status & IRQ_PENDING))) |
335 | break; | |
336 | desc->status &= ~IRQ_PENDING; | |
337 | } | |
338 | desc->status &= ~IRQ_INPROGRESS; | |
339 | ||
340 | out: | |
341 | /* | |
342 | * The ->end() handler has to deal with interrupts which got | |
343 | * disabled while the handler was running. | |
344 | */ | |
d1bef4ed | 345 | desc->chip->end(irq); |
1da177e4 LT |
346 | spin_unlock(&desc->lock); |
347 | ||
348 | return 1; | |
349 | } | |
af8c65b5 | 350 | #endif |
1da177e4 | 351 | |
243c7621 | 352 | |
08678b08 | 353 | #ifdef CONFIG_TRACE_IRQFLAGS |
243c7621 IM |
354 | void early_init_irq_lock_class(void) |
355 | { | |
08678b08 | 356 | #ifndef CONFIG_HAVE_DYN_ARRAY |
243c7621 IM |
357 | int i; |
358 | ||
85c0f909 | 359 | for (i = 0; i < nr_irqs; i++) |
243c7621 | 360 | lockdep_set_class(&irq_desc[i].lock, &irq_desc_lock_class); |
08678b08 | 361 | #endif |
243c7621 | 362 | } |
243c7621 | 363 | #endif |
08678b08 | 364 | |
8c464a4b | 365 | #ifdef CONFIG_HAVE_DYN_ARRAY |
7f95ec9e YL |
366 | unsigned int kstat_irqs_cpu(unsigned int irq, int cpu) |
367 | { | |
368 | struct irq_desc *desc = irq_to_desc(irq); | |
369 | return desc->kstat_irqs[cpu]; | |
370 | } | |
8c464a4b | 371 | #endif |
7f95ec9e YL |
372 | EXPORT_SYMBOL(kstat_irqs_cpu); |
373 |