irq: Always set IRQF_ONESHOT if no primary handler is specified
[deliverable/linux.git] / kernel / irq / irqdesc.c
CommitLineData
3795de23
TG
1/*
2 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
3 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
4 *
5 * This file contains the interrupt descriptor management code
6 *
7 * Detailed information is available in Documentation/DocBook/genericirq
8 *
9 */
10#include <linux/irq.h>
11#include <linux/slab.h>
12#include <linux/module.h>
13#include <linux/interrupt.h>
14#include <linux/kernel_stat.h>
15#include <linux/radix-tree.h>
1f5a5b87 16#include <linux/bitmap.h>
3795de23
TG
17
18#include "internals.h"
19
20/*
21 * lockdep: we want to handle all irq_desc locks as a single lock-class:
22 */
78f90d91 23static struct lock_class_key irq_desc_lock_class;
3795de23 24
fe051434 25#if defined(CONFIG_SMP)
3795de23
TG
26static void __init init_irq_default_affinity(void)
27{
28 alloc_cpumask_var(&irq_default_affinity, GFP_NOWAIT);
29 cpumask_setall(irq_default_affinity);
30}
31#else
32static void __init init_irq_default_affinity(void)
33{
34}
35#endif
36
1f5a5b87
TG
37#ifdef CONFIG_SMP
38static int alloc_masks(struct irq_desc *desc, gfp_t gfp, int node)
39{
40 if (!zalloc_cpumask_var_node(&desc->irq_data.affinity, gfp, node))
41 return -ENOMEM;
42
43#ifdef CONFIG_GENERIC_PENDING_IRQ
44 if (!zalloc_cpumask_var_node(&desc->pending_mask, gfp, node)) {
45 free_cpumask_var(desc->irq_data.affinity);
46 return -ENOMEM;
47 }
48#endif
49 return 0;
50}
51
52static void desc_smp_init(struct irq_desc *desc, int node)
53{
aa99ec0f 54 desc->irq_data.node = node;
1f5a5b87 55 cpumask_copy(desc->irq_data.affinity, irq_default_affinity);
b7b29338
TG
56#ifdef CONFIG_GENERIC_PENDING_IRQ
57 cpumask_clear(desc->pending_mask);
58#endif
59}
60
61static inline int desc_node(struct irq_desc *desc)
62{
63 return desc->irq_data.node;
1f5a5b87
TG
64}
65
66#else
67static inline int
68alloc_masks(struct irq_desc *desc, gfp_t gfp, int node) { return 0; }
69static inline void desc_smp_init(struct irq_desc *desc, int node) { }
b7b29338 70static inline int desc_node(struct irq_desc *desc) { return 0; }
1f5a5b87
TG
71#endif
72
73static void desc_set_defaults(unsigned int irq, struct irq_desc *desc, int node)
74{
6c9ae009
ED
75 int cpu;
76
1f5a5b87
TG
77 desc->irq_data.irq = irq;
78 desc->irq_data.chip = &no_irq_chip;
79 desc->irq_data.chip_data = NULL;
80 desc->irq_data.handler_data = NULL;
81 desc->irq_data.msi_desc = NULL;
f9e4989e 82 irq_settings_clr_and_set(desc, ~0, _IRQ_DEFAULT_INIT_FLAGS);
801a0e9a 83 irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED);
1f5a5b87
TG
84 desc->handle_irq = handle_bad_irq;
85 desc->depth = 1;
b7b29338
TG
86 desc->irq_count = 0;
87 desc->irqs_unhandled = 0;
1f5a5b87 88 desc->name = NULL;
6c9ae009
ED
89 for_each_possible_cpu(cpu)
90 *per_cpu_ptr(desc->kstat_irqs, cpu) = 0;
1f5a5b87
TG
91 desc_smp_init(desc, node);
92}
93
3795de23
TG
94int nr_irqs = NR_IRQS;
95EXPORT_SYMBOL_GPL(nr_irqs);
96
a05a900a 97static DEFINE_MUTEX(sparse_irq_lock);
c1ee6264 98static DECLARE_BITMAP(allocated_irqs, IRQ_BITMAP_BITS);
1f5a5b87 99
3795de23
TG
100#ifdef CONFIG_SPARSE_IRQ
101
baa0d233 102static RADIX_TREE(irq_desc_tree, GFP_KERNEL);
3795de23 103
1f5a5b87 104static void irq_insert_desc(unsigned int irq, struct irq_desc *desc)
3795de23
TG
105{
106 radix_tree_insert(&irq_desc_tree, irq, desc);
107}
108
109struct irq_desc *irq_to_desc(unsigned int irq)
110{
111 return radix_tree_lookup(&irq_desc_tree, irq);
112}
113
1f5a5b87
TG
114static void delete_irq_desc(unsigned int irq)
115{
116 radix_tree_delete(&irq_desc_tree, irq);
117}
118
119#ifdef CONFIG_SMP
120static void free_masks(struct irq_desc *desc)
121{
122#ifdef CONFIG_GENERIC_PENDING_IRQ
123 free_cpumask_var(desc->pending_mask);
124#endif
c0a19ebc 125 free_cpumask_var(desc->irq_data.affinity);
1f5a5b87
TG
126}
127#else
128static inline void free_masks(struct irq_desc *desc) { }
129#endif
130
131static struct irq_desc *alloc_desc(int irq, int node)
132{
133 struct irq_desc *desc;
baa0d233 134 gfp_t gfp = GFP_KERNEL;
1f5a5b87
TG
135
136 desc = kzalloc_node(sizeof(*desc), gfp, node);
137 if (!desc)
138 return NULL;
139 /* allocate based on nr_cpu_ids */
6c9ae009 140 desc->kstat_irqs = alloc_percpu(unsigned int);
1f5a5b87
TG
141 if (!desc->kstat_irqs)
142 goto err_desc;
143
144 if (alloc_masks(desc, gfp, node))
145 goto err_kstat;
146
147 raw_spin_lock_init(&desc->lock);
148 lockdep_set_class(&desc->lock, &irq_desc_lock_class);
149
150 desc_set_defaults(irq, desc, node);
151
152 return desc;
153
154err_kstat:
6c9ae009 155 free_percpu(desc->kstat_irqs);
1f5a5b87
TG
156err_desc:
157 kfree(desc);
158 return NULL;
159}
160
161static void free_desc(unsigned int irq)
162{
163 struct irq_desc *desc = irq_to_desc(irq);
1f5a5b87 164
13bfe99e
TG
165 unregister_irq_proc(irq, desc);
166
a05a900a 167 mutex_lock(&sparse_irq_lock);
1f5a5b87 168 delete_irq_desc(irq);
a05a900a 169 mutex_unlock(&sparse_irq_lock);
1f5a5b87
TG
170
171 free_masks(desc);
6c9ae009 172 free_percpu(desc->kstat_irqs);
1f5a5b87
TG
173 kfree(desc);
174}
175
176static int alloc_descs(unsigned int start, unsigned int cnt, int node)
177{
178 struct irq_desc *desc;
1f5a5b87
TG
179 int i;
180
181 for (i = 0; i < cnt; i++) {
182 desc = alloc_desc(start + i, node);
183 if (!desc)
184 goto err;
a05a900a 185 mutex_lock(&sparse_irq_lock);
1f5a5b87 186 irq_insert_desc(start + i, desc);
a05a900a 187 mutex_unlock(&sparse_irq_lock);
1f5a5b87
TG
188 }
189 return start;
190
191err:
192 for (i--; i >= 0; i--)
193 free_desc(start + i);
194
a05a900a 195 mutex_lock(&sparse_irq_lock);
1f5a5b87 196 bitmap_clear(allocated_irqs, start, cnt);
a05a900a 197 mutex_unlock(&sparse_irq_lock);
1f5a5b87
TG
198 return -ENOMEM;
199}
200
ed4dea6e 201static int irq_expand_nr_irqs(unsigned int nr)
e7bcecb7 202{
ed4dea6e 203 if (nr > IRQ_BITMAP_BITS)
e7bcecb7 204 return -ENOMEM;
ed4dea6e 205 nr_irqs = nr;
e7bcecb7
TG
206 return 0;
207}
208
3795de23
TG
209int __init early_irq_init(void)
210{
b683de2b 211 int i, initcnt, node = first_online_node;
3795de23 212 struct irq_desc *desc;
3795de23
TG
213
214 init_irq_default_affinity();
215
b683de2b
TG
216 /* Let arch update nr_irqs and return the nr of preallocated irqs */
217 initcnt = arch_probe_nr_irqs();
218 printk(KERN_INFO "NR_IRQS:%d nr_irqs:%d %d\n", NR_IRQS, nr_irqs, initcnt);
3795de23 219
c1ee6264
TG
220 if (WARN_ON(nr_irqs > IRQ_BITMAP_BITS))
221 nr_irqs = IRQ_BITMAP_BITS;
222
223 if (WARN_ON(initcnt > IRQ_BITMAP_BITS))
224 initcnt = IRQ_BITMAP_BITS;
225
226 if (initcnt > nr_irqs)
227 nr_irqs = initcnt;
228
b683de2b 229 for (i = 0; i < initcnt; i++) {
aa99ec0f
TG
230 desc = alloc_desc(i, node);
231 set_bit(i, allocated_irqs);
232 irq_insert_desc(i, desc);
3795de23 233 }
3795de23
TG
234 return arch_early_irq_init();
235}
236
3795de23
TG
237#else /* !CONFIG_SPARSE_IRQ */
238
239struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned_in_smp = {
240 [0 ... NR_IRQS-1] = {
3795de23
TG
241 .handle_irq = handle_bad_irq,
242 .depth = 1,
243 .lock = __RAW_SPIN_LOCK_UNLOCKED(irq_desc->lock),
244 }
245};
246
3795de23
TG
247int __init early_irq_init(void)
248{
aa99ec0f 249 int count, i, node = first_online_node;
3795de23 250 struct irq_desc *desc;
3795de23
TG
251
252 init_irq_default_affinity();
253
254 printk(KERN_INFO "NR_IRQS:%d\n", NR_IRQS);
255
256 desc = irq_desc;
257 count = ARRAY_SIZE(irq_desc);
258
259 for (i = 0; i < count; i++) {
6c9ae009 260 desc[i].kstat_irqs = alloc_percpu(unsigned int);
e7fbad30
LW
261 alloc_masks(&desc[i], GFP_KERNEL, node);
262 raw_spin_lock_init(&desc[i].lock);
154cd387 263 lockdep_set_class(&desc[i].lock, &irq_desc_lock_class);
e7fbad30 264 desc_set_defaults(i, &desc[i], node);
3795de23
TG
265 }
266 return arch_early_irq_init();
267}
268
269struct irq_desc *irq_to_desc(unsigned int irq)
270{
271 return (irq < NR_IRQS) ? irq_desc + irq : NULL;
272}
273
1f5a5b87
TG
274static void free_desc(unsigned int irq)
275{
b7b29338 276 dynamic_irq_cleanup(irq);
1f5a5b87
TG
277}
278
279static inline int alloc_descs(unsigned int start, unsigned int cnt, int node)
280{
281 return start;
282}
e7bcecb7 283
ed4dea6e 284static int irq_expand_nr_irqs(unsigned int nr)
e7bcecb7
TG
285{
286 return -ENOMEM;
287}
288
3795de23
TG
289#endif /* !CONFIG_SPARSE_IRQ */
290
fe12bc2c
TG
291/**
292 * generic_handle_irq - Invoke the handler for a particular irq
293 * @irq: The irq number to handle
294 *
295 */
296int generic_handle_irq(unsigned int irq)
297{
298 struct irq_desc *desc = irq_to_desc(irq);
299
300 if (!desc)
301 return -EINVAL;
302 generic_handle_irq_desc(irq, desc);
303 return 0;
304}
edf76f83 305EXPORT_SYMBOL_GPL(generic_handle_irq);
fe12bc2c 306
1f5a5b87
TG
307/* Dynamic interrupt handling */
308
309/**
310 * irq_free_descs - free irq descriptors
311 * @from: Start of descriptor range
312 * @cnt: Number of consecutive irqs to free
313 */
314void irq_free_descs(unsigned int from, unsigned int cnt)
315{
1f5a5b87
TG
316 int i;
317
318 if (from >= nr_irqs || (from + cnt) > nr_irqs)
319 return;
320
321 for (i = 0; i < cnt; i++)
322 free_desc(from + i);
323
a05a900a 324 mutex_lock(&sparse_irq_lock);
1f5a5b87 325 bitmap_clear(allocated_irqs, from, cnt);
a05a900a 326 mutex_unlock(&sparse_irq_lock);
1f5a5b87 327}
edf76f83 328EXPORT_SYMBOL_GPL(irq_free_descs);
1f5a5b87
TG
329
330/**
331 * irq_alloc_descs - allocate and initialize a range of irq descriptors
332 * @irq: Allocate for specific irq number if irq >= 0
333 * @from: Start the search from this irq number
334 * @cnt: Number of consecutive irqs to allocate.
335 * @node: Preferred node on which the irq descriptor should be allocated
336 *
337 * Returns the first irq number or error code
338 */
339int __ref
340irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node)
341{
1f5a5b87
TG
342 int start, ret;
343
344 if (!cnt)
345 return -EINVAL;
346
c5182b88
MB
347 if (irq >= 0) {
348 if (from > irq)
349 return -EINVAL;
350 from = irq;
351 }
352
a05a900a 353 mutex_lock(&sparse_irq_lock);
1f5a5b87 354
ed4dea6e
YL
355 start = bitmap_find_next_zero_area(allocated_irqs, IRQ_BITMAP_BITS,
356 from, cnt, 0);
1f5a5b87
TG
357 ret = -EEXIST;
358 if (irq >=0 && start != irq)
359 goto err;
360
ed4dea6e
YL
361 if (start + cnt > nr_irqs) {
362 ret = irq_expand_nr_irqs(start + cnt);
e7bcecb7
TG
363 if (ret)
364 goto err;
365 }
1f5a5b87
TG
366
367 bitmap_set(allocated_irqs, start, cnt);
a05a900a 368 mutex_unlock(&sparse_irq_lock);
1f5a5b87
TG
369 return alloc_descs(start, cnt, node);
370
371err:
a05a900a 372 mutex_unlock(&sparse_irq_lock);
1f5a5b87
TG
373 return ret;
374}
edf76f83 375EXPORT_SYMBOL_GPL(irq_alloc_descs);
1f5a5b87 376
06f6c339
TG
377/**
378 * irq_reserve_irqs - mark irqs allocated
379 * @from: mark from irq number
380 * @cnt: number of irqs to mark
381 *
382 * Returns 0 on success or an appropriate error code
383 */
384int irq_reserve_irqs(unsigned int from, unsigned int cnt)
385{
06f6c339
TG
386 unsigned int start;
387 int ret = 0;
388
389 if (!cnt || (from + cnt) > nr_irqs)
390 return -EINVAL;
391
a05a900a 392 mutex_lock(&sparse_irq_lock);
06f6c339
TG
393 start = bitmap_find_next_zero_area(allocated_irqs, nr_irqs, from, cnt, 0);
394 if (start == from)
395 bitmap_set(allocated_irqs, start, cnt);
396 else
397 ret = -EEXIST;
a05a900a 398 mutex_unlock(&sparse_irq_lock);
06f6c339
TG
399 return ret;
400}
401
a98d24b7
TG
402/**
403 * irq_get_next_irq - get next allocated irq number
404 * @offset: where to start the search
405 *
406 * Returns next irq number after offset or nr_irqs if none is found.
407 */
408unsigned int irq_get_next_irq(unsigned int offset)
409{
410 return find_next_bit(allocated_irqs, nr_irqs, offset);
411}
412
d5eb4ad2
TG
413struct irq_desc *
414__irq_get_desc_lock(unsigned int irq, unsigned long *flags, bool bus)
415{
416 struct irq_desc *desc = irq_to_desc(irq);
417
418 if (desc) {
419 if (bus)
420 chip_bus_lock(desc);
421 raw_spin_lock_irqsave(&desc->lock, *flags);
422 }
423 return desc;
424}
425
426void __irq_put_desc_unlock(struct irq_desc *desc, unsigned long flags, bool bus)
427{
428 raw_spin_unlock_irqrestore(&desc->lock, flags);
429 if (bus)
430 chip_bus_sync_unlock(desc);
431}
432
b7b29338
TG
433/**
434 * dynamic_irq_cleanup - cleanup a dynamically allocated irq
435 * @irq: irq number to initialize
436 */
437void dynamic_irq_cleanup(unsigned int irq)
3795de23 438{
b7b29338
TG
439 struct irq_desc *desc = irq_to_desc(irq);
440 unsigned long flags;
441
442 raw_spin_lock_irqsave(&desc->lock, flags);
443 desc_set_defaults(irq, desc, desc_node(desc));
444 raw_spin_unlock_irqrestore(&desc->lock, flags);
3795de23
TG
445}
446
3795de23
TG
447unsigned int kstat_irqs_cpu(unsigned int irq, int cpu)
448{
449 struct irq_desc *desc = irq_to_desc(irq);
6c9ae009
ED
450
451 return desc && desc->kstat_irqs ?
452 *per_cpu_ptr(desc->kstat_irqs, cpu) : 0;
3795de23 453}
478735e3 454
478735e3
KH
455unsigned int kstat_irqs(unsigned int irq)
456{
457 struct irq_desc *desc = irq_to_desc(irq);
458 int cpu;
459 int sum = 0;
460
6c9ae009 461 if (!desc || !desc->kstat_irqs)
478735e3
KH
462 return 0;
463 for_each_possible_cpu(cpu)
6c9ae009 464 sum += *per_cpu_ptr(desc->kstat_irqs, cpu);
478735e3
KH
465 return sum;
466}
This page took 0.151365 seconds and 5 git commands to generate.