ipv6: fix inet6_csk_update_pmtu() return value
[deliverable/linux.git] / kernel / irq / manage.c
CommitLineData
1da177e4
LT
1/*
2 * linux/kernel/irq/manage.c
3 *
a34db9b2
IM
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006 Thomas Gleixner
1da177e4
LT
6 *
7 * This file contains driver APIs to the irq subsystem.
8 */
9
97fd75b7
AM
10#define pr_fmt(fmt) "genirq: " fmt
11
1da177e4 12#include <linux/irq.h>
3aa551c9 13#include <linux/kthread.h>
1da177e4
LT
14#include <linux/module.h>
15#include <linux/random.h>
16#include <linux/interrupt.h>
1aeb272c 17#include <linux/slab.h>
3aa551c9 18#include <linux/sched.h>
4d1d61a6 19#include <linux/task_work.h>
1da177e4
LT
20
21#include "internals.h"
22
8d32a307
TG
23#ifdef CONFIG_IRQ_FORCED_THREADING
24__read_mostly bool force_irqthreads;
25
26static int __init setup_forced_irqthreads(char *arg)
27{
28 force_irqthreads = true;
29 return 0;
30}
31early_param("threadirqs", setup_forced_irqthreads);
32#endif
33
1da177e4
LT
34/**
35 * synchronize_irq - wait for pending IRQ handlers (on other CPUs)
1e5d5331 36 * @irq: interrupt number to wait for
1da177e4
LT
37 *
38 * This function waits for any pending IRQ handlers for this interrupt
39 * to complete before returning. If you use this function while
40 * holding a resource the IRQ handler may need you will deadlock.
41 *
42 * This function may be called - with care - from IRQ context.
43 */
44void synchronize_irq(unsigned int irq)
45{
cb5bc832 46 struct irq_desc *desc = irq_to_desc(irq);
32f4125e 47 bool inprogress;
1da177e4 48
7d94f7ca 49 if (!desc)
c2b5a251
MW
50 return;
51
a98ce5c6
HX
52 do {
53 unsigned long flags;
54
55 /*
56 * Wait until we're out of the critical section. This might
57 * give the wrong answer due to the lack of memory barriers.
58 */
32f4125e 59 while (irqd_irq_inprogress(&desc->irq_data))
a98ce5c6
HX
60 cpu_relax();
61
62 /* Ok, that indicated we're done: double-check carefully. */
239007b8 63 raw_spin_lock_irqsave(&desc->lock, flags);
32f4125e 64 inprogress = irqd_irq_inprogress(&desc->irq_data);
239007b8 65 raw_spin_unlock_irqrestore(&desc->lock, flags);
a98ce5c6
HX
66
67 /* Oops, that failed? */
32f4125e 68 } while (inprogress);
3aa551c9
TG
69
70 /*
71 * We made sure that no hardirq handler is running. Now verify
72 * that no threaded handlers are active.
73 */
74 wait_event(desc->wait_for_threads, !atomic_read(&desc->threads_active));
1da177e4 75}
1da177e4
LT
76EXPORT_SYMBOL(synchronize_irq);
77
3aa551c9
TG
78#ifdef CONFIG_SMP
79cpumask_var_t irq_default_affinity;
80
771ee3b0
TG
81/**
82 * irq_can_set_affinity - Check if the affinity of a given irq can be set
83 * @irq: Interrupt to check
84 *
85 */
86int irq_can_set_affinity(unsigned int irq)
87{
08678b08 88 struct irq_desc *desc = irq_to_desc(irq);
771ee3b0 89
bce43032
TG
90 if (!desc || !irqd_can_balance(&desc->irq_data) ||
91 !desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity)
771ee3b0
TG
92 return 0;
93
94 return 1;
95}
96
591d2fb0
TG
97/**
98 * irq_set_thread_affinity - Notify irq threads to adjust affinity
99 * @desc: irq descriptor which has affitnity changed
100 *
101 * We just set IRQTF_AFFINITY and delegate the affinity setting
102 * to the interrupt thread itself. We can not call
103 * set_cpus_allowed_ptr() here as we hold desc->lock and this
104 * code can be called from hard interrupt context.
105 */
106void irq_set_thread_affinity(struct irq_desc *desc)
3aa551c9
TG
107{
108 struct irqaction *action = desc->action;
109
110 while (action) {
111 if (action->thread)
591d2fb0 112 set_bit(IRQTF_AFFINITY, &action->thread_flags);
3aa551c9
TG
113 action = action->next;
114 }
115}
116
1fa46f1f 117#ifdef CONFIG_GENERIC_PENDING_IRQ
0ef5ca1e 118static inline bool irq_can_move_pcntxt(struct irq_data *data)
1fa46f1f 119{
0ef5ca1e 120 return irqd_can_move_in_process_context(data);
1fa46f1f 121}
0ef5ca1e 122static inline bool irq_move_pending(struct irq_data *data)
1fa46f1f 123{
0ef5ca1e 124 return irqd_is_setaffinity_pending(data);
1fa46f1f
TG
125}
126static inline void
127irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask)
128{
129 cpumask_copy(desc->pending_mask, mask);
130}
131static inline void
132irq_get_pending(struct cpumask *mask, struct irq_desc *desc)
133{
134 cpumask_copy(mask, desc->pending_mask);
135}
136#else
0ef5ca1e 137static inline bool irq_can_move_pcntxt(struct irq_data *data) { return true; }
cd22c0e4 138static inline bool irq_move_pending(struct irq_data *data) { return false; }
1fa46f1f
TG
139static inline void
140irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask) { }
141static inline void
142irq_get_pending(struct cpumask *mask, struct irq_desc *desc) { }
143#endif
144
818b0f3b
JL
145int irq_do_set_affinity(struct irq_data *data, const struct cpumask *mask,
146 bool force)
147{
148 struct irq_desc *desc = irq_data_to_desc(data);
149 struct irq_chip *chip = irq_data_get_irq_chip(data);
150 int ret;
151
152 ret = chip->irq_set_affinity(data, mask, false);
153 switch (ret) {
154 case IRQ_SET_MASK_OK:
155 cpumask_copy(data->affinity, mask);
156 case IRQ_SET_MASK_OK_NOCOPY:
157 irq_set_thread_affinity(desc);
158 ret = 0;
159 }
160
161 return ret;
162}
163
c2d0c555 164int __irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask)
771ee3b0 165{
c2d0c555
DD
166 struct irq_chip *chip = irq_data_get_irq_chip(data);
167 struct irq_desc *desc = irq_data_to_desc(data);
1fa46f1f 168 int ret = 0;
771ee3b0 169
c2d0c555 170 if (!chip || !chip->irq_set_affinity)
771ee3b0
TG
171 return -EINVAL;
172
0ef5ca1e 173 if (irq_can_move_pcntxt(data)) {
818b0f3b 174 ret = irq_do_set_affinity(data, mask, false);
1fa46f1f 175 } else {
c2d0c555 176 irqd_set_move_pending(data);
1fa46f1f 177 irq_copy_pending(desc, mask);
57b150cc 178 }
1fa46f1f 179
cd7eab44
BH
180 if (desc->affinity_notify) {
181 kref_get(&desc->affinity_notify->kref);
182 schedule_work(&desc->affinity_notify->work);
183 }
c2d0c555
DD
184 irqd_set(data, IRQD_AFFINITY_SET);
185
186 return ret;
187}
188
189/**
190 * irq_set_affinity - Set the irq affinity of a given irq
191 * @irq: Interrupt to set affinity
30398bf6 192 * @mask: cpumask
c2d0c555
DD
193 *
194 */
195int irq_set_affinity(unsigned int irq, const struct cpumask *mask)
196{
197 struct irq_desc *desc = irq_to_desc(irq);
198 unsigned long flags;
199 int ret;
200
201 if (!desc)
202 return -EINVAL;
203
204 raw_spin_lock_irqsave(&desc->lock, flags);
205 ret = __irq_set_affinity_locked(irq_desc_get_irq_data(desc), mask);
239007b8 206 raw_spin_unlock_irqrestore(&desc->lock, flags);
1fa46f1f 207 return ret;
771ee3b0
TG
208}
209
e7a297b0
PWJ
210int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m)
211{
e7a297b0 212 unsigned long flags;
31d9d9b6 213 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
e7a297b0
PWJ
214
215 if (!desc)
216 return -EINVAL;
e7a297b0 217 desc->affinity_hint = m;
02725e74 218 irq_put_desc_unlock(desc, flags);
e7a297b0
PWJ
219 return 0;
220}
221EXPORT_SYMBOL_GPL(irq_set_affinity_hint);
222
cd7eab44
BH
223static void irq_affinity_notify(struct work_struct *work)
224{
225 struct irq_affinity_notify *notify =
226 container_of(work, struct irq_affinity_notify, work);
227 struct irq_desc *desc = irq_to_desc(notify->irq);
228 cpumask_var_t cpumask;
229 unsigned long flags;
230
1fa46f1f 231 if (!desc || !alloc_cpumask_var(&cpumask, GFP_KERNEL))
cd7eab44
BH
232 goto out;
233
234 raw_spin_lock_irqsave(&desc->lock, flags);
0ef5ca1e 235 if (irq_move_pending(&desc->irq_data))
1fa46f1f 236 irq_get_pending(cpumask, desc);
cd7eab44 237 else
1fb0ef31 238 cpumask_copy(cpumask, desc->irq_data.affinity);
cd7eab44
BH
239 raw_spin_unlock_irqrestore(&desc->lock, flags);
240
241 notify->notify(notify, cpumask);
242
243 free_cpumask_var(cpumask);
244out:
245 kref_put(&notify->kref, notify->release);
246}
247
248/**
249 * irq_set_affinity_notifier - control notification of IRQ affinity changes
250 * @irq: Interrupt for which to enable/disable notification
251 * @notify: Context for notification, or %NULL to disable
252 * notification. Function pointers must be initialised;
253 * the other fields will be initialised by this function.
254 *
255 * Must be called in process context. Notification may only be enabled
256 * after the IRQ is allocated and must be disabled before the IRQ is
257 * freed using free_irq().
258 */
259int
260irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify)
261{
262 struct irq_desc *desc = irq_to_desc(irq);
263 struct irq_affinity_notify *old_notify;
264 unsigned long flags;
265
266 /* The release function is promised process context */
267 might_sleep();
268
269 if (!desc)
270 return -EINVAL;
271
272 /* Complete initialisation of *notify */
273 if (notify) {
274 notify->irq = irq;
275 kref_init(&notify->kref);
276 INIT_WORK(&notify->work, irq_affinity_notify);
277 }
278
279 raw_spin_lock_irqsave(&desc->lock, flags);
280 old_notify = desc->affinity_notify;
281 desc->affinity_notify = notify;
282 raw_spin_unlock_irqrestore(&desc->lock, flags);
283
284 if (old_notify)
285 kref_put(&old_notify->kref, old_notify->release);
286
287 return 0;
288}
289EXPORT_SYMBOL_GPL(irq_set_affinity_notifier);
290
18404756
MK
291#ifndef CONFIG_AUTO_IRQ_AFFINITY
292/*
293 * Generic version of the affinity autoselector.
294 */
3b8249e7
TG
295static int
296setup_affinity(unsigned int irq, struct irq_desc *desc, struct cpumask *mask)
18404756 297{
569bda8d 298 struct cpumask *set = irq_default_affinity;
818b0f3b 299 int node = desc->irq_data.node;
569bda8d 300
b008207c 301 /* Excludes PER_CPU and NO_BALANCE interrupts */
18404756
MK
302 if (!irq_can_set_affinity(irq))
303 return 0;
304
f6d87f4b
TG
305 /*
306 * Preserve an userspace affinity setup, but make sure that
307 * one of the targets is online.
308 */
2bdd1055 309 if (irqd_has_set(&desc->irq_data, IRQD_AFFINITY_SET)) {
569bda8d
TG
310 if (cpumask_intersects(desc->irq_data.affinity,
311 cpu_online_mask))
312 set = desc->irq_data.affinity;
0c6f8a8b 313 else
2bdd1055 314 irqd_clear(&desc->irq_data, IRQD_AFFINITY_SET);
f6d87f4b 315 }
18404756 316
3b8249e7 317 cpumask_and(mask, cpu_online_mask, set);
241fc640
PB
318 if (node != NUMA_NO_NODE) {
319 const struct cpumask *nodemask = cpumask_of_node(node);
320
321 /* make sure at least one of the cpus in nodemask is online */
322 if (cpumask_intersects(mask, nodemask))
323 cpumask_and(mask, mask, nodemask);
324 }
818b0f3b 325 irq_do_set_affinity(&desc->irq_data, mask, false);
18404756
MK
326 return 0;
327}
f6d87f4b 328#else
3b8249e7
TG
329static inline int
330setup_affinity(unsigned int irq, struct irq_desc *d, struct cpumask *mask)
f6d87f4b
TG
331{
332 return irq_select_affinity(irq);
333}
18404756
MK
334#endif
335
f6d87f4b
TG
336/*
337 * Called when affinity is set via /proc/irq
338 */
3b8249e7 339int irq_select_affinity_usr(unsigned int irq, struct cpumask *mask)
f6d87f4b
TG
340{
341 struct irq_desc *desc = irq_to_desc(irq);
342 unsigned long flags;
343 int ret;
344
239007b8 345 raw_spin_lock_irqsave(&desc->lock, flags);
3b8249e7 346 ret = setup_affinity(irq, desc, mask);
239007b8 347 raw_spin_unlock_irqrestore(&desc->lock, flags);
f6d87f4b
TG
348 return ret;
349}
350
351#else
3b8249e7
TG
352static inline int
353setup_affinity(unsigned int irq, struct irq_desc *desc, struct cpumask *mask)
f6d87f4b
TG
354{
355 return 0;
356}
1da177e4
LT
357#endif
358
0a0c5168
RW
359void __disable_irq(struct irq_desc *desc, unsigned int irq, bool suspend)
360{
361 if (suspend) {
685fd0b4 362 if (!desc->action || (desc->action->flags & IRQF_NO_SUSPEND))
0a0c5168 363 return;
c531e836 364 desc->istate |= IRQS_SUSPENDED;
0a0c5168
RW
365 }
366
3aae994f 367 if (!desc->depth++)
87923470 368 irq_disable(desc);
0a0c5168
RW
369}
370
02725e74
TG
371static int __disable_irq_nosync(unsigned int irq)
372{
373 unsigned long flags;
31d9d9b6 374 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
02725e74
TG
375
376 if (!desc)
377 return -EINVAL;
378 __disable_irq(desc, irq, false);
379 irq_put_desc_busunlock(desc, flags);
380 return 0;
381}
382
1da177e4
LT
383/**
384 * disable_irq_nosync - disable an irq without waiting
385 * @irq: Interrupt to disable
386 *
387 * Disable the selected interrupt line. Disables and Enables are
388 * nested.
389 * Unlike disable_irq(), this function does not ensure existing
390 * instances of the IRQ handler have completed before returning.
391 *
392 * This function may be called from IRQ context.
393 */
394void disable_irq_nosync(unsigned int irq)
395{
02725e74 396 __disable_irq_nosync(irq);
1da177e4 397}
1da177e4
LT
398EXPORT_SYMBOL(disable_irq_nosync);
399
400/**
401 * disable_irq - disable an irq and wait for completion
402 * @irq: Interrupt to disable
403 *
404 * Disable the selected interrupt line. Enables and Disables are
405 * nested.
406 * This function waits for any pending IRQ handlers for this interrupt
407 * to complete before returning. If you use this function while
408 * holding a resource the IRQ handler may need you will deadlock.
409 *
410 * This function may be called - with care - from IRQ context.
411 */
412void disable_irq(unsigned int irq)
413{
02725e74 414 if (!__disable_irq_nosync(irq))
1da177e4
LT
415 synchronize_irq(irq);
416}
1da177e4
LT
417EXPORT_SYMBOL(disable_irq);
418
0a0c5168 419void __enable_irq(struct irq_desc *desc, unsigned int irq, bool resume)
1adb0850 420{
dc5f219e 421 if (resume) {
c531e836 422 if (!(desc->istate & IRQS_SUSPENDED)) {
dc5f219e
TG
423 if (!desc->action)
424 return;
425 if (!(desc->action->flags & IRQF_FORCE_RESUME))
426 return;
427 /* Pretend that it got disabled ! */
428 desc->depth++;
429 }
c531e836 430 desc->istate &= ~IRQS_SUSPENDED;
dc5f219e 431 }
0a0c5168 432
1adb0850
TG
433 switch (desc->depth) {
434 case 0:
0a0c5168 435 err_out:
b8c512f6 436 WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n", irq);
1adb0850
TG
437 break;
438 case 1: {
c531e836 439 if (desc->istate & IRQS_SUSPENDED)
0a0c5168 440 goto err_out;
1adb0850 441 /* Prevent probing on this irq: */
1ccb4e61 442 irq_settings_set_noprobe(desc);
3aae994f 443 irq_enable(desc);
1adb0850
TG
444 check_irq_resend(desc, irq);
445 /* fall-through */
446 }
447 default:
448 desc->depth--;
449 }
450}
451
1da177e4
LT
452/**
453 * enable_irq - enable handling of an irq
454 * @irq: Interrupt to enable
455 *
456 * Undoes the effect of one call to disable_irq(). If this
457 * matches the last disable, processing of interrupts on this
458 * IRQ line is re-enabled.
459 *
70aedd24 460 * This function may be called from IRQ context only when
6b8ff312 461 * desc->irq_data.chip->bus_lock and desc->chip->bus_sync_unlock are NULL !
1da177e4
LT
462 */
463void enable_irq(unsigned int irq)
464{
1da177e4 465 unsigned long flags;
31d9d9b6 466 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
1da177e4 467
7d94f7ca 468 if (!desc)
c2b5a251 469 return;
50f7c032
TG
470 if (WARN(!desc->irq_data.chip,
471 KERN_ERR "enable_irq before setup/request_irq: irq %u\n", irq))
02725e74 472 goto out;
2656c366 473
0a0c5168 474 __enable_irq(desc, irq, false);
02725e74
TG
475out:
476 irq_put_desc_busunlock(desc, flags);
1da177e4 477}
1da177e4
LT
478EXPORT_SYMBOL(enable_irq);
479
0c5d1eb7 480static int set_irq_wake_real(unsigned int irq, unsigned int on)
2db87321 481{
08678b08 482 struct irq_desc *desc = irq_to_desc(irq);
2db87321
UKK
483 int ret = -ENXIO;
484
60f96b41
SS
485 if (irq_desc_get_chip(desc)->flags & IRQCHIP_SKIP_SET_WAKE)
486 return 0;
487
2f7e99bb
TG
488 if (desc->irq_data.chip->irq_set_wake)
489 ret = desc->irq_data.chip->irq_set_wake(&desc->irq_data, on);
2db87321
UKK
490
491 return ret;
492}
493
ba9a2331 494/**
a0cd9ca2 495 * irq_set_irq_wake - control irq power management wakeup
ba9a2331
TG
496 * @irq: interrupt to control
497 * @on: enable/disable power management wakeup
498 *
15a647eb
DB
499 * Enable/disable power management wakeup mode, which is
500 * disabled by default. Enables and disables must match,
501 * just as they match for non-wakeup mode support.
502 *
503 * Wakeup mode lets this IRQ wake the system from sleep
504 * states like "suspend to RAM".
ba9a2331 505 */
a0cd9ca2 506int irq_set_irq_wake(unsigned int irq, unsigned int on)
ba9a2331 507{
ba9a2331 508 unsigned long flags;
31d9d9b6 509 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
2db87321 510 int ret = 0;
ba9a2331 511
13863a66
JJ
512 if (!desc)
513 return -EINVAL;
514
15a647eb
DB
515 /* wakeup-capable irqs can be shared between drivers that
516 * don't need to have the same sleep mode behaviors.
517 */
15a647eb 518 if (on) {
2db87321
UKK
519 if (desc->wake_depth++ == 0) {
520 ret = set_irq_wake_real(irq, on);
521 if (ret)
522 desc->wake_depth = 0;
523 else
7f94226f 524 irqd_set(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 525 }
15a647eb
DB
526 } else {
527 if (desc->wake_depth == 0) {
7a2c4770 528 WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
2db87321
UKK
529 } else if (--desc->wake_depth == 0) {
530 ret = set_irq_wake_real(irq, on);
531 if (ret)
532 desc->wake_depth = 1;
533 else
7f94226f 534 irqd_clear(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 535 }
15a647eb 536 }
02725e74 537 irq_put_desc_busunlock(desc, flags);
ba9a2331
TG
538 return ret;
539}
a0cd9ca2 540EXPORT_SYMBOL(irq_set_irq_wake);
ba9a2331 541
1da177e4
LT
542/*
543 * Internal function that tells the architecture code whether a
544 * particular irq has been exclusively allocated or is available
545 * for driver use.
546 */
547int can_request_irq(unsigned int irq, unsigned long irqflags)
548{
cc8c3b78 549 unsigned long flags;
31d9d9b6 550 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
02725e74 551 int canrequest = 0;
1da177e4 552
7d94f7ca
YL
553 if (!desc)
554 return 0;
555
02725e74
TG
556 if (irq_settings_can_request(desc)) {
557 if (desc->action)
558 if (irqflags & desc->action->flags & IRQF_SHARED)
559 canrequest =1;
560 }
561 irq_put_desc_unlock(desc, flags);
562 return canrequest;
1da177e4
LT
563}
564
0c5d1eb7 565int __irq_set_trigger(struct irq_desc *desc, unsigned int irq,
b2ba2c30 566 unsigned long flags)
82736f4d 567{
6b8ff312 568 struct irq_chip *chip = desc->irq_data.chip;
d4d5e089 569 int ret, unmask = 0;
82736f4d 570
b2ba2c30 571 if (!chip || !chip->irq_set_type) {
82736f4d
UKK
572 /*
573 * IRQF_TRIGGER_* but the PIC does not support multiple
574 * flow-types?
575 */
97fd75b7 576 pr_debug("No set_type function for IRQ %d (%s)\n", irq,
f5d89470 577 chip ? (chip->name ? : "unknown") : "unknown");
82736f4d
UKK
578 return 0;
579 }
580
876dbd4c 581 flags &= IRQ_TYPE_SENSE_MASK;
d4d5e089
TG
582
583 if (chip->flags & IRQCHIP_SET_TYPE_MASKED) {
32f4125e 584 if (!irqd_irq_masked(&desc->irq_data))
d4d5e089 585 mask_irq(desc);
32f4125e 586 if (!irqd_irq_disabled(&desc->irq_data))
d4d5e089
TG
587 unmask = 1;
588 }
589
f2b662da 590 /* caller masked out all except trigger mode flags */
b2ba2c30 591 ret = chip->irq_set_type(&desc->irq_data, flags);
82736f4d 592
876dbd4c
TG
593 switch (ret) {
594 case IRQ_SET_MASK_OK:
595 irqd_clear(&desc->irq_data, IRQD_TRIGGER_MASK);
596 irqd_set(&desc->irq_data, flags);
597
598 case IRQ_SET_MASK_OK_NOCOPY:
599 flags = irqd_get_trigger_type(&desc->irq_data);
600 irq_settings_set_trigger_mask(desc, flags);
601 irqd_clear(&desc->irq_data, IRQD_LEVEL);
602 irq_settings_clr_level(desc);
603 if (flags & IRQ_TYPE_LEVEL_MASK) {
604 irq_settings_set_level(desc);
605 irqd_set(&desc->irq_data, IRQD_LEVEL);
606 }
46732475 607
d4d5e089 608 ret = 0;
8fff39e0 609 break;
876dbd4c 610 default:
97fd75b7 611 pr_err("Setting trigger mode %lu for irq %u failed (%pF)\n",
876dbd4c 612 flags, irq, chip->irq_set_type);
0c5d1eb7 613 }
d4d5e089
TG
614 if (unmask)
615 unmask_irq(desc);
82736f4d
UKK
616 return ret;
617}
618
b25c340c
TG
619/*
620 * Default primary interrupt handler for threaded interrupts. Is
621 * assigned as primary handler when request_threaded_irq is called
622 * with handler == NULL. Useful for oneshot interrupts.
623 */
624static irqreturn_t irq_default_primary_handler(int irq, void *dev_id)
625{
626 return IRQ_WAKE_THREAD;
627}
628
399b5da2
TG
629/*
630 * Primary handler for nested threaded interrupts. Should never be
631 * called.
632 */
633static irqreturn_t irq_nested_primary_handler(int irq, void *dev_id)
634{
635 WARN(1, "Primary handler called for nested irq %d\n", irq);
636 return IRQ_NONE;
637}
638
3aa551c9
TG
639static int irq_wait_for_interrupt(struct irqaction *action)
640{
550acb19
IY
641 set_current_state(TASK_INTERRUPTIBLE);
642
3aa551c9 643 while (!kthread_should_stop()) {
f48fe81e
TG
644
645 if (test_and_clear_bit(IRQTF_RUNTHREAD,
646 &action->thread_flags)) {
3aa551c9
TG
647 __set_current_state(TASK_RUNNING);
648 return 0;
f48fe81e
TG
649 }
650 schedule();
550acb19 651 set_current_state(TASK_INTERRUPTIBLE);
3aa551c9 652 }
550acb19 653 __set_current_state(TASK_RUNNING);
3aa551c9
TG
654 return -1;
655}
656
b25c340c
TG
657/*
658 * Oneshot interrupts keep the irq line masked until the threaded
659 * handler finished. unmask if the interrupt has not been disabled and
660 * is marked MASKED.
661 */
b5faba21 662static void irq_finalize_oneshot(struct irq_desc *desc,
f3f79e38 663 struct irqaction *action)
b25c340c 664{
b5faba21
TG
665 if (!(desc->istate & IRQS_ONESHOT))
666 return;
0b1adaa0 667again:
3876ec9e 668 chip_bus_lock(desc);
239007b8 669 raw_spin_lock_irq(&desc->lock);
0b1adaa0
TG
670
671 /*
672 * Implausible though it may be we need to protect us against
673 * the following scenario:
674 *
675 * The thread is faster done than the hard interrupt handler
676 * on the other CPU. If we unmask the irq line then the
677 * interrupt can come in again and masks the line, leaves due
009b4c3b 678 * to IRQS_INPROGRESS and the irq line is masked forever.
b5faba21
TG
679 *
680 * This also serializes the state of shared oneshot handlers
681 * versus "desc->threads_onehsot |= action->thread_mask;" in
682 * irq_wake_thread(). See the comment there which explains the
683 * serialization.
0b1adaa0 684 */
32f4125e 685 if (unlikely(irqd_irq_inprogress(&desc->irq_data))) {
0b1adaa0 686 raw_spin_unlock_irq(&desc->lock);
3876ec9e 687 chip_bus_sync_unlock(desc);
0b1adaa0
TG
688 cpu_relax();
689 goto again;
690 }
691
b5faba21
TG
692 /*
693 * Now check again, whether the thread should run. Otherwise
694 * we would clear the threads_oneshot bit of this thread which
695 * was just set.
696 */
f3f79e38 697 if (test_bit(IRQTF_RUNTHREAD, &action->thread_flags))
b5faba21
TG
698 goto out_unlock;
699
700 desc->threads_oneshot &= ~action->thread_mask;
701
32f4125e
TG
702 if (!desc->threads_oneshot && !irqd_irq_disabled(&desc->irq_data) &&
703 irqd_irq_masked(&desc->irq_data))
704 unmask_irq(desc);
705
b5faba21 706out_unlock:
239007b8 707 raw_spin_unlock_irq(&desc->lock);
3876ec9e 708 chip_bus_sync_unlock(desc);
b25c340c
TG
709}
710
61f38261 711#ifdef CONFIG_SMP
591d2fb0 712/*
d4d5e089 713 * Check whether we need to chasnge the affinity of the interrupt thread.
591d2fb0
TG
714 */
715static void
716irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action)
717{
718 cpumask_var_t mask;
719
720 if (!test_and_clear_bit(IRQTF_AFFINITY, &action->thread_flags))
721 return;
722
723 /*
724 * In case we are out of memory we set IRQTF_AFFINITY again and
725 * try again next time
726 */
727 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
728 set_bit(IRQTF_AFFINITY, &action->thread_flags);
729 return;
730 }
731
239007b8 732 raw_spin_lock_irq(&desc->lock);
6b8ff312 733 cpumask_copy(mask, desc->irq_data.affinity);
239007b8 734 raw_spin_unlock_irq(&desc->lock);
591d2fb0
TG
735
736 set_cpus_allowed_ptr(current, mask);
737 free_cpumask_var(mask);
738}
61f38261
BP
739#else
740static inline void
741irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) { }
742#endif
591d2fb0 743
8d32a307
TG
744/*
745 * Interrupts which are not explicitely requested as threaded
746 * interrupts rely on the implicit bh/preempt disable of the hard irq
747 * context. So we need to disable bh here to avoid deadlocks and other
748 * side effects.
749 */
3a43e05f 750static irqreturn_t
8d32a307
TG
751irq_forced_thread_fn(struct irq_desc *desc, struct irqaction *action)
752{
3a43e05f
SAS
753 irqreturn_t ret;
754
8d32a307 755 local_bh_disable();
3a43e05f 756 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 757 irq_finalize_oneshot(desc, action);
8d32a307 758 local_bh_enable();
3a43e05f 759 return ret;
8d32a307
TG
760}
761
762/*
763 * Interrupts explicitely requested as threaded interupts want to be
764 * preemtible - many of them need to sleep and wait for slow busses to
765 * complete.
766 */
3a43e05f
SAS
767static irqreturn_t irq_thread_fn(struct irq_desc *desc,
768 struct irqaction *action)
8d32a307 769{
3a43e05f
SAS
770 irqreturn_t ret;
771
772 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 773 irq_finalize_oneshot(desc, action);
3a43e05f 774 return ret;
8d32a307
TG
775}
776
7140ea19
IY
777static void wake_threads_waitq(struct irq_desc *desc)
778{
779 if (atomic_dec_and_test(&desc->threads_active) &&
780 waitqueue_active(&desc->wait_for_threads))
781 wake_up(&desc->wait_for_threads);
782}
783
67d12145 784static void irq_thread_dtor(struct callback_head *unused)
4d1d61a6
ON
785{
786 struct task_struct *tsk = current;
787 struct irq_desc *desc;
788 struct irqaction *action;
789
790 if (WARN_ON_ONCE(!(current->flags & PF_EXITING)))
791 return;
792
793 action = kthread_data(tsk);
794
fb21affa 795 pr_err("exiting task \"%s\" (%d) is an active IRQ thread (irq %d)\n",
4d1d61a6
ON
796 tsk->comm ? tsk->comm : "", tsk->pid, action->irq);
797
798
799 desc = irq_to_desc(action->irq);
800 /*
801 * If IRQTF_RUNTHREAD is set, we need to decrement
802 * desc->threads_active and wake possible waiters.
803 */
804 if (test_and_clear_bit(IRQTF_RUNTHREAD, &action->thread_flags))
805 wake_threads_waitq(desc);
806
807 /* Prevent a stale desc->threads_oneshot */
808 irq_finalize_oneshot(desc, action);
809}
810
3aa551c9
TG
811/*
812 * Interrupt handler thread
813 */
814static int irq_thread(void *data)
815{
67d12145 816 struct callback_head on_exit_work;
c9b5f501 817 static const struct sched_param param = {
fe7de49f
KM
818 .sched_priority = MAX_USER_RT_PRIO/2,
819 };
3aa551c9
TG
820 struct irqaction *action = data;
821 struct irq_desc *desc = irq_to_desc(action->irq);
3a43e05f
SAS
822 irqreturn_t (*handler_fn)(struct irq_desc *desc,
823 struct irqaction *action);
3aa551c9 824
540b60e2 825 if (force_irqthreads && test_bit(IRQTF_FORCED_THREAD,
8d32a307
TG
826 &action->thread_flags))
827 handler_fn = irq_forced_thread_fn;
828 else
829 handler_fn = irq_thread_fn;
830
3aa551c9 831 sched_setscheduler(current, SCHED_FIFO, &param);
4d1d61a6 832
41f9d29f 833 init_task_work(&on_exit_work, irq_thread_dtor);
4d1d61a6 834 task_work_add(current, &on_exit_work, false);
3aa551c9
TG
835
836 while (!irq_wait_for_interrupt(action)) {
7140ea19 837 irqreturn_t action_ret;
3aa551c9 838
591d2fb0
TG
839 irq_thread_check_affinity(desc, action);
840
7140ea19
IY
841 action_ret = handler_fn(desc, action);
842 if (!noirqdebug)
843 note_interrupt(action->irq, desc, action_ret);
3aa551c9 844
7140ea19 845 wake_threads_waitq(desc);
3aa551c9
TG
846 }
847
7140ea19
IY
848 /*
849 * This is the regular exit path. __free_irq() is stopping the
850 * thread via kthread_stop() after calling
851 * synchronize_irq(). So neither IRQTF_RUNTHREAD nor the
e04268b0
TG
852 * oneshot mask bit can be set. We cannot verify that as we
853 * cannot touch the oneshot mask at this point anymore as
854 * __setup_irq() might have given out currents thread_mask
855 * again.
3aa551c9 856 */
4d1d61a6 857 task_work_cancel(current, irq_thread_dtor);
3aa551c9
TG
858 return 0;
859}
860
8d32a307
TG
861static void irq_setup_forced_threading(struct irqaction *new)
862{
863 if (!force_irqthreads)
864 return;
865 if (new->flags & (IRQF_NO_THREAD | IRQF_PERCPU | IRQF_ONESHOT))
866 return;
867
868 new->flags |= IRQF_ONESHOT;
869
870 if (!new->thread_fn) {
871 set_bit(IRQTF_FORCED_THREAD, &new->thread_flags);
872 new->thread_fn = new->handler;
873 new->handler = irq_default_primary_handler;
874 }
875}
876
1da177e4
LT
877/*
878 * Internal function to register an irqaction - typically used to
879 * allocate special interrupts that are part of the architecture.
880 */
d3c60047 881static int
327ec569 882__setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
1da177e4 883{
f17c7545 884 struct irqaction *old, **old_ptr;
b5faba21 885 unsigned long flags, thread_mask = 0;
3b8249e7
TG
886 int ret, nested, shared = 0;
887 cpumask_var_t mask;
1da177e4 888
7d94f7ca 889 if (!desc)
c2b5a251
MW
890 return -EINVAL;
891
6b8ff312 892 if (desc->irq_data.chip == &no_irq_chip)
1da177e4 893 return -ENOSYS;
b6873807
SAS
894 if (!try_module_get(desc->owner))
895 return -ENODEV;
1da177e4 896
3aa551c9 897 /*
399b5da2
TG
898 * Check whether the interrupt nests into another interrupt
899 * thread.
900 */
1ccb4e61 901 nested = irq_settings_is_nested_thread(desc);
399b5da2 902 if (nested) {
b6873807
SAS
903 if (!new->thread_fn) {
904 ret = -EINVAL;
905 goto out_mput;
906 }
399b5da2
TG
907 /*
908 * Replace the primary handler which was provided from
909 * the driver for non nested interrupt handling by the
910 * dummy function which warns when called.
911 */
912 new->handler = irq_nested_primary_handler;
8d32a307 913 } else {
7f1b1244
PM
914 if (irq_settings_can_thread(desc))
915 irq_setup_forced_threading(new);
399b5da2
TG
916 }
917
3aa551c9 918 /*
399b5da2
TG
919 * Create a handler thread when a thread function is supplied
920 * and the interrupt does not nest into another interrupt
921 * thread.
3aa551c9 922 */
399b5da2 923 if (new->thread_fn && !nested) {
3aa551c9
TG
924 struct task_struct *t;
925
926 t = kthread_create(irq_thread, new, "irq/%d-%s", irq,
927 new->name);
b6873807
SAS
928 if (IS_ERR(t)) {
929 ret = PTR_ERR(t);
930 goto out_mput;
931 }
3aa551c9
TG
932 /*
933 * We keep the reference to the task struct even if
934 * the thread dies to avoid that the interrupt code
935 * references an already freed task_struct.
936 */
937 get_task_struct(t);
938 new->thread = t;
3aa551c9
TG
939 }
940
3b8249e7
TG
941 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
942 ret = -ENOMEM;
943 goto out_thread;
944 }
945
dc9b229a
TG
946 /*
947 * Drivers are often written to work w/o knowledge about the
948 * underlying irq chip implementation, so a request for a
949 * threaded irq without a primary hard irq context handler
950 * requires the ONESHOT flag to be set. Some irq chips like
951 * MSI based interrupts are per se one shot safe. Check the
952 * chip flags, so we can avoid the unmask dance at the end of
953 * the threaded handler for those.
954 */
955 if (desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)
956 new->flags &= ~IRQF_ONESHOT;
957
1da177e4
LT
958 /*
959 * The following block of code has to be executed atomically
960 */
239007b8 961 raw_spin_lock_irqsave(&desc->lock, flags);
f17c7545
IM
962 old_ptr = &desc->action;
963 old = *old_ptr;
06fcb0c6 964 if (old) {
e76de9f8
TG
965 /*
966 * Can't share interrupts unless both agree to and are
967 * the same type (level, edge, polarity). So both flag
3cca53b0 968 * fields must have IRQF_SHARED set and the bits which
9d591edd
TG
969 * set the trigger type must match. Also all must
970 * agree on ONESHOT.
e76de9f8 971 */
3cca53b0 972 if (!((old->flags & new->flags) & IRQF_SHARED) ||
9d591edd 973 ((old->flags ^ new->flags) & IRQF_TRIGGER_MASK) ||
f5d89470 974 ((old->flags ^ new->flags) & IRQF_ONESHOT))
f5163427
DS
975 goto mismatch;
976
f5163427 977 /* All handlers must agree on per-cpuness */
3cca53b0
TG
978 if ((old->flags & IRQF_PERCPU) !=
979 (new->flags & IRQF_PERCPU))
f5163427 980 goto mismatch;
1da177e4
LT
981
982 /* add new interrupt at end of irq queue */
983 do {
52abb700
TG
984 /*
985 * Or all existing action->thread_mask bits,
986 * so we can find the next zero bit for this
987 * new action.
988 */
b5faba21 989 thread_mask |= old->thread_mask;
f17c7545
IM
990 old_ptr = &old->next;
991 old = *old_ptr;
1da177e4
LT
992 } while (old);
993 shared = 1;
994 }
995
b5faba21 996 /*
52abb700
TG
997 * Setup the thread mask for this irqaction for ONESHOT. For
998 * !ONESHOT irqs the thread mask is 0 so we can avoid a
999 * conditional in irq_wake_thread().
b5faba21 1000 */
52abb700
TG
1001 if (new->flags & IRQF_ONESHOT) {
1002 /*
1003 * Unlikely to have 32 resp 64 irqs sharing one line,
1004 * but who knows.
1005 */
1006 if (thread_mask == ~0UL) {
1007 ret = -EBUSY;
1008 goto out_mask;
1009 }
1010 /*
1011 * The thread_mask for the action is or'ed to
1012 * desc->thread_active to indicate that the
1013 * IRQF_ONESHOT thread handler has been woken, but not
1014 * yet finished. The bit is cleared when a thread
1015 * completes. When all threads of a shared interrupt
1016 * line have completed desc->threads_active becomes
1017 * zero and the interrupt line is unmasked. See
1018 * handle.c:irq_wake_thread() for further information.
1019 *
1020 * If no thread is woken by primary (hard irq context)
1021 * interrupt handlers, then desc->threads_active is
1022 * also checked for zero to unmask the irq line in the
1023 * affected hard irq flow handlers
1024 * (handle_[fasteoi|level]_irq).
1025 *
1026 * The new action gets the first zero bit of
1027 * thread_mask assigned. See the loop above which or's
1028 * all existing action->thread_mask bits.
1029 */
1030 new->thread_mask = 1 << ffz(thread_mask);
1c6c6952 1031
dc9b229a
TG
1032 } else if (new->handler == irq_default_primary_handler &&
1033 !(desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)) {
1c6c6952
TG
1034 /*
1035 * The interrupt was requested with handler = NULL, so
1036 * we use the default primary handler for it. But it
1037 * does not have the oneshot flag set. In combination
1038 * with level interrupts this is deadly, because the
1039 * default primary handler just wakes the thread, then
1040 * the irq lines is reenabled, but the device still
1041 * has the level irq asserted. Rinse and repeat....
1042 *
1043 * While this works for edge type interrupts, we play
1044 * it safe and reject unconditionally because we can't
1045 * say for sure which type this interrupt really
1046 * has. The type flags are unreliable as the
1047 * underlying chip implementation can override them.
1048 */
97fd75b7 1049 pr_err("Threaded irq requested with handler=NULL and !ONESHOT for irq %d\n",
1c6c6952
TG
1050 irq);
1051 ret = -EINVAL;
1052 goto out_mask;
b5faba21 1053 }
b5faba21 1054
1da177e4 1055 if (!shared) {
3aa551c9
TG
1056 init_waitqueue_head(&desc->wait_for_threads);
1057
e76de9f8 1058 /* Setup the type (level, edge polarity) if configured: */
3cca53b0 1059 if (new->flags & IRQF_TRIGGER_MASK) {
f2b662da
DB
1060 ret = __irq_set_trigger(desc, irq,
1061 new->flags & IRQF_TRIGGER_MASK);
82736f4d 1062
3aa551c9 1063 if (ret)
3b8249e7 1064 goto out_mask;
091738a2 1065 }
6a6de9ef 1066
009b4c3b 1067 desc->istate &= ~(IRQS_AUTODETECT | IRQS_SPURIOUS_DISABLED | \
32f4125e
TG
1068 IRQS_ONESHOT | IRQS_WAITING);
1069 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
94d39e1f 1070
a005677b
TG
1071 if (new->flags & IRQF_PERCPU) {
1072 irqd_set(&desc->irq_data, IRQD_PER_CPU);
1073 irq_settings_set_per_cpu(desc);
1074 }
6a58fb3b 1075
b25c340c 1076 if (new->flags & IRQF_ONESHOT)
3d67baec 1077 desc->istate |= IRQS_ONESHOT;
b25c340c 1078
1ccb4e61 1079 if (irq_settings_can_autoenable(desc))
b4bc724e 1080 irq_startup(desc, true);
46999238 1081 else
e76de9f8
TG
1082 /* Undo nested disables: */
1083 desc->depth = 1;
18404756 1084
612e3684 1085 /* Exclude IRQ from balancing if requested */
a005677b
TG
1086 if (new->flags & IRQF_NOBALANCING) {
1087 irq_settings_set_no_balancing(desc);
1088 irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
1089 }
612e3684 1090
18404756 1091 /* Set default affinity mask once everything is setup */
3b8249e7 1092 setup_affinity(irq, desc, mask);
0c5d1eb7 1093
876dbd4c
TG
1094 } else if (new->flags & IRQF_TRIGGER_MASK) {
1095 unsigned int nmsk = new->flags & IRQF_TRIGGER_MASK;
1096 unsigned int omsk = irq_settings_get_trigger_mask(desc);
1097
1098 if (nmsk != omsk)
1099 /* hope the handler works with current trigger mode */
97fd75b7 1100 pr_warning("irq %d uses trigger mode %u; requested %u\n",
876dbd4c 1101 irq, nmsk, omsk);
1da177e4 1102 }
82736f4d 1103
69ab8494 1104 new->irq = irq;
f17c7545 1105 *old_ptr = new;
82736f4d 1106
8528b0f1
LT
1107 /* Reset broken irq detection when installing new handler */
1108 desc->irq_count = 0;
1109 desc->irqs_unhandled = 0;
1adb0850
TG
1110
1111 /*
1112 * Check whether we disabled the irq via the spurious handler
1113 * before. Reenable it and give it another chance.
1114 */
7acdd53e
TG
1115 if (shared && (desc->istate & IRQS_SPURIOUS_DISABLED)) {
1116 desc->istate &= ~IRQS_SPURIOUS_DISABLED;
0a0c5168 1117 __enable_irq(desc, irq, false);
1adb0850
TG
1118 }
1119
239007b8 1120 raw_spin_unlock_irqrestore(&desc->lock, flags);
1da177e4 1121
69ab8494
TG
1122 /*
1123 * Strictly no need to wake it up, but hung_task complains
1124 * when no hard interrupt wakes the thread up.
1125 */
1126 if (new->thread)
1127 wake_up_process(new->thread);
1128
2c6927a3 1129 register_irq_proc(irq, desc);
1da177e4
LT
1130 new->dir = NULL;
1131 register_handler_proc(irq, new);
4f5058c3 1132 free_cpumask_var(mask);
1da177e4
LT
1133
1134 return 0;
f5163427
DS
1135
1136mismatch:
3cca53b0 1137 if (!(new->flags & IRQF_PROBE_SHARED)) {
97fd75b7 1138 pr_err("Flags mismatch irq %d. %08x (%s) vs. %08x (%s)\n",
f5d89470
TG
1139 irq, new->flags, new->name, old->flags, old->name);
1140#ifdef CONFIG_DEBUG_SHIRQ
13e87ec6 1141 dump_stack();
3f050447 1142#endif
f5d89470 1143 }
3aa551c9
TG
1144 ret = -EBUSY;
1145
3b8249e7 1146out_mask:
1c389795 1147 raw_spin_unlock_irqrestore(&desc->lock, flags);
3b8249e7
TG
1148 free_cpumask_var(mask);
1149
3aa551c9 1150out_thread:
3aa551c9
TG
1151 if (new->thread) {
1152 struct task_struct *t = new->thread;
1153
1154 new->thread = NULL;
05d74efa 1155 kthread_stop(t);
3aa551c9
TG
1156 put_task_struct(t);
1157 }
b6873807
SAS
1158out_mput:
1159 module_put(desc->owner);
3aa551c9 1160 return ret;
1da177e4
LT
1161}
1162
d3c60047
TG
1163/**
1164 * setup_irq - setup an interrupt
1165 * @irq: Interrupt line to setup
1166 * @act: irqaction for the interrupt
1167 *
1168 * Used to statically setup interrupts in the early boot process.
1169 */
1170int setup_irq(unsigned int irq, struct irqaction *act)
1171{
986c011d 1172 int retval;
d3c60047
TG
1173 struct irq_desc *desc = irq_to_desc(irq);
1174
31d9d9b6
MZ
1175 if (WARN_ON(irq_settings_is_per_cpu_devid(desc)))
1176 return -EINVAL;
986c011d
DD
1177 chip_bus_lock(desc);
1178 retval = __setup_irq(irq, desc, act);
1179 chip_bus_sync_unlock(desc);
1180
1181 return retval;
d3c60047 1182}
eb53b4e8 1183EXPORT_SYMBOL_GPL(setup_irq);
d3c60047 1184
31d9d9b6 1185/*
cbf94f06
MD
1186 * Internal function to unregister an irqaction - used to free
1187 * regular and special interrupts that are part of the architecture.
1da177e4 1188 */
cbf94f06 1189static struct irqaction *__free_irq(unsigned int irq, void *dev_id)
1da177e4 1190{
d3c60047 1191 struct irq_desc *desc = irq_to_desc(irq);
f17c7545 1192 struct irqaction *action, **action_ptr;
1da177e4
LT
1193 unsigned long flags;
1194
ae88a23b 1195 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
7d94f7ca 1196
7d94f7ca 1197 if (!desc)
f21cfb25 1198 return NULL;
1da177e4 1199
239007b8 1200 raw_spin_lock_irqsave(&desc->lock, flags);
ae88a23b
IM
1201
1202 /*
1203 * There can be multiple actions per IRQ descriptor, find the right
1204 * one based on the dev_id:
1205 */
f17c7545 1206 action_ptr = &desc->action;
1da177e4 1207 for (;;) {
f17c7545 1208 action = *action_ptr;
1da177e4 1209
ae88a23b
IM
1210 if (!action) {
1211 WARN(1, "Trying to free already-free IRQ %d\n", irq);
239007b8 1212 raw_spin_unlock_irqrestore(&desc->lock, flags);
1da177e4 1213
f21cfb25 1214 return NULL;
ae88a23b 1215 }
1da177e4 1216
8316e381
IM
1217 if (action->dev_id == dev_id)
1218 break;
f17c7545 1219 action_ptr = &action->next;
ae88a23b 1220 }
dbce706e 1221
ae88a23b 1222 /* Found it - now remove it from the list of entries: */
f17c7545 1223 *action_ptr = action->next;
ae88a23b 1224
ae88a23b 1225 /* If this was the last handler, shut down the IRQ line: */
46999238
TG
1226 if (!desc->action)
1227 irq_shutdown(desc);
3aa551c9 1228
e7a297b0
PWJ
1229#ifdef CONFIG_SMP
1230 /* make sure affinity_hint is cleaned up */
1231 if (WARN_ON_ONCE(desc->affinity_hint))
1232 desc->affinity_hint = NULL;
1233#endif
1234
239007b8 1235 raw_spin_unlock_irqrestore(&desc->lock, flags);
ae88a23b
IM
1236
1237 unregister_handler_proc(irq, action);
1238
1239 /* Make sure it's not being used on another CPU: */
1240 synchronize_irq(irq);
1da177e4 1241
70edcd77 1242#ifdef CONFIG_DEBUG_SHIRQ
ae88a23b
IM
1243 /*
1244 * It's a shared IRQ -- the driver ought to be prepared for an IRQ
1245 * event to happen even now it's being freed, so let's make sure that
1246 * is so by doing an extra call to the handler ....
1247 *
1248 * ( We do this after actually deregistering it, to make sure that a
1249 * 'real' IRQ doesn't run in * parallel with our fake. )
1250 */
1251 if (action->flags & IRQF_SHARED) {
1252 local_irq_save(flags);
1253 action->handler(irq, dev_id);
1254 local_irq_restore(flags);
1da177e4 1255 }
ae88a23b 1256#endif
2d860ad7
LT
1257
1258 if (action->thread) {
05d74efa 1259 kthread_stop(action->thread);
2d860ad7
LT
1260 put_task_struct(action->thread);
1261 }
1262
b6873807 1263 module_put(desc->owner);
f21cfb25
MD
1264 return action;
1265}
1266
cbf94f06
MD
1267/**
1268 * remove_irq - free an interrupt
1269 * @irq: Interrupt line to free
1270 * @act: irqaction for the interrupt
1271 *
1272 * Used to remove interrupts statically setup by the early boot process.
1273 */
1274void remove_irq(unsigned int irq, struct irqaction *act)
1275{
31d9d9b6
MZ
1276 struct irq_desc *desc = irq_to_desc(irq);
1277
1278 if (desc && !WARN_ON(irq_settings_is_per_cpu_devid(desc)))
1279 __free_irq(irq, act->dev_id);
cbf94f06 1280}
eb53b4e8 1281EXPORT_SYMBOL_GPL(remove_irq);
cbf94f06 1282
f21cfb25
MD
1283/**
1284 * free_irq - free an interrupt allocated with request_irq
1285 * @irq: Interrupt line to free
1286 * @dev_id: Device identity to free
1287 *
1288 * Remove an interrupt handler. The handler is removed and if the
1289 * interrupt line is no longer in use by any driver it is disabled.
1290 * On a shared IRQ the caller must ensure the interrupt is disabled
1291 * on the card it drives before calling this function. The function
1292 * does not return until any executing interrupts for this IRQ
1293 * have completed.
1294 *
1295 * This function must not be called from interrupt context.
1296 */
1297void free_irq(unsigned int irq, void *dev_id)
1298{
70aedd24
TG
1299 struct irq_desc *desc = irq_to_desc(irq);
1300
31d9d9b6 1301 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
70aedd24
TG
1302 return;
1303
cd7eab44
BH
1304#ifdef CONFIG_SMP
1305 if (WARN_ON(desc->affinity_notify))
1306 desc->affinity_notify = NULL;
1307#endif
1308
3876ec9e 1309 chip_bus_lock(desc);
cbf94f06 1310 kfree(__free_irq(irq, dev_id));
3876ec9e 1311 chip_bus_sync_unlock(desc);
1da177e4 1312}
1da177e4
LT
1313EXPORT_SYMBOL(free_irq);
1314
1315/**
3aa551c9 1316 * request_threaded_irq - allocate an interrupt line
1da177e4 1317 * @irq: Interrupt line to allocate
3aa551c9
TG
1318 * @handler: Function to be called when the IRQ occurs.
1319 * Primary handler for threaded interrupts
b25c340c
TG
1320 * If NULL and thread_fn != NULL the default
1321 * primary handler is installed
f48fe81e
TG
1322 * @thread_fn: Function called from the irq handler thread
1323 * If NULL, no irq thread is created
1da177e4
LT
1324 * @irqflags: Interrupt type flags
1325 * @devname: An ascii name for the claiming device
1326 * @dev_id: A cookie passed back to the handler function
1327 *
1328 * This call allocates interrupt resources and enables the
1329 * interrupt line and IRQ handling. From the point this
1330 * call is made your handler function may be invoked. Since
1331 * your handler function must clear any interrupt the board
1332 * raises, you must take care both to initialise your hardware
1333 * and to set up the interrupt handler in the right order.
1334 *
3aa551c9 1335 * If you want to set up a threaded irq handler for your device
6d21af4f 1336 * then you need to supply @handler and @thread_fn. @handler is
3aa551c9
TG
1337 * still called in hard interrupt context and has to check
1338 * whether the interrupt originates from the device. If yes it
1339 * needs to disable the interrupt on the device and return
39a2eddb 1340 * IRQ_WAKE_THREAD which will wake up the handler thread and run
3aa551c9
TG
1341 * @thread_fn. This split handler design is necessary to support
1342 * shared interrupts.
1343 *
1da177e4
LT
1344 * Dev_id must be globally unique. Normally the address of the
1345 * device data structure is used as the cookie. Since the handler
1346 * receives this value it makes sense to use it.
1347 *
1348 * If your interrupt is shared you must pass a non NULL dev_id
1349 * as this is required when freeing the interrupt.
1350 *
1351 * Flags:
1352 *
3cca53b0 1353 * IRQF_SHARED Interrupt is shared
0c5d1eb7 1354 * IRQF_TRIGGER_* Specify active edge(s) or level
1da177e4
LT
1355 *
1356 */
3aa551c9
TG
1357int request_threaded_irq(unsigned int irq, irq_handler_t handler,
1358 irq_handler_t thread_fn, unsigned long irqflags,
1359 const char *devname, void *dev_id)
1da177e4 1360{
06fcb0c6 1361 struct irqaction *action;
08678b08 1362 struct irq_desc *desc;
d3c60047 1363 int retval;
1da177e4
LT
1364
1365 /*
1366 * Sanity-check: shared interrupts must pass in a real dev-ID,
1367 * otherwise we'll have trouble later trying to figure out
1368 * which interrupt is which (messes up the interrupt freeing
1369 * logic etc).
1370 */
3cca53b0 1371 if ((irqflags & IRQF_SHARED) && !dev_id)
1da177e4 1372 return -EINVAL;
7d94f7ca 1373
cb5bc832 1374 desc = irq_to_desc(irq);
7d94f7ca 1375 if (!desc)
1da177e4 1376 return -EINVAL;
7d94f7ca 1377
31d9d9b6
MZ
1378 if (!irq_settings_can_request(desc) ||
1379 WARN_ON(irq_settings_is_per_cpu_devid(desc)))
6550c775 1380 return -EINVAL;
b25c340c
TG
1381
1382 if (!handler) {
1383 if (!thread_fn)
1384 return -EINVAL;
1385 handler = irq_default_primary_handler;
1386 }
1da177e4 1387
45535732 1388 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1da177e4
LT
1389 if (!action)
1390 return -ENOMEM;
1391
1392 action->handler = handler;
3aa551c9 1393 action->thread_fn = thread_fn;
1da177e4 1394 action->flags = irqflags;
1da177e4 1395 action->name = devname;
1da177e4
LT
1396 action->dev_id = dev_id;
1397
3876ec9e 1398 chip_bus_lock(desc);
d3c60047 1399 retval = __setup_irq(irq, desc, action);
3876ec9e 1400 chip_bus_sync_unlock(desc);
70aedd24 1401
377bf1e4
AV
1402 if (retval)
1403 kfree(action);
1404
6d83f94d 1405#ifdef CONFIG_DEBUG_SHIRQ_FIXME
6ce51c43 1406 if (!retval && (irqflags & IRQF_SHARED)) {
a304e1b8
DW
1407 /*
1408 * It's a shared IRQ -- the driver ought to be prepared for it
1409 * to happen immediately, so let's make sure....
377bf1e4
AV
1410 * We disable the irq to make sure that a 'real' IRQ doesn't
1411 * run in parallel with our fake.
a304e1b8 1412 */
59845b1f 1413 unsigned long flags;
a304e1b8 1414
377bf1e4 1415 disable_irq(irq);
59845b1f 1416 local_irq_save(flags);
377bf1e4 1417
59845b1f 1418 handler(irq, dev_id);
377bf1e4 1419
59845b1f 1420 local_irq_restore(flags);
377bf1e4 1421 enable_irq(irq);
a304e1b8
DW
1422 }
1423#endif
1da177e4
LT
1424 return retval;
1425}
3aa551c9 1426EXPORT_SYMBOL(request_threaded_irq);
ae731f8d
MZ
1427
1428/**
1429 * request_any_context_irq - allocate an interrupt line
1430 * @irq: Interrupt line to allocate
1431 * @handler: Function to be called when the IRQ occurs.
1432 * Threaded handler for threaded interrupts.
1433 * @flags: Interrupt type flags
1434 * @name: An ascii name for the claiming device
1435 * @dev_id: A cookie passed back to the handler function
1436 *
1437 * This call allocates interrupt resources and enables the
1438 * interrupt line and IRQ handling. It selects either a
1439 * hardirq or threaded handling method depending on the
1440 * context.
1441 *
1442 * On failure, it returns a negative value. On success,
1443 * it returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED.
1444 */
1445int request_any_context_irq(unsigned int irq, irq_handler_t handler,
1446 unsigned long flags, const char *name, void *dev_id)
1447{
1448 struct irq_desc *desc = irq_to_desc(irq);
1449 int ret;
1450
1451 if (!desc)
1452 return -EINVAL;
1453
1ccb4e61 1454 if (irq_settings_is_nested_thread(desc)) {
ae731f8d
MZ
1455 ret = request_threaded_irq(irq, NULL, handler,
1456 flags, name, dev_id);
1457 return !ret ? IRQC_IS_NESTED : ret;
1458 }
1459
1460 ret = request_irq(irq, handler, flags, name, dev_id);
1461 return !ret ? IRQC_IS_HARDIRQ : ret;
1462}
1463EXPORT_SYMBOL_GPL(request_any_context_irq);
31d9d9b6 1464
1e7c5fd2 1465void enable_percpu_irq(unsigned int irq, unsigned int type)
31d9d9b6
MZ
1466{
1467 unsigned int cpu = smp_processor_id();
1468 unsigned long flags;
1469 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1470
1471 if (!desc)
1472 return;
1473
1e7c5fd2
MZ
1474 type &= IRQ_TYPE_SENSE_MASK;
1475 if (type != IRQ_TYPE_NONE) {
1476 int ret;
1477
1478 ret = __irq_set_trigger(desc, irq, type);
1479
1480 if (ret) {
32cffdde 1481 WARN(1, "failed to set type for IRQ%d\n", irq);
1e7c5fd2
MZ
1482 goto out;
1483 }
1484 }
1485
31d9d9b6 1486 irq_percpu_enable(desc, cpu);
1e7c5fd2 1487out:
31d9d9b6
MZ
1488 irq_put_desc_unlock(desc, flags);
1489}
1490
1491void disable_percpu_irq(unsigned int irq)
1492{
1493 unsigned int cpu = smp_processor_id();
1494 unsigned long flags;
1495 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1496
1497 if (!desc)
1498 return;
1499
1500 irq_percpu_disable(desc, cpu);
1501 irq_put_desc_unlock(desc, flags);
1502}
1503
1504/*
1505 * Internal function to unregister a percpu irqaction.
1506 */
1507static struct irqaction *__free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1508{
1509 struct irq_desc *desc = irq_to_desc(irq);
1510 struct irqaction *action;
1511 unsigned long flags;
1512
1513 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
1514
1515 if (!desc)
1516 return NULL;
1517
1518 raw_spin_lock_irqsave(&desc->lock, flags);
1519
1520 action = desc->action;
1521 if (!action || action->percpu_dev_id != dev_id) {
1522 WARN(1, "Trying to free already-free IRQ %d\n", irq);
1523 goto bad;
1524 }
1525
1526 if (!cpumask_empty(desc->percpu_enabled)) {
1527 WARN(1, "percpu IRQ %d still enabled on CPU%d!\n",
1528 irq, cpumask_first(desc->percpu_enabled));
1529 goto bad;
1530 }
1531
1532 /* Found it - now remove it from the list of entries: */
1533 desc->action = NULL;
1534
1535 raw_spin_unlock_irqrestore(&desc->lock, flags);
1536
1537 unregister_handler_proc(irq, action);
1538
1539 module_put(desc->owner);
1540 return action;
1541
1542bad:
1543 raw_spin_unlock_irqrestore(&desc->lock, flags);
1544 return NULL;
1545}
1546
1547/**
1548 * remove_percpu_irq - free a per-cpu interrupt
1549 * @irq: Interrupt line to free
1550 * @act: irqaction for the interrupt
1551 *
1552 * Used to remove interrupts statically setup by the early boot process.
1553 */
1554void remove_percpu_irq(unsigned int irq, struct irqaction *act)
1555{
1556 struct irq_desc *desc = irq_to_desc(irq);
1557
1558 if (desc && irq_settings_is_per_cpu_devid(desc))
1559 __free_percpu_irq(irq, act->percpu_dev_id);
1560}
1561
1562/**
1563 * free_percpu_irq - free an interrupt allocated with request_percpu_irq
1564 * @irq: Interrupt line to free
1565 * @dev_id: Device identity to free
1566 *
1567 * Remove a percpu interrupt handler. The handler is removed, but
1568 * the interrupt line is not disabled. This must be done on each
1569 * CPU before calling this function. The function does not return
1570 * until any executing interrupts for this IRQ have completed.
1571 *
1572 * This function must not be called from interrupt context.
1573 */
1574void free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1575{
1576 struct irq_desc *desc = irq_to_desc(irq);
1577
1578 if (!desc || !irq_settings_is_per_cpu_devid(desc))
1579 return;
1580
1581 chip_bus_lock(desc);
1582 kfree(__free_percpu_irq(irq, dev_id));
1583 chip_bus_sync_unlock(desc);
1584}
1585
1586/**
1587 * setup_percpu_irq - setup a per-cpu interrupt
1588 * @irq: Interrupt line to setup
1589 * @act: irqaction for the interrupt
1590 *
1591 * Used to statically setup per-cpu interrupts in the early boot process.
1592 */
1593int setup_percpu_irq(unsigned int irq, struct irqaction *act)
1594{
1595 struct irq_desc *desc = irq_to_desc(irq);
1596 int retval;
1597
1598 if (!desc || !irq_settings_is_per_cpu_devid(desc))
1599 return -EINVAL;
1600 chip_bus_lock(desc);
1601 retval = __setup_irq(irq, desc, act);
1602 chip_bus_sync_unlock(desc);
1603
1604 return retval;
1605}
1606
1607/**
1608 * request_percpu_irq - allocate a percpu interrupt line
1609 * @irq: Interrupt line to allocate
1610 * @handler: Function to be called when the IRQ occurs.
1611 * @devname: An ascii name for the claiming device
1612 * @dev_id: A percpu cookie passed back to the handler function
1613 *
1614 * This call allocates interrupt resources, but doesn't
1615 * automatically enable the interrupt. It has to be done on each
1616 * CPU using enable_percpu_irq().
1617 *
1618 * Dev_id must be globally unique. It is a per-cpu variable, and
1619 * the handler gets called with the interrupted CPU's instance of
1620 * that variable.
1621 */
1622int request_percpu_irq(unsigned int irq, irq_handler_t handler,
1623 const char *devname, void __percpu *dev_id)
1624{
1625 struct irqaction *action;
1626 struct irq_desc *desc;
1627 int retval;
1628
1629 if (!dev_id)
1630 return -EINVAL;
1631
1632 desc = irq_to_desc(irq);
1633 if (!desc || !irq_settings_can_request(desc) ||
1634 !irq_settings_is_per_cpu_devid(desc))
1635 return -EINVAL;
1636
1637 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1638 if (!action)
1639 return -ENOMEM;
1640
1641 action->handler = handler;
2ed0e645 1642 action->flags = IRQF_PERCPU | IRQF_NO_SUSPEND;
31d9d9b6
MZ
1643 action->name = devname;
1644 action->percpu_dev_id = dev_id;
1645
1646 chip_bus_lock(desc);
1647 retval = __setup_irq(irq, desc, action);
1648 chip_bus_sync_unlock(desc);
1649
1650 if (retval)
1651 kfree(action);
1652
1653 return retval;
1654}
This page took 0.776905 seconds and 5 git commands to generate.