x86: put irq_2_iommu pointer into irq_desc
[deliverable/linux.git] / kernel / irq / manage.c
CommitLineData
1da177e4
LT
1/*
2 * linux/kernel/irq/manage.c
3 *
a34db9b2
IM
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006 Thomas Gleixner
1da177e4
LT
6 *
7 * This file contains driver APIs to the irq subsystem.
8 */
9
10#include <linux/irq.h>
11#include <linux/module.h>
12#include <linux/random.h>
13#include <linux/interrupt.h>
1aeb272c 14#include <linux/slab.h>
1da177e4
LT
15
16#include "internals.h"
17
18#ifdef CONFIG_SMP
19
18404756
MK
20cpumask_t irq_default_affinity = CPU_MASK_ALL;
21
1da177e4
LT
22/**
23 * synchronize_irq - wait for pending IRQ handlers (on other CPUs)
1e5d5331 24 * @irq: interrupt number to wait for
1da177e4
LT
25 *
26 * This function waits for any pending IRQ handlers for this interrupt
27 * to complete before returning. If you use this function while
28 * holding a resource the IRQ handler may need you will deadlock.
29 *
30 * This function may be called - with care - from IRQ context.
31 */
32void synchronize_irq(unsigned int irq)
33{
cb5bc832 34 struct irq_desc *desc = irq_to_desc(irq);
a98ce5c6 35 unsigned int status;
1da177e4 36
7d94f7ca 37 if (!desc)
c2b5a251
MW
38 return;
39
a98ce5c6
HX
40 do {
41 unsigned long flags;
42
43 /*
44 * Wait until we're out of the critical section. This might
45 * give the wrong answer due to the lack of memory barriers.
46 */
47 while (desc->status & IRQ_INPROGRESS)
48 cpu_relax();
49
50 /* Ok, that indicated we're done: double-check carefully. */
51 spin_lock_irqsave(&desc->lock, flags);
52 status = desc->status;
53 spin_unlock_irqrestore(&desc->lock, flags);
54
55 /* Oops, that failed? */
56 } while (status & IRQ_INPROGRESS);
1da177e4 57}
1da177e4
LT
58EXPORT_SYMBOL(synchronize_irq);
59
771ee3b0
TG
60/**
61 * irq_can_set_affinity - Check if the affinity of a given irq can be set
62 * @irq: Interrupt to check
63 *
64 */
65int irq_can_set_affinity(unsigned int irq)
66{
08678b08 67 struct irq_desc *desc = irq_to_desc(irq);
771ee3b0
TG
68
69 if (CHECK_IRQ_PER_CPU(desc->status) || !desc->chip ||
70 !desc->chip->set_affinity)
71 return 0;
72
73 return 1;
74}
75
76/**
77 * irq_set_affinity - Set the irq affinity of a given irq
78 * @irq: Interrupt to set affinity
79 * @cpumask: cpumask
80 *
81 */
82int irq_set_affinity(unsigned int irq, cpumask_t cpumask)
83{
08678b08 84 struct irq_desc *desc = irq_to_desc(irq);
771ee3b0
TG
85
86 if (!desc->chip->set_affinity)
87 return -EINVAL;
88
89 set_balance_irq_affinity(irq, cpumask);
90
91#ifdef CONFIG_GENERIC_PENDING_IRQ
72b1e22d
SS
92 if (desc->status & IRQ_MOVE_PCNTXT) {
93 unsigned long flags;
94
95 spin_lock_irqsave(&desc->lock, flags);
96 desc->chip->set_affinity(irq, cpumask);
97 spin_unlock_irqrestore(&desc->lock, flags);
98 } else
99 set_pending_irq(irq, cpumask);
771ee3b0
TG
100#else
101 desc->affinity = cpumask;
102 desc->chip->set_affinity(irq, cpumask);
103#endif
104 return 0;
105}
106
18404756
MK
107#ifndef CONFIG_AUTO_IRQ_AFFINITY
108/*
109 * Generic version of the affinity autoselector.
110 */
111int irq_select_affinity(unsigned int irq)
112{
113 cpumask_t mask;
08678b08 114 struct irq_desc *desc;
18404756
MK
115
116 if (!irq_can_set_affinity(irq))
117 return 0;
118
119 cpus_and(mask, cpu_online_map, irq_default_affinity);
120
08678b08
YL
121 desc = irq_to_desc(irq);
122 desc->affinity = mask;
123 desc->chip->set_affinity(irq, mask);
18404756
MK
124
125 set_balance_irq_affinity(irq, mask);
126 return 0;
127}
128#endif
129
1da177e4
LT
130#endif
131
132/**
133 * disable_irq_nosync - disable an irq without waiting
134 * @irq: Interrupt to disable
135 *
136 * Disable the selected interrupt line. Disables and Enables are
137 * nested.
138 * Unlike disable_irq(), this function does not ensure existing
139 * instances of the IRQ handler have completed before returning.
140 *
141 * This function may be called from IRQ context.
142 */
143void disable_irq_nosync(unsigned int irq)
144{
7d94f7ca 145 struct irq_desc *desc;
1da177e4
LT
146 unsigned long flags;
147
cb5bc832 148 desc = irq_to_desc(irq);
7d94f7ca 149 if (!desc)
c2b5a251
MW
150 return;
151
1da177e4
LT
152 spin_lock_irqsave(&desc->lock, flags);
153 if (!desc->depth++) {
154 desc->status |= IRQ_DISABLED;
d1bef4ed 155 desc->chip->disable(irq);
1da177e4
LT
156 }
157 spin_unlock_irqrestore(&desc->lock, flags);
158}
1da177e4
LT
159EXPORT_SYMBOL(disable_irq_nosync);
160
161/**
162 * disable_irq - disable an irq and wait for completion
163 * @irq: Interrupt to disable
164 *
165 * Disable the selected interrupt line. Enables and Disables are
166 * nested.
167 * This function waits for any pending IRQ handlers for this interrupt
168 * to complete before returning. If you use this function while
169 * holding a resource the IRQ handler may need you will deadlock.
170 *
171 * This function may be called - with care - from IRQ context.
172 */
173void disable_irq(unsigned int irq)
174{
7d94f7ca 175 struct irq_desc *desc;
1da177e4 176
cb5bc832 177 desc = irq_to_desc(irq);
7d94f7ca 178 if (!desc)
c2b5a251
MW
179 return;
180
1da177e4
LT
181 disable_irq_nosync(irq);
182 if (desc->action)
183 synchronize_irq(irq);
184}
1da177e4
LT
185EXPORT_SYMBOL(disable_irq);
186
1adb0850
TG
187static void __enable_irq(struct irq_desc *desc, unsigned int irq)
188{
189 switch (desc->depth) {
190 case 0:
b8c512f6 191 WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n", irq);
1adb0850
TG
192 break;
193 case 1: {
194 unsigned int status = desc->status & ~IRQ_DISABLED;
195
196 /* Prevent probing on this irq: */
197 desc->status = status | IRQ_NOPROBE;
198 check_irq_resend(desc, irq);
199 /* fall-through */
200 }
201 default:
202 desc->depth--;
203 }
204}
205
1da177e4
LT
206/**
207 * enable_irq - enable handling of an irq
208 * @irq: Interrupt to enable
209 *
210 * Undoes the effect of one call to disable_irq(). If this
211 * matches the last disable, processing of interrupts on this
212 * IRQ line is re-enabled.
213 *
214 * This function may be called from IRQ context.
215 */
216void enable_irq(unsigned int irq)
217{
7d94f7ca 218 struct irq_desc *desc;
1da177e4
LT
219 unsigned long flags;
220
cb5bc832 221 desc = irq_to_desc(irq);
7d94f7ca 222 if (!desc)
c2b5a251
MW
223 return;
224
1da177e4 225 spin_lock_irqsave(&desc->lock, flags);
1adb0850 226 __enable_irq(desc, irq);
1da177e4
LT
227 spin_unlock_irqrestore(&desc->lock, flags);
228}
1da177e4
LT
229EXPORT_SYMBOL(enable_irq);
230
0c5d1eb7 231static int set_irq_wake_real(unsigned int irq, unsigned int on)
2db87321 232{
08678b08 233 struct irq_desc *desc = irq_to_desc(irq);
2db87321
UKK
234 int ret = -ENXIO;
235
236 if (desc->chip->set_wake)
237 ret = desc->chip->set_wake(irq, on);
238
239 return ret;
240}
241
ba9a2331
TG
242/**
243 * set_irq_wake - control irq power management wakeup
244 * @irq: interrupt to control
245 * @on: enable/disable power management wakeup
246 *
15a647eb
DB
247 * Enable/disable power management wakeup mode, which is
248 * disabled by default. Enables and disables must match,
249 * just as they match for non-wakeup mode support.
250 *
251 * Wakeup mode lets this IRQ wake the system from sleep
252 * states like "suspend to RAM".
ba9a2331
TG
253 */
254int set_irq_wake(unsigned int irq, unsigned int on)
255{
08678b08 256 struct irq_desc *desc = irq_to_desc(irq);
ba9a2331 257 unsigned long flags;
2db87321 258 int ret = 0;
ba9a2331 259
15a647eb
DB
260 /* wakeup-capable irqs can be shared between drivers that
261 * don't need to have the same sleep mode behaviors.
262 */
ba9a2331 263 spin_lock_irqsave(&desc->lock, flags);
15a647eb 264 if (on) {
2db87321
UKK
265 if (desc->wake_depth++ == 0) {
266 ret = set_irq_wake_real(irq, on);
267 if (ret)
268 desc->wake_depth = 0;
269 else
270 desc->status |= IRQ_WAKEUP;
271 }
15a647eb
DB
272 } else {
273 if (desc->wake_depth == 0) {
7a2c4770 274 WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
2db87321
UKK
275 } else if (--desc->wake_depth == 0) {
276 ret = set_irq_wake_real(irq, on);
277 if (ret)
278 desc->wake_depth = 1;
279 else
280 desc->status &= ~IRQ_WAKEUP;
281 }
15a647eb 282 }
2db87321 283
ba9a2331
TG
284 spin_unlock_irqrestore(&desc->lock, flags);
285 return ret;
286}
287EXPORT_SYMBOL(set_irq_wake);
288
1da177e4
LT
289/*
290 * Internal function that tells the architecture code whether a
291 * particular irq has been exclusively allocated or is available
292 * for driver use.
293 */
294int can_request_irq(unsigned int irq, unsigned long irqflags)
295{
7d94f7ca 296 struct irq_desc *desc;
1da177e4
LT
297 struct irqaction *action;
298
cb5bc832 299 desc = irq_to_desc(irq);
7d94f7ca
YL
300 if (!desc)
301 return 0;
302
303 if (desc->status & IRQ_NOREQUEST)
1da177e4
LT
304 return 0;
305
08678b08 306 action = desc->action;
1da177e4 307 if (action)
3cca53b0 308 if (irqflags & action->flags & IRQF_SHARED)
1da177e4
LT
309 action = NULL;
310
311 return !action;
312}
313
6a6de9ef
TG
314void compat_irq_chip_set_default_handler(struct irq_desc *desc)
315{
316 /*
317 * If the architecture still has not overriden
318 * the flow handler then zap the default. This
319 * should catch incorrect flow-type setting.
320 */
321 if (desc->handle_irq == &handle_bad_irq)
322 desc->handle_irq = NULL;
323}
324
0c5d1eb7 325int __irq_set_trigger(struct irq_desc *desc, unsigned int irq,
82736f4d
UKK
326 unsigned long flags)
327{
328 int ret;
0c5d1eb7 329 struct irq_chip *chip = desc->chip;
82736f4d
UKK
330
331 if (!chip || !chip->set_type) {
332 /*
333 * IRQF_TRIGGER_* but the PIC does not support multiple
334 * flow-types?
335 */
336 pr_warning("No set_type function for IRQ %d (%s)\n", irq,
337 chip ? (chip->name ? : "unknown") : "unknown");
338 return 0;
339 }
340
341 ret = chip->set_type(irq, flags & IRQF_TRIGGER_MASK);
342
343 if (ret)
c69ad71b
DB
344 pr_err("setting trigger mode %d for irq %u failed (%pF)\n",
345 (int)(flags & IRQF_TRIGGER_MASK),
82736f4d 346 irq, chip->set_type);
0c5d1eb7
DB
347 else {
348 /* note that IRQF_TRIGGER_MASK == IRQ_TYPE_SENSE_MASK */
349 desc->status &= ~IRQ_TYPE_SENSE_MASK;
350 desc->status |= flags & IRQ_TYPE_SENSE_MASK;
351 }
82736f4d
UKK
352
353 return ret;
354}
355
1da177e4
LT
356/*
357 * Internal function to register an irqaction - typically used to
358 * allocate special interrupts that are part of the architecture.
359 */
06fcb0c6 360int setup_irq(unsigned int irq, struct irqaction *new)
1da177e4 361{
7d94f7ca 362 struct irq_desc *desc;
1da177e4 363 struct irqaction *old, **p;
8b126b77 364 const char *old_name = NULL;
1da177e4
LT
365 unsigned long flags;
366 int shared = 0;
82736f4d 367 int ret;
1da177e4 368
cb5bc832 369 desc = irq_to_desc(irq);
7d94f7ca 370 if (!desc)
c2b5a251
MW
371 return -EINVAL;
372
f1c2662c 373 if (desc->chip == &no_irq_chip)
1da177e4
LT
374 return -ENOSYS;
375 /*
376 * Some drivers like serial.c use request_irq() heavily,
377 * so we have to be careful not to interfere with a
378 * running system.
379 */
3cca53b0 380 if (new->flags & IRQF_SAMPLE_RANDOM) {
1da177e4
LT
381 /*
382 * This function might sleep, we want to call it first,
383 * outside of the atomic block.
384 * Yes, this might clear the entropy pool if the wrong
385 * driver is attempted to be loaded, without actually
386 * installing a new handler, but is this really a problem,
387 * only the sysadmin is able to do this.
388 */
389 rand_initialize_irq(irq);
390 }
391
392 /*
393 * The following block of code has to be executed atomically
394 */
06fcb0c6 395 spin_lock_irqsave(&desc->lock, flags);
1da177e4 396 p = &desc->action;
06fcb0c6
IM
397 old = *p;
398 if (old) {
e76de9f8
TG
399 /*
400 * Can't share interrupts unless both agree to and are
401 * the same type (level, edge, polarity). So both flag
3cca53b0 402 * fields must have IRQF_SHARED set and the bits which
e76de9f8
TG
403 * set the trigger type must match.
404 */
3cca53b0 405 if (!((old->flags & new->flags) & IRQF_SHARED) ||
8b126b77
AM
406 ((old->flags ^ new->flags) & IRQF_TRIGGER_MASK)) {
407 old_name = old->name;
f5163427 408 goto mismatch;
8b126b77 409 }
f5163427 410
284c6680 411#if defined(CONFIG_IRQ_PER_CPU)
f5163427 412 /* All handlers must agree on per-cpuness */
3cca53b0
TG
413 if ((old->flags & IRQF_PERCPU) !=
414 (new->flags & IRQF_PERCPU))
f5163427
DS
415 goto mismatch;
416#endif
1da177e4
LT
417
418 /* add new interrupt at end of irq queue */
419 do {
420 p = &old->next;
421 old = *p;
422 } while (old);
423 shared = 1;
424 }
425
1da177e4 426 if (!shared) {
6a6de9ef 427 irq_chip_set_defaults(desc->chip);
e76de9f8
TG
428
429 /* Setup the type (level, edge polarity) if configured: */
3cca53b0 430 if (new->flags & IRQF_TRIGGER_MASK) {
0c5d1eb7 431 ret = __irq_set_trigger(desc, irq, new->flags);
82736f4d
UKK
432
433 if (ret) {
434 spin_unlock_irqrestore(&desc->lock, flags);
435 return ret;
436 }
e76de9f8
TG
437 } else
438 compat_irq_chip_set_default_handler(desc);
82736f4d
UKK
439#if defined(CONFIG_IRQ_PER_CPU)
440 if (new->flags & IRQF_PERCPU)
441 desc->status |= IRQ_PER_CPU;
442#endif
6a6de9ef 443
94d39e1f 444 desc->status &= ~(IRQ_AUTODETECT | IRQ_WAITING |
1adb0850 445 IRQ_INPROGRESS | IRQ_SPURIOUS_DISABLED);
94d39e1f
TG
446
447 if (!(desc->status & IRQ_NOAUTOEN)) {
448 desc->depth = 0;
449 desc->status &= ~IRQ_DISABLED;
7e6e178a 450 desc->chip->startup(irq);
e76de9f8
TG
451 } else
452 /* Undo nested disables: */
453 desc->depth = 1;
18404756
MK
454
455 /* Set default affinity mask once everything is setup */
456 irq_select_affinity(irq);
0c5d1eb7
DB
457
458 } else if ((new->flags & IRQF_TRIGGER_MASK)
459 && (new->flags & IRQF_TRIGGER_MASK)
460 != (desc->status & IRQ_TYPE_SENSE_MASK)) {
461 /* hope the handler works with the actual trigger mode... */
462 pr_warning("IRQ %d uses trigger mode %d; requested %d\n",
463 irq, (int)(desc->status & IRQ_TYPE_SENSE_MASK),
464 (int)(new->flags & IRQF_TRIGGER_MASK));
1da177e4 465 }
82736f4d
UKK
466
467 *p = new;
468
469 /* Exclude IRQ from balancing */
470 if (new->flags & IRQF_NOBALANCING)
471 desc->status |= IRQ_NO_BALANCING;
472
8528b0f1
LT
473 /* Reset broken irq detection when installing new handler */
474 desc->irq_count = 0;
475 desc->irqs_unhandled = 0;
1adb0850
TG
476
477 /*
478 * Check whether we disabled the irq via the spurious handler
479 * before. Reenable it and give it another chance.
480 */
481 if (shared && (desc->status & IRQ_SPURIOUS_DISABLED)) {
482 desc->status &= ~IRQ_SPURIOUS_DISABLED;
483 __enable_irq(desc, irq);
484 }
485
06fcb0c6 486 spin_unlock_irqrestore(&desc->lock, flags);
1da177e4
LT
487
488 new->irq = irq;
2c6927a3 489 register_irq_proc(irq, desc);
1da177e4
LT
490 new->dir = NULL;
491 register_handler_proc(irq, new);
492
493 return 0;
f5163427
DS
494
495mismatch:
3f050447 496#ifdef CONFIG_DEBUG_SHIRQ
3cca53b0 497 if (!(new->flags & IRQF_PROBE_SHARED)) {
e8c4b9d0 498 printk(KERN_ERR "IRQ handler type mismatch for IRQ %d\n", irq);
8b126b77
AM
499 if (old_name)
500 printk(KERN_ERR "current handler: %s\n", old_name);
13e87ec6
AM
501 dump_stack();
502 }
3f050447 503#endif
8b126b77 504 spin_unlock_irqrestore(&desc->lock, flags);
f5163427 505 return -EBUSY;
1da177e4
LT
506}
507
508/**
509 * free_irq - free an interrupt
510 * @irq: Interrupt line to free
511 * @dev_id: Device identity to free
512 *
513 * Remove an interrupt handler. The handler is removed and if the
514 * interrupt line is no longer in use by any driver it is disabled.
515 * On a shared IRQ the caller must ensure the interrupt is disabled
516 * on the card it drives before calling this function. The function
517 * does not return until any executing interrupts for this IRQ
518 * have completed.
519 *
520 * This function must not be called from interrupt context.
521 */
522void free_irq(unsigned int irq, void *dev_id)
523{
524 struct irq_desc *desc;
525 struct irqaction **p;
526 unsigned long flags;
527
cd7b24bb 528 WARN_ON(in_interrupt());
7d94f7ca 529
cb5bc832 530 desc = irq_to_desc(irq);
7d94f7ca 531 if (!desc)
1da177e4
LT
532 return;
533
06fcb0c6 534 spin_lock_irqsave(&desc->lock, flags);
1da177e4
LT
535 p = &desc->action;
536 for (;;) {
06fcb0c6 537 struct irqaction *action = *p;
1da177e4
LT
538
539 if (action) {
540 struct irqaction **pp = p;
541
542 p = &action->next;
543 if (action->dev_id != dev_id)
544 continue;
545
546 /* Found it - now remove it from the list of entries */
547 *pp = action->next;
dbce706e 548
b77d6adc
PBG
549 /* Currently used only by UML, might disappear one day.*/
550#ifdef CONFIG_IRQ_RELEASE_METHOD
d1bef4ed
IM
551 if (desc->chip->release)
552 desc->chip->release(irq, dev_id);
b77d6adc 553#endif
dbce706e 554
1da177e4
LT
555 if (!desc->action) {
556 desc->status |= IRQ_DISABLED;
d1bef4ed
IM
557 if (desc->chip->shutdown)
558 desc->chip->shutdown(irq);
1da177e4 559 else
d1bef4ed 560 desc->chip->disable(irq);
1da177e4 561 }
06fcb0c6 562 spin_unlock_irqrestore(&desc->lock, flags);
1da177e4
LT
563 unregister_handler_proc(irq, action);
564
565 /* Make sure it's not being used on another CPU */
566 synchronize_irq(irq);
1d99493b
DW
567#ifdef CONFIG_DEBUG_SHIRQ
568 /*
569 * It's a shared IRQ -- the driver ought to be
570 * prepared for it to happen even now it's
571 * being freed, so let's make sure.... We do
572 * this after actually deregistering it, to
573 * make sure that a 'real' IRQ doesn't run in
574 * parallel with our fake
575 */
576 if (action->flags & IRQF_SHARED) {
577 local_irq_save(flags);
578 action->handler(irq, dev_id);
579 local_irq_restore(flags);
580 }
581#endif
1da177e4
LT
582 kfree(action);
583 return;
584 }
e8c4b9d0 585 printk(KERN_ERR "Trying to free already-free IRQ %d\n", irq);
70edcd77
IM
586#ifdef CONFIG_DEBUG_SHIRQ
587 dump_stack();
588#endif
06fcb0c6 589 spin_unlock_irqrestore(&desc->lock, flags);
1da177e4
LT
590 return;
591 }
592}
1da177e4
LT
593EXPORT_SYMBOL(free_irq);
594
595/**
596 * request_irq - allocate an interrupt line
597 * @irq: Interrupt line to allocate
598 * @handler: Function to be called when the IRQ occurs
599 * @irqflags: Interrupt type flags
600 * @devname: An ascii name for the claiming device
601 * @dev_id: A cookie passed back to the handler function
602 *
603 * This call allocates interrupt resources and enables the
604 * interrupt line and IRQ handling. From the point this
605 * call is made your handler function may be invoked. Since
606 * your handler function must clear any interrupt the board
607 * raises, you must take care both to initialise your hardware
608 * and to set up the interrupt handler in the right order.
609 *
610 * Dev_id must be globally unique. Normally the address of the
611 * device data structure is used as the cookie. Since the handler
612 * receives this value it makes sense to use it.
613 *
614 * If your interrupt is shared you must pass a non NULL dev_id
615 * as this is required when freeing the interrupt.
616 *
617 * Flags:
618 *
3cca53b0
TG
619 * IRQF_SHARED Interrupt is shared
620 * IRQF_DISABLED Disable local interrupts while processing
621 * IRQF_SAMPLE_RANDOM The interrupt can be used for entropy
0c5d1eb7 622 * IRQF_TRIGGER_* Specify active edge(s) or level
1da177e4
LT
623 *
624 */
da482792 625int request_irq(unsigned int irq, irq_handler_t handler,
06fcb0c6 626 unsigned long irqflags, const char *devname, void *dev_id)
1da177e4 627{
06fcb0c6 628 struct irqaction *action;
1da177e4 629 int retval;
08678b08 630 struct irq_desc *desc;
1da177e4 631
fbb9ce95
IM
632#ifdef CONFIG_LOCKDEP
633 /*
634 * Lockdep wants atomic interrupt handlers:
635 */
38515e90 636 irqflags |= IRQF_DISABLED;
fbb9ce95 637#endif
1da177e4
LT
638 /*
639 * Sanity-check: shared interrupts must pass in a real dev-ID,
640 * otherwise we'll have trouble later trying to figure out
641 * which interrupt is which (messes up the interrupt freeing
642 * logic etc).
643 */
3cca53b0 644 if ((irqflags & IRQF_SHARED) && !dev_id)
1da177e4 645 return -EINVAL;
7d94f7ca 646
cb5bc832 647 desc = irq_to_desc(irq);
7d94f7ca 648 if (!desc)
1da177e4 649 return -EINVAL;
7d94f7ca 650
08678b08 651 if (desc->status & IRQ_NOREQUEST)
6550c775 652 return -EINVAL;
1da177e4
LT
653 if (!handler)
654 return -EINVAL;
655
656 action = kmalloc(sizeof(struct irqaction), GFP_ATOMIC);
657 if (!action)
658 return -ENOMEM;
659
660 action->handler = handler;
661 action->flags = irqflags;
662 cpus_clear(action->mask);
663 action->name = devname;
664 action->next = NULL;
665 action->dev_id = dev_id;
666
377bf1e4
AV
667 retval = setup_irq(irq, action);
668 if (retval)
669 kfree(action);
670
a304e1b8
DW
671#ifdef CONFIG_DEBUG_SHIRQ
672 if (irqflags & IRQF_SHARED) {
673 /*
674 * It's a shared IRQ -- the driver ought to be prepared for it
675 * to happen immediately, so let's make sure....
377bf1e4
AV
676 * We disable the irq to make sure that a 'real' IRQ doesn't
677 * run in parallel with our fake.
a304e1b8 678 */
59845b1f 679 unsigned long flags;
a304e1b8 680
377bf1e4 681 disable_irq(irq);
59845b1f 682 local_irq_save(flags);
377bf1e4 683
59845b1f 684 handler(irq, dev_id);
377bf1e4 685
59845b1f 686 local_irq_restore(flags);
377bf1e4 687 enable_irq(irq);
a304e1b8
DW
688 }
689#endif
1da177e4
LT
690 return retval;
691}
1da177e4 692EXPORT_SYMBOL(request_irq);
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