generic: sparse irqs: use irq_desc() together with dyn_array, instead of irq_desc[]
[deliverable/linux.git] / kernel / irq / manage.c
CommitLineData
1da177e4
LT
1/*
2 * linux/kernel/irq/manage.c
3 *
a34db9b2
IM
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006 Thomas Gleixner
1da177e4
LT
6 *
7 * This file contains driver APIs to the irq subsystem.
8 */
9
10#include <linux/irq.h>
11#include <linux/module.h>
12#include <linux/random.h>
13#include <linux/interrupt.h>
1aeb272c 14#include <linux/slab.h>
1da177e4
LT
15
16#include "internals.h"
17
18#ifdef CONFIG_SMP
19
18404756
MK
20cpumask_t irq_default_affinity = CPU_MASK_ALL;
21
1da177e4
LT
22/**
23 * synchronize_irq - wait for pending IRQ handlers (on other CPUs)
1e5d5331 24 * @irq: interrupt number to wait for
1da177e4
LT
25 *
26 * This function waits for any pending IRQ handlers for this interrupt
27 * to complete before returning. If you use this function while
28 * holding a resource the IRQ handler may need you will deadlock.
29 *
30 * This function may be called - with care - from IRQ context.
31 */
32void synchronize_irq(unsigned int irq)
33{
08678b08 34 struct irq_desc *desc = irq_to_desc(irq);
a98ce5c6 35 unsigned int status;
1da177e4 36
85c0f909 37 if (irq >= nr_irqs)
c2b5a251
MW
38 return;
39
a98ce5c6
HX
40 do {
41 unsigned long flags;
42
43 /*
44 * Wait until we're out of the critical section. This might
45 * give the wrong answer due to the lack of memory barriers.
46 */
47 while (desc->status & IRQ_INPROGRESS)
48 cpu_relax();
49
50 /* Ok, that indicated we're done: double-check carefully. */
51 spin_lock_irqsave(&desc->lock, flags);
52 status = desc->status;
53 spin_unlock_irqrestore(&desc->lock, flags);
54
55 /* Oops, that failed? */
56 } while (status & IRQ_INPROGRESS);
1da177e4 57}
1da177e4
LT
58EXPORT_SYMBOL(synchronize_irq);
59
771ee3b0
TG
60/**
61 * irq_can_set_affinity - Check if the affinity of a given irq can be set
62 * @irq: Interrupt to check
63 *
64 */
65int irq_can_set_affinity(unsigned int irq)
66{
08678b08 67 struct irq_desc *desc = irq_to_desc(irq);
771ee3b0
TG
68
69 if (CHECK_IRQ_PER_CPU(desc->status) || !desc->chip ||
70 !desc->chip->set_affinity)
71 return 0;
72
73 return 1;
74}
75
76/**
77 * irq_set_affinity - Set the irq affinity of a given irq
78 * @irq: Interrupt to set affinity
79 * @cpumask: cpumask
80 *
81 */
82int irq_set_affinity(unsigned int irq, cpumask_t cpumask)
83{
08678b08 84 struct irq_desc *desc = irq_to_desc(irq);
771ee3b0
TG
85
86 if (!desc->chip->set_affinity)
87 return -EINVAL;
88
89 set_balance_irq_affinity(irq, cpumask);
90
91#ifdef CONFIG_GENERIC_PENDING_IRQ
72b1e22d
SS
92 if (desc->status & IRQ_MOVE_PCNTXT) {
93 unsigned long flags;
94
95 spin_lock_irqsave(&desc->lock, flags);
96 desc->chip->set_affinity(irq, cpumask);
97 spin_unlock_irqrestore(&desc->lock, flags);
98 } else
99 set_pending_irq(irq, cpumask);
771ee3b0
TG
100#else
101 desc->affinity = cpumask;
102 desc->chip->set_affinity(irq, cpumask);
103#endif
104 return 0;
105}
106
18404756
MK
107#ifndef CONFIG_AUTO_IRQ_AFFINITY
108/*
109 * Generic version of the affinity autoselector.
110 */
111int irq_select_affinity(unsigned int irq)
112{
113 cpumask_t mask;
08678b08 114 struct irq_desc *desc;
18404756
MK
115
116 if (!irq_can_set_affinity(irq))
117 return 0;
118
119 cpus_and(mask, cpu_online_map, irq_default_affinity);
120
08678b08
YL
121 desc = irq_to_desc(irq);
122 desc->affinity = mask;
123 desc->chip->set_affinity(irq, mask);
18404756
MK
124
125 set_balance_irq_affinity(irq, mask);
126 return 0;
127}
128#endif
129
1da177e4
LT
130#endif
131
132/**
133 * disable_irq_nosync - disable an irq without waiting
134 * @irq: Interrupt to disable
135 *
136 * Disable the selected interrupt line. Disables and Enables are
137 * nested.
138 * Unlike disable_irq(), this function does not ensure existing
139 * instances of the IRQ handler have completed before returning.
140 *
141 * This function may be called from IRQ context.
142 */
143void disable_irq_nosync(unsigned int irq)
144{
08678b08 145 struct irq_desc *desc = irq_to_desc(irq);
1da177e4
LT
146 unsigned long flags;
147
85c0f909 148 if (irq >= nr_irqs)
c2b5a251
MW
149 return;
150
1da177e4
LT
151 spin_lock_irqsave(&desc->lock, flags);
152 if (!desc->depth++) {
153 desc->status |= IRQ_DISABLED;
d1bef4ed 154 desc->chip->disable(irq);
1da177e4
LT
155 }
156 spin_unlock_irqrestore(&desc->lock, flags);
157}
1da177e4
LT
158EXPORT_SYMBOL(disable_irq_nosync);
159
160/**
161 * disable_irq - disable an irq and wait for completion
162 * @irq: Interrupt to disable
163 *
164 * Disable the selected interrupt line. Enables and Disables are
165 * nested.
166 * This function waits for any pending IRQ handlers for this interrupt
167 * to complete before returning. If you use this function while
168 * holding a resource the IRQ handler may need you will deadlock.
169 *
170 * This function may be called - with care - from IRQ context.
171 */
172void disable_irq(unsigned int irq)
173{
08678b08 174 struct irq_desc *desc = irq_to_desc(irq);
1da177e4 175
85c0f909 176 if (irq >= nr_irqs)
c2b5a251
MW
177 return;
178
1da177e4
LT
179 disable_irq_nosync(irq);
180 if (desc->action)
181 synchronize_irq(irq);
182}
1da177e4
LT
183EXPORT_SYMBOL(disable_irq);
184
1adb0850
TG
185static void __enable_irq(struct irq_desc *desc, unsigned int irq)
186{
187 switch (desc->depth) {
188 case 0:
b8c512f6 189 WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n", irq);
1adb0850
TG
190 break;
191 case 1: {
192 unsigned int status = desc->status & ~IRQ_DISABLED;
193
194 /* Prevent probing on this irq: */
195 desc->status = status | IRQ_NOPROBE;
196 check_irq_resend(desc, irq);
197 /* fall-through */
198 }
199 default:
200 desc->depth--;
201 }
202}
203
1da177e4
LT
204/**
205 * enable_irq - enable handling of an irq
206 * @irq: Interrupt to enable
207 *
208 * Undoes the effect of one call to disable_irq(). If this
209 * matches the last disable, processing of interrupts on this
210 * IRQ line is re-enabled.
211 *
212 * This function may be called from IRQ context.
213 */
214void enable_irq(unsigned int irq)
215{
08678b08 216 struct irq_desc *desc = irq_to_desc(irq);
1da177e4
LT
217 unsigned long flags;
218
85c0f909 219 if (irq >= nr_irqs)
c2b5a251
MW
220 return;
221
1da177e4 222 spin_lock_irqsave(&desc->lock, flags);
1adb0850 223 __enable_irq(desc, irq);
1da177e4
LT
224 spin_unlock_irqrestore(&desc->lock, flags);
225}
1da177e4
LT
226EXPORT_SYMBOL(enable_irq);
227
0c5d1eb7 228static int set_irq_wake_real(unsigned int irq, unsigned int on)
2db87321 229{
08678b08 230 struct irq_desc *desc = irq_to_desc(irq);
2db87321
UKK
231 int ret = -ENXIO;
232
233 if (desc->chip->set_wake)
234 ret = desc->chip->set_wake(irq, on);
235
236 return ret;
237}
238
ba9a2331
TG
239/**
240 * set_irq_wake - control irq power management wakeup
241 * @irq: interrupt to control
242 * @on: enable/disable power management wakeup
243 *
15a647eb
DB
244 * Enable/disable power management wakeup mode, which is
245 * disabled by default. Enables and disables must match,
246 * just as they match for non-wakeup mode support.
247 *
248 * Wakeup mode lets this IRQ wake the system from sleep
249 * states like "suspend to RAM".
ba9a2331
TG
250 */
251int set_irq_wake(unsigned int irq, unsigned int on)
252{
08678b08 253 struct irq_desc *desc = irq_to_desc(irq);
ba9a2331 254 unsigned long flags;
2db87321 255 int ret = 0;
ba9a2331 256
15a647eb
DB
257 /* wakeup-capable irqs can be shared between drivers that
258 * don't need to have the same sleep mode behaviors.
259 */
ba9a2331 260 spin_lock_irqsave(&desc->lock, flags);
15a647eb 261 if (on) {
2db87321
UKK
262 if (desc->wake_depth++ == 0) {
263 ret = set_irq_wake_real(irq, on);
264 if (ret)
265 desc->wake_depth = 0;
266 else
267 desc->status |= IRQ_WAKEUP;
268 }
15a647eb
DB
269 } else {
270 if (desc->wake_depth == 0) {
7a2c4770 271 WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
2db87321
UKK
272 } else if (--desc->wake_depth == 0) {
273 ret = set_irq_wake_real(irq, on);
274 if (ret)
275 desc->wake_depth = 1;
276 else
277 desc->status &= ~IRQ_WAKEUP;
278 }
15a647eb 279 }
2db87321 280
ba9a2331
TG
281 spin_unlock_irqrestore(&desc->lock, flags);
282 return ret;
283}
284EXPORT_SYMBOL(set_irq_wake);
285
1da177e4
LT
286/*
287 * Internal function that tells the architecture code whether a
288 * particular irq has been exclusively allocated or is available
289 * for driver use.
290 */
291int can_request_irq(unsigned int irq, unsigned long irqflags)
292{
08678b08 293 struct irq_desc *desc = irq_to_desc(irq);
1da177e4
LT
294 struct irqaction *action;
295
08678b08 296 if (irq >= nr_irqs || desc->status & IRQ_NOREQUEST)
1da177e4
LT
297 return 0;
298
08678b08 299 action = desc->action;
1da177e4 300 if (action)
3cca53b0 301 if (irqflags & action->flags & IRQF_SHARED)
1da177e4
LT
302 action = NULL;
303
304 return !action;
305}
306
6a6de9ef
TG
307void compat_irq_chip_set_default_handler(struct irq_desc *desc)
308{
309 /*
310 * If the architecture still has not overriden
311 * the flow handler then zap the default. This
312 * should catch incorrect flow-type setting.
313 */
314 if (desc->handle_irq == &handle_bad_irq)
315 desc->handle_irq = NULL;
316}
317
0c5d1eb7 318int __irq_set_trigger(struct irq_desc *desc, unsigned int irq,
82736f4d
UKK
319 unsigned long flags)
320{
321 int ret;
0c5d1eb7 322 struct irq_chip *chip = desc->chip;
82736f4d
UKK
323
324 if (!chip || !chip->set_type) {
325 /*
326 * IRQF_TRIGGER_* but the PIC does not support multiple
327 * flow-types?
328 */
329 pr_warning("No set_type function for IRQ %d (%s)\n", irq,
330 chip ? (chip->name ? : "unknown") : "unknown");
331 return 0;
332 }
333
334 ret = chip->set_type(irq, flags & IRQF_TRIGGER_MASK);
335
336 if (ret)
c69ad71b
DB
337 pr_err("setting trigger mode %d for irq %u failed (%pF)\n",
338 (int)(flags & IRQF_TRIGGER_MASK),
82736f4d 339 irq, chip->set_type);
0c5d1eb7
DB
340 else {
341 /* note that IRQF_TRIGGER_MASK == IRQ_TYPE_SENSE_MASK */
342 desc->status &= ~IRQ_TYPE_SENSE_MASK;
343 desc->status |= flags & IRQ_TYPE_SENSE_MASK;
344 }
82736f4d
UKK
345
346 return ret;
347}
348
1da177e4
LT
349/*
350 * Internal function to register an irqaction - typically used to
351 * allocate special interrupts that are part of the architecture.
352 */
06fcb0c6 353int setup_irq(unsigned int irq, struct irqaction *new)
1da177e4 354{
08678b08 355 struct irq_desc *desc = irq_to_desc(irq);
1da177e4 356 struct irqaction *old, **p;
8b126b77 357 const char *old_name = NULL;
1da177e4
LT
358 unsigned long flags;
359 int shared = 0;
82736f4d 360 int ret;
1da177e4 361
85c0f909 362 if (irq >= nr_irqs)
c2b5a251
MW
363 return -EINVAL;
364
f1c2662c 365 if (desc->chip == &no_irq_chip)
1da177e4
LT
366 return -ENOSYS;
367 /*
368 * Some drivers like serial.c use request_irq() heavily,
369 * so we have to be careful not to interfere with a
370 * running system.
371 */
3cca53b0 372 if (new->flags & IRQF_SAMPLE_RANDOM) {
1da177e4
LT
373 /*
374 * This function might sleep, we want to call it first,
375 * outside of the atomic block.
376 * Yes, this might clear the entropy pool if the wrong
377 * driver is attempted to be loaded, without actually
378 * installing a new handler, but is this really a problem,
379 * only the sysadmin is able to do this.
380 */
381 rand_initialize_irq(irq);
382 }
383
384 /*
385 * The following block of code has to be executed atomically
386 */
06fcb0c6 387 spin_lock_irqsave(&desc->lock, flags);
1da177e4 388 p = &desc->action;
06fcb0c6
IM
389 old = *p;
390 if (old) {
e76de9f8
TG
391 /*
392 * Can't share interrupts unless both agree to and are
393 * the same type (level, edge, polarity). So both flag
3cca53b0 394 * fields must have IRQF_SHARED set and the bits which
e76de9f8
TG
395 * set the trigger type must match.
396 */
3cca53b0 397 if (!((old->flags & new->flags) & IRQF_SHARED) ||
8b126b77
AM
398 ((old->flags ^ new->flags) & IRQF_TRIGGER_MASK)) {
399 old_name = old->name;
f5163427 400 goto mismatch;
8b126b77 401 }
f5163427 402
284c6680 403#if defined(CONFIG_IRQ_PER_CPU)
f5163427 404 /* All handlers must agree on per-cpuness */
3cca53b0
TG
405 if ((old->flags & IRQF_PERCPU) !=
406 (new->flags & IRQF_PERCPU))
f5163427
DS
407 goto mismatch;
408#endif
1da177e4
LT
409
410 /* add new interrupt at end of irq queue */
411 do {
412 p = &old->next;
413 old = *p;
414 } while (old);
415 shared = 1;
416 }
417
1da177e4 418 if (!shared) {
6a6de9ef 419 irq_chip_set_defaults(desc->chip);
e76de9f8
TG
420
421 /* Setup the type (level, edge polarity) if configured: */
3cca53b0 422 if (new->flags & IRQF_TRIGGER_MASK) {
0c5d1eb7 423 ret = __irq_set_trigger(desc, irq, new->flags);
82736f4d
UKK
424
425 if (ret) {
426 spin_unlock_irqrestore(&desc->lock, flags);
427 return ret;
428 }
e76de9f8
TG
429 } else
430 compat_irq_chip_set_default_handler(desc);
82736f4d
UKK
431#if defined(CONFIG_IRQ_PER_CPU)
432 if (new->flags & IRQF_PERCPU)
433 desc->status |= IRQ_PER_CPU;
434#endif
6a6de9ef 435
94d39e1f 436 desc->status &= ~(IRQ_AUTODETECT | IRQ_WAITING |
1adb0850 437 IRQ_INPROGRESS | IRQ_SPURIOUS_DISABLED);
94d39e1f
TG
438
439 if (!(desc->status & IRQ_NOAUTOEN)) {
440 desc->depth = 0;
441 desc->status &= ~IRQ_DISABLED;
7e6e178a 442 desc->chip->startup(irq);
e76de9f8
TG
443 } else
444 /* Undo nested disables: */
445 desc->depth = 1;
18404756
MK
446
447 /* Set default affinity mask once everything is setup */
448 irq_select_affinity(irq);
0c5d1eb7
DB
449
450 } else if ((new->flags & IRQF_TRIGGER_MASK)
451 && (new->flags & IRQF_TRIGGER_MASK)
452 != (desc->status & IRQ_TYPE_SENSE_MASK)) {
453 /* hope the handler works with the actual trigger mode... */
454 pr_warning("IRQ %d uses trigger mode %d; requested %d\n",
455 irq, (int)(desc->status & IRQ_TYPE_SENSE_MASK),
456 (int)(new->flags & IRQF_TRIGGER_MASK));
1da177e4 457 }
82736f4d
UKK
458
459 *p = new;
460
461 /* Exclude IRQ from balancing */
462 if (new->flags & IRQF_NOBALANCING)
463 desc->status |= IRQ_NO_BALANCING;
464
8528b0f1
LT
465 /* Reset broken irq detection when installing new handler */
466 desc->irq_count = 0;
467 desc->irqs_unhandled = 0;
1adb0850
TG
468
469 /*
470 * Check whether we disabled the irq via the spurious handler
471 * before. Reenable it and give it another chance.
472 */
473 if (shared && (desc->status & IRQ_SPURIOUS_DISABLED)) {
474 desc->status &= ~IRQ_SPURIOUS_DISABLED;
475 __enable_irq(desc, irq);
476 }
477
06fcb0c6 478 spin_unlock_irqrestore(&desc->lock, flags);
1da177e4
LT
479
480 new->irq = irq;
481 register_irq_proc(irq);
482 new->dir = NULL;
483 register_handler_proc(irq, new);
484
485 return 0;
f5163427
DS
486
487mismatch:
3f050447 488#ifdef CONFIG_DEBUG_SHIRQ
3cca53b0 489 if (!(new->flags & IRQF_PROBE_SHARED)) {
e8c4b9d0 490 printk(KERN_ERR "IRQ handler type mismatch for IRQ %d\n", irq);
8b126b77
AM
491 if (old_name)
492 printk(KERN_ERR "current handler: %s\n", old_name);
13e87ec6
AM
493 dump_stack();
494 }
3f050447 495#endif
8b126b77 496 spin_unlock_irqrestore(&desc->lock, flags);
f5163427 497 return -EBUSY;
1da177e4
LT
498}
499
500/**
501 * free_irq - free an interrupt
502 * @irq: Interrupt line to free
503 * @dev_id: Device identity to free
504 *
505 * Remove an interrupt handler. The handler is removed and if the
506 * interrupt line is no longer in use by any driver it is disabled.
507 * On a shared IRQ the caller must ensure the interrupt is disabled
508 * on the card it drives before calling this function. The function
509 * does not return until any executing interrupts for this IRQ
510 * have completed.
511 *
512 * This function must not be called from interrupt context.
513 */
514void free_irq(unsigned int irq, void *dev_id)
515{
516 struct irq_desc *desc;
517 struct irqaction **p;
518 unsigned long flags;
519
cd7b24bb 520 WARN_ON(in_interrupt());
85c0f909 521 if (irq >= nr_irqs)
1da177e4
LT
522 return;
523
08678b08 524 desc = irq_to_desc(irq);
06fcb0c6 525 spin_lock_irqsave(&desc->lock, flags);
1da177e4
LT
526 p = &desc->action;
527 for (;;) {
06fcb0c6 528 struct irqaction *action = *p;
1da177e4
LT
529
530 if (action) {
531 struct irqaction **pp = p;
532
533 p = &action->next;
534 if (action->dev_id != dev_id)
535 continue;
536
537 /* Found it - now remove it from the list of entries */
538 *pp = action->next;
dbce706e 539
b77d6adc
PBG
540 /* Currently used only by UML, might disappear one day.*/
541#ifdef CONFIG_IRQ_RELEASE_METHOD
d1bef4ed
IM
542 if (desc->chip->release)
543 desc->chip->release(irq, dev_id);
b77d6adc 544#endif
dbce706e 545
1da177e4
LT
546 if (!desc->action) {
547 desc->status |= IRQ_DISABLED;
d1bef4ed
IM
548 if (desc->chip->shutdown)
549 desc->chip->shutdown(irq);
1da177e4 550 else
d1bef4ed 551 desc->chip->disable(irq);
1da177e4 552 }
06fcb0c6 553 spin_unlock_irqrestore(&desc->lock, flags);
1da177e4
LT
554 unregister_handler_proc(irq, action);
555
556 /* Make sure it's not being used on another CPU */
557 synchronize_irq(irq);
1d99493b
DW
558#ifdef CONFIG_DEBUG_SHIRQ
559 /*
560 * It's a shared IRQ -- the driver ought to be
561 * prepared for it to happen even now it's
562 * being freed, so let's make sure.... We do
563 * this after actually deregistering it, to
564 * make sure that a 'real' IRQ doesn't run in
565 * parallel with our fake
566 */
567 if (action->flags & IRQF_SHARED) {
568 local_irq_save(flags);
569 action->handler(irq, dev_id);
570 local_irq_restore(flags);
571 }
572#endif
1da177e4
LT
573 kfree(action);
574 return;
575 }
e8c4b9d0 576 printk(KERN_ERR "Trying to free already-free IRQ %d\n", irq);
70edcd77
IM
577#ifdef CONFIG_DEBUG_SHIRQ
578 dump_stack();
579#endif
06fcb0c6 580 spin_unlock_irqrestore(&desc->lock, flags);
1da177e4
LT
581 return;
582 }
583}
1da177e4
LT
584EXPORT_SYMBOL(free_irq);
585
586/**
587 * request_irq - allocate an interrupt line
588 * @irq: Interrupt line to allocate
589 * @handler: Function to be called when the IRQ occurs
590 * @irqflags: Interrupt type flags
591 * @devname: An ascii name for the claiming device
592 * @dev_id: A cookie passed back to the handler function
593 *
594 * This call allocates interrupt resources and enables the
595 * interrupt line and IRQ handling. From the point this
596 * call is made your handler function may be invoked. Since
597 * your handler function must clear any interrupt the board
598 * raises, you must take care both to initialise your hardware
599 * and to set up the interrupt handler in the right order.
600 *
601 * Dev_id must be globally unique. Normally the address of the
602 * device data structure is used as the cookie. Since the handler
603 * receives this value it makes sense to use it.
604 *
605 * If your interrupt is shared you must pass a non NULL dev_id
606 * as this is required when freeing the interrupt.
607 *
608 * Flags:
609 *
3cca53b0
TG
610 * IRQF_SHARED Interrupt is shared
611 * IRQF_DISABLED Disable local interrupts while processing
612 * IRQF_SAMPLE_RANDOM The interrupt can be used for entropy
0c5d1eb7 613 * IRQF_TRIGGER_* Specify active edge(s) or level
1da177e4
LT
614 *
615 */
da482792 616int request_irq(unsigned int irq, irq_handler_t handler,
06fcb0c6 617 unsigned long irqflags, const char *devname, void *dev_id)
1da177e4 618{
06fcb0c6 619 struct irqaction *action;
1da177e4 620 int retval;
08678b08 621 struct irq_desc *desc;
1da177e4 622
fbb9ce95
IM
623#ifdef CONFIG_LOCKDEP
624 /*
625 * Lockdep wants atomic interrupt handlers:
626 */
38515e90 627 irqflags |= IRQF_DISABLED;
fbb9ce95 628#endif
1da177e4
LT
629 /*
630 * Sanity-check: shared interrupts must pass in a real dev-ID,
631 * otherwise we'll have trouble later trying to figure out
632 * which interrupt is which (messes up the interrupt freeing
633 * logic etc).
634 */
3cca53b0 635 if ((irqflags & IRQF_SHARED) && !dev_id)
1da177e4 636 return -EINVAL;
85c0f909 637 if (irq >= nr_irqs)
1da177e4 638 return -EINVAL;
08678b08
YL
639 desc = irq_to_desc(irq);
640 if (desc->status & IRQ_NOREQUEST)
6550c775 641 return -EINVAL;
1da177e4
LT
642 if (!handler)
643 return -EINVAL;
644
645 action = kmalloc(sizeof(struct irqaction), GFP_ATOMIC);
646 if (!action)
647 return -ENOMEM;
648
649 action->handler = handler;
650 action->flags = irqflags;
651 cpus_clear(action->mask);
652 action->name = devname;
653 action->next = NULL;
654 action->dev_id = dev_id;
655
377bf1e4
AV
656 retval = setup_irq(irq, action);
657 if (retval)
658 kfree(action);
659
a304e1b8
DW
660#ifdef CONFIG_DEBUG_SHIRQ
661 if (irqflags & IRQF_SHARED) {
662 /*
663 * It's a shared IRQ -- the driver ought to be prepared for it
664 * to happen immediately, so let's make sure....
377bf1e4
AV
665 * We disable the irq to make sure that a 'real' IRQ doesn't
666 * run in parallel with our fake.
a304e1b8 667 */
59845b1f 668 unsigned long flags;
a304e1b8 669
377bf1e4 670 disable_irq(irq);
59845b1f 671 local_irq_save(flags);
377bf1e4 672
59845b1f 673 handler(irq, dev_id);
377bf1e4 674
59845b1f 675 local_irq_restore(flags);
377bf1e4 676 enable_irq(irq);
a304e1b8
DW
677 }
678#endif
1da177e4
LT
679 return retval;
680}
1da177e4 681EXPORT_SYMBOL(request_irq);
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