Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/kernel/irq/manage.c | |
3 | * | |
a34db9b2 IM |
4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar |
5 | * Copyright (C) 2005-2006 Thomas Gleixner | |
1da177e4 LT |
6 | * |
7 | * This file contains driver APIs to the irq subsystem. | |
8 | */ | |
9 | ||
10 | #include <linux/irq.h> | |
3aa551c9 | 11 | #include <linux/kthread.h> |
1da177e4 LT |
12 | #include <linux/module.h> |
13 | #include <linux/random.h> | |
14 | #include <linux/interrupt.h> | |
1aeb272c | 15 | #include <linux/slab.h> |
3aa551c9 | 16 | #include <linux/sched.h> |
1da177e4 LT |
17 | |
18 | #include "internals.h" | |
19 | ||
8d32a307 TG |
20 | #ifdef CONFIG_IRQ_FORCED_THREADING |
21 | __read_mostly bool force_irqthreads; | |
22 | ||
23 | static int __init setup_forced_irqthreads(char *arg) | |
24 | { | |
25 | force_irqthreads = true; | |
26 | return 0; | |
27 | } | |
28 | early_param("threadirqs", setup_forced_irqthreads); | |
29 | #endif | |
30 | ||
1da177e4 LT |
31 | /** |
32 | * synchronize_irq - wait for pending IRQ handlers (on other CPUs) | |
1e5d5331 | 33 | * @irq: interrupt number to wait for |
1da177e4 LT |
34 | * |
35 | * This function waits for any pending IRQ handlers for this interrupt | |
36 | * to complete before returning. If you use this function while | |
37 | * holding a resource the IRQ handler may need you will deadlock. | |
38 | * | |
39 | * This function may be called - with care - from IRQ context. | |
40 | */ | |
41 | void synchronize_irq(unsigned int irq) | |
42 | { | |
cb5bc832 | 43 | struct irq_desc *desc = irq_to_desc(irq); |
009b4c3b | 44 | unsigned int state; |
1da177e4 | 45 | |
7d94f7ca | 46 | if (!desc) |
c2b5a251 MW |
47 | return; |
48 | ||
a98ce5c6 HX |
49 | do { |
50 | unsigned long flags; | |
51 | ||
52 | /* | |
53 | * Wait until we're out of the critical section. This might | |
54 | * give the wrong answer due to the lack of memory barriers. | |
55 | */ | |
009b4c3b | 56 | while (desc->istate & IRQS_INPROGRESS) |
a98ce5c6 HX |
57 | cpu_relax(); |
58 | ||
59 | /* Ok, that indicated we're done: double-check carefully. */ | |
239007b8 | 60 | raw_spin_lock_irqsave(&desc->lock, flags); |
009b4c3b | 61 | state = desc->istate; |
239007b8 | 62 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
a98ce5c6 HX |
63 | |
64 | /* Oops, that failed? */ | |
009b4c3b | 65 | } while (state & IRQS_INPROGRESS); |
3aa551c9 TG |
66 | |
67 | /* | |
68 | * We made sure that no hardirq handler is running. Now verify | |
69 | * that no threaded handlers are active. | |
70 | */ | |
71 | wait_event(desc->wait_for_threads, !atomic_read(&desc->threads_active)); | |
1da177e4 | 72 | } |
1da177e4 LT |
73 | EXPORT_SYMBOL(synchronize_irq); |
74 | ||
3aa551c9 TG |
75 | #ifdef CONFIG_SMP |
76 | cpumask_var_t irq_default_affinity; | |
77 | ||
771ee3b0 TG |
78 | /** |
79 | * irq_can_set_affinity - Check if the affinity of a given irq can be set | |
80 | * @irq: Interrupt to check | |
81 | * | |
82 | */ | |
83 | int irq_can_set_affinity(unsigned int irq) | |
84 | { | |
08678b08 | 85 | struct irq_desc *desc = irq_to_desc(irq); |
771ee3b0 | 86 | |
bce43032 TG |
87 | if (!desc || !irqd_can_balance(&desc->irq_data) || |
88 | !desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity) | |
771ee3b0 TG |
89 | return 0; |
90 | ||
91 | return 1; | |
92 | } | |
93 | ||
591d2fb0 TG |
94 | /** |
95 | * irq_set_thread_affinity - Notify irq threads to adjust affinity | |
96 | * @desc: irq descriptor which has affitnity changed | |
97 | * | |
98 | * We just set IRQTF_AFFINITY and delegate the affinity setting | |
99 | * to the interrupt thread itself. We can not call | |
100 | * set_cpus_allowed_ptr() here as we hold desc->lock and this | |
101 | * code can be called from hard interrupt context. | |
102 | */ | |
103 | void irq_set_thread_affinity(struct irq_desc *desc) | |
3aa551c9 TG |
104 | { |
105 | struct irqaction *action = desc->action; | |
106 | ||
107 | while (action) { | |
108 | if (action->thread) | |
591d2fb0 | 109 | set_bit(IRQTF_AFFINITY, &action->thread_flags); |
3aa551c9 TG |
110 | action = action->next; |
111 | } | |
112 | } | |
113 | ||
1fa46f1f TG |
114 | #ifdef CONFIG_GENERIC_PENDING_IRQ |
115 | static inline bool irq_can_move_pcntxt(struct irq_desc *desc) | |
116 | { | |
1ccb4e61 | 117 | return irq_settings_can_move_pcntxt(desc); |
1fa46f1f TG |
118 | } |
119 | static inline bool irq_move_pending(struct irq_desc *desc) | |
120 | { | |
f230b6d5 | 121 | return irqd_is_setaffinity_pending(&desc->irq_data); |
1fa46f1f TG |
122 | } |
123 | static inline void | |
124 | irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask) | |
125 | { | |
126 | cpumask_copy(desc->pending_mask, mask); | |
127 | } | |
128 | static inline void | |
129 | irq_get_pending(struct cpumask *mask, struct irq_desc *desc) | |
130 | { | |
131 | cpumask_copy(mask, desc->pending_mask); | |
132 | } | |
133 | #else | |
134 | static inline bool irq_can_move_pcntxt(struct irq_desc *desc) { return true; } | |
135 | static inline bool irq_move_pending(struct irq_desc *desc) { return false; } | |
136 | static inline void | |
137 | irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask) { } | |
138 | static inline void | |
139 | irq_get_pending(struct cpumask *mask, struct irq_desc *desc) { } | |
140 | #endif | |
141 | ||
771ee3b0 TG |
142 | /** |
143 | * irq_set_affinity - Set the irq affinity of a given irq | |
144 | * @irq: Interrupt to set affinity | |
145 | * @cpumask: cpumask | |
146 | * | |
147 | */ | |
1fa46f1f | 148 | int irq_set_affinity(unsigned int irq, const struct cpumask *mask) |
771ee3b0 | 149 | { |
08678b08 | 150 | struct irq_desc *desc = irq_to_desc(irq); |
c96b3b3c | 151 | struct irq_chip *chip = desc->irq_data.chip; |
f6d87f4b | 152 | unsigned long flags; |
1fa46f1f | 153 | int ret = 0; |
771ee3b0 | 154 | |
c96b3b3c | 155 | if (!chip->irq_set_affinity) |
771ee3b0 TG |
156 | return -EINVAL; |
157 | ||
239007b8 | 158 | raw_spin_lock_irqsave(&desc->lock, flags); |
f6d87f4b | 159 | |
1fa46f1f TG |
160 | if (irq_can_move_pcntxt(desc)) { |
161 | ret = chip->irq_set_affinity(&desc->irq_data, mask, false); | |
3b8249e7 TG |
162 | switch (ret) { |
163 | case IRQ_SET_MASK_OK: | |
1fa46f1f | 164 | cpumask_copy(desc->irq_data.affinity, mask); |
3b8249e7 | 165 | case IRQ_SET_MASK_OK_NOCOPY: |
591d2fb0 | 166 | irq_set_thread_affinity(desc); |
3b8249e7 | 167 | ret = 0; |
57b150cc | 168 | } |
1fa46f1f | 169 | } else { |
f230b6d5 | 170 | irqd_set_move_pending(&desc->irq_data); |
1fa46f1f | 171 | irq_copy_pending(desc, mask); |
57b150cc | 172 | } |
1fa46f1f | 173 | |
cd7eab44 BH |
174 | if (desc->affinity_notify) { |
175 | kref_get(&desc->affinity_notify->kref); | |
176 | schedule_work(&desc->affinity_notify->work); | |
177 | } | |
2bdd1055 TG |
178 | irq_compat_set_affinity(desc); |
179 | irqd_set(&desc->irq_data, IRQD_AFFINITY_SET); | |
239007b8 | 180 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
1fa46f1f | 181 | return ret; |
771ee3b0 TG |
182 | } |
183 | ||
e7a297b0 PWJ |
184 | int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m) |
185 | { | |
e7a297b0 | 186 | unsigned long flags; |
02725e74 | 187 | struct irq_desc *desc = irq_get_desc_lock(irq, &flags); |
e7a297b0 PWJ |
188 | |
189 | if (!desc) | |
190 | return -EINVAL; | |
e7a297b0 | 191 | desc->affinity_hint = m; |
02725e74 | 192 | irq_put_desc_unlock(desc, flags); |
e7a297b0 PWJ |
193 | return 0; |
194 | } | |
195 | EXPORT_SYMBOL_GPL(irq_set_affinity_hint); | |
196 | ||
cd7eab44 BH |
197 | static void irq_affinity_notify(struct work_struct *work) |
198 | { | |
199 | struct irq_affinity_notify *notify = | |
200 | container_of(work, struct irq_affinity_notify, work); | |
201 | struct irq_desc *desc = irq_to_desc(notify->irq); | |
202 | cpumask_var_t cpumask; | |
203 | unsigned long flags; | |
204 | ||
1fa46f1f | 205 | if (!desc || !alloc_cpumask_var(&cpumask, GFP_KERNEL)) |
cd7eab44 BH |
206 | goto out; |
207 | ||
208 | raw_spin_lock_irqsave(&desc->lock, flags); | |
1fa46f1f TG |
209 | if (irq_move_pending(desc)) |
210 | irq_get_pending(cpumask, desc); | |
cd7eab44 | 211 | else |
1fb0ef31 | 212 | cpumask_copy(cpumask, desc->irq_data.affinity); |
cd7eab44 BH |
213 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
214 | ||
215 | notify->notify(notify, cpumask); | |
216 | ||
217 | free_cpumask_var(cpumask); | |
218 | out: | |
219 | kref_put(¬ify->kref, notify->release); | |
220 | } | |
221 | ||
222 | /** | |
223 | * irq_set_affinity_notifier - control notification of IRQ affinity changes | |
224 | * @irq: Interrupt for which to enable/disable notification | |
225 | * @notify: Context for notification, or %NULL to disable | |
226 | * notification. Function pointers must be initialised; | |
227 | * the other fields will be initialised by this function. | |
228 | * | |
229 | * Must be called in process context. Notification may only be enabled | |
230 | * after the IRQ is allocated and must be disabled before the IRQ is | |
231 | * freed using free_irq(). | |
232 | */ | |
233 | int | |
234 | irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify) | |
235 | { | |
236 | struct irq_desc *desc = irq_to_desc(irq); | |
237 | struct irq_affinity_notify *old_notify; | |
238 | unsigned long flags; | |
239 | ||
240 | /* The release function is promised process context */ | |
241 | might_sleep(); | |
242 | ||
243 | if (!desc) | |
244 | return -EINVAL; | |
245 | ||
246 | /* Complete initialisation of *notify */ | |
247 | if (notify) { | |
248 | notify->irq = irq; | |
249 | kref_init(¬ify->kref); | |
250 | INIT_WORK(¬ify->work, irq_affinity_notify); | |
251 | } | |
252 | ||
253 | raw_spin_lock_irqsave(&desc->lock, flags); | |
254 | old_notify = desc->affinity_notify; | |
255 | desc->affinity_notify = notify; | |
256 | raw_spin_unlock_irqrestore(&desc->lock, flags); | |
257 | ||
258 | if (old_notify) | |
259 | kref_put(&old_notify->kref, old_notify->release); | |
260 | ||
261 | return 0; | |
262 | } | |
263 | EXPORT_SYMBOL_GPL(irq_set_affinity_notifier); | |
264 | ||
18404756 MK |
265 | #ifndef CONFIG_AUTO_IRQ_AFFINITY |
266 | /* | |
267 | * Generic version of the affinity autoselector. | |
268 | */ | |
3b8249e7 TG |
269 | static int |
270 | setup_affinity(unsigned int irq, struct irq_desc *desc, struct cpumask *mask) | |
18404756 | 271 | { |
35e857cb | 272 | struct irq_chip *chip = irq_desc_get_chip(desc); |
569bda8d | 273 | struct cpumask *set = irq_default_affinity; |
3b8249e7 | 274 | int ret; |
569bda8d | 275 | |
b008207c | 276 | /* Excludes PER_CPU and NO_BALANCE interrupts */ |
18404756 MK |
277 | if (!irq_can_set_affinity(irq)) |
278 | return 0; | |
279 | ||
f6d87f4b TG |
280 | /* |
281 | * Preserve an userspace affinity setup, but make sure that | |
282 | * one of the targets is online. | |
283 | */ | |
2bdd1055 | 284 | if (irqd_has_set(&desc->irq_data, IRQD_AFFINITY_SET)) { |
569bda8d TG |
285 | if (cpumask_intersects(desc->irq_data.affinity, |
286 | cpu_online_mask)) | |
287 | set = desc->irq_data.affinity; | |
2bdd1055 TG |
288 | else { |
289 | irq_compat_clr_affinity(desc); | |
290 | irqd_clear(&desc->irq_data, IRQD_AFFINITY_SET); | |
291 | } | |
f6d87f4b | 292 | } |
18404756 | 293 | |
3b8249e7 TG |
294 | cpumask_and(mask, cpu_online_mask, set); |
295 | ret = chip->irq_set_affinity(&desc->irq_data, mask, false); | |
296 | switch (ret) { | |
297 | case IRQ_SET_MASK_OK: | |
298 | cpumask_copy(desc->irq_data.affinity, mask); | |
299 | case IRQ_SET_MASK_OK_NOCOPY: | |
300 | irq_set_thread_affinity(desc); | |
301 | } | |
18404756 MK |
302 | return 0; |
303 | } | |
f6d87f4b | 304 | #else |
3b8249e7 TG |
305 | static inline int |
306 | setup_affinity(unsigned int irq, struct irq_desc *d, struct cpumask *mask) | |
f6d87f4b TG |
307 | { |
308 | return irq_select_affinity(irq); | |
309 | } | |
18404756 MK |
310 | #endif |
311 | ||
f6d87f4b TG |
312 | /* |
313 | * Called when affinity is set via /proc/irq | |
314 | */ | |
3b8249e7 | 315 | int irq_select_affinity_usr(unsigned int irq, struct cpumask *mask) |
f6d87f4b TG |
316 | { |
317 | struct irq_desc *desc = irq_to_desc(irq); | |
318 | unsigned long flags; | |
319 | int ret; | |
320 | ||
239007b8 | 321 | raw_spin_lock_irqsave(&desc->lock, flags); |
3b8249e7 | 322 | ret = setup_affinity(irq, desc, mask); |
239007b8 | 323 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
f6d87f4b TG |
324 | return ret; |
325 | } | |
326 | ||
327 | #else | |
3b8249e7 TG |
328 | static inline int |
329 | setup_affinity(unsigned int irq, struct irq_desc *desc, struct cpumask *mask) | |
f6d87f4b TG |
330 | { |
331 | return 0; | |
332 | } | |
1da177e4 LT |
333 | #endif |
334 | ||
0a0c5168 RW |
335 | void __disable_irq(struct irq_desc *desc, unsigned int irq, bool suspend) |
336 | { | |
337 | if (suspend) { | |
685fd0b4 | 338 | if (!desc->action || (desc->action->flags & IRQF_NO_SUSPEND)) |
0a0c5168 | 339 | return; |
c531e836 | 340 | desc->istate |= IRQS_SUSPENDED; |
0a0c5168 RW |
341 | } |
342 | ||
3aae994f | 343 | if (!desc->depth++) |
87923470 | 344 | irq_disable(desc); |
0a0c5168 RW |
345 | } |
346 | ||
02725e74 TG |
347 | static int __disable_irq_nosync(unsigned int irq) |
348 | { | |
349 | unsigned long flags; | |
350 | struct irq_desc *desc = irq_get_desc_buslock(irq, &flags); | |
351 | ||
352 | if (!desc) | |
353 | return -EINVAL; | |
354 | __disable_irq(desc, irq, false); | |
355 | irq_put_desc_busunlock(desc, flags); | |
356 | return 0; | |
357 | } | |
358 | ||
1da177e4 LT |
359 | /** |
360 | * disable_irq_nosync - disable an irq without waiting | |
361 | * @irq: Interrupt to disable | |
362 | * | |
363 | * Disable the selected interrupt line. Disables and Enables are | |
364 | * nested. | |
365 | * Unlike disable_irq(), this function does not ensure existing | |
366 | * instances of the IRQ handler have completed before returning. | |
367 | * | |
368 | * This function may be called from IRQ context. | |
369 | */ | |
370 | void disable_irq_nosync(unsigned int irq) | |
371 | { | |
02725e74 | 372 | __disable_irq_nosync(irq); |
1da177e4 | 373 | } |
1da177e4 LT |
374 | EXPORT_SYMBOL(disable_irq_nosync); |
375 | ||
376 | /** | |
377 | * disable_irq - disable an irq and wait for completion | |
378 | * @irq: Interrupt to disable | |
379 | * | |
380 | * Disable the selected interrupt line. Enables and Disables are | |
381 | * nested. | |
382 | * This function waits for any pending IRQ handlers for this interrupt | |
383 | * to complete before returning. If you use this function while | |
384 | * holding a resource the IRQ handler may need you will deadlock. | |
385 | * | |
386 | * This function may be called - with care - from IRQ context. | |
387 | */ | |
388 | void disable_irq(unsigned int irq) | |
389 | { | |
02725e74 | 390 | if (!__disable_irq_nosync(irq)) |
1da177e4 LT |
391 | synchronize_irq(irq); |
392 | } | |
1da177e4 LT |
393 | EXPORT_SYMBOL(disable_irq); |
394 | ||
0a0c5168 | 395 | void __enable_irq(struct irq_desc *desc, unsigned int irq, bool resume) |
1adb0850 | 396 | { |
dc5f219e | 397 | if (resume) { |
c531e836 | 398 | if (!(desc->istate & IRQS_SUSPENDED)) { |
dc5f219e TG |
399 | if (!desc->action) |
400 | return; | |
401 | if (!(desc->action->flags & IRQF_FORCE_RESUME)) | |
402 | return; | |
403 | /* Pretend that it got disabled ! */ | |
404 | desc->depth++; | |
405 | } | |
c531e836 | 406 | desc->istate &= ~IRQS_SUSPENDED; |
dc5f219e | 407 | } |
0a0c5168 | 408 | |
1adb0850 TG |
409 | switch (desc->depth) { |
410 | case 0: | |
0a0c5168 | 411 | err_out: |
b8c512f6 | 412 | WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n", irq); |
1adb0850 TG |
413 | break; |
414 | case 1: { | |
c531e836 | 415 | if (desc->istate & IRQS_SUSPENDED) |
0a0c5168 | 416 | goto err_out; |
1adb0850 | 417 | /* Prevent probing on this irq: */ |
1ccb4e61 | 418 | irq_settings_set_noprobe(desc); |
3aae994f | 419 | irq_enable(desc); |
1adb0850 TG |
420 | check_irq_resend(desc, irq); |
421 | /* fall-through */ | |
422 | } | |
423 | default: | |
424 | desc->depth--; | |
425 | } | |
426 | } | |
427 | ||
1da177e4 LT |
428 | /** |
429 | * enable_irq - enable handling of an irq | |
430 | * @irq: Interrupt to enable | |
431 | * | |
432 | * Undoes the effect of one call to disable_irq(). If this | |
433 | * matches the last disable, processing of interrupts on this | |
434 | * IRQ line is re-enabled. | |
435 | * | |
70aedd24 | 436 | * This function may be called from IRQ context only when |
6b8ff312 | 437 | * desc->irq_data.chip->bus_lock and desc->chip->bus_sync_unlock are NULL ! |
1da177e4 LT |
438 | */ |
439 | void enable_irq(unsigned int irq) | |
440 | { | |
1da177e4 | 441 | unsigned long flags; |
02725e74 | 442 | struct irq_desc *desc = irq_get_desc_buslock(irq, &flags); |
1da177e4 | 443 | |
7d94f7ca | 444 | if (!desc) |
c2b5a251 | 445 | return; |
50f7c032 TG |
446 | if (WARN(!desc->irq_data.chip, |
447 | KERN_ERR "enable_irq before setup/request_irq: irq %u\n", irq)) | |
02725e74 | 448 | goto out; |
2656c366 | 449 | |
0a0c5168 | 450 | __enable_irq(desc, irq, false); |
02725e74 TG |
451 | out: |
452 | irq_put_desc_busunlock(desc, flags); | |
1da177e4 | 453 | } |
1da177e4 LT |
454 | EXPORT_SYMBOL(enable_irq); |
455 | ||
0c5d1eb7 | 456 | static int set_irq_wake_real(unsigned int irq, unsigned int on) |
2db87321 | 457 | { |
08678b08 | 458 | struct irq_desc *desc = irq_to_desc(irq); |
2db87321 UKK |
459 | int ret = -ENXIO; |
460 | ||
2f7e99bb TG |
461 | if (desc->irq_data.chip->irq_set_wake) |
462 | ret = desc->irq_data.chip->irq_set_wake(&desc->irq_data, on); | |
2db87321 UKK |
463 | |
464 | return ret; | |
465 | } | |
466 | ||
ba9a2331 | 467 | /** |
a0cd9ca2 | 468 | * irq_set_irq_wake - control irq power management wakeup |
ba9a2331 TG |
469 | * @irq: interrupt to control |
470 | * @on: enable/disable power management wakeup | |
471 | * | |
15a647eb DB |
472 | * Enable/disable power management wakeup mode, which is |
473 | * disabled by default. Enables and disables must match, | |
474 | * just as they match for non-wakeup mode support. | |
475 | * | |
476 | * Wakeup mode lets this IRQ wake the system from sleep | |
477 | * states like "suspend to RAM". | |
ba9a2331 | 478 | */ |
a0cd9ca2 | 479 | int irq_set_irq_wake(unsigned int irq, unsigned int on) |
ba9a2331 | 480 | { |
ba9a2331 | 481 | unsigned long flags; |
02725e74 | 482 | struct irq_desc *desc = irq_get_desc_buslock(irq, &flags); |
2db87321 | 483 | int ret = 0; |
ba9a2331 | 484 | |
15a647eb DB |
485 | /* wakeup-capable irqs can be shared between drivers that |
486 | * don't need to have the same sleep mode behaviors. | |
487 | */ | |
15a647eb | 488 | if (on) { |
2db87321 UKK |
489 | if (desc->wake_depth++ == 0) { |
490 | ret = set_irq_wake_real(irq, on); | |
491 | if (ret) | |
492 | desc->wake_depth = 0; | |
493 | else | |
7f94226f | 494 | irqd_set(&desc->irq_data, IRQD_WAKEUP_STATE); |
2db87321 | 495 | } |
15a647eb DB |
496 | } else { |
497 | if (desc->wake_depth == 0) { | |
7a2c4770 | 498 | WARN(1, "Unbalanced IRQ %d wake disable\n", irq); |
2db87321 UKK |
499 | } else if (--desc->wake_depth == 0) { |
500 | ret = set_irq_wake_real(irq, on); | |
501 | if (ret) | |
502 | desc->wake_depth = 1; | |
503 | else | |
7f94226f | 504 | irqd_clear(&desc->irq_data, IRQD_WAKEUP_STATE); |
2db87321 | 505 | } |
15a647eb | 506 | } |
02725e74 | 507 | irq_put_desc_busunlock(desc, flags); |
ba9a2331 TG |
508 | return ret; |
509 | } | |
a0cd9ca2 | 510 | EXPORT_SYMBOL(irq_set_irq_wake); |
ba9a2331 | 511 | |
1da177e4 LT |
512 | /* |
513 | * Internal function that tells the architecture code whether a | |
514 | * particular irq has been exclusively allocated or is available | |
515 | * for driver use. | |
516 | */ | |
517 | int can_request_irq(unsigned int irq, unsigned long irqflags) | |
518 | { | |
cc8c3b78 | 519 | unsigned long flags; |
02725e74 TG |
520 | struct irq_desc *desc = irq_get_desc_lock(irq, &flags); |
521 | int canrequest = 0; | |
1da177e4 | 522 | |
7d94f7ca YL |
523 | if (!desc) |
524 | return 0; | |
525 | ||
02725e74 TG |
526 | if (irq_settings_can_request(desc)) { |
527 | if (desc->action) | |
528 | if (irqflags & desc->action->flags & IRQF_SHARED) | |
529 | canrequest =1; | |
530 | } | |
531 | irq_put_desc_unlock(desc, flags); | |
532 | return canrequest; | |
1da177e4 LT |
533 | } |
534 | ||
0c5d1eb7 | 535 | int __irq_set_trigger(struct irq_desc *desc, unsigned int irq, |
b2ba2c30 | 536 | unsigned long flags) |
82736f4d | 537 | { |
6b8ff312 | 538 | struct irq_chip *chip = desc->irq_data.chip; |
d4d5e089 | 539 | int ret, unmask = 0; |
82736f4d | 540 | |
b2ba2c30 | 541 | if (!chip || !chip->irq_set_type) { |
82736f4d UKK |
542 | /* |
543 | * IRQF_TRIGGER_* but the PIC does not support multiple | |
544 | * flow-types? | |
545 | */ | |
3ff68a6a | 546 | pr_debug("No set_type function for IRQ %d (%s)\n", irq, |
82736f4d UKK |
547 | chip ? (chip->name ? : "unknown") : "unknown"); |
548 | return 0; | |
549 | } | |
550 | ||
876dbd4c | 551 | flags &= IRQ_TYPE_SENSE_MASK; |
d4d5e089 TG |
552 | |
553 | if (chip->flags & IRQCHIP_SET_TYPE_MASKED) { | |
554 | if (!(desc->istate & IRQS_MASKED)) | |
555 | mask_irq(desc); | |
556 | if (!(desc->istate & IRQS_DISABLED)) | |
557 | unmask = 1; | |
558 | } | |
559 | ||
f2b662da | 560 | /* caller masked out all except trigger mode flags */ |
b2ba2c30 | 561 | ret = chip->irq_set_type(&desc->irq_data, flags); |
82736f4d | 562 | |
876dbd4c TG |
563 | switch (ret) { |
564 | case IRQ_SET_MASK_OK: | |
565 | irqd_clear(&desc->irq_data, IRQD_TRIGGER_MASK); | |
566 | irqd_set(&desc->irq_data, flags); | |
567 | ||
568 | case IRQ_SET_MASK_OK_NOCOPY: | |
569 | flags = irqd_get_trigger_type(&desc->irq_data); | |
570 | irq_settings_set_trigger_mask(desc, flags); | |
571 | irqd_clear(&desc->irq_data, IRQD_LEVEL); | |
572 | irq_settings_clr_level(desc); | |
573 | if (flags & IRQ_TYPE_LEVEL_MASK) { | |
574 | irq_settings_set_level(desc); | |
575 | irqd_set(&desc->irq_data, IRQD_LEVEL); | |
576 | } | |
46732475 | 577 | |
6b8ff312 TG |
578 | if (chip != desc->irq_data.chip) |
579 | irq_chip_set_defaults(desc->irq_data.chip); | |
d4d5e089 | 580 | ret = 0; |
8fff39e0 | 581 | break; |
876dbd4c TG |
582 | default: |
583 | pr_err("setting trigger mode %lu for irq %u failed (%pF)\n", | |
584 | flags, irq, chip->irq_set_type); | |
0c5d1eb7 | 585 | } |
d4d5e089 TG |
586 | if (unmask) |
587 | unmask_irq(desc); | |
82736f4d UKK |
588 | return ret; |
589 | } | |
590 | ||
b25c340c TG |
591 | /* |
592 | * Default primary interrupt handler for threaded interrupts. Is | |
593 | * assigned as primary handler when request_threaded_irq is called | |
594 | * with handler == NULL. Useful for oneshot interrupts. | |
595 | */ | |
596 | static irqreturn_t irq_default_primary_handler(int irq, void *dev_id) | |
597 | { | |
598 | return IRQ_WAKE_THREAD; | |
599 | } | |
600 | ||
399b5da2 TG |
601 | /* |
602 | * Primary handler for nested threaded interrupts. Should never be | |
603 | * called. | |
604 | */ | |
605 | static irqreturn_t irq_nested_primary_handler(int irq, void *dev_id) | |
606 | { | |
607 | WARN(1, "Primary handler called for nested irq %d\n", irq); | |
608 | return IRQ_NONE; | |
609 | } | |
610 | ||
3aa551c9 TG |
611 | static int irq_wait_for_interrupt(struct irqaction *action) |
612 | { | |
613 | while (!kthread_should_stop()) { | |
614 | set_current_state(TASK_INTERRUPTIBLE); | |
f48fe81e TG |
615 | |
616 | if (test_and_clear_bit(IRQTF_RUNTHREAD, | |
617 | &action->thread_flags)) { | |
3aa551c9 TG |
618 | __set_current_state(TASK_RUNNING); |
619 | return 0; | |
f48fe81e TG |
620 | } |
621 | schedule(); | |
3aa551c9 TG |
622 | } |
623 | return -1; | |
624 | } | |
625 | ||
b25c340c TG |
626 | /* |
627 | * Oneshot interrupts keep the irq line masked until the threaded | |
628 | * handler finished. unmask if the interrupt has not been disabled and | |
629 | * is marked MASKED. | |
630 | */ | |
b5faba21 TG |
631 | static void irq_finalize_oneshot(struct irq_desc *desc, |
632 | struct irqaction *action, bool force) | |
b25c340c | 633 | { |
b5faba21 TG |
634 | if (!(desc->istate & IRQS_ONESHOT)) |
635 | return; | |
0b1adaa0 | 636 | again: |
3876ec9e | 637 | chip_bus_lock(desc); |
239007b8 | 638 | raw_spin_lock_irq(&desc->lock); |
0b1adaa0 TG |
639 | |
640 | /* | |
641 | * Implausible though it may be we need to protect us against | |
642 | * the following scenario: | |
643 | * | |
644 | * The thread is faster done than the hard interrupt handler | |
645 | * on the other CPU. If we unmask the irq line then the | |
646 | * interrupt can come in again and masks the line, leaves due | |
009b4c3b | 647 | * to IRQS_INPROGRESS and the irq line is masked forever. |
b5faba21 TG |
648 | * |
649 | * This also serializes the state of shared oneshot handlers | |
650 | * versus "desc->threads_onehsot |= action->thread_mask;" in | |
651 | * irq_wake_thread(). See the comment there which explains the | |
652 | * serialization. | |
0b1adaa0 | 653 | */ |
009b4c3b | 654 | if (unlikely(desc->istate & IRQS_INPROGRESS)) { |
0b1adaa0 | 655 | raw_spin_unlock_irq(&desc->lock); |
3876ec9e | 656 | chip_bus_sync_unlock(desc); |
0b1adaa0 TG |
657 | cpu_relax(); |
658 | goto again; | |
659 | } | |
660 | ||
b5faba21 TG |
661 | /* |
662 | * Now check again, whether the thread should run. Otherwise | |
663 | * we would clear the threads_oneshot bit of this thread which | |
664 | * was just set. | |
665 | */ | |
666 | if (!force && test_bit(IRQTF_RUNTHREAD, &action->thread_flags)) | |
667 | goto out_unlock; | |
668 | ||
669 | desc->threads_oneshot &= ~action->thread_mask; | |
670 | ||
671 | if (!desc->threads_oneshot && !(desc->istate & IRQS_DISABLED) && | |
672 | (desc->istate & IRQS_MASKED)) { | |
6e40262e TG |
673 | irq_compat_clr_masked(desc); |
674 | desc->istate &= ~IRQS_MASKED; | |
0eda58b7 | 675 | desc->irq_data.chip->irq_unmask(&desc->irq_data); |
b25c340c | 676 | } |
b5faba21 | 677 | out_unlock: |
239007b8 | 678 | raw_spin_unlock_irq(&desc->lock); |
3876ec9e | 679 | chip_bus_sync_unlock(desc); |
b25c340c TG |
680 | } |
681 | ||
61f38261 | 682 | #ifdef CONFIG_SMP |
591d2fb0 | 683 | /* |
d4d5e089 | 684 | * Check whether we need to chasnge the affinity of the interrupt thread. |
591d2fb0 TG |
685 | */ |
686 | static void | |
687 | irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) | |
688 | { | |
689 | cpumask_var_t mask; | |
690 | ||
691 | if (!test_and_clear_bit(IRQTF_AFFINITY, &action->thread_flags)) | |
692 | return; | |
693 | ||
694 | /* | |
695 | * In case we are out of memory we set IRQTF_AFFINITY again and | |
696 | * try again next time | |
697 | */ | |
698 | if (!alloc_cpumask_var(&mask, GFP_KERNEL)) { | |
699 | set_bit(IRQTF_AFFINITY, &action->thread_flags); | |
700 | return; | |
701 | } | |
702 | ||
239007b8 | 703 | raw_spin_lock_irq(&desc->lock); |
6b8ff312 | 704 | cpumask_copy(mask, desc->irq_data.affinity); |
239007b8 | 705 | raw_spin_unlock_irq(&desc->lock); |
591d2fb0 TG |
706 | |
707 | set_cpus_allowed_ptr(current, mask); | |
708 | free_cpumask_var(mask); | |
709 | } | |
61f38261 BP |
710 | #else |
711 | static inline void | |
712 | irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) { } | |
713 | #endif | |
591d2fb0 | 714 | |
8d32a307 TG |
715 | /* |
716 | * Interrupts which are not explicitely requested as threaded | |
717 | * interrupts rely on the implicit bh/preempt disable of the hard irq | |
718 | * context. So we need to disable bh here to avoid deadlocks and other | |
719 | * side effects. | |
720 | */ | |
721 | static void | |
722 | irq_forced_thread_fn(struct irq_desc *desc, struct irqaction *action) | |
723 | { | |
724 | local_bh_disable(); | |
725 | action->thread_fn(action->irq, action->dev_id); | |
726 | irq_finalize_oneshot(desc, action, false); | |
727 | local_bh_enable(); | |
728 | } | |
729 | ||
730 | /* | |
731 | * Interrupts explicitely requested as threaded interupts want to be | |
732 | * preemtible - many of them need to sleep and wait for slow busses to | |
733 | * complete. | |
734 | */ | |
735 | static void irq_thread_fn(struct irq_desc *desc, struct irqaction *action) | |
736 | { | |
737 | action->thread_fn(action->irq, action->dev_id); | |
738 | irq_finalize_oneshot(desc, action, false); | |
739 | } | |
740 | ||
3aa551c9 TG |
741 | /* |
742 | * Interrupt handler thread | |
743 | */ | |
744 | static int irq_thread(void *data) | |
745 | { | |
c9b5f501 | 746 | static const struct sched_param param = { |
fe7de49f KM |
747 | .sched_priority = MAX_USER_RT_PRIO/2, |
748 | }; | |
3aa551c9 TG |
749 | struct irqaction *action = data; |
750 | struct irq_desc *desc = irq_to_desc(action->irq); | |
8d32a307 | 751 | void (*handler_fn)(struct irq_desc *desc, struct irqaction *action); |
b5faba21 | 752 | int wake; |
3aa551c9 | 753 | |
8d32a307 TG |
754 | if (force_irqthreads & test_bit(IRQTF_FORCED_THREAD, |
755 | &action->thread_flags)) | |
756 | handler_fn = irq_forced_thread_fn; | |
757 | else | |
758 | handler_fn = irq_thread_fn; | |
759 | ||
3aa551c9 TG |
760 | sched_setscheduler(current, SCHED_FIFO, ¶m); |
761 | current->irqaction = action; | |
762 | ||
763 | while (!irq_wait_for_interrupt(action)) { | |
764 | ||
591d2fb0 TG |
765 | irq_thread_check_affinity(desc, action); |
766 | ||
3aa551c9 TG |
767 | atomic_inc(&desc->threads_active); |
768 | ||
239007b8 | 769 | raw_spin_lock_irq(&desc->lock); |
c1594b77 | 770 | if (unlikely(desc->istate & IRQS_DISABLED)) { |
3aa551c9 TG |
771 | /* |
772 | * CHECKME: We might need a dedicated | |
773 | * IRQ_THREAD_PENDING flag here, which | |
774 | * retriggers the thread in check_irq_resend() | |
2a0d6fb3 | 775 | * but AFAICT IRQS_PENDING should be fine as it |
3aa551c9 TG |
776 | * retriggers the interrupt itself --- tglx |
777 | */ | |
2a0d6fb3 TG |
778 | irq_compat_set_pending(desc); |
779 | desc->istate |= IRQS_PENDING; | |
239007b8 | 780 | raw_spin_unlock_irq(&desc->lock); |
3aa551c9 | 781 | } else { |
239007b8 | 782 | raw_spin_unlock_irq(&desc->lock); |
8d32a307 | 783 | handler_fn(desc, action); |
3aa551c9 TG |
784 | } |
785 | ||
786 | wake = atomic_dec_and_test(&desc->threads_active); | |
787 | ||
788 | if (wake && waitqueue_active(&desc->wait_for_threads)) | |
789 | wake_up(&desc->wait_for_threads); | |
790 | } | |
791 | ||
b5faba21 TG |
792 | /* Prevent a stale desc->threads_oneshot */ |
793 | irq_finalize_oneshot(desc, action, true); | |
794 | ||
3aa551c9 TG |
795 | /* |
796 | * Clear irqaction. Otherwise exit_irq_thread() would make | |
797 | * fuzz about an active irq thread going into nirvana. | |
798 | */ | |
799 | current->irqaction = NULL; | |
800 | return 0; | |
801 | } | |
802 | ||
803 | /* | |
804 | * Called from do_exit() | |
805 | */ | |
806 | void exit_irq_thread(void) | |
807 | { | |
808 | struct task_struct *tsk = current; | |
b5faba21 | 809 | struct irq_desc *desc; |
3aa551c9 TG |
810 | |
811 | if (!tsk->irqaction) | |
812 | return; | |
813 | ||
814 | printk(KERN_ERR | |
815 | "exiting task \"%s\" (%d) is an active IRQ thread (irq %d)\n", | |
816 | tsk->comm ? tsk->comm : "", tsk->pid, tsk->irqaction->irq); | |
817 | ||
b5faba21 TG |
818 | desc = irq_to_desc(tsk->irqaction->irq); |
819 | ||
820 | /* | |
821 | * Prevent a stale desc->threads_oneshot. Must be called | |
822 | * before setting the IRQTF_DIED flag. | |
823 | */ | |
824 | irq_finalize_oneshot(desc, tsk->irqaction, true); | |
825 | ||
3aa551c9 TG |
826 | /* |
827 | * Set the THREAD DIED flag to prevent further wakeups of the | |
828 | * soon to be gone threaded handler. | |
829 | */ | |
830 | set_bit(IRQTF_DIED, &tsk->irqaction->flags); | |
831 | } | |
832 | ||
8d32a307 TG |
833 | static void irq_setup_forced_threading(struct irqaction *new) |
834 | { | |
835 | if (!force_irqthreads) | |
836 | return; | |
837 | if (new->flags & (IRQF_NO_THREAD | IRQF_PERCPU | IRQF_ONESHOT)) | |
838 | return; | |
839 | ||
840 | new->flags |= IRQF_ONESHOT; | |
841 | ||
842 | if (!new->thread_fn) { | |
843 | set_bit(IRQTF_FORCED_THREAD, &new->thread_flags); | |
844 | new->thread_fn = new->handler; | |
845 | new->handler = irq_default_primary_handler; | |
846 | } | |
847 | } | |
848 | ||
1da177e4 LT |
849 | /* |
850 | * Internal function to register an irqaction - typically used to | |
851 | * allocate special interrupts that are part of the architecture. | |
852 | */ | |
d3c60047 | 853 | static int |
327ec569 | 854 | __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new) |
1da177e4 | 855 | { |
f17c7545 | 856 | struct irqaction *old, **old_ptr; |
8b126b77 | 857 | const char *old_name = NULL; |
b5faba21 | 858 | unsigned long flags, thread_mask = 0; |
3b8249e7 TG |
859 | int ret, nested, shared = 0; |
860 | cpumask_var_t mask; | |
1da177e4 | 861 | |
7d94f7ca | 862 | if (!desc) |
c2b5a251 MW |
863 | return -EINVAL; |
864 | ||
6b8ff312 | 865 | if (desc->irq_data.chip == &no_irq_chip) |
1da177e4 LT |
866 | return -ENOSYS; |
867 | /* | |
868 | * Some drivers like serial.c use request_irq() heavily, | |
869 | * so we have to be careful not to interfere with a | |
870 | * running system. | |
871 | */ | |
3cca53b0 | 872 | if (new->flags & IRQF_SAMPLE_RANDOM) { |
1da177e4 LT |
873 | /* |
874 | * This function might sleep, we want to call it first, | |
875 | * outside of the atomic block. | |
876 | * Yes, this might clear the entropy pool if the wrong | |
877 | * driver is attempted to be loaded, without actually | |
878 | * installing a new handler, but is this really a problem, | |
879 | * only the sysadmin is able to do this. | |
880 | */ | |
881 | rand_initialize_irq(irq); | |
882 | } | |
883 | ||
3aa551c9 | 884 | /* |
399b5da2 TG |
885 | * Check whether the interrupt nests into another interrupt |
886 | * thread. | |
887 | */ | |
1ccb4e61 | 888 | nested = irq_settings_is_nested_thread(desc); |
399b5da2 TG |
889 | if (nested) { |
890 | if (!new->thread_fn) | |
891 | return -EINVAL; | |
892 | /* | |
893 | * Replace the primary handler which was provided from | |
894 | * the driver for non nested interrupt handling by the | |
895 | * dummy function which warns when called. | |
896 | */ | |
897 | new->handler = irq_nested_primary_handler; | |
8d32a307 TG |
898 | } else { |
899 | irq_setup_forced_threading(new); | |
399b5da2 TG |
900 | } |
901 | ||
3aa551c9 | 902 | /* |
399b5da2 TG |
903 | * Create a handler thread when a thread function is supplied |
904 | * and the interrupt does not nest into another interrupt | |
905 | * thread. | |
3aa551c9 | 906 | */ |
399b5da2 | 907 | if (new->thread_fn && !nested) { |
3aa551c9 TG |
908 | struct task_struct *t; |
909 | ||
910 | t = kthread_create(irq_thread, new, "irq/%d-%s", irq, | |
911 | new->name); | |
912 | if (IS_ERR(t)) | |
913 | return PTR_ERR(t); | |
914 | /* | |
915 | * We keep the reference to the task struct even if | |
916 | * the thread dies to avoid that the interrupt code | |
917 | * references an already freed task_struct. | |
918 | */ | |
919 | get_task_struct(t); | |
920 | new->thread = t; | |
3aa551c9 TG |
921 | } |
922 | ||
3b8249e7 TG |
923 | if (!alloc_cpumask_var(&mask, GFP_KERNEL)) { |
924 | ret = -ENOMEM; | |
925 | goto out_thread; | |
926 | } | |
927 | ||
1da177e4 LT |
928 | /* |
929 | * The following block of code has to be executed atomically | |
930 | */ | |
239007b8 | 931 | raw_spin_lock_irqsave(&desc->lock, flags); |
f17c7545 IM |
932 | old_ptr = &desc->action; |
933 | old = *old_ptr; | |
06fcb0c6 | 934 | if (old) { |
e76de9f8 TG |
935 | /* |
936 | * Can't share interrupts unless both agree to and are | |
937 | * the same type (level, edge, polarity). So both flag | |
3cca53b0 | 938 | * fields must have IRQF_SHARED set and the bits which |
9d591edd TG |
939 | * set the trigger type must match. Also all must |
940 | * agree on ONESHOT. | |
e76de9f8 | 941 | */ |
3cca53b0 | 942 | if (!((old->flags & new->flags) & IRQF_SHARED) || |
9d591edd TG |
943 | ((old->flags ^ new->flags) & IRQF_TRIGGER_MASK) || |
944 | ((old->flags ^ new->flags) & IRQF_ONESHOT)) { | |
8b126b77 | 945 | old_name = old->name; |
f5163427 | 946 | goto mismatch; |
8b126b77 | 947 | } |
f5163427 | 948 | |
f5163427 | 949 | /* All handlers must agree on per-cpuness */ |
3cca53b0 TG |
950 | if ((old->flags & IRQF_PERCPU) != |
951 | (new->flags & IRQF_PERCPU)) | |
f5163427 | 952 | goto mismatch; |
1da177e4 LT |
953 | |
954 | /* add new interrupt at end of irq queue */ | |
955 | do { | |
b5faba21 | 956 | thread_mask |= old->thread_mask; |
f17c7545 IM |
957 | old_ptr = &old->next; |
958 | old = *old_ptr; | |
1da177e4 LT |
959 | } while (old); |
960 | shared = 1; | |
961 | } | |
962 | ||
b5faba21 TG |
963 | /* |
964 | * Setup the thread mask for this irqaction. Unlikely to have | |
965 | * 32 resp 64 irqs sharing one line, but who knows. | |
966 | */ | |
967 | if (new->flags & IRQF_ONESHOT && thread_mask == ~0UL) { | |
968 | ret = -EBUSY; | |
969 | goto out_mask; | |
970 | } | |
971 | new->thread_mask = 1 << ffz(thread_mask); | |
972 | ||
1da177e4 | 973 | if (!shared) { |
6b8ff312 | 974 | irq_chip_set_defaults(desc->irq_data.chip); |
e76de9f8 | 975 | |
3aa551c9 TG |
976 | init_waitqueue_head(&desc->wait_for_threads); |
977 | ||
e76de9f8 | 978 | /* Setup the type (level, edge polarity) if configured: */ |
3cca53b0 | 979 | if (new->flags & IRQF_TRIGGER_MASK) { |
f2b662da DB |
980 | ret = __irq_set_trigger(desc, irq, |
981 | new->flags & IRQF_TRIGGER_MASK); | |
82736f4d | 982 | |
3aa551c9 | 983 | if (ret) |
3b8249e7 | 984 | goto out_mask; |
091738a2 | 985 | } |
6a6de9ef | 986 | |
009b4c3b | 987 | desc->istate &= ~(IRQS_AUTODETECT | IRQS_SPURIOUS_DISABLED | \ |
163ef309 TG |
988 | IRQS_INPROGRESS | IRQS_ONESHOT | \ |
989 | IRQS_WAITING); | |
94d39e1f | 990 | |
a005677b TG |
991 | if (new->flags & IRQF_PERCPU) { |
992 | irqd_set(&desc->irq_data, IRQD_PER_CPU); | |
993 | irq_settings_set_per_cpu(desc); | |
994 | } | |
6a58fb3b | 995 | |
b25c340c | 996 | if (new->flags & IRQF_ONESHOT) |
3d67baec | 997 | desc->istate |= IRQS_ONESHOT; |
b25c340c | 998 | |
1ccb4e61 | 999 | if (irq_settings_can_autoenable(desc)) |
46999238 TG |
1000 | irq_startup(desc); |
1001 | else | |
e76de9f8 TG |
1002 | /* Undo nested disables: */ |
1003 | desc->depth = 1; | |
18404756 | 1004 | |
612e3684 | 1005 | /* Exclude IRQ from balancing if requested */ |
a005677b TG |
1006 | if (new->flags & IRQF_NOBALANCING) { |
1007 | irq_settings_set_no_balancing(desc); | |
1008 | irqd_set(&desc->irq_data, IRQD_NO_BALANCING); | |
1009 | } | |
612e3684 | 1010 | |
18404756 | 1011 | /* Set default affinity mask once everything is setup */ |
3b8249e7 | 1012 | setup_affinity(irq, desc, mask); |
0c5d1eb7 | 1013 | |
876dbd4c TG |
1014 | } else if (new->flags & IRQF_TRIGGER_MASK) { |
1015 | unsigned int nmsk = new->flags & IRQF_TRIGGER_MASK; | |
1016 | unsigned int omsk = irq_settings_get_trigger_mask(desc); | |
1017 | ||
1018 | if (nmsk != omsk) | |
1019 | /* hope the handler works with current trigger mode */ | |
1020 | pr_warning("IRQ %d uses trigger mode %u; requested %u\n", | |
1021 | irq, nmsk, omsk); | |
1da177e4 | 1022 | } |
82736f4d | 1023 | |
69ab8494 | 1024 | new->irq = irq; |
f17c7545 | 1025 | *old_ptr = new; |
82736f4d | 1026 | |
8528b0f1 LT |
1027 | /* Reset broken irq detection when installing new handler */ |
1028 | desc->irq_count = 0; | |
1029 | desc->irqs_unhandled = 0; | |
1adb0850 TG |
1030 | |
1031 | /* | |
1032 | * Check whether we disabled the irq via the spurious handler | |
1033 | * before. Reenable it and give it another chance. | |
1034 | */ | |
7acdd53e TG |
1035 | if (shared && (desc->istate & IRQS_SPURIOUS_DISABLED)) { |
1036 | desc->istate &= ~IRQS_SPURIOUS_DISABLED; | |
0a0c5168 | 1037 | __enable_irq(desc, irq, false); |
1adb0850 TG |
1038 | } |
1039 | ||
239007b8 | 1040 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 | 1041 | |
69ab8494 TG |
1042 | /* |
1043 | * Strictly no need to wake it up, but hung_task complains | |
1044 | * when no hard interrupt wakes the thread up. | |
1045 | */ | |
1046 | if (new->thread) | |
1047 | wake_up_process(new->thread); | |
1048 | ||
2c6927a3 | 1049 | register_irq_proc(irq, desc); |
1da177e4 LT |
1050 | new->dir = NULL; |
1051 | register_handler_proc(irq, new); | |
1052 | ||
1053 | return 0; | |
f5163427 DS |
1054 | |
1055 | mismatch: | |
3f050447 | 1056 | #ifdef CONFIG_DEBUG_SHIRQ |
3cca53b0 | 1057 | if (!(new->flags & IRQF_PROBE_SHARED)) { |
e8c4b9d0 | 1058 | printk(KERN_ERR "IRQ handler type mismatch for IRQ %d\n", irq); |
8b126b77 AM |
1059 | if (old_name) |
1060 | printk(KERN_ERR "current handler: %s\n", old_name); | |
13e87ec6 AM |
1061 | dump_stack(); |
1062 | } | |
3f050447 | 1063 | #endif |
3aa551c9 TG |
1064 | ret = -EBUSY; |
1065 | ||
3b8249e7 TG |
1066 | out_mask: |
1067 | free_cpumask_var(mask); | |
1068 | ||
3aa551c9 | 1069 | out_thread: |
239007b8 | 1070 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
3aa551c9 TG |
1071 | if (new->thread) { |
1072 | struct task_struct *t = new->thread; | |
1073 | ||
1074 | new->thread = NULL; | |
1075 | if (likely(!test_bit(IRQTF_DIED, &new->thread_flags))) | |
1076 | kthread_stop(t); | |
1077 | put_task_struct(t); | |
1078 | } | |
1079 | return ret; | |
1da177e4 LT |
1080 | } |
1081 | ||
d3c60047 TG |
1082 | /** |
1083 | * setup_irq - setup an interrupt | |
1084 | * @irq: Interrupt line to setup | |
1085 | * @act: irqaction for the interrupt | |
1086 | * | |
1087 | * Used to statically setup interrupts in the early boot process. | |
1088 | */ | |
1089 | int setup_irq(unsigned int irq, struct irqaction *act) | |
1090 | { | |
986c011d | 1091 | int retval; |
d3c60047 TG |
1092 | struct irq_desc *desc = irq_to_desc(irq); |
1093 | ||
986c011d DD |
1094 | chip_bus_lock(desc); |
1095 | retval = __setup_irq(irq, desc, act); | |
1096 | chip_bus_sync_unlock(desc); | |
1097 | ||
1098 | return retval; | |
d3c60047 | 1099 | } |
eb53b4e8 | 1100 | EXPORT_SYMBOL_GPL(setup_irq); |
d3c60047 | 1101 | |
cbf94f06 MD |
1102 | /* |
1103 | * Internal function to unregister an irqaction - used to free | |
1104 | * regular and special interrupts that are part of the architecture. | |
1da177e4 | 1105 | */ |
cbf94f06 | 1106 | static struct irqaction *__free_irq(unsigned int irq, void *dev_id) |
1da177e4 | 1107 | { |
d3c60047 | 1108 | struct irq_desc *desc = irq_to_desc(irq); |
f17c7545 | 1109 | struct irqaction *action, **action_ptr; |
1da177e4 LT |
1110 | unsigned long flags; |
1111 | ||
ae88a23b | 1112 | WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq); |
7d94f7ca | 1113 | |
7d94f7ca | 1114 | if (!desc) |
f21cfb25 | 1115 | return NULL; |
1da177e4 | 1116 | |
239007b8 | 1117 | raw_spin_lock_irqsave(&desc->lock, flags); |
ae88a23b IM |
1118 | |
1119 | /* | |
1120 | * There can be multiple actions per IRQ descriptor, find the right | |
1121 | * one based on the dev_id: | |
1122 | */ | |
f17c7545 | 1123 | action_ptr = &desc->action; |
1da177e4 | 1124 | for (;;) { |
f17c7545 | 1125 | action = *action_ptr; |
1da177e4 | 1126 | |
ae88a23b IM |
1127 | if (!action) { |
1128 | WARN(1, "Trying to free already-free IRQ %d\n", irq); | |
239007b8 | 1129 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 | 1130 | |
f21cfb25 | 1131 | return NULL; |
ae88a23b | 1132 | } |
1da177e4 | 1133 | |
8316e381 IM |
1134 | if (action->dev_id == dev_id) |
1135 | break; | |
f17c7545 | 1136 | action_ptr = &action->next; |
ae88a23b | 1137 | } |
dbce706e | 1138 | |
ae88a23b | 1139 | /* Found it - now remove it from the list of entries: */ |
f17c7545 | 1140 | *action_ptr = action->next; |
ae88a23b IM |
1141 | |
1142 | /* Currently used only by UML, might disappear one day: */ | |
b77d6adc | 1143 | #ifdef CONFIG_IRQ_RELEASE_METHOD |
6b8ff312 TG |
1144 | if (desc->irq_data.chip->release) |
1145 | desc->irq_data.chip->release(irq, dev_id); | |
b77d6adc | 1146 | #endif |
dbce706e | 1147 | |
ae88a23b | 1148 | /* If this was the last handler, shut down the IRQ line: */ |
46999238 TG |
1149 | if (!desc->action) |
1150 | irq_shutdown(desc); | |
3aa551c9 | 1151 | |
e7a297b0 PWJ |
1152 | #ifdef CONFIG_SMP |
1153 | /* make sure affinity_hint is cleaned up */ | |
1154 | if (WARN_ON_ONCE(desc->affinity_hint)) | |
1155 | desc->affinity_hint = NULL; | |
1156 | #endif | |
1157 | ||
239007b8 | 1158 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
ae88a23b IM |
1159 | |
1160 | unregister_handler_proc(irq, action); | |
1161 | ||
1162 | /* Make sure it's not being used on another CPU: */ | |
1163 | synchronize_irq(irq); | |
1da177e4 | 1164 | |
70edcd77 | 1165 | #ifdef CONFIG_DEBUG_SHIRQ |
ae88a23b IM |
1166 | /* |
1167 | * It's a shared IRQ -- the driver ought to be prepared for an IRQ | |
1168 | * event to happen even now it's being freed, so let's make sure that | |
1169 | * is so by doing an extra call to the handler .... | |
1170 | * | |
1171 | * ( We do this after actually deregistering it, to make sure that a | |
1172 | * 'real' IRQ doesn't run in * parallel with our fake. ) | |
1173 | */ | |
1174 | if (action->flags & IRQF_SHARED) { | |
1175 | local_irq_save(flags); | |
1176 | action->handler(irq, dev_id); | |
1177 | local_irq_restore(flags); | |
1da177e4 | 1178 | } |
ae88a23b | 1179 | #endif |
2d860ad7 LT |
1180 | |
1181 | if (action->thread) { | |
1182 | if (!test_bit(IRQTF_DIED, &action->thread_flags)) | |
1183 | kthread_stop(action->thread); | |
1184 | put_task_struct(action->thread); | |
1185 | } | |
1186 | ||
f21cfb25 MD |
1187 | return action; |
1188 | } | |
1189 | ||
cbf94f06 MD |
1190 | /** |
1191 | * remove_irq - free an interrupt | |
1192 | * @irq: Interrupt line to free | |
1193 | * @act: irqaction for the interrupt | |
1194 | * | |
1195 | * Used to remove interrupts statically setup by the early boot process. | |
1196 | */ | |
1197 | void remove_irq(unsigned int irq, struct irqaction *act) | |
1198 | { | |
1199 | __free_irq(irq, act->dev_id); | |
1200 | } | |
eb53b4e8 | 1201 | EXPORT_SYMBOL_GPL(remove_irq); |
cbf94f06 | 1202 | |
f21cfb25 MD |
1203 | /** |
1204 | * free_irq - free an interrupt allocated with request_irq | |
1205 | * @irq: Interrupt line to free | |
1206 | * @dev_id: Device identity to free | |
1207 | * | |
1208 | * Remove an interrupt handler. The handler is removed and if the | |
1209 | * interrupt line is no longer in use by any driver it is disabled. | |
1210 | * On a shared IRQ the caller must ensure the interrupt is disabled | |
1211 | * on the card it drives before calling this function. The function | |
1212 | * does not return until any executing interrupts for this IRQ | |
1213 | * have completed. | |
1214 | * | |
1215 | * This function must not be called from interrupt context. | |
1216 | */ | |
1217 | void free_irq(unsigned int irq, void *dev_id) | |
1218 | { | |
70aedd24 TG |
1219 | struct irq_desc *desc = irq_to_desc(irq); |
1220 | ||
1221 | if (!desc) | |
1222 | return; | |
1223 | ||
cd7eab44 BH |
1224 | #ifdef CONFIG_SMP |
1225 | if (WARN_ON(desc->affinity_notify)) | |
1226 | desc->affinity_notify = NULL; | |
1227 | #endif | |
1228 | ||
3876ec9e | 1229 | chip_bus_lock(desc); |
cbf94f06 | 1230 | kfree(__free_irq(irq, dev_id)); |
3876ec9e | 1231 | chip_bus_sync_unlock(desc); |
1da177e4 | 1232 | } |
1da177e4 LT |
1233 | EXPORT_SYMBOL(free_irq); |
1234 | ||
1235 | /** | |
3aa551c9 | 1236 | * request_threaded_irq - allocate an interrupt line |
1da177e4 | 1237 | * @irq: Interrupt line to allocate |
3aa551c9 TG |
1238 | * @handler: Function to be called when the IRQ occurs. |
1239 | * Primary handler for threaded interrupts | |
b25c340c TG |
1240 | * If NULL and thread_fn != NULL the default |
1241 | * primary handler is installed | |
f48fe81e TG |
1242 | * @thread_fn: Function called from the irq handler thread |
1243 | * If NULL, no irq thread is created | |
1da177e4 LT |
1244 | * @irqflags: Interrupt type flags |
1245 | * @devname: An ascii name for the claiming device | |
1246 | * @dev_id: A cookie passed back to the handler function | |
1247 | * | |
1248 | * This call allocates interrupt resources and enables the | |
1249 | * interrupt line and IRQ handling. From the point this | |
1250 | * call is made your handler function may be invoked. Since | |
1251 | * your handler function must clear any interrupt the board | |
1252 | * raises, you must take care both to initialise your hardware | |
1253 | * and to set up the interrupt handler in the right order. | |
1254 | * | |
3aa551c9 TG |
1255 | * If you want to set up a threaded irq handler for your device |
1256 | * then you need to supply @handler and @thread_fn. @handler ist | |
1257 | * still called in hard interrupt context and has to check | |
1258 | * whether the interrupt originates from the device. If yes it | |
1259 | * needs to disable the interrupt on the device and return | |
39a2eddb | 1260 | * IRQ_WAKE_THREAD which will wake up the handler thread and run |
3aa551c9 TG |
1261 | * @thread_fn. This split handler design is necessary to support |
1262 | * shared interrupts. | |
1263 | * | |
1da177e4 LT |
1264 | * Dev_id must be globally unique. Normally the address of the |
1265 | * device data structure is used as the cookie. Since the handler | |
1266 | * receives this value it makes sense to use it. | |
1267 | * | |
1268 | * If your interrupt is shared you must pass a non NULL dev_id | |
1269 | * as this is required when freeing the interrupt. | |
1270 | * | |
1271 | * Flags: | |
1272 | * | |
3cca53b0 | 1273 | * IRQF_SHARED Interrupt is shared |
3cca53b0 | 1274 | * IRQF_SAMPLE_RANDOM The interrupt can be used for entropy |
0c5d1eb7 | 1275 | * IRQF_TRIGGER_* Specify active edge(s) or level |
1da177e4 LT |
1276 | * |
1277 | */ | |
3aa551c9 TG |
1278 | int request_threaded_irq(unsigned int irq, irq_handler_t handler, |
1279 | irq_handler_t thread_fn, unsigned long irqflags, | |
1280 | const char *devname, void *dev_id) | |
1da177e4 | 1281 | { |
06fcb0c6 | 1282 | struct irqaction *action; |
08678b08 | 1283 | struct irq_desc *desc; |
d3c60047 | 1284 | int retval; |
1da177e4 LT |
1285 | |
1286 | /* | |
1287 | * Sanity-check: shared interrupts must pass in a real dev-ID, | |
1288 | * otherwise we'll have trouble later trying to figure out | |
1289 | * which interrupt is which (messes up the interrupt freeing | |
1290 | * logic etc). | |
1291 | */ | |
3cca53b0 | 1292 | if ((irqflags & IRQF_SHARED) && !dev_id) |
1da177e4 | 1293 | return -EINVAL; |
7d94f7ca | 1294 | |
cb5bc832 | 1295 | desc = irq_to_desc(irq); |
7d94f7ca | 1296 | if (!desc) |
1da177e4 | 1297 | return -EINVAL; |
7d94f7ca | 1298 | |
1ccb4e61 | 1299 | if (!irq_settings_can_request(desc)) |
6550c775 | 1300 | return -EINVAL; |
b25c340c TG |
1301 | |
1302 | if (!handler) { | |
1303 | if (!thread_fn) | |
1304 | return -EINVAL; | |
1305 | handler = irq_default_primary_handler; | |
1306 | } | |
1da177e4 | 1307 | |
45535732 | 1308 | action = kzalloc(sizeof(struct irqaction), GFP_KERNEL); |
1da177e4 LT |
1309 | if (!action) |
1310 | return -ENOMEM; | |
1311 | ||
1312 | action->handler = handler; | |
3aa551c9 | 1313 | action->thread_fn = thread_fn; |
1da177e4 | 1314 | action->flags = irqflags; |
1da177e4 | 1315 | action->name = devname; |
1da177e4 LT |
1316 | action->dev_id = dev_id; |
1317 | ||
3876ec9e | 1318 | chip_bus_lock(desc); |
d3c60047 | 1319 | retval = __setup_irq(irq, desc, action); |
3876ec9e | 1320 | chip_bus_sync_unlock(desc); |
70aedd24 | 1321 | |
377bf1e4 AV |
1322 | if (retval) |
1323 | kfree(action); | |
1324 | ||
6d83f94d | 1325 | #ifdef CONFIG_DEBUG_SHIRQ_FIXME |
6ce51c43 | 1326 | if (!retval && (irqflags & IRQF_SHARED)) { |
a304e1b8 DW |
1327 | /* |
1328 | * It's a shared IRQ -- the driver ought to be prepared for it | |
1329 | * to happen immediately, so let's make sure.... | |
377bf1e4 AV |
1330 | * We disable the irq to make sure that a 'real' IRQ doesn't |
1331 | * run in parallel with our fake. | |
a304e1b8 | 1332 | */ |
59845b1f | 1333 | unsigned long flags; |
a304e1b8 | 1334 | |
377bf1e4 | 1335 | disable_irq(irq); |
59845b1f | 1336 | local_irq_save(flags); |
377bf1e4 | 1337 | |
59845b1f | 1338 | handler(irq, dev_id); |
377bf1e4 | 1339 | |
59845b1f | 1340 | local_irq_restore(flags); |
377bf1e4 | 1341 | enable_irq(irq); |
a304e1b8 DW |
1342 | } |
1343 | #endif | |
1da177e4 LT |
1344 | return retval; |
1345 | } | |
3aa551c9 | 1346 | EXPORT_SYMBOL(request_threaded_irq); |
ae731f8d MZ |
1347 | |
1348 | /** | |
1349 | * request_any_context_irq - allocate an interrupt line | |
1350 | * @irq: Interrupt line to allocate | |
1351 | * @handler: Function to be called when the IRQ occurs. | |
1352 | * Threaded handler for threaded interrupts. | |
1353 | * @flags: Interrupt type flags | |
1354 | * @name: An ascii name for the claiming device | |
1355 | * @dev_id: A cookie passed back to the handler function | |
1356 | * | |
1357 | * This call allocates interrupt resources and enables the | |
1358 | * interrupt line and IRQ handling. It selects either a | |
1359 | * hardirq or threaded handling method depending on the | |
1360 | * context. | |
1361 | * | |
1362 | * On failure, it returns a negative value. On success, | |
1363 | * it returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED. | |
1364 | */ | |
1365 | int request_any_context_irq(unsigned int irq, irq_handler_t handler, | |
1366 | unsigned long flags, const char *name, void *dev_id) | |
1367 | { | |
1368 | struct irq_desc *desc = irq_to_desc(irq); | |
1369 | int ret; | |
1370 | ||
1371 | if (!desc) | |
1372 | return -EINVAL; | |
1373 | ||
1ccb4e61 | 1374 | if (irq_settings_is_nested_thread(desc)) { |
ae731f8d MZ |
1375 | ret = request_threaded_irq(irq, NULL, handler, |
1376 | flags, name, dev_id); | |
1377 | return !ret ? IRQC_IS_NESTED : ret; | |
1378 | } | |
1379 | ||
1380 | ret = request_irq(irq, handler, flags, name, dev_id); | |
1381 | return !ret ? IRQC_IS_HARDIRQ : ret; | |
1382 | } | |
1383 | EXPORT_SYMBOL_GPL(request_any_context_irq); |