genirq: Provide synchronize_hardirq()
[deliverable/linux.git] / kernel / irq / manage.c
CommitLineData
1da177e4
LT
1/*
2 * linux/kernel/irq/manage.c
3 *
a34db9b2
IM
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006 Thomas Gleixner
1da177e4
LT
6 *
7 * This file contains driver APIs to the irq subsystem.
8 */
9
97fd75b7
AM
10#define pr_fmt(fmt) "genirq: " fmt
11
1da177e4 12#include <linux/irq.h>
3aa551c9 13#include <linux/kthread.h>
1da177e4
LT
14#include <linux/module.h>
15#include <linux/random.h>
16#include <linux/interrupt.h>
1aeb272c 17#include <linux/slab.h>
3aa551c9 18#include <linux/sched.h>
8bd75c77 19#include <linux/sched/rt.h>
4d1d61a6 20#include <linux/task_work.h>
1da177e4
LT
21
22#include "internals.h"
23
8d32a307
TG
24#ifdef CONFIG_IRQ_FORCED_THREADING
25__read_mostly bool force_irqthreads;
26
27static int __init setup_forced_irqthreads(char *arg)
28{
29 force_irqthreads = true;
30 return 0;
31}
32early_param("threadirqs", setup_forced_irqthreads);
33#endif
34
18258f72 35static void __synchronize_hardirq(struct irq_desc *desc)
1da177e4 36{
32f4125e 37 bool inprogress;
1da177e4 38
a98ce5c6
HX
39 do {
40 unsigned long flags;
41
42 /*
43 * Wait until we're out of the critical section. This might
44 * give the wrong answer due to the lack of memory barriers.
45 */
32f4125e 46 while (irqd_irq_inprogress(&desc->irq_data))
a98ce5c6
HX
47 cpu_relax();
48
49 /* Ok, that indicated we're done: double-check carefully. */
239007b8 50 raw_spin_lock_irqsave(&desc->lock, flags);
32f4125e 51 inprogress = irqd_irq_inprogress(&desc->irq_data);
239007b8 52 raw_spin_unlock_irqrestore(&desc->lock, flags);
a98ce5c6
HX
53
54 /* Oops, that failed? */
32f4125e 55 } while (inprogress);
18258f72
TG
56}
57
58/**
59 * synchronize_hardirq - wait for pending hard IRQ handlers (on other CPUs)
60 * @irq: interrupt number to wait for
61 *
62 * This function waits for any pending hard IRQ handlers for this
63 * interrupt to complete before returning. If you use this
64 * function while holding a resource the IRQ handler may need you
65 * will deadlock. It does not take associated threaded handlers
66 * into account.
67 *
68 * Do not use this for shutdown scenarios where you must be sure
69 * that all parts (hardirq and threaded handler) have completed.
70 *
71 * This function may be called - with care - from IRQ context.
72 */
73void synchronize_hardirq(unsigned int irq)
74{
75 struct irq_desc *desc = irq_to_desc(irq);
3aa551c9 76
18258f72
TG
77 if (desc)
78 __synchronize_hardirq(desc);
79}
80EXPORT_SYMBOL(synchronize_hardirq);
81
82/**
83 * synchronize_irq - wait for pending IRQ handlers (on other CPUs)
84 * @irq: interrupt number to wait for
85 *
86 * This function waits for any pending IRQ handlers for this interrupt
87 * to complete before returning. If you use this function while
88 * holding a resource the IRQ handler may need you will deadlock.
89 *
90 * This function may be called - with care - from IRQ context.
91 */
92void synchronize_irq(unsigned int irq)
93{
94 struct irq_desc *desc = irq_to_desc(irq);
95
96 if (desc) {
97 __synchronize_hardirq(desc);
98 /*
99 * We made sure that no hardirq handler is
100 * running. Now verify that no threaded handlers are
101 * active.
102 */
103 wait_event(desc->wait_for_threads,
104 !atomic_read(&desc->threads_active));
105 }
1da177e4 106}
1da177e4
LT
107EXPORT_SYMBOL(synchronize_irq);
108
3aa551c9
TG
109#ifdef CONFIG_SMP
110cpumask_var_t irq_default_affinity;
111
771ee3b0
TG
112/**
113 * irq_can_set_affinity - Check if the affinity of a given irq can be set
114 * @irq: Interrupt to check
115 *
116 */
117int irq_can_set_affinity(unsigned int irq)
118{
08678b08 119 struct irq_desc *desc = irq_to_desc(irq);
771ee3b0 120
bce43032
TG
121 if (!desc || !irqd_can_balance(&desc->irq_data) ||
122 !desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity)
771ee3b0
TG
123 return 0;
124
125 return 1;
126}
127
591d2fb0
TG
128/**
129 * irq_set_thread_affinity - Notify irq threads to adjust affinity
130 * @desc: irq descriptor which has affitnity changed
131 *
132 * We just set IRQTF_AFFINITY and delegate the affinity setting
133 * to the interrupt thread itself. We can not call
134 * set_cpus_allowed_ptr() here as we hold desc->lock and this
135 * code can be called from hard interrupt context.
136 */
137void irq_set_thread_affinity(struct irq_desc *desc)
3aa551c9
TG
138{
139 struct irqaction *action = desc->action;
140
141 while (action) {
142 if (action->thread)
591d2fb0 143 set_bit(IRQTF_AFFINITY, &action->thread_flags);
3aa551c9
TG
144 action = action->next;
145 }
146}
147
1fa46f1f 148#ifdef CONFIG_GENERIC_PENDING_IRQ
0ef5ca1e 149static inline bool irq_can_move_pcntxt(struct irq_data *data)
1fa46f1f 150{
0ef5ca1e 151 return irqd_can_move_in_process_context(data);
1fa46f1f 152}
0ef5ca1e 153static inline bool irq_move_pending(struct irq_data *data)
1fa46f1f 154{
0ef5ca1e 155 return irqd_is_setaffinity_pending(data);
1fa46f1f
TG
156}
157static inline void
158irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask)
159{
160 cpumask_copy(desc->pending_mask, mask);
161}
162static inline void
163irq_get_pending(struct cpumask *mask, struct irq_desc *desc)
164{
165 cpumask_copy(mask, desc->pending_mask);
166}
167#else
0ef5ca1e 168static inline bool irq_can_move_pcntxt(struct irq_data *data) { return true; }
cd22c0e4 169static inline bool irq_move_pending(struct irq_data *data) { return false; }
1fa46f1f
TG
170static inline void
171irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask) { }
172static inline void
173irq_get_pending(struct cpumask *mask, struct irq_desc *desc) { }
174#endif
175
818b0f3b
JL
176int irq_do_set_affinity(struct irq_data *data, const struct cpumask *mask,
177 bool force)
178{
179 struct irq_desc *desc = irq_data_to_desc(data);
180 struct irq_chip *chip = irq_data_get_irq_chip(data);
181 int ret;
182
183 ret = chip->irq_set_affinity(data, mask, false);
184 switch (ret) {
185 case IRQ_SET_MASK_OK:
186 cpumask_copy(data->affinity, mask);
187 case IRQ_SET_MASK_OK_NOCOPY:
188 irq_set_thread_affinity(desc);
189 ret = 0;
190 }
191
192 return ret;
193}
194
c2d0c555 195int __irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask)
771ee3b0 196{
c2d0c555
DD
197 struct irq_chip *chip = irq_data_get_irq_chip(data);
198 struct irq_desc *desc = irq_data_to_desc(data);
1fa46f1f 199 int ret = 0;
771ee3b0 200
c2d0c555 201 if (!chip || !chip->irq_set_affinity)
771ee3b0
TG
202 return -EINVAL;
203
0ef5ca1e 204 if (irq_can_move_pcntxt(data)) {
818b0f3b 205 ret = irq_do_set_affinity(data, mask, false);
1fa46f1f 206 } else {
c2d0c555 207 irqd_set_move_pending(data);
1fa46f1f 208 irq_copy_pending(desc, mask);
57b150cc 209 }
1fa46f1f 210
cd7eab44
BH
211 if (desc->affinity_notify) {
212 kref_get(&desc->affinity_notify->kref);
213 schedule_work(&desc->affinity_notify->work);
214 }
c2d0c555
DD
215 irqd_set(data, IRQD_AFFINITY_SET);
216
217 return ret;
218}
219
220/**
221 * irq_set_affinity - Set the irq affinity of a given irq
222 * @irq: Interrupt to set affinity
30398bf6 223 * @mask: cpumask
c2d0c555
DD
224 *
225 */
226int irq_set_affinity(unsigned int irq, const struct cpumask *mask)
227{
228 struct irq_desc *desc = irq_to_desc(irq);
229 unsigned long flags;
230 int ret;
231
232 if (!desc)
233 return -EINVAL;
234
235 raw_spin_lock_irqsave(&desc->lock, flags);
236 ret = __irq_set_affinity_locked(irq_desc_get_irq_data(desc), mask);
239007b8 237 raw_spin_unlock_irqrestore(&desc->lock, flags);
1fa46f1f 238 return ret;
771ee3b0
TG
239}
240
e7a297b0
PWJ
241int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m)
242{
e7a297b0 243 unsigned long flags;
31d9d9b6 244 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
e7a297b0
PWJ
245
246 if (!desc)
247 return -EINVAL;
e7a297b0 248 desc->affinity_hint = m;
02725e74 249 irq_put_desc_unlock(desc, flags);
e7a297b0
PWJ
250 return 0;
251}
252EXPORT_SYMBOL_GPL(irq_set_affinity_hint);
253
cd7eab44
BH
254static void irq_affinity_notify(struct work_struct *work)
255{
256 struct irq_affinity_notify *notify =
257 container_of(work, struct irq_affinity_notify, work);
258 struct irq_desc *desc = irq_to_desc(notify->irq);
259 cpumask_var_t cpumask;
260 unsigned long flags;
261
1fa46f1f 262 if (!desc || !alloc_cpumask_var(&cpumask, GFP_KERNEL))
cd7eab44
BH
263 goto out;
264
265 raw_spin_lock_irqsave(&desc->lock, flags);
0ef5ca1e 266 if (irq_move_pending(&desc->irq_data))
1fa46f1f 267 irq_get_pending(cpumask, desc);
cd7eab44 268 else
1fb0ef31 269 cpumask_copy(cpumask, desc->irq_data.affinity);
cd7eab44
BH
270 raw_spin_unlock_irqrestore(&desc->lock, flags);
271
272 notify->notify(notify, cpumask);
273
274 free_cpumask_var(cpumask);
275out:
276 kref_put(&notify->kref, notify->release);
277}
278
279/**
280 * irq_set_affinity_notifier - control notification of IRQ affinity changes
281 * @irq: Interrupt for which to enable/disable notification
282 * @notify: Context for notification, or %NULL to disable
283 * notification. Function pointers must be initialised;
284 * the other fields will be initialised by this function.
285 *
286 * Must be called in process context. Notification may only be enabled
287 * after the IRQ is allocated and must be disabled before the IRQ is
288 * freed using free_irq().
289 */
290int
291irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify)
292{
293 struct irq_desc *desc = irq_to_desc(irq);
294 struct irq_affinity_notify *old_notify;
295 unsigned long flags;
296
297 /* The release function is promised process context */
298 might_sleep();
299
300 if (!desc)
301 return -EINVAL;
302
303 /* Complete initialisation of *notify */
304 if (notify) {
305 notify->irq = irq;
306 kref_init(&notify->kref);
307 INIT_WORK(&notify->work, irq_affinity_notify);
308 }
309
310 raw_spin_lock_irqsave(&desc->lock, flags);
311 old_notify = desc->affinity_notify;
312 desc->affinity_notify = notify;
313 raw_spin_unlock_irqrestore(&desc->lock, flags);
314
315 if (old_notify)
316 kref_put(&old_notify->kref, old_notify->release);
317
318 return 0;
319}
320EXPORT_SYMBOL_GPL(irq_set_affinity_notifier);
321
18404756
MK
322#ifndef CONFIG_AUTO_IRQ_AFFINITY
323/*
324 * Generic version of the affinity autoselector.
325 */
3b8249e7
TG
326static int
327setup_affinity(unsigned int irq, struct irq_desc *desc, struct cpumask *mask)
18404756 328{
569bda8d 329 struct cpumask *set = irq_default_affinity;
818b0f3b 330 int node = desc->irq_data.node;
569bda8d 331
b008207c 332 /* Excludes PER_CPU and NO_BALANCE interrupts */
18404756
MK
333 if (!irq_can_set_affinity(irq))
334 return 0;
335
f6d87f4b
TG
336 /*
337 * Preserve an userspace affinity setup, but make sure that
338 * one of the targets is online.
339 */
2bdd1055 340 if (irqd_has_set(&desc->irq_data, IRQD_AFFINITY_SET)) {
569bda8d
TG
341 if (cpumask_intersects(desc->irq_data.affinity,
342 cpu_online_mask))
343 set = desc->irq_data.affinity;
0c6f8a8b 344 else
2bdd1055 345 irqd_clear(&desc->irq_data, IRQD_AFFINITY_SET);
f6d87f4b 346 }
18404756 347
3b8249e7 348 cpumask_and(mask, cpu_online_mask, set);
241fc640
PB
349 if (node != NUMA_NO_NODE) {
350 const struct cpumask *nodemask = cpumask_of_node(node);
351
352 /* make sure at least one of the cpus in nodemask is online */
353 if (cpumask_intersects(mask, nodemask))
354 cpumask_and(mask, mask, nodemask);
355 }
818b0f3b 356 irq_do_set_affinity(&desc->irq_data, mask, false);
18404756
MK
357 return 0;
358}
f6d87f4b 359#else
3b8249e7
TG
360static inline int
361setup_affinity(unsigned int irq, struct irq_desc *d, struct cpumask *mask)
f6d87f4b
TG
362{
363 return irq_select_affinity(irq);
364}
18404756
MK
365#endif
366
f6d87f4b
TG
367/*
368 * Called when affinity is set via /proc/irq
369 */
3b8249e7 370int irq_select_affinity_usr(unsigned int irq, struct cpumask *mask)
f6d87f4b
TG
371{
372 struct irq_desc *desc = irq_to_desc(irq);
373 unsigned long flags;
374 int ret;
375
239007b8 376 raw_spin_lock_irqsave(&desc->lock, flags);
3b8249e7 377 ret = setup_affinity(irq, desc, mask);
239007b8 378 raw_spin_unlock_irqrestore(&desc->lock, flags);
f6d87f4b
TG
379 return ret;
380}
381
382#else
3b8249e7
TG
383static inline int
384setup_affinity(unsigned int irq, struct irq_desc *desc, struct cpumask *mask)
f6d87f4b
TG
385{
386 return 0;
387}
1da177e4
LT
388#endif
389
0a0c5168
RW
390void __disable_irq(struct irq_desc *desc, unsigned int irq, bool suspend)
391{
392 if (suspend) {
685fd0b4 393 if (!desc->action || (desc->action->flags & IRQF_NO_SUSPEND))
0a0c5168 394 return;
c531e836 395 desc->istate |= IRQS_SUSPENDED;
0a0c5168
RW
396 }
397
3aae994f 398 if (!desc->depth++)
87923470 399 irq_disable(desc);
0a0c5168
RW
400}
401
02725e74
TG
402static int __disable_irq_nosync(unsigned int irq)
403{
404 unsigned long flags;
31d9d9b6 405 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
02725e74
TG
406
407 if (!desc)
408 return -EINVAL;
409 __disable_irq(desc, irq, false);
410 irq_put_desc_busunlock(desc, flags);
411 return 0;
412}
413
1da177e4
LT
414/**
415 * disable_irq_nosync - disable an irq without waiting
416 * @irq: Interrupt to disable
417 *
418 * Disable the selected interrupt line. Disables and Enables are
419 * nested.
420 * Unlike disable_irq(), this function does not ensure existing
421 * instances of the IRQ handler have completed before returning.
422 *
423 * This function may be called from IRQ context.
424 */
425void disable_irq_nosync(unsigned int irq)
426{
02725e74 427 __disable_irq_nosync(irq);
1da177e4 428}
1da177e4
LT
429EXPORT_SYMBOL(disable_irq_nosync);
430
431/**
432 * disable_irq - disable an irq and wait for completion
433 * @irq: Interrupt to disable
434 *
435 * Disable the selected interrupt line. Enables and Disables are
436 * nested.
437 * This function waits for any pending IRQ handlers for this interrupt
438 * to complete before returning. If you use this function while
439 * holding a resource the IRQ handler may need you will deadlock.
440 *
441 * This function may be called - with care - from IRQ context.
442 */
443void disable_irq(unsigned int irq)
444{
02725e74 445 if (!__disable_irq_nosync(irq))
1da177e4
LT
446 synchronize_irq(irq);
447}
1da177e4
LT
448EXPORT_SYMBOL(disable_irq);
449
0a0c5168 450void __enable_irq(struct irq_desc *desc, unsigned int irq, bool resume)
1adb0850 451{
dc5f219e 452 if (resume) {
c531e836 453 if (!(desc->istate & IRQS_SUSPENDED)) {
dc5f219e
TG
454 if (!desc->action)
455 return;
456 if (!(desc->action->flags & IRQF_FORCE_RESUME))
457 return;
458 /* Pretend that it got disabled ! */
459 desc->depth++;
460 }
c531e836 461 desc->istate &= ~IRQS_SUSPENDED;
dc5f219e 462 }
0a0c5168 463
1adb0850
TG
464 switch (desc->depth) {
465 case 0:
0a0c5168 466 err_out:
b8c512f6 467 WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n", irq);
1adb0850
TG
468 break;
469 case 1: {
c531e836 470 if (desc->istate & IRQS_SUSPENDED)
0a0c5168 471 goto err_out;
1adb0850 472 /* Prevent probing on this irq: */
1ccb4e61 473 irq_settings_set_noprobe(desc);
3aae994f 474 irq_enable(desc);
1adb0850
TG
475 check_irq_resend(desc, irq);
476 /* fall-through */
477 }
478 default:
479 desc->depth--;
480 }
481}
482
1da177e4
LT
483/**
484 * enable_irq - enable handling of an irq
485 * @irq: Interrupt to enable
486 *
487 * Undoes the effect of one call to disable_irq(). If this
488 * matches the last disable, processing of interrupts on this
489 * IRQ line is re-enabled.
490 *
70aedd24 491 * This function may be called from IRQ context only when
6b8ff312 492 * desc->irq_data.chip->bus_lock and desc->chip->bus_sync_unlock are NULL !
1da177e4
LT
493 */
494void enable_irq(unsigned int irq)
495{
1da177e4 496 unsigned long flags;
31d9d9b6 497 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
1da177e4 498
7d94f7ca 499 if (!desc)
c2b5a251 500 return;
50f7c032
TG
501 if (WARN(!desc->irq_data.chip,
502 KERN_ERR "enable_irq before setup/request_irq: irq %u\n", irq))
02725e74 503 goto out;
2656c366 504
0a0c5168 505 __enable_irq(desc, irq, false);
02725e74
TG
506out:
507 irq_put_desc_busunlock(desc, flags);
1da177e4 508}
1da177e4
LT
509EXPORT_SYMBOL(enable_irq);
510
0c5d1eb7 511static int set_irq_wake_real(unsigned int irq, unsigned int on)
2db87321 512{
08678b08 513 struct irq_desc *desc = irq_to_desc(irq);
2db87321
UKK
514 int ret = -ENXIO;
515
60f96b41
SS
516 if (irq_desc_get_chip(desc)->flags & IRQCHIP_SKIP_SET_WAKE)
517 return 0;
518
2f7e99bb
TG
519 if (desc->irq_data.chip->irq_set_wake)
520 ret = desc->irq_data.chip->irq_set_wake(&desc->irq_data, on);
2db87321
UKK
521
522 return ret;
523}
524
ba9a2331 525/**
a0cd9ca2 526 * irq_set_irq_wake - control irq power management wakeup
ba9a2331
TG
527 * @irq: interrupt to control
528 * @on: enable/disable power management wakeup
529 *
15a647eb
DB
530 * Enable/disable power management wakeup mode, which is
531 * disabled by default. Enables and disables must match,
532 * just as they match for non-wakeup mode support.
533 *
534 * Wakeup mode lets this IRQ wake the system from sleep
535 * states like "suspend to RAM".
ba9a2331 536 */
a0cd9ca2 537int irq_set_irq_wake(unsigned int irq, unsigned int on)
ba9a2331 538{
ba9a2331 539 unsigned long flags;
31d9d9b6 540 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
2db87321 541 int ret = 0;
ba9a2331 542
13863a66
JJ
543 if (!desc)
544 return -EINVAL;
545
15a647eb
DB
546 /* wakeup-capable irqs can be shared between drivers that
547 * don't need to have the same sleep mode behaviors.
548 */
15a647eb 549 if (on) {
2db87321
UKK
550 if (desc->wake_depth++ == 0) {
551 ret = set_irq_wake_real(irq, on);
552 if (ret)
553 desc->wake_depth = 0;
554 else
7f94226f 555 irqd_set(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 556 }
15a647eb
DB
557 } else {
558 if (desc->wake_depth == 0) {
7a2c4770 559 WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
2db87321
UKK
560 } else if (--desc->wake_depth == 0) {
561 ret = set_irq_wake_real(irq, on);
562 if (ret)
563 desc->wake_depth = 1;
564 else
7f94226f 565 irqd_clear(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 566 }
15a647eb 567 }
02725e74 568 irq_put_desc_busunlock(desc, flags);
ba9a2331
TG
569 return ret;
570}
a0cd9ca2 571EXPORT_SYMBOL(irq_set_irq_wake);
ba9a2331 572
1da177e4
LT
573/*
574 * Internal function that tells the architecture code whether a
575 * particular irq has been exclusively allocated or is available
576 * for driver use.
577 */
578int can_request_irq(unsigned int irq, unsigned long irqflags)
579{
cc8c3b78 580 unsigned long flags;
31d9d9b6 581 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
02725e74 582 int canrequest = 0;
1da177e4 583
7d94f7ca
YL
584 if (!desc)
585 return 0;
586
02725e74 587 if (irq_settings_can_request(desc)) {
2779db8d
BH
588 if (!desc->action ||
589 irqflags & desc->action->flags & IRQF_SHARED)
590 canrequest = 1;
02725e74
TG
591 }
592 irq_put_desc_unlock(desc, flags);
593 return canrequest;
1da177e4
LT
594}
595
0c5d1eb7 596int __irq_set_trigger(struct irq_desc *desc, unsigned int irq,
b2ba2c30 597 unsigned long flags)
82736f4d 598{
6b8ff312 599 struct irq_chip *chip = desc->irq_data.chip;
d4d5e089 600 int ret, unmask = 0;
82736f4d 601
b2ba2c30 602 if (!chip || !chip->irq_set_type) {
82736f4d
UKK
603 /*
604 * IRQF_TRIGGER_* but the PIC does not support multiple
605 * flow-types?
606 */
97fd75b7 607 pr_debug("No set_type function for IRQ %d (%s)\n", irq,
f5d89470 608 chip ? (chip->name ? : "unknown") : "unknown");
82736f4d
UKK
609 return 0;
610 }
611
876dbd4c 612 flags &= IRQ_TYPE_SENSE_MASK;
d4d5e089
TG
613
614 if (chip->flags & IRQCHIP_SET_TYPE_MASKED) {
32f4125e 615 if (!irqd_irq_masked(&desc->irq_data))
d4d5e089 616 mask_irq(desc);
32f4125e 617 if (!irqd_irq_disabled(&desc->irq_data))
d4d5e089
TG
618 unmask = 1;
619 }
620
f2b662da 621 /* caller masked out all except trigger mode flags */
b2ba2c30 622 ret = chip->irq_set_type(&desc->irq_data, flags);
82736f4d 623
876dbd4c
TG
624 switch (ret) {
625 case IRQ_SET_MASK_OK:
626 irqd_clear(&desc->irq_data, IRQD_TRIGGER_MASK);
627 irqd_set(&desc->irq_data, flags);
628
629 case IRQ_SET_MASK_OK_NOCOPY:
630 flags = irqd_get_trigger_type(&desc->irq_data);
631 irq_settings_set_trigger_mask(desc, flags);
632 irqd_clear(&desc->irq_data, IRQD_LEVEL);
633 irq_settings_clr_level(desc);
634 if (flags & IRQ_TYPE_LEVEL_MASK) {
635 irq_settings_set_level(desc);
636 irqd_set(&desc->irq_data, IRQD_LEVEL);
637 }
46732475 638
d4d5e089 639 ret = 0;
8fff39e0 640 break;
876dbd4c 641 default:
97fd75b7 642 pr_err("Setting trigger mode %lu for irq %u failed (%pF)\n",
876dbd4c 643 flags, irq, chip->irq_set_type);
0c5d1eb7 644 }
d4d5e089
TG
645 if (unmask)
646 unmask_irq(desc);
82736f4d
UKK
647 return ret;
648}
649
293a7a0a
TG
650#ifdef CONFIG_HARDIRQS_SW_RESEND
651int irq_set_parent(int irq, int parent_irq)
652{
653 unsigned long flags;
654 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
655
656 if (!desc)
657 return -EINVAL;
658
659 desc->parent_irq = parent_irq;
660
661 irq_put_desc_unlock(desc, flags);
662 return 0;
663}
664#endif
665
b25c340c
TG
666/*
667 * Default primary interrupt handler for threaded interrupts. Is
668 * assigned as primary handler when request_threaded_irq is called
669 * with handler == NULL. Useful for oneshot interrupts.
670 */
671static irqreturn_t irq_default_primary_handler(int irq, void *dev_id)
672{
673 return IRQ_WAKE_THREAD;
674}
675
399b5da2
TG
676/*
677 * Primary handler for nested threaded interrupts. Should never be
678 * called.
679 */
680static irqreturn_t irq_nested_primary_handler(int irq, void *dev_id)
681{
682 WARN(1, "Primary handler called for nested irq %d\n", irq);
683 return IRQ_NONE;
684}
685
3aa551c9
TG
686static int irq_wait_for_interrupt(struct irqaction *action)
687{
550acb19
IY
688 set_current_state(TASK_INTERRUPTIBLE);
689
3aa551c9 690 while (!kthread_should_stop()) {
f48fe81e
TG
691
692 if (test_and_clear_bit(IRQTF_RUNTHREAD,
693 &action->thread_flags)) {
3aa551c9
TG
694 __set_current_state(TASK_RUNNING);
695 return 0;
f48fe81e
TG
696 }
697 schedule();
550acb19 698 set_current_state(TASK_INTERRUPTIBLE);
3aa551c9 699 }
550acb19 700 __set_current_state(TASK_RUNNING);
3aa551c9
TG
701 return -1;
702}
703
b25c340c
TG
704/*
705 * Oneshot interrupts keep the irq line masked until the threaded
706 * handler finished. unmask if the interrupt has not been disabled and
707 * is marked MASKED.
708 */
b5faba21 709static void irq_finalize_oneshot(struct irq_desc *desc,
f3f79e38 710 struct irqaction *action)
b25c340c 711{
b5faba21
TG
712 if (!(desc->istate & IRQS_ONESHOT))
713 return;
0b1adaa0 714again:
3876ec9e 715 chip_bus_lock(desc);
239007b8 716 raw_spin_lock_irq(&desc->lock);
0b1adaa0
TG
717
718 /*
719 * Implausible though it may be we need to protect us against
720 * the following scenario:
721 *
722 * The thread is faster done than the hard interrupt handler
723 * on the other CPU. If we unmask the irq line then the
724 * interrupt can come in again and masks the line, leaves due
009b4c3b 725 * to IRQS_INPROGRESS and the irq line is masked forever.
b5faba21
TG
726 *
727 * This also serializes the state of shared oneshot handlers
728 * versus "desc->threads_onehsot |= action->thread_mask;" in
729 * irq_wake_thread(). See the comment there which explains the
730 * serialization.
0b1adaa0 731 */
32f4125e 732 if (unlikely(irqd_irq_inprogress(&desc->irq_data))) {
0b1adaa0 733 raw_spin_unlock_irq(&desc->lock);
3876ec9e 734 chip_bus_sync_unlock(desc);
0b1adaa0
TG
735 cpu_relax();
736 goto again;
737 }
738
b5faba21
TG
739 /*
740 * Now check again, whether the thread should run. Otherwise
741 * we would clear the threads_oneshot bit of this thread which
742 * was just set.
743 */
f3f79e38 744 if (test_bit(IRQTF_RUNTHREAD, &action->thread_flags))
b5faba21
TG
745 goto out_unlock;
746
747 desc->threads_oneshot &= ~action->thread_mask;
748
32f4125e
TG
749 if (!desc->threads_oneshot && !irqd_irq_disabled(&desc->irq_data) &&
750 irqd_irq_masked(&desc->irq_data))
751 unmask_irq(desc);
752
b5faba21 753out_unlock:
239007b8 754 raw_spin_unlock_irq(&desc->lock);
3876ec9e 755 chip_bus_sync_unlock(desc);
b25c340c
TG
756}
757
61f38261 758#ifdef CONFIG_SMP
591d2fb0 759/*
d4d5e089 760 * Check whether we need to chasnge the affinity of the interrupt thread.
591d2fb0
TG
761 */
762static void
763irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action)
764{
765 cpumask_var_t mask;
04aa530e 766 bool valid = true;
591d2fb0
TG
767
768 if (!test_and_clear_bit(IRQTF_AFFINITY, &action->thread_flags))
769 return;
770
771 /*
772 * In case we are out of memory we set IRQTF_AFFINITY again and
773 * try again next time
774 */
775 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
776 set_bit(IRQTF_AFFINITY, &action->thread_flags);
777 return;
778 }
779
239007b8 780 raw_spin_lock_irq(&desc->lock);
04aa530e
TG
781 /*
782 * This code is triggered unconditionally. Check the affinity
783 * mask pointer. For CPU_MASK_OFFSTACK=n this is optimized out.
784 */
785 if (desc->irq_data.affinity)
786 cpumask_copy(mask, desc->irq_data.affinity);
787 else
788 valid = false;
239007b8 789 raw_spin_unlock_irq(&desc->lock);
591d2fb0 790
04aa530e
TG
791 if (valid)
792 set_cpus_allowed_ptr(current, mask);
591d2fb0
TG
793 free_cpumask_var(mask);
794}
61f38261
BP
795#else
796static inline void
797irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) { }
798#endif
591d2fb0 799
8d32a307
TG
800/*
801 * Interrupts which are not explicitely requested as threaded
802 * interrupts rely on the implicit bh/preempt disable of the hard irq
803 * context. So we need to disable bh here to avoid deadlocks and other
804 * side effects.
805 */
3a43e05f 806static irqreturn_t
8d32a307
TG
807irq_forced_thread_fn(struct irq_desc *desc, struct irqaction *action)
808{
3a43e05f
SAS
809 irqreturn_t ret;
810
8d32a307 811 local_bh_disable();
3a43e05f 812 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 813 irq_finalize_oneshot(desc, action);
8d32a307 814 local_bh_enable();
3a43e05f 815 return ret;
8d32a307
TG
816}
817
818/*
f788e7bf 819 * Interrupts explicitly requested as threaded interrupts want to be
8d32a307
TG
820 * preemtible - many of them need to sleep and wait for slow busses to
821 * complete.
822 */
3a43e05f
SAS
823static irqreturn_t irq_thread_fn(struct irq_desc *desc,
824 struct irqaction *action)
8d32a307 825{
3a43e05f
SAS
826 irqreturn_t ret;
827
828 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 829 irq_finalize_oneshot(desc, action);
3a43e05f 830 return ret;
8d32a307
TG
831}
832
7140ea19
IY
833static void wake_threads_waitq(struct irq_desc *desc)
834{
835 if (atomic_dec_and_test(&desc->threads_active) &&
836 waitqueue_active(&desc->wait_for_threads))
837 wake_up(&desc->wait_for_threads);
838}
839
67d12145 840static void irq_thread_dtor(struct callback_head *unused)
4d1d61a6
ON
841{
842 struct task_struct *tsk = current;
843 struct irq_desc *desc;
844 struct irqaction *action;
845
846 if (WARN_ON_ONCE(!(current->flags & PF_EXITING)))
847 return;
848
849 action = kthread_data(tsk);
850
fb21affa 851 pr_err("exiting task \"%s\" (%d) is an active IRQ thread (irq %d)\n",
19af395d 852 tsk->comm, tsk->pid, action->irq);
4d1d61a6
ON
853
854
855 desc = irq_to_desc(action->irq);
856 /*
857 * If IRQTF_RUNTHREAD is set, we need to decrement
858 * desc->threads_active and wake possible waiters.
859 */
860 if (test_and_clear_bit(IRQTF_RUNTHREAD, &action->thread_flags))
861 wake_threads_waitq(desc);
862
863 /* Prevent a stale desc->threads_oneshot */
864 irq_finalize_oneshot(desc, action);
865}
866
3aa551c9
TG
867/*
868 * Interrupt handler thread
869 */
870static int irq_thread(void *data)
871{
67d12145 872 struct callback_head on_exit_work;
3aa551c9
TG
873 struct irqaction *action = data;
874 struct irq_desc *desc = irq_to_desc(action->irq);
3a43e05f
SAS
875 irqreturn_t (*handler_fn)(struct irq_desc *desc,
876 struct irqaction *action);
3aa551c9 877
540b60e2 878 if (force_irqthreads && test_bit(IRQTF_FORCED_THREAD,
8d32a307
TG
879 &action->thread_flags))
880 handler_fn = irq_forced_thread_fn;
881 else
882 handler_fn = irq_thread_fn;
883
41f9d29f 884 init_task_work(&on_exit_work, irq_thread_dtor);
4d1d61a6 885 task_work_add(current, &on_exit_work, false);
3aa551c9 886
f3de44ed
SM
887 irq_thread_check_affinity(desc, action);
888
3aa551c9 889 while (!irq_wait_for_interrupt(action)) {
7140ea19 890 irqreturn_t action_ret;
3aa551c9 891
591d2fb0
TG
892 irq_thread_check_affinity(desc, action);
893
7140ea19
IY
894 action_ret = handler_fn(desc, action);
895 if (!noirqdebug)
896 note_interrupt(action->irq, desc, action_ret);
3aa551c9 897
7140ea19 898 wake_threads_waitq(desc);
3aa551c9
TG
899 }
900
7140ea19
IY
901 /*
902 * This is the regular exit path. __free_irq() is stopping the
903 * thread via kthread_stop() after calling
904 * synchronize_irq(). So neither IRQTF_RUNTHREAD nor the
e04268b0
TG
905 * oneshot mask bit can be set. We cannot verify that as we
906 * cannot touch the oneshot mask at this point anymore as
907 * __setup_irq() might have given out currents thread_mask
908 * again.
3aa551c9 909 */
4d1d61a6 910 task_work_cancel(current, irq_thread_dtor);
3aa551c9
TG
911 return 0;
912}
913
8d32a307
TG
914static void irq_setup_forced_threading(struct irqaction *new)
915{
916 if (!force_irqthreads)
917 return;
918 if (new->flags & (IRQF_NO_THREAD | IRQF_PERCPU | IRQF_ONESHOT))
919 return;
920
921 new->flags |= IRQF_ONESHOT;
922
923 if (!new->thread_fn) {
924 set_bit(IRQTF_FORCED_THREAD, &new->thread_flags);
925 new->thread_fn = new->handler;
926 new->handler = irq_default_primary_handler;
927 }
928}
929
1da177e4
LT
930/*
931 * Internal function to register an irqaction - typically used to
932 * allocate special interrupts that are part of the architecture.
933 */
d3c60047 934static int
327ec569 935__setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
1da177e4 936{
f17c7545 937 struct irqaction *old, **old_ptr;
b5faba21 938 unsigned long flags, thread_mask = 0;
3b8249e7
TG
939 int ret, nested, shared = 0;
940 cpumask_var_t mask;
1da177e4 941
7d94f7ca 942 if (!desc)
c2b5a251
MW
943 return -EINVAL;
944
6b8ff312 945 if (desc->irq_data.chip == &no_irq_chip)
1da177e4 946 return -ENOSYS;
b6873807
SAS
947 if (!try_module_get(desc->owner))
948 return -ENODEV;
1da177e4 949
3aa551c9 950 /*
399b5da2
TG
951 * Check whether the interrupt nests into another interrupt
952 * thread.
953 */
1ccb4e61 954 nested = irq_settings_is_nested_thread(desc);
399b5da2 955 if (nested) {
b6873807
SAS
956 if (!new->thread_fn) {
957 ret = -EINVAL;
958 goto out_mput;
959 }
399b5da2
TG
960 /*
961 * Replace the primary handler which was provided from
962 * the driver for non nested interrupt handling by the
963 * dummy function which warns when called.
964 */
965 new->handler = irq_nested_primary_handler;
8d32a307 966 } else {
7f1b1244
PM
967 if (irq_settings_can_thread(desc))
968 irq_setup_forced_threading(new);
399b5da2
TG
969 }
970
3aa551c9 971 /*
399b5da2
TG
972 * Create a handler thread when a thread function is supplied
973 * and the interrupt does not nest into another interrupt
974 * thread.
3aa551c9 975 */
399b5da2 976 if (new->thread_fn && !nested) {
3aa551c9 977 struct task_struct *t;
ee238713
IS
978 static const struct sched_param param = {
979 .sched_priority = MAX_USER_RT_PRIO/2,
980 };
3aa551c9
TG
981
982 t = kthread_create(irq_thread, new, "irq/%d-%s", irq,
983 new->name);
b6873807
SAS
984 if (IS_ERR(t)) {
985 ret = PTR_ERR(t);
986 goto out_mput;
987 }
ee238713 988
bbfe65c2 989 sched_setscheduler_nocheck(t, SCHED_FIFO, &param);
ee238713 990
3aa551c9
TG
991 /*
992 * We keep the reference to the task struct even if
993 * the thread dies to avoid that the interrupt code
994 * references an already freed task_struct.
995 */
996 get_task_struct(t);
997 new->thread = t;
04aa530e
TG
998 /*
999 * Tell the thread to set its affinity. This is
1000 * important for shared interrupt handlers as we do
1001 * not invoke setup_affinity() for the secondary
1002 * handlers as everything is already set up. Even for
1003 * interrupts marked with IRQF_NO_BALANCE this is
1004 * correct as we want the thread to move to the cpu(s)
1005 * on which the requesting code placed the interrupt.
1006 */
1007 set_bit(IRQTF_AFFINITY, &new->thread_flags);
3aa551c9
TG
1008 }
1009
3b8249e7
TG
1010 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
1011 ret = -ENOMEM;
1012 goto out_thread;
1013 }
1014
dc9b229a
TG
1015 /*
1016 * Drivers are often written to work w/o knowledge about the
1017 * underlying irq chip implementation, so a request for a
1018 * threaded irq without a primary hard irq context handler
1019 * requires the ONESHOT flag to be set. Some irq chips like
1020 * MSI based interrupts are per se one shot safe. Check the
1021 * chip flags, so we can avoid the unmask dance at the end of
1022 * the threaded handler for those.
1023 */
1024 if (desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)
1025 new->flags &= ~IRQF_ONESHOT;
1026
1da177e4
LT
1027 /*
1028 * The following block of code has to be executed atomically
1029 */
239007b8 1030 raw_spin_lock_irqsave(&desc->lock, flags);
f17c7545
IM
1031 old_ptr = &desc->action;
1032 old = *old_ptr;
06fcb0c6 1033 if (old) {
e76de9f8
TG
1034 /*
1035 * Can't share interrupts unless both agree to and are
1036 * the same type (level, edge, polarity). So both flag
3cca53b0 1037 * fields must have IRQF_SHARED set and the bits which
9d591edd
TG
1038 * set the trigger type must match. Also all must
1039 * agree on ONESHOT.
e76de9f8 1040 */
3cca53b0 1041 if (!((old->flags & new->flags) & IRQF_SHARED) ||
9d591edd 1042 ((old->flags ^ new->flags) & IRQF_TRIGGER_MASK) ||
f5d89470 1043 ((old->flags ^ new->flags) & IRQF_ONESHOT))
f5163427
DS
1044 goto mismatch;
1045
f5163427 1046 /* All handlers must agree on per-cpuness */
3cca53b0
TG
1047 if ((old->flags & IRQF_PERCPU) !=
1048 (new->flags & IRQF_PERCPU))
f5163427 1049 goto mismatch;
1da177e4
LT
1050
1051 /* add new interrupt at end of irq queue */
1052 do {
52abb700
TG
1053 /*
1054 * Or all existing action->thread_mask bits,
1055 * so we can find the next zero bit for this
1056 * new action.
1057 */
b5faba21 1058 thread_mask |= old->thread_mask;
f17c7545
IM
1059 old_ptr = &old->next;
1060 old = *old_ptr;
1da177e4
LT
1061 } while (old);
1062 shared = 1;
1063 }
1064
b5faba21 1065 /*
52abb700
TG
1066 * Setup the thread mask for this irqaction for ONESHOT. For
1067 * !ONESHOT irqs the thread mask is 0 so we can avoid a
1068 * conditional in irq_wake_thread().
b5faba21 1069 */
52abb700
TG
1070 if (new->flags & IRQF_ONESHOT) {
1071 /*
1072 * Unlikely to have 32 resp 64 irqs sharing one line,
1073 * but who knows.
1074 */
1075 if (thread_mask == ~0UL) {
1076 ret = -EBUSY;
1077 goto out_mask;
1078 }
1079 /*
1080 * The thread_mask for the action is or'ed to
1081 * desc->thread_active to indicate that the
1082 * IRQF_ONESHOT thread handler has been woken, but not
1083 * yet finished. The bit is cleared when a thread
1084 * completes. When all threads of a shared interrupt
1085 * line have completed desc->threads_active becomes
1086 * zero and the interrupt line is unmasked. See
1087 * handle.c:irq_wake_thread() for further information.
1088 *
1089 * If no thread is woken by primary (hard irq context)
1090 * interrupt handlers, then desc->threads_active is
1091 * also checked for zero to unmask the irq line in the
1092 * affected hard irq flow handlers
1093 * (handle_[fasteoi|level]_irq).
1094 *
1095 * The new action gets the first zero bit of
1096 * thread_mask assigned. See the loop above which or's
1097 * all existing action->thread_mask bits.
1098 */
1099 new->thread_mask = 1 << ffz(thread_mask);
1c6c6952 1100
dc9b229a
TG
1101 } else if (new->handler == irq_default_primary_handler &&
1102 !(desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)) {
1c6c6952
TG
1103 /*
1104 * The interrupt was requested with handler = NULL, so
1105 * we use the default primary handler for it. But it
1106 * does not have the oneshot flag set. In combination
1107 * with level interrupts this is deadly, because the
1108 * default primary handler just wakes the thread, then
1109 * the irq lines is reenabled, but the device still
1110 * has the level irq asserted. Rinse and repeat....
1111 *
1112 * While this works for edge type interrupts, we play
1113 * it safe and reject unconditionally because we can't
1114 * say for sure which type this interrupt really
1115 * has. The type flags are unreliable as the
1116 * underlying chip implementation can override them.
1117 */
97fd75b7 1118 pr_err("Threaded irq requested with handler=NULL and !ONESHOT for irq %d\n",
1c6c6952
TG
1119 irq);
1120 ret = -EINVAL;
1121 goto out_mask;
b5faba21 1122 }
b5faba21 1123
1da177e4 1124 if (!shared) {
3aa551c9
TG
1125 init_waitqueue_head(&desc->wait_for_threads);
1126
e76de9f8 1127 /* Setup the type (level, edge polarity) if configured: */
3cca53b0 1128 if (new->flags & IRQF_TRIGGER_MASK) {
f2b662da
DB
1129 ret = __irq_set_trigger(desc, irq,
1130 new->flags & IRQF_TRIGGER_MASK);
82736f4d 1131
3aa551c9 1132 if (ret)
3b8249e7 1133 goto out_mask;
091738a2 1134 }
6a6de9ef 1135
009b4c3b 1136 desc->istate &= ~(IRQS_AUTODETECT | IRQS_SPURIOUS_DISABLED | \
32f4125e
TG
1137 IRQS_ONESHOT | IRQS_WAITING);
1138 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
94d39e1f 1139
a005677b
TG
1140 if (new->flags & IRQF_PERCPU) {
1141 irqd_set(&desc->irq_data, IRQD_PER_CPU);
1142 irq_settings_set_per_cpu(desc);
1143 }
6a58fb3b 1144
b25c340c 1145 if (new->flags & IRQF_ONESHOT)
3d67baec 1146 desc->istate |= IRQS_ONESHOT;
b25c340c 1147
1ccb4e61 1148 if (irq_settings_can_autoenable(desc))
b4bc724e 1149 irq_startup(desc, true);
46999238 1150 else
e76de9f8
TG
1151 /* Undo nested disables: */
1152 desc->depth = 1;
18404756 1153
612e3684 1154 /* Exclude IRQ from balancing if requested */
a005677b
TG
1155 if (new->flags & IRQF_NOBALANCING) {
1156 irq_settings_set_no_balancing(desc);
1157 irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
1158 }
612e3684 1159
18404756 1160 /* Set default affinity mask once everything is setup */
3b8249e7 1161 setup_affinity(irq, desc, mask);
0c5d1eb7 1162
876dbd4c
TG
1163 } else if (new->flags & IRQF_TRIGGER_MASK) {
1164 unsigned int nmsk = new->flags & IRQF_TRIGGER_MASK;
1165 unsigned int omsk = irq_settings_get_trigger_mask(desc);
1166
1167 if (nmsk != omsk)
1168 /* hope the handler works with current trigger mode */
97fd75b7 1169 pr_warning("irq %d uses trigger mode %u; requested %u\n",
876dbd4c 1170 irq, nmsk, omsk);
1da177e4 1171 }
82736f4d 1172
69ab8494 1173 new->irq = irq;
f17c7545 1174 *old_ptr = new;
82736f4d 1175
8528b0f1
LT
1176 /* Reset broken irq detection when installing new handler */
1177 desc->irq_count = 0;
1178 desc->irqs_unhandled = 0;
1adb0850
TG
1179
1180 /*
1181 * Check whether we disabled the irq via the spurious handler
1182 * before. Reenable it and give it another chance.
1183 */
7acdd53e
TG
1184 if (shared && (desc->istate & IRQS_SPURIOUS_DISABLED)) {
1185 desc->istate &= ~IRQS_SPURIOUS_DISABLED;
0a0c5168 1186 __enable_irq(desc, irq, false);
1adb0850
TG
1187 }
1188
239007b8 1189 raw_spin_unlock_irqrestore(&desc->lock, flags);
1da177e4 1190
69ab8494
TG
1191 /*
1192 * Strictly no need to wake it up, but hung_task complains
1193 * when no hard interrupt wakes the thread up.
1194 */
1195 if (new->thread)
1196 wake_up_process(new->thread);
1197
2c6927a3 1198 register_irq_proc(irq, desc);
1da177e4
LT
1199 new->dir = NULL;
1200 register_handler_proc(irq, new);
4f5058c3 1201 free_cpumask_var(mask);
1da177e4
LT
1202
1203 return 0;
f5163427
DS
1204
1205mismatch:
3cca53b0 1206 if (!(new->flags & IRQF_PROBE_SHARED)) {
97fd75b7 1207 pr_err("Flags mismatch irq %d. %08x (%s) vs. %08x (%s)\n",
f5d89470
TG
1208 irq, new->flags, new->name, old->flags, old->name);
1209#ifdef CONFIG_DEBUG_SHIRQ
13e87ec6 1210 dump_stack();
3f050447 1211#endif
f5d89470 1212 }
3aa551c9
TG
1213 ret = -EBUSY;
1214
3b8249e7 1215out_mask:
1c389795 1216 raw_spin_unlock_irqrestore(&desc->lock, flags);
3b8249e7
TG
1217 free_cpumask_var(mask);
1218
3aa551c9 1219out_thread:
3aa551c9
TG
1220 if (new->thread) {
1221 struct task_struct *t = new->thread;
1222
1223 new->thread = NULL;
05d74efa 1224 kthread_stop(t);
3aa551c9
TG
1225 put_task_struct(t);
1226 }
b6873807
SAS
1227out_mput:
1228 module_put(desc->owner);
3aa551c9 1229 return ret;
1da177e4
LT
1230}
1231
d3c60047
TG
1232/**
1233 * setup_irq - setup an interrupt
1234 * @irq: Interrupt line to setup
1235 * @act: irqaction for the interrupt
1236 *
1237 * Used to statically setup interrupts in the early boot process.
1238 */
1239int setup_irq(unsigned int irq, struct irqaction *act)
1240{
986c011d 1241 int retval;
d3c60047
TG
1242 struct irq_desc *desc = irq_to_desc(irq);
1243
31d9d9b6
MZ
1244 if (WARN_ON(irq_settings_is_per_cpu_devid(desc)))
1245 return -EINVAL;
986c011d
DD
1246 chip_bus_lock(desc);
1247 retval = __setup_irq(irq, desc, act);
1248 chip_bus_sync_unlock(desc);
1249
1250 return retval;
d3c60047 1251}
eb53b4e8 1252EXPORT_SYMBOL_GPL(setup_irq);
d3c60047 1253
31d9d9b6 1254/*
cbf94f06
MD
1255 * Internal function to unregister an irqaction - used to free
1256 * regular and special interrupts that are part of the architecture.
1da177e4 1257 */
cbf94f06 1258static struct irqaction *__free_irq(unsigned int irq, void *dev_id)
1da177e4 1259{
d3c60047 1260 struct irq_desc *desc = irq_to_desc(irq);
f17c7545 1261 struct irqaction *action, **action_ptr;
1da177e4
LT
1262 unsigned long flags;
1263
ae88a23b 1264 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
7d94f7ca 1265
7d94f7ca 1266 if (!desc)
f21cfb25 1267 return NULL;
1da177e4 1268
239007b8 1269 raw_spin_lock_irqsave(&desc->lock, flags);
ae88a23b
IM
1270
1271 /*
1272 * There can be multiple actions per IRQ descriptor, find the right
1273 * one based on the dev_id:
1274 */
f17c7545 1275 action_ptr = &desc->action;
1da177e4 1276 for (;;) {
f17c7545 1277 action = *action_ptr;
1da177e4 1278
ae88a23b
IM
1279 if (!action) {
1280 WARN(1, "Trying to free already-free IRQ %d\n", irq);
239007b8 1281 raw_spin_unlock_irqrestore(&desc->lock, flags);
1da177e4 1282
f21cfb25 1283 return NULL;
ae88a23b 1284 }
1da177e4 1285
8316e381
IM
1286 if (action->dev_id == dev_id)
1287 break;
f17c7545 1288 action_ptr = &action->next;
ae88a23b 1289 }
dbce706e 1290
ae88a23b 1291 /* Found it - now remove it from the list of entries: */
f17c7545 1292 *action_ptr = action->next;
ae88a23b 1293
ae88a23b 1294 /* If this was the last handler, shut down the IRQ line: */
46999238
TG
1295 if (!desc->action)
1296 irq_shutdown(desc);
3aa551c9 1297
e7a297b0
PWJ
1298#ifdef CONFIG_SMP
1299 /* make sure affinity_hint is cleaned up */
1300 if (WARN_ON_ONCE(desc->affinity_hint))
1301 desc->affinity_hint = NULL;
1302#endif
1303
239007b8 1304 raw_spin_unlock_irqrestore(&desc->lock, flags);
ae88a23b
IM
1305
1306 unregister_handler_proc(irq, action);
1307
1308 /* Make sure it's not being used on another CPU: */
1309 synchronize_irq(irq);
1da177e4 1310
70edcd77 1311#ifdef CONFIG_DEBUG_SHIRQ
ae88a23b
IM
1312 /*
1313 * It's a shared IRQ -- the driver ought to be prepared for an IRQ
1314 * event to happen even now it's being freed, so let's make sure that
1315 * is so by doing an extra call to the handler ....
1316 *
1317 * ( We do this after actually deregistering it, to make sure that a
1318 * 'real' IRQ doesn't run in * parallel with our fake. )
1319 */
1320 if (action->flags & IRQF_SHARED) {
1321 local_irq_save(flags);
1322 action->handler(irq, dev_id);
1323 local_irq_restore(flags);
1da177e4 1324 }
ae88a23b 1325#endif
2d860ad7
LT
1326
1327 if (action->thread) {
05d74efa 1328 kthread_stop(action->thread);
2d860ad7
LT
1329 put_task_struct(action->thread);
1330 }
1331
b6873807 1332 module_put(desc->owner);
f21cfb25
MD
1333 return action;
1334}
1335
cbf94f06
MD
1336/**
1337 * remove_irq - free an interrupt
1338 * @irq: Interrupt line to free
1339 * @act: irqaction for the interrupt
1340 *
1341 * Used to remove interrupts statically setup by the early boot process.
1342 */
1343void remove_irq(unsigned int irq, struct irqaction *act)
1344{
31d9d9b6
MZ
1345 struct irq_desc *desc = irq_to_desc(irq);
1346
1347 if (desc && !WARN_ON(irq_settings_is_per_cpu_devid(desc)))
1348 __free_irq(irq, act->dev_id);
cbf94f06 1349}
eb53b4e8 1350EXPORT_SYMBOL_GPL(remove_irq);
cbf94f06 1351
f21cfb25
MD
1352/**
1353 * free_irq - free an interrupt allocated with request_irq
1354 * @irq: Interrupt line to free
1355 * @dev_id: Device identity to free
1356 *
1357 * Remove an interrupt handler. The handler is removed and if the
1358 * interrupt line is no longer in use by any driver it is disabled.
1359 * On a shared IRQ the caller must ensure the interrupt is disabled
1360 * on the card it drives before calling this function. The function
1361 * does not return until any executing interrupts for this IRQ
1362 * have completed.
1363 *
1364 * This function must not be called from interrupt context.
1365 */
1366void free_irq(unsigned int irq, void *dev_id)
1367{
70aedd24
TG
1368 struct irq_desc *desc = irq_to_desc(irq);
1369
31d9d9b6 1370 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
70aedd24
TG
1371 return;
1372
cd7eab44
BH
1373#ifdef CONFIG_SMP
1374 if (WARN_ON(desc->affinity_notify))
1375 desc->affinity_notify = NULL;
1376#endif
1377
3876ec9e 1378 chip_bus_lock(desc);
cbf94f06 1379 kfree(__free_irq(irq, dev_id));
3876ec9e 1380 chip_bus_sync_unlock(desc);
1da177e4 1381}
1da177e4
LT
1382EXPORT_SYMBOL(free_irq);
1383
1384/**
3aa551c9 1385 * request_threaded_irq - allocate an interrupt line
1da177e4 1386 * @irq: Interrupt line to allocate
3aa551c9
TG
1387 * @handler: Function to be called when the IRQ occurs.
1388 * Primary handler for threaded interrupts
b25c340c
TG
1389 * If NULL and thread_fn != NULL the default
1390 * primary handler is installed
f48fe81e
TG
1391 * @thread_fn: Function called from the irq handler thread
1392 * If NULL, no irq thread is created
1da177e4
LT
1393 * @irqflags: Interrupt type flags
1394 * @devname: An ascii name for the claiming device
1395 * @dev_id: A cookie passed back to the handler function
1396 *
1397 * This call allocates interrupt resources and enables the
1398 * interrupt line and IRQ handling. From the point this
1399 * call is made your handler function may be invoked. Since
1400 * your handler function must clear any interrupt the board
1401 * raises, you must take care both to initialise your hardware
1402 * and to set up the interrupt handler in the right order.
1403 *
3aa551c9 1404 * If you want to set up a threaded irq handler for your device
6d21af4f 1405 * then you need to supply @handler and @thread_fn. @handler is
3aa551c9
TG
1406 * still called in hard interrupt context and has to check
1407 * whether the interrupt originates from the device. If yes it
1408 * needs to disable the interrupt on the device and return
39a2eddb 1409 * IRQ_WAKE_THREAD which will wake up the handler thread and run
3aa551c9
TG
1410 * @thread_fn. This split handler design is necessary to support
1411 * shared interrupts.
1412 *
1da177e4
LT
1413 * Dev_id must be globally unique. Normally the address of the
1414 * device data structure is used as the cookie. Since the handler
1415 * receives this value it makes sense to use it.
1416 *
1417 * If your interrupt is shared you must pass a non NULL dev_id
1418 * as this is required when freeing the interrupt.
1419 *
1420 * Flags:
1421 *
3cca53b0 1422 * IRQF_SHARED Interrupt is shared
0c5d1eb7 1423 * IRQF_TRIGGER_* Specify active edge(s) or level
1da177e4
LT
1424 *
1425 */
3aa551c9
TG
1426int request_threaded_irq(unsigned int irq, irq_handler_t handler,
1427 irq_handler_t thread_fn, unsigned long irqflags,
1428 const char *devname, void *dev_id)
1da177e4 1429{
06fcb0c6 1430 struct irqaction *action;
08678b08 1431 struct irq_desc *desc;
d3c60047 1432 int retval;
1da177e4
LT
1433
1434 /*
1435 * Sanity-check: shared interrupts must pass in a real dev-ID,
1436 * otherwise we'll have trouble later trying to figure out
1437 * which interrupt is which (messes up the interrupt freeing
1438 * logic etc).
1439 */
3cca53b0 1440 if ((irqflags & IRQF_SHARED) && !dev_id)
1da177e4 1441 return -EINVAL;
7d94f7ca 1442
cb5bc832 1443 desc = irq_to_desc(irq);
7d94f7ca 1444 if (!desc)
1da177e4 1445 return -EINVAL;
7d94f7ca 1446
31d9d9b6
MZ
1447 if (!irq_settings_can_request(desc) ||
1448 WARN_ON(irq_settings_is_per_cpu_devid(desc)))
6550c775 1449 return -EINVAL;
b25c340c
TG
1450
1451 if (!handler) {
1452 if (!thread_fn)
1453 return -EINVAL;
1454 handler = irq_default_primary_handler;
1455 }
1da177e4 1456
45535732 1457 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1da177e4
LT
1458 if (!action)
1459 return -ENOMEM;
1460
1461 action->handler = handler;
3aa551c9 1462 action->thread_fn = thread_fn;
1da177e4 1463 action->flags = irqflags;
1da177e4 1464 action->name = devname;
1da177e4
LT
1465 action->dev_id = dev_id;
1466
3876ec9e 1467 chip_bus_lock(desc);
d3c60047 1468 retval = __setup_irq(irq, desc, action);
3876ec9e 1469 chip_bus_sync_unlock(desc);
70aedd24 1470
377bf1e4
AV
1471 if (retval)
1472 kfree(action);
1473
6d83f94d 1474#ifdef CONFIG_DEBUG_SHIRQ_FIXME
6ce51c43 1475 if (!retval && (irqflags & IRQF_SHARED)) {
a304e1b8
DW
1476 /*
1477 * It's a shared IRQ -- the driver ought to be prepared for it
1478 * to happen immediately, so let's make sure....
377bf1e4
AV
1479 * We disable the irq to make sure that a 'real' IRQ doesn't
1480 * run in parallel with our fake.
a304e1b8 1481 */
59845b1f 1482 unsigned long flags;
a304e1b8 1483
377bf1e4 1484 disable_irq(irq);
59845b1f 1485 local_irq_save(flags);
377bf1e4 1486
59845b1f 1487 handler(irq, dev_id);
377bf1e4 1488
59845b1f 1489 local_irq_restore(flags);
377bf1e4 1490 enable_irq(irq);
a304e1b8
DW
1491 }
1492#endif
1da177e4
LT
1493 return retval;
1494}
3aa551c9 1495EXPORT_SYMBOL(request_threaded_irq);
ae731f8d
MZ
1496
1497/**
1498 * request_any_context_irq - allocate an interrupt line
1499 * @irq: Interrupt line to allocate
1500 * @handler: Function to be called when the IRQ occurs.
1501 * Threaded handler for threaded interrupts.
1502 * @flags: Interrupt type flags
1503 * @name: An ascii name for the claiming device
1504 * @dev_id: A cookie passed back to the handler function
1505 *
1506 * This call allocates interrupt resources and enables the
1507 * interrupt line and IRQ handling. It selects either a
1508 * hardirq or threaded handling method depending on the
1509 * context.
1510 *
1511 * On failure, it returns a negative value. On success,
1512 * it returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED.
1513 */
1514int request_any_context_irq(unsigned int irq, irq_handler_t handler,
1515 unsigned long flags, const char *name, void *dev_id)
1516{
1517 struct irq_desc *desc = irq_to_desc(irq);
1518 int ret;
1519
1520 if (!desc)
1521 return -EINVAL;
1522
1ccb4e61 1523 if (irq_settings_is_nested_thread(desc)) {
ae731f8d
MZ
1524 ret = request_threaded_irq(irq, NULL, handler,
1525 flags, name, dev_id);
1526 return !ret ? IRQC_IS_NESTED : ret;
1527 }
1528
1529 ret = request_irq(irq, handler, flags, name, dev_id);
1530 return !ret ? IRQC_IS_HARDIRQ : ret;
1531}
1532EXPORT_SYMBOL_GPL(request_any_context_irq);
31d9d9b6 1533
1e7c5fd2 1534void enable_percpu_irq(unsigned int irq, unsigned int type)
31d9d9b6
MZ
1535{
1536 unsigned int cpu = smp_processor_id();
1537 unsigned long flags;
1538 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1539
1540 if (!desc)
1541 return;
1542
1e7c5fd2
MZ
1543 type &= IRQ_TYPE_SENSE_MASK;
1544 if (type != IRQ_TYPE_NONE) {
1545 int ret;
1546
1547 ret = __irq_set_trigger(desc, irq, type);
1548
1549 if (ret) {
32cffdde 1550 WARN(1, "failed to set type for IRQ%d\n", irq);
1e7c5fd2
MZ
1551 goto out;
1552 }
1553 }
1554
31d9d9b6 1555 irq_percpu_enable(desc, cpu);
1e7c5fd2 1556out:
31d9d9b6
MZ
1557 irq_put_desc_unlock(desc, flags);
1558}
36a5df85 1559EXPORT_SYMBOL_GPL(enable_percpu_irq);
31d9d9b6
MZ
1560
1561void disable_percpu_irq(unsigned int irq)
1562{
1563 unsigned int cpu = smp_processor_id();
1564 unsigned long flags;
1565 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1566
1567 if (!desc)
1568 return;
1569
1570 irq_percpu_disable(desc, cpu);
1571 irq_put_desc_unlock(desc, flags);
1572}
36a5df85 1573EXPORT_SYMBOL_GPL(disable_percpu_irq);
31d9d9b6
MZ
1574
1575/*
1576 * Internal function to unregister a percpu irqaction.
1577 */
1578static struct irqaction *__free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1579{
1580 struct irq_desc *desc = irq_to_desc(irq);
1581 struct irqaction *action;
1582 unsigned long flags;
1583
1584 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
1585
1586 if (!desc)
1587 return NULL;
1588
1589 raw_spin_lock_irqsave(&desc->lock, flags);
1590
1591 action = desc->action;
1592 if (!action || action->percpu_dev_id != dev_id) {
1593 WARN(1, "Trying to free already-free IRQ %d\n", irq);
1594 goto bad;
1595 }
1596
1597 if (!cpumask_empty(desc->percpu_enabled)) {
1598 WARN(1, "percpu IRQ %d still enabled on CPU%d!\n",
1599 irq, cpumask_first(desc->percpu_enabled));
1600 goto bad;
1601 }
1602
1603 /* Found it - now remove it from the list of entries: */
1604 desc->action = NULL;
1605
1606 raw_spin_unlock_irqrestore(&desc->lock, flags);
1607
1608 unregister_handler_proc(irq, action);
1609
1610 module_put(desc->owner);
1611 return action;
1612
1613bad:
1614 raw_spin_unlock_irqrestore(&desc->lock, flags);
1615 return NULL;
1616}
1617
1618/**
1619 * remove_percpu_irq - free a per-cpu interrupt
1620 * @irq: Interrupt line to free
1621 * @act: irqaction for the interrupt
1622 *
1623 * Used to remove interrupts statically setup by the early boot process.
1624 */
1625void remove_percpu_irq(unsigned int irq, struct irqaction *act)
1626{
1627 struct irq_desc *desc = irq_to_desc(irq);
1628
1629 if (desc && irq_settings_is_per_cpu_devid(desc))
1630 __free_percpu_irq(irq, act->percpu_dev_id);
1631}
1632
1633/**
1634 * free_percpu_irq - free an interrupt allocated with request_percpu_irq
1635 * @irq: Interrupt line to free
1636 * @dev_id: Device identity to free
1637 *
1638 * Remove a percpu interrupt handler. The handler is removed, but
1639 * the interrupt line is not disabled. This must be done on each
1640 * CPU before calling this function. The function does not return
1641 * until any executing interrupts for this IRQ have completed.
1642 *
1643 * This function must not be called from interrupt context.
1644 */
1645void free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1646{
1647 struct irq_desc *desc = irq_to_desc(irq);
1648
1649 if (!desc || !irq_settings_is_per_cpu_devid(desc))
1650 return;
1651
1652 chip_bus_lock(desc);
1653 kfree(__free_percpu_irq(irq, dev_id));
1654 chip_bus_sync_unlock(desc);
1655}
1656
1657/**
1658 * setup_percpu_irq - setup a per-cpu interrupt
1659 * @irq: Interrupt line to setup
1660 * @act: irqaction for the interrupt
1661 *
1662 * Used to statically setup per-cpu interrupts in the early boot process.
1663 */
1664int setup_percpu_irq(unsigned int irq, struct irqaction *act)
1665{
1666 struct irq_desc *desc = irq_to_desc(irq);
1667 int retval;
1668
1669 if (!desc || !irq_settings_is_per_cpu_devid(desc))
1670 return -EINVAL;
1671 chip_bus_lock(desc);
1672 retval = __setup_irq(irq, desc, act);
1673 chip_bus_sync_unlock(desc);
1674
1675 return retval;
1676}
1677
1678/**
1679 * request_percpu_irq - allocate a percpu interrupt line
1680 * @irq: Interrupt line to allocate
1681 * @handler: Function to be called when the IRQ occurs.
1682 * @devname: An ascii name for the claiming device
1683 * @dev_id: A percpu cookie passed back to the handler function
1684 *
1685 * This call allocates interrupt resources, but doesn't
1686 * automatically enable the interrupt. It has to be done on each
1687 * CPU using enable_percpu_irq().
1688 *
1689 * Dev_id must be globally unique. It is a per-cpu variable, and
1690 * the handler gets called with the interrupted CPU's instance of
1691 * that variable.
1692 */
1693int request_percpu_irq(unsigned int irq, irq_handler_t handler,
1694 const char *devname, void __percpu *dev_id)
1695{
1696 struct irqaction *action;
1697 struct irq_desc *desc;
1698 int retval;
1699
1700 if (!dev_id)
1701 return -EINVAL;
1702
1703 desc = irq_to_desc(irq);
1704 if (!desc || !irq_settings_can_request(desc) ||
1705 !irq_settings_is_per_cpu_devid(desc))
1706 return -EINVAL;
1707
1708 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1709 if (!action)
1710 return -ENOMEM;
1711
1712 action->handler = handler;
2ed0e645 1713 action->flags = IRQF_PERCPU | IRQF_NO_SUSPEND;
31d9d9b6
MZ
1714 action->name = devname;
1715 action->percpu_dev_id = dev_id;
1716
1717 chip_bus_lock(desc);
1718 retval = __setup_irq(irq, desc, action);
1719 chip_bus_sync_unlock(desc);
1720
1721 if (retval)
1722 kfree(action);
1723
1724 return retval;
1725}
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