Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/kernel/irq/manage.c | |
3 | * | |
a34db9b2 IM |
4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar |
5 | * Copyright (C) 2005-2006 Thomas Gleixner | |
1da177e4 LT |
6 | * |
7 | * This file contains driver APIs to the irq subsystem. | |
8 | */ | |
9 | ||
10 | #include <linux/irq.h> | |
11 | #include <linux/module.h> | |
12 | #include <linux/random.h> | |
13 | #include <linux/interrupt.h> | |
1aeb272c | 14 | #include <linux/slab.h> |
1da177e4 LT |
15 | |
16 | #include "internals.h" | |
17 | ||
18 | #ifdef CONFIG_SMP | |
19 | ||
18404756 MK |
20 | cpumask_t irq_default_affinity = CPU_MASK_ALL; |
21 | ||
1da177e4 LT |
22 | /** |
23 | * synchronize_irq - wait for pending IRQ handlers (on other CPUs) | |
1e5d5331 | 24 | * @irq: interrupt number to wait for |
1da177e4 LT |
25 | * |
26 | * This function waits for any pending IRQ handlers for this interrupt | |
27 | * to complete before returning. If you use this function while | |
28 | * holding a resource the IRQ handler may need you will deadlock. | |
29 | * | |
30 | * This function may be called - with care - from IRQ context. | |
31 | */ | |
32 | void synchronize_irq(unsigned int irq) | |
33 | { | |
cb5bc832 | 34 | struct irq_desc *desc = irq_to_desc(irq); |
a98ce5c6 | 35 | unsigned int status; |
1da177e4 | 36 | |
7d94f7ca | 37 | if (!desc) |
c2b5a251 MW |
38 | return; |
39 | ||
a98ce5c6 HX |
40 | do { |
41 | unsigned long flags; | |
42 | ||
43 | /* | |
44 | * Wait until we're out of the critical section. This might | |
45 | * give the wrong answer due to the lack of memory barriers. | |
46 | */ | |
47 | while (desc->status & IRQ_INPROGRESS) | |
48 | cpu_relax(); | |
49 | ||
50 | /* Ok, that indicated we're done: double-check carefully. */ | |
51 | spin_lock_irqsave(&desc->lock, flags); | |
52 | status = desc->status; | |
53 | spin_unlock_irqrestore(&desc->lock, flags); | |
54 | ||
55 | /* Oops, that failed? */ | |
56 | } while (status & IRQ_INPROGRESS); | |
1da177e4 | 57 | } |
1da177e4 LT |
58 | EXPORT_SYMBOL(synchronize_irq); |
59 | ||
771ee3b0 TG |
60 | /** |
61 | * irq_can_set_affinity - Check if the affinity of a given irq can be set | |
62 | * @irq: Interrupt to check | |
63 | * | |
64 | */ | |
65 | int irq_can_set_affinity(unsigned int irq) | |
66 | { | |
08678b08 | 67 | struct irq_desc *desc = irq_to_desc(irq); |
771ee3b0 TG |
68 | |
69 | if (CHECK_IRQ_PER_CPU(desc->status) || !desc->chip || | |
70 | !desc->chip->set_affinity) | |
71 | return 0; | |
72 | ||
73 | return 1; | |
74 | } | |
75 | ||
76 | /** | |
77 | * irq_set_affinity - Set the irq affinity of a given irq | |
78 | * @irq: Interrupt to set affinity | |
79 | * @cpumask: cpumask | |
80 | * | |
81 | */ | |
82 | int irq_set_affinity(unsigned int irq, cpumask_t cpumask) | |
83 | { | |
08678b08 | 84 | struct irq_desc *desc = irq_to_desc(irq); |
771ee3b0 TG |
85 | |
86 | if (!desc->chip->set_affinity) | |
87 | return -EINVAL; | |
88 | ||
771ee3b0 | 89 | #ifdef CONFIG_GENERIC_PENDING_IRQ |
72b1e22d SS |
90 | if (desc->status & IRQ_MOVE_PCNTXT) { |
91 | unsigned long flags; | |
92 | ||
93 | spin_lock_irqsave(&desc->lock, flags); | |
94 | desc->chip->set_affinity(irq, cpumask); | |
95 | spin_unlock_irqrestore(&desc->lock, flags); | |
96 | } else | |
97 | set_pending_irq(irq, cpumask); | |
771ee3b0 TG |
98 | #else |
99 | desc->affinity = cpumask; | |
100 | desc->chip->set_affinity(irq, cpumask); | |
101 | #endif | |
102 | return 0; | |
103 | } | |
104 | ||
18404756 MK |
105 | #ifndef CONFIG_AUTO_IRQ_AFFINITY |
106 | /* | |
107 | * Generic version of the affinity autoselector. | |
108 | */ | |
109 | int irq_select_affinity(unsigned int irq) | |
110 | { | |
111 | cpumask_t mask; | |
08678b08 | 112 | struct irq_desc *desc; |
18404756 MK |
113 | |
114 | if (!irq_can_set_affinity(irq)) | |
115 | return 0; | |
116 | ||
117 | cpus_and(mask, cpu_online_map, irq_default_affinity); | |
118 | ||
08678b08 YL |
119 | desc = irq_to_desc(irq); |
120 | desc->affinity = mask; | |
121 | desc->chip->set_affinity(irq, mask); | |
18404756 | 122 | |
18404756 MK |
123 | return 0; |
124 | } | |
125 | #endif | |
126 | ||
1da177e4 LT |
127 | #endif |
128 | ||
129 | /** | |
130 | * disable_irq_nosync - disable an irq without waiting | |
131 | * @irq: Interrupt to disable | |
132 | * | |
133 | * Disable the selected interrupt line. Disables and Enables are | |
134 | * nested. | |
135 | * Unlike disable_irq(), this function does not ensure existing | |
136 | * instances of the IRQ handler have completed before returning. | |
137 | * | |
138 | * This function may be called from IRQ context. | |
139 | */ | |
140 | void disable_irq_nosync(unsigned int irq) | |
141 | { | |
7d94f7ca | 142 | struct irq_desc *desc; |
1da177e4 LT |
143 | unsigned long flags; |
144 | ||
cb5bc832 | 145 | desc = irq_to_desc(irq); |
7d94f7ca | 146 | if (!desc) |
c2b5a251 MW |
147 | return; |
148 | ||
1da177e4 LT |
149 | spin_lock_irqsave(&desc->lock, flags); |
150 | if (!desc->depth++) { | |
151 | desc->status |= IRQ_DISABLED; | |
d1bef4ed | 152 | desc->chip->disable(irq); |
1da177e4 LT |
153 | } |
154 | spin_unlock_irqrestore(&desc->lock, flags); | |
155 | } | |
1da177e4 LT |
156 | EXPORT_SYMBOL(disable_irq_nosync); |
157 | ||
158 | /** | |
159 | * disable_irq - disable an irq and wait for completion | |
160 | * @irq: Interrupt to disable | |
161 | * | |
162 | * Disable the selected interrupt line. Enables and Disables are | |
163 | * nested. | |
164 | * This function waits for any pending IRQ handlers for this interrupt | |
165 | * to complete before returning. If you use this function while | |
166 | * holding a resource the IRQ handler may need you will deadlock. | |
167 | * | |
168 | * This function may be called - with care - from IRQ context. | |
169 | */ | |
170 | void disable_irq(unsigned int irq) | |
171 | { | |
7d94f7ca | 172 | struct irq_desc *desc; |
1da177e4 | 173 | |
cb5bc832 | 174 | desc = irq_to_desc(irq); |
7d94f7ca | 175 | if (!desc) |
c2b5a251 MW |
176 | return; |
177 | ||
1da177e4 LT |
178 | disable_irq_nosync(irq); |
179 | if (desc->action) | |
180 | synchronize_irq(irq); | |
181 | } | |
1da177e4 LT |
182 | EXPORT_SYMBOL(disable_irq); |
183 | ||
1adb0850 TG |
184 | static void __enable_irq(struct irq_desc *desc, unsigned int irq) |
185 | { | |
186 | switch (desc->depth) { | |
187 | case 0: | |
b8c512f6 | 188 | WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n", irq); |
1adb0850 TG |
189 | break; |
190 | case 1: { | |
191 | unsigned int status = desc->status & ~IRQ_DISABLED; | |
192 | ||
193 | /* Prevent probing on this irq: */ | |
194 | desc->status = status | IRQ_NOPROBE; | |
195 | check_irq_resend(desc, irq); | |
196 | /* fall-through */ | |
197 | } | |
198 | default: | |
199 | desc->depth--; | |
200 | } | |
201 | } | |
202 | ||
1da177e4 LT |
203 | /** |
204 | * enable_irq - enable handling of an irq | |
205 | * @irq: Interrupt to enable | |
206 | * | |
207 | * Undoes the effect of one call to disable_irq(). If this | |
208 | * matches the last disable, processing of interrupts on this | |
209 | * IRQ line is re-enabled. | |
210 | * | |
211 | * This function may be called from IRQ context. | |
212 | */ | |
213 | void enable_irq(unsigned int irq) | |
214 | { | |
7d94f7ca | 215 | struct irq_desc *desc; |
1da177e4 LT |
216 | unsigned long flags; |
217 | ||
cb5bc832 | 218 | desc = irq_to_desc(irq); |
7d94f7ca | 219 | if (!desc) |
c2b5a251 MW |
220 | return; |
221 | ||
1da177e4 | 222 | spin_lock_irqsave(&desc->lock, flags); |
1adb0850 | 223 | __enable_irq(desc, irq); |
1da177e4 LT |
224 | spin_unlock_irqrestore(&desc->lock, flags); |
225 | } | |
1da177e4 LT |
226 | EXPORT_SYMBOL(enable_irq); |
227 | ||
0c5d1eb7 | 228 | static int set_irq_wake_real(unsigned int irq, unsigned int on) |
2db87321 | 229 | { |
08678b08 | 230 | struct irq_desc *desc = irq_to_desc(irq); |
2db87321 UKK |
231 | int ret = -ENXIO; |
232 | ||
233 | if (desc->chip->set_wake) | |
234 | ret = desc->chip->set_wake(irq, on); | |
235 | ||
236 | return ret; | |
237 | } | |
238 | ||
ba9a2331 TG |
239 | /** |
240 | * set_irq_wake - control irq power management wakeup | |
241 | * @irq: interrupt to control | |
242 | * @on: enable/disable power management wakeup | |
243 | * | |
15a647eb DB |
244 | * Enable/disable power management wakeup mode, which is |
245 | * disabled by default. Enables and disables must match, | |
246 | * just as they match for non-wakeup mode support. | |
247 | * | |
248 | * Wakeup mode lets this IRQ wake the system from sleep | |
249 | * states like "suspend to RAM". | |
ba9a2331 TG |
250 | */ |
251 | int set_irq_wake(unsigned int irq, unsigned int on) | |
252 | { | |
08678b08 | 253 | struct irq_desc *desc = irq_to_desc(irq); |
ba9a2331 | 254 | unsigned long flags; |
2db87321 | 255 | int ret = 0; |
ba9a2331 | 256 | |
15a647eb DB |
257 | /* wakeup-capable irqs can be shared between drivers that |
258 | * don't need to have the same sleep mode behaviors. | |
259 | */ | |
ba9a2331 | 260 | spin_lock_irqsave(&desc->lock, flags); |
15a647eb | 261 | if (on) { |
2db87321 UKK |
262 | if (desc->wake_depth++ == 0) { |
263 | ret = set_irq_wake_real(irq, on); | |
264 | if (ret) | |
265 | desc->wake_depth = 0; | |
266 | else | |
267 | desc->status |= IRQ_WAKEUP; | |
268 | } | |
15a647eb DB |
269 | } else { |
270 | if (desc->wake_depth == 0) { | |
7a2c4770 | 271 | WARN(1, "Unbalanced IRQ %d wake disable\n", irq); |
2db87321 UKK |
272 | } else if (--desc->wake_depth == 0) { |
273 | ret = set_irq_wake_real(irq, on); | |
274 | if (ret) | |
275 | desc->wake_depth = 1; | |
276 | else | |
277 | desc->status &= ~IRQ_WAKEUP; | |
278 | } | |
15a647eb | 279 | } |
2db87321 | 280 | |
ba9a2331 TG |
281 | spin_unlock_irqrestore(&desc->lock, flags); |
282 | return ret; | |
283 | } | |
284 | EXPORT_SYMBOL(set_irq_wake); | |
285 | ||
1da177e4 LT |
286 | /* |
287 | * Internal function that tells the architecture code whether a | |
288 | * particular irq has been exclusively allocated or is available | |
289 | * for driver use. | |
290 | */ | |
291 | int can_request_irq(unsigned int irq, unsigned long irqflags) | |
292 | { | |
7d94f7ca | 293 | struct irq_desc *desc; |
1da177e4 LT |
294 | struct irqaction *action; |
295 | ||
cb5bc832 | 296 | desc = irq_to_desc(irq); |
7d94f7ca YL |
297 | if (!desc) |
298 | return 0; | |
299 | ||
300 | if (desc->status & IRQ_NOREQUEST) | |
1da177e4 LT |
301 | return 0; |
302 | ||
08678b08 | 303 | action = desc->action; |
1da177e4 | 304 | if (action) |
3cca53b0 | 305 | if (irqflags & action->flags & IRQF_SHARED) |
1da177e4 LT |
306 | action = NULL; |
307 | ||
308 | return !action; | |
309 | } | |
310 | ||
6a6de9ef TG |
311 | void compat_irq_chip_set_default_handler(struct irq_desc *desc) |
312 | { | |
313 | /* | |
314 | * If the architecture still has not overriden | |
315 | * the flow handler then zap the default. This | |
316 | * should catch incorrect flow-type setting. | |
317 | */ | |
318 | if (desc->handle_irq == &handle_bad_irq) | |
319 | desc->handle_irq = NULL; | |
320 | } | |
321 | ||
0c5d1eb7 | 322 | int __irq_set_trigger(struct irq_desc *desc, unsigned int irq, |
82736f4d UKK |
323 | unsigned long flags) |
324 | { | |
325 | int ret; | |
0c5d1eb7 | 326 | struct irq_chip *chip = desc->chip; |
82736f4d UKK |
327 | |
328 | if (!chip || !chip->set_type) { | |
329 | /* | |
330 | * IRQF_TRIGGER_* but the PIC does not support multiple | |
331 | * flow-types? | |
332 | */ | |
333 | pr_warning("No set_type function for IRQ %d (%s)\n", irq, | |
334 | chip ? (chip->name ? : "unknown") : "unknown"); | |
335 | return 0; | |
336 | } | |
337 | ||
338 | ret = chip->set_type(irq, flags & IRQF_TRIGGER_MASK); | |
339 | ||
340 | if (ret) | |
c69ad71b DB |
341 | pr_err("setting trigger mode %d for irq %u failed (%pF)\n", |
342 | (int)(flags & IRQF_TRIGGER_MASK), | |
82736f4d | 343 | irq, chip->set_type); |
0c5d1eb7 DB |
344 | else { |
345 | /* note that IRQF_TRIGGER_MASK == IRQ_TYPE_SENSE_MASK */ | |
346 | desc->status &= ~IRQ_TYPE_SENSE_MASK; | |
347 | desc->status |= flags & IRQ_TYPE_SENSE_MASK; | |
348 | } | |
82736f4d UKK |
349 | |
350 | return ret; | |
351 | } | |
352 | ||
1da177e4 LT |
353 | /* |
354 | * Internal function to register an irqaction - typically used to | |
355 | * allocate special interrupts that are part of the architecture. | |
356 | */ | |
06fcb0c6 | 357 | int setup_irq(unsigned int irq, struct irqaction *new) |
1da177e4 | 358 | { |
7d94f7ca | 359 | struct irq_desc *desc; |
1da177e4 | 360 | struct irqaction *old, **p; |
8b126b77 | 361 | const char *old_name = NULL; |
1da177e4 LT |
362 | unsigned long flags; |
363 | int shared = 0; | |
82736f4d | 364 | int ret; |
1da177e4 | 365 | |
cb5bc832 | 366 | desc = irq_to_desc(irq); |
7d94f7ca | 367 | if (!desc) |
c2b5a251 MW |
368 | return -EINVAL; |
369 | ||
f1c2662c | 370 | if (desc->chip == &no_irq_chip) |
1da177e4 LT |
371 | return -ENOSYS; |
372 | /* | |
373 | * Some drivers like serial.c use request_irq() heavily, | |
374 | * so we have to be careful not to interfere with a | |
375 | * running system. | |
376 | */ | |
3cca53b0 | 377 | if (new->flags & IRQF_SAMPLE_RANDOM) { |
1da177e4 LT |
378 | /* |
379 | * This function might sleep, we want to call it first, | |
380 | * outside of the atomic block. | |
381 | * Yes, this might clear the entropy pool if the wrong | |
382 | * driver is attempted to be loaded, without actually | |
383 | * installing a new handler, but is this really a problem, | |
384 | * only the sysadmin is able to do this. | |
385 | */ | |
386 | rand_initialize_irq(irq); | |
387 | } | |
388 | ||
389 | /* | |
390 | * The following block of code has to be executed atomically | |
391 | */ | |
06fcb0c6 | 392 | spin_lock_irqsave(&desc->lock, flags); |
1da177e4 | 393 | p = &desc->action; |
06fcb0c6 IM |
394 | old = *p; |
395 | if (old) { | |
e76de9f8 TG |
396 | /* |
397 | * Can't share interrupts unless both agree to and are | |
398 | * the same type (level, edge, polarity). So both flag | |
3cca53b0 | 399 | * fields must have IRQF_SHARED set and the bits which |
e76de9f8 TG |
400 | * set the trigger type must match. |
401 | */ | |
3cca53b0 | 402 | if (!((old->flags & new->flags) & IRQF_SHARED) || |
8b126b77 AM |
403 | ((old->flags ^ new->flags) & IRQF_TRIGGER_MASK)) { |
404 | old_name = old->name; | |
f5163427 | 405 | goto mismatch; |
8b126b77 | 406 | } |
f5163427 | 407 | |
284c6680 | 408 | #if defined(CONFIG_IRQ_PER_CPU) |
f5163427 | 409 | /* All handlers must agree on per-cpuness */ |
3cca53b0 TG |
410 | if ((old->flags & IRQF_PERCPU) != |
411 | (new->flags & IRQF_PERCPU)) | |
f5163427 DS |
412 | goto mismatch; |
413 | #endif | |
1da177e4 LT |
414 | |
415 | /* add new interrupt at end of irq queue */ | |
416 | do { | |
417 | p = &old->next; | |
418 | old = *p; | |
419 | } while (old); | |
420 | shared = 1; | |
421 | } | |
422 | ||
1da177e4 | 423 | if (!shared) { |
6a6de9ef | 424 | irq_chip_set_defaults(desc->chip); |
e76de9f8 TG |
425 | |
426 | /* Setup the type (level, edge polarity) if configured: */ | |
3cca53b0 | 427 | if (new->flags & IRQF_TRIGGER_MASK) { |
0c5d1eb7 | 428 | ret = __irq_set_trigger(desc, irq, new->flags); |
82736f4d UKK |
429 | |
430 | if (ret) { | |
431 | spin_unlock_irqrestore(&desc->lock, flags); | |
432 | return ret; | |
433 | } | |
e76de9f8 TG |
434 | } else |
435 | compat_irq_chip_set_default_handler(desc); | |
82736f4d UKK |
436 | #if defined(CONFIG_IRQ_PER_CPU) |
437 | if (new->flags & IRQF_PERCPU) | |
438 | desc->status |= IRQ_PER_CPU; | |
439 | #endif | |
6a6de9ef | 440 | |
94d39e1f | 441 | desc->status &= ~(IRQ_AUTODETECT | IRQ_WAITING | |
1adb0850 | 442 | IRQ_INPROGRESS | IRQ_SPURIOUS_DISABLED); |
94d39e1f TG |
443 | |
444 | if (!(desc->status & IRQ_NOAUTOEN)) { | |
445 | desc->depth = 0; | |
446 | desc->status &= ~IRQ_DISABLED; | |
7e6e178a | 447 | desc->chip->startup(irq); |
e76de9f8 TG |
448 | } else |
449 | /* Undo nested disables: */ | |
450 | desc->depth = 1; | |
18404756 MK |
451 | |
452 | /* Set default affinity mask once everything is setup */ | |
453 | irq_select_affinity(irq); | |
0c5d1eb7 DB |
454 | |
455 | } else if ((new->flags & IRQF_TRIGGER_MASK) | |
456 | && (new->flags & IRQF_TRIGGER_MASK) | |
457 | != (desc->status & IRQ_TYPE_SENSE_MASK)) { | |
458 | /* hope the handler works with the actual trigger mode... */ | |
459 | pr_warning("IRQ %d uses trigger mode %d; requested %d\n", | |
460 | irq, (int)(desc->status & IRQ_TYPE_SENSE_MASK), | |
461 | (int)(new->flags & IRQF_TRIGGER_MASK)); | |
1da177e4 | 462 | } |
82736f4d UKK |
463 | |
464 | *p = new; | |
465 | ||
466 | /* Exclude IRQ from balancing */ | |
467 | if (new->flags & IRQF_NOBALANCING) | |
468 | desc->status |= IRQ_NO_BALANCING; | |
469 | ||
8528b0f1 LT |
470 | /* Reset broken irq detection when installing new handler */ |
471 | desc->irq_count = 0; | |
472 | desc->irqs_unhandled = 0; | |
1adb0850 TG |
473 | |
474 | /* | |
475 | * Check whether we disabled the irq via the spurious handler | |
476 | * before. Reenable it and give it another chance. | |
477 | */ | |
478 | if (shared && (desc->status & IRQ_SPURIOUS_DISABLED)) { | |
479 | desc->status &= ~IRQ_SPURIOUS_DISABLED; | |
480 | __enable_irq(desc, irq); | |
481 | } | |
482 | ||
06fcb0c6 | 483 | spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 LT |
484 | |
485 | new->irq = irq; | |
2c6927a3 | 486 | register_irq_proc(irq, desc); |
1da177e4 LT |
487 | new->dir = NULL; |
488 | register_handler_proc(irq, new); | |
489 | ||
490 | return 0; | |
f5163427 DS |
491 | |
492 | mismatch: | |
3f050447 | 493 | #ifdef CONFIG_DEBUG_SHIRQ |
3cca53b0 | 494 | if (!(new->flags & IRQF_PROBE_SHARED)) { |
e8c4b9d0 | 495 | printk(KERN_ERR "IRQ handler type mismatch for IRQ %d\n", irq); |
8b126b77 AM |
496 | if (old_name) |
497 | printk(KERN_ERR "current handler: %s\n", old_name); | |
13e87ec6 AM |
498 | dump_stack(); |
499 | } | |
3f050447 | 500 | #endif |
8b126b77 | 501 | spin_unlock_irqrestore(&desc->lock, flags); |
f5163427 | 502 | return -EBUSY; |
1da177e4 LT |
503 | } |
504 | ||
505 | /** | |
506 | * free_irq - free an interrupt | |
507 | * @irq: Interrupt line to free | |
508 | * @dev_id: Device identity to free | |
509 | * | |
510 | * Remove an interrupt handler. The handler is removed and if the | |
511 | * interrupt line is no longer in use by any driver it is disabled. | |
512 | * On a shared IRQ the caller must ensure the interrupt is disabled | |
513 | * on the card it drives before calling this function. The function | |
514 | * does not return until any executing interrupts for this IRQ | |
515 | * have completed. | |
516 | * | |
517 | * This function must not be called from interrupt context. | |
518 | */ | |
519 | void free_irq(unsigned int irq, void *dev_id) | |
520 | { | |
521 | struct irq_desc *desc; | |
522 | struct irqaction **p; | |
523 | unsigned long flags; | |
524 | ||
cd7b24bb | 525 | WARN_ON(in_interrupt()); |
7d94f7ca | 526 | |
cb5bc832 | 527 | desc = irq_to_desc(irq); |
7d94f7ca | 528 | if (!desc) |
1da177e4 LT |
529 | return; |
530 | ||
06fcb0c6 | 531 | spin_lock_irqsave(&desc->lock, flags); |
1da177e4 LT |
532 | p = &desc->action; |
533 | for (;;) { | |
06fcb0c6 | 534 | struct irqaction *action = *p; |
1da177e4 LT |
535 | |
536 | if (action) { | |
537 | struct irqaction **pp = p; | |
538 | ||
539 | p = &action->next; | |
540 | if (action->dev_id != dev_id) | |
541 | continue; | |
542 | ||
543 | /* Found it - now remove it from the list of entries */ | |
544 | *pp = action->next; | |
dbce706e | 545 | |
b77d6adc PBG |
546 | /* Currently used only by UML, might disappear one day.*/ |
547 | #ifdef CONFIG_IRQ_RELEASE_METHOD | |
d1bef4ed IM |
548 | if (desc->chip->release) |
549 | desc->chip->release(irq, dev_id); | |
b77d6adc | 550 | #endif |
dbce706e | 551 | |
1da177e4 LT |
552 | if (!desc->action) { |
553 | desc->status |= IRQ_DISABLED; | |
d1bef4ed IM |
554 | if (desc->chip->shutdown) |
555 | desc->chip->shutdown(irq); | |
1da177e4 | 556 | else |
d1bef4ed | 557 | desc->chip->disable(irq); |
1da177e4 | 558 | } |
06fcb0c6 | 559 | spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 LT |
560 | unregister_handler_proc(irq, action); |
561 | ||
562 | /* Make sure it's not being used on another CPU */ | |
563 | synchronize_irq(irq); | |
1d99493b DW |
564 | #ifdef CONFIG_DEBUG_SHIRQ |
565 | /* | |
566 | * It's a shared IRQ -- the driver ought to be | |
567 | * prepared for it to happen even now it's | |
568 | * being freed, so let's make sure.... We do | |
569 | * this after actually deregistering it, to | |
570 | * make sure that a 'real' IRQ doesn't run in | |
571 | * parallel with our fake | |
572 | */ | |
573 | if (action->flags & IRQF_SHARED) { | |
574 | local_irq_save(flags); | |
575 | action->handler(irq, dev_id); | |
576 | local_irq_restore(flags); | |
577 | } | |
578 | #endif | |
1da177e4 LT |
579 | kfree(action); |
580 | return; | |
581 | } | |
e8c4b9d0 | 582 | printk(KERN_ERR "Trying to free already-free IRQ %d\n", irq); |
70edcd77 IM |
583 | #ifdef CONFIG_DEBUG_SHIRQ |
584 | dump_stack(); | |
585 | #endif | |
06fcb0c6 | 586 | spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 LT |
587 | return; |
588 | } | |
589 | } | |
1da177e4 LT |
590 | EXPORT_SYMBOL(free_irq); |
591 | ||
592 | /** | |
593 | * request_irq - allocate an interrupt line | |
594 | * @irq: Interrupt line to allocate | |
595 | * @handler: Function to be called when the IRQ occurs | |
596 | * @irqflags: Interrupt type flags | |
597 | * @devname: An ascii name for the claiming device | |
598 | * @dev_id: A cookie passed back to the handler function | |
599 | * | |
600 | * This call allocates interrupt resources and enables the | |
601 | * interrupt line and IRQ handling. From the point this | |
602 | * call is made your handler function may be invoked. Since | |
603 | * your handler function must clear any interrupt the board | |
604 | * raises, you must take care both to initialise your hardware | |
605 | * and to set up the interrupt handler in the right order. | |
606 | * | |
607 | * Dev_id must be globally unique. Normally the address of the | |
608 | * device data structure is used as the cookie. Since the handler | |
609 | * receives this value it makes sense to use it. | |
610 | * | |
611 | * If your interrupt is shared you must pass a non NULL dev_id | |
612 | * as this is required when freeing the interrupt. | |
613 | * | |
614 | * Flags: | |
615 | * | |
3cca53b0 TG |
616 | * IRQF_SHARED Interrupt is shared |
617 | * IRQF_DISABLED Disable local interrupts while processing | |
618 | * IRQF_SAMPLE_RANDOM The interrupt can be used for entropy | |
0c5d1eb7 | 619 | * IRQF_TRIGGER_* Specify active edge(s) or level |
1da177e4 LT |
620 | * |
621 | */ | |
da482792 | 622 | int request_irq(unsigned int irq, irq_handler_t handler, |
06fcb0c6 | 623 | unsigned long irqflags, const char *devname, void *dev_id) |
1da177e4 | 624 | { |
06fcb0c6 | 625 | struct irqaction *action; |
1da177e4 | 626 | int retval; |
08678b08 | 627 | struct irq_desc *desc; |
1da177e4 | 628 | |
fbb9ce95 IM |
629 | #ifdef CONFIG_LOCKDEP |
630 | /* | |
631 | * Lockdep wants atomic interrupt handlers: | |
632 | */ | |
38515e90 | 633 | irqflags |= IRQF_DISABLED; |
fbb9ce95 | 634 | #endif |
1da177e4 LT |
635 | /* |
636 | * Sanity-check: shared interrupts must pass in a real dev-ID, | |
637 | * otherwise we'll have trouble later trying to figure out | |
638 | * which interrupt is which (messes up the interrupt freeing | |
639 | * logic etc). | |
640 | */ | |
3cca53b0 | 641 | if ((irqflags & IRQF_SHARED) && !dev_id) |
1da177e4 | 642 | return -EINVAL; |
7d94f7ca | 643 | |
cb5bc832 | 644 | desc = irq_to_desc(irq); |
7d94f7ca | 645 | if (!desc) |
1da177e4 | 646 | return -EINVAL; |
7d94f7ca | 647 | |
08678b08 | 648 | if (desc->status & IRQ_NOREQUEST) |
6550c775 | 649 | return -EINVAL; |
1da177e4 LT |
650 | if (!handler) |
651 | return -EINVAL; | |
652 | ||
653 | action = kmalloc(sizeof(struct irqaction), GFP_ATOMIC); | |
654 | if (!action) | |
655 | return -ENOMEM; | |
656 | ||
657 | action->handler = handler; | |
658 | action->flags = irqflags; | |
659 | cpus_clear(action->mask); | |
660 | action->name = devname; | |
661 | action->next = NULL; | |
662 | action->dev_id = dev_id; | |
663 | ||
377bf1e4 AV |
664 | retval = setup_irq(irq, action); |
665 | if (retval) | |
666 | kfree(action); | |
667 | ||
a304e1b8 DW |
668 | #ifdef CONFIG_DEBUG_SHIRQ |
669 | if (irqflags & IRQF_SHARED) { | |
670 | /* | |
671 | * It's a shared IRQ -- the driver ought to be prepared for it | |
672 | * to happen immediately, so let's make sure.... | |
377bf1e4 AV |
673 | * We disable the irq to make sure that a 'real' IRQ doesn't |
674 | * run in parallel with our fake. | |
a304e1b8 | 675 | */ |
59845b1f | 676 | unsigned long flags; |
a304e1b8 | 677 | |
377bf1e4 | 678 | disable_irq(irq); |
59845b1f | 679 | local_irq_save(flags); |
377bf1e4 | 680 | |
59845b1f | 681 | handler(irq, dev_id); |
377bf1e4 | 682 | |
59845b1f | 683 | local_irq_restore(flags); |
377bf1e4 | 684 | enable_irq(irq); |
a304e1b8 DW |
685 | } |
686 | #endif | |
1da177e4 LT |
687 | return retval; |
688 | } | |
1da177e4 | 689 | EXPORT_SYMBOL(request_irq); |