genirq: Introduce IRQD_AFFINITY_MANAGED flag
[deliverable/linux.git] / kernel / irq / manage.c
CommitLineData
1da177e4
LT
1/*
2 * linux/kernel/irq/manage.c
3 *
a34db9b2
IM
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006 Thomas Gleixner
1da177e4
LT
6 *
7 * This file contains driver APIs to the irq subsystem.
8 */
9
97fd75b7
AM
10#define pr_fmt(fmt) "genirq: " fmt
11
1da177e4 12#include <linux/irq.h>
3aa551c9 13#include <linux/kthread.h>
1da177e4
LT
14#include <linux/module.h>
15#include <linux/random.h>
16#include <linux/interrupt.h>
1aeb272c 17#include <linux/slab.h>
3aa551c9 18#include <linux/sched.h>
8bd75c77 19#include <linux/sched/rt.h>
4d1d61a6 20#include <linux/task_work.h>
1da177e4
LT
21
22#include "internals.h"
23
8d32a307
TG
24#ifdef CONFIG_IRQ_FORCED_THREADING
25__read_mostly bool force_irqthreads;
26
27static int __init setup_forced_irqthreads(char *arg)
28{
29 force_irqthreads = true;
30 return 0;
31}
32early_param("threadirqs", setup_forced_irqthreads);
33#endif
34
18258f72 35static void __synchronize_hardirq(struct irq_desc *desc)
1da177e4 36{
32f4125e 37 bool inprogress;
1da177e4 38
a98ce5c6
HX
39 do {
40 unsigned long flags;
41
42 /*
43 * Wait until we're out of the critical section. This might
44 * give the wrong answer due to the lack of memory barriers.
45 */
32f4125e 46 while (irqd_irq_inprogress(&desc->irq_data))
a98ce5c6
HX
47 cpu_relax();
48
49 /* Ok, that indicated we're done: double-check carefully. */
239007b8 50 raw_spin_lock_irqsave(&desc->lock, flags);
32f4125e 51 inprogress = irqd_irq_inprogress(&desc->irq_data);
239007b8 52 raw_spin_unlock_irqrestore(&desc->lock, flags);
a98ce5c6
HX
53
54 /* Oops, that failed? */
32f4125e 55 } while (inprogress);
18258f72
TG
56}
57
58/**
59 * synchronize_hardirq - wait for pending hard IRQ handlers (on other CPUs)
60 * @irq: interrupt number to wait for
61 *
62 * This function waits for any pending hard IRQ handlers for this
63 * interrupt to complete before returning. If you use this
64 * function while holding a resource the IRQ handler may need you
65 * will deadlock. It does not take associated threaded handlers
66 * into account.
67 *
68 * Do not use this for shutdown scenarios where you must be sure
69 * that all parts (hardirq and threaded handler) have completed.
70 *
02cea395
PZ
71 * Returns: false if a threaded handler is active.
72 *
18258f72
TG
73 * This function may be called - with care - from IRQ context.
74 */
02cea395 75bool synchronize_hardirq(unsigned int irq)
18258f72
TG
76{
77 struct irq_desc *desc = irq_to_desc(irq);
3aa551c9 78
02cea395 79 if (desc) {
18258f72 80 __synchronize_hardirq(desc);
02cea395
PZ
81 return !atomic_read(&desc->threads_active);
82 }
83
84 return true;
18258f72
TG
85}
86EXPORT_SYMBOL(synchronize_hardirq);
87
88/**
89 * synchronize_irq - wait for pending IRQ handlers (on other CPUs)
90 * @irq: interrupt number to wait for
91 *
92 * This function waits for any pending IRQ handlers for this interrupt
93 * to complete before returning. If you use this function while
94 * holding a resource the IRQ handler may need you will deadlock.
95 *
96 * This function may be called - with care - from IRQ context.
97 */
98void synchronize_irq(unsigned int irq)
99{
100 struct irq_desc *desc = irq_to_desc(irq);
101
102 if (desc) {
103 __synchronize_hardirq(desc);
104 /*
105 * We made sure that no hardirq handler is
106 * running. Now verify that no threaded handlers are
107 * active.
108 */
109 wait_event(desc->wait_for_threads,
110 !atomic_read(&desc->threads_active));
111 }
1da177e4 112}
1da177e4
LT
113EXPORT_SYMBOL(synchronize_irq);
114
3aa551c9
TG
115#ifdef CONFIG_SMP
116cpumask_var_t irq_default_affinity;
117
9c255583 118static bool __irq_can_set_affinity(struct irq_desc *desc)
e019c249
JL
119{
120 if (!desc || !irqd_can_balance(&desc->irq_data) ||
121 !desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity)
9c255583
TG
122 return false;
123 return true;
e019c249
JL
124}
125
771ee3b0
TG
126/**
127 * irq_can_set_affinity - Check if the affinity of a given irq can be set
128 * @irq: Interrupt to check
129 *
130 */
131int irq_can_set_affinity(unsigned int irq)
132{
e019c249 133 return __irq_can_set_affinity(irq_to_desc(irq));
771ee3b0
TG
134}
135
9c255583
TG
136/**
137 * irq_can_set_affinity_usr - Check if affinity of a irq can be set from user space
138 * @irq: Interrupt to check
139 *
140 * Like irq_can_set_affinity() above, but additionally checks for the
141 * AFFINITY_MANAGED flag.
142 */
143bool irq_can_set_affinity_usr(unsigned int irq)
144{
145 struct irq_desc *desc = irq_to_desc(irq);
146
147 return __irq_can_set_affinity(desc) &&
148 !irqd_affinity_is_managed(&desc->irq_data);
149}
150
591d2fb0
TG
151/**
152 * irq_set_thread_affinity - Notify irq threads to adjust affinity
153 * @desc: irq descriptor which has affitnity changed
154 *
155 * We just set IRQTF_AFFINITY and delegate the affinity setting
156 * to the interrupt thread itself. We can not call
157 * set_cpus_allowed_ptr() here as we hold desc->lock and this
158 * code can be called from hard interrupt context.
159 */
160void irq_set_thread_affinity(struct irq_desc *desc)
3aa551c9 161{
f944b5a7 162 struct irqaction *action;
3aa551c9 163
f944b5a7 164 for_each_action_of_desc(desc, action)
3aa551c9 165 if (action->thread)
591d2fb0 166 set_bit(IRQTF_AFFINITY, &action->thread_flags);
3aa551c9
TG
167}
168
1fa46f1f 169#ifdef CONFIG_GENERIC_PENDING_IRQ
0ef5ca1e 170static inline bool irq_can_move_pcntxt(struct irq_data *data)
1fa46f1f 171{
0ef5ca1e 172 return irqd_can_move_in_process_context(data);
1fa46f1f 173}
0ef5ca1e 174static inline bool irq_move_pending(struct irq_data *data)
1fa46f1f 175{
0ef5ca1e 176 return irqd_is_setaffinity_pending(data);
1fa46f1f
TG
177}
178static inline void
179irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask)
180{
181 cpumask_copy(desc->pending_mask, mask);
182}
183static inline void
184irq_get_pending(struct cpumask *mask, struct irq_desc *desc)
185{
186 cpumask_copy(mask, desc->pending_mask);
187}
188#else
0ef5ca1e 189static inline bool irq_can_move_pcntxt(struct irq_data *data) { return true; }
cd22c0e4 190static inline bool irq_move_pending(struct irq_data *data) { return false; }
1fa46f1f
TG
191static inline void
192irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask) { }
193static inline void
194irq_get_pending(struct cpumask *mask, struct irq_desc *desc) { }
195#endif
196
818b0f3b
JL
197int irq_do_set_affinity(struct irq_data *data, const struct cpumask *mask,
198 bool force)
199{
200 struct irq_desc *desc = irq_data_to_desc(data);
201 struct irq_chip *chip = irq_data_get_irq_chip(data);
202 int ret;
203
01f8fa4f 204 ret = chip->irq_set_affinity(data, mask, force);
818b0f3b
JL
205 switch (ret) {
206 case IRQ_SET_MASK_OK:
2cb62547 207 case IRQ_SET_MASK_OK_DONE:
9df872fa 208 cpumask_copy(desc->irq_common_data.affinity, mask);
818b0f3b
JL
209 case IRQ_SET_MASK_OK_NOCOPY:
210 irq_set_thread_affinity(desc);
211 ret = 0;
212 }
213
214 return ret;
215}
216
01f8fa4f
TG
217int irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask,
218 bool force)
771ee3b0 219{
c2d0c555
DD
220 struct irq_chip *chip = irq_data_get_irq_chip(data);
221 struct irq_desc *desc = irq_data_to_desc(data);
1fa46f1f 222 int ret = 0;
771ee3b0 223
c2d0c555 224 if (!chip || !chip->irq_set_affinity)
771ee3b0
TG
225 return -EINVAL;
226
0ef5ca1e 227 if (irq_can_move_pcntxt(data)) {
01f8fa4f 228 ret = irq_do_set_affinity(data, mask, force);
1fa46f1f 229 } else {
c2d0c555 230 irqd_set_move_pending(data);
1fa46f1f 231 irq_copy_pending(desc, mask);
57b150cc 232 }
1fa46f1f 233
cd7eab44
BH
234 if (desc->affinity_notify) {
235 kref_get(&desc->affinity_notify->kref);
236 schedule_work(&desc->affinity_notify->work);
237 }
c2d0c555
DD
238 irqd_set(data, IRQD_AFFINITY_SET);
239
240 return ret;
241}
242
01f8fa4f 243int __irq_set_affinity(unsigned int irq, const struct cpumask *mask, bool force)
c2d0c555
DD
244{
245 struct irq_desc *desc = irq_to_desc(irq);
246 unsigned long flags;
247 int ret;
248
249 if (!desc)
250 return -EINVAL;
251
252 raw_spin_lock_irqsave(&desc->lock, flags);
01f8fa4f 253 ret = irq_set_affinity_locked(irq_desc_get_irq_data(desc), mask, force);
239007b8 254 raw_spin_unlock_irqrestore(&desc->lock, flags);
1fa46f1f 255 return ret;
771ee3b0
TG
256}
257
e7a297b0
PWJ
258int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m)
259{
e7a297b0 260 unsigned long flags;
31d9d9b6 261 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
e7a297b0
PWJ
262
263 if (!desc)
264 return -EINVAL;
e7a297b0 265 desc->affinity_hint = m;
02725e74 266 irq_put_desc_unlock(desc, flags);
e2e64a93 267 /* set the initial affinity to prevent every interrupt being on CPU0 */
4fe7ffb7
JB
268 if (m)
269 __irq_set_affinity(irq, m, false);
e7a297b0
PWJ
270 return 0;
271}
272EXPORT_SYMBOL_GPL(irq_set_affinity_hint);
273
cd7eab44
BH
274static void irq_affinity_notify(struct work_struct *work)
275{
276 struct irq_affinity_notify *notify =
277 container_of(work, struct irq_affinity_notify, work);
278 struct irq_desc *desc = irq_to_desc(notify->irq);
279 cpumask_var_t cpumask;
280 unsigned long flags;
281
1fa46f1f 282 if (!desc || !alloc_cpumask_var(&cpumask, GFP_KERNEL))
cd7eab44
BH
283 goto out;
284
285 raw_spin_lock_irqsave(&desc->lock, flags);
0ef5ca1e 286 if (irq_move_pending(&desc->irq_data))
1fa46f1f 287 irq_get_pending(cpumask, desc);
cd7eab44 288 else
9df872fa 289 cpumask_copy(cpumask, desc->irq_common_data.affinity);
cd7eab44
BH
290 raw_spin_unlock_irqrestore(&desc->lock, flags);
291
292 notify->notify(notify, cpumask);
293
294 free_cpumask_var(cpumask);
295out:
296 kref_put(&notify->kref, notify->release);
297}
298
299/**
300 * irq_set_affinity_notifier - control notification of IRQ affinity changes
301 * @irq: Interrupt for which to enable/disable notification
302 * @notify: Context for notification, or %NULL to disable
303 * notification. Function pointers must be initialised;
304 * the other fields will be initialised by this function.
305 *
306 * Must be called in process context. Notification may only be enabled
307 * after the IRQ is allocated and must be disabled before the IRQ is
308 * freed using free_irq().
309 */
310int
311irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify)
312{
313 struct irq_desc *desc = irq_to_desc(irq);
314 struct irq_affinity_notify *old_notify;
315 unsigned long flags;
316
317 /* The release function is promised process context */
318 might_sleep();
319
320 if (!desc)
321 return -EINVAL;
322
323 /* Complete initialisation of *notify */
324 if (notify) {
325 notify->irq = irq;
326 kref_init(&notify->kref);
327 INIT_WORK(&notify->work, irq_affinity_notify);
328 }
329
330 raw_spin_lock_irqsave(&desc->lock, flags);
331 old_notify = desc->affinity_notify;
332 desc->affinity_notify = notify;
333 raw_spin_unlock_irqrestore(&desc->lock, flags);
334
335 if (old_notify)
336 kref_put(&old_notify->kref, old_notify->release);
337
338 return 0;
339}
340EXPORT_SYMBOL_GPL(irq_set_affinity_notifier);
341
18404756
MK
342#ifndef CONFIG_AUTO_IRQ_AFFINITY
343/*
344 * Generic version of the affinity autoselector.
345 */
a8a98eac 346static int setup_affinity(struct irq_desc *desc, struct cpumask *mask)
18404756 347{
569bda8d 348 struct cpumask *set = irq_default_affinity;
6783011b 349 int node = irq_desc_get_node(desc);
569bda8d 350
b008207c 351 /* Excludes PER_CPU and NO_BALANCE interrupts */
e019c249 352 if (!__irq_can_set_affinity(desc))
18404756
MK
353 return 0;
354
f6d87f4b
TG
355 /*
356 * Preserve an userspace affinity setup, but make sure that
357 * one of the targets is online.
358 */
2bdd1055 359 if (irqd_has_set(&desc->irq_data, IRQD_AFFINITY_SET)) {
9df872fa 360 if (cpumask_intersects(desc->irq_common_data.affinity,
569bda8d 361 cpu_online_mask))
9df872fa 362 set = desc->irq_common_data.affinity;
0c6f8a8b 363 else
2bdd1055 364 irqd_clear(&desc->irq_data, IRQD_AFFINITY_SET);
f6d87f4b 365 }
18404756 366
3b8249e7 367 cpumask_and(mask, cpu_online_mask, set);
241fc640
PB
368 if (node != NUMA_NO_NODE) {
369 const struct cpumask *nodemask = cpumask_of_node(node);
370
371 /* make sure at least one of the cpus in nodemask is online */
372 if (cpumask_intersects(mask, nodemask))
373 cpumask_and(mask, mask, nodemask);
374 }
818b0f3b 375 irq_do_set_affinity(&desc->irq_data, mask, false);
18404756
MK
376 return 0;
377}
f6d87f4b 378#else
a8a98eac
JL
379/* Wrapper for ALPHA specific affinity selector magic */
380static inline int setup_affinity(struct irq_desc *d, struct cpumask *mask)
f6d87f4b 381{
a8a98eac 382 return irq_select_affinity(irq_desc_get_irq(d));
f6d87f4b 383}
18404756
MK
384#endif
385
f6d87f4b
TG
386/*
387 * Called when affinity is set via /proc/irq
388 */
3b8249e7 389int irq_select_affinity_usr(unsigned int irq, struct cpumask *mask)
f6d87f4b
TG
390{
391 struct irq_desc *desc = irq_to_desc(irq);
392 unsigned long flags;
393 int ret;
394
239007b8 395 raw_spin_lock_irqsave(&desc->lock, flags);
a8a98eac 396 ret = setup_affinity(desc, mask);
239007b8 397 raw_spin_unlock_irqrestore(&desc->lock, flags);
f6d87f4b
TG
398 return ret;
399}
400
401#else
3b8249e7 402static inline int
a8a98eac 403setup_affinity(struct irq_desc *desc, struct cpumask *mask)
f6d87f4b
TG
404{
405 return 0;
406}
1da177e4
LT
407#endif
408
fcf1ae2f
FW
409/**
410 * irq_set_vcpu_affinity - Set vcpu affinity for the interrupt
411 * @irq: interrupt number to set affinity
412 * @vcpu_info: vCPU specific data
413 *
414 * This function uses the vCPU specific data to set the vCPU
415 * affinity for an irq. The vCPU specific data is passed from
416 * outside, such as KVM. One example code path is as below:
417 * KVM -> IOMMU -> irq_set_vcpu_affinity().
418 */
419int irq_set_vcpu_affinity(unsigned int irq, void *vcpu_info)
420{
421 unsigned long flags;
422 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
423 struct irq_data *data;
424 struct irq_chip *chip;
425 int ret = -ENOSYS;
426
427 if (!desc)
428 return -EINVAL;
429
430 data = irq_desc_get_irq_data(desc);
431 chip = irq_data_get_irq_chip(data);
432 if (chip && chip->irq_set_vcpu_affinity)
433 ret = chip->irq_set_vcpu_affinity(data, vcpu_info);
434 irq_put_desc_unlock(desc, flags);
435
436 return ret;
437}
438EXPORT_SYMBOL_GPL(irq_set_vcpu_affinity);
439
79ff1cda 440void __disable_irq(struct irq_desc *desc)
0a0c5168 441{
3aae994f 442 if (!desc->depth++)
87923470 443 irq_disable(desc);
0a0c5168
RW
444}
445
02725e74
TG
446static int __disable_irq_nosync(unsigned int irq)
447{
448 unsigned long flags;
31d9d9b6 449 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
02725e74
TG
450
451 if (!desc)
452 return -EINVAL;
79ff1cda 453 __disable_irq(desc);
02725e74
TG
454 irq_put_desc_busunlock(desc, flags);
455 return 0;
456}
457
1da177e4
LT
458/**
459 * disable_irq_nosync - disable an irq without waiting
460 * @irq: Interrupt to disable
461 *
462 * Disable the selected interrupt line. Disables and Enables are
463 * nested.
464 * Unlike disable_irq(), this function does not ensure existing
465 * instances of the IRQ handler have completed before returning.
466 *
467 * This function may be called from IRQ context.
468 */
469void disable_irq_nosync(unsigned int irq)
470{
02725e74 471 __disable_irq_nosync(irq);
1da177e4 472}
1da177e4
LT
473EXPORT_SYMBOL(disable_irq_nosync);
474
475/**
476 * disable_irq - disable an irq and wait for completion
477 * @irq: Interrupt to disable
478 *
479 * Disable the selected interrupt line. Enables and Disables are
480 * nested.
481 * This function waits for any pending IRQ handlers for this interrupt
482 * to complete before returning. If you use this function while
483 * holding a resource the IRQ handler may need you will deadlock.
484 *
485 * This function may be called - with care - from IRQ context.
486 */
487void disable_irq(unsigned int irq)
488{
02725e74 489 if (!__disable_irq_nosync(irq))
1da177e4
LT
490 synchronize_irq(irq);
491}
1da177e4
LT
492EXPORT_SYMBOL(disable_irq);
493
02cea395
PZ
494/**
495 * disable_hardirq - disables an irq and waits for hardirq completion
496 * @irq: Interrupt to disable
497 *
498 * Disable the selected interrupt line. Enables and Disables are
499 * nested.
500 * This function waits for any pending hard IRQ handlers for this
501 * interrupt to complete before returning. If you use this function while
502 * holding a resource the hard IRQ handler may need you will deadlock.
503 *
504 * When used to optimistically disable an interrupt from atomic context
505 * the return value must be checked.
506 *
507 * Returns: false if a threaded handler is active.
508 *
509 * This function may be called - with care - from IRQ context.
510 */
511bool disable_hardirq(unsigned int irq)
512{
513 if (!__disable_irq_nosync(irq))
514 return synchronize_hardirq(irq);
515
516 return false;
517}
518EXPORT_SYMBOL_GPL(disable_hardirq);
519
79ff1cda 520void __enable_irq(struct irq_desc *desc)
1adb0850
TG
521{
522 switch (desc->depth) {
523 case 0:
0a0c5168 524 err_out:
79ff1cda
JL
525 WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n",
526 irq_desc_get_irq(desc));
1adb0850
TG
527 break;
528 case 1: {
c531e836 529 if (desc->istate & IRQS_SUSPENDED)
0a0c5168 530 goto err_out;
1adb0850 531 /* Prevent probing on this irq: */
1ccb4e61 532 irq_settings_set_noprobe(desc);
3aae994f 533 irq_enable(desc);
0798abeb 534 check_irq_resend(desc);
1adb0850
TG
535 /* fall-through */
536 }
537 default:
538 desc->depth--;
539 }
540}
541
1da177e4
LT
542/**
543 * enable_irq - enable handling of an irq
544 * @irq: Interrupt to enable
545 *
546 * Undoes the effect of one call to disable_irq(). If this
547 * matches the last disable, processing of interrupts on this
548 * IRQ line is re-enabled.
549 *
70aedd24 550 * This function may be called from IRQ context only when
6b8ff312 551 * desc->irq_data.chip->bus_lock and desc->chip->bus_sync_unlock are NULL !
1da177e4
LT
552 */
553void enable_irq(unsigned int irq)
554{
1da177e4 555 unsigned long flags;
31d9d9b6 556 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
1da177e4 557
7d94f7ca 558 if (!desc)
c2b5a251 559 return;
50f7c032
TG
560 if (WARN(!desc->irq_data.chip,
561 KERN_ERR "enable_irq before setup/request_irq: irq %u\n", irq))
02725e74 562 goto out;
2656c366 563
79ff1cda 564 __enable_irq(desc);
02725e74
TG
565out:
566 irq_put_desc_busunlock(desc, flags);
1da177e4 567}
1da177e4
LT
568EXPORT_SYMBOL(enable_irq);
569
0c5d1eb7 570static int set_irq_wake_real(unsigned int irq, unsigned int on)
2db87321 571{
08678b08 572 struct irq_desc *desc = irq_to_desc(irq);
2db87321
UKK
573 int ret = -ENXIO;
574
60f96b41
SS
575 if (irq_desc_get_chip(desc)->flags & IRQCHIP_SKIP_SET_WAKE)
576 return 0;
577
2f7e99bb
TG
578 if (desc->irq_data.chip->irq_set_wake)
579 ret = desc->irq_data.chip->irq_set_wake(&desc->irq_data, on);
2db87321
UKK
580
581 return ret;
582}
583
ba9a2331 584/**
a0cd9ca2 585 * irq_set_irq_wake - control irq power management wakeup
ba9a2331
TG
586 * @irq: interrupt to control
587 * @on: enable/disable power management wakeup
588 *
15a647eb
DB
589 * Enable/disable power management wakeup mode, which is
590 * disabled by default. Enables and disables must match,
591 * just as they match for non-wakeup mode support.
592 *
593 * Wakeup mode lets this IRQ wake the system from sleep
594 * states like "suspend to RAM".
ba9a2331 595 */
a0cd9ca2 596int irq_set_irq_wake(unsigned int irq, unsigned int on)
ba9a2331 597{
ba9a2331 598 unsigned long flags;
31d9d9b6 599 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
2db87321 600 int ret = 0;
ba9a2331 601
13863a66
JJ
602 if (!desc)
603 return -EINVAL;
604
15a647eb
DB
605 /* wakeup-capable irqs can be shared between drivers that
606 * don't need to have the same sleep mode behaviors.
607 */
15a647eb 608 if (on) {
2db87321
UKK
609 if (desc->wake_depth++ == 0) {
610 ret = set_irq_wake_real(irq, on);
611 if (ret)
612 desc->wake_depth = 0;
613 else
7f94226f 614 irqd_set(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 615 }
15a647eb
DB
616 } else {
617 if (desc->wake_depth == 0) {
7a2c4770 618 WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
2db87321
UKK
619 } else if (--desc->wake_depth == 0) {
620 ret = set_irq_wake_real(irq, on);
621 if (ret)
622 desc->wake_depth = 1;
623 else
7f94226f 624 irqd_clear(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 625 }
15a647eb 626 }
02725e74 627 irq_put_desc_busunlock(desc, flags);
ba9a2331
TG
628 return ret;
629}
a0cd9ca2 630EXPORT_SYMBOL(irq_set_irq_wake);
ba9a2331 631
1da177e4
LT
632/*
633 * Internal function that tells the architecture code whether a
634 * particular irq has been exclusively allocated or is available
635 * for driver use.
636 */
637int can_request_irq(unsigned int irq, unsigned long irqflags)
638{
cc8c3b78 639 unsigned long flags;
31d9d9b6 640 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
02725e74 641 int canrequest = 0;
1da177e4 642
7d94f7ca
YL
643 if (!desc)
644 return 0;
645
02725e74 646 if (irq_settings_can_request(desc)) {
2779db8d
BH
647 if (!desc->action ||
648 irqflags & desc->action->flags & IRQF_SHARED)
649 canrequest = 1;
02725e74
TG
650 }
651 irq_put_desc_unlock(desc, flags);
652 return canrequest;
1da177e4
LT
653}
654
a1ff541a 655int __irq_set_trigger(struct irq_desc *desc, unsigned long flags)
82736f4d 656{
6b8ff312 657 struct irq_chip *chip = desc->irq_data.chip;
d4d5e089 658 int ret, unmask = 0;
82736f4d 659
b2ba2c30 660 if (!chip || !chip->irq_set_type) {
82736f4d
UKK
661 /*
662 * IRQF_TRIGGER_* but the PIC does not support multiple
663 * flow-types?
664 */
a1ff541a
JL
665 pr_debug("No set_type function for IRQ %d (%s)\n",
666 irq_desc_get_irq(desc),
f5d89470 667 chip ? (chip->name ? : "unknown") : "unknown");
82736f4d
UKK
668 return 0;
669 }
670
876dbd4c 671 flags &= IRQ_TYPE_SENSE_MASK;
d4d5e089
TG
672
673 if (chip->flags & IRQCHIP_SET_TYPE_MASKED) {
32f4125e 674 if (!irqd_irq_masked(&desc->irq_data))
d4d5e089 675 mask_irq(desc);
32f4125e 676 if (!irqd_irq_disabled(&desc->irq_data))
d4d5e089
TG
677 unmask = 1;
678 }
679
f2b662da 680 /* caller masked out all except trigger mode flags */
b2ba2c30 681 ret = chip->irq_set_type(&desc->irq_data, flags);
82736f4d 682
876dbd4c
TG
683 switch (ret) {
684 case IRQ_SET_MASK_OK:
2cb62547 685 case IRQ_SET_MASK_OK_DONE:
876dbd4c
TG
686 irqd_clear(&desc->irq_data, IRQD_TRIGGER_MASK);
687 irqd_set(&desc->irq_data, flags);
688
689 case IRQ_SET_MASK_OK_NOCOPY:
690 flags = irqd_get_trigger_type(&desc->irq_data);
691 irq_settings_set_trigger_mask(desc, flags);
692 irqd_clear(&desc->irq_data, IRQD_LEVEL);
693 irq_settings_clr_level(desc);
694 if (flags & IRQ_TYPE_LEVEL_MASK) {
695 irq_settings_set_level(desc);
696 irqd_set(&desc->irq_data, IRQD_LEVEL);
697 }
46732475 698
d4d5e089 699 ret = 0;
8fff39e0 700 break;
876dbd4c 701 default:
97fd75b7 702 pr_err("Setting trigger mode %lu for irq %u failed (%pF)\n",
a1ff541a 703 flags, irq_desc_get_irq(desc), chip->irq_set_type);
0c5d1eb7 704 }
d4d5e089
TG
705 if (unmask)
706 unmask_irq(desc);
82736f4d
UKK
707 return ret;
708}
709
293a7a0a
TG
710#ifdef CONFIG_HARDIRQS_SW_RESEND
711int irq_set_parent(int irq, int parent_irq)
712{
713 unsigned long flags;
714 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
715
716 if (!desc)
717 return -EINVAL;
718
719 desc->parent_irq = parent_irq;
720
721 irq_put_desc_unlock(desc, flags);
722 return 0;
723}
724#endif
725
b25c340c
TG
726/*
727 * Default primary interrupt handler for threaded interrupts. Is
728 * assigned as primary handler when request_threaded_irq is called
729 * with handler == NULL. Useful for oneshot interrupts.
730 */
731static irqreturn_t irq_default_primary_handler(int irq, void *dev_id)
732{
733 return IRQ_WAKE_THREAD;
734}
735
399b5da2
TG
736/*
737 * Primary handler for nested threaded interrupts. Should never be
738 * called.
739 */
740static irqreturn_t irq_nested_primary_handler(int irq, void *dev_id)
741{
742 WARN(1, "Primary handler called for nested irq %d\n", irq);
743 return IRQ_NONE;
744}
745
2a1d3ab8
TG
746static irqreturn_t irq_forced_secondary_handler(int irq, void *dev_id)
747{
748 WARN(1, "Secondary action handler called for irq %d\n", irq);
749 return IRQ_NONE;
750}
751
3aa551c9
TG
752static int irq_wait_for_interrupt(struct irqaction *action)
753{
550acb19
IY
754 set_current_state(TASK_INTERRUPTIBLE);
755
3aa551c9 756 while (!kthread_should_stop()) {
f48fe81e
TG
757
758 if (test_and_clear_bit(IRQTF_RUNTHREAD,
759 &action->thread_flags)) {
3aa551c9
TG
760 __set_current_state(TASK_RUNNING);
761 return 0;
f48fe81e
TG
762 }
763 schedule();
550acb19 764 set_current_state(TASK_INTERRUPTIBLE);
3aa551c9 765 }
550acb19 766 __set_current_state(TASK_RUNNING);
3aa551c9
TG
767 return -1;
768}
769
b25c340c
TG
770/*
771 * Oneshot interrupts keep the irq line masked until the threaded
772 * handler finished. unmask if the interrupt has not been disabled and
773 * is marked MASKED.
774 */
b5faba21 775static void irq_finalize_oneshot(struct irq_desc *desc,
f3f79e38 776 struct irqaction *action)
b25c340c 777{
2a1d3ab8
TG
778 if (!(desc->istate & IRQS_ONESHOT) ||
779 action->handler == irq_forced_secondary_handler)
b5faba21 780 return;
0b1adaa0 781again:
3876ec9e 782 chip_bus_lock(desc);
239007b8 783 raw_spin_lock_irq(&desc->lock);
0b1adaa0
TG
784
785 /*
786 * Implausible though it may be we need to protect us against
787 * the following scenario:
788 *
789 * The thread is faster done than the hard interrupt handler
790 * on the other CPU. If we unmask the irq line then the
791 * interrupt can come in again and masks the line, leaves due
009b4c3b 792 * to IRQS_INPROGRESS and the irq line is masked forever.
b5faba21
TG
793 *
794 * This also serializes the state of shared oneshot handlers
795 * versus "desc->threads_onehsot |= action->thread_mask;" in
796 * irq_wake_thread(). See the comment there which explains the
797 * serialization.
0b1adaa0 798 */
32f4125e 799 if (unlikely(irqd_irq_inprogress(&desc->irq_data))) {
0b1adaa0 800 raw_spin_unlock_irq(&desc->lock);
3876ec9e 801 chip_bus_sync_unlock(desc);
0b1adaa0
TG
802 cpu_relax();
803 goto again;
804 }
805
b5faba21
TG
806 /*
807 * Now check again, whether the thread should run. Otherwise
808 * we would clear the threads_oneshot bit of this thread which
809 * was just set.
810 */
f3f79e38 811 if (test_bit(IRQTF_RUNTHREAD, &action->thread_flags))
b5faba21
TG
812 goto out_unlock;
813
814 desc->threads_oneshot &= ~action->thread_mask;
815
32f4125e
TG
816 if (!desc->threads_oneshot && !irqd_irq_disabled(&desc->irq_data) &&
817 irqd_irq_masked(&desc->irq_data))
328a4978 818 unmask_threaded_irq(desc);
32f4125e 819
b5faba21 820out_unlock:
239007b8 821 raw_spin_unlock_irq(&desc->lock);
3876ec9e 822 chip_bus_sync_unlock(desc);
b25c340c
TG
823}
824
61f38261 825#ifdef CONFIG_SMP
591d2fb0 826/*
b04c644e 827 * Check whether we need to change the affinity of the interrupt thread.
591d2fb0
TG
828 */
829static void
830irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action)
831{
832 cpumask_var_t mask;
04aa530e 833 bool valid = true;
591d2fb0
TG
834
835 if (!test_and_clear_bit(IRQTF_AFFINITY, &action->thread_flags))
836 return;
837
838 /*
839 * In case we are out of memory we set IRQTF_AFFINITY again and
840 * try again next time
841 */
842 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
843 set_bit(IRQTF_AFFINITY, &action->thread_flags);
844 return;
845 }
846
239007b8 847 raw_spin_lock_irq(&desc->lock);
04aa530e
TG
848 /*
849 * This code is triggered unconditionally. Check the affinity
850 * mask pointer. For CPU_MASK_OFFSTACK=n this is optimized out.
851 */
9df872fa
JL
852 if (desc->irq_common_data.affinity)
853 cpumask_copy(mask, desc->irq_common_data.affinity);
04aa530e
TG
854 else
855 valid = false;
239007b8 856 raw_spin_unlock_irq(&desc->lock);
591d2fb0 857
04aa530e
TG
858 if (valid)
859 set_cpus_allowed_ptr(current, mask);
591d2fb0
TG
860 free_cpumask_var(mask);
861}
61f38261
BP
862#else
863static inline void
864irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) { }
865#endif
591d2fb0 866
8d32a307
TG
867/*
868 * Interrupts which are not explicitely requested as threaded
869 * interrupts rely on the implicit bh/preempt disable of the hard irq
870 * context. So we need to disable bh here to avoid deadlocks and other
871 * side effects.
872 */
3a43e05f 873static irqreturn_t
8d32a307
TG
874irq_forced_thread_fn(struct irq_desc *desc, struct irqaction *action)
875{
3a43e05f
SAS
876 irqreturn_t ret;
877
8d32a307 878 local_bh_disable();
3a43e05f 879 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 880 irq_finalize_oneshot(desc, action);
8d32a307 881 local_bh_enable();
3a43e05f 882 return ret;
8d32a307
TG
883}
884
885/*
f788e7bf 886 * Interrupts explicitly requested as threaded interrupts want to be
8d32a307
TG
887 * preemtible - many of them need to sleep and wait for slow busses to
888 * complete.
889 */
3a43e05f
SAS
890static irqreturn_t irq_thread_fn(struct irq_desc *desc,
891 struct irqaction *action)
8d32a307 892{
3a43e05f
SAS
893 irqreturn_t ret;
894
895 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 896 irq_finalize_oneshot(desc, action);
3a43e05f 897 return ret;
8d32a307
TG
898}
899
7140ea19
IY
900static void wake_threads_waitq(struct irq_desc *desc)
901{
c685689f 902 if (atomic_dec_and_test(&desc->threads_active))
7140ea19
IY
903 wake_up(&desc->wait_for_threads);
904}
905
67d12145 906static void irq_thread_dtor(struct callback_head *unused)
4d1d61a6
ON
907{
908 struct task_struct *tsk = current;
909 struct irq_desc *desc;
910 struct irqaction *action;
911
912 if (WARN_ON_ONCE(!(current->flags & PF_EXITING)))
913 return;
914
915 action = kthread_data(tsk);
916
fb21affa 917 pr_err("exiting task \"%s\" (%d) is an active IRQ thread (irq %d)\n",
19af395d 918 tsk->comm, tsk->pid, action->irq);
4d1d61a6
ON
919
920
921 desc = irq_to_desc(action->irq);
922 /*
923 * If IRQTF_RUNTHREAD is set, we need to decrement
924 * desc->threads_active and wake possible waiters.
925 */
926 if (test_and_clear_bit(IRQTF_RUNTHREAD, &action->thread_flags))
927 wake_threads_waitq(desc);
928
929 /* Prevent a stale desc->threads_oneshot */
930 irq_finalize_oneshot(desc, action);
931}
932
2a1d3ab8
TG
933static void irq_wake_secondary(struct irq_desc *desc, struct irqaction *action)
934{
935 struct irqaction *secondary = action->secondary;
936
937 if (WARN_ON_ONCE(!secondary))
938 return;
939
940 raw_spin_lock_irq(&desc->lock);
941 __irq_wake_thread(desc, secondary);
942 raw_spin_unlock_irq(&desc->lock);
943}
944
3aa551c9
TG
945/*
946 * Interrupt handler thread
947 */
948static int irq_thread(void *data)
949{
67d12145 950 struct callback_head on_exit_work;
3aa551c9
TG
951 struct irqaction *action = data;
952 struct irq_desc *desc = irq_to_desc(action->irq);
3a43e05f
SAS
953 irqreturn_t (*handler_fn)(struct irq_desc *desc,
954 struct irqaction *action);
3aa551c9 955
540b60e2 956 if (force_irqthreads && test_bit(IRQTF_FORCED_THREAD,
8d32a307
TG
957 &action->thread_flags))
958 handler_fn = irq_forced_thread_fn;
959 else
960 handler_fn = irq_thread_fn;
961
41f9d29f 962 init_task_work(&on_exit_work, irq_thread_dtor);
4d1d61a6 963 task_work_add(current, &on_exit_work, false);
3aa551c9 964
f3de44ed
SM
965 irq_thread_check_affinity(desc, action);
966
3aa551c9 967 while (!irq_wait_for_interrupt(action)) {
7140ea19 968 irqreturn_t action_ret;
3aa551c9 969
591d2fb0
TG
970 irq_thread_check_affinity(desc, action);
971
7140ea19 972 action_ret = handler_fn(desc, action);
1e77d0a1
TG
973 if (action_ret == IRQ_HANDLED)
974 atomic_inc(&desc->threads_handled);
2a1d3ab8
TG
975 if (action_ret == IRQ_WAKE_THREAD)
976 irq_wake_secondary(desc, action);
3aa551c9 977
7140ea19 978 wake_threads_waitq(desc);
3aa551c9
TG
979 }
980
7140ea19
IY
981 /*
982 * This is the regular exit path. __free_irq() is stopping the
983 * thread via kthread_stop() after calling
984 * synchronize_irq(). So neither IRQTF_RUNTHREAD nor the
e04268b0
TG
985 * oneshot mask bit can be set. We cannot verify that as we
986 * cannot touch the oneshot mask at this point anymore as
987 * __setup_irq() might have given out currents thread_mask
988 * again.
3aa551c9 989 */
4d1d61a6 990 task_work_cancel(current, irq_thread_dtor);
3aa551c9
TG
991 return 0;
992}
993
a92444c6
TG
994/**
995 * irq_wake_thread - wake the irq thread for the action identified by dev_id
996 * @irq: Interrupt line
997 * @dev_id: Device identity for which the thread should be woken
998 *
999 */
1000void irq_wake_thread(unsigned int irq, void *dev_id)
1001{
1002 struct irq_desc *desc = irq_to_desc(irq);
1003 struct irqaction *action;
1004 unsigned long flags;
1005
1006 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
1007 return;
1008
1009 raw_spin_lock_irqsave(&desc->lock, flags);
f944b5a7 1010 for_each_action_of_desc(desc, action) {
a92444c6
TG
1011 if (action->dev_id == dev_id) {
1012 if (action->thread)
1013 __irq_wake_thread(desc, action);
1014 break;
1015 }
1016 }
1017 raw_spin_unlock_irqrestore(&desc->lock, flags);
1018}
1019EXPORT_SYMBOL_GPL(irq_wake_thread);
1020
2a1d3ab8 1021static int irq_setup_forced_threading(struct irqaction *new)
8d32a307
TG
1022{
1023 if (!force_irqthreads)
2a1d3ab8 1024 return 0;
8d32a307 1025 if (new->flags & (IRQF_NO_THREAD | IRQF_PERCPU | IRQF_ONESHOT))
2a1d3ab8 1026 return 0;
8d32a307
TG
1027
1028 new->flags |= IRQF_ONESHOT;
1029
2a1d3ab8
TG
1030 /*
1031 * Handle the case where we have a real primary handler and a
1032 * thread handler. We force thread them as well by creating a
1033 * secondary action.
1034 */
1035 if (new->handler != irq_default_primary_handler && new->thread_fn) {
1036 /* Allocate the secondary action */
1037 new->secondary = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1038 if (!new->secondary)
1039 return -ENOMEM;
1040 new->secondary->handler = irq_forced_secondary_handler;
1041 new->secondary->thread_fn = new->thread_fn;
1042 new->secondary->dev_id = new->dev_id;
1043 new->secondary->irq = new->irq;
1044 new->secondary->name = new->name;
8d32a307 1045 }
2a1d3ab8
TG
1046 /* Deal with the primary handler */
1047 set_bit(IRQTF_FORCED_THREAD, &new->thread_flags);
1048 new->thread_fn = new->handler;
1049 new->handler = irq_default_primary_handler;
1050 return 0;
8d32a307
TG
1051}
1052
c1bacbae
TG
1053static int irq_request_resources(struct irq_desc *desc)
1054{
1055 struct irq_data *d = &desc->irq_data;
1056 struct irq_chip *c = d->chip;
1057
1058 return c->irq_request_resources ? c->irq_request_resources(d) : 0;
1059}
1060
1061static void irq_release_resources(struct irq_desc *desc)
1062{
1063 struct irq_data *d = &desc->irq_data;
1064 struct irq_chip *c = d->chip;
1065
1066 if (c->irq_release_resources)
1067 c->irq_release_resources(d);
1068}
1069
2a1d3ab8
TG
1070static int
1071setup_irq_thread(struct irqaction *new, unsigned int irq, bool secondary)
1072{
1073 struct task_struct *t;
1074 struct sched_param param = {
1075 .sched_priority = MAX_USER_RT_PRIO/2,
1076 };
1077
1078 if (!secondary) {
1079 t = kthread_create(irq_thread, new, "irq/%d-%s", irq,
1080 new->name);
1081 } else {
1082 t = kthread_create(irq_thread, new, "irq/%d-s-%s", irq,
1083 new->name);
1084 param.sched_priority -= 1;
1085 }
1086
1087 if (IS_ERR(t))
1088 return PTR_ERR(t);
1089
1090 sched_setscheduler_nocheck(t, SCHED_FIFO, &param);
1091
1092 /*
1093 * We keep the reference to the task struct even if
1094 * the thread dies to avoid that the interrupt code
1095 * references an already freed task_struct.
1096 */
1097 get_task_struct(t);
1098 new->thread = t;
1099 /*
1100 * Tell the thread to set its affinity. This is
1101 * important for shared interrupt handlers as we do
1102 * not invoke setup_affinity() for the secondary
1103 * handlers as everything is already set up. Even for
1104 * interrupts marked with IRQF_NO_BALANCE this is
1105 * correct as we want the thread to move to the cpu(s)
1106 * on which the requesting code placed the interrupt.
1107 */
1108 set_bit(IRQTF_AFFINITY, &new->thread_flags);
1109 return 0;
1110}
1111
1da177e4
LT
1112/*
1113 * Internal function to register an irqaction - typically used to
1114 * allocate special interrupts that are part of the architecture.
1115 */
d3c60047 1116static int
327ec569 1117__setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
1da177e4 1118{
f17c7545 1119 struct irqaction *old, **old_ptr;
b5faba21 1120 unsigned long flags, thread_mask = 0;
3b8249e7
TG
1121 int ret, nested, shared = 0;
1122 cpumask_var_t mask;
1da177e4 1123
7d94f7ca 1124 if (!desc)
c2b5a251
MW
1125 return -EINVAL;
1126
6b8ff312 1127 if (desc->irq_data.chip == &no_irq_chip)
1da177e4 1128 return -ENOSYS;
b6873807
SAS
1129 if (!try_module_get(desc->owner))
1130 return -ENODEV;
1da177e4 1131
2a1d3ab8
TG
1132 new->irq = irq;
1133
3aa551c9 1134 /*
399b5da2
TG
1135 * Check whether the interrupt nests into another interrupt
1136 * thread.
1137 */
1ccb4e61 1138 nested = irq_settings_is_nested_thread(desc);
399b5da2 1139 if (nested) {
b6873807
SAS
1140 if (!new->thread_fn) {
1141 ret = -EINVAL;
1142 goto out_mput;
1143 }
399b5da2
TG
1144 /*
1145 * Replace the primary handler which was provided from
1146 * the driver for non nested interrupt handling by the
1147 * dummy function which warns when called.
1148 */
1149 new->handler = irq_nested_primary_handler;
8d32a307 1150 } else {
2a1d3ab8
TG
1151 if (irq_settings_can_thread(desc)) {
1152 ret = irq_setup_forced_threading(new);
1153 if (ret)
1154 goto out_mput;
1155 }
399b5da2
TG
1156 }
1157
3aa551c9 1158 /*
399b5da2
TG
1159 * Create a handler thread when a thread function is supplied
1160 * and the interrupt does not nest into another interrupt
1161 * thread.
3aa551c9 1162 */
399b5da2 1163 if (new->thread_fn && !nested) {
2a1d3ab8
TG
1164 ret = setup_irq_thread(new, irq, false);
1165 if (ret)
b6873807 1166 goto out_mput;
2a1d3ab8
TG
1167 if (new->secondary) {
1168 ret = setup_irq_thread(new->secondary, irq, true);
1169 if (ret)
1170 goto out_thread;
b6873807 1171 }
3aa551c9
TG
1172 }
1173
3b8249e7
TG
1174 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
1175 ret = -ENOMEM;
1176 goto out_thread;
1177 }
1178
dc9b229a
TG
1179 /*
1180 * Drivers are often written to work w/o knowledge about the
1181 * underlying irq chip implementation, so a request for a
1182 * threaded irq without a primary hard irq context handler
1183 * requires the ONESHOT flag to be set. Some irq chips like
1184 * MSI based interrupts are per se one shot safe. Check the
1185 * chip flags, so we can avoid the unmask dance at the end of
1186 * the threaded handler for those.
1187 */
1188 if (desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)
1189 new->flags &= ~IRQF_ONESHOT;
1190
1da177e4
LT
1191 /*
1192 * The following block of code has to be executed atomically
1193 */
239007b8 1194 raw_spin_lock_irqsave(&desc->lock, flags);
f17c7545
IM
1195 old_ptr = &desc->action;
1196 old = *old_ptr;
06fcb0c6 1197 if (old) {
e76de9f8
TG
1198 /*
1199 * Can't share interrupts unless both agree to and are
1200 * the same type (level, edge, polarity). So both flag
3cca53b0 1201 * fields must have IRQF_SHARED set and the bits which
9d591edd
TG
1202 * set the trigger type must match. Also all must
1203 * agree on ONESHOT.
e76de9f8 1204 */
3cca53b0 1205 if (!((old->flags & new->flags) & IRQF_SHARED) ||
9d591edd 1206 ((old->flags ^ new->flags) & IRQF_TRIGGER_MASK) ||
f5d89470 1207 ((old->flags ^ new->flags) & IRQF_ONESHOT))
f5163427
DS
1208 goto mismatch;
1209
f5163427 1210 /* All handlers must agree on per-cpuness */
3cca53b0
TG
1211 if ((old->flags & IRQF_PERCPU) !=
1212 (new->flags & IRQF_PERCPU))
f5163427 1213 goto mismatch;
1da177e4
LT
1214
1215 /* add new interrupt at end of irq queue */
1216 do {
52abb700
TG
1217 /*
1218 * Or all existing action->thread_mask bits,
1219 * so we can find the next zero bit for this
1220 * new action.
1221 */
b5faba21 1222 thread_mask |= old->thread_mask;
f17c7545
IM
1223 old_ptr = &old->next;
1224 old = *old_ptr;
1da177e4
LT
1225 } while (old);
1226 shared = 1;
1227 }
1228
b5faba21 1229 /*
52abb700
TG
1230 * Setup the thread mask for this irqaction for ONESHOT. For
1231 * !ONESHOT irqs the thread mask is 0 so we can avoid a
1232 * conditional in irq_wake_thread().
b5faba21 1233 */
52abb700
TG
1234 if (new->flags & IRQF_ONESHOT) {
1235 /*
1236 * Unlikely to have 32 resp 64 irqs sharing one line,
1237 * but who knows.
1238 */
1239 if (thread_mask == ~0UL) {
1240 ret = -EBUSY;
1241 goto out_mask;
1242 }
1243 /*
1244 * The thread_mask for the action is or'ed to
1245 * desc->thread_active to indicate that the
1246 * IRQF_ONESHOT thread handler has been woken, but not
1247 * yet finished. The bit is cleared when a thread
1248 * completes. When all threads of a shared interrupt
1249 * line have completed desc->threads_active becomes
1250 * zero and the interrupt line is unmasked. See
1251 * handle.c:irq_wake_thread() for further information.
1252 *
1253 * If no thread is woken by primary (hard irq context)
1254 * interrupt handlers, then desc->threads_active is
1255 * also checked for zero to unmask the irq line in the
1256 * affected hard irq flow handlers
1257 * (handle_[fasteoi|level]_irq).
1258 *
1259 * The new action gets the first zero bit of
1260 * thread_mask assigned. See the loop above which or's
1261 * all existing action->thread_mask bits.
1262 */
1263 new->thread_mask = 1 << ffz(thread_mask);
1c6c6952 1264
dc9b229a
TG
1265 } else if (new->handler == irq_default_primary_handler &&
1266 !(desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)) {
1c6c6952
TG
1267 /*
1268 * The interrupt was requested with handler = NULL, so
1269 * we use the default primary handler for it. But it
1270 * does not have the oneshot flag set. In combination
1271 * with level interrupts this is deadly, because the
1272 * default primary handler just wakes the thread, then
1273 * the irq lines is reenabled, but the device still
1274 * has the level irq asserted. Rinse and repeat....
1275 *
1276 * While this works for edge type interrupts, we play
1277 * it safe and reject unconditionally because we can't
1278 * say for sure which type this interrupt really
1279 * has. The type flags are unreliable as the
1280 * underlying chip implementation can override them.
1281 */
97fd75b7 1282 pr_err("Threaded irq requested with handler=NULL and !ONESHOT for irq %d\n",
1c6c6952
TG
1283 irq);
1284 ret = -EINVAL;
1285 goto out_mask;
b5faba21 1286 }
b5faba21 1287
1da177e4 1288 if (!shared) {
c1bacbae
TG
1289 ret = irq_request_resources(desc);
1290 if (ret) {
1291 pr_err("Failed to request resources for %s (irq %d) on irqchip %s\n",
1292 new->name, irq, desc->irq_data.chip->name);
1293 goto out_mask;
1294 }
1295
3aa551c9
TG
1296 init_waitqueue_head(&desc->wait_for_threads);
1297
e76de9f8 1298 /* Setup the type (level, edge polarity) if configured: */
3cca53b0 1299 if (new->flags & IRQF_TRIGGER_MASK) {
a1ff541a
JL
1300 ret = __irq_set_trigger(desc,
1301 new->flags & IRQF_TRIGGER_MASK);
82736f4d 1302
3aa551c9 1303 if (ret)
3b8249e7 1304 goto out_mask;
091738a2 1305 }
6a6de9ef 1306
009b4c3b 1307 desc->istate &= ~(IRQS_AUTODETECT | IRQS_SPURIOUS_DISABLED | \
32f4125e
TG
1308 IRQS_ONESHOT | IRQS_WAITING);
1309 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
94d39e1f 1310
a005677b
TG
1311 if (new->flags & IRQF_PERCPU) {
1312 irqd_set(&desc->irq_data, IRQD_PER_CPU);
1313 irq_settings_set_per_cpu(desc);
1314 }
6a58fb3b 1315
b25c340c 1316 if (new->flags & IRQF_ONESHOT)
3d67baec 1317 desc->istate |= IRQS_ONESHOT;
b25c340c 1318
1ccb4e61 1319 if (irq_settings_can_autoenable(desc))
b4bc724e 1320 irq_startup(desc, true);
46999238 1321 else
e76de9f8
TG
1322 /* Undo nested disables: */
1323 desc->depth = 1;
18404756 1324
612e3684 1325 /* Exclude IRQ from balancing if requested */
a005677b
TG
1326 if (new->flags & IRQF_NOBALANCING) {
1327 irq_settings_set_no_balancing(desc);
1328 irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
1329 }
612e3684 1330
18404756 1331 /* Set default affinity mask once everything is setup */
a8a98eac 1332 setup_affinity(desc, mask);
0c5d1eb7 1333
876dbd4c
TG
1334 } else if (new->flags & IRQF_TRIGGER_MASK) {
1335 unsigned int nmsk = new->flags & IRQF_TRIGGER_MASK;
1336 unsigned int omsk = irq_settings_get_trigger_mask(desc);
1337
1338 if (nmsk != omsk)
1339 /* hope the handler works with current trigger mode */
a395d6a7
JP
1340 pr_warn("irq %d uses trigger mode %u; requested %u\n",
1341 irq, nmsk, omsk);
1da177e4 1342 }
82736f4d 1343
f17c7545 1344 *old_ptr = new;
82736f4d 1345
cab303be
TG
1346 irq_pm_install_action(desc, new);
1347
8528b0f1
LT
1348 /* Reset broken irq detection when installing new handler */
1349 desc->irq_count = 0;
1350 desc->irqs_unhandled = 0;
1adb0850
TG
1351
1352 /*
1353 * Check whether we disabled the irq via the spurious handler
1354 * before. Reenable it and give it another chance.
1355 */
7acdd53e
TG
1356 if (shared && (desc->istate & IRQS_SPURIOUS_DISABLED)) {
1357 desc->istate &= ~IRQS_SPURIOUS_DISABLED;
79ff1cda 1358 __enable_irq(desc);
1adb0850
TG
1359 }
1360
239007b8 1361 raw_spin_unlock_irqrestore(&desc->lock, flags);
1da177e4 1362
69ab8494
TG
1363 /*
1364 * Strictly no need to wake it up, but hung_task complains
1365 * when no hard interrupt wakes the thread up.
1366 */
1367 if (new->thread)
1368 wake_up_process(new->thread);
2a1d3ab8
TG
1369 if (new->secondary)
1370 wake_up_process(new->secondary->thread);
69ab8494 1371
2c6927a3 1372 register_irq_proc(irq, desc);
1da177e4
LT
1373 new->dir = NULL;
1374 register_handler_proc(irq, new);
4f5058c3 1375 free_cpumask_var(mask);
1da177e4
LT
1376
1377 return 0;
f5163427
DS
1378
1379mismatch:
3cca53b0 1380 if (!(new->flags & IRQF_PROBE_SHARED)) {
97fd75b7 1381 pr_err("Flags mismatch irq %d. %08x (%s) vs. %08x (%s)\n",
f5d89470
TG
1382 irq, new->flags, new->name, old->flags, old->name);
1383#ifdef CONFIG_DEBUG_SHIRQ
13e87ec6 1384 dump_stack();
3f050447 1385#endif
f5d89470 1386 }
3aa551c9
TG
1387 ret = -EBUSY;
1388
3b8249e7 1389out_mask:
1c389795 1390 raw_spin_unlock_irqrestore(&desc->lock, flags);
3b8249e7
TG
1391 free_cpumask_var(mask);
1392
3aa551c9 1393out_thread:
3aa551c9
TG
1394 if (new->thread) {
1395 struct task_struct *t = new->thread;
1396
1397 new->thread = NULL;
05d74efa 1398 kthread_stop(t);
3aa551c9
TG
1399 put_task_struct(t);
1400 }
2a1d3ab8
TG
1401 if (new->secondary && new->secondary->thread) {
1402 struct task_struct *t = new->secondary->thread;
1403
1404 new->secondary->thread = NULL;
1405 kthread_stop(t);
1406 put_task_struct(t);
1407 }
b6873807
SAS
1408out_mput:
1409 module_put(desc->owner);
3aa551c9 1410 return ret;
1da177e4
LT
1411}
1412
d3c60047
TG
1413/**
1414 * setup_irq - setup an interrupt
1415 * @irq: Interrupt line to setup
1416 * @act: irqaction for the interrupt
1417 *
1418 * Used to statically setup interrupts in the early boot process.
1419 */
1420int setup_irq(unsigned int irq, struct irqaction *act)
1421{
986c011d 1422 int retval;
d3c60047
TG
1423 struct irq_desc *desc = irq_to_desc(irq);
1424
9b5d585d 1425 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
31d9d9b6 1426 return -EINVAL;
986c011d
DD
1427 chip_bus_lock(desc);
1428 retval = __setup_irq(irq, desc, act);
1429 chip_bus_sync_unlock(desc);
1430
1431 return retval;
d3c60047 1432}
eb53b4e8 1433EXPORT_SYMBOL_GPL(setup_irq);
d3c60047 1434
31d9d9b6 1435/*
cbf94f06
MD
1436 * Internal function to unregister an irqaction - used to free
1437 * regular and special interrupts that are part of the architecture.
1da177e4 1438 */
cbf94f06 1439static struct irqaction *__free_irq(unsigned int irq, void *dev_id)
1da177e4 1440{
d3c60047 1441 struct irq_desc *desc = irq_to_desc(irq);
f17c7545 1442 struct irqaction *action, **action_ptr;
1da177e4
LT
1443 unsigned long flags;
1444
ae88a23b 1445 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
7d94f7ca 1446
7d94f7ca 1447 if (!desc)
f21cfb25 1448 return NULL;
1da177e4 1449
abc7e40c 1450 chip_bus_lock(desc);
239007b8 1451 raw_spin_lock_irqsave(&desc->lock, flags);
ae88a23b
IM
1452
1453 /*
1454 * There can be multiple actions per IRQ descriptor, find the right
1455 * one based on the dev_id:
1456 */
f17c7545 1457 action_ptr = &desc->action;
1da177e4 1458 for (;;) {
f17c7545 1459 action = *action_ptr;
1da177e4 1460
ae88a23b
IM
1461 if (!action) {
1462 WARN(1, "Trying to free already-free IRQ %d\n", irq);
239007b8 1463 raw_spin_unlock_irqrestore(&desc->lock, flags);
abc7e40c 1464 chip_bus_sync_unlock(desc);
f21cfb25 1465 return NULL;
ae88a23b 1466 }
1da177e4 1467
8316e381
IM
1468 if (action->dev_id == dev_id)
1469 break;
f17c7545 1470 action_ptr = &action->next;
ae88a23b 1471 }
dbce706e 1472
ae88a23b 1473 /* Found it - now remove it from the list of entries: */
f17c7545 1474 *action_ptr = action->next;
ae88a23b 1475
cab303be
TG
1476 irq_pm_remove_action(desc, action);
1477
ae88a23b 1478 /* If this was the last handler, shut down the IRQ line: */
c1bacbae 1479 if (!desc->action) {
e9849777 1480 irq_settings_clr_disable_unlazy(desc);
46999238 1481 irq_shutdown(desc);
c1bacbae
TG
1482 irq_release_resources(desc);
1483 }
3aa551c9 1484
e7a297b0
PWJ
1485#ifdef CONFIG_SMP
1486 /* make sure affinity_hint is cleaned up */
1487 if (WARN_ON_ONCE(desc->affinity_hint))
1488 desc->affinity_hint = NULL;
1489#endif
1490
239007b8 1491 raw_spin_unlock_irqrestore(&desc->lock, flags);
abc7e40c 1492 chip_bus_sync_unlock(desc);
ae88a23b
IM
1493
1494 unregister_handler_proc(irq, action);
1495
1496 /* Make sure it's not being used on another CPU: */
1497 synchronize_irq(irq);
1da177e4 1498
70edcd77 1499#ifdef CONFIG_DEBUG_SHIRQ
ae88a23b
IM
1500 /*
1501 * It's a shared IRQ -- the driver ought to be prepared for an IRQ
1502 * event to happen even now it's being freed, so let's make sure that
1503 * is so by doing an extra call to the handler ....
1504 *
1505 * ( We do this after actually deregistering it, to make sure that a
1506 * 'real' IRQ doesn't run in * parallel with our fake. )
1507 */
1508 if (action->flags & IRQF_SHARED) {
1509 local_irq_save(flags);
1510 action->handler(irq, dev_id);
1511 local_irq_restore(flags);
1da177e4 1512 }
ae88a23b 1513#endif
2d860ad7
LT
1514
1515 if (action->thread) {
05d74efa 1516 kthread_stop(action->thread);
2d860ad7 1517 put_task_struct(action->thread);
2a1d3ab8
TG
1518 if (action->secondary && action->secondary->thread) {
1519 kthread_stop(action->secondary->thread);
1520 put_task_struct(action->secondary->thread);
1521 }
2d860ad7
LT
1522 }
1523
b6873807 1524 module_put(desc->owner);
2a1d3ab8 1525 kfree(action->secondary);
f21cfb25
MD
1526 return action;
1527}
1528
cbf94f06
MD
1529/**
1530 * remove_irq - free an interrupt
1531 * @irq: Interrupt line to free
1532 * @act: irqaction for the interrupt
1533 *
1534 * Used to remove interrupts statically setup by the early boot process.
1535 */
1536void remove_irq(unsigned int irq, struct irqaction *act)
1537{
31d9d9b6
MZ
1538 struct irq_desc *desc = irq_to_desc(irq);
1539
1540 if (desc && !WARN_ON(irq_settings_is_per_cpu_devid(desc)))
1541 __free_irq(irq, act->dev_id);
cbf94f06 1542}
eb53b4e8 1543EXPORT_SYMBOL_GPL(remove_irq);
cbf94f06 1544
f21cfb25
MD
1545/**
1546 * free_irq - free an interrupt allocated with request_irq
1547 * @irq: Interrupt line to free
1548 * @dev_id: Device identity to free
1549 *
1550 * Remove an interrupt handler. The handler is removed and if the
1551 * interrupt line is no longer in use by any driver it is disabled.
1552 * On a shared IRQ the caller must ensure the interrupt is disabled
1553 * on the card it drives before calling this function. The function
1554 * does not return until any executing interrupts for this IRQ
1555 * have completed.
1556 *
1557 * This function must not be called from interrupt context.
1558 */
1559void free_irq(unsigned int irq, void *dev_id)
1560{
70aedd24
TG
1561 struct irq_desc *desc = irq_to_desc(irq);
1562
31d9d9b6 1563 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
70aedd24
TG
1564 return;
1565
cd7eab44
BH
1566#ifdef CONFIG_SMP
1567 if (WARN_ON(desc->affinity_notify))
1568 desc->affinity_notify = NULL;
1569#endif
1570
cbf94f06 1571 kfree(__free_irq(irq, dev_id));
1da177e4 1572}
1da177e4
LT
1573EXPORT_SYMBOL(free_irq);
1574
1575/**
3aa551c9 1576 * request_threaded_irq - allocate an interrupt line
1da177e4 1577 * @irq: Interrupt line to allocate
3aa551c9
TG
1578 * @handler: Function to be called when the IRQ occurs.
1579 * Primary handler for threaded interrupts
b25c340c
TG
1580 * If NULL and thread_fn != NULL the default
1581 * primary handler is installed
f48fe81e
TG
1582 * @thread_fn: Function called from the irq handler thread
1583 * If NULL, no irq thread is created
1da177e4
LT
1584 * @irqflags: Interrupt type flags
1585 * @devname: An ascii name for the claiming device
1586 * @dev_id: A cookie passed back to the handler function
1587 *
1588 * This call allocates interrupt resources and enables the
1589 * interrupt line and IRQ handling. From the point this
1590 * call is made your handler function may be invoked. Since
1591 * your handler function must clear any interrupt the board
1592 * raises, you must take care both to initialise your hardware
1593 * and to set up the interrupt handler in the right order.
1594 *
3aa551c9 1595 * If you want to set up a threaded irq handler for your device
6d21af4f 1596 * then you need to supply @handler and @thread_fn. @handler is
3aa551c9
TG
1597 * still called in hard interrupt context and has to check
1598 * whether the interrupt originates from the device. If yes it
1599 * needs to disable the interrupt on the device and return
39a2eddb 1600 * IRQ_WAKE_THREAD which will wake up the handler thread and run
3aa551c9
TG
1601 * @thread_fn. This split handler design is necessary to support
1602 * shared interrupts.
1603 *
1da177e4
LT
1604 * Dev_id must be globally unique. Normally the address of the
1605 * device data structure is used as the cookie. Since the handler
1606 * receives this value it makes sense to use it.
1607 *
1608 * If your interrupt is shared you must pass a non NULL dev_id
1609 * as this is required when freeing the interrupt.
1610 *
1611 * Flags:
1612 *
3cca53b0 1613 * IRQF_SHARED Interrupt is shared
0c5d1eb7 1614 * IRQF_TRIGGER_* Specify active edge(s) or level
1da177e4
LT
1615 *
1616 */
3aa551c9
TG
1617int request_threaded_irq(unsigned int irq, irq_handler_t handler,
1618 irq_handler_t thread_fn, unsigned long irqflags,
1619 const char *devname, void *dev_id)
1da177e4 1620{
06fcb0c6 1621 struct irqaction *action;
08678b08 1622 struct irq_desc *desc;
d3c60047 1623 int retval;
1da177e4 1624
e237a551
CF
1625 if (irq == IRQ_NOTCONNECTED)
1626 return -ENOTCONN;
1627
1da177e4
LT
1628 /*
1629 * Sanity-check: shared interrupts must pass in a real dev-ID,
1630 * otherwise we'll have trouble later trying to figure out
1631 * which interrupt is which (messes up the interrupt freeing
1632 * logic etc).
17f48034
RW
1633 *
1634 * Also IRQF_COND_SUSPEND only makes sense for shared interrupts and
1635 * it cannot be set along with IRQF_NO_SUSPEND.
1da177e4 1636 */
17f48034
RW
1637 if (((irqflags & IRQF_SHARED) && !dev_id) ||
1638 (!(irqflags & IRQF_SHARED) && (irqflags & IRQF_COND_SUSPEND)) ||
1639 ((irqflags & IRQF_NO_SUSPEND) && (irqflags & IRQF_COND_SUSPEND)))
1da177e4 1640 return -EINVAL;
7d94f7ca 1641
cb5bc832 1642 desc = irq_to_desc(irq);
7d94f7ca 1643 if (!desc)
1da177e4 1644 return -EINVAL;
7d94f7ca 1645
31d9d9b6
MZ
1646 if (!irq_settings_can_request(desc) ||
1647 WARN_ON(irq_settings_is_per_cpu_devid(desc)))
6550c775 1648 return -EINVAL;
b25c340c
TG
1649
1650 if (!handler) {
1651 if (!thread_fn)
1652 return -EINVAL;
1653 handler = irq_default_primary_handler;
1654 }
1da177e4 1655
45535732 1656 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1da177e4
LT
1657 if (!action)
1658 return -ENOMEM;
1659
1660 action->handler = handler;
3aa551c9 1661 action->thread_fn = thread_fn;
1da177e4 1662 action->flags = irqflags;
1da177e4 1663 action->name = devname;
1da177e4
LT
1664 action->dev_id = dev_id;
1665
3876ec9e 1666 chip_bus_lock(desc);
d3c60047 1667 retval = __setup_irq(irq, desc, action);
3876ec9e 1668 chip_bus_sync_unlock(desc);
70aedd24 1669
2a1d3ab8
TG
1670 if (retval) {
1671 kfree(action->secondary);
377bf1e4 1672 kfree(action);
2a1d3ab8 1673 }
377bf1e4 1674
6d83f94d 1675#ifdef CONFIG_DEBUG_SHIRQ_FIXME
6ce51c43 1676 if (!retval && (irqflags & IRQF_SHARED)) {
a304e1b8
DW
1677 /*
1678 * It's a shared IRQ -- the driver ought to be prepared for it
1679 * to happen immediately, so let's make sure....
377bf1e4
AV
1680 * We disable the irq to make sure that a 'real' IRQ doesn't
1681 * run in parallel with our fake.
a304e1b8 1682 */
59845b1f 1683 unsigned long flags;
a304e1b8 1684
377bf1e4 1685 disable_irq(irq);
59845b1f 1686 local_irq_save(flags);
377bf1e4 1687
59845b1f 1688 handler(irq, dev_id);
377bf1e4 1689
59845b1f 1690 local_irq_restore(flags);
377bf1e4 1691 enable_irq(irq);
a304e1b8
DW
1692 }
1693#endif
1da177e4
LT
1694 return retval;
1695}
3aa551c9 1696EXPORT_SYMBOL(request_threaded_irq);
ae731f8d
MZ
1697
1698/**
1699 * request_any_context_irq - allocate an interrupt line
1700 * @irq: Interrupt line to allocate
1701 * @handler: Function to be called when the IRQ occurs.
1702 * Threaded handler for threaded interrupts.
1703 * @flags: Interrupt type flags
1704 * @name: An ascii name for the claiming device
1705 * @dev_id: A cookie passed back to the handler function
1706 *
1707 * This call allocates interrupt resources and enables the
1708 * interrupt line and IRQ handling. It selects either a
1709 * hardirq or threaded handling method depending on the
1710 * context.
1711 *
1712 * On failure, it returns a negative value. On success,
1713 * it returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED.
1714 */
1715int request_any_context_irq(unsigned int irq, irq_handler_t handler,
1716 unsigned long flags, const char *name, void *dev_id)
1717{
e237a551 1718 struct irq_desc *desc;
ae731f8d
MZ
1719 int ret;
1720
e237a551
CF
1721 if (irq == IRQ_NOTCONNECTED)
1722 return -ENOTCONN;
1723
1724 desc = irq_to_desc(irq);
ae731f8d
MZ
1725 if (!desc)
1726 return -EINVAL;
1727
1ccb4e61 1728 if (irq_settings_is_nested_thread(desc)) {
ae731f8d
MZ
1729 ret = request_threaded_irq(irq, NULL, handler,
1730 flags, name, dev_id);
1731 return !ret ? IRQC_IS_NESTED : ret;
1732 }
1733
1734 ret = request_irq(irq, handler, flags, name, dev_id);
1735 return !ret ? IRQC_IS_HARDIRQ : ret;
1736}
1737EXPORT_SYMBOL_GPL(request_any_context_irq);
31d9d9b6 1738
1e7c5fd2 1739void enable_percpu_irq(unsigned int irq, unsigned int type)
31d9d9b6
MZ
1740{
1741 unsigned int cpu = smp_processor_id();
1742 unsigned long flags;
1743 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1744
1745 if (!desc)
1746 return;
1747
1e7c5fd2
MZ
1748 type &= IRQ_TYPE_SENSE_MASK;
1749 if (type != IRQ_TYPE_NONE) {
1750 int ret;
1751
a1ff541a 1752 ret = __irq_set_trigger(desc, type);
1e7c5fd2
MZ
1753
1754 if (ret) {
32cffdde 1755 WARN(1, "failed to set type for IRQ%d\n", irq);
1e7c5fd2
MZ
1756 goto out;
1757 }
1758 }
1759
31d9d9b6 1760 irq_percpu_enable(desc, cpu);
1e7c5fd2 1761out:
31d9d9b6
MZ
1762 irq_put_desc_unlock(desc, flags);
1763}
36a5df85 1764EXPORT_SYMBOL_GPL(enable_percpu_irq);
31d9d9b6 1765
f0cb3220
TP
1766/**
1767 * irq_percpu_is_enabled - Check whether the per cpu irq is enabled
1768 * @irq: Linux irq number to check for
1769 *
1770 * Must be called from a non migratable context. Returns the enable
1771 * state of a per cpu interrupt on the current cpu.
1772 */
1773bool irq_percpu_is_enabled(unsigned int irq)
1774{
1775 unsigned int cpu = smp_processor_id();
1776 struct irq_desc *desc;
1777 unsigned long flags;
1778 bool is_enabled;
1779
1780 desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1781 if (!desc)
1782 return false;
1783
1784 is_enabled = cpumask_test_cpu(cpu, desc->percpu_enabled);
1785 irq_put_desc_unlock(desc, flags);
1786
1787 return is_enabled;
1788}
1789EXPORT_SYMBOL_GPL(irq_percpu_is_enabled);
1790
31d9d9b6
MZ
1791void disable_percpu_irq(unsigned int irq)
1792{
1793 unsigned int cpu = smp_processor_id();
1794 unsigned long flags;
1795 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1796
1797 if (!desc)
1798 return;
1799
1800 irq_percpu_disable(desc, cpu);
1801 irq_put_desc_unlock(desc, flags);
1802}
36a5df85 1803EXPORT_SYMBOL_GPL(disable_percpu_irq);
31d9d9b6
MZ
1804
1805/*
1806 * Internal function to unregister a percpu irqaction.
1807 */
1808static struct irqaction *__free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1809{
1810 struct irq_desc *desc = irq_to_desc(irq);
1811 struct irqaction *action;
1812 unsigned long flags;
1813
1814 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
1815
1816 if (!desc)
1817 return NULL;
1818
1819 raw_spin_lock_irqsave(&desc->lock, flags);
1820
1821 action = desc->action;
1822 if (!action || action->percpu_dev_id != dev_id) {
1823 WARN(1, "Trying to free already-free IRQ %d\n", irq);
1824 goto bad;
1825 }
1826
1827 if (!cpumask_empty(desc->percpu_enabled)) {
1828 WARN(1, "percpu IRQ %d still enabled on CPU%d!\n",
1829 irq, cpumask_first(desc->percpu_enabled));
1830 goto bad;
1831 }
1832
1833 /* Found it - now remove it from the list of entries: */
1834 desc->action = NULL;
1835
1836 raw_spin_unlock_irqrestore(&desc->lock, flags);
1837
1838 unregister_handler_proc(irq, action);
1839
1840 module_put(desc->owner);
1841 return action;
1842
1843bad:
1844 raw_spin_unlock_irqrestore(&desc->lock, flags);
1845 return NULL;
1846}
1847
1848/**
1849 * remove_percpu_irq - free a per-cpu interrupt
1850 * @irq: Interrupt line to free
1851 * @act: irqaction for the interrupt
1852 *
1853 * Used to remove interrupts statically setup by the early boot process.
1854 */
1855void remove_percpu_irq(unsigned int irq, struct irqaction *act)
1856{
1857 struct irq_desc *desc = irq_to_desc(irq);
1858
1859 if (desc && irq_settings_is_per_cpu_devid(desc))
1860 __free_percpu_irq(irq, act->percpu_dev_id);
1861}
1862
1863/**
1864 * free_percpu_irq - free an interrupt allocated with request_percpu_irq
1865 * @irq: Interrupt line to free
1866 * @dev_id: Device identity to free
1867 *
1868 * Remove a percpu interrupt handler. The handler is removed, but
1869 * the interrupt line is not disabled. This must be done on each
1870 * CPU before calling this function. The function does not return
1871 * until any executing interrupts for this IRQ have completed.
1872 *
1873 * This function must not be called from interrupt context.
1874 */
1875void free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1876{
1877 struct irq_desc *desc = irq_to_desc(irq);
1878
1879 if (!desc || !irq_settings_is_per_cpu_devid(desc))
1880 return;
1881
1882 chip_bus_lock(desc);
1883 kfree(__free_percpu_irq(irq, dev_id));
1884 chip_bus_sync_unlock(desc);
1885}
aec2e2ad 1886EXPORT_SYMBOL_GPL(free_percpu_irq);
31d9d9b6
MZ
1887
1888/**
1889 * setup_percpu_irq - setup a per-cpu interrupt
1890 * @irq: Interrupt line to setup
1891 * @act: irqaction for the interrupt
1892 *
1893 * Used to statically setup per-cpu interrupts in the early boot process.
1894 */
1895int setup_percpu_irq(unsigned int irq, struct irqaction *act)
1896{
1897 struct irq_desc *desc = irq_to_desc(irq);
1898 int retval;
1899
1900 if (!desc || !irq_settings_is_per_cpu_devid(desc))
1901 return -EINVAL;
1902 chip_bus_lock(desc);
1903 retval = __setup_irq(irq, desc, act);
1904 chip_bus_sync_unlock(desc);
1905
1906 return retval;
1907}
1908
1909/**
1910 * request_percpu_irq - allocate a percpu interrupt line
1911 * @irq: Interrupt line to allocate
1912 * @handler: Function to be called when the IRQ occurs.
1913 * @devname: An ascii name for the claiming device
1914 * @dev_id: A percpu cookie passed back to the handler function
1915 *
a1b7febd
MR
1916 * This call allocates interrupt resources and enables the
1917 * interrupt on the local CPU. If the interrupt is supposed to be
1918 * enabled on other CPUs, it has to be done on each CPU using
1919 * enable_percpu_irq().
31d9d9b6
MZ
1920 *
1921 * Dev_id must be globally unique. It is a per-cpu variable, and
1922 * the handler gets called with the interrupted CPU's instance of
1923 * that variable.
1924 */
1925int request_percpu_irq(unsigned int irq, irq_handler_t handler,
1926 const char *devname, void __percpu *dev_id)
1927{
1928 struct irqaction *action;
1929 struct irq_desc *desc;
1930 int retval;
1931
1932 if (!dev_id)
1933 return -EINVAL;
1934
1935 desc = irq_to_desc(irq);
1936 if (!desc || !irq_settings_can_request(desc) ||
1937 !irq_settings_is_per_cpu_devid(desc))
1938 return -EINVAL;
1939
1940 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1941 if (!action)
1942 return -ENOMEM;
1943
1944 action->handler = handler;
2ed0e645 1945 action->flags = IRQF_PERCPU | IRQF_NO_SUSPEND;
31d9d9b6
MZ
1946 action->name = devname;
1947 action->percpu_dev_id = dev_id;
1948
1949 chip_bus_lock(desc);
1950 retval = __setup_irq(irq, desc, action);
1951 chip_bus_sync_unlock(desc);
1952
1953 if (retval)
1954 kfree(action);
1955
1956 return retval;
1957}
aec2e2ad 1958EXPORT_SYMBOL_GPL(request_percpu_irq);
1b7047ed
MZ
1959
1960/**
1961 * irq_get_irqchip_state - returns the irqchip state of a interrupt.
1962 * @irq: Interrupt line that is forwarded to a VM
1963 * @which: One of IRQCHIP_STATE_* the caller wants to know about
1964 * @state: a pointer to a boolean where the state is to be storeed
1965 *
1966 * This call snapshots the internal irqchip state of an
1967 * interrupt, returning into @state the bit corresponding to
1968 * stage @which
1969 *
1970 * This function should be called with preemption disabled if the
1971 * interrupt controller has per-cpu registers.
1972 */
1973int irq_get_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
1974 bool *state)
1975{
1976 struct irq_desc *desc;
1977 struct irq_data *data;
1978 struct irq_chip *chip;
1979 unsigned long flags;
1980 int err = -EINVAL;
1981
1982 desc = irq_get_desc_buslock(irq, &flags, 0);
1983 if (!desc)
1984 return err;
1985
1986 data = irq_desc_get_irq_data(desc);
1987
1988 do {
1989 chip = irq_data_get_irq_chip(data);
1990 if (chip->irq_get_irqchip_state)
1991 break;
1992#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1993 data = data->parent_data;
1994#else
1995 data = NULL;
1996#endif
1997 } while (data);
1998
1999 if (data)
2000 err = chip->irq_get_irqchip_state(data, which, state);
2001
2002 irq_put_desc_busunlock(desc, flags);
2003 return err;
2004}
1ee4fb3e 2005EXPORT_SYMBOL_GPL(irq_get_irqchip_state);
1b7047ed
MZ
2006
2007/**
2008 * irq_set_irqchip_state - set the state of a forwarded interrupt.
2009 * @irq: Interrupt line that is forwarded to a VM
2010 * @which: State to be restored (one of IRQCHIP_STATE_*)
2011 * @val: Value corresponding to @which
2012 *
2013 * This call sets the internal irqchip state of an interrupt,
2014 * depending on the value of @which.
2015 *
2016 * This function should be called with preemption disabled if the
2017 * interrupt controller has per-cpu registers.
2018 */
2019int irq_set_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
2020 bool val)
2021{
2022 struct irq_desc *desc;
2023 struct irq_data *data;
2024 struct irq_chip *chip;
2025 unsigned long flags;
2026 int err = -EINVAL;
2027
2028 desc = irq_get_desc_buslock(irq, &flags, 0);
2029 if (!desc)
2030 return err;
2031
2032 data = irq_desc_get_irq_data(desc);
2033
2034 do {
2035 chip = irq_data_get_irq_chip(data);
2036 if (chip->irq_set_irqchip_state)
2037 break;
2038#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2039 data = data->parent_data;
2040#else
2041 data = NULL;
2042#endif
2043 } while (data);
2044
2045 if (data)
2046 err = chip->irq_set_irqchip_state(data, which, val);
2047
2048 irq_put_desc_busunlock(desc, flags);
2049 return err;
2050}
1ee4fb3e 2051EXPORT_SYMBOL_GPL(irq_set_irqchip_state);
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