Merge branch 'for-3.5-take-2' of git://linux-nfs.org/~bfields/linux
[deliverable/linux.git] / kernel / irq / manage.c
CommitLineData
1da177e4
LT
1/*
2 * linux/kernel/irq/manage.c
3 *
a34db9b2
IM
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006 Thomas Gleixner
1da177e4
LT
6 *
7 * This file contains driver APIs to the irq subsystem.
8 */
9
97fd75b7
AM
10#define pr_fmt(fmt) "genirq: " fmt
11
1da177e4 12#include <linux/irq.h>
3aa551c9 13#include <linux/kthread.h>
1da177e4
LT
14#include <linux/module.h>
15#include <linux/random.h>
16#include <linux/interrupt.h>
1aeb272c 17#include <linux/slab.h>
3aa551c9 18#include <linux/sched.h>
1da177e4
LT
19
20#include "internals.h"
21
8d32a307
TG
22#ifdef CONFIG_IRQ_FORCED_THREADING
23__read_mostly bool force_irqthreads;
24
25static int __init setup_forced_irqthreads(char *arg)
26{
27 force_irqthreads = true;
28 return 0;
29}
30early_param("threadirqs", setup_forced_irqthreads);
31#endif
32
1da177e4
LT
33/**
34 * synchronize_irq - wait for pending IRQ handlers (on other CPUs)
1e5d5331 35 * @irq: interrupt number to wait for
1da177e4
LT
36 *
37 * This function waits for any pending IRQ handlers for this interrupt
38 * to complete before returning. If you use this function while
39 * holding a resource the IRQ handler may need you will deadlock.
40 *
41 * This function may be called - with care - from IRQ context.
42 */
43void synchronize_irq(unsigned int irq)
44{
cb5bc832 45 struct irq_desc *desc = irq_to_desc(irq);
32f4125e 46 bool inprogress;
1da177e4 47
7d94f7ca 48 if (!desc)
c2b5a251
MW
49 return;
50
a98ce5c6
HX
51 do {
52 unsigned long flags;
53
54 /*
55 * Wait until we're out of the critical section. This might
56 * give the wrong answer due to the lack of memory barriers.
57 */
32f4125e 58 while (irqd_irq_inprogress(&desc->irq_data))
a98ce5c6
HX
59 cpu_relax();
60
61 /* Ok, that indicated we're done: double-check carefully. */
239007b8 62 raw_spin_lock_irqsave(&desc->lock, flags);
32f4125e 63 inprogress = irqd_irq_inprogress(&desc->irq_data);
239007b8 64 raw_spin_unlock_irqrestore(&desc->lock, flags);
a98ce5c6
HX
65
66 /* Oops, that failed? */
32f4125e 67 } while (inprogress);
3aa551c9
TG
68
69 /*
70 * We made sure that no hardirq handler is running. Now verify
71 * that no threaded handlers are active.
72 */
73 wait_event(desc->wait_for_threads, !atomic_read(&desc->threads_active));
1da177e4 74}
1da177e4
LT
75EXPORT_SYMBOL(synchronize_irq);
76
3aa551c9
TG
77#ifdef CONFIG_SMP
78cpumask_var_t irq_default_affinity;
79
771ee3b0
TG
80/**
81 * irq_can_set_affinity - Check if the affinity of a given irq can be set
82 * @irq: Interrupt to check
83 *
84 */
85int irq_can_set_affinity(unsigned int irq)
86{
08678b08 87 struct irq_desc *desc = irq_to_desc(irq);
771ee3b0 88
bce43032
TG
89 if (!desc || !irqd_can_balance(&desc->irq_data) ||
90 !desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity)
771ee3b0
TG
91 return 0;
92
93 return 1;
94}
95
591d2fb0
TG
96/**
97 * irq_set_thread_affinity - Notify irq threads to adjust affinity
98 * @desc: irq descriptor which has affitnity changed
99 *
100 * We just set IRQTF_AFFINITY and delegate the affinity setting
101 * to the interrupt thread itself. We can not call
102 * set_cpus_allowed_ptr() here as we hold desc->lock and this
103 * code can be called from hard interrupt context.
104 */
105void irq_set_thread_affinity(struct irq_desc *desc)
3aa551c9
TG
106{
107 struct irqaction *action = desc->action;
108
109 while (action) {
110 if (action->thread)
591d2fb0 111 set_bit(IRQTF_AFFINITY, &action->thread_flags);
3aa551c9
TG
112 action = action->next;
113 }
114}
115
1fa46f1f 116#ifdef CONFIG_GENERIC_PENDING_IRQ
0ef5ca1e 117static inline bool irq_can_move_pcntxt(struct irq_data *data)
1fa46f1f 118{
0ef5ca1e 119 return irqd_can_move_in_process_context(data);
1fa46f1f 120}
0ef5ca1e 121static inline bool irq_move_pending(struct irq_data *data)
1fa46f1f 122{
0ef5ca1e 123 return irqd_is_setaffinity_pending(data);
1fa46f1f
TG
124}
125static inline void
126irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask)
127{
128 cpumask_copy(desc->pending_mask, mask);
129}
130static inline void
131irq_get_pending(struct cpumask *mask, struct irq_desc *desc)
132{
133 cpumask_copy(mask, desc->pending_mask);
134}
135#else
0ef5ca1e 136static inline bool irq_can_move_pcntxt(struct irq_data *data) { return true; }
cd22c0e4 137static inline bool irq_move_pending(struct irq_data *data) { return false; }
1fa46f1f
TG
138static inline void
139irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask) { }
140static inline void
141irq_get_pending(struct cpumask *mask, struct irq_desc *desc) { }
142#endif
143
c2d0c555 144int __irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask)
771ee3b0 145{
c2d0c555
DD
146 struct irq_chip *chip = irq_data_get_irq_chip(data);
147 struct irq_desc *desc = irq_data_to_desc(data);
1fa46f1f 148 int ret = 0;
771ee3b0 149
c2d0c555 150 if (!chip || !chip->irq_set_affinity)
771ee3b0
TG
151 return -EINVAL;
152
0ef5ca1e 153 if (irq_can_move_pcntxt(data)) {
c2d0c555 154 ret = chip->irq_set_affinity(data, mask, false);
3b8249e7
TG
155 switch (ret) {
156 case IRQ_SET_MASK_OK:
c2d0c555 157 cpumask_copy(data->affinity, mask);
3b8249e7 158 case IRQ_SET_MASK_OK_NOCOPY:
591d2fb0 159 irq_set_thread_affinity(desc);
3b8249e7 160 ret = 0;
57b150cc 161 }
1fa46f1f 162 } else {
c2d0c555 163 irqd_set_move_pending(data);
1fa46f1f 164 irq_copy_pending(desc, mask);
57b150cc 165 }
1fa46f1f 166
cd7eab44
BH
167 if (desc->affinity_notify) {
168 kref_get(&desc->affinity_notify->kref);
169 schedule_work(&desc->affinity_notify->work);
170 }
c2d0c555
DD
171 irqd_set(data, IRQD_AFFINITY_SET);
172
173 return ret;
174}
175
176/**
177 * irq_set_affinity - Set the irq affinity of a given irq
178 * @irq: Interrupt to set affinity
30398bf6 179 * @mask: cpumask
c2d0c555
DD
180 *
181 */
182int irq_set_affinity(unsigned int irq, const struct cpumask *mask)
183{
184 struct irq_desc *desc = irq_to_desc(irq);
185 unsigned long flags;
186 int ret;
187
188 if (!desc)
189 return -EINVAL;
190
191 raw_spin_lock_irqsave(&desc->lock, flags);
192 ret = __irq_set_affinity_locked(irq_desc_get_irq_data(desc), mask);
239007b8 193 raw_spin_unlock_irqrestore(&desc->lock, flags);
1fa46f1f 194 return ret;
771ee3b0
TG
195}
196
e7a297b0
PWJ
197int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m)
198{
e7a297b0 199 unsigned long flags;
31d9d9b6 200 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
e7a297b0
PWJ
201
202 if (!desc)
203 return -EINVAL;
e7a297b0 204 desc->affinity_hint = m;
02725e74 205 irq_put_desc_unlock(desc, flags);
e7a297b0
PWJ
206 return 0;
207}
208EXPORT_SYMBOL_GPL(irq_set_affinity_hint);
209
cd7eab44
BH
210static void irq_affinity_notify(struct work_struct *work)
211{
212 struct irq_affinity_notify *notify =
213 container_of(work, struct irq_affinity_notify, work);
214 struct irq_desc *desc = irq_to_desc(notify->irq);
215 cpumask_var_t cpumask;
216 unsigned long flags;
217
1fa46f1f 218 if (!desc || !alloc_cpumask_var(&cpumask, GFP_KERNEL))
cd7eab44
BH
219 goto out;
220
221 raw_spin_lock_irqsave(&desc->lock, flags);
0ef5ca1e 222 if (irq_move_pending(&desc->irq_data))
1fa46f1f 223 irq_get_pending(cpumask, desc);
cd7eab44 224 else
1fb0ef31 225 cpumask_copy(cpumask, desc->irq_data.affinity);
cd7eab44
BH
226 raw_spin_unlock_irqrestore(&desc->lock, flags);
227
228 notify->notify(notify, cpumask);
229
230 free_cpumask_var(cpumask);
231out:
232 kref_put(&notify->kref, notify->release);
233}
234
235/**
236 * irq_set_affinity_notifier - control notification of IRQ affinity changes
237 * @irq: Interrupt for which to enable/disable notification
238 * @notify: Context for notification, or %NULL to disable
239 * notification. Function pointers must be initialised;
240 * the other fields will be initialised by this function.
241 *
242 * Must be called in process context. Notification may only be enabled
243 * after the IRQ is allocated and must be disabled before the IRQ is
244 * freed using free_irq().
245 */
246int
247irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify)
248{
249 struct irq_desc *desc = irq_to_desc(irq);
250 struct irq_affinity_notify *old_notify;
251 unsigned long flags;
252
253 /* The release function is promised process context */
254 might_sleep();
255
256 if (!desc)
257 return -EINVAL;
258
259 /* Complete initialisation of *notify */
260 if (notify) {
261 notify->irq = irq;
262 kref_init(&notify->kref);
263 INIT_WORK(&notify->work, irq_affinity_notify);
264 }
265
266 raw_spin_lock_irqsave(&desc->lock, flags);
267 old_notify = desc->affinity_notify;
268 desc->affinity_notify = notify;
269 raw_spin_unlock_irqrestore(&desc->lock, flags);
270
271 if (old_notify)
272 kref_put(&old_notify->kref, old_notify->release);
273
274 return 0;
275}
276EXPORT_SYMBOL_GPL(irq_set_affinity_notifier);
277
18404756
MK
278#ifndef CONFIG_AUTO_IRQ_AFFINITY
279/*
280 * Generic version of the affinity autoselector.
281 */
3b8249e7
TG
282static int
283setup_affinity(unsigned int irq, struct irq_desc *desc, struct cpumask *mask)
18404756 284{
35e857cb 285 struct irq_chip *chip = irq_desc_get_chip(desc);
569bda8d 286 struct cpumask *set = irq_default_affinity;
241fc640 287 int ret, node = desc->irq_data.node;
569bda8d 288
b008207c 289 /* Excludes PER_CPU and NO_BALANCE interrupts */
18404756
MK
290 if (!irq_can_set_affinity(irq))
291 return 0;
292
f6d87f4b
TG
293 /*
294 * Preserve an userspace affinity setup, but make sure that
295 * one of the targets is online.
296 */
2bdd1055 297 if (irqd_has_set(&desc->irq_data, IRQD_AFFINITY_SET)) {
569bda8d
TG
298 if (cpumask_intersects(desc->irq_data.affinity,
299 cpu_online_mask))
300 set = desc->irq_data.affinity;
0c6f8a8b 301 else
2bdd1055 302 irqd_clear(&desc->irq_data, IRQD_AFFINITY_SET);
f6d87f4b 303 }
18404756 304
3b8249e7 305 cpumask_and(mask, cpu_online_mask, set);
241fc640
PB
306 if (node != NUMA_NO_NODE) {
307 const struct cpumask *nodemask = cpumask_of_node(node);
308
309 /* make sure at least one of the cpus in nodemask is online */
310 if (cpumask_intersects(mask, nodemask))
311 cpumask_and(mask, mask, nodemask);
312 }
3b8249e7
TG
313 ret = chip->irq_set_affinity(&desc->irq_data, mask, false);
314 switch (ret) {
315 case IRQ_SET_MASK_OK:
316 cpumask_copy(desc->irq_data.affinity, mask);
317 case IRQ_SET_MASK_OK_NOCOPY:
318 irq_set_thread_affinity(desc);
319 }
18404756
MK
320 return 0;
321}
f6d87f4b 322#else
3b8249e7
TG
323static inline int
324setup_affinity(unsigned int irq, struct irq_desc *d, struct cpumask *mask)
f6d87f4b
TG
325{
326 return irq_select_affinity(irq);
327}
18404756
MK
328#endif
329
f6d87f4b
TG
330/*
331 * Called when affinity is set via /proc/irq
332 */
3b8249e7 333int irq_select_affinity_usr(unsigned int irq, struct cpumask *mask)
f6d87f4b
TG
334{
335 struct irq_desc *desc = irq_to_desc(irq);
336 unsigned long flags;
337 int ret;
338
239007b8 339 raw_spin_lock_irqsave(&desc->lock, flags);
3b8249e7 340 ret = setup_affinity(irq, desc, mask);
239007b8 341 raw_spin_unlock_irqrestore(&desc->lock, flags);
f6d87f4b
TG
342 return ret;
343}
344
345#else
3b8249e7
TG
346static inline int
347setup_affinity(unsigned int irq, struct irq_desc *desc, struct cpumask *mask)
f6d87f4b
TG
348{
349 return 0;
350}
1da177e4
LT
351#endif
352
0a0c5168
RW
353void __disable_irq(struct irq_desc *desc, unsigned int irq, bool suspend)
354{
355 if (suspend) {
685fd0b4 356 if (!desc->action || (desc->action->flags & IRQF_NO_SUSPEND))
0a0c5168 357 return;
c531e836 358 desc->istate |= IRQS_SUSPENDED;
0a0c5168
RW
359 }
360
3aae994f 361 if (!desc->depth++)
87923470 362 irq_disable(desc);
0a0c5168
RW
363}
364
02725e74
TG
365static int __disable_irq_nosync(unsigned int irq)
366{
367 unsigned long flags;
31d9d9b6 368 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
02725e74
TG
369
370 if (!desc)
371 return -EINVAL;
372 __disable_irq(desc, irq, false);
373 irq_put_desc_busunlock(desc, flags);
374 return 0;
375}
376
1da177e4
LT
377/**
378 * disable_irq_nosync - disable an irq without waiting
379 * @irq: Interrupt to disable
380 *
381 * Disable the selected interrupt line. Disables and Enables are
382 * nested.
383 * Unlike disable_irq(), this function does not ensure existing
384 * instances of the IRQ handler have completed before returning.
385 *
386 * This function may be called from IRQ context.
387 */
388void disable_irq_nosync(unsigned int irq)
389{
02725e74 390 __disable_irq_nosync(irq);
1da177e4 391}
1da177e4
LT
392EXPORT_SYMBOL(disable_irq_nosync);
393
394/**
395 * disable_irq - disable an irq and wait for completion
396 * @irq: Interrupt to disable
397 *
398 * Disable the selected interrupt line. Enables and Disables are
399 * nested.
400 * This function waits for any pending IRQ handlers for this interrupt
401 * to complete before returning. If you use this function while
402 * holding a resource the IRQ handler may need you will deadlock.
403 *
404 * This function may be called - with care - from IRQ context.
405 */
406void disable_irq(unsigned int irq)
407{
02725e74 408 if (!__disable_irq_nosync(irq))
1da177e4
LT
409 synchronize_irq(irq);
410}
1da177e4
LT
411EXPORT_SYMBOL(disable_irq);
412
0a0c5168 413void __enable_irq(struct irq_desc *desc, unsigned int irq, bool resume)
1adb0850 414{
dc5f219e 415 if (resume) {
c531e836 416 if (!(desc->istate & IRQS_SUSPENDED)) {
dc5f219e
TG
417 if (!desc->action)
418 return;
419 if (!(desc->action->flags & IRQF_FORCE_RESUME))
420 return;
421 /* Pretend that it got disabled ! */
422 desc->depth++;
423 }
c531e836 424 desc->istate &= ~IRQS_SUSPENDED;
dc5f219e 425 }
0a0c5168 426
1adb0850
TG
427 switch (desc->depth) {
428 case 0:
0a0c5168 429 err_out:
b8c512f6 430 WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n", irq);
1adb0850
TG
431 break;
432 case 1: {
c531e836 433 if (desc->istate & IRQS_SUSPENDED)
0a0c5168 434 goto err_out;
1adb0850 435 /* Prevent probing on this irq: */
1ccb4e61 436 irq_settings_set_noprobe(desc);
3aae994f 437 irq_enable(desc);
1adb0850
TG
438 check_irq_resend(desc, irq);
439 /* fall-through */
440 }
441 default:
442 desc->depth--;
443 }
444}
445
1da177e4
LT
446/**
447 * enable_irq - enable handling of an irq
448 * @irq: Interrupt to enable
449 *
450 * Undoes the effect of one call to disable_irq(). If this
451 * matches the last disable, processing of interrupts on this
452 * IRQ line is re-enabled.
453 *
70aedd24 454 * This function may be called from IRQ context only when
6b8ff312 455 * desc->irq_data.chip->bus_lock and desc->chip->bus_sync_unlock are NULL !
1da177e4
LT
456 */
457void enable_irq(unsigned int irq)
458{
1da177e4 459 unsigned long flags;
31d9d9b6 460 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
1da177e4 461
7d94f7ca 462 if (!desc)
c2b5a251 463 return;
50f7c032
TG
464 if (WARN(!desc->irq_data.chip,
465 KERN_ERR "enable_irq before setup/request_irq: irq %u\n", irq))
02725e74 466 goto out;
2656c366 467
0a0c5168 468 __enable_irq(desc, irq, false);
02725e74
TG
469out:
470 irq_put_desc_busunlock(desc, flags);
1da177e4 471}
1da177e4
LT
472EXPORT_SYMBOL(enable_irq);
473
0c5d1eb7 474static int set_irq_wake_real(unsigned int irq, unsigned int on)
2db87321 475{
08678b08 476 struct irq_desc *desc = irq_to_desc(irq);
2db87321
UKK
477 int ret = -ENXIO;
478
60f96b41
SS
479 if (irq_desc_get_chip(desc)->flags & IRQCHIP_SKIP_SET_WAKE)
480 return 0;
481
2f7e99bb
TG
482 if (desc->irq_data.chip->irq_set_wake)
483 ret = desc->irq_data.chip->irq_set_wake(&desc->irq_data, on);
2db87321
UKK
484
485 return ret;
486}
487
ba9a2331 488/**
a0cd9ca2 489 * irq_set_irq_wake - control irq power management wakeup
ba9a2331
TG
490 * @irq: interrupt to control
491 * @on: enable/disable power management wakeup
492 *
15a647eb
DB
493 * Enable/disable power management wakeup mode, which is
494 * disabled by default. Enables and disables must match,
495 * just as they match for non-wakeup mode support.
496 *
497 * Wakeup mode lets this IRQ wake the system from sleep
498 * states like "suspend to RAM".
ba9a2331 499 */
a0cd9ca2 500int irq_set_irq_wake(unsigned int irq, unsigned int on)
ba9a2331 501{
ba9a2331 502 unsigned long flags;
31d9d9b6 503 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
2db87321 504 int ret = 0;
ba9a2331 505
13863a66
JJ
506 if (!desc)
507 return -EINVAL;
508
15a647eb
DB
509 /* wakeup-capable irqs can be shared between drivers that
510 * don't need to have the same sleep mode behaviors.
511 */
15a647eb 512 if (on) {
2db87321
UKK
513 if (desc->wake_depth++ == 0) {
514 ret = set_irq_wake_real(irq, on);
515 if (ret)
516 desc->wake_depth = 0;
517 else
7f94226f 518 irqd_set(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 519 }
15a647eb
DB
520 } else {
521 if (desc->wake_depth == 0) {
7a2c4770 522 WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
2db87321
UKK
523 } else if (--desc->wake_depth == 0) {
524 ret = set_irq_wake_real(irq, on);
525 if (ret)
526 desc->wake_depth = 1;
527 else
7f94226f 528 irqd_clear(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 529 }
15a647eb 530 }
02725e74 531 irq_put_desc_busunlock(desc, flags);
ba9a2331
TG
532 return ret;
533}
a0cd9ca2 534EXPORT_SYMBOL(irq_set_irq_wake);
ba9a2331 535
1da177e4
LT
536/*
537 * Internal function that tells the architecture code whether a
538 * particular irq has been exclusively allocated or is available
539 * for driver use.
540 */
541int can_request_irq(unsigned int irq, unsigned long irqflags)
542{
cc8c3b78 543 unsigned long flags;
31d9d9b6 544 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
02725e74 545 int canrequest = 0;
1da177e4 546
7d94f7ca
YL
547 if (!desc)
548 return 0;
549
02725e74
TG
550 if (irq_settings_can_request(desc)) {
551 if (desc->action)
552 if (irqflags & desc->action->flags & IRQF_SHARED)
553 canrequest =1;
554 }
555 irq_put_desc_unlock(desc, flags);
556 return canrequest;
1da177e4
LT
557}
558
0c5d1eb7 559int __irq_set_trigger(struct irq_desc *desc, unsigned int irq,
b2ba2c30 560 unsigned long flags)
82736f4d 561{
6b8ff312 562 struct irq_chip *chip = desc->irq_data.chip;
d4d5e089 563 int ret, unmask = 0;
82736f4d 564
b2ba2c30 565 if (!chip || !chip->irq_set_type) {
82736f4d
UKK
566 /*
567 * IRQF_TRIGGER_* but the PIC does not support multiple
568 * flow-types?
569 */
97fd75b7 570 pr_debug("No set_type function for IRQ %d (%s)\n", irq,
f5d89470 571 chip ? (chip->name ? : "unknown") : "unknown");
82736f4d
UKK
572 return 0;
573 }
574
876dbd4c 575 flags &= IRQ_TYPE_SENSE_MASK;
d4d5e089
TG
576
577 if (chip->flags & IRQCHIP_SET_TYPE_MASKED) {
32f4125e 578 if (!irqd_irq_masked(&desc->irq_data))
d4d5e089 579 mask_irq(desc);
32f4125e 580 if (!irqd_irq_disabled(&desc->irq_data))
d4d5e089
TG
581 unmask = 1;
582 }
583
f2b662da 584 /* caller masked out all except trigger mode flags */
b2ba2c30 585 ret = chip->irq_set_type(&desc->irq_data, flags);
82736f4d 586
876dbd4c
TG
587 switch (ret) {
588 case IRQ_SET_MASK_OK:
589 irqd_clear(&desc->irq_data, IRQD_TRIGGER_MASK);
590 irqd_set(&desc->irq_data, flags);
591
592 case IRQ_SET_MASK_OK_NOCOPY:
593 flags = irqd_get_trigger_type(&desc->irq_data);
594 irq_settings_set_trigger_mask(desc, flags);
595 irqd_clear(&desc->irq_data, IRQD_LEVEL);
596 irq_settings_clr_level(desc);
597 if (flags & IRQ_TYPE_LEVEL_MASK) {
598 irq_settings_set_level(desc);
599 irqd_set(&desc->irq_data, IRQD_LEVEL);
600 }
46732475 601
d4d5e089 602 ret = 0;
8fff39e0 603 break;
876dbd4c 604 default:
97fd75b7 605 pr_err("Setting trigger mode %lu for irq %u failed (%pF)\n",
876dbd4c 606 flags, irq, chip->irq_set_type);
0c5d1eb7 607 }
d4d5e089
TG
608 if (unmask)
609 unmask_irq(desc);
82736f4d
UKK
610 return ret;
611}
612
b25c340c
TG
613/*
614 * Default primary interrupt handler for threaded interrupts. Is
615 * assigned as primary handler when request_threaded_irq is called
616 * with handler == NULL. Useful for oneshot interrupts.
617 */
618static irqreturn_t irq_default_primary_handler(int irq, void *dev_id)
619{
620 return IRQ_WAKE_THREAD;
621}
622
399b5da2
TG
623/*
624 * Primary handler for nested threaded interrupts. Should never be
625 * called.
626 */
627static irqreturn_t irq_nested_primary_handler(int irq, void *dev_id)
628{
629 WARN(1, "Primary handler called for nested irq %d\n", irq);
630 return IRQ_NONE;
631}
632
3aa551c9
TG
633static int irq_wait_for_interrupt(struct irqaction *action)
634{
550acb19
IY
635 set_current_state(TASK_INTERRUPTIBLE);
636
3aa551c9 637 while (!kthread_should_stop()) {
f48fe81e
TG
638
639 if (test_and_clear_bit(IRQTF_RUNTHREAD,
640 &action->thread_flags)) {
3aa551c9
TG
641 __set_current_state(TASK_RUNNING);
642 return 0;
f48fe81e
TG
643 }
644 schedule();
550acb19 645 set_current_state(TASK_INTERRUPTIBLE);
3aa551c9 646 }
550acb19 647 __set_current_state(TASK_RUNNING);
3aa551c9
TG
648 return -1;
649}
650
b25c340c
TG
651/*
652 * Oneshot interrupts keep the irq line masked until the threaded
653 * handler finished. unmask if the interrupt has not been disabled and
654 * is marked MASKED.
655 */
b5faba21 656static void irq_finalize_oneshot(struct irq_desc *desc,
f3f79e38 657 struct irqaction *action)
b25c340c 658{
b5faba21
TG
659 if (!(desc->istate & IRQS_ONESHOT))
660 return;
0b1adaa0 661again:
3876ec9e 662 chip_bus_lock(desc);
239007b8 663 raw_spin_lock_irq(&desc->lock);
0b1adaa0
TG
664
665 /*
666 * Implausible though it may be we need to protect us against
667 * the following scenario:
668 *
669 * The thread is faster done than the hard interrupt handler
670 * on the other CPU. If we unmask the irq line then the
671 * interrupt can come in again and masks the line, leaves due
009b4c3b 672 * to IRQS_INPROGRESS and the irq line is masked forever.
b5faba21
TG
673 *
674 * This also serializes the state of shared oneshot handlers
675 * versus "desc->threads_onehsot |= action->thread_mask;" in
676 * irq_wake_thread(). See the comment there which explains the
677 * serialization.
0b1adaa0 678 */
32f4125e 679 if (unlikely(irqd_irq_inprogress(&desc->irq_data))) {
0b1adaa0 680 raw_spin_unlock_irq(&desc->lock);
3876ec9e 681 chip_bus_sync_unlock(desc);
0b1adaa0
TG
682 cpu_relax();
683 goto again;
684 }
685
b5faba21
TG
686 /*
687 * Now check again, whether the thread should run. Otherwise
688 * we would clear the threads_oneshot bit of this thread which
689 * was just set.
690 */
f3f79e38 691 if (test_bit(IRQTF_RUNTHREAD, &action->thread_flags))
b5faba21
TG
692 goto out_unlock;
693
694 desc->threads_oneshot &= ~action->thread_mask;
695
32f4125e
TG
696 if (!desc->threads_oneshot && !irqd_irq_disabled(&desc->irq_data) &&
697 irqd_irq_masked(&desc->irq_data))
698 unmask_irq(desc);
699
b5faba21 700out_unlock:
239007b8 701 raw_spin_unlock_irq(&desc->lock);
3876ec9e 702 chip_bus_sync_unlock(desc);
b25c340c
TG
703}
704
61f38261 705#ifdef CONFIG_SMP
591d2fb0 706/*
d4d5e089 707 * Check whether we need to chasnge the affinity of the interrupt thread.
591d2fb0
TG
708 */
709static void
710irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action)
711{
712 cpumask_var_t mask;
713
714 if (!test_and_clear_bit(IRQTF_AFFINITY, &action->thread_flags))
715 return;
716
717 /*
718 * In case we are out of memory we set IRQTF_AFFINITY again and
719 * try again next time
720 */
721 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
722 set_bit(IRQTF_AFFINITY, &action->thread_flags);
723 return;
724 }
725
239007b8 726 raw_spin_lock_irq(&desc->lock);
6b8ff312 727 cpumask_copy(mask, desc->irq_data.affinity);
239007b8 728 raw_spin_unlock_irq(&desc->lock);
591d2fb0
TG
729
730 set_cpus_allowed_ptr(current, mask);
731 free_cpumask_var(mask);
732}
61f38261
BP
733#else
734static inline void
735irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) { }
736#endif
591d2fb0 737
8d32a307
TG
738/*
739 * Interrupts which are not explicitely requested as threaded
740 * interrupts rely on the implicit bh/preempt disable of the hard irq
741 * context. So we need to disable bh here to avoid deadlocks and other
742 * side effects.
743 */
3a43e05f 744static irqreturn_t
8d32a307
TG
745irq_forced_thread_fn(struct irq_desc *desc, struct irqaction *action)
746{
3a43e05f
SAS
747 irqreturn_t ret;
748
8d32a307 749 local_bh_disable();
3a43e05f 750 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 751 irq_finalize_oneshot(desc, action);
8d32a307 752 local_bh_enable();
3a43e05f 753 return ret;
8d32a307
TG
754}
755
756/*
757 * Interrupts explicitely requested as threaded interupts want to be
758 * preemtible - many of them need to sleep and wait for slow busses to
759 * complete.
760 */
3a43e05f
SAS
761static irqreturn_t irq_thread_fn(struct irq_desc *desc,
762 struct irqaction *action)
8d32a307 763{
3a43e05f
SAS
764 irqreturn_t ret;
765
766 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 767 irq_finalize_oneshot(desc, action);
3a43e05f 768 return ret;
8d32a307
TG
769}
770
7140ea19
IY
771static void wake_threads_waitq(struct irq_desc *desc)
772{
773 if (atomic_dec_and_test(&desc->threads_active) &&
774 waitqueue_active(&desc->wait_for_threads))
775 wake_up(&desc->wait_for_threads);
776}
777
3aa551c9
TG
778/*
779 * Interrupt handler thread
780 */
781static int irq_thread(void *data)
782{
c9b5f501 783 static const struct sched_param param = {
fe7de49f
KM
784 .sched_priority = MAX_USER_RT_PRIO/2,
785 };
3aa551c9
TG
786 struct irqaction *action = data;
787 struct irq_desc *desc = irq_to_desc(action->irq);
3a43e05f
SAS
788 irqreturn_t (*handler_fn)(struct irq_desc *desc,
789 struct irqaction *action);
3aa551c9 790
540b60e2 791 if (force_irqthreads && test_bit(IRQTF_FORCED_THREAD,
8d32a307
TG
792 &action->thread_flags))
793 handler_fn = irq_forced_thread_fn;
794 else
795 handler_fn = irq_thread_fn;
796
3aa551c9 797 sched_setscheduler(current, SCHED_FIFO, &param);
4bcdf1d0 798 current->irq_thread = 1;
3aa551c9
TG
799
800 while (!irq_wait_for_interrupt(action)) {
7140ea19 801 irqreturn_t action_ret;
3aa551c9 802
591d2fb0
TG
803 irq_thread_check_affinity(desc, action);
804
7140ea19
IY
805 action_ret = handler_fn(desc, action);
806 if (!noirqdebug)
807 note_interrupt(action->irq, desc, action_ret);
3aa551c9 808
7140ea19 809 wake_threads_waitq(desc);
3aa551c9
TG
810 }
811
7140ea19
IY
812 /*
813 * This is the regular exit path. __free_irq() is stopping the
814 * thread via kthread_stop() after calling
815 * synchronize_irq(). So neither IRQTF_RUNTHREAD nor the
e04268b0
TG
816 * oneshot mask bit can be set. We cannot verify that as we
817 * cannot touch the oneshot mask at this point anymore as
818 * __setup_irq() might have given out currents thread_mask
819 * again.
7140ea19 820 *
4bcdf1d0 821 * Clear irq_thread. Otherwise exit_irq_thread() would make
3aa551c9
TG
822 * fuzz about an active irq thread going into nirvana.
823 */
4bcdf1d0 824 current->irq_thread = 0;
3aa551c9
TG
825 return 0;
826}
827
828/*
829 * Called from do_exit()
830 */
831void exit_irq_thread(void)
832{
833 struct task_struct *tsk = current;
b5faba21 834 struct irq_desc *desc;
4bcdf1d0 835 struct irqaction *action;
3aa551c9 836
4bcdf1d0 837 if (!tsk->irq_thread)
3aa551c9
TG
838 return;
839
4bcdf1d0
AG
840 action = kthread_data(tsk);
841
97fd75b7 842 pr_err("exiting task \"%s\" (%d) is an active IRQ thread (irq %d)\n",
4bcdf1d0 843 tsk->comm ? tsk->comm : "", tsk->pid, action->irq);
3aa551c9 844
4bcdf1d0 845 desc = irq_to_desc(action->irq);
b5faba21 846
7140ea19
IY
847 /*
848 * If IRQTF_RUNTHREAD is set, we need to decrement
849 * desc->threads_active and wake possible waiters.
850 */
851 if (test_and_clear_bit(IRQTF_RUNTHREAD, &action->thread_flags))
852 wake_threads_waitq(desc);
853
5234ffb9 854 /* Prevent a stale desc->threads_oneshot */
f3f79e38 855 irq_finalize_oneshot(desc, action);
3aa551c9
TG
856}
857
8d32a307
TG
858static void irq_setup_forced_threading(struct irqaction *new)
859{
860 if (!force_irqthreads)
861 return;
862 if (new->flags & (IRQF_NO_THREAD | IRQF_PERCPU | IRQF_ONESHOT))
863 return;
864
865 new->flags |= IRQF_ONESHOT;
866
867 if (!new->thread_fn) {
868 set_bit(IRQTF_FORCED_THREAD, &new->thread_flags);
869 new->thread_fn = new->handler;
870 new->handler = irq_default_primary_handler;
871 }
872}
873
1da177e4
LT
874/*
875 * Internal function to register an irqaction - typically used to
876 * allocate special interrupts that are part of the architecture.
877 */
d3c60047 878static int
327ec569 879__setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
1da177e4 880{
f17c7545 881 struct irqaction *old, **old_ptr;
b5faba21 882 unsigned long flags, thread_mask = 0;
3b8249e7
TG
883 int ret, nested, shared = 0;
884 cpumask_var_t mask;
1da177e4 885
7d94f7ca 886 if (!desc)
c2b5a251
MW
887 return -EINVAL;
888
6b8ff312 889 if (desc->irq_data.chip == &no_irq_chip)
1da177e4 890 return -ENOSYS;
b6873807
SAS
891 if (!try_module_get(desc->owner))
892 return -ENODEV;
1da177e4
LT
893 /*
894 * Some drivers like serial.c use request_irq() heavily,
895 * so we have to be careful not to interfere with a
896 * running system.
897 */
3cca53b0 898 if (new->flags & IRQF_SAMPLE_RANDOM) {
1da177e4
LT
899 /*
900 * This function might sleep, we want to call it first,
901 * outside of the atomic block.
902 * Yes, this might clear the entropy pool if the wrong
903 * driver is attempted to be loaded, without actually
904 * installing a new handler, but is this really a problem,
905 * only the sysadmin is able to do this.
906 */
907 rand_initialize_irq(irq);
908 }
909
3aa551c9 910 /*
399b5da2
TG
911 * Check whether the interrupt nests into another interrupt
912 * thread.
913 */
1ccb4e61 914 nested = irq_settings_is_nested_thread(desc);
399b5da2 915 if (nested) {
b6873807
SAS
916 if (!new->thread_fn) {
917 ret = -EINVAL;
918 goto out_mput;
919 }
399b5da2
TG
920 /*
921 * Replace the primary handler which was provided from
922 * the driver for non nested interrupt handling by the
923 * dummy function which warns when called.
924 */
925 new->handler = irq_nested_primary_handler;
8d32a307 926 } else {
7f1b1244
PM
927 if (irq_settings_can_thread(desc))
928 irq_setup_forced_threading(new);
399b5da2
TG
929 }
930
3aa551c9 931 /*
399b5da2
TG
932 * Create a handler thread when a thread function is supplied
933 * and the interrupt does not nest into another interrupt
934 * thread.
3aa551c9 935 */
399b5da2 936 if (new->thread_fn && !nested) {
3aa551c9
TG
937 struct task_struct *t;
938
939 t = kthread_create(irq_thread, new, "irq/%d-%s", irq,
940 new->name);
b6873807
SAS
941 if (IS_ERR(t)) {
942 ret = PTR_ERR(t);
943 goto out_mput;
944 }
3aa551c9
TG
945 /*
946 * We keep the reference to the task struct even if
947 * the thread dies to avoid that the interrupt code
948 * references an already freed task_struct.
949 */
950 get_task_struct(t);
951 new->thread = t;
3aa551c9
TG
952 }
953
3b8249e7
TG
954 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
955 ret = -ENOMEM;
956 goto out_thread;
957 }
958
1da177e4
LT
959 /*
960 * The following block of code has to be executed atomically
961 */
239007b8 962 raw_spin_lock_irqsave(&desc->lock, flags);
f17c7545
IM
963 old_ptr = &desc->action;
964 old = *old_ptr;
06fcb0c6 965 if (old) {
e76de9f8
TG
966 /*
967 * Can't share interrupts unless both agree to and are
968 * the same type (level, edge, polarity). So both flag
3cca53b0 969 * fields must have IRQF_SHARED set and the bits which
9d591edd
TG
970 * set the trigger type must match. Also all must
971 * agree on ONESHOT.
e76de9f8 972 */
3cca53b0 973 if (!((old->flags & new->flags) & IRQF_SHARED) ||
9d591edd 974 ((old->flags ^ new->flags) & IRQF_TRIGGER_MASK) ||
f5d89470 975 ((old->flags ^ new->flags) & IRQF_ONESHOT))
f5163427
DS
976 goto mismatch;
977
f5163427 978 /* All handlers must agree on per-cpuness */
3cca53b0
TG
979 if ((old->flags & IRQF_PERCPU) !=
980 (new->flags & IRQF_PERCPU))
f5163427 981 goto mismatch;
1da177e4
LT
982
983 /* add new interrupt at end of irq queue */
984 do {
52abb700
TG
985 /*
986 * Or all existing action->thread_mask bits,
987 * so we can find the next zero bit for this
988 * new action.
989 */
b5faba21 990 thread_mask |= old->thread_mask;
f17c7545
IM
991 old_ptr = &old->next;
992 old = *old_ptr;
1da177e4
LT
993 } while (old);
994 shared = 1;
995 }
996
b5faba21 997 /*
52abb700
TG
998 * Setup the thread mask for this irqaction for ONESHOT. For
999 * !ONESHOT irqs the thread mask is 0 so we can avoid a
1000 * conditional in irq_wake_thread().
b5faba21 1001 */
52abb700
TG
1002 if (new->flags & IRQF_ONESHOT) {
1003 /*
1004 * Unlikely to have 32 resp 64 irqs sharing one line,
1005 * but who knows.
1006 */
1007 if (thread_mask == ~0UL) {
1008 ret = -EBUSY;
1009 goto out_mask;
1010 }
1011 /*
1012 * The thread_mask for the action is or'ed to
1013 * desc->thread_active to indicate that the
1014 * IRQF_ONESHOT thread handler has been woken, but not
1015 * yet finished. The bit is cleared when a thread
1016 * completes. When all threads of a shared interrupt
1017 * line have completed desc->threads_active becomes
1018 * zero and the interrupt line is unmasked. See
1019 * handle.c:irq_wake_thread() for further information.
1020 *
1021 * If no thread is woken by primary (hard irq context)
1022 * interrupt handlers, then desc->threads_active is
1023 * also checked for zero to unmask the irq line in the
1024 * affected hard irq flow handlers
1025 * (handle_[fasteoi|level]_irq).
1026 *
1027 * The new action gets the first zero bit of
1028 * thread_mask assigned. See the loop above which or's
1029 * all existing action->thread_mask bits.
1030 */
1031 new->thread_mask = 1 << ffz(thread_mask);
1c6c6952
TG
1032
1033 } else if (new->handler == irq_default_primary_handler) {
1034 /*
1035 * The interrupt was requested with handler = NULL, so
1036 * we use the default primary handler for it. But it
1037 * does not have the oneshot flag set. In combination
1038 * with level interrupts this is deadly, because the
1039 * default primary handler just wakes the thread, then
1040 * the irq lines is reenabled, but the device still
1041 * has the level irq asserted. Rinse and repeat....
1042 *
1043 * While this works for edge type interrupts, we play
1044 * it safe and reject unconditionally because we can't
1045 * say for sure which type this interrupt really
1046 * has. The type flags are unreliable as the
1047 * underlying chip implementation can override them.
1048 */
97fd75b7 1049 pr_err("Threaded irq requested with handler=NULL and !ONESHOT for irq %d\n",
1c6c6952
TG
1050 irq);
1051 ret = -EINVAL;
1052 goto out_mask;
b5faba21 1053 }
b5faba21 1054
1da177e4 1055 if (!shared) {
3aa551c9
TG
1056 init_waitqueue_head(&desc->wait_for_threads);
1057
e76de9f8 1058 /* Setup the type (level, edge polarity) if configured: */
3cca53b0 1059 if (new->flags & IRQF_TRIGGER_MASK) {
f2b662da
DB
1060 ret = __irq_set_trigger(desc, irq,
1061 new->flags & IRQF_TRIGGER_MASK);
82736f4d 1062
3aa551c9 1063 if (ret)
3b8249e7 1064 goto out_mask;
091738a2 1065 }
6a6de9ef 1066
009b4c3b 1067 desc->istate &= ~(IRQS_AUTODETECT | IRQS_SPURIOUS_DISABLED | \
32f4125e
TG
1068 IRQS_ONESHOT | IRQS_WAITING);
1069 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
94d39e1f 1070
a005677b
TG
1071 if (new->flags & IRQF_PERCPU) {
1072 irqd_set(&desc->irq_data, IRQD_PER_CPU);
1073 irq_settings_set_per_cpu(desc);
1074 }
6a58fb3b 1075
b25c340c 1076 if (new->flags & IRQF_ONESHOT)
3d67baec 1077 desc->istate |= IRQS_ONESHOT;
b25c340c 1078
1ccb4e61 1079 if (irq_settings_can_autoenable(desc))
b4bc724e 1080 irq_startup(desc, true);
46999238 1081 else
e76de9f8
TG
1082 /* Undo nested disables: */
1083 desc->depth = 1;
18404756 1084
612e3684 1085 /* Exclude IRQ from balancing if requested */
a005677b
TG
1086 if (new->flags & IRQF_NOBALANCING) {
1087 irq_settings_set_no_balancing(desc);
1088 irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
1089 }
612e3684 1090
18404756 1091 /* Set default affinity mask once everything is setup */
3b8249e7 1092 setup_affinity(irq, desc, mask);
0c5d1eb7 1093
876dbd4c
TG
1094 } else if (new->flags & IRQF_TRIGGER_MASK) {
1095 unsigned int nmsk = new->flags & IRQF_TRIGGER_MASK;
1096 unsigned int omsk = irq_settings_get_trigger_mask(desc);
1097
1098 if (nmsk != omsk)
1099 /* hope the handler works with current trigger mode */
97fd75b7 1100 pr_warning("irq %d uses trigger mode %u; requested %u\n",
876dbd4c 1101 irq, nmsk, omsk);
1da177e4 1102 }
82736f4d 1103
69ab8494 1104 new->irq = irq;
f17c7545 1105 *old_ptr = new;
82736f4d 1106
8528b0f1
LT
1107 /* Reset broken irq detection when installing new handler */
1108 desc->irq_count = 0;
1109 desc->irqs_unhandled = 0;
1adb0850
TG
1110
1111 /*
1112 * Check whether we disabled the irq via the spurious handler
1113 * before. Reenable it and give it another chance.
1114 */
7acdd53e
TG
1115 if (shared && (desc->istate & IRQS_SPURIOUS_DISABLED)) {
1116 desc->istate &= ~IRQS_SPURIOUS_DISABLED;
0a0c5168 1117 __enable_irq(desc, irq, false);
1adb0850
TG
1118 }
1119
239007b8 1120 raw_spin_unlock_irqrestore(&desc->lock, flags);
1da177e4 1121
69ab8494
TG
1122 /*
1123 * Strictly no need to wake it up, but hung_task complains
1124 * when no hard interrupt wakes the thread up.
1125 */
1126 if (new->thread)
1127 wake_up_process(new->thread);
1128
2c6927a3 1129 register_irq_proc(irq, desc);
1da177e4
LT
1130 new->dir = NULL;
1131 register_handler_proc(irq, new);
4f5058c3 1132 free_cpumask_var(mask);
1da177e4
LT
1133
1134 return 0;
f5163427
DS
1135
1136mismatch:
3cca53b0 1137 if (!(new->flags & IRQF_PROBE_SHARED)) {
97fd75b7 1138 pr_err("Flags mismatch irq %d. %08x (%s) vs. %08x (%s)\n",
f5d89470
TG
1139 irq, new->flags, new->name, old->flags, old->name);
1140#ifdef CONFIG_DEBUG_SHIRQ
13e87ec6 1141 dump_stack();
3f050447 1142#endif
f5d89470 1143 }
3aa551c9
TG
1144 ret = -EBUSY;
1145
3b8249e7 1146out_mask:
1c389795 1147 raw_spin_unlock_irqrestore(&desc->lock, flags);
3b8249e7
TG
1148 free_cpumask_var(mask);
1149
3aa551c9 1150out_thread:
3aa551c9
TG
1151 if (new->thread) {
1152 struct task_struct *t = new->thread;
1153
1154 new->thread = NULL;
05d74efa 1155 kthread_stop(t);
3aa551c9
TG
1156 put_task_struct(t);
1157 }
b6873807
SAS
1158out_mput:
1159 module_put(desc->owner);
3aa551c9 1160 return ret;
1da177e4
LT
1161}
1162
d3c60047
TG
1163/**
1164 * setup_irq - setup an interrupt
1165 * @irq: Interrupt line to setup
1166 * @act: irqaction for the interrupt
1167 *
1168 * Used to statically setup interrupts in the early boot process.
1169 */
1170int setup_irq(unsigned int irq, struct irqaction *act)
1171{
986c011d 1172 int retval;
d3c60047
TG
1173 struct irq_desc *desc = irq_to_desc(irq);
1174
31d9d9b6
MZ
1175 if (WARN_ON(irq_settings_is_per_cpu_devid(desc)))
1176 return -EINVAL;
986c011d
DD
1177 chip_bus_lock(desc);
1178 retval = __setup_irq(irq, desc, act);
1179 chip_bus_sync_unlock(desc);
1180
1181 return retval;
d3c60047 1182}
eb53b4e8 1183EXPORT_SYMBOL_GPL(setup_irq);
d3c60047 1184
31d9d9b6 1185/*
cbf94f06
MD
1186 * Internal function to unregister an irqaction - used to free
1187 * regular and special interrupts that are part of the architecture.
1da177e4 1188 */
cbf94f06 1189static struct irqaction *__free_irq(unsigned int irq, void *dev_id)
1da177e4 1190{
d3c60047 1191 struct irq_desc *desc = irq_to_desc(irq);
f17c7545 1192 struct irqaction *action, **action_ptr;
1da177e4
LT
1193 unsigned long flags;
1194
ae88a23b 1195 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
7d94f7ca 1196
7d94f7ca 1197 if (!desc)
f21cfb25 1198 return NULL;
1da177e4 1199
239007b8 1200 raw_spin_lock_irqsave(&desc->lock, flags);
ae88a23b
IM
1201
1202 /*
1203 * There can be multiple actions per IRQ descriptor, find the right
1204 * one based on the dev_id:
1205 */
f17c7545 1206 action_ptr = &desc->action;
1da177e4 1207 for (;;) {
f17c7545 1208 action = *action_ptr;
1da177e4 1209
ae88a23b
IM
1210 if (!action) {
1211 WARN(1, "Trying to free already-free IRQ %d\n", irq);
239007b8 1212 raw_spin_unlock_irqrestore(&desc->lock, flags);
1da177e4 1213
f21cfb25 1214 return NULL;
ae88a23b 1215 }
1da177e4 1216
8316e381
IM
1217 if (action->dev_id == dev_id)
1218 break;
f17c7545 1219 action_ptr = &action->next;
ae88a23b 1220 }
dbce706e 1221
ae88a23b 1222 /* Found it - now remove it from the list of entries: */
f17c7545 1223 *action_ptr = action->next;
ae88a23b 1224
ae88a23b 1225 /* If this was the last handler, shut down the IRQ line: */
46999238
TG
1226 if (!desc->action)
1227 irq_shutdown(desc);
3aa551c9 1228
e7a297b0
PWJ
1229#ifdef CONFIG_SMP
1230 /* make sure affinity_hint is cleaned up */
1231 if (WARN_ON_ONCE(desc->affinity_hint))
1232 desc->affinity_hint = NULL;
1233#endif
1234
239007b8 1235 raw_spin_unlock_irqrestore(&desc->lock, flags);
ae88a23b
IM
1236
1237 unregister_handler_proc(irq, action);
1238
1239 /* Make sure it's not being used on another CPU: */
1240 synchronize_irq(irq);
1da177e4 1241
70edcd77 1242#ifdef CONFIG_DEBUG_SHIRQ
ae88a23b
IM
1243 /*
1244 * It's a shared IRQ -- the driver ought to be prepared for an IRQ
1245 * event to happen even now it's being freed, so let's make sure that
1246 * is so by doing an extra call to the handler ....
1247 *
1248 * ( We do this after actually deregistering it, to make sure that a
1249 * 'real' IRQ doesn't run in * parallel with our fake. )
1250 */
1251 if (action->flags & IRQF_SHARED) {
1252 local_irq_save(flags);
1253 action->handler(irq, dev_id);
1254 local_irq_restore(flags);
1da177e4 1255 }
ae88a23b 1256#endif
2d860ad7
LT
1257
1258 if (action->thread) {
05d74efa 1259 kthread_stop(action->thread);
2d860ad7
LT
1260 put_task_struct(action->thread);
1261 }
1262
b6873807 1263 module_put(desc->owner);
f21cfb25
MD
1264 return action;
1265}
1266
cbf94f06
MD
1267/**
1268 * remove_irq - free an interrupt
1269 * @irq: Interrupt line to free
1270 * @act: irqaction for the interrupt
1271 *
1272 * Used to remove interrupts statically setup by the early boot process.
1273 */
1274void remove_irq(unsigned int irq, struct irqaction *act)
1275{
31d9d9b6
MZ
1276 struct irq_desc *desc = irq_to_desc(irq);
1277
1278 if (desc && !WARN_ON(irq_settings_is_per_cpu_devid(desc)))
1279 __free_irq(irq, act->dev_id);
cbf94f06 1280}
eb53b4e8 1281EXPORT_SYMBOL_GPL(remove_irq);
cbf94f06 1282
f21cfb25
MD
1283/**
1284 * free_irq - free an interrupt allocated with request_irq
1285 * @irq: Interrupt line to free
1286 * @dev_id: Device identity to free
1287 *
1288 * Remove an interrupt handler. The handler is removed and if the
1289 * interrupt line is no longer in use by any driver it is disabled.
1290 * On a shared IRQ the caller must ensure the interrupt is disabled
1291 * on the card it drives before calling this function. The function
1292 * does not return until any executing interrupts for this IRQ
1293 * have completed.
1294 *
1295 * This function must not be called from interrupt context.
1296 */
1297void free_irq(unsigned int irq, void *dev_id)
1298{
70aedd24
TG
1299 struct irq_desc *desc = irq_to_desc(irq);
1300
31d9d9b6 1301 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
70aedd24
TG
1302 return;
1303
cd7eab44
BH
1304#ifdef CONFIG_SMP
1305 if (WARN_ON(desc->affinity_notify))
1306 desc->affinity_notify = NULL;
1307#endif
1308
3876ec9e 1309 chip_bus_lock(desc);
cbf94f06 1310 kfree(__free_irq(irq, dev_id));
3876ec9e 1311 chip_bus_sync_unlock(desc);
1da177e4 1312}
1da177e4
LT
1313EXPORT_SYMBOL(free_irq);
1314
1315/**
3aa551c9 1316 * request_threaded_irq - allocate an interrupt line
1da177e4 1317 * @irq: Interrupt line to allocate
3aa551c9
TG
1318 * @handler: Function to be called when the IRQ occurs.
1319 * Primary handler for threaded interrupts
b25c340c
TG
1320 * If NULL and thread_fn != NULL the default
1321 * primary handler is installed
f48fe81e
TG
1322 * @thread_fn: Function called from the irq handler thread
1323 * If NULL, no irq thread is created
1da177e4
LT
1324 * @irqflags: Interrupt type flags
1325 * @devname: An ascii name for the claiming device
1326 * @dev_id: A cookie passed back to the handler function
1327 *
1328 * This call allocates interrupt resources and enables the
1329 * interrupt line and IRQ handling. From the point this
1330 * call is made your handler function may be invoked. Since
1331 * your handler function must clear any interrupt the board
1332 * raises, you must take care both to initialise your hardware
1333 * and to set up the interrupt handler in the right order.
1334 *
3aa551c9 1335 * If you want to set up a threaded irq handler for your device
6d21af4f 1336 * then you need to supply @handler and @thread_fn. @handler is
3aa551c9
TG
1337 * still called in hard interrupt context and has to check
1338 * whether the interrupt originates from the device. If yes it
1339 * needs to disable the interrupt on the device and return
39a2eddb 1340 * IRQ_WAKE_THREAD which will wake up the handler thread and run
3aa551c9
TG
1341 * @thread_fn. This split handler design is necessary to support
1342 * shared interrupts.
1343 *
1da177e4
LT
1344 * Dev_id must be globally unique. Normally the address of the
1345 * device data structure is used as the cookie. Since the handler
1346 * receives this value it makes sense to use it.
1347 *
1348 * If your interrupt is shared you must pass a non NULL dev_id
1349 * as this is required when freeing the interrupt.
1350 *
1351 * Flags:
1352 *
3cca53b0 1353 * IRQF_SHARED Interrupt is shared
3cca53b0 1354 * IRQF_SAMPLE_RANDOM The interrupt can be used for entropy
0c5d1eb7 1355 * IRQF_TRIGGER_* Specify active edge(s) or level
1da177e4
LT
1356 *
1357 */
3aa551c9
TG
1358int request_threaded_irq(unsigned int irq, irq_handler_t handler,
1359 irq_handler_t thread_fn, unsigned long irqflags,
1360 const char *devname, void *dev_id)
1da177e4 1361{
06fcb0c6 1362 struct irqaction *action;
08678b08 1363 struct irq_desc *desc;
d3c60047 1364 int retval;
1da177e4
LT
1365
1366 /*
1367 * Sanity-check: shared interrupts must pass in a real dev-ID,
1368 * otherwise we'll have trouble later trying to figure out
1369 * which interrupt is which (messes up the interrupt freeing
1370 * logic etc).
1371 */
3cca53b0 1372 if ((irqflags & IRQF_SHARED) && !dev_id)
1da177e4 1373 return -EINVAL;
7d94f7ca 1374
cb5bc832 1375 desc = irq_to_desc(irq);
7d94f7ca 1376 if (!desc)
1da177e4 1377 return -EINVAL;
7d94f7ca 1378
31d9d9b6
MZ
1379 if (!irq_settings_can_request(desc) ||
1380 WARN_ON(irq_settings_is_per_cpu_devid(desc)))
6550c775 1381 return -EINVAL;
b25c340c
TG
1382
1383 if (!handler) {
1384 if (!thread_fn)
1385 return -EINVAL;
1386 handler = irq_default_primary_handler;
1387 }
1da177e4 1388
45535732 1389 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1da177e4
LT
1390 if (!action)
1391 return -ENOMEM;
1392
1393 action->handler = handler;
3aa551c9 1394 action->thread_fn = thread_fn;
1da177e4 1395 action->flags = irqflags;
1da177e4 1396 action->name = devname;
1da177e4
LT
1397 action->dev_id = dev_id;
1398
3876ec9e 1399 chip_bus_lock(desc);
d3c60047 1400 retval = __setup_irq(irq, desc, action);
3876ec9e 1401 chip_bus_sync_unlock(desc);
70aedd24 1402
377bf1e4
AV
1403 if (retval)
1404 kfree(action);
1405
6d83f94d 1406#ifdef CONFIG_DEBUG_SHIRQ_FIXME
6ce51c43 1407 if (!retval && (irqflags & IRQF_SHARED)) {
a304e1b8
DW
1408 /*
1409 * It's a shared IRQ -- the driver ought to be prepared for it
1410 * to happen immediately, so let's make sure....
377bf1e4
AV
1411 * We disable the irq to make sure that a 'real' IRQ doesn't
1412 * run in parallel with our fake.
a304e1b8 1413 */
59845b1f 1414 unsigned long flags;
a304e1b8 1415
377bf1e4 1416 disable_irq(irq);
59845b1f 1417 local_irq_save(flags);
377bf1e4 1418
59845b1f 1419 handler(irq, dev_id);
377bf1e4 1420
59845b1f 1421 local_irq_restore(flags);
377bf1e4 1422 enable_irq(irq);
a304e1b8
DW
1423 }
1424#endif
1da177e4
LT
1425 return retval;
1426}
3aa551c9 1427EXPORT_SYMBOL(request_threaded_irq);
ae731f8d
MZ
1428
1429/**
1430 * request_any_context_irq - allocate an interrupt line
1431 * @irq: Interrupt line to allocate
1432 * @handler: Function to be called when the IRQ occurs.
1433 * Threaded handler for threaded interrupts.
1434 * @flags: Interrupt type flags
1435 * @name: An ascii name for the claiming device
1436 * @dev_id: A cookie passed back to the handler function
1437 *
1438 * This call allocates interrupt resources and enables the
1439 * interrupt line and IRQ handling. It selects either a
1440 * hardirq or threaded handling method depending on the
1441 * context.
1442 *
1443 * On failure, it returns a negative value. On success,
1444 * it returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED.
1445 */
1446int request_any_context_irq(unsigned int irq, irq_handler_t handler,
1447 unsigned long flags, const char *name, void *dev_id)
1448{
1449 struct irq_desc *desc = irq_to_desc(irq);
1450 int ret;
1451
1452 if (!desc)
1453 return -EINVAL;
1454
1ccb4e61 1455 if (irq_settings_is_nested_thread(desc)) {
ae731f8d
MZ
1456 ret = request_threaded_irq(irq, NULL, handler,
1457 flags, name, dev_id);
1458 return !ret ? IRQC_IS_NESTED : ret;
1459 }
1460
1461 ret = request_irq(irq, handler, flags, name, dev_id);
1462 return !ret ? IRQC_IS_HARDIRQ : ret;
1463}
1464EXPORT_SYMBOL_GPL(request_any_context_irq);
31d9d9b6 1465
1e7c5fd2 1466void enable_percpu_irq(unsigned int irq, unsigned int type)
31d9d9b6
MZ
1467{
1468 unsigned int cpu = smp_processor_id();
1469 unsigned long flags;
1470 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1471
1472 if (!desc)
1473 return;
1474
1e7c5fd2
MZ
1475 type &= IRQ_TYPE_SENSE_MASK;
1476 if (type != IRQ_TYPE_NONE) {
1477 int ret;
1478
1479 ret = __irq_set_trigger(desc, irq, type);
1480
1481 if (ret) {
32cffdde 1482 WARN(1, "failed to set type for IRQ%d\n", irq);
1e7c5fd2
MZ
1483 goto out;
1484 }
1485 }
1486
31d9d9b6 1487 irq_percpu_enable(desc, cpu);
1e7c5fd2 1488out:
31d9d9b6
MZ
1489 irq_put_desc_unlock(desc, flags);
1490}
1491
1492void disable_percpu_irq(unsigned int irq)
1493{
1494 unsigned int cpu = smp_processor_id();
1495 unsigned long flags;
1496 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1497
1498 if (!desc)
1499 return;
1500
1501 irq_percpu_disable(desc, cpu);
1502 irq_put_desc_unlock(desc, flags);
1503}
1504
1505/*
1506 * Internal function to unregister a percpu irqaction.
1507 */
1508static struct irqaction *__free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1509{
1510 struct irq_desc *desc = irq_to_desc(irq);
1511 struct irqaction *action;
1512 unsigned long flags;
1513
1514 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
1515
1516 if (!desc)
1517 return NULL;
1518
1519 raw_spin_lock_irqsave(&desc->lock, flags);
1520
1521 action = desc->action;
1522 if (!action || action->percpu_dev_id != dev_id) {
1523 WARN(1, "Trying to free already-free IRQ %d\n", irq);
1524 goto bad;
1525 }
1526
1527 if (!cpumask_empty(desc->percpu_enabled)) {
1528 WARN(1, "percpu IRQ %d still enabled on CPU%d!\n",
1529 irq, cpumask_first(desc->percpu_enabled));
1530 goto bad;
1531 }
1532
1533 /* Found it - now remove it from the list of entries: */
1534 desc->action = NULL;
1535
1536 raw_spin_unlock_irqrestore(&desc->lock, flags);
1537
1538 unregister_handler_proc(irq, action);
1539
1540 module_put(desc->owner);
1541 return action;
1542
1543bad:
1544 raw_spin_unlock_irqrestore(&desc->lock, flags);
1545 return NULL;
1546}
1547
1548/**
1549 * remove_percpu_irq - free a per-cpu interrupt
1550 * @irq: Interrupt line to free
1551 * @act: irqaction for the interrupt
1552 *
1553 * Used to remove interrupts statically setup by the early boot process.
1554 */
1555void remove_percpu_irq(unsigned int irq, struct irqaction *act)
1556{
1557 struct irq_desc *desc = irq_to_desc(irq);
1558
1559 if (desc && irq_settings_is_per_cpu_devid(desc))
1560 __free_percpu_irq(irq, act->percpu_dev_id);
1561}
1562
1563/**
1564 * free_percpu_irq - free an interrupt allocated with request_percpu_irq
1565 * @irq: Interrupt line to free
1566 * @dev_id: Device identity to free
1567 *
1568 * Remove a percpu interrupt handler. The handler is removed, but
1569 * the interrupt line is not disabled. This must be done on each
1570 * CPU before calling this function. The function does not return
1571 * until any executing interrupts for this IRQ have completed.
1572 *
1573 * This function must not be called from interrupt context.
1574 */
1575void free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1576{
1577 struct irq_desc *desc = irq_to_desc(irq);
1578
1579 if (!desc || !irq_settings_is_per_cpu_devid(desc))
1580 return;
1581
1582 chip_bus_lock(desc);
1583 kfree(__free_percpu_irq(irq, dev_id));
1584 chip_bus_sync_unlock(desc);
1585}
1586
1587/**
1588 * setup_percpu_irq - setup a per-cpu interrupt
1589 * @irq: Interrupt line to setup
1590 * @act: irqaction for the interrupt
1591 *
1592 * Used to statically setup per-cpu interrupts in the early boot process.
1593 */
1594int setup_percpu_irq(unsigned int irq, struct irqaction *act)
1595{
1596 struct irq_desc *desc = irq_to_desc(irq);
1597 int retval;
1598
1599 if (!desc || !irq_settings_is_per_cpu_devid(desc))
1600 return -EINVAL;
1601 chip_bus_lock(desc);
1602 retval = __setup_irq(irq, desc, act);
1603 chip_bus_sync_unlock(desc);
1604
1605 return retval;
1606}
1607
1608/**
1609 * request_percpu_irq - allocate a percpu interrupt line
1610 * @irq: Interrupt line to allocate
1611 * @handler: Function to be called when the IRQ occurs.
1612 * @devname: An ascii name for the claiming device
1613 * @dev_id: A percpu cookie passed back to the handler function
1614 *
1615 * This call allocates interrupt resources, but doesn't
1616 * automatically enable the interrupt. It has to be done on each
1617 * CPU using enable_percpu_irq().
1618 *
1619 * Dev_id must be globally unique. It is a per-cpu variable, and
1620 * the handler gets called with the interrupted CPU's instance of
1621 * that variable.
1622 */
1623int request_percpu_irq(unsigned int irq, irq_handler_t handler,
1624 const char *devname, void __percpu *dev_id)
1625{
1626 struct irqaction *action;
1627 struct irq_desc *desc;
1628 int retval;
1629
1630 if (!dev_id)
1631 return -EINVAL;
1632
1633 desc = irq_to_desc(irq);
1634 if (!desc || !irq_settings_can_request(desc) ||
1635 !irq_settings_is_per_cpu_devid(desc))
1636 return -EINVAL;
1637
1638 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1639 if (!action)
1640 return -ENOMEM;
1641
1642 action->handler = handler;
2ed0e645 1643 action->flags = IRQF_PERCPU | IRQF_NO_SUSPEND;
31d9d9b6
MZ
1644 action->name = devname;
1645 action->percpu_dev_id = dev_id;
1646
1647 chip_bus_lock(desc);
1648 retval = __setup_irq(irq, desc, action);
1649 chip_bus_sync_unlock(desc);
1650
1651 if (retval)
1652 kfree(action);
1653
1654 return retval;
1655}
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