Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/kernel/irq/manage.c | |
3 | * | |
a34db9b2 IM |
4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar |
5 | * Copyright (C) 2005-2006 Thomas Gleixner | |
1da177e4 LT |
6 | * |
7 | * This file contains driver APIs to the irq subsystem. | |
8 | */ | |
9 | ||
10 | #include <linux/irq.h> | |
11 | #include <linux/module.h> | |
12 | #include <linux/random.h> | |
13 | #include <linux/interrupt.h> | |
1aeb272c | 14 | #include <linux/slab.h> |
1da177e4 LT |
15 | |
16 | #include "internals.h" | |
17 | ||
18 | #ifdef CONFIG_SMP | |
19 | ||
18404756 MK |
20 | cpumask_t irq_default_affinity = CPU_MASK_ALL; |
21 | ||
1da177e4 LT |
22 | /** |
23 | * synchronize_irq - wait for pending IRQ handlers (on other CPUs) | |
1e5d5331 | 24 | * @irq: interrupt number to wait for |
1da177e4 LT |
25 | * |
26 | * This function waits for any pending IRQ handlers for this interrupt | |
27 | * to complete before returning. If you use this function while | |
28 | * holding a resource the IRQ handler may need you will deadlock. | |
29 | * | |
30 | * This function may be called - with care - from IRQ context. | |
31 | */ | |
32 | void synchronize_irq(unsigned int irq) | |
33 | { | |
cb5bc832 | 34 | struct irq_desc *desc = irq_to_desc(irq); |
a98ce5c6 | 35 | unsigned int status; |
1da177e4 | 36 | |
7d94f7ca | 37 | if (!desc) |
c2b5a251 MW |
38 | return; |
39 | ||
a98ce5c6 HX |
40 | do { |
41 | unsigned long flags; | |
42 | ||
43 | /* | |
44 | * Wait until we're out of the critical section. This might | |
45 | * give the wrong answer due to the lack of memory barriers. | |
46 | */ | |
47 | while (desc->status & IRQ_INPROGRESS) | |
48 | cpu_relax(); | |
49 | ||
50 | /* Ok, that indicated we're done: double-check carefully. */ | |
51 | spin_lock_irqsave(&desc->lock, flags); | |
52 | status = desc->status; | |
53 | spin_unlock_irqrestore(&desc->lock, flags); | |
54 | ||
55 | /* Oops, that failed? */ | |
56 | } while (status & IRQ_INPROGRESS); | |
1da177e4 | 57 | } |
1da177e4 LT |
58 | EXPORT_SYMBOL(synchronize_irq); |
59 | ||
771ee3b0 TG |
60 | /** |
61 | * irq_can_set_affinity - Check if the affinity of a given irq can be set | |
62 | * @irq: Interrupt to check | |
63 | * | |
64 | */ | |
65 | int irq_can_set_affinity(unsigned int irq) | |
66 | { | |
08678b08 | 67 | struct irq_desc *desc = irq_to_desc(irq); |
771ee3b0 TG |
68 | |
69 | if (CHECK_IRQ_PER_CPU(desc->status) || !desc->chip || | |
70 | !desc->chip->set_affinity) | |
71 | return 0; | |
72 | ||
73 | return 1; | |
74 | } | |
75 | ||
76 | /** | |
77 | * irq_set_affinity - Set the irq affinity of a given irq | |
78 | * @irq: Interrupt to set affinity | |
79 | * @cpumask: cpumask | |
80 | * | |
81 | */ | |
82 | int irq_set_affinity(unsigned int irq, cpumask_t cpumask) | |
83 | { | |
08678b08 | 84 | struct irq_desc *desc = irq_to_desc(irq); |
771ee3b0 TG |
85 | |
86 | if (!desc->chip->set_affinity) | |
87 | return -EINVAL; | |
88 | ||
771ee3b0 | 89 | #ifdef CONFIG_GENERIC_PENDING_IRQ |
932775a4 | 90 | if (desc->status & IRQ_MOVE_PCNTXT || desc->status & IRQ_DISABLED) { |
72b1e22d SS |
91 | unsigned long flags; |
92 | ||
93 | spin_lock_irqsave(&desc->lock, flags); | |
932775a4 | 94 | desc->affinity = cpumask; |
72b1e22d SS |
95 | desc->chip->set_affinity(irq, cpumask); |
96 | spin_unlock_irqrestore(&desc->lock, flags); | |
97 | } else | |
98 | set_pending_irq(irq, cpumask); | |
771ee3b0 TG |
99 | #else |
100 | desc->affinity = cpumask; | |
101 | desc->chip->set_affinity(irq, cpumask); | |
102 | #endif | |
103 | return 0; | |
104 | } | |
105 | ||
18404756 MK |
106 | #ifndef CONFIG_AUTO_IRQ_AFFINITY |
107 | /* | |
108 | * Generic version of the affinity autoselector. | |
109 | */ | |
110 | int irq_select_affinity(unsigned int irq) | |
111 | { | |
112 | cpumask_t mask; | |
08678b08 | 113 | struct irq_desc *desc; |
18404756 MK |
114 | |
115 | if (!irq_can_set_affinity(irq)) | |
116 | return 0; | |
117 | ||
118 | cpus_and(mask, cpu_online_map, irq_default_affinity); | |
119 | ||
08678b08 YL |
120 | desc = irq_to_desc(irq); |
121 | desc->affinity = mask; | |
122 | desc->chip->set_affinity(irq, mask); | |
18404756 | 123 | |
18404756 MK |
124 | return 0; |
125 | } | |
126 | #endif | |
127 | ||
1da177e4 LT |
128 | #endif |
129 | ||
130 | /** | |
131 | * disable_irq_nosync - disable an irq without waiting | |
132 | * @irq: Interrupt to disable | |
133 | * | |
134 | * Disable the selected interrupt line. Disables and Enables are | |
135 | * nested. | |
136 | * Unlike disable_irq(), this function does not ensure existing | |
137 | * instances of the IRQ handler have completed before returning. | |
138 | * | |
139 | * This function may be called from IRQ context. | |
140 | */ | |
141 | void disable_irq_nosync(unsigned int irq) | |
142 | { | |
7d94f7ca | 143 | struct irq_desc *desc; |
1da177e4 LT |
144 | unsigned long flags; |
145 | ||
cb5bc832 | 146 | desc = irq_to_desc(irq); |
7d94f7ca | 147 | if (!desc) |
c2b5a251 MW |
148 | return; |
149 | ||
1da177e4 LT |
150 | spin_lock_irqsave(&desc->lock, flags); |
151 | if (!desc->depth++) { | |
152 | desc->status |= IRQ_DISABLED; | |
d1bef4ed | 153 | desc->chip->disable(irq); |
1da177e4 LT |
154 | } |
155 | spin_unlock_irqrestore(&desc->lock, flags); | |
156 | } | |
1da177e4 LT |
157 | EXPORT_SYMBOL(disable_irq_nosync); |
158 | ||
159 | /** | |
160 | * disable_irq - disable an irq and wait for completion | |
161 | * @irq: Interrupt to disable | |
162 | * | |
163 | * Disable the selected interrupt line. Enables and Disables are | |
164 | * nested. | |
165 | * This function waits for any pending IRQ handlers for this interrupt | |
166 | * to complete before returning. If you use this function while | |
167 | * holding a resource the IRQ handler may need you will deadlock. | |
168 | * | |
169 | * This function may be called - with care - from IRQ context. | |
170 | */ | |
171 | void disable_irq(unsigned int irq) | |
172 | { | |
7d94f7ca | 173 | struct irq_desc *desc; |
1da177e4 | 174 | |
cb5bc832 | 175 | desc = irq_to_desc(irq); |
7d94f7ca | 176 | if (!desc) |
c2b5a251 MW |
177 | return; |
178 | ||
1da177e4 LT |
179 | disable_irq_nosync(irq); |
180 | if (desc->action) | |
181 | synchronize_irq(irq); | |
182 | } | |
1da177e4 LT |
183 | EXPORT_SYMBOL(disable_irq); |
184 | ||
1adb0850 TG |
185 | static void __enable_irq(struct irq_desc *desc, unsigned int irq) |
186 | { | |
187 | switch (desc->depth) { | |
188 | case 0: | |
b8c512f6 | 189 | WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n", irq); |
1adb0850 TG |
190 | break; |
191 | case 1: { | |
192 | unsigned int status = desc->status & ~IRQ_DISABLED; | |
193 | ||
194 | /* Prevent probing on this irq: */ | |
195 | desc->status = status | IRQ_NOPROBE; | |
196 | check_irq_resend(desc, irq); | |
197 | /* fall-through */ | |
198 | } | |
199 | default: | |
200 | desc->depth--; | |
201 | } | |
202 | } | |
203 | ||
1da177e4 LT |
204 | /** |
205 | * enable_irq - enable handling of an irq | |
206 | * @irq: Interrupt to enable | |
207 | * | |
208 | * Undoes the effect of one call to disable_irq(). If this | |
209 | * matches the last disable, processing of interrupts on this | |
210 | * IRQ line is re-enabled. | |
211 | * | |
212 | * This function may be called from IRQ context. | |
213 | */ | |
214 | void enable_irq(unsigned int irq) | |
215 | { | |
7d94f7ca | 216 | struct irq_desc *desc; |
1da177e4 LT |
217 | unsigned long flags; |
218 | ||
cb5bc832 | 219 | desc = irq_to_desc(irq); |
7d94f7ca | 220 | if (!desc) |
c2b5a251 MW |
221 | return; |
222 | ||
1da177e4 | 223 | spin_lock_irqsave(&desc->lock, flags); |
1adb0850 | 224 | __enable_irq(desc, irq); |
1da177e4 LT |
225 | spin_unlock_irqrestore(&desc->lock, flags); |
226 | } | |
1da177e4 LT |
227 | EXPORT_SYMBOL(enable_irq); |
228 | ||
0c5d1eb7 | 229 | static int set_irq_wake_real(unsigned int irq, unsigned int on) |
2db87321 | 230 | { |
08678b08 | 231 | struct irq_desc *desc = irq_to_desc(irq); |
2db87321 UKK |
232 | int ret = -ENXIO; |
233 | ||
234 | if (desc->chip->set_wake) | |
235 | ret = desc->chip->set_wake(irq, on); | |
236 | ||
237 | return ret; | |
238 | } | |
239 | ||
ba9a2331 TG |
240 | /** |
241 | * set_irq_wake - control irq power management wakeup | |
242 | * @irq: interrupt to control | |
243 | * @on: enable/disable power management wakeup | |
244 | * | |
15a647eb DB |
245 | * Enable/disable power management wakeup mode, which is |
246 | * disabled by default. Enables and disables must match, | |
247 | * just as they match for non-wakeup mode support. | |
248 | * | |
249 | * Wakeup mode lets this IRQ wake the system from sleep | |
250 | * states like "suspend to RAM". | |
ba9a2331 TG |
251 | */ |
252 | int set_irq_wake(unsigned int irq, unsigned int on) | |
253 | { | |
08678b08 | 254 | struct irq_desc *desc = irq_to_desc(irq); |
ba9a2331 | 255 | unsigned long flags; |
2db87321 | 256 | int ret = 0; |
ba9a2331 | 257 | |
15a647eb DB |
258 | /* wakeup-capable irqs can be shared between drivers that |
259 | * don't need to have the same sleep mode behaviors. | |
260 | */ | |
ba9a2331 | 261 | spin_lock_irqsave(&desc->lock, flags); |
15a647eb | 262 | if (on) { |
2db87321 UKK |
263 | if (desc->wake_depth++ == 0) { |
264 | ret = set_irq_wake_real(irq, on); | |
265 | if (ret) | |
266 | desc->wake_depth = 0; | |
267 | else | |
268 | desc->status |= IRQ_WAKEUP; | |
269 | } | |
15a647eb DB |
270 | } else { |
271 | if (desc->wake_depth == 0) { | |
7a2c4770 | 272 | WARN(1, "Unbalanced IRQ %d wake disable\n", irq); |
2db87321 UKK |
273 | } else if (--desc->wake_depth == 0) { |
274 | ret = set_irq_wake_real(irq, on); | |
275 | if (ret) | |
276 | desc->wake_depth = 1; | |
277 | else | |
278 | desc->status &= ~IRQ_WAKEUP; | |
279 | } | |
15a647eb | 280 | } |
2db87321 | 281 | |
ba9a2331 TG |
282 | spin_unlock_irqrestore(&desc->lock, flags); |
283 | return ret; | |
284 | } | |
285 | EXPORT_SYMBOL(set_irq_wake); | |
286 | ||
1da177e4 LT |
287 | /* |
288 | * Internal function that tells the architecture code whether a | |
289 | * particular irq has been exclusively allocated or is available | |
290 | * for driver use. | |
291 | */ | |
292 | int can_request_irq(unsigned int irq, unsigned long irqflags) | |
293 | { | |
7d94f7ca | 294 | struct irq_desc *desc; |
1da177e4 LT |
295 | struct irqaction *action; |
296 | ||
cb5bc832 | 297 | desc = irq_to_desc(irq); |
7d94f7ca YL |
298 | if (!desc) |
299 | return 0; | |
300 | ||
301 | if (desc->status & IRQ_NOREQUEST) | |
1da177e4 LT |
302 | return 0; |
303 | ||
08678b08 | 304 | action = desc->action; |
1da177e4 | 305 | if (action) |
3cca53b0 | 306 | if (irqflags & action->flags & IRQF_SHARED) |
1da177e4 LT |
307 | action = NULL; |
308 | ||
309 | return !action; | |
310 | } | |
311 | ||
6a6de9ef TG |
312 | void compat_irq_chip_set_default_handler(struct irq_desc *desc) |
313 | { | |
314 | /* | |
315 | * If the architecture still has not overriden | |
316 | * the flow handler then zap the default. This | |
317 | * should catch incorrect flow-type setting. | |
318 | */ | |
319 | if (desc->handle_irq == &handle_bad_irq) | |
320 | desc->handle_irq = NULL; | |
321 | } | |
322 | ||
0c5d1eb7 | 323 | int __irq_set_trigger(struct irq_desc *desc, unsigned int irq, |
82736f4d UKK |
324 | unsigned long flags) |
325 | { | |
326 | int ret; | |
0c5d1eb7 | 327 | struct irq_chip *chip = desc->chip; |
82736f4d UKK |
328 | |
329 | if (!chip || !chip->set_type) { | |
330 | /* | |
331 | * IRQF_TRIGGER_* but the PIC does not support multiple | |
332 | * flow-types? | |
333 | */ | |
334 | pr_warning("No set_type function for IRQ %d (%s)\n", irq, | |
335 | chip ? (chip->name ? : "unknown") : "unknown"); | |
336 | return 0; | |
337 | } | |
338 | ||
339 | ret = chip->set_type(irq, flags & IRQF_TRIGGER_MASK); | |
340 | ||
341 | if (ret) | |
c69ad71b DB |
342 | pr_err("setting trigger mode %d for irq %u failed (%pF)\n", |
343 | (int)(flags & IRQF_TRIGGER_MASK), | |
82736f4d | 344 | irq, chip->set_type); |
0c5d1eb7 DB |
345 | else { |
346 | /* note that IRQF_TRIGGER_MASK == IRQ_TYPE_SENSE_MASK */ | |
347 | desc->status &= ~IRQ_TYPE_SENSE_MASK; | |
348 | desc->status |= flags & IRQ_TYPE_SENSE_MASK; | |
349 | } | |
82736f4d UKK |
350 | |
351 | return ret; | |
352 | } | |
353 | ||
1da177e4 LT |
354 | /* |
355 | * Internal function to register an irqaction - typically used to | |
356 | * allocate special interrupts that are part of the architecture. | |
357 | */ | |
06fcb0c6 | 358 | int setup_irq(unsigned int irq, struct irqaction *new) |
1da177e4 | 359 | { |
7d94f7ca | 360 | struct irq_desc *desc; |
1da177e4 | 361 | struct irqaction *old, **p; |
8b126b77 | 362 | const char *old_name = NULL; |
1da177e4 LT |
363 | unsigned long flags; |
364 | int shared = 0; | |
82736f4d | 365 | int ret; |
1da177e4 | 366 | |
cb5bc832 | 367 | desc = irq_to_desc(irq); |
7d94f7ca | 368 | if (!desc) |
c2b5a251 MW |
369 | return -EINVAL; |
370 | ||
f1c2662c | 371 | if (desc->chip == &no_irq_chip) |
1da177e4 LT |
372 | return -ENOSYS; |
373 | /* | |
374 | * Some drivers like serial.c use request_irq() heavily, | |
375 | * so we have to be careful not to interfere with a | |
376 | * running system. | |
377 | */ | |
3cca53b0 | 378 | if (new->flags & IRQF_SAMPLE_RANDOM) { |
1da177e4 LT |
379 | /* |
380 | * This function might sleep, we want to call it first, | |
381 | * outside of the atomic block. | |
382 | * Yes, this might clear the entropy pool if the wrong | |
383 | * driver is attempted to be loaded, without actually | |
384 | * installing a new handler, but is this really a problem, | |
385 | * only the sysadmin is able to do this. | |
386 | */ | |
387 | rand_initialize_irq(irq); | |
388 | } | |
389 | ||
390 | /* | |
391 | * The following block of code has to be executed atomically | |
392 | */ | |
06fcb0c6 | 393 | spin_lock_irqsave(&desc->lock, flags); |
1da177e4 | 394 | p = &desc->action; |
06fcb0c6 IM |
395 | old = *p; |
396 | if (old) { | |
e76de9f8 TG |
397 | /* |
398 | * Can't share interrupts unless both agree to and are | |
399 | * the same type (level, edge, polarity). So both flag | |
3cca53b0 | 400 | * fields must have IRQF_SHARED set and the bits which |
e76de9f8 TG |
401 | * set the trigger type must match. |
402 | */ | |
3cca53b0 | 403 | if (!((old->flags & new->flags) & IRQF_SHARED) || |
8b126b77 AM |
404 | ((old->flags ^ new->flags) & IRQF_TRIGGER_MASK)) { |
405 | old_name = old->name; | |
f5163427 | 406 | goto mismatch; |
8b126b77 | 407 | } |
f5163427 | 408 | |
284c6680 | 409 | #if defined(CONFIG_IRQ_PER_CPU) |
f5163427 | 410 | /* All handlers must agree on per-cpuness */ |
3cca53b0 TG |
411 | if ((old->flags & IRQF_PERCPU) != |
412 | (new->flags & IRQF_PERCPU)) | |
f5163427 DS |
413 | goto mismatch; |
414 | #endif | |
1da177e4 LT |
415 | |
416 | /* add new interrupt at end of irq queue */ | |
417 | do { | |
418 | p = &old->next; | |
419 | old = *p; | |
420 | } while (old); | |
421 | shared = 1; | |
422 | } | |
423 | ||
1da177e4 | 424 | if (!shared) { |
6a6de9ef | 425 | irq_chip_set_defaults(desc->chip); |
e76de9f8 TG |
426 | |
427 | /* Setup the type (level, edge polarity) if configured: */ | |
3cca53b0 | 428 | if (new->flags & IRQF_TRIGGER_MASK) { |
0c5d1eb7 | 429 | ret = __irq_set_trigger(desc, irq, new->flags); |
82736f4d UKK |
430 | |
431 | if (ret) { | |
432 | spin_unlock_irqrestore(&desc->lock, flags); | |
433 | return ret; | |
434 | } | |
e76de9f8 TG |
435 | } else |
436 | compat_irq_chip_set_default_handler(desc); | |
82736f4d UKK |
437 | #if defined(CONFIG_IRQ_PER_CPU) |
438 | if (new->flags & IRQF_PERCPU) | |
439 | desc->status |= IRQ_PER_CPU; | |
440 | #endif | |
6a6de9ef | 441 | |
94d39e1f | 442 | desc->status &= ~(IRQ_AUTODETECT | IRQ_WAITING | |
1adb0850 | 443 | IRQ_INPROGRESS | IRQ_SPURIOUS_DISABLED); |
94d39e1f TG |
444 | |
445 | if (!(desc->status & IRQ_NOAUTOEN)) { | |
446 | desc->depth = 0; | |
447 | desc->status &= ~IRQ_DISABLED; | |
7e6e178a | 448 | desc->chip->startup(irq); |
e76de9f8 TG |
449 | } else |
450 | /* Undo nested disables: */ | |
451 | desc->depth = 1; | |
18404756 MK |
452 | |
453 | /* Set default affinity mask once everything is setup */ | |
454 | irq_select_affinity(irq); | |
0c5d1eb7 DB |
455 | |
456 | } else if ((new->flags & IRQF_TRIGGER_MASK) | |
457 | && (new->flags & IRQF_TRIGGER_MASK) | |
458 | != (desc->status & IRQ_TYPE_SENSE_MASK)) { | |
459 | /* hope the handler works with the actual trigger mode... */ | |
460 | pr_warning("IRQ %d uses trigger mode %d; requested %d\n", | |
461 | irq, (int)(desc->status & IRQ_TYPE_SENSE_MASK), | |
462 | (int)(new->flags & IRQF_TRIGGER_MASK)); | |
1da177e4 | 463 | } |
82736f4d UKK |
464 | |
465 | *p = new; | |
466 | ||
467 | /* Exclude IRQ from balancing */ | |
468 | if (new->flags & IRQF_NOBALANCING) | |
469 | desc->status |= IRQ_NO_BALANCING; | |
470 | ||
8528b0f1 LT |
471 | /* Reset broken irq detection when installing new handler */ |
472 | desc->irq_count = 0; | |
473 | desc->irqs_unhandled = 0; | |
1adb0850 TG |
474 | |
475 | /* | |
476 | * Check whether we disabled the irq via the spurious handler | |
477 | * before. Reenable it and give it another chance. | |
478 | */ | |
479 | if (shared && (desc->status & IRQ_SPURIOUS_DISABLED)) { | |
480 | desc->status &= ~IRQ_SPURIOUS_DISABLED; | |
481 | __enable_irq(desc, irq); | |
482 | } | |
483 | ||
06fcb0c6 | 484 | spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 LT |
485 | |
486 | new->irq = irq; | |
2c6927a3 | 487 | register_irq_proc(irq, desc); |
1da177e4 LT |
488 | new->dir = NULL; |
489 | register_handler_proc(irq, new); | |
490 | ||
491 | return 0; | |
f5163427 DS |
492 | |
493 | mismatch: | |
3f050447 | 494 | #ifdef CONFIG_DEBUG_SHIRQ |
3cca53b0 | 495 | if (!(new->flags & IRQF_PROBE_SHARED)) { |
e8c4b9d0 | 496 | printk(KERN_ERR "IRQ handler type mismatch for IRQ %d\n", irq); |
8b126b77 AM |
497 | if (old_name) |
498 | printk(KERN_ERR "current handler: %s\n", old_name); | |
13e87ec6 AM |
499 | dump_stack(); |
500 | } | |
3f050447 | 501 | #endif |
8b126b77 | 502 | spin_unlock_irqrestore(&desc->lock, flags); |
f5163427 | 503 | return -EBUSY; |
1da177e4 LT |
504 | } |
505 | ||
506 | /** | |
507 | * free_irq - free an interrupt | |
508 | * @irq: Interrupt line to free | |
509 | * @dev_id: Device identity to free | |
510 | * | |
511 | * Remove an interrupt handler. The handler is removed and if the | |
512 | * interrupt line is no longer in use by any driver it is disabled. | |
513 | * On a shared IRQ the caller must ensure the interrupt is disabled | |
514 | * on the card it drives before calling this function. The function | |
515 | * does not return until any executing interrupts for this IRQ | |
516 | * have completed. | |
517 | * | |
518 | * This function must not be called from interrupt context. | |
519 | */ | |
520 | void free_irq(unsigned int irq, void *dev_id) | |
521 | { | |
522 | struct irq_desc *desc; | |
523 | struct irqaction **p; | |
524 | unsigned long flags; | |
525 | ||
cd7b24bb | 526 | WARN_ON(in_interrupt()); |
7d94f7ca | 527 | |
cb5bc832 | 528 | desc = irq_to_desc(irq); |
7d94f7ca | 529 | if (!desc) |
1da177e4 LT |
530 | return; |
531 | ||
06fcb0c6 | 532 | spin_lock_irqsave(&desc->lock, flags); |
1da177e4 LT |
533 | p = &desc->action; |
534 | for (;;) { | |
06fcb0c6 | 535 | struct irqaction *action = *p; |
1da177e4 LT |
536 | |
537 | if (action) { | |
538 | struct irqaction **pp = p; | |
539 | ||
540 | p = &action->next; | |
541 | if (action->dev_id != dev_id) | |
542 | continue; | |
543 | ||
544 | /* Found it - now remove it from the list of entries */ | |
545 | *pp = action->next; | |
dbce706e | 546 | |
b77d6adc PBG |
547 | /* Currently used only by UML, might disappear one day.*/ |
548 | #ifdef CONFIG_IRQ_RELEASE_METHOD | |
d1bef4ed IM |
549 | if (desc->chip->release) |
550 | desc->chip->release(irq, dev_id); | |
b77d6adc | 551 | #endif |
dbce706e | 552 | |
1da177e4 LT |
553 | if (!desc->action) { |
554 | desc->status |= IRQ_DISABLED; | |
d1bef4ed IM |
555 | if (desc->chip->shutdown) |
556 | desc->chip->shutdown(irq); | |
1da177e4 | 557 | else |
d1bef4ed | 558 | desc->chip->disable(irq); |
1da177e4 | 559 | } |
06fcb0c6 | 560 | spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 LT |
561 | unregister_handler_proc(irq, action); |
562 | ||
563 | /* Make sure it's not being used on another CPU */ | |
564 | synchronize_irq(irq); | |
1d99493b DW |
565 | #ifdef CONFIG_DEBUG_SHIRQ |
566 | /* | |
567 | * It's a shared IRQ -- the driver ought to be | |
568 | * prepared for it to happen even now it's | |
569 | * being freed, so let's make sure.... We do | |
570 | * this after actually deregistering it, to | |
571 | * make sure that a 'real' IRQ doesn't run in | |
572 | * parallel with our fake | |
573 | */ | |
574 | if (action->flags & IRQF_SHARED) { | |
575 | local_irq_save(flags); | |
576 | action->handler(irq, dev_id); | |
577 | local_irq_restore(flags); | |
578 | } | |
579 | #endif | |
1da177e4 LT |
580 | kfree(action); |
581 | return; | |
582 | } | |
e8c4b9d0 | 583 | printk(KERN_ERR "Trying to free already-free IRQ %d\n", irq); |
70edcd77 IM |
584 | #ifdef CONFIG_DEBUG_SHIRQ |
585 | dump_stack(); | |
586 | #endif | |
06fcb0c6 | 587 | spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 LT |
588 | return; |
589 | } | |
590 | } | |
1da177e4 LT |
591 | EXPORT_SYMBOL(free_irq); |
592 | ||
593 | /** | |
594 | * request_irq - allocate an interrupt line | |
595 | * @irq: Interrupt line to allocate | |
596 | * @handler: Function to be called when the IRQ occurs | |
597 | * @irqflags: Interrupt type flags | |
598 | * @devname: An ascii name for the claiming device | |
599 | * @dev_id: A cookie passed back to the handler function | |
600 | * | |
601 | * This call allocates interrupt resources and enables the | |
602 | * interrupt line and IRQ handling. From the point this | |
603 | * call is made your handler function may be invoked. Since | |
604 | * your handler function must clear any interrupt the board | |
605 | * raises, you must take care both to initialise your hardware | |
606 | * and to set up the interrupt handler in the right order. | |
607 | * | |
608 | * Dev_id must be globally unique. Normally the address of the | |
609 | * device data structure is used as the cookie. Since the handler | |
610 | * receives this value it makes sense to use it. | |
611 | * | |
612 | * If your interrupt is shared you must pass a non NULL dev_id | |
613 | * as this is required when freeing the interrupt. | |
614 | * | |
615 | * Flags: | |
616 | * | |
3cca53b0 TG |
617 | * IRQF_SHARED Interrupt is shared |
618 | * IRQF_DISABLED Disable local interrupts while processing | |
619 | * IRQF_SAMPLE_RANDOM The interrupt can be used for entropy | |
0c5d1eb7 | 620 | * IRQF_TRIGGER_* Specify active edge(s) or level |
1da177e4 LT |
621 | * |
622 | */ | |
da482792 | 623 | int request_irq(unsigned int irq, irq_handler_t handler, |
06fcb0c6 | 624 | unsigned long irqflags, const char *devname, void *dev_id) |
1da177e4 | 625 | { |
06fcb0c6 | 626 | struct irqaction *action; |
1da177e4 | 627 | int retval; |
08678b08 | 628 | struct irq_desc *desc; |
1da177e4 | 629 | |
fbb9ce95 IM |
630 | #ifdef CONFIG_LOCKDEP |
631 | /* | |
632 | * Lockdep wants atomic interrupt handlers: | |
633 | */ | |
38515e90 | 634 | irqflags |= IRQF_DISABLED; |
fbb9ce95 | 635 | #endif |
1da177e4 LT |
636 | /* |
637 | * Sanity-check: shared interrupts must pass in a real dev-ID, | |
638 | * otherwise we'll have trouble later trying to figure out | |
639 | * which interrupt is which (messes up the interrupt freeing | |
640 | * logic etc). | |
641 | */ | |
3cca53b0 | 642 | if ((irqflags & IRQF_SHARED) && !dev_id) |
1da177e4 | 643 | return -EINVAL; |
7d94f7ca | 644 | |
cb5bc832 | 645 | desc = irq_to_desc(irq); |
7d94f7ca | 646 | if (!desc) |
1da177e4 | 647 | return -EINVAL; |
7d94f7ca | 648 | |
08678b08 | 649 | if (desc->status & IRQ_NOREQUEST) |
6550c775 | 650 | return -EINVAL; |
1da177e4 LT |
651 | if (!handler) |
652 | return -EINVAL; | |
653 | ||
654 | action = kmalloc(sizeof(struct irqaction), GFP_ATOMIC); | |
655 | if (!action) | |
656 | return -ENOMEM; | |
657 | ||
658 | action->handler = handler; | |
659 | action->flags = irqflags; | |
660 | cpus_clear(action->mask); | |
661 | action->name = devname; | |
662 | action->next = NULL; | |
663 | action->dev_id = dev_id; | |
664 | ||
377bf1e4 AV |
665 | retval = setup_irq(irq, action); |
666 | if (retval) | |
667 | kfree(action); | |
668 | ||
a304e1b8 DW |
669 | #ifdef CONFIG_DEBUG_SHIRQ |
670 | if (irqflags & IRQF_SHARED) { | |
671 | /* | |
672 | * It's a shared IRQ -- the driver ought to be prepared for it | |
673 | * to happen immediately, so let's make sure.... | |
377bf1e4 AV |
674 | * We disable the irq to make sure that a 'real' IRQ doesn't |
675 | * run in parallel with our fake. | |
a304e1b8 | 676 | */ |
59845b1f | 677 | unsigned long flags; |
a304e1b8 | 678 | |
377bf1e4 | 679 | disable_irq(irq); |
59845b1f | 680 | local_irq_save(flags); |
377bf1e4 | 681 | |
59845b1f | 682 | handler(irq, dev_id); |
377bf1e4 | 683 | |
59845b1f | 684 | local_irq_restore(flags); |
377bf1e4 | 685 | enable_irq(irq); |
a304e1b8 DW |
686 | } |
687 | #endif | |
1da177e4 LT |
688 | return retval; |
689 | } | |
1da177e4 | 690 | EXPORT_SYMBOL(request_irq); |