genirq: Remove the parameter 'irq' of kstat_incr_irqs_this_cpu()
[deliverable/linux.git] / kernel / irq / manage.c
CommitLineData
1da177e4
LT
1/*
2 * linux/kernel/irq/manage.c
3 *
a34db9b2
IM
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006 Thomas Gleixner
1da177e4
LT
6 *
7 * This file contains driver APIs to the irq subsystem.
8 */
9
97fd75b7
AM
10#define pr_fmt(fmt) "genirq: " fmt
11
1da177e4 12#include <linux/irq.h>
3aa551c9 13#include <linux/kthread.h>
1da177e4
LT
14#include <linux/module.h>
15#include <linux/random.h>
16#include <linux/interrupt.h>
1aeb272c 17#include <linux/slab.h>
3aa551c9 18#include <linux/sched.h>
8bd75c77 19#include <linux/sched/rt.h>
4d1d61a6 20#include <linux/task_work.h>
1da177e4
LT
21
22#include "internals.h"
23
8d32a307
TG
24#ifdef CONFIG_IRQ_FORCED_THREADING
25__read_mostly bool force_irqthreads;
26
27static int __init setup_forced_irqthreads(char *arg)
28{
29 force_irqthreads = true;
30 return 0;
31}
32early_param("threadirqs", setup_forced_irqthreads);
33#endif
34
18258f72 35static void __synchronize_hardirq(struct irq_desc *desc)
1da177e4 36{
32f4125e 37 bool inprogress;
1da177e4 38
a98ce5c6
HX
39 do {
40 unsigned long flags;
41
42 /*
43 * Wait until we're out of the critical section. This might
44 * give the wrong answer due to the lack of memory barriers.
45 */
32f4125e 46 while (irqd_irq_inprogress(&desc->irq_data))
a98ce5c6
HX
47 cpu_relax();
48
49 /* Ok, that indicated we're done: double-check carefully. */
239007b8 50 raw_spin_lock_irqsave(&desc->lock, flags);
32f4125e 51 inprogress = irqd_irq_inprogress(&desc->irq_data);
239007b8 52 raw_spin_unlock_irqrestore(&desc->lock, flags);
a98ce5c6
HX
53
54 /* Oops, that failed? */
32f4125e 55 } while (inprogress);
18258f72
TG
56}
57
58/**
59 * synchronize_hardirq - wait for pending hard IRQ handlers (on other CPUs)
60 * @irq: interrupt number to wait for
61 *
62 * This function waits for any pending hard IRQ handlers for this
63 * interrupt to complete before returning. If you use this
64 * function while holding a resource the IRQ handler may need you
65 * will deadlock. It does not take associated threaded handlers
66 * into account.
67 *
68 * Do not use this for shutdown scenarios where you must be sure
69 * that all parts (hardirq and threaded handler) have completed.
70 *
02cea395
PZ
71 * Returns: false if a threaded handler is active.
72 *
18258f72
TG
73 * This function may be called - with care - from IRQ context.
74 */
02cea395 75bool synchronize_hardirq(unsigned int irq)
18258f72
TG
76{
77 struct irq_desc *desc = irq_to_desc(irq);
3aa551c9 78
02cea395 79 if (desc) {
18258f72 80 __synchronize_hardirq(desc);
02cea395
PZ
81 return !atomic_read(&desc->threads_active);
82 }
83
84 return true;
18258f72
TG
85}
86EXPORT_SYMBOL(synchronize_hardirq);
87
88/**
89 * synchronize_irq - wait for pending IRQ handlers (on other CPUs)
90 * @irq: interrupt number to wait for
91 *
92 * This function waits for any pending IRQ handlers for this interrupt
93 * to complete before returning. If you use this function while
94 * holding a resource the IRQ handler may need you will deadlock.
95 *
96 * This function may be called - with care - from IRQ context.
97 */
98void synchronize_irq(unsigned int irq)
99{
100 struct irq_desc *desc = irq_to_desc(irq);
101
102 if (desc) {
103 __synchronize_hardirq(desc);
104 /*
105 * We made sure that no hardirq handler is
106 * running. Now verify that no threaded handlers are
107 * active.
108 */
109 wait_event(desc->wait_for_threads,
110 !atomic_read(&desc->threads_active));
111 }
1da177e4 112}
1da177e4
LT
113EXPORT_SYMBOL(synchronize_irq);
114
3aa551c9
TG
115#ifdef CONFIG_SMP
116cpumask_var_t irq_default_affinity;
117
771ee3b0
TG
118/**
119 * irq_can_set_affinity - Check if the affinity of a given irq can be set
120 * @irq: Interrupt to check
121 *
122 */
123int irq_can_set_affinity(unsigned int irq)
124{
08678b08 125 struct irq_desc *desc = irq_to_desc(irq);
771ee3b0 126
bce43032
TG
127 if (!desc || !irqd_can_balance(&desc->irq_data) ||
128 !desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity)
771ee3b0
TG
129 return 0;
130
131 return 1;
132}
133
591d2fb0
TG
134/**
135 * irq_set_thread_affinity - Notify irq threads to adjust affinity
136 * @desc: irq descriptor which has affitnity changed
137 *
138 * We just set IRQTF_AFFINITY and delegate the affinity setting
139 * to the interrupt thread itself. We can not call
140 * set_cpus_allowed_ptr() here as we hold desc->lock and this
141 * code can be called from hard interrupt context.
142 */
143void irq_set_thread_affinity(struct irq_desc *desc)
3aa551c9
TG
144{
145 struct irqaction *action = desc->action;
146
147 while (action) {
148 if (action->thread)
591d2fb0 149 set_bit(IRQTF_AFFINITY, &action->thread_flags);
3aa551c9
TG
150 action = action->next;
151 }
152}
153
1fa46f1f 154#ifdef CONFIG_GENERIC_PENDING_IRQ
0ef5ca1e 155static inline bool irq_can_move_pcntxt(struct irq_data *data)
1fa46f1f 156{
0ef5ca1e 157 return irqd_can_move_in_process_context(data);
1fa46f1f 158}
0ef5ca1e 159static inline bool irq_move_pending(struct irq_data *data)
1fa46f1f 160{
0ef5ca1e 161 return irqd_is_setaffinity_pending(data);
1fa46f1f
TG
162}
163static inline void
164irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask)
165{
166 cpumask_copy(desc->pending_mask, mask);
167}
168static inline void
169irq_get_pending(struct cpumask *mask, struct irq_desc *desc)
170{
171 cpumask_copy(mask, desc->pending_mask);
172}
173#else
0ef5ca1e 174static inline bool irq_can_move_pcntxt(struct irq_data *data) { return true; }
cd22c0e4 175static inline bool irq_move_pending(struct irq_data *data) { return false; }
1fa46f1f
TG
176static inline void
177irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask) { }
178static inline void
179irq_get_pending(struct cpumask *mask, struct irq_desc *desc) { }
180#endif
181
818b0f3b
JL
182int irq_do_set_affinity(struct irq_data *data, const struct cpumask *mask,
183 bool force)
184{
185 struct irq_desc *desc = irq_data_to_desc(data);
186 struct irq_chip *chip = irq_data_get_irq_chip(data);
187 int ret;
188
01f8fa4f 189 ret = chip->irq_set_affinity(data, mask, force);
818b0f3b
JL
190 switch (ret) {
191 case IRQ_SET_MASK_OK:
2cb62547 192 case IRQ_SET_MASK_OK_DONE:
818b0f3b
JL
193 cpumask_copy(data->affinity, mask);
194 case IRQ_SET_MASK_OK_NOCOPY:
195 irq_set_thread_affinity(desc);
196 ret = 0;
197 }
198
199 return ret;
200}
201
01f8fa4f
TG
202int irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask,
203 bool force)
771ee3b0 204{
c2d0c555
DD
205 struct irq_chip *chip = irq_data_get_irq_chip(data);
206 struct irq_desc *desc = irq_data_to_desc(data);
1fa46f1f 207 int ret = 0;
771ee3b0 208
c2d0c555 209 if (!chip || !chip->irq_set_affinity)
771ee3b0
TG
210 return -EINVAL;
211
0ef5ca1e 212 if (irq_can_move_pcntxt(data)) {
01f8fa4f 213 ret = irq_do_set_affinity(data, mask, force);
1fa46f1f 214 } else {
c2d0c555 215 irqd_set_move_pending(data);
1fa46f1f 216 irq_copy_pending(desc, mask);
57b150cc 217 }
1fa46f1f 218
cd7eab44
BH
219 if (desc->affinity_notify) {
220 kref_get(&desc->affinity_notify->kref);
221 schedule_work(&desc->affinity_notify->work);
222 }
c2d0c555
DD
223 irqd_set(data, IRQD_AFFINITY_SET);
224
225 return ret;
226}
227
01f8fa4f 228int __irq_set_affinity(unsigned int irq, const struct cpumask *mask, bool force)
c2d0c555
DD
229{
230 struct irq_desc *desc = irq_to_desc(irq);
231 unsigned long flags;
232 int ret;
233
234 if (!desc)
235 return -EINVAL;
236
237 raw_spin_lock_irqsave(&desc->lock, flags);
01f8fa4f 238 ret = irq_set_affinity_locked(irq_desc_get_irq_data(desc), mask, force);
239007b8 239 raw_spin_unlock_irqrestore(&desc->lock, flags);
1fa46f1f 240 return ret;
771ee3b0
TG
241}
242
e7a297b0
PWJ
243int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m)
244{
e7a297b0 245 unsigned long flags;
31d9d9b6 246 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
e7a297b0
PWJ
247
248 if (!desc)
249 return -EINVAL;
e7a297b0 250 desc->affinity_hint = m;
02725e74 251 irq_put_desc_unlock(desc, flags);
e2e64a93 252 /* set the initial affinity to prevent every interrupt being on CPU0 */
4fe7ffb7
JB
253 if (m)
254 __irq_set_affinity(irq, m, false);
e7a297b0
PWJ
255 return 0;
256}
257EXPORT_SYMBOL_GPL(irq_set_affinity_hint);
258
0a4377de
JL
259/**
260 * irq_set_vcpu_affinity - Set vcpu affinity for the interrupt
261 * @irq: interrupt number to set affinity
262 * @vcpu_info: vCPU specific data
263 *
264 * This function uses the vCPU specific data to set the vCPU
265 * affinity for an irq. The vCPU specific data is passed from
266 * outside, such as KVM. One example code path is as below:
267 * KVM -> IOMMU -> irq_set_vcpu_affinity().
268 */
269int irq_set_vcpu_affinity(unsigned int irq, void *vcpu_info)
270{
271 unsigned long flags;
272 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
273 struct irq_data *data;
274 struct irq_chip *chip;
275 int ret = -ENOSYS;
276
277 if (!desc)
278 return -EINVAL;
279
280 data = irq_desc_get_irq_data(desc);
281 chip = irq_data_get_irq_chip(data);
282 if (chip && chip->irq_set_vcpu_affinity)
283 ret = chip->irq_set_vcpu_affinity(data, vcpu_info);
284 irq_put_desc_unlock(desc, flags);
285
286 return ret;
287}
288EXPORT_SYMBOL_GPL(irq_set_vcpu_affinity);
289
cd7eab44
BH
290static void irq_affinity_notify(struct work_struct *work)
291{
292 struct irq_affinity_notify *notify =
293 container_of(work, struct irq_affinity_notify, work);
294 struct irq_desc *desc = irq_to_desc(notify->irq);
295 cpumask_var_t cpumask;
296 unsigned long flags;
297
1fa46f1f 298 if (!desc || !alloc_cpumask_var(&cpumask, GFP_KERNEL))
cd7eab44
BH
299 goto out;
300
301 raw_spin_lock_irqsave(&desc->lock, flags);
0ef5ca1e 302 if (irq_move_pending(&desc->irq_data))
1fa46f1f 303 irq_get_pending(cpumask, desc);
cd7eab44 304 else
1fb0ef31 305 cpumask_copy(cpumask, desc->irq_data.affinity);
cd7eab44
BH
306 raw_spin_unlock_irqrestore(&desc->lock, flags);
307
308 notify->notify(notify, cpumask);
309
310 free_cpumask_var(cpumask);
311out:
312 kref_put(&notify->kref, notify->release);
313}
314
315/**
316 * irq_set_affinity_notifier - control notification of IRQ affinity changes
317 * @irq: Interrupt for which to enable/disable notification
318 * @notify: Context for notification, or %NULL to disable
319 * notification. Function pointers must be initialised;
320 * the other fields will be initialised by this function.
321 *
322 * Must be called in process context. Notification may only be enabled
323 * after the IRQ is allocated and must be disabled before the IRQ is
324 * freed using free_irq().
325 */
326int
327irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify)
328{
329 struct irq_desc *desc = irq_to_desc(irq);
330 struct irq_affinity_notify *old_notify;
331 unsigned long flags;
332
333 /* The release function is promised process context */
334 might_sleep();
335
336 if (!desc)
337 return -EINVAL;
338
339 /* Complete initialisation of *notify */
340 if (notify) {
341 notify->irq = irq;
342 kref_init(&notify->kref);
343 INIT_WORK(&notify->work, irq_affinity_notify);
344 }
345
346 raw_spin_lock_irqsave(&desc->lock, flags);
347 old_notify = desc->affinity_notify;
348 desc->affinity_notify = notify;
349 raw_spin_unlock_irqrestore(&desc->lock, flags);
350
351 if (old_notify)
352 kref_put(&old_notify->kref, old_notify->release);
353
354 return 0;
355}
356EXPORT_SYMBOL_GPL(irq_set_affinity_notifier);
357
18404756
MK
358#ifndef CONFIG_AUTO_IRQ_AFFINITY
359/*
360 * Generic version of the affinity autoselector.
361 */
3b8249e7
TG
362static int
363setup_affinity(unsigned int irq, struct irq_desc *desc, struct cpumask *mask)
18404756 364{
569bda8d 365 struct cpumask *set = irq_default_affinity;
6783011b 366 int node = irq_desc_get_node(desc);
569bda8d 367
b008207c 368 /* Excludes PER_CPU and NO_BALANCE interrupts */
18404756
MK
369 if (!irq_can_set_affinity(irq))
370 return 0;
371
f6d87f4b
TG
372 /*
373 * Preserve an userspace affinity setup, but make sure that
374 * one of the targets is online.
375 */
2bdd1055 376 if (irqd_has_set(&desc->irq_data, IRQD_AFFINITY_SET)) {
569bda8d
TG
377 if (cpumask_intersects(desc->irq_data.affinity,
378 cpu_online_mask))
379 set = desc->irq_data.affinity;
0c6f8a8b 380 else
2bdd1055 381 irqd_clear(&desc->irq_data, IRQD_AFFINITY_SET);
f6d87f4b 382 }
18404756 383
3b8249e7 384 cpumask_and(mask, cpu_online_mask, set);
241fc640
PB
385 if (node != NUMA_NO_NODE) {
386 const struct cpumask *nodemask = cpumask_of_node(node);
387
388 /* make sure at least one of the cpus in nodemask is online */
389 if (cpumask_intersects(mask, nodemask))
390 cpumask_and(mask, mask, nodemask);
391 }
818b0f3b 392 irq_do_set_affinity(&desc->irq_data, mask, false);
18404756
MK
393 return 0;
394}
f6d87f4b 395#else
3b8249e7
TG
396static inline int
397setup_affinity(unsigned int irq, struct irq_desc *d, struct cpumask *mask)
f6d87f4b
TG
398{
399 return irq_select_affinity(irq);
400}
18404756
MK
401#endif
402
f6d87f4b
TG
403/*
404 * Called when affinity is set via /proc/irq
405 */
3b8249e7 406int irq_select_affinity_usr(unsigned int irq, struct cpumask *mask)
f6d87f4b
TG
407{
408 struct irq_desc *desc = irq_to_desc(irq);
409 unsigned long flags;
410 int ret;
411
239007b8 412 raw_spin_lock_irqsave(&desc->lock, flags);
3b8249e7 413 ret = setup_affinity(irq, desc, mask);
239007b8 414 raw_spin_unlock_irqrestore(&desc->lock, flags);
f6d87f4b
TG
415 return ret;
416}
417
418#else
3b8249e7
TG
419static inline int
420setup_affinity(unsigned int irq, struct irq_desc *desc, struct cpumask *mask)
f6d87f4b
TG
421{
422 return 0;
423}
1da177e4
LT
424#endif
425
8df2e02c 426void __disable_irq(struct irq_desc *desc, unsigned int irq)
0a0c5168 427{
3aae994f 428 if (!desc->depth++)
87923470 429 irq_disable(desc);
0a0c5168
RW
430}
431
02725e74
TG
432static int __disable_irq_nosync(unsigned int irq)
433{
434 unsigned long flags;
31d9d9b6 435 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
02725e74
TG
436
437 if (!desc)
438 return -EINVAL;
8df2e02c 439 __disable_irq(desc, irq);
02725e74
TG
440 irq_put_desc_busunlock(desc, flags);
441 return 0;
442}
443
1da177e4
LT
444/**
445 * disable_irq_nosync - disable an irq without waiting
446 * @irq: Interrupt to disable
447 *
448 * Disable the selected interrupt line. Disables and Enables are
449 * nested.
450 * Unlike disable_irq(), this function does not ensure existing
451 * instances of the IRQ handler have completed before returning.
452 *
453 * This function may be called from IRQ context.
454 */
455void disable_irq_nosync(unsigned int irq)
456{
02725e74 457 __disable_irq_nosync(irq);
1da177e4 458}
1da177e4
LT
459EXPORT_SYMBOL(disable_irq_nosync);
460
461/**
462 * disable_irq - disable an irq and wait for completion
463 * @irq: Interrupt to disable
464 *
465 * Disable the selected interrupt line. Enables and Disables are
466 * nested.
467 * This function waits for any pending IRQ handlers for this interrupt
468 * to complete before returning. If you use this function while
469 * holding a resource the IRQ handler may need you will deadlock.
470 *
471 * This function may be called - with care - from IRQ context.
472 */
473void disable_irq(unsigned int irq)
474{
02725e74 475 if (!__disable_irq_nosync(irq))
1da177e4
LT
476 synchronize_irq(irq);
477}
1da177e4
LT
478EXPORT_SYMBOL(disable_irq);
479
02cea395
PZ
480/**
481 * disable_hardirq - disables an irq and waits for hardirq completion
482 * @irq: Interrupt to disable
483 *
484 * Disable the selected interrupt line. Enables and Disables are
485 * nested.
486 * This function waits for any pending hard IRQ handlers for this
487 * interrupt to complete before returning. If you use this function while
488 * holding a resource the hard IRQ handler may need you will deadlock.
489 *
490 * When used to optimistically disable an interrupt from atomic context
491 * the return value must be checked.
492 *
493 * Returns: false if a threaded handler is active.
494 *
495 * This function may be called - with care - from IRQ context.
496 */
497bool disable_hardirq(unsigned int irq)
498{
499 if (!__disable_irq_nosync(irq))
500 return synchronize_hardirq(irq);
501
502 return false;
503}
504EXPORT_SYMBOL_GPL(disable_hardirq);
505
8df2e02c 506void __enable_irq(struct irq_desc *desc, unsigned int irq)
1adb0850
TG
507{
508 switch (desc->depth) {
509 case 0:
0a0c5168 510 err_out:
b8c512f6 511 WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n", irq);
1adb0850
TG
512 break;
513 case 1: {
c531e836 514 if (desc->istate & IRQS_SUSPENDED)
0a0c5168 515 goto err_out;
1adb0850 516 /* Prevent probing on this irq: */
1ccb4e61 517 irq_settings_set_noprobe(desc);
3aae994f 518 irq_enable(desc);
1adb0850
TG
519 check_irq_resend(desc, irq);
520 /* fall-through */
521 }
522 default:
523 desc->depth--;
524 }
525}
526
1da177e4
LT
527/**
528 * enable_irq - enable handling of an irq
529 * @irq: Interrupt to enable
530 *
531 * Undoes the effect of one call to disable_irq(). If this
532 * matches the last disable, processing of interrupts on this
533 * IRQ line is re-enabled.
534 *
70aedd24 535 * This function may be called from IRQ context only when
6b8ff312 536 * desc->irq_data.chip->bus_lock and desc->chip->bus_sync_unlock are NULL !
1da177e4
LT
537 */
538void enable_irq(unsigned int irq)
539{
1da177e4 540 unsigned long flags;
31d9d9b6 541 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
1da177e4 542
7d94f7ca 543 if (!desc)
c2b5a251 544 return;
50f7c032
TG
545 if (WARN(!desc->irq_data.chip,
546 KERN_ERR "enable_irq before setup/request_irq: irq %u\n", irq))
02725e74 547 goto out;
2656c366 548
8df2e02c 549 __enable_irq(desc, irq);
02725e74
TG
550out:
551 irq_put_desc_busunlock(desc, flags);
1da177e4 552}
1da177e4
LT
553EXPORT_SYMBOL(enable_irq);
554
0c5d1eb7 555static int set_irq_wake_real(unsigned int irq, unsigned int on)
2db87321 556{
08678b08 557 struct irq_desc *desc = irq_to_desc(irq);
2db87321
UKK
558 int ret = -ENXIO;
559
60f96b41
SS
560 if (irq_desc_get_chip(desc)->flags & IRQCHIP_SKIP_SET_WAKE)
561 return 0;
562
2f7e99bb
TG
563 if (desc->irq_data.chip->irq_set_wake)
564 ret = desc->irq_data.chip->irq_set_wake(&desc->irq_data, on);
2db87321
UKK
565
566 return ret;
567}
568
ba9a2331 569/**
a0cd9ca2 570 * irq_set_irq_wake - control irq power management wakeup
ba9a2331
TG
571 * @irq: interrupt to control
572 * @on: enable/disable power management wakeup
573 *
15a647eb
DB
574 * Enable/disable power management wakeup mode, which is
575 * disabled by default. Enables and disables must match,
576 * just as they match for non-wakeup mode support.
577 *
578 * Wakeup mode lets this IRQ wake the system from sleep
579 * states like "suspend to RAM".
ba9a2331 580 */
a0cd9ca2 581int irq_set_irq_wake(unsigned int irq, unsigned int on)
ba9a2331 582{
ba9a2331 583 unsigned long flags;
31d9d9b6 584 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
2db87321 585 int ret = 0;
ba9a2331 586
13863a66
JJ
587 if (!desc)
588 return -EINVAL;
589
15a647eb
DB
590 /* wakeup-capable irqs can be shared between drivers that
591 * don't need to have the same sleep mode behaviors.
592 */
15a647eb 593 if (on) {
2db87321
UKK
594 if (desc->wake_depth++ == 0) {
595 ret = set_irq_wake_real(irq, on);
596 if (ret)
597 desc->wake_depth = 0;
598 else
7f94226f 599 irqd_set(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 600 }
15a647eb
DB
601 } else {
602 if (desc->wake_depth == 0) {
7a2c4770 603 WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
2db87321
UKK
604 } else if (--desc->wake_depth == 0) {
605 ret = set_irq_wake_real(irq, on);
606 if (ret)
607 desc->wake_depth = 1;
608 else
7f94226f 609 irqd_clear(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 610 }
15a647eb 611 }
02725e74 612 irq_put_desc_busunlock(desc, flags);
ba9a2331
TG
613 return ret;
614}
a0cd9ca2 615EXPORT_SYMBOL(irq_set_irq_wake);
ba9a2331 616
1da177e4
LT
617/*
618 * Internal function that tells the architecture code whether a
619 * particular irq has been exclusively allocated or is available
620 * for driver use.
621 */
622int can_request_irq(unsigned int irq, unsigned long irqflags)
623{
cc8c3b78 624 unsigned long flags;
31d9d9b6 625 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
02725e74 626 int canrequest = 0;
1da177e4 627
7d94f7ca
YL
628 if (!desc)
629 return 0;
630
02725e74 631 if (irq_settings_can_request(desc)) {
2779db8d
BH
632 if (!desc->action ||
633 irqflags & desc->action->flags & IRQF_SHARED)
634 canrequest = 1;
02725e74
TG
635 }
636 irq_put_desc_unlock(desc, flags);
637 return canrequest;
1da177e4
LT
638}
639
0c5d1eb7 640int __irq_set_trigger(struct irq_desc *desc, unsigned int irq,
b2ba2c30 641 unsigned long flags)
82736f4d 642{
6b8ff312 643 struct irq_chip *chip = desc->irq_data.chip;
d4d5e089 644 int ret, unmask = 0;
82736f4d 645
b2ba2c30 646 if (!chip || !chip->irq_set_type) {
82736f4d
UKK
647 /*
648 * IRQF_TRIGGER_* but the PIC does not support multiple
649 * flow-types?
650 */
97fd75b7 651 pr_debug("No set_type function for IRQ %d (%s)\n", irq,
f5d89470 652 chip ? (chip->name ? : "unknown") : "unknown");
82736f4d
UKK
653 return 0;
654 }
655
876dbd4c 656 flags &= IRQ_TYPE_SENSE_MASK;
d4d5e089
TG
657
658 if (chip->flags & IRQCHIP_SET_TYPE_MASKED) {
32f4125e 659 if (!irqd_irq_masked(&desc->irq_data))
d4d5e089 660 mask_irq(desc);
32f4125e 661 if (!irqd_irq_disabled(&desc->irq_data))
d4d5e089
TG
662 unmask = 1;
663 }
664
f2b662da 665 /* caller masked out all except trigger mode flags */
b2ba2c30 666 ret = chip->irq_set_type(&desc->irq_data, flags);
82736f4d 667
876dbd4c
TG
668 switch (ret) {
669 case IRQ_SET_MASK_OK:
2cb62547 670 case IRQ_SET_MASK_OK_DONE:
876dbd4c
TG
671 irqd_clear(&desc->irq_data, IRQD_TRIGGER_MASK);
672 irqd_set(&desc->irq_data, flags);
673
674 case IRQ_SET_MASK_OK_NOCOPY:
675 flags = irqd_get_trigger_type(&desc->irq_data);
676 irq_settings_set_trigger_mask(desc, flags);
677 irqd_clear(&desc->irq_data, IRQD_LEVEL);
678 irq_settings_clr_level(desc);
679 if (flags & IRQ_TYPE_LEVEL_MASK) {
680 irq_settings_set_level(desc);
681 irqd_set(&desc->irq_data, IRQD_LEVEL);
682 }
46732475 683
d4d5e089 684 ret = 0;
8fff39e0 685 break;
876dbd4c 686 default:
97fd75b7 687 pr_err("Setting trigger mode %lu for irq %u failed (%pF)\n",
876dbd4c 688 flags, irq, chip->irq_set_type);
0c5d1eb7 689 }
d4d5e089
TG
690 if (unmask)
691 unmask_irq(desc);
82736f4d
UKK
692 return ret;
693}
694
293a7a0a
TG
695#ifdef CONFIG_HARDIRQS_SW_RESEND
696int irq_set_parent(int irq, int parent_irq)
697{
698 unsigned long flags;
699 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
700
701 if (!desc)
702 return -EINVAL;
703
704 desc->parent_irq = parent_irq;
705
706 irq_put_desc_unlock(desc, flags);
707 return 0;
708}
709#endif
710
b25c340c
TG
711/*
712 * Default primary interrupt handler for threaded interrupts. Is
713 * assigned as primary handler when request_threaded_irq is called
714 * with handler == NULL. Useful for oneshot interrupts.
715 */
716static irqreturn_t irq_default_primary_handler(int irq, void *dev_id)
717{
718 return IRQ_WAKE_THREAD;
719}
720
399b5da2
TG
721/*
722 * Primary handler for nested threaded interrupts. Should never be
723 * called.
724 */
725static irqreturn_t irq_nested_primary_handler(int irq, void *dev_id)
726{
727 WARN(1, "Primary handler called for nested irq %d\n", irq);
728 return IRQ_NONE;
729}
730
3aa551c9
TG
731static int irq_wait_for_interrupt(struct irqaction *action)
732{
550acb19
IY
733 set_current_state(TASK_INTERRUPTIBLE);
734
3aa551c9 735 while (!kthread_should_stop()) {
f48fe81e
TG
736
737 if (test_and_clear_bit(IRQTF_RUNTHREAD,
738 &action->thread_flags)) {
3aa551c9
TG
739 __set_current_state(TASK_RUNNING);
740 return 0;
f48fe81e
TG
741 }
742 schedule();
550acb19 743 set_current_state(TASK_INTERRUPTIBLE);
3aa551c9 744 }
550acb19 745 __set_current_state(TASK_RUNNING);
3aa551c9
TG
746 return -1;
747}
748
b25c340c
TG
749/*
750 * Oneshot interrupts keep the irq line masked until the threaded
751 * handler finished. unmask if the interrupt has not been disabled and
752 * is marked MASKED.
753 */
b5faba21 754static void irq_finalize_oneshot(struct irq_desc *desc,
f3f79e38 755 struct irqaction *action)
b25c340c 756{
b5faba21
TG
757 if (!(desc->istate & IRQS_ONESHOT))
758 return;
0b1adaa0 759again:
3876ec9e 760 chip_bus_lock(desc);
239007b8 761 raw_spin_lock_irq(&desc->lock);
0b1adaa0
TG
762
763 /*
764 * Implausible though it may be we need to protect us against
765 * the following scenario:
766 *
767 * The thread is faster done than the hard interrupt handler
768 * on the other CPU. If we unmask the irq line then the
769 * interrupt can come in again and masks the line, leaves due
009b4c3b 770 * to IRQS_INPROGRESS and the irq line is masked forever.
b5faba21
TG
771 *
772 * This also serializes the state of shared oneshot handlers
773 * versus "desc->threads_onehsot |= action->thread_mask;" in
774 * irq_wake_thread(). See the comment there which explains the
775 * serialization.
0b1adaa0 776 */
32f4125e 777 if (unlikely(irqd_irq_inprogress(&desc->irq_data))) {
0b1adaa0 778 raw_spin_unlock_irq(&desc->lock);
3876ec9e 779 chip_bus_sync_unlock(desc);
0b1adaa0
TG
780 cpu_relax();
781 goto again;
782 }
783
b5faba21
TG
784 /*
785 * Now check again, whether the thread should run. Otherwise
786 * we would clear the threads_oneshot bit of this thread which
787 * was just set.
788 */
f3f79e38 789 if (test_bit(IRQTF_RUNTHREAD, &action->thread_flags))
b5faba21
TG
790 goto out_unlock;
791
792 desc->threads_oneshot &= ~action->thread_mask;
793
32f4125e
TG
794 if (!desc->threads_oneshot && !irqd_irq_disabled(&desc->irq_data) &&
795 irqd_irq_masked(&desc->irq_data))
328a4978 796 unmask_threaded_irq(desc);
32f4125e 797
b5faba21 798out_unlock:
239007b8 799 raw_spin_unlock_irq(&desc->lock);
3876ec9e 800 chip_bus_sync_unlock(desc);
b25c340c
TG
801}
802
61f38261 803#ifdef CONFIG_SMP
591d2fb0 804/*
b04c644e 805 * Check whether we need to change the affinity of the interrupt thread.
591d2fb0
TG
806 */
807static void
808irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action)
809{
810 cpumask_var_t mask;
04aa530e 811 bool valid = true;
591d2fb0
TG
812
813 if (!test_and_clear_bit(IRQTF_AFFINITY, &action->thread_flags))
814 return;
815
816 /*
817 * In case we are out of memory we set IRQTF_AFFINITY again and
818 * try again next time
819 */
820 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
821 set_bit(IRQTF_AFFINITY, &action->thread_flags);
822 return;
823 }
824
239007b8 825 raw_spin_lock_irq(&desc->lock);
04aa530e
TG
826 /*
827 * This code is triggered unconditionally. Check the affinity
828 * mask pointer. For CPU_MASK_OFFSTACK=n this is optimized out.
829 */
830 if (desc->irq_data.affinity)
831 cpumask_copy(mask, desc->irq_data.affinity);
832 else
833 valid = false;
239007b8 834 raw_spin_unlock_irq(&desc->lock);
591d2fb0 835
04aa530e
TG
836 if (valid)
837 set_cpus_allowed_ptr(current, mask);
591d2fb0
TG
838 free_cpumask_var(mask);
839}
61f38261
BP
840#else
841static inline void
842irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) { }
843#endif
591d2fb0 844
8d32a307
TG
845/*
846 * Interrupts which are not explicitely requested as threaded
847 * interrupts rely on the implicit bh/preempt disable of the hard irq
848 * context. So we need to disable bh here to avoid deadlocks and other
849 * side effects.
850 */
3a43e05f 851static irqreturn_t
8d32a307
TG
852irq_forced_thread_fn(struct irq_desc *desc, struct irqaction *action)
853{
3a43e05f
SAS
854 irqreturn_t ret;
855
8d32a307 856 local_bh_disable();
3a43e05f 857 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 858 irq_finalize_oneshot(desc, action);
8d32a307 859 local_bh_enable();
3a43e05f 860 return ret;
8d32a307
TG
861}
862
863/*
f788e7bf 864 * Interrupts explicitly requested as threaded interrupts want to be
8d32a307
TG
865 * preemtible - many of them need to sleep and wait for slow busses to
866 * complete.
867 */
3a43e05f
SAS
868static irqreturn_t irq_thread_fn(struct irq_desc *desc,
869 struct irqaction *action)
8d32a307 870{
3a43e05f
SAS
871 irqreturn_t ret;
872
873 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 874 irq_finalize_oneshot(desc, action);
3a43e05f 875 return ret;
8d32a307
TG
876}
877
7140ea19
IY
878static void wake_threads_waitq(struct irq_desc *desc)
879{
c685689f 880 if (atomic_dec_and_test(&desc->threads_active))
7140ea19
IY
881 wake_up(&desc->wait_for_threads);
882}
883
67d12145 884static void irq_thread_dtor(struct callback_head *unused)
4d1d61a6
ON
885{
886 struct task_struct *tsk = current;
887 struct irq_desc *desc;
888 struct irqaction *action;
889
890 if (WARN_ON_ONCE(!(current->flags & PF_EXITING)))
891 return;
892
893 action = kthread_data(tsk);
894
fb21affa 895 pr_err("exiting task \"%s\" (%d) is an active IRQ thread (irq %d)\n",
19af395d 896 tsk->comm, tsk->pid, action->irq);
4d1d61a6
ON
897
898
899 desc = irq_to_desc(action->irq);
900 /*
901 * If IRQTF_RUNTHREAD is set, we need to decrement
902 * desc->threads_active and wake possible waiters.
903 */
904 if (test_and_clear_bit(IRQTF_RUNTHREAD, &action->thread_flags))
905 wake_threads_waitq(desc);
906
907 /* Prevent a stale desc->threads_oneshot */
908 irq_finalize_oneshot(desc, action);
909}
910
3aa551c9
TG
911/*
912 * Interrupt handler thread
913 */
914static int irq_thread(void *data)
915{
67d12145 916 struct callback_head on_exit_work;
3aa551c9
TG
917 struct irqaction *action = data;
918 struct irq_desc *desc = irq_to_desc(action->irq);
3a43e05f
SAS
919 irqreturn_t (*handler_fn)(struct irq_desc *desc,
920 struct irqaction *action);
3aa551c9 921
540b60e2 922 if (force_irqthreads && test_bit(IRQTF_FORCED_THREAD,
8d32a307
TG
923 &action->thread_flags))
924 handler_fn = irq_forced_thread_fn;
925 else
926 handler_fn = irq_thread_fn;
927
41f9d29f 928 init_task_work(&on_exit_work, irq_thread_dtor);
4d1d61a6 929 task_work_add(current, &on_exit_work, false);
3aa551c9 930
f3de44ed
SM
931 irq_thread_check_affinity(desc, action);
932
3aa551c9 933 while (!irq_wait_for_interrupt(action)) {
7140ea19 934 irqreturn_t action_ret;
3aa551c9 935
591d2fb0
TG
936 irq_thread_check_affinity(desc, action);
937
7140ea19 938 action_ret = handler_fn(desc, action);
1e77d0a1
TG
939 if (action_ret == IRQ_HANDLED)
940 atomic_inc(&desc->threads_handled);
3aa551c9 941
7140ea19 942 wake_threads_waitq(desc);
3aa551c9
TG
943 }
944
7140ea19
IY
945 /*
946 * This is the regular exit path. __free_irq() is stopping the
947 * thread via kthread_stop() after calling
948 * synchronize_irq(). So neither IRQTF_RUNTHREAD nor the
e04268b0
TG
949 * oneshot mask bit can be set. We cannot verify that as we
950 * cannot touch the oneshot mask at this point anymore as
951 * __setup_irq() might have given out currents thread_mask
952 * again.
3aa551c9 953 */
4d1d61a6 954 task_work_cancel(current, irq_thread_dtor);
3aa551c9
TG
955 return 0;
956}
957
a92444c6
TG
958/**
959 * irq_wake_thread - wake the irq thread for the action identified by dev_id
960 * @irq: Interrupt line
961 * @dev_id: Device identity for which the thread should be woken
962 *
963 */
964void irq_wake_thread(unsigned int irq, void *dev_id)
965{
966 struct irq_desc *desc = irq_to_desc(irq);
967 struct irqaction *action;
968 unsigned long flags;
969
970 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
971 return;
972
973 raw_spin_lock_irqsave(&desc->lock, flags);
974 for (action = desc->action; action; action = action->next) {
975 if (action->dev_id == dev_id) {
976 if (action->thread)
977 __irq_wake_thread(desc, action);
978 break;
979 }
980 }
981 raw_spin_unlock_irqrestore(&desc->lock, flags);
982}
983EXPORT_SYMBOL_GPL(irq_wake_thread);
984
8d32a307
TG
985static void irq_setup_forced_threading(struct irqaction *new)
986{
987 if (!force_irqthreads)
988 return;
989 if (new->flags & (IRQF_NO_THREAD | IRQF_PERCPU | IRQF_ONESHOT))
990 return;
991
992 new->flags |= IRQF_ONESHOT;
993
994 if (!new->thread_fn) {
995 set_bit(IRQTF_FORCED_THREAD, &new->thread_flags);
996 new->thread_fn = new->handler;
997 new->handler = irq_default_primary_handler;
998 }
999}
1000
c1bacbae
TG
1001static int irq_request_resources(struct irq_desc *desc)
1002{
1003 struct irq_data *d = &desc->irq_data;
1004 struct irq_chip *c = d->chip;
1005
1006 return c->irq_request_resources ? c->irq_request_resources(d) : 0;
1007}
1008
1009static void irq_release_resources(struct irq_desc *desc)
1010{
1011 struct irq_data *d = &desc->irq_data;
1012 struct irq_chip *c = d->chip;
1013
1014 if (c->irq_release_resources)
1015 c->irq_release_resources(d);
1016}
1017
1da177e4
LT
1018/*
1019 * Internal function to register an irqaction - typically used to
1020 * allocate special interrupts that are part of the architecture.
1021 */
d3c60047 1022static int
327ec569 1023__setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
1da177e4 1024{
f17c7545 1025 struct irqaction *old, **old_ptr;
b5faba21 1026 unsigned long flags, thread_mask = 0;
3b8249e7
TG
1027 int ret, nested, shared = 0;
1028 cpumask_var_t mask;
1da177e4 1029
7d94f7ca 1030 if (!desc)
c2b5a251
MW
1031 return -EINVAL;
1032
6b8ff312 1033 if (desc->irq_data.chip == &no_irq_chip)
1da177e4 1034 return -ENOSYS;
b6873807
SAS
1035 if (!try_module_get(desc->owner))
1036 return -ENODEV;
1da177e4 1037
3aa551c9 1038 /*
399b5da2
TG
1039 * Check whether the interrupt nests into another interrupt
1040 * thread.
1041 */
1ccb4e61 1042 nested = irq_settings_is_nested_thread(desc);
399b5da2 1043 if (nested) {
b6873807
SAS
1044 if (!new->thread_fn) {
1045 ret = -EINVAL;
1046 goto out_mput;
1047 }
399b5da2
TG
1048 /*
1049 * Replace the primary handler which was provided from
1050 * the driver for non nested interrupt handling by the
1051 * dummy function which warns when called.
1052 */
1053 new->handler = irq_nested_primary_handler;
8d32a307 1054 } else {
7f1b1244
PM
1055 if (irq_settings_can_thread(desc))
1056 irq_setup_forced_threading(new);
399b5da2
TG
1057 }
1058
3aa551c9 1059 /*
399b5da2
TG
1060 * Create a handler thread when a thread function is supplied
1061 * and the interrupt does not nest into another interrupt
1062 * thread.
3aa551c9 1063 */
399b5da2 1064 if (new->thread_fn && !nested) {
3aa551c9 1065 struct task_struct *t;
ee238713
IS
1066 static const struct sched_param param = {
1067 .sched_priority = MAX_USER_RT_PRIO/2,
1068 };
3aa551c9
TG
1069
1070 t = kthread_create(irq_thread, new, "irq/%d-%s", irq,
1071 new->name);
b6873807
SAS
1072 if (IS_ERR(t)) {
1073 ret = PTR_ERR(t);
1074 goto out_mput;
1075 }
ee238713 1076
bbfe65c2 1077 sched_setscheduler_nocheck(t, SCHED_FIFO, &param);
ee238713 1078
3aa551c9
TG
1079 /*
1080 * We keep the reference to the task struct even if
1081 * the thread dies to avoid that the interrupt code
1082 * references an already freed task_struct.
1083 */
1084 get_task_struct(t);
1085 new->thread = t;
04aa530e
TG
1086 /*
1087 * Tell the thread to set its affinity. This is
1088 * important for shared interrupt handlers as we do
1089 * not invoke setup_affinity() for the secondary
1090 * handlers as everything is already set up. Even for
1091 * interrupts marked with IRQF_NO_BALANCE this is
1092 * correct as we want the thread to move to the cpu(s)
1093 * on which the requesting code placed the interrupt.
1094 */
1095 set_bit(IRQTF_AFFINITY, &new->thread_flags);
3aa551c9
TG
1096 }
1097
3b8249e7
TG
1098 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
1099 ret = -ENOMEM;
1100 goto out_thread;
1101 }
1102
dc9b229a
TG
1103 /*
1104 * Drivers are often written to work w/o knowledge about the
1105 * underlying irq chip implementation, so a request for a
1106 * threaded irq without a primary hard irq context handler
1107 * requires the ONESHOT flag to be set. Some irq chips like
1108 * MSI based interrupts are per se one shot safe. Check the
1109 * chip flags, so we can avoid the unmask dance at the end of
1110 * the threaded handler for those.
1111 */
1112 if (desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)
1113 new->flags &= ~IRQF_ONESHOT;
1114
1da177e4
LT
1115 /*
1116 * The following block of code has to be executed atomically
1117 */
239007b8 1118 raw_spin_lock_irqsave(&desc->lock, flags);
f17c7545
IM
1119 old_ptr = &desc->action;
1120 old = *old_ptr;
06fcb0c6 1121 if (old) {
e76de9f8
TG
1122 /*
1123 * Can't share interrupts unless both agree to and are
1124 * the same type (level, edge, polarity). So both flag
3cca53b0 1125 * fields must have IRQF_SHARED set and the bits which
9d591edd
TG
1126 * set the trigger type must match. Also all must
1127 * agree on ONESHOT.
e76de9f8 1128 */
3cca53b0 1129 if (!((old->flags & new->flags) & IRQF_SHARED) ||
9d591edd 1130 ((old->flags ^ new->flags) & IRQF_TRIGGER_MASK) ||
f5d89470 1131 ((old->flags ^ new->flags) & IRQF_ONESHOT))
f5163427
DS
1132 goto mismatch;
1133
f5163427 1134 /* All handlers must agree on per-cpuness */
3cca53b0
TG
1135 if ((old->flags & IRQF_PERCPU) !=
1136 (new->flags & IRQF_PERCPU))
f5163427 1137 goto mismatch;
1da177e4
LT
1138
1139 /* add new interrupt at end of irq queue */
1140 do {
52abb700
TG
1141 /*
1142 * Or all existing action->thread_mask bits,
1143 * so we can find the next zero bit for this
1144 * new action.
1145 */
b5faba21 1146 thread_mask |= old->thread_mask;
f17c7545
IM
1147 old_ptr = &old->next;
1148 old = *old_ptr;
1da177e4
LT
1149 } while (old);
1150 shared = 1;
1151 }
1152
b5faba21 1153 /*
52abb700
TG
1154 * Setup the thread mask for this irqaction for ONESHOT. For
1155 * !ONESHOT irqs the thread mask is 0 so we can avoid a
1156 * conditional in irq_wake_thread().
b5faba21 1157 */
52abb700
TG
1158 if (new->flags & IRQF_ONESHOT) {
1159 /*
1160 * Unlikely to have 32 resp 64 irqs sharing one line,
1161 * but who knows.
1162 */
1163 if (thread_mask == ~0UL) {
1164 ret = -EBUSY;
1165 goto out_mask;
1166 }
1167 /*
1168 * The thread_mask for the action is or'ed to
1169 * desc->thread_active to indicate that the
1170 * IRQF_ONESHOT thread handler has been woken, but not
1171 * yet finished. The bit is cleared when a thread
1172 * completes. When all threads of a shared interrupt
1173 * line have completed desc->threads_active becomes
1174 * zero and the interrupt line is unmasked. See
1175 * handle.c:irq_wake_thread() for further information.
1176 *
1177 * If no thread is woken by primary (hard irq context)
1178 * interrupt handlers, then desc->threads_active is
1179 * also checked for zero to unmask the irq line in the
1180 * affected hard irq flow handlers
1181 * (handle_[fasteoi|level]_irq).
1182 *
1183 * The new action gets the first zero bit of
1184 * thread_mask assigned. See the loop above which or's
1185 * all existing action->thread_mask bits.
1186 */
1187 new->thread_mask = 1 << ffz(thread_mask);
1c6c6952 1188
dc9b229a
TG
1189 } else if (new->handler == irq_default_primary_handler &&
1190 !(desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)) {
1c6c6952
TG
1191 /*
1192 * The interrupt was requested with handler = NULL, so
1193 * we use the default primary handler for it. But it
1194 * does not have the oneshot flag set. In combination
1195 * with level interrupts this is deadly, because the
1196 * default primary handler just wakes the thread, then
1197 * the irq lines is reenabled, but the device still
1198 * has the level irq asserted. Rinse and repeat....
1199 *
1200 * While this works for edge type interrupts, we play
1201 * it safe and reject unconditionally because we can't
1202 * say for sure which type this interrupt really
1203 * has. The type flags are unreliable as the
1204 * underlying chip implementation can override them.
1205 */
97fd75b7 1206 pr_err("Threaded irq requested with handler=NULL and !ONESHOT for irq %d\n",
1c6c6952
TG
1207 irq);
1208 ret = -EINVAL;
1209 goto out_mask;
b5faba21 1210 }
b5faba21 1211
1da177e4 1212 if (!shared) {
c1bacbae
TG
1213 ret = irq_request_resources(desc);
1214 if (ret) {
1215 pr_err("Failed to request resources for %s (irq %d) on irqchip %s\n",
1216 new->name, irq, desc->irq_data.chip->name);
1217 goto out_mask;
1218 }
1219
3aa551c9
TG
1220 init_waitqueue_head(&desc->wait_for_threads);
1221
e76de9f8 1222 /* Setup the type (level, edge polarity) if configured: */
3cca53b0 1223 if (new->flags & IRQF_TRIGGER_MASK) {
f2b662da
DB
1224 ret = __irq_set_trigger(desc, irq,
1225 new->flags & IRQF_TRIGGER_MASK);
82736f4d 1226
3aa551c9 1227 if (ret)
3b8249e7 1228 goto out_mask;
091738a2 1229 }
6a6de9ef 1230
009b4c3b 1231 desc->istate &= ~(IRQS_AUTODETECT | IRQS_SPURIOUS_DISABLED | \
32f4125e
TG
1232 IRQS_ONESHOT | IRQS_WAITING);
1233 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
94d39e1f 1234
a005677b
TG
1235 if (new->flags & IRQF_PERCPU) {
1236 irqd_set(&desc->irq_data, IRQD_PER_CPU);
1237 irq_settings_set_per_cpu(desc);
1238 }
6a58fb3b 1239
b25c340c 1240 if (new->flags & IRQF_ONESHOT)
3d67baec 1241 desc->istate |= IRQS_ONESHOT;
b25c340c 1242
1ccb4e61 1243 if (irq_settings_can_autoenable(desc))
b4bc724e 1244 irq_startup(desc, true);
46999238 1245 else
e76de9f8
TG
1246 /* Undo nested disables: */
1247 desc->depth = 1;
18404756 1248
612e3684 1249 /* Exclude IRQ from balancing if requested */
a005677b
TG
1250 if (new->flags & IRQF_NOBALANCING) {
1251 irq_settings_set_no_balancing(desc);
1252 irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
1253 }
612e3684 1254
18404756 1255 /* Set default affinity mask once everything is setup */
3b8249e7 1256 setup_affinity(irq, desc, mask);
0c5d1eb7 1257
876dbd4c
TG
1258 } else if (new->flags & IRQF_TRIGGER_MASK) {
1259 unsigned int nmsk = new->flags & IRQF_TRIGGER_MASK;
1260 unsigned int omsk = irq_settings_get_trigger_mask(desc);
1261
1262 if (nmsk != omsk)
1263 /* hope the handler works with current trigger mode */
97fd75b7 1264 pr_warning("irq %d uses trigger mode %u; requested %u\n",
876dbd4c 1265 irq, nmsk, omsk);
1da177e4 1266 }
82736f4d 1267
69ab8494 1268 new->irq = irq;
f17c7545 1269 *old_ptr = new;
82736f4d 1270
cab303be
TG
1271 irq_pm_install_action(desc, new);
1272
8528b0f1
LT
1273 /* Reset broken irq detection when installing new handler */
1274 desc->irq_count = 0;
1275 desc->irqs_unhandled = 0;
1adb0850
TG
1276
1277 /*
1278 * Check whether we disabled the irq via the spurious handler
1279 * before. Reenable it and give it another chance.
1280 */
7acdd53e
TG
1281 if (shared && (desc->istate & IRQS_SPURIOUS_DISABLED)) {
1282 desc->istate &= ~IRQS_SPURIOUS_DISABLED;
8df2e02c 1283 __enable_irq(desc, irq);
1adb0850
TG
1284 }
1285
239007b8 1286 raw_spin_unlock_irqrestore(&desc->lock, flags);
1da177e4 1287
69ab8494
TG
1288 /*
1289 * Strictly no need to wake it up, but hung_task complains
1290 * when no hard interrupt wakes the thread up.
1291 */
1292 if (new->thread)
1293 wake_up_process(new->thread);
1294
2c6927a3 1295 register_irq_proc(irq, desc);
1da177e4
LT
1296 new->dir = NULL;
1297 register_handler_proc(irq, new);
4f5058c3 1298 free_cpumask_var(mask);
1da177e4
LT
1299
1300 return 0;
f5163427
DS
1301
1302mismatch:
3cca53b0 1303 if (!(new->flags & IRQF_PROBE_SHARED)) {
97fd75b7 1304 pr_err("Flags mismatch irq %d. %08x (%s) vs. %08x (%s)\n",
f5d89470
TG
1305 irq, new->flags, new->name, old->flags, old->name);
1306#ifdef CONFIG_DEBUG_SHIRQ
13e87ec6 1307 dump_stack();
3f050447 1308#endif
f5d89470 1309 }
3aa551c9
TG
1310 ret = -EBUSY;
1311
3b8249e7 1312out_mask:
1c389795 1313 raw_spin_unlock_irqrestore(&desc->lock, flags);
3b8249e7
TG
1314 free_cpumask_var(mask);
1315
3aa551c9 1316out_thread:
3aa551c9
TG
1317 if (new->thread) {
1318 struct task_struct *t = new->thread;
1319
1320 new->thread = NULL;
05d74efa 1321 kthread_stop(t);
3aa551c9
TG
1322 put_task_struct(t);
1323 }
b6873807
SAS
1324out_mput:
1325 module_put(desc->owner);
3aa551c9 1326 return ret;
1da177e4
LT
1327}
1328
d3c60047
TG
1329/**
1330 * setup_irq - setup an interrupt
1331 * @irq: Interrupt line to setup
1332 * @act: irqaction for the interrupt
1333 *
1334 * Used to statically setup interrupts in the early boot process.
1335 */
1336int setup_irq(unsigned int irq, struct irqaction *act)
1337{
986c011d 1338 int retval;
d3c60047
TG
1339 struct irq_desc *desc = irq_to_desc(irq);
1340
31d9d9b6
MZ
1341 if (WARN_ON(irq_settings_is_per_cpu_devid(desc)))
1342 return -EINVAL;
986c011d
DD
1343 chip_bus_lock(desc);
1344 retval = __setup_irq(irq, desc, act);
1345 chip_bus_sync_unlock(desc);
1346
1347 return retval;
d3c60047 1348}
eb53b4e8 1349EXPORT_SYMBOL_GPL(setup_irq);
d3c60047 1350
31d9d9b6 1351/*
cbf94f06
MD
1352 * Internal function to unregister an irqaction - used to free
1353 * regular and special interrupts that are part of the architecture.
1da177e4 1354 */
cbf94f06 1355static struct irqaction *__free_irq(unsigned int irq, void *dev_id)
1da177e4 1356{
d3c60047 1357 struct irq_desc *desc = irq_to_desc(irq);
f17c7545 1358 struct irqaction *action, **action_ptr;
1da177e4
LT
1359 unsigned long flags;
1360
ae88a23b 1361 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
7d94f7ca 1362
7d94f7ca 1363 if (!desc)
f21cfb25 1364 return NULL;
1da177e4 1365
239007b8 1366 raw_spin_lock_irqsave(&desc->lock, flags);
ae88a23b
IM
1367
1368 /*
1369 * There can be multiple actions per IRQ descriptor, find the right
1370 * one based on the dev_id:
1371 */
f17c7545 1372 action_ptr = &desc->action;
1da177e4 1373 for (;;) {
f17c7545 1374 action = *action_ptr;
1da177e4 1375
ae88a23b
IM
1376 if (!action) {
1377 WARN(1, "Trying to free already-free IRQ %d\n", irq);
239007b8 1378 raw_spin_unlock_irqrestore(&desc->lock, flags);
1da177e4 1379
f21cfb25 1380 return NULL;
ae88a23b 1381 }
1da177e4 1382
8316e381
IM
1383 if (action->dev_id == dev_id)
1384 break;
f17c7545 1385 action_ptr = &action->next;
ae88a23b 1386 }
dbce706e 1387
ae88a23b 1388 /* Found it - now remove it from the list of entries: */
f17c7545 1389 *action_ptr = action->next;
ae88a23b 1390
cab303be
TG
1391 irq_pm_remove_action(desc, action);
1392
ae88a23b 1393 /* If this was the last handler, shut down the IRQ line: */
c1bacbae 1394 if (!desc->action) {
46999238 1395 irq_shutdown(desc);
c1bacbae
TG
1396 irq_release_resources(desc);
1397 }
3aa551c9 1398
e7a297b0
PWJ
1399#ifdef CONFIG_SMP
1400 /* make sure affinity_hint is cleaned up */
1401 if (WARN_ON_ONCE(desc->affinity_hint))
1402 desc->affinity_hint = NULL;
1403#endif
1404
239007b8 1405 raw_spin_unlock_irqrestore(&desc->lock, flags);
ae88a23b
IM
1406
1407 unregister_handler_proc(irq, action);
1408
1409 /* Make sure it's not being used on another CPU: */
1410 synchronize_irq(irq);
1da177e4 1411
70edcd77 1412#ifdef CONFIG_DEBUG_SHIRQ
ae88a23b
IM
1413 /*
1414 * It's a shared IRQ -- the driver ought to be prepared for an IRQ
1415 * event to happen even now it's being freed, so let's make sure that
1416 * is so by doing an extra call to the handler ....
1417 *
1418 * ( We do this after actually deregistering it, to make sure that a
1419 * 'real' IRQ doesn't run in * parallel with our fake. )
1420 */
1421 if (action->flags & IRQF_SHARED) {
1422 local_irq_save(flags);
1423 action->handler(irq, dev_id);
1424 local_irq_restore(flags);
1da177e4 1425 }
ae88a23b 1426#endif
2d860ad7
LT
1427
1428 if (action->thread) {
05d74efa 1429 kthread_stop(action->thread);
2d860ad7
LT
1430 put_task_struct(action->thread);
1431 }
1432
b6873807 1433 module_put(desc->owner);
f21cfb25
MD
1434 return action;
1435}
1436
cbf94f06
MD
1437/**
1438 * remove_irq - free an interrupt
1439 * @irq: Interrupt line to free
1440 * @act: irqaction for the interrupt
1441 *
1442 * Used to remove interrupts statically setup by the early boot process.
1443 */
1444void remove_irq(unsigned int irq, struct irqaction *act)
1445{
31d9d9b6
MZ
1446 struct irq_desc *desc = irq_to_desc(irq);
1447
1448 if (desc && !WARN_ON(irq_settings_is_per_cpu_devid(desc)))
1449 __free_irq(irq, act->dev_id);
cbf94f06 1450}
eb53b4e8 1451EXPORT_SYMBOL_GPL(remove_irq);
cbf94f06 1452
f21cfb25
MD
1453/**
1454 * free_irq - free an interrupt allocated with request_irq
1455 * @irq: Interrupt line to free
1456 * @dev_id: Device identity to free
1457 *
1458 * Remove an interrupt handler. The handler is removed and if the
1459 * interrupt line is no longer in use by any driver it is disabled.
1460 * On a shared IRQ the caller must ensure the interrupt is disabled
1461 * on the card it drives before calling this function. The function
1462 * does not return until any executing interrupts for this IRQ
1463 * have completed.
1464 *
1465 * This function must not be called from interrupt context.
1466 */
1467void free_irq(unsigned int irq, void *dev_id)
1468{
70aedd24
TG
1469 struct irq_desc *desc = irq_to_desc(irq);
1470
31d9d9b6 1471 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
70aedd24
TG
1472 return;
1473
cd7eab44
BH
1474#ifdef CONFIG_SMP
1475 if (WARN_ON(desc->affinity_notify))
1476 desc->affinity_notify = NULL;
1477#endif
1478
3876ec9e 1479 chip_bus_lock(desc);
cbf94f06 1480 kfree(__free_irq(irq, dev_id));
3876ec9e 1481 chip_bus_sync_unlock(desc);
1da177e4 1482}
1da177e4
LT
1483EXPORT_SYMBOL(free_irq);
1484
1485/**
3aa551c9 1486 * request_threaded_irq - allocate an interrupt line
1da177e4 1487 * @irq: Interrupt line to allocate
3aa551c9
TG
1488 * @handler: Function to be called when the IRQ occurs.
1489 * Primary handler for threaded interrupts
b25c340c
TG
1490 * If NULL and thread_fn != NULL the default
1491 * primary handler is installed
f48fe81e
TG
1492 * @thread_fn: Function called from the irq handler thread
1493 * If NULL, no irq thread is created
1da177e4
LT
1494 * @irqflags: Interrupt type flags
1495 * @devname: An ascii name for the claiming device
1496 * @dev_id: A cookie passed back to the handler function
1497 *
1498 * This call allocates interrupt resources and enables the
1499 * interrupt line and IRQ handling. From the point this
1500 * call is made your handler function may be invoked. Since
1501 * your handler function must clear any interrupt the board
1502 * raises, you must take care both to initialise your hardware
1503 * and to set up the interrupt handler in the right order.
1504 *
3aa551c9 1505 * If you want to set up a threaded irq handler for your device
6d21af4f 1506 * then you need to supply @handler and @thread_fn. @handler is
3aa551c9
TG
1507 * still called in hard interrupt context and has to check
1508 * whether the interrupt originates from the device. If yes it
1509 * needs to disable the interrupt on the device and return
39a2eddb 1510 * IRQ_WAKE_THREAD which will wake up the handler thread and run
3aa551c9
TG
1511 * @thread_fn. This split handler design is necessary to support
1512 * shared interrupts.
1513 *
1da177e4
LT
1514 * Dev_id must be globally unique. Normally the address of the
1515 * device data structure is used as the cookie. Since the handler
1516 * receives this value it makes sense to use it.
1517 *
1518 * If your interrupt is shared you must pass a non NULL dev_id
1519 * as this is required when freeing the interrupt.
1520 *
1521 * Flags:
1522 *
3cca53b0 1523 * IRQF_SHARED Interrupt is shared
0c5d1eb7 1524 * IRQF_TRIGGER_* Specify active edge(s) or level
1da177e4
LT
1525 *
1526 */
3aa551c9
TG
1527int request_threaded_irq(unsigned int irq, irq_handler_t handler,
1528 irq_handler_t thread_fn, unsigned long irqflags,
1529 const char *devname, void *dev_id)
1da177e4 1530{
06fcb0c6 1531 struct irqaction *action;
08678b08 1532 struct irq_desc *desc;
d3c60047 1533 int retval;
1da177e4
LT
1534
1535 /*
1536 * Sanity-check: shared interrupts must pass in a real dev-ID,
1537 * otherwise we'll have trouble later trying to figure out
1538 * which interrupt is which (messes up the interrupt freeing
1539 * logic etc).
17f48034
RW
1540 *
1541 * Also IRQF_COND_SUSPEND only makes sense for shared interrupts and
1542 * it cannot be set along with IRQF_NO_SUSPEND.
1da177e4 1543 */
17f48034
RW
1544 if (((irqflags & IRQF_SHARED) && !dev_id) ||
1545 (!(irqflags & IRQF_SHARED) && (irqflags & IRQF_COND_SUSPEND)) ||
1546 ((irqflags & IRQF_NO_SUSPEND) && (irqflags & IRQF_COND_SUSPEND)))
1da177e4 1547 return -EINVAL;
7d94f7ca 1548
cb5bc832 1549 desc = irq_to_desc(irq);
7d94f7ca 1550 if (!desc)
1da177e4 1551 return -EINVAL;
7d94f7ca 1552
31d9d9b6
MZ
1553 if (!irq_settings_can_request(desc) ||
1554 WARN_ON(irq_settings_is_per_cpu_devid(desc)))
6550c775 1555 return -EINVAL;
b25c340c
TG
1556
1557 if (!handler) {
1558 if (!thread_fn)
1559 return -EINVAL;
1560 handler = irq_default_primary_handler;
1561 }
1da177e4 1562
45535732 1563 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1da177e4
LT
1564 if (!action)
1565 return -ENOMEM;
1566
1567 action->handler = handler;
3aa551c9 1568 action->thread_fn = thread_fn;
1da177e4 1569 action->flags = irqflags;
1da177e4 1570 action->name = devname;
1da177e4
LT
1571 action->dev_id = dev_id;
1572
3876ec9e 1573 chip_bus_lock(desc);
d3c60047 1574 retval = __setup_irq(irq, desc, action);
3876ec9e 1575 chip_bus_sync_unlock(desc);
70aedd24 1576
377bf1e4
AV
1577 if (retval)
1578 kfree(action);
1579
6d83f94d 1580#ifdef CONFIG_DEBUG_SHIRQ_FIXME
6ce51c43 1581 if (!retval && (irqflags & IRQF_SHARED)) {
a304e1b8
DW
1582 /*
1583 * It's a shared IRQ -- the driver ought to be prepared for it
1584 * to happen immediately, so let's make sure....
377bf1e4
AV
1585 * We disable the irq to make sure that a 'real' IRQ doesn't
1586 * run in parallel with our fake.
a304e1b8 1587 */
59845b1f 1588 unsigned long flags;
a304e1b8 1589
377bf1e4 1590 disable_irq(irq);
59845b1f 1591 local_irq_save(flags);
377bf1e4 1592
59845b1f 1593 handler(irq, dev_id);
377bf1e4 1594
59845b1f 1595 local_irq_restore(flags);
377bf1e4 1596 enable_irq(irq);
a304e1b8
DW
1597 }
1598#endif
1da177e4
LT
1599 return retval;
1600}
3aa551c9 1601EXPORT_SYMBOL(request_threaded_irq);
ae731f8d
MZ
1602
1603/**
1604 * request_any_context_irq - allocate an interrupt line
1605 * @irq: Interrupt line to allocate
1606 * @handler: Function to be called when the IRQ occurs.
1607 * Threaded handler for threaded interrupts.
1608 * @flags: Interrupt type flags
1609 * @name: An ascii name for the claiming device
1610 * @dev_id: A cookie passed back to the handler function
1611 *
1612 * This call allocates interrupt resources and enables the
1613 * interrupt line and IRQ handling. It selects either a
1614 * hardirq or threaded handling method depending on the
1615 * context.
1616 *
1617 * On failure, it returns a negative value. On success,
1618 * it returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED.
1619 */
1620int request_any_context_irq(unsigned int irq, irq_handler_t handler,
1621 unsigned long flags, const char *name, void *dev_id)
1622{
1623 struct irq_desc *desc = irq_to_desc(irq);
1624 int ret;
1625
1626 if (!desc)
1627 return -EINVAL;
1628
1ccb4e61 1629 if (irq_settings_is_nested_thread(desc)) {
ae731f8d
MZ
1630 ret = request_threaded_irq(irq, NULL, handler,
1631 flags, name, dev_id);
1632 return !ret ? IRQC_IS_NESTED : ret;
1633 }
1634
1635 ret = request_irq(irq, handler, flags, name, dev_id);
1636 return !ret ? IRQC_IS_HARDIRQ : ret;
1637}
1638EXPORT_SYMBOL_GPL(request_any_context_irq);
31d9d9b6 1639
1e7c5fd2 1640void enable_percpu_irq(unsigned int irq, unsigned int type)
31d9d9b6
MZ
1641{
1642 unsigned int cpu = smp_processor_id();
1643 unsigned long flags;
1644 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1645
1646 if (!desc)
1647 return;
1648
1e7c5fd2
MZ
1649 type &= IRQ_TYPE_SENSE_MASK;
1650 if (type != IRQ_TYPE_NONE) {
1651 int ret;
1652
1653 ret = __irq_set_trigger(desc, irq, type);
1654
1655 if (ret) {
32cffdde 1656 WARN(1, "failed to set type for IRQ%d\n", irq);
1e7c5fd2
MZ
1657 goto out;
1658 }
1659 }
1660
31d9d9b6 1661 irq_percpu_enable(desc, cpu);
1e7c5fd2 1662out:
31d9d9b6
MZ
1663 irq_put_desc_unlock(desc, flags);
1664}
36a5df85 1665EXPORT_SYMBOL_GPL(enable_percpu_irq);
31d9d9b6
MZ
1666
1667void disable_percpu_irq(unsigned int irq)
1668{
1669 unsigned int cpu = smp_processor_id();
1670 unsigned long flags;
1671 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1672
1673 if (!desc)
1674 return;
1675
1676 irq_percpu_disable(desc, cpu);
1677 irq_put_desc_unlock(desc, flags);
1678}
36a5df85 1679EXPORT_SYMBOL_GPL(disable_percpu_irq);
31d9d9b6
MZ
1680
1681/*
1682 * Internal function to unregister a percpu irqaction.
1683 */
1684static struct irqaction *__free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1685{
1686 struct irq_desc *desc = irq_to_desc(irq);
1687 struct irqaction *action;
1688 unsigned long flags;
1689
1690 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
1691
1692 if (!desc)
1693 return NULL;
1694
1695 raw_spin_lock_irqsave(&desc->lock, flags);
1696
1697 action = desc->action;
1698 if (!action || action->percpu_dev_id != dev_id) {
1699 WARN(1, "Trying to free already-free IRQ %d\n", irq);
1700 goto bad;
1701 }
1702
1703 if (!cpumask_empty(desc->percpu_enabled)) {
1704 WARN(1, "percpu IRQ %d still enabled on CPU%d!\n",
1705 irq, cpumask_first(desc->percpu_enabled));
1706 goto bad;
1707 }
1708
1709 /* Found it - now remove it from the list of entries: */
1710 desc->action = NULL;
1711
1712 raw_spin_unlock_irqrestore(&desc->lock, flags);
1713
1714 unregister_handler_proc(irq, action);
1715
1716 module_put(desc->owner);
1717 return action;
1718
1719bad:
1720 raw_spin_unlock_irqrestore(&desc->lock, flags);
1721 return NULL;
1722}
1723
1724/**
1725 * remove_percpu_irq - free a per-cpu interrupt
1726 * @irq: Interrupt line to free
1727 * @act: irqaction for the interrupt
1728 *
1729 * Used to remove interrupts statically setup by the early boot process.
1730 */
1731void remove_percpu_irq(unsigned int irq, struct irqaction *act)
1732{
1733 struct irq_desc *desc = irq_to_desc(irq);
1734
1735 if (desc && irq_settings_is_per_cpu_devid(desc))
1736 __free_percpu_irq(irq, act->percpu_dev_id);
1737}
1738
1739/**
1740 * free_percpu_irq - free an interrupt allocated with request_percpu_irq
1741 * @irq: Interrupt line to free
1742 * @dev_id: Device identity to free
1743 *
1744 * Remove a percpu interrupt handler. The handler is removed, but
1745 * the interrupt line is not disabled. This must be done on each
1746 * CPU before calling this function. The function does not return
1747 * until any executing interrupts for this IRQ have completed.
1748 *
1749 * This function must not be called from interrupt context.
1750 */
1751void free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1752{
1753 struct irq_desc *desc = irq_to_desc(irq);
1754
1755 if (!desc || !irq_settings_is_per_cpu_devid(desc))
1756 return;
1757
1758 chip_bus_lock(desc);
1759 kfree(__free_percpu_irq(irq, dev_id));
1760 chip_bus_sync_unlock(desc);
1761}
1762
1763/**
1764 * setup_percpu_irq - setup a per-cpu interrupt
1765 * @irq: Interrupt line to setup
1766 * @act: irqaction for the interrupt
1767 *
1768 * Used to statically setup per-cpu interrupts in the early boot process.
1769 */
1770int setup_percpu_irq(unsigned int irq, struct irqaction *act)
1771{
1772 struct irq_desc *desc = irq_to_desc(irq);
1773 int retval;
1774
1775 if (!desc || !irq_settings_is_per_cpu_devid(desc))
1776 return -EINVAL;
1777 chip_bus_lock(desc);
1778 retval = __setup_irq(irq, desc, act);
1779 chip_bus_sync_unlock(desc);
1780
1781 return retval;
1782}
1783
1784/**
1785 * request_percpu_irq - allocate a percpu interrupt line
1786 * @irq: Interrupt line to allocate
1787 * @handler: Function to be called when the IRQ occurs.
1788 * @devname: An ascii name for the claiming device
1789 * @dev_id: A percpu cookie passed back to the handler function
1790 *
1791 * This call allocates interrupt resources, but doesn't
1792 * automatically enable the interrupt. It has to be done on each
1793 * CPU using enable_percpu_irq().
1794 *
1795 * Dev_id must be globally unique. It is a per-cpu variable, and
1796 * the handler gets called with the interrupted CPU's instance of
1797 * that variable.
1798 */
1799int request_percpu_irq(unsigned int irq, irq_handler_t handler,
1800 const char *devname, void __percpu *dev_id)
1801{
1802 struct irqaction *action;
1803 struct irq_desc *desc;
1804 int retval;
1805
1806 if (!dev_id)
1807 return -EINVAL;
1808
1809 desc = irq_to_desc(irq);
1810 if (!desc || !irq_settings_can_request(desc) ||
1811 !irq_settings_is_per_cpu_devid(desc))
1812 return -EINVAL;
1813
1814 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1815 if (!action)
1816 return -ENOMEM;
1817
1818 action->handler = handler;
2ed0e645 1819 action->flags = IRQF_PERCPU | IRQF_NO_SUSPEND;
31d9d9b6
MZ
1820 action->name = devname;
1821 action->percpu_dev_id = dev_id;
1822
1823 chip_bus_lock(desc);
1824 retval = __setup_irq(irq, desc, action);
1825 chip_bus_sync_unlock(desc);
1826
1827 if (retval)
1828 kfree(action);
1829
1830 return retval;
1831}
1b7047ed
MZ
1832
1833/**
1834 * irq_get_irqchip_state - returns the irqchip state of a interrupt.
1835 * @irq: Interrupt line that is forwarded to a VM
1836 * @which: One of IRQCHIP_STATE_* the caller wants to know about
1837 * @state: a pointer to a boolean where the state is to be storeed
1838 *
1839 * This call snapshots the internal irqchip state of an
1840 * interrupt, returning into @state the bit corresponding to
1841 * stage @which
1842 *
1843 * This function should be called with preemption disabled if the
1844 * interrupt controller has per-cpu registers.
1845 */
1846int irq_get_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
1847 bool *state)
1848{
1849 struct irq_desc *desc;
1850 struct irq_data *data;
1851 struct irq_chip *chip;
1852 unsigned long flags;
1853 int err = -EINVAL;
1854
1855 desc = irq_get_desc_buslock(irq, &flags, 0);
1856 if (!desc)
1857 return err;
1858
1859 data = irq_desc_get_irq_data(desc);
1860
1861 do {
1862 chip = irq_data_get_irq_chip(data);
1863 if (chip->irq_get_irqchip_state)
1864 break;
1865#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1866 data = data->parent_data;
1867#else
1868 data = NULL;
1869#endif
1870 } while (data);
1871
1872 if (data)
1873 err = chip->irq_get_irqchip_state(data, which, state);
1874
1875 irq_put_desc_busunlock(desc, flags);
1876 return err;
1877}
1878
1879/**
1880 * irq_set_irqchip_state - set the state of a forwarded interrupt.
1881 * @irq: Interrupt line that is forwarded to a VM
1882 * @which: State to be restored (one of IRQCHIP_STATE_*)
1883 * @val: Value corresponding to @which
1884 *
1885 * This call sets the internal irqchip state of an interrupt,
1886 * depending on the value of @which.
1887 *
1888 * This function should be called with preemption disabled if the
1889 * interrupt controller has per-cpu registers.
1890 */
1891int irq_set_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
1892 bool val)
1893{
1894 struct irq_desc *desc;
1895 struct irq_data *data;
1896 struct irq_chip *chip;
1897 unsigned long flags;
1898 int err = -EINVAL;
1899
1900 desc = irq_get_desc_buslock(irq, &flags, 0);
1901 if (!desc)
1902 return err;
1903
1904 data = irq_desc_get_irq_data(desc);
1905
1906 do {
1907 chip = irq_data_get_irq_chip(data);
1908 if (chip->irq_set_irqchip_state)
1909 break;
1910#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1911 data = data->parent_data;
1912#else
1913 data = NULL;
1914#endif
1915 } while (data);
1916
1917 if (data)
1918 err = chip->irq_set_irqchip_state(data, which, val);
1919
1920 irq_put_desc_busunlock(desc, flags);
1921 return err;
1922}
This page took 0.7605 seconds and 5 git commands to generate.