Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/kernel/irq/manage.c | |
3 | * | |
a34db9b2 IM |
4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar |
5 | * Copyright (C) 2005-2006 Thomas Gleixner | |
1da177e4 LT |
6 | * |
7 | * This file contains driver APIs to the irq subsystem. | |
8 | */ | |
9 | ||
10 | #include <linux/irq.h> | |
3aa551c9 | 11 | #include <linux/kthread.h> |
1da177e4 LT |
12 | #include <linux/module.h> |
13 | #include <linux/random.h> | |
14 | #include <linux/interrupt.h> | |
1aeb272c | 15 | #include <linux/slab.h> |
3aa551c9 | 16 | #include <linux/sched.h> |
1da177e4 LT |
17 | |
18 | #include "internals.h" | |
19 | ||
8d32a307 TG |
20 | #ifdef CONFIG_IRQ_FORCED_THREADING |
21 | __read_mostly bool force_irqthreads; | |
22 | ||
23 | static int __init setup_forced_irqthreads(char *arg) | |
24 | { | |
25 | force_irqthreads = true; | |
26 | return 0; | |
27 | } | |
28 | early_param("threadirqs", setup_forced_irqthreads); | |
29 | #endif | |
30 | ||
1da177e4 LT |
31 | /** |
32 | * synchronize_irq - wait for pending IRQ handlers (on other CPUs) | |
1e5d5331 | 33 | * @irq: interrupt number to wait for |
1da177e4 LT |
34 | * |
35 | * This function waits for any pending IRQ handlers for this interrupt | |
36 | * to complete before returning. If you use this function while | |
37 | * holding a resource the IRQ handler may need you will deadlock. | |
38 | * | |
39 | * This function may be called - with care - from IRQ context. | |
40 | */ | |
41 | void synchronize_irq(unsigned int irq) | |
42 | { | |
cb5bc832 | 43 | struct irq_desc *desc = irq_to_desc(irq); |
009b4c3b | 44 | unsigned int state; |
1da177e4 | 45 | |
7d94f7ca | 46 | if (!desc) |
c2b5a251 MW |
47 | return; |
48 | ||
a98ce5c6 HX |
49 | do { |
50 | unsigned long flags; | |
51 | ||
52 | /* | |
53 | * Wait until we're out of the critical section. This might | |
54 | * give the wrong answer due to the lack of memory barriers. | |
55 | */ | |
009b4c3b | 56 | while (desc->istate & IRQS_INPROGRESS) |
a98ce5c6 HX |
57 | cpu_relax(); |
58 | ||
59 | /* Ok, that indicated we're done: double-check carefully. */ | |
239007b8 | 60 | raw_spin_lock_irqsave(&desc->lock, flags); |
009b4c3b | 61 | state = desc->istate; |
239007b8 | 62 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
a98ce5c6 HX |
63 | |
64 | /* Oops, that failed? */ | |
009b4c3b | 65 | } while (state & IRQS_INPROGRESS); |
3aa551c9 TG |
66 | |
67 | /* | |
68 | * We made sure that no hardirq handler is running. Now verify | |
69 | * that no threaded handlers are active. | |
70 | */ | |
71 | wait_event(desc->wait_for_threads, !atomic_read(&desc->threads_active)); | |
1da177e4 | 72 | } |
1da177e4 LT |
73 | EXPORT_SYMBOL(synchronize_irq); |
74 | ||
3aa551c9 TG |
75 | #ifdef CONFIG_SMP |
76 | cpumask_var_t irq_default_affinity; | |
77 | ||
771ee3b0 TG |
78 | /** |
79 | * irq_can_set_affinity - Check if the affinity of a given irq can be set | |
80 | * @irq: Interrupt to check | |
81 | * | |
82 | */ | |
83 | int irq_can_set_affinity(unsigned int irq) | |
84 | { | |
08678b08 | 85 | struct irq_desc *desc = irq_to_desc(irq); |
771ee3b0 | 86 | |
bce43032 TG |
87 | if (!desc || !irqd_can_balance(&desc->irq_data) || |
88 | !desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity) | |
771ee3b0 TG |
89 | return 0; |
90 | ||
91 | return 1; | |
92 | } | |
93 | ||
591d2fb0 TG |
94 | /** |
95 | * irq_set_thread_affinity - Notify irq threads to adjust affinity | |
96 | * @desc: irq descriptor which has affitnity changed | |
97 | * | |
98 | * We just set IRQTF_AFFINITY and delegate the affinity setting | |
99 | * to the interrupt thread itself. We can not call | |
100 | * set_cpus_allowed_ptr() here as we hold desc->lock and this | |
101 | * code can be called from hard interrupt context. | |
102 | */ | |
103 | void irq_set_thread_affinity(struct irq_desc *desc) | |
3aa551c9 TG |
104 | { |
105 | struct irqaction *action = desc->action; | |
106 | ||
107 | while (action) { | |
108 | if (action->thread) | |
591d2fb0 | 109 | set_bit(IRQTF_AFFINITY, &action->thread_flags); |
3aa551c9 TG |
110 | action = action->next; |
111 | } | |
112 | } | |
113 | ||
1fa46f1f TG |
114 | #ifdef CONFIG_GENERIC_PENDING_IRQ |
115 | static inline bool irq_can_move_pcntxt(struct irq_desc *desc) | |
116 | { | |
1ccb4e61 | 117 | return irq_settings_can_move_pcntxt(desc); |
1fa46f1f TG |
118 | } |
119 | static inline bool irq_move_pending(struct irq_desc *desc) | |
120 | { | |
f230b6d5 | 121 | return irqd_is_setaffinity_pending(&desc->irq_data); |
1fa46f1f TG |
122 | } |
123 | static inline void | |
124 | irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask) | |
125 | { | |
126 | cpumask_copy(desc->pending_mask, mask); | |
127 | } | |
128 | static inline void | |
129 | irq_get_pending(struct cpumask *mask, struct irq_desc *desc) | |
130 | { | |
131 | cpumask_copy(mask, desc->pending_mask); | |
132 | } | |
133 | #else | |
134 | static inline bool irq_can_move_pcntxt(struct irq_desc *desc) { return true; } | |
135 | static inline bool irq_move_pending(struct irq_desc *desc) { return false; } | |
136 | static inline void | |
137 | irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask) { } | |
138 | static inline void | |
139 | irq_get_pending(struct cpumask *mask, struct irq_desc *desc) { } | |
140 | #endif | |
141 | ||
c2d0c555 | 142 | int __irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask) |
771ee3b0 | 143 | { |
c2d0c555 DD |
144 | struct irq_chip *chip = irq_data_get_irq_chip(data); |
145 | struct irq_desc *desc = irq_data_to_desc(data); | |
1fa46f1f | 146 | int ret = 0; |
771ee3b0 | 147 | |
c2d0c555 | 148 | if (!chip || !chip->irq_set_affinity) |
771ee3b0 TG |
149 | return -EINVAL; |
150 | ||
c2d0c555 DD |
151 | if (irqd_can_move_in_process_context(data)) { |
152 | ret = chip->irq_set_affinity(data, mask, false); | |
3b8249e7 TG |
153 | switch (ret) { |
154 | case IRQ_SET_MASK_OK: | |
c2d0c555 | 155 | cpumask_copy(data->affinity, mask); |
3b8249e7 | 156 | case IRQ_SET_MASK_OK_NOCOPY: |
591d2fb0 | 157 | irq_set_thread_affinity(desc); |
3b8249e7 | 158 | ret = 0; |
57b150cc | 159 | } |
1fa46f1f | 160 | } else { |
c2d0c555 | 161 | irqd_set_move_pending(data); |
1fa46f1f | 162 | irq_copy_pending(desc, mask); |
57b150cc | 163 | } |
1fa46f1f | 164 | |
cd7eab44 BH |
165 | if (desc->affinity_notify) { |
166 | kref_get(&desc->affinity_notify->kref); | |
167 | schedule_work(&desc->affinity_notify->work); | |
168 | } | |
2bdd1055 | 169 | irq_compat_set_affinity(desc); |
c2d0c555 DD |
170 | irqd_set(data, IRQD_AFFINITY_SET); |
171 | ||
172 | return ret; | |
173 | } | |
174 | ||
175 | /** | |
176 | * irq_set_affinity - Set the irq affinity of a given irq | |
177 | * @irq: Interrupt to set affinity | |
178 | * @cpumask: cpumask | |
179 | * | |
180 | */ | |
181 | int irq_set_affinity(unsigned int irq, const struct cpumask *mask) | |
182 | { | |
183 | struct irq_desc *desc = irq_to_desc(irq); | |
184 | unsigned long flags; | |
185 | int ret; | |
186 | ||
187 | if (!desc) | |
188 | return -EINVAL; | |
189 | ||
190 | raw_spin_lock_irqsave(&desc->lock, flags); | |
191 | ret = __irq_set_affinity_locked(irq_desc_get_irq_data(desc), mask); | |
239007b8 | 192 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
1fa46f1f | 193 | return ret; |
771ee3b0 TG |
194 | } |
195 | ||
e7a297b0 PWJ |
196 | int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m) |
197 | { | |
e7a297b0 | 198 | unsigned long flags; |
02725e74 | 199 | struct irq_desc *desc = irq_get_desc_lock(irq, &flags); |
e7a297b0 PWJ |
200 | |
201 | if (!desc) | |
202 | return -EINVAL; | |
e7a297b0 | 203 | desc->affinity_hint = m; |
02725e74 | 204 | irq_put_desc_unlock(desc, flags); |
e7a297b0 PWJ |
205 | return 0; |
206 | } | |
207 | EXPORT_SYMBOL_GPL(irq_set_affinity_hint); | |
208 | ||
cd7eab44 BH |
209 | static void irq_affinity_notify(struct work_struct *work) |
210 | { | |
211 | struct irq_affinity_notify *notify = | |
212 | container_of(work, struct irq_affinity_notify, work); | |
213 | struct irq_desc *desc = irq_to_desc(notify->irq); | |
214 | cpumask_var_t cpumask; | |
215 | unsigned long flags; | |
216 | ||
1fa46f1f | 217 | if (!desc || !alloc_cpumask_var(&cpumask, GFP_KERNEL)) |
cd7eab44 BH |
218 | goto out; |
219 | ||
220 | raw_spin_lock_irqsave(&desc->lock, flags); | |
1fa46f1f TG |
221 | if (irq_move_pending(desc)) |
222 | irq_get_pending(cpumask, desc); | |
cd7eab44 | 223 | else |
1fb0ef31 | 224 | cpumask_copy(cpumask, desc->irq_data.affinity); |
cd7eab44 BH |
225 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
226 | ||
227 | notify->notify(notify, cpumask); | |
228 | ||
229 | free_cpumask_var(cpumask); | |
230 | out: | |
231 | kref_put(¬ify->kref, notify->release); | |
232 | } | |
233 | ||
234 | /** | |
235 | * irq_set_affinity_notifier - control notification of IRQ affinity changes | |
236 | * @irq: Interrupt for which to enable/disable notification | |
237 | * @notify: Context for notification, or %NULL to disable | |
238 | * notification. Function pointers must be initialised; | |
239 | * the other fields will be initialised by this function. | |
240 | * | |
241 | * Must be called in process context. Notification may only be enabled | |
242 | * after the IRQ is allocated and must be disabled before the IRQ is | |
243 | * freed using free_irq(). | |
244 | */ | |
245 | int | |
246 | irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify) | |
247 | { | |
248 | struct irq_desc *desc = irq_to_desc(irq); | |
249 | struct irq_affinity_notify *old_notify; | |
250 | unsigned long flags; | |
251 | ||
252 | /* The release function is promised process context */ | |
253 | might_sleep(); | |
254 | ||
255 | if (!desc) | |
256 | return -EINVAL; | |
257 | ||
258 | /* Complete initialisation of *notify */ | |
259 | if (notify) { | |
260 | notify->irq = irq; | |
261 | kref_init(¬ify->kref); | |
262 | INIT_WORK(¬ify->work, irq_affinity_notify); | |
263 | } | |
264 | ||
265 | raw_spin_lock_irqsave(&desc->lock, flags); | |
266 | old_notify = desc->affinity_notify; | |
267 | desc->affinity_notify = notify; | |
268 | raw_spin_unlock_irqrestore(&desc->lock, flags); | |
269 | ||
270 | if (old_notify) | |
271 | kref_put(&old_notify->kref, old_notify->release); | |
272 | ||
273 | return 0; | |
274 | } | |
275 | EXPORT_SYMBOL_GPL(irq_set_affinity_notifier); | |
276 | ||
18404756 MK |
277 | #ifndef CONFIG_AUTO_IRQ_AFFINITY |
278 | /* | |
279 | * Generic version of the affinity autoselector. | |
280 | */ | |
3b8249e7 TG |
281 | static int |
282 | setup_affinity(unsigned int irq, struct irq_desc *desc, struct cpumask *mask) | |
18404756 | 283 | { |
35e857cb | 284 | struct irq_chip *chip = irq_desc_get_chip(desc); |
569bda8d | 285 | struct cpumask *set = irq_default_affinity; |
3b8249e7 | 286 | int ret; |
569bda8d | 287 | |
b008207c | 288 | /* Excludes PER_CPU and NO_BALANCE interrupts */ |
18404756 MK |
289 | if (!irq_can_set_affinity(irq)) |
290 | return 0; | |
291 | ||
f6d87f4b TG |
292 | /* |
293 | * Preserve an userspace affinity setup, but make sure that | |
294 | * one of the targets is online. | |
295 | */ | |
2bdd1055 | 296 | if (irqd_has_set(&desc->irq_data, IRQD_AFFINITY_SET)) { |
569bda8d TG |
297 | if (cpumask_intersects(desc->irq_data.affinity, |
298 | cpu_online_mask)) | |
299 | set = desc->irq_data.affinity; | |
2bdd1055 TG |
300 | else { |
301 | irq_compat_clr_affinity(desc); | |
302 | irqd_clear(&desc->irq_data, IRQD_AFFINITY_SET); | |
303 | } | |
f6d87f4b | 304 | } |
18404756 | 305 | |
3b8249e7 TG |
306 | cpumask_and(mask, cpu_online_mask, set); |
307 | ret = chip->irq_set_affinity(&desc->irq_data, mask, false); | |
308 | switch (ret) { | |
309 | case IRQ_SET_MASK_OK: | |
310 | cpumask_copy(desc->irq_data.affinity, mask); | |
311 | case IRQ_SET_MASK_OK_NOCOPY: | |
312 | irq_set_thread_affinity(desc); | |
313 | } | |
18404756 MK |
314 | return 0; |
315 | } | |
f6d87f4b | 316 | #else |
3b8249e7 TG |
317 | static inline int |
318 | setup_affinity(unsigned int irq, struct irq_desc *d, struct cpumask *mask) | |
f6d87f4b TG |
319 | { |
320 | return irq_select_affinity(irq); | |
321 | } | |
18404756 MK |
322 | #endif |
323 | ||
f6d87f4b TG |
324 | /* |
325 | * Called when affinity is set via /proc/irq | |
326 | */ | |
3b8249e7 | 327 | int irq_select_affinity_usr(unsigned int irq, struct cpumask *mask) |
f6d87f4b TG |
328 | { |
329 | struct irq_desc *desc = irq_to_desc(irq); | |
330 | unsigned long flags; | |
331 | int ret; | |
332 | ||
239007b8 | 333 | raw_spin_lock_irqsave(&desc->lock, flags); |
3b8249e7 | 334 | ret = setup_affinity(irq, desc, mask); |
239007b8 | 335 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
f6d87f4b TG |
336 | return ret; |
337 | } | |
338 | ||
339 | #else | |
3b8249e7 TG |
340 | static inline int |
341 | setup_affinity(unsigned int irq, struct irq_desc *desc, struct cpumask *mask) | |
f6d87f4b TG |
342 | { |
343 | return 0; | |
344 | } | |
1da177e4 LT |
345 | #endif |
346 | ||
0a0c5168 RW |
347 | void __disable_irq(struct irq_desc *desc, unsigned int irq, bool suspend) |
348 | { | |
349 | if (suspend) { | |
685fd0b4 | 350 | if (!desc->action || (desc->action->flags & IRQF_NO_SUSPEND)) |
0a0c5168 | 351 | return; |
c531e836 | 352 | desc->istate |= IRQS_SUSPENDED; |
0a0c5168 RW |
353 | } |
354 | ||
3aae994f | 355 | if (!desc->depth++) |
87923470 | 356 | irq_disable(desc); |
0a0c5168 RW |
357 | } |
358 | ||
02725e74 TG |
359 | static int __disable_irq_nosync(unsigned int irq) |
360 | { | |
361 | unsigned long flags; | |
362 | struct irq_desc *desc = irq_get_desc_buslock(irq, &flags); | |
363 | ||
364 | if (!desc) | |
365 | return -EINVAL; | |
366 | __disable_irq(desc, irq, false); | |
367 | irq_put_desc_busunlock(desc, flags); | |
368 | return 0; | |
369 | } | |
370 | ||
1da177e4 LT |
371 | /** |
372 | * disable_irq_nosync - disable an irq without waiting | |
373 | * @irq: Interrupt to disable | |
374 | * | |
375 | * Disable the selected interrupt line. Disables and Enables are | |
376 | * nested. | |
377 | * Unlike disable_irq(), this function does not ensure existing | |
378 | * instances of the IRQ handler have completed before returning. | |
379 | * | |
380 | * This function may be called from IRQ context. | |
381 | */ | |
382 | void disable_irq_nosync(unsigned int irq) | |
383 | { | |
02725e74 | 384 | __disable_irq_nosync(irq); |
1da177e4 | 385 | } |
1da177e4 LT |
386 | EXPORT_SYMBOL(disable_irq_nosync); |
387 | ||
388 | /** | |
389 | * disable_irq - disable an irq and wait for completion | |
390 | * @irq: Interrupt to disable | |
391 | * | |
392 | * Disable the selected interrupt line. Enables and Disables are | |
393 | * nested. | |
394 | * This function waits for any pending IRQ handlers for this interrupt | |
395 | * to complete before returning. If you use this function while | |
396 | * holding a resource the IRQ handler may need you will deadlock. | |
397 | * | |
398 | * This function may be called - with care - from IRQ context. | |
399 | */ | |
400 | void disable_irq(unsigned int irq) | |
401 | { | |
02725e74 | 402 | if (!__disable_irq_nosync(irq)) |
1da177e4 LT |
403 | synchronize_irq(irq); |
404 | } | |
1da177e4 LT |
405 | EXPORT_SYMBOL(disable_irq); |
406 | ||
0a0c5168 | 407 | void __enable_irq(struct irq_desc *desc, unsigned int irq, bool resume) |
1adb0850 | 408 | { |
dc5f219e | 409 | if (resume) { |
c531e836 | 410 | if (!(desc->istate & IRQS_SUSPENDED)) { |
dc5f219e TG |
411 | if (!desc->action) |
412 | return; | |
413 | if (!(desc->action->flags & IRQF_FORCE_RESUME)) | |
414 | return; | |
415 | /* Pretend that it got disabled ! */ | |
416 | desc->depth++; | |
417 | } | |
c531e836 | 418 | desc->istate &= ~IRQS_SUSPENDED; |
dc5f219e | 419 | } |
0a0c5168 | 420 | |
1adb0850 TG |
421 | switch (desc->depth) { |
422 | case 0: | |
0a0c5168 | 423 | err_out: |
b8c512f6 | 424 | WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n", irq); |
1adb0850 TG |
425 | break; |
426 | case 1: { | |
c531e836 | 427 | if (desc->istate & IRQS_SUSPENDED) |
0a0c5168 | 428 | goto err_out; |
1adb0850 | 429 | /* Prevent probing on this irq: */ |
1ccb4e61 | 430 | irq_settings_set_noprobe(desc); |
3aae994f | 431 | irq_enable(desc); |
1adb0850 TG |
432 | check_irq_resend(desc, irq); |
433 | /* fall-through */ | |
434 | } | |
435 | default: | |
436 | desc->depth--; | |
437 | } | |
438 | } | |
439 | ||
1da177e4 LT |
440 | /** |
441 | * enable_irq - enable handling of an irq | |
442 | * @irq: Interrupt to enable | |
443 | * | |
444 | * Undoes the effect of one call to disable_irq(). If this | |
445 | * matches the last disable, processing of interrupts on this | |
446 | * IRQ line is re-enabled. | |
447 | * | |
70aedd24 | 448 | * This function may be called from IRQ context only when |
6b8ff312 | 449 | * desc->irq_data.chip->bus_lock and desc->chip->bus_sync_unlock are NULL ! |
1da177e4 LT |
450 | */ |
451 | void enable_irq(unsigned int irq) | |
452 | { | |
1da177e4 | 453 | unsigned long flags; |
02725e74 | 454 | struct irq_desc *desc = irq_get_desc_buslock(irq, &flags); |
1da177e4 | 455 | |
7d94f7ca | 456 | if (!desc) |
c2b5a251 | 457 | return; |
50f7c032 TG |
458 | if (WARN(!desc->irq_data.chip, |
459 | KERN_ERR "enable_irq before setup/request_irq: irq %u\n", irq)) | |
02725e74 | 460 | goto out; |
2656c366 | 461 | |
0a0c5168 | 462 | __enable_irq(desc, irq, false); |
02725e74 TG |
463 | out: |
464 | irq_put_desc_busunlock(desc, flags); | |
1da177e4 | 465 | } |
1da177e4 LT |
466 | EXPORT_SYMBOL(enable_irq); |
467 | ||
0c5d1eb7 | 468 | static int set_irq_wake_real(unsigned int irq, unsigned int on) |
2db87321 | 469 | { |
08678b08 | 470 | struct irq_desc *desc = irq_to_desc(irq); |
2db87321 UKK |
471 | int ret = -ENXIO; |
472 | ||
2f7e99bb TG |
473 | if (desc->irq_data.chip->irq_set_wake) |
474 | ret = desc->irq_data.chip->irq_set_wake(&desc->irq_data, on); | |
2db87321 UKK |
475 | |
476 | return ret; | |
477 | } | |
478 | ||
ba9a2331 | 479 | /** |
a0cd9ca2 | 480 | * irq_set_irq_wake - control irq power management wakeup |
ba9a2331 TG |
481 | * @irq: interrupt to control |
482 | * @on: enable/disable power management wakeup | |
483 | * | |
15a647eb DB |
484 | * Enable/disable power management wakeup mode, which is |
485 | * disabled by default. Enables and disables must match, | |
486 | * just as they match for non-wakeup mode support. | |
487 | * | |
488 | * Wakeup mode lets this IRQ wake the system from sleep | |
489 | * states like "suspend to RAM". | |
ba9a2331 | 490 | */ |
a0cd9ca2 | 491 | int irq_set_irq_wake(unsigned int irq, unsigned int on) |
ba9a2331 | 492 | { |
ba9a2331 | 493 | unsigned long flags; |
02725e74 | 494 | struct irq_desc *desc = irq_get_desc_buslock(irq, &flags); |
2db87321 | 495 | int ret = 0; |
ba9a2331 | 496 | |
15a647eb DB |
497 | /* wakeup-capable irqs can be shared between drivers that |
498 | * don't need to have the same sleep mode behaviors. | |
499 | */ | |
15a647eb | 500 | if (on) { |
2db87321 UKK |
501 | if (desc->wake_depth++ == 0) { |
502 | ret = set_irq_wake_real(irq, on); | |
503 | if (ret) | |
504 | desc->wake_depth = 0; | |
505 | else | |
7f94226f | 506 | irqd_set(&desc->irq_data, IRQD_WAKEUP_STATE); |
2db87321 | 507 | } |
15a647eb DB |
508 | } else { |
509 | if (desc->wake_depth == 0) { | |
7a2c4770 | 510 | WARN(1, "Unbalanced IRQ %d wake disable\n", irq); |
2db87321 UKK |
511 | } else if (--desc->wake_depth == 0) { |
512 | ret = set_irq_wake_real(irq, on); | |
513 | if (ret) | |
514 | desc->wake_depth = 1; | |
515 | else | |
7f94226f | 516 | irqd_clear(&desc->irq_data, IRQD_WAKEUP_STATE); |
2db87321 | 517 | } |
15a647eb | 518 | } |
02725e74 | 519 | irq_put_desc_busunlock(desc, flags); |
ba9a2331 TG |
520 | return ret; |
521 | } | |
a0cd9ca2 | 522 | EXPORT_SYMBOL(irq_set_irq_wake); |
ba9a2331 | 523 | |
1da177e4 LT |
524 | /* |
525 | * Internal function that tells the architecture code whether a | |
526 | * particular irq has been exclusively allocated or is available | |
527 | * for driver use. | |
528 | */ | |
529 | int can_request_irq(unsigned int irq, unsigned long irqflags) | |
530 | { | |
cc8c3b78 | 531 | unsigned long flags; |
02725e74 TG |
532 | struct irq_desc *desc = irq_get_desc_lock(irq, &flags); |
533 | int canrequest = 0; | |
1da177e4 | 534 | |
7d94f7ca YL |
535 | if (!desc) |
536 | return 0; | |
537 | ||
02725e74 TG |
538 | if (irq_settings_can_request(desc)) { |
539 | if (desc->action) | |
540 | if (irqflags & desc->action->flags & IRQF_SHARED) | |
541 | canrequest =1; | |
542 | } | |
543 | irq_put_desc_unlock(desc, flags); | |
544 | return canrequest; | |
1da177e4 LT |
545 | } |
546 | ||
0c5d1eb7 | 547 | int __irq_set_trigger(struct irq_desc *desc, unsigned int irq, |
b2ba2c30 | 548 | unsigned long flags) |
82736f4d | 549 | { |
6b8ff312 | 550 | struct irq_chip *chip = desc->irq_data.chip; |
d4d5e089 | 551 | int ret, unmask = 0; |
82736f4d | 552 | |
b2ba2c30 | 553 | if (!chip || !chip->irq_set_type) { |
82736f4d UKK |
554 | /* |
555 | * IRQF_TRIGGER_* but the PIC does not support multiple | |
556 | * flow-types? | |
557 | */ | |
3ff68a6a | 558 | pr_debug("No set_type function for IRQ %d (%s)\n", irq, |
82736f4d UKK |
559 | chip ? (chip->name ? : "unknown") : "unknown"); |
560 | return 0; | |
561 | } | |
562 | ||
876dbd4c | 563 | flags &= IRQ_TYPE_SENSE_MASK; |
d4d5e089 TG |
564 | |
565 | if (chip->flags & IRQCHIP_SET_TYPE_MASKED) { | |
566 | if (!(desc->istate & IRQS_MASKED)) | |
567 | mask_irq(desc); | |
568 | if (!(desc->istate & IRQS_DISABLED)) | |
569 | unmask = 1; | |
570 | } | |
571 | ||
f2b662da | 572 | /* caller masked out all except trigger mode flags */ |
b2ba2c30 | 573 | ret = chip->irq_set_type(&desc->irq_data, flags); |
82736f4d | 574 | |
876dbd4c TG |
575 | switch (ret) { |
576 | case IRQ_SET_MASK_OK: | |
577 | irqd_clear(&desc->irq_data, IRQD_TRIGGER_MASK); | |
578 | irqd_set(&desc->irq_data, flags); | |
579 | ||
580 | case IRQ_SET_MASK_OK_NOCOPY: | |
581 | flags = irqd_get_trigger_type(&desc->irq_data); | |
582 | irq_settings_set_trigger_mask(desc, flags); | |
583 | irqd_clear(&desc->irq_data, IRQD_LEVEL); | |
584 | irq_settings_clr_level(desc); | |
585 | if (flags & IRQ_TYPE_LEVEL_MASK) { | |
586 | irq_settings_set_level(desc); | |
587 | irqd_set(&desc->irq_data, IRQD_LEVEL); | |
588 | } | |
46732475 | 589 | |
6b8ff312 TG |
590 | if (chip != desc->irq_data.chip) |
591 | irq_chip_set_defaults(desc->irq_data.chip); | |
d4d5e089 | 592 | ret = 0; |
8fff39e0 | 593 | break; |
876dbd4c TG |
594 | default: |
595 | pr_err("setting trigger mode %lu for irq %u failed (%pF)\n", | |
596 | flags, irq, chip->irq_set_type); | |
0c5d1eb7 | 597 | } |
d4d5e089 TG |
598 | if (unmask) |
599 | unmask_irq(desc); | |
82736f4d UKK |
600 | return ret; |
601 | } | |
602 | ||
b25c340c TG |
603 | /* |
604 | * Default primary interrupt handler for threaded interrupts. Is | |
605 | * assigned as primary handler when request_threaded_irq is called | |
606 | * with handler == NULL. Useful for oneshot interrupts. | |
607 | */ | |
608 | static irqreturn_t irq_default_primary_handler(int irq, void *dev_id) | |
609 | { | |
610 | return IRQ_WAKE_THREAD; | |
611 | } | |
612 | ||
399b5da2 TG |
613 | /* |
614 | * Primary handler for nested threaded interrupts. Should never be | |
615 | * called. | |
616 | */ | |
617 | static irqreturn_t irq_nested_primary_handler(int irq, void *dev_id) | |
618 | { | |
619 | WARN(1, "Primary handler called for nested irq %d\n", irq); | |
620 | return IRQ_NONE; | |
621 | } | |
622 | ||
3aa551c9 TG |
623 | static int irq_wait_for_interrupt(struct irqaction *action) |
624 | { | |
625 | while (!kthread_should_stop()) { | |
626 | set_current_state(TASK_INTERRUPTIBLE); | |
f48fe81e TG |
627 | |
628 | if (test_and_clear_bit(IRQTF_RUNTHREAD, | |
629 | &action->thread_flags)) { | |
3aa551c9 TG |
630 | __set_current_state(TASK_RUNNING); |
631 | return 0; | |
f48fe81e TG |
632 | } |
633 | schedule(); | |
3aa551c9 TG |
634 | } |
635 | return -1; | |
636 | } | |
637 | ||
b25c340c TG |
638 | /* |
639 | * Oneshot interrupts keep the irq line masked until the threaded | |
640 | * handler finished. unmask if the interrupt has not been disabled and | |
641 | * is marked MASKED. | |
642 | */ | |
b5faba21 TG |
643 | static void irq_finalize_oneshot(struct irq_desc *desc, |
644 | struct irqaction *action, bool force) | |
b25c340c | 645 | { |
b5faba21 TG |
646 | if (!(desc->istate & IRQS_ONESHOT)) |
647 | return; | |
0b1adaa0 | 648 | again: |
3876ec9e | 649 | chip_bus_lock(desc); |
239007b8 | 650 | raw_spin_lock_irq(&desc->lock); |
0b1adaa0 TG |
651 | |
652 | /* | |
653 | * Implausible though it may be we need to protect us against | |
654 | * the following scenario: | |
655 | * | |
656 | * The thread is faster done than the hard interrupt handler | |
657 | * on the other CPU. If we unmask the irq line then the | |
658 | * interrupt can come in again and masks the line, leaves due | |
009b4c3b | 659 | * to IRQS_INPROGRESS and the irq line is masked forever. |
b5faba21 TG |
660 | * |
661 | * This also serializes the state of shared oneshot handlers | |
662 | * versus "desc->threads_onehsot |= action->thread_mask;" in | |
663 | * irq_wake_thread(). See the comment there which explains the | |
664 | * serialization. | |
0b1adaa0 | 665 | */ |
009b4c3b | 666 | if (unlikely(desc->istate & IRQS_INPROGRESS)) { |
0b1adaa0 | 667 | raw_spin_unlock_irq(&desc->lock); |
3876ec9e | 668 | chip_bus_sync_unlock(desc); |
0b1adaa0 TG |
669 | cpu_relax(); |
670 | goto again; | |
671 | } | |
672 | ||
b5faba21 TG |
673 | /* |
674 | * Now check again, whether the thread should run. Otherwise | |
675 | * we would clear the threads_oneshot bit of this thread which | |
676 | * was just set. | |
677 | */ | |
678 | if (!force && test_bit(IRQTF_RUNTHREAD, &action->thread_flags)) | |
679 | goto out_unlock; | |
680 | ||
681 | desc->threads_oneshot &= ~action->thread_mask; | |
682 | ||
683 | if (!desc->threads_oneshot && !(desc->istate & IRQS_DISABLED) && | |
684 | (desc->istate & IRQS_MASKED)) { | |
6e40262e TG |
685 | irq_compat_clr_masked(desc); |
686 | desc->istate &= ~IRQS_MASKED; | |
0eda58b7 | 687 | desc->irq_data.chip->irq_unmask(&desc->irq_data); |
b25c340c | 688 | } |
b5faba21 | 689 | out_unlock: |
239007b8 | 690 | raw_spin_unlock_irq(&desc->lock); |
3876ec9e | 691 | chip_bus_sync_unlock(desc); |
b25c340c TG |
692 | } |
693 | ||
61f38261 | 694 | #ifdef CONFIG_SMP |
591d2fb0 | 695 | /* |
d4d5e089 | 696 | * Check whether we need to chasnge the affinity of the interrupt thread. |
591d2fb0 TG |
697 | */ |
698 | static void | |
699 | irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) | |
700 | { | |
701 | cpumask_var_t mask; | |
702 | ||
703 | if (!test_and_clear_bit(IRQTF_AFFINITY, &action->thread_flags)) | |
704 | return; | |
705 | ||
706 | /* | |
707 | * In case we are out of memory we set IRQTF_AFFINITY again and | |
708 | * try again next time | |
709 | */ | |
710 | if (!alloc_cpumask_var(&mask, GFP_KERNEL)) { | |
711 | set_bit(IRQTF_AFFINITY, &action->thread_flags); | |
712 | return; | |
713 | } | |
714 | ||
239007b8 | 715 | raw_spin_lock_irq(&desc->lock); |
6b8ff312 | 716 | cpumask_copy(mask, desc->irq_data.affinity); |
239007b8 | 717 | raw_spin_unlock_irq(&desc->lock); |
591d2fb0 TG |
718 | |
719 | set_cpus_allowed_ptr(current, mask); | |
720 | free_cpumask_var(mask); | |
721 | } | |
61f38261 BP |
722 | #else |
723 | static inline void | |
724 | irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) { } | |
725 | #endif | |
591d2fb0 | 726 | |
8d32a307 TG |
727 | /* |
728 | * Interrupts which are not explicitely requested as threaded | |
729 | * interrupts rely on the implicit bh/preempt disable of the hard irq | |
730 | * context. So we need to disable bh here to avoid deadlocks and other | |
731 | * side effects. | |
732 | */ | |
733 | static void | |
734 | irq_forced_thread_fn(struct irq_desc *desc, struct irqaction *action) | |
735 | { | |
736 | local_bh_disable(); | |
737 | action->thread_fn(action->irq, action->dev_id); | |
738 | irq_finalize_oneshot(desc, action, false); | |
739 | local_bh_enable(); | |
740 | } | |
741 | ||
742 | /* | |
743 | * Interrupts explicitely requested as threaded interupts want to be | |
744 | * preemtible - many of them need to sleep and wait for slow busses to | |
745 | * complete. | |
746 | */ | |
747 | static void irq_thread_fn(struct irq_desc *desc, struct irqaction *action) | |
748 | { | |
749 | action->thread_fn(action->irq, action->dev_id); | |
750 | irq_finalize_oneshot(desc, action, false); | |
751 | } | |
752 | ||
3aa551c9 TG |
753 | /* |
754 | * Interrupt handler thread | |
755 | */ | |
756 | static int irq_thread(void *data) | |
757 | { | |
c9b5f501 | 758 | static const struct sched_param param = { |
fe7de49f KM |
759 | .sched_priority = MAX_USER_RT_PRIO/2, |
760 | }; | |
3aa551c9 TG |
761 | struct irqaction *action = data; |
762 | struct irq_desc *desc = irq_to_desc(action->irq); | |
8d32a307 | 763 | void (*handler_fn)(struct irq_desc *desc, struct irqaction *action); |
b5faba21 | 764 | int wake; |
3aa551c9 | 765 | |
8d32a307 TG |
766 | if (force_irqthreads & test_bit(IRQTF_FORCED_THREAD, |
767 | &action->thread_flags)) | |
768 | handler_fn = irq_forced_thread_fn; | |
769 | else | |
770 | handler_fn = irq_thread_fn; | |
771 | ||
3aa551c9 TG |
772 | sched_setscheduler(current, SCHED_FIFO, ¶m); |
773 | current->irqaction = action; | |
774 | ||
775 | while (!irq_wait_for_interrupt(action)) { | |
776 | ||
591d2fb0 TG |
777 | irq_thread_check_affinity(desc, action); |
778 | ||
3aa551c9 TG |
779 | atomic_inc(&desc->threads_active); |
780 | ||
239007b8 | 781 | raw_spin_lock_irq(&desc->lock); |
c1594b77 | 782 | if (unlikely(desc->istate & IRQS_DISABLED)) { |
3aa551c9 TG |
783 | /* |
784 | * CHECKME: We might need a dedicated | |
785 | * IRQ_THREAD_PENDING flag here, which | |
786 | * retriggers the thread in check_irq_resend() | |
2a0d6fb3 | 787 | * but AFAICT IRQS_PENDING should be fine as it |
3aa551c9 TG |
788 | * retriggers the interrupt itself --- tglx |
789 | */ | |
2a0d6fb3 TG |
790 | irq_compat_set_pending(desc); |
791 | desc->istate |= IRQS_PENDING; | |
239007b8 | 792 | raw_spin_unlock_irq(&desc->lock); |
3aa551c9 | 793 | } else { |
239007b8 | 794 | raw_spin_unlock_irq(&desc->lock); |
8d32a307 | 795 | handler_fn(desc, action); |
3aa551c9 TG |
796 | } |
797 | ||
798 | wake = atomic_dec_and_test(&desc->threads_active); | |
799 | ||
800 | if (wake && waitqueue_active(&desc->wait_for_threads)) | |
801 | wake_up(&desc->wait_for_threads); | |
802 | } | |
803 | ||
b5faba21 TG |
804 | /* Prevent a stale desc->threads_oneshot */ |
805 | irq_finalize_oneshot(desc, action, true); | |
806 | ||
3aa551c9 TG |
807 | /* |
808 | * Clear irqaction. Otherwise exit_irq_thread() would make | |
809 | * fuzz about an active irq thread going into nirvana. | |
810 | */ | |
811 | current->irqaction = NULL; | |
812 | return 0; | |
813 | } | |
814 | ||
815 | /* | |
816 | * Called from do_exit() | |
817 | */ | |
818 | void exit_irq_thread(void) | |
819 | { | |
820 | struct task_struct *tsk = current; | |
b5faba21 | 821 | struct irq_desc *desc; |
3aa551c9 TG |
822 | |
823 | if (!tsk->irqaction) | |
824 | return; | |
825 | ||
826 | printk(KERN_ERR | |
827 | "exiting task \"%s\" (%d) is an active IRQ thread (irq %d)\n", | |
828 | tsk->comm ? tsk->comm : "", tsk->pid, tsk->irqaction->irq); | |
829 | ||
b5faba21 TG |
830 | desc = irq_to_desc(tsk->irqaction->irq); |
831 | ||
832 | /* | |
833 | * Prevent a stale desc->threads_oneshot. Must be called | |
834 | * before setting the IRQTF_DIED flag. | |
835 | */ | |
836 | irq_finalize_oneshot(desc, tsk->irqaction, true); | |
837 | ||
3aa551c9 TG |
838 | /* |
839 | * Set the THREAD DIED flag to prevent further wakeups of the | |
840 | * soon to be gone threaded handler. | |
841 | */ | |
842 | set_bit(IRQTF_DIED, &tsk->irqaction->flags); | |
843 | } | |
844 | ||
8d32a307 TG |
845 | static void irq_setup_forced_threading(struct irqaction *new) |
846 | { | |
847 | if (!force_irqthreads) | |
848 | return; | |
849 | if (new->flags & (IRQF_NO_THREAD | IRQF_PERCPU | IRQF_ONESHOT)) | |
850 | return; | |
851 | ||
852 | new->flags |= IRQF_ONESHOT; | |
853 | ||
854 | if (!new->thread_fn) { | |
855 | set_bit(IRQTF_FORCED_THREAD, &new->thread_flags); | |
856 | new->thread_fn = new->handler; | |
857 | new->handler = irq_default_primary_handler; | |
858 | } | |
859 | } | |
860 | ||
1da177e4 LT |
861 | /* |
862 | * Internal function to register an irqaction - typically used to | |
863 | * allocate special interrupts that are part of the architecture. | |
864 | */ | |
d3c60047 | 865 | static int |
327ec569 | 866 | __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new) |
1da177e4 | 867 | { |
f17c7545 | 868 | struct irqaction *old, **old_ptr; |
8b126b77 | 869 | const char *old_name = NULL; |
b5faba21 | 870 | unsigned long flags, thread_mask = 0; |
3b8249e7 TG |
871 | int ret, nested, shared = 0; |
872 | cpumask_var_t mask; | |
1da177e4 | 873 | |
7d94f7ca | 874 | if (!desc) |
c2b5a251 MW |
875 | return -EINVAL; |
876 | ||
6b8ff312 | 877 | if (desc->irq_data.chip == &no_irq_chip) |
1da177e4 LT |
878 | return -ENOSYS; |
879 | /* | |
880 | * Some drivers like serial.c use request_irq() heavily, | |
881 | * so we have to be careful not to interfere with a | |
882 | * running system. | |
883 | */ | |
3cca53b0 | 884 | if (new->flags & IRQF_SAMPLE_RANDOM) { |
1da177e4 LT |
885 | /* |
886 | * This function might sleep, we want to call it first, | |
887 | * outside of the atomic block. | |
888 | * Yes, this might clear the entropy pool if the wrong | |
889 | * driver is attempted to be loaded, without actually | |
890 | * installing a new handler, but is this really a problem, | |
891 | * only the sysadmin is able to do this. | |
892 | */ | |
893 | rand_initialize_irq(irq); | |
894 | } | |
895 | ||
3aa551c9 | 896 | /* |
399b5da2 TG |
897 | * Check whether the interrupt nests into another interrupt |
898 | * thread. | |
899 | */ | |
1ccb4e61 | 900 | nested = irq_settings_is_nested_thread(desc); |
399b5da2 TG |
901 | if (nested) { |
902 | if (!new->thread_fn) | |
903 | return -EINVAL; | |
904 | /* | |
905 | * Replace the primary handler which was provided from | |
906 | * the driver for non nested interrupt handling by the | |
907 | * dummy function which warns when called. | |
908 | */ | |
909 | new->handler = irq_nested_primary_handler; | |
8d32a307 TG |
910 | } else { |
911 | irq_setup_forced_threading(new); | |
399b5da2 TG |
912 | } |
913 | ||
3aa551c9 | 914 | /* |
399b5da2 TG |
915 | * Create a handler thread when a thread function is supplied |
916 | * and the interrupt does not nest into another interrupt | |
917 | * thread. | |
3aa551c9 | 918 | */ |
399b5da2 | 919 | if (new->thread_fn && !nested) { |
3aa551c9 TG |
920 | struct task_struct *t; |
921 | ||
922 | t = kthread_create(irq_thread, new, "irq/%d-%s", irq, | |
923 | new->name); | |
924 | if (IS_ERR(t)) | |
925 | return PTR_ERR(t); | |
926 | /* | |
927 | * We keep the reference to the task struct even if | |
928 | * the thread dies to avoid that the interrupt code | |
929 | * references an already freed task_struct. | |
930 | */ | |
931 | get_task_struct(t); | |
932 | new->thread = t; | |
3aa551c9 TG |
933 | } |
934 | ||
3b8249e7 TG |
935 | if (!alloc_cpumask_var(&mask, GFP_KERNEL)) { |
936 | ret = -ENOMEM; | |
937 | goto out_thread; | |
938 | } | |
939 | ||
1da177e4 LT |
940 | /* |
941 | * The following block of code has to be executed atomically | |
942 | */ | |
239007b8 | 943 | raw_spin_lock_irqsave(&desc->lock, flags); |
f17c7545 IM |
944 | old_ptr = &desc->action; |
945 | old = *old_ptr; | |
06fcb0c6 | 946 | if (old) { |
e76de9f8 TG |
947 | /* |
948 | * Can't share interrupts unless both agree to and are | |
949 | * the same type (level, edge, polarity). So both flag | |
3cca53b0 | 950 | * fields must have IRQF_SHARED set and the bits which |
9d591edd TG |
951 | * set the trigger type must match. Also all must |
952 | * agree on ONESHOT. | |
e76de9f8 | 953 | */ |
3cca53b0 | 954 | if (!((old->flags & new->flags) & IRQF_SHARED) || |
9d591edd TG |
955 | ((old->flags ^ new->flags) & IRQF_TRIGGER_MASK) || |
956 | ((old->flags ^ new->flags) & IRQF_ONESHOT)) { | |
8b126b77 | 957 | old_name = old->name; |
f5163427 | 958 | goto mismatch; |
8b126b77 | 959 | } |
f5163427 | 960 | |
f5163427 | 961 | /* All handlers must agree on per-cpuness */ |
3cca53b0 TG |
962 | if ((old->flags & IRQF_PERCPU) != |
963 | (new->flags & IRQF_PERCPU)) | |
f5163427 | 964 | goto mismatch; |
1da177e4 LT |
965 | |
966 | /* add new interrupt at end of irq queue */ | |
967 | do { | |
b5faba21 | 968 | thread_mask |= old->thread_mask; |
f17c7545 IM |
969 | old_ptr = &old->next; |
970 | old = *old_ptr; | |
1da177e4 LT |
971 | } while (old); |
972 | shared = 1; | |
973 | } | |
974 | ||
b5faba21 TG |
975 | /* |
976 | * Setup the thread mask for this irqaction. Unlikely to have | |
977 | * 32 resp 64 irqs sharing one line, but who knows. | |
978 | */ | |
979 | if (new->flags & IRQF_ONESHOT && thread_mask == ~0UL) { | |
980 | ret = -EBUSY; | |
981 | goto out_mask; | |
982 | } | |
983 | new->thread_mask = 1 << ffz(thread_mask); | |
984 | ||
1da177e4 | 985 | if (!shared) { |
6b8ff312 | 986 | irq_chip_set_defaults(desc->irq_data.chip); |
e76de9f8 | 987 | |
3aa551c9 TG |
988 | init_waitqueue_head(&desc->wait_for_threads); |
989 | ||
e76de9f8 | 990 | /* Setup the type (level, edge polarity) if configured: */ |
3cca53b0 | 991 | if (new->flags & IRQF_TRIGGER_MASK) { |
f2b662da DB |
992 | ret = __irq_set_trigger(desc, irq, |
993 | new->flags & IRQF_TRIGGER_MASK); | |
82736f4d | 994 | |
3aa551c9 | 995 | if (ret) |
3b8249e7 | 996 | goto out_mask; |
091738a2 | 997 | } |
6a6de9ef | 998 | |
009b4c3b | 999 | desc->istate &= ~(IRQS_AUTODETECT | IRQS_SPURIOUS_DISABLED | \ |
163ef309 TG |
1000 | IRQS_INPROGRESS | IRQS_ONESHOT | \ |
1001 | IRQS_WAITING); | |
94d39e1f | 1002 | |
a005677b TG |
1003 | if (new->flags & IRQF_PERCPU) { |
1004 | irqd_set(&desc->irq_data, IRQD_PER_CPU); | |
1005 | irq_settings_set_per_cpu(desc); | |
1006 | } | |
6a58fb3b | 1007 | |
b25c340c | 1008 | if (new->flags & IRQF_ONESHOT) |
3d67baec | 1009 | desc->istate |= IRQS_ONESHOT; |
b25c340c | 1010 | |
1ccb4e61 | 1011 | if (irq_settings_can_autoenable(desc)) |
46999238 TG |
1012 | irq_startup(desc); |
1013 | else | |
e76de9f8 TG |
1014 | /* Undo nested disables: */ |
1015 | desc->depth = 1; | |
18404756 | 1016 | |
612e3684 | 1017 | /* Exclude IRQ from balancing if requested */ |
a005677b TG |
1018 | if (new->flags & IRQF_NOBALANCING) { |
1019 | irq_settings_set_no_balancing(desc); | |
1020 | irqd_set(&desc->irq_data, IRQD_NO_BALANCING); | |
1021 | } | |
612e3684 | 1022 | |
18404756 | 1023 | /* Set default affinity mask once everything is setup */ |
3b8249e7 | 1024 | setup_affinity(irq, desc, mask); |
0c5d1eb7 | 1025 | |
876dbd4c TG |
1026 | } else if (new->flags & IRQF_TRIGGER_MASK) { |
1027 | unsigned int nmsk = new->flags & IRQF_TRIGGER_MASK; | |
1028 | unsigned int omsk = irq_settings_get_trigger_mask(desc); | |
1029 | ||
1030 | if (nmsk != omsk) | |
1031 | /* hope the handler works with current trigger mode */ | |
1032 | pr_warning("IRQ %d uses trigger mode %u; requested %u\n", | |
1033 | irq, nmsk, omsk); | |
1da177e4 | 1034 | } |
82736f4d | 1035 | |
69ab8494 | 1036 | new->irq = irq; |
f17c7545 | 1037 | *old_ptr = new; |
82736f4d | 1038 | |
8528b0f1 LT |
1039 | /* Reset broken irq detection when installing new handler */ |
1040 | desc->irq_count = 0; | |
1041 | desc->irqs_unhandled = 0; | |
1adb0850 TG |
1042 | |
1043 | /* | |
1044 | * Check whether we disabled the irq via the spurious handler | |
1045 | * before. Reenable it and give it another chance. | |
1046 | */ | |
7acdd53e TG |
1047 | if (shared && (desc->istate & IRQS_SPURIOUS_DISABLED)) { |
1048 | desc->istate &= ~IRQS_SPURIOUS_DISABLED; | |
0a0c5168 | 1049 | __enable_irq(desc, irq, false); |
1adb0850 TG |
1050 | } |
1051 | ||
239007b8 | 1052 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 | 1053 | |
69ab8494 TG |
1054 | /* |
1055 | * Strictly no need to wake it up, but hung_task complains | |
1056 | * when no hard interrupt wakes the thread up. | |
1057 | */ | |
1058 | if (new->thread) | |
1059 | wake_up_process(new->thread); | |
1060 | ||
2c6927a3 | 1061 | register_irq_proc(irq, desc); |
1da177e4 LT |
1062 | new->dir = NULL; |
1063 | register_handler_proc(irq, new); | |
1064 | ||
1065 | return 0; | |
f5163427 DS |
1066 | |
1067 | mismatch: | |
3f050447 | 1068 | #ifdef CONFIG_DEBUG_SHIRQ |
3cca53b0 | 1069 | if (!(new->flags & IRQF_PROBE_SHARED)) { |
e8c4b9d0 | 1070 | printk(KERN_ERR "IRQ handler type mismatch for IRQ %d\n", irq); |
8b126b77 AM |
1071 | if (old_name) |
1072 | printk(KERN_ERR "current handler: %s\n", old_name); | |
13e87ec6 AM |
1073 | dump_stack(); |
1074 | } | |
3f050447 | 1075 | #endif |
3aa551c9 TG |
1076 | ret = -EBUSY; |
1077 | ||
3b8249e7 | 1078 | out_mask: |
1c389795 | 1079 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
3b8249e7 TG |
1080 | free_cpumask_var(mask); |
1081 | ||
3aa551c9 | 1082 | out_thread: |
3aa551c9 TG |
1083 | if (new->thread) { |
1084 | struct task_struct *t = new->thread; | |
1085 | ||
1086 | new->thread = NULL; | |
1087 | if (likely(!test_bit(IRQTF_DIED, &new->thread_flags))) | |
1088 | kthread_stop(t); | |
1089 | put_task_struct(t); | |
1090 | } | |
1091 | return ret; | |
1da177e4 LT |
1092 | } |
1093 | ||
d3c60047 TG |
1094 | /** |
1095 | * setup_irq - setup an interrupt | |
1096 | * @irq: Interrupt line to setup | |
1097 | * @act: irqaction for the interrupt | |
1098 | * | |
1099 | * Used to statically setup interrupts in the early boot process. | |
1100 | */ | |
1101 | int setup_irq(unsigned int irq, struct irqaction *act) | |
1102 | { | |
986c011d | 1103 | int retval; |
d3c60047 TG |
1104 | struct irq_desc *desc = irq_to_desc(irq); |
1105 | ||
986c011d DD |
1106 | chip_bus_lock(desc); |
1107 | retval = __setup_irq(irq, desc, act); | |
1108 | chip_bus_sync_unlock(desc); | |
1109 | ||
1110 | return retval; | |
d3c60047 | 1111 | } |
eb53b4e8 | 1112 | EXPORT_SYMBOL_GPL(setup_irq); |
d3c60047 | 1113 | |
cbf94f06 MD |
1114 | /* |
1115 | * Internal function to unregister an irqaction - used to free | |
1116 | * regular and special interrupts that are part of the architecture. | |
1da177e4 | 1117 | */ |
cbf94f06 | 1118 | static struct irqaction *__free_irq(unsigned int irq, void *dev_id) |
1da177e4 | 1119 | { |
d3c60047 | 1120 | struct irq_desc *desc = irq_to_desc(irq); |
f17c7545 | 1121 | struct irqaction *action, **action_ptr; |
1da177e4 LT |
1122 | unsigned long flags; |
1123 | ||
ae88a23b | 1124 | WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq); |
7d94f7ca | 1125 | |
7d94f7ca | 1126 | if (!desc) |
f21cfb25 | 1127 | return NULL; |
1da177e4 | 1128 | |
239007b8 | 1129 | raw_spin_lock_irqsave(&desc->lock, flags); |
ae88a23b IM |
1130 | |
1131 | /* | |
1132 | * There can be multiple actions per IRQ descriptor, find the right | |
1133 | * one based on the dev_id: | |
1134 | */ | |
f17c7545 | 1135 | action_ptr = &desc->action; |
1da177e4 | 1136 | for (;;) { |
f17c7545 | 1137 | action = *action_ptr; |
1da177e4 | 1138 | |
ae88a23b IM |
1139 | if (!action) { |
1140 | WARN(1, "Trying to free already-free IRQ %d\n", irq); | |
239007b8 | 1141 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 | 1142 | |
f21cfb25 | 1143 | return NULL; |
ae88a23b | 1144 | } |
1da177e4 | 1145 | |
8316e381 IM |
1146 | if (action->dev_id == dev_id) |
1147 | break; | |
f17c7545 | 1148 | action_ptr = &action->next; |
ae88a23b | 1149 | } |
dbce706e | 1150 | |
ae88a23b | 1151 | /* Found it - now remove it from the list of entries: */ |
f17c7545 | 1152 | *action_ptr = action->next; |
ae88a23b IM |
1153 | |
1154 | /* Currently used only by UML, might disappear one day: */ | |
b77d6adc | 1155 | #ifdef CONFIG_IRQ_RELEASE_METHOD |
6b8ff312 TG |
1156 | if (desc->irq_data.chip->release) |
1157 | desc->irq_data.chip->release(irq, dev_id); | |
b77d6adc | 1158 | #endif |
dbce706e | 1159 | |
ae88a23b | 1160 | /* If this was the last handler, shut down the IRQ line: */ |
46999238 TG |
1161 | if (!desc->action) |
1162 | irq_shutdown(desc); | |
3aa551c9 | 1163 | |
e7a297b0 PWJ |
1164 | #ifdef CONFIG_SMP |
1165 | /* make sure affinity_hint is cleaned up */ | |
1166 | if (WARN_ON_ONCE(desc->affinity_hint)) | |
1167 | desc->affinity_hint = NULL; | |
1168 | #endif | |
1169 | ||
239007b8 | 1170 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
ae88a23b IM |
1171 | |
1172 | unregister_handler_proc(irq, action); | |
1173 | ||
1174 | /* Make sure it's not being used on another CPU: */ | |
1175 | synchronize_irq(irq); | |
1da177e4 | 1176 | |
70edcd77 | 1177 | #ifdef CONFIG_DEBUG_SHIRQ |
ae88a23b IM |
1178 | /* |
1179 | * It's a shared IRQ -- the driver ought to be prepared for an IRQ | |
1180 | * event to happen even now it's being freed, so let's make sure that | |
1181 | * is so by doing an extra call to the handler .... | |
1182 | * | |
1183 | * ( We do this after actually deregistering it, to make sure that a | |
1184 | * 'real' IRQ doesn't run in * parallel with our fake. ) | |
1185 | */ | |
1186 | if (action->flags & IRQF_SHARED) { | |
1187 | local_irq_save(flags); | |
1188 | action->handler(irq, dev_id); | |
1189 | local_irq_restore(flags); | |
1da177e4 | 1190 | } |
ae88a23b | 1191 | #endif |
2d860ad7 LT |
1192 | |
1193 | if (action->thread) { | |
1194 | if (!test_bit(IRQTF_DIED, &action->thread_flags)) | |
1195 | kthread_stop(action->thread); | |
1196 | put_task_struct(action->thread); | |
1197 | } | |
1198 | ||
f21cfb25 MD |
1199 | return action; |
1200 | } | |
1201 | ||
cbf94f06 MD |
1202 | /** |
1203 | * remove_irq - free an interrupt | |
1204 | * @irq: Interrupt line to free | |
1205 | * @act: irqaction for the interrupt | |
1206 | * | |
1207 | * Used to remove interrupts statically setup by the early boot process. | |
1208 | */ | |
1209 | void remove_irq(unsigned int irq, struct irqaction *act) | |
1210 | { | |
1211 | __free_irq(irq, act->dev_id); | |
1212 | } | |
eb53b4e8 | 1213 | EXPORT_SYMBOL_GPL(remove_irq); |
cbf94f06 | 1214 | |
f21cfb25 MD |
1215 | /** |
1216 | * free_irq - free an interrupt allocated with request_irq | |
1217 | * @irq: Interrupt line to free | |
1218 | * @dev_id: Device identity to free | |
1219 | * | |
1220 | * Remove an interrupt handler. The handler is removed and if the | |
1221 | * interrupt line is no longer in use by any driver it is disabled. | |
1222 | * On a shared IRQ the caller must ensure the interrupt is disabled | |
1223 | * on the card it drives before calling this function. The function | |
1224 | * does not return until any executing interrupts for this IRQ | |
1225 | * have completed. | |
1226 | * | |
1227 | * This function must not be called from interrupt context. | |
1228 | */ | |
1229 | void free_irq(unsigned int irq, void *dev_id) | |
1230 | { | |
70aedd24 TG |
1231 | struct irq_desc *desc = irq_to_desc(irq); |
1232 | ||
1233 | if (!desc) | |
1234 | return; | |
1235 | ||
cd7eab44 BH |
1236 | #ifdef CONFIG_SMP |
1237 | if (WARN_ON(desc->affinity_notify)) | |
1238 | desc->affinity_notify = NULL; | |
1239 | #endif | |
1240 | ||
3876ec9e | 1241 | chip_bus_lock(desc); |
cbf94f06 | 1242 | kfree(__free_irq(irq, dev_id)); |
3876ec9e | 1243 | chip_bus_sync_unlock(desc); |
1da177e4 | 1244 | } |
1da177e4 LT |
1245 | EXPORT_SYMBOL(free_irq); |
1246 | ||
1247 | /** | |
3aa551c9 | 1248 | * request_threaded_irq - allocate an interrupt line |
1da177e4 | 1249 | * @irq: Interrupt line to allocate |
3aa551c9 TG |
1250 | * @handler: Function to be called when the IRQ occurs. |
1251 | * Primary handler for threaded interrupts | |
b25c340c TG |
1252 | * If NULL and thread_fn != NULL the default |
1253 | * primary handler is installed | |
f48fe81e TG |
1254 | * @thread_fn: Function called from the irq handler thread |
1255 | * If NULL, no irq thread is created | |
1da177e4 LT |
1256 | * @irqflags: Interrupt type flags |
1257 | * @devname: An ascii name for the claiming device | |
1258 | * @dev_id: A cookie passed back to the handler function | |
1259 | * | |
1260 | * This call allocates interrupt resources and enables the | |
1261 | * interrupt line and IRQ handling. From the point this | |
1262 | * call is made your handler function may be invoked. Since | |
1263 | * your handler function must clear any interrupt the board | |
1264 | * raises, you must take care both to initialise your hardware | |
1265 | * and to set up the interrupt handler in the right order. | |
1266 | * | |
3aa551c9 TG |
1267 | * If you want to set up a threaded irq handler for your device |
1268 | * then you need to supply @handler and @thread_fn. @handler ist | |
1269 | * still called in hard interrupt context and has to check | |
1270 | * whether the interrupt originates from the device. If yes it | |
1271 | * needs to disable the interrupt on the device and return | |
39a2eddb | 1272 | * IRQ_WAKE_THREAD which will wake up the handler thread and run |
3aa551c9 TG |
1273 | * @thread_fn. This split handler design is necessary to support |
1274 | * shared interrupts. | |
1275 | * | |
1da177e4 LT |
1276 | * Dev_id must be globally unique. Normally the address of the |
1277 | * device data structure is used as the cookie. Since the handler | |
1278 | * receives this value it makes sense to use it. | |
1279 | * | |
1280 | * If your interrupt is shared you must pass a non NULL dev_id | |
1281 | * as this is required when freeing the interrupt. | |
1282 | * | |
1283 | * Flags: | |
1284 | * | |
3cca53b0 | 1285 | * IRQF_SHARED Interrupt is shared |
3cca53b0 | 1286 | * IRQF_SAMPLE_RANDOM The interrupt can be used for entropy |
0c5d1eb7 | 1287 | * IRQF_TRIGGER_* Specify active edge(s) or level |
1da177e4 LT |
1288 | * |
1289 | */ | |
3aa551c9 TG |
1290 | int request_threaded_irq(unsigned int irq, irq_handler_t handler, |
1291 | irq_handler_t thread_fn, unsigned long irqflags, | |
1292 | const char *devname, void *dev_id) | |
1da177e4 | 1293 | { |
06fcb0c6 | 1294 | struct irqaction *action; |
08678b08 | 1295 | struct irq_desc *desc; |
d3c60047 | 1296 | int retval; |
1da177e4 LT |
1297 | |
1298 | /* | |
1299 | * Sanity-check: shared interrupts must pass in a real dev-ID, | |
1300 | * otherwise we'll have trouble later trying to figure out | |
1301 | * which interrupt is which (messes up the interrupt freeing | |
1302 | * logic etc). | |
1303 | */ | |
3cca53b0 | 1304 | if ((irqflags & IRQF_SHARED) && !dev_id) |
1da177e4 | 1305 | return -EINVAL; |
7d94f7ca | 1306 | |
cb5bc832 | 1307 | desc = irq_to_desc(irq); |
7d94f7ca | 1308 | if (!desc) |
1da177e4 | 1309 | return -EINVAL; |
7d94f7ca | 1310 | |
1ccb4e61 | 1311 | if (!irq_settings_can_request(desc)) |
6550c775 | 1312 | return -EINVAL; |
b25c340c TG |
1313 | |
1314 | if (!handler) { | |
1315 | if (!thread_fn) | |
1316 | return -EINVAL; | |
1317 | handler = irq_default_primary_handler; | |
1318 | } | |
1da177e4 | 1319 | |
45535732 | 1320 | action = kzalloc(sizeof(struct irqaction), GFP_KERNEL); |
1da177e4 LT |
1321 | if (!action) |
1322 | return -ENOMEM; | |
1323 | ||
1324 | action->handler = handler; | |
3aa551c9 | 1325 | action->thread_fn = thread_fn; |
1da177e4 | 1326 | action->flags = irqflags; |
1da177e4 | 1327 | action->name = devname; |
1da177e4 LT |
1328 | action->dev_id = dev_id; |
1329 | ||
3876ec9e | 1330 | chip_bus_lock(desc); |
d3c60047 | 1331 | retval = __setup_irq(irq, desc, action); |
3876ec9e | 1332 | chip_bus_sync_unlock(desc); |
70aedd24 | 1333 | |
377bf1e4 AV |
1334 | if (retval) |
1335 | kfree(action); | |
1336 | ||
6d83f94d | 1337 | #ifdef CONFIG_DEBUG_SHIRQ_FIXME |
6ce51c43 | 1338 | if (!retval && (irqflags & IRQF_SHARED)) { |
a304e1b8 DW |
1339 | /* |
1340 | * It's a shared IRQ -- the driver ought to be prepared for it | |
1341 | * to happen immediately, so let's make sure.... | |
377bf1e4 AV |
1342 | * We disable the irq to make sure that a 'real' IRQ doesn't |
1343 | * run in parallel with our fake. | |
a304e1b8 | 1344 | */ |
59845b1f | 1345 | unsigned long flags; |
a304e1b8 | 1346 | |
377bf1e4 | 1347 | disable_irq(irq); |
59845b1f | 1348 | local_irq_save(flags); |
377bf1e4 | 1349 | |
59845b1f | 1350 | handler(irq, dev_id); |
377bf1e4 | 1351 | |
59845b1f | 1352 | local_irq_restore(flags); |
377bf1e4 | 1353 | enable_irq(irq); |
a304e1b8 DW |
1354 | } |
1355 | #endif | |
1da177e4 LT |
1356 | return retval; |
1357 | } | |
3aa551c9 | 1358 | EXPORT_SYMBOL(request_threaded_irq); |
ae731f8d MZ |
1359 | |
1360 | /** | |
1361 | * request_any_context_irq - allocate an interrupt line | |
1362 | * @irq: Interrupt line to allocate | |
1363 | * @handler: Function to be called when the IRQ occurs. | |
1364 | * Threaded handler for threaded interrupts. | |
1365 | * @flags: Interrupt type flags | |
1366 | * @name: An ascii name for the claiming device | |
1367 | * @dev_id: A cookie passed back to the handler function | |
1368 | * | |
1369 | * This call allocates interrupt resources and enables the | |
1370 | * interrupt line and IRQ handling. It selects either a | |
1371 | * hardirq or threaded handling method depending on the | |
1372 | * context. | |
1373 | * | |
1374 | * On failure, it returns a negative value. On success, | |
1375 | * it returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED. | |
1376 | */ | |
1377 | int request_any_context_irq(unsigned int irq, irq_handler_t handler, | |
1378 | unsigned long flags, const char *name, void *dev_id) | |
1379 | { | |
1380 | struct irq_desc *desc = irq_to_desc(irq); | |
1381 | int ret; | |
1382 | ||
1383 | if (!desc) | |
1384 | return -EINVAL; | |
1385 | ||
1ccb4e61 | 1386 | if (irq_settings_is_nested_thread(desc)) { |
ae731f8d MZ |
1387 | ret = request_threaded_irq(irq, NULL, handler, |
1388 | flags, name, dev_id); | |
1389 | return !ret ? IRQC_IS_NESTED : ret; | |
1390 | } | |
1391 | ||
1392 | ret = request_irq(irq, handler, flags, name, dev_id); | |
1393 | return !ret ? IRQC_IS_HARDIRQ : ret; | |
1394 | } | |
1395 | EXPORT_SYMBOL_GPL(request_any_context_irq); |