genirq: Add IRQCHIP_SET_TYPE_MASKED flag
[deliverable/linux.git] / kernel / irq / manage.c
CommitLineData
1da177e4
LT
1/*
2 * linux/kernel/irq/manage.c
3 *
a34db9b2
IM
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006 Thomas Gleixner
1da177e4
LT
6 *
7 * This file contains driver APIs to the irq subsystem.
8 */
9
10#include <linux/irq.h>
3aa551c9 11#include <linux/kthread.h>
1da177e4
LT
12#include <linux/module.h>
13#include <linux/random.h>
14#include <linux/interrupt.h>
1aeb272c 15#include <linux/slab.h>
3aa551c9 16#include <linux/sched.h>
1da177e4
LT
17
18#include "internals.h"
19
1da177e4
LT
20/**
21 * synchronize_irq - wait for pending IRQ handlers (on other CPUs)
1e5d5331 22 * @irq: interrupt number to wait for
1da177e4
LT
23 *
24 * This function waits for any pending IRQ handlers for this interrupt
25 * to complete before returning. If you use this function while
26 * holding a resource the IRQ handler may need you will deadlock.
27 *
28 * This function may be called - with care - from IRQ context.
29 */
30void synchronize_irq(unsigned int irq)
31{
cb5bc832 32 struct irq_desc *desc = irq_to_desc(irq);
009b4c3b 33 unsigned int state;
1da177e4 34
7d94f7ca 35 if (!desc)
c2b5a251
MW
36 return;
37
a98ce5c6
HX
38 do {
39 unsigned long flags;
40
41 /*
42 * Wait until we're out of the critical section. This might
43 * give the wrong answer due to the lack of memory barriers.
44 */
009b4c3b 45 while (desc->istate & IRQS_INPROGRESS)
a98ce5c6
HX
46 cpu_relax();
47
48 /* Ok, that indicated we're done: double-check carefully. */
239007b8 49 raw_spin_lock_irqsave(&desc->lock, flags);
009b4c3b 50 state = desc->istate;
239007b8 51 raw_spin_unlock_irqrestore(&desc->lock, flags);
a98ce5c6
HX
52
53 /* Oops, that failed? */
009b4c3b 54 } while (state & IRQS_INPROGRESS);
3aa551c9
TG
55
56 /*
57 * We made sure that no hardirq handler is running. Now verify
58 * that no threaded handlers are active.
59 */
60 wait_event(desc->wait_for_threads, !atomic_read(&desc->threads_active));
1da177e4 61}
1da177e4
LT
62EXPORT_SYMBOL(synchronize_irq);
63
3aa551c9
TG
64#ifdef CONFIG_SMP
65cpumask_var_t irq_default_affinity;
66
771ee3b0
TG
67/**
68 * irq_can_set_affinity - Check if the affinity of a given irq can be set
69 * @irq: Interrupt to check
70 *
71 */
72int irq_can_set_affinity(unsigned int irq)
73{
08678b08 74 struct irq_desc *desc = irq_to_desc(irq);
771ee3b0 75
bce43032
TG
76 if (!desc || !irqd_can_balance(&desc->irq_data) ||
77 !desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity)
771ee3b0
TG
78 return 0;
79
80 return 1;
81}
82
591d2fb0
TG
83/**
84 * irq_set_thread_affinity - Notify irq threads to adjust affinity
85 * @desc: irq descriptor which has affitnity changed
86 *
87 * We just set IRQTF_AFFINITY and delegate the affinity setting
88 * to the interrupt thread itself. We can not call
89 * set_cpus_allowed_ptr() here as we hold desc->lock and this
90 * code can be called from hard interrupt context.
91 */
92void irq_set_thread_affinity(struct irq_desc *desc)
3aa551c9
TG
93{
94 struct irqaction *action = desc->action;
95
96 while (action) {
97 if (action->thread)
591d2fb0 98 set_bit(IRQTF_AFFINITY, &action->thread_flags);
3aa551c9
TG
99 action = action->next;
100 }
101}
102
1fa46f1f
TG
103#ifdef CONFIG_GENERIC_PENDING_IRQ
104static inline bool irq_can_move_pcntxt(struct irq_desc *desc)
105{
1ccb4e61 106 return irq_settings_can_move_pcntxt(desc);
1fa46f1f
TG
107}
108static inline bool irq_move_pending(struct irq_desc *desc)
109{
f230b6d5 110 return irqd_is_setaffinity_pending(&desc->irq_data);
1fa46f1f
TG
111}
112static inline void
113irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask)
114{
115 cpumask_copy(desc->pending_mask, mask);
116}
117static inline void
118irq_get_pending(struct cpumask *mask, struct irq_desc *desc)
119{
120 cpumask_copy(mask, desc->pending_mask);
121}
122#else
123static inline bool irq_can_move_pcntxt(struct irq_desc *desc) { return true; }
124static inline bool irq_move_pending(struct irq_desc *desc) { return false; }
125static inline void
126irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask) { }
127static inline void
128irq_get_pending(struct cpumask *mask, struct irq_desc *desc) { }
129#endif
130
771ee3b0
TG
131/**
132 * irq_set_affinity - Set the irq affinity of a given irq
133 * @irq: Interrupt to set affinity
134 * @cpumask: cpumask
135 *
136 */
1fa46f1f 137int irq_set_affinity(unsigned int irq, const struct cpumask *mask)
771ee3b0 138{
08678b08 139 struct irq_desc *desc = irq_to_desc(irq);
c96b3b3c 140 struct irq_chip *chip = desc->irq_data.chip;
f6d87f4b 141 unsigned long flags;
1fa46f1f 142 int ret = 0;
771ee3b0 143
c96b3b3c 144 if (!chip->irq_set_affinity)
771ee3b0
TG
145 return -EINVAL;
146
239007b8 147 raw_spin_lock_irqsave(&desc->lock, flags);
f6d87f4b 148
1fa46f1f
TG
149 if (irq_can_move_pcntxt(desc)) {
150 ret = chip->irq_set_affinity(&desc->irq_data, mask, false);
3b8249e7
TG
151 switch (ret) {
152 case IRQ_SET_MASK_OK:
1fa46f1f 153 cpumask_copy(desc->irq_data.affinity, mask);
3b8249e7 154 case IRQ_SET_MASK_OK_NOCOPY:
591d2fb0 155 irq_set_thread_affinity(desc);
3b8249e7 156 ret = 0;
57b150cc 157 }
1fa46f1f 158 } else {
f230b6d5 159 irqd_set_move_pending(&desc->irq_data);
1fa46f1f 160 irq_copy_pending(desc, mask);
57b150cc 161 }
1fa46f1f 162
cd7eab44
BH
163 if (desc->affinity_notify) {
164 kref_get(&desc->affinity_notify->kref);
165 schedule_work(&desc->affinity_notify->work);
166 }
2bdd1055
TG
167 irq_compat_set_affinity(desc);
168 irqd_set(&desc->irq_data, IRQD_AFFINITY_SET);
239007b8 169 raw_spin_unlock_irqrestore(&desc->lock, flags);
1fa46f1f 170 return ret;
771ee3b0
TG
171}
172
e7a297b0
PWJ
173int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m)
174{
175 struct irq_desc *desc = irq_to_desc(irq);
176 unsigned long flags;
177
178 if (!desc)
179 return -EINVAL;
180
181 raw_spin_lock_irqsave(&desc->lock, flags);
182 desc->affinity_hint = m;
183 raw_spin_unlock_irqrestore(&desc->lock, flags);
184
185 return 0;
186}
187EXPORT_SYMBOL_GPL(irq_set_affinity_hint);
188
cd7eab44
BH
189static void irq_affinity_notify(struct work_struct *work)
190{
191 struct irq_affinity_notify *notify =
192 container_of(work, struct irq_affinity_notify, work);
193 struct irq_desc *desc = irq_to_desc(notify->irq);
194 cpumask_var_t cpumask;
195 unsigned long flags;
196
1fa46f1f 197 if (!desc || !alloc_cpumask_var(&cpumask, GFP_KERNEL))
cd7eab44
BH
198 goto out;
199
200 raw_spin_lock_irqsave(&desc->lock, flags);
1fa46f1f
TG
201 if (irq_move_pending(desc))
202 irq_get_pending(cpumask, desc);
cd7eab44 203 else
1fb0ef31 204 cpumask_copy(cpumask, desc->irq_data.affinity);
cd7eab44
BH
205 raw_spin_unlock_irqrestore(&desc->lock, flags);
206
207 notify->notify(notify, cpumask);
208
209 free_cpumask_var(cpumask);
210out:
211 kref_put(&notify->kref, notify->release);
212}
213
214/**
215 * irq_set_affinity_notifier - control notification of IRQ affinity changes
216 * @irq: Interrupt for which to enable/disable notification
217 * @notify: Context for notification, or %NULL to disable
218 * notification. Function pointers must be initialised;
219 * the other fields will be initialised by this function.
220 *
221 * Must be called in process context. Notification may only be enabled
222 * after the IRQ is allocated and must be disabled before the IRQ is
223 * freed using free_irq().
224 */
225int
226irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify)
227{
228 struct irq_desc *desc = irq_to_desc(irq);
229 struct irq_affinity_notify *old_notify;
230 unsigned long flags;
231
232 /* The release function is promised process context */
233 might_sleep();
234
235 if (!desc)
236 return -EINVAL;
237
238 /* Complete initialisation of *notify */
239 if (notify) {
240 notify->irq = irq;
241 kref_init(&notify->kref);
242 INIT_WORK(&notify->work, irq_affinity_notify);
243 }
244
245 raw_spin_lock_irqsave(&desc->lock, flags);
246 old_notify = desc->affinity_notify;
247 desc->affinity_notify = notify;
248 raw_spin_unlock_irqrestore(&desc->lock, flags);
249
250 if (old_notify)
251 kref_put(&old_notify->kref, old_notify->release);
252
253 return 0;
254}
255EXPORT_SYMBOL_GPL(irq_set_affinity_notifier);
256
18404756
MK
257#ifndef CONFIG_AUTO_IRQ_AFFINITY
258/*
259 * Generic version of the affinity autoselector.
260 */
3b8249e7
TG
261static int
262setup_affinity(unsigned int irq, struct irq_desc *desc, struct cpumask *mask)
18404756 263{
35e857cb 264 struct irq_chip *chip = irq_desc_get_chip(desc);
569bda8d 265 struct cpumask *set = irq_default_affinity;
3b8249e7 266 int ret;
569bda8d 267
b008207c 268 /* Excludes PER_CPU and NO_BALANCE interrupts */
18404756
MK
269 if (!irq_can_set_affinity(irq))
270 return 0;
271
f6d87f4b
TG
272 /*
273 * Preserve an userspace affinity setup, but make sure that
274 * one of the targets is online.
275 */
2bdd1055 276 if (irqd_has_set(&desc->irq_data, IRQD_AFFINITY_SET)) {
569bda8d
TG
277 if (cpumask_intersects(desc->irq_data.affinity,
278 cpu_online_mask))
279 set = desc->irq_data.affinity;
2bdd1055
TG
280 else {
281 irq_compat_clr_affinity(desc);
282 irqd_clear(&desc->irq_data, IRQD_AFFINITY_SET);
283 }
f6d87f4b 284 }
18404756 285
3b8249e7
TG
286 cpumask_and(mask, cpu_online_mask, set);
287 ret = chip->irq_set_affinity(&desc->irq_data, mask, false);
288 switch (ret) {
289 case IRQ_SET_MASK_OK:
290 cpumask_copy(desc->irq_data.affinity, mask);
291 case IRQ_SET_MASK_OK_NOCOPY:
292 irq_set_thread_affinity(desc);
293 }
18404756
MK
294 return 0;
295}
f6d87f4b 296#else
3b8249e7
TG
297static inline int
298setup_affinity(unsigned int irq, struct irq_desc *d, struct cpumask *mask)
f6d87f4b
TG
299{
300 return irq_select_affinity(irq);
301}
18404756
MK
302#endif
303
f6d87f4b
TG
304/*
305 * Called when affinity is set via /proc/irq
306 */
3b8249e7 307int irq_select_affinity_usr(unsigned int irq, struct cpumask *mask)
f6d87f4b
TG
308{
309 struct irq_desc *desc = irq_to_desc(irq);
310 unsigned long flags;
311 int ret;
312
239007b8 313 raw_spin_lock_irqsave(&desc->lock, flags);
3b8249e7 314 ret = setup_affinity(irq, desc, mask);
239007b8 315 raw_spin_unlock_irqrestore(&desc->lock, flags);
f6d87f4b
TG
316 return ret;
317}
318
319#else
3b8249e7
TG
320static inline int
321setup_affinity(unsigned int irq, struct irq_desc *desc, struct cpumask *mask)
f6d87f4b
TG
322{
323 return 0;
324}
1da177e4
LT
325#endif
326
0a0c5168
RW
327void __disable_irq(struct irq_desc *desc, unsigned int irq, bool suspend)
328{
329 if (suspend) {
685fd0b4 330 if (!desc->action || (desc->action->flags & IRQF_NO_SUSPEND))
0a0c5168 331 return;
c531e836 332 desc->istate |= IRQS_SUSPENDED;
0a0c5168
RW
333 }
334
3aae994f 335 if (!desc->depth++)
87923470 336 irq_disable(desc);
0a0c5168
RW
337}
338
1da177e4
LT
339/**
340 * disable_irq_nosync - disable an irq without waiting
341 * @irq: Interrupt to disable
342 *
343 * Disable the selected interrupt line. Disables and Enables are
344 * nested.
345 * Unlike disable_irq(), this function does not ensure existing
346 * instances of the IRQ handler have completed before returning.
347 *
348 * This function may be called from IRQ context.
349 */
350void disable_irq_nosync(unsigned int irq)
351{
d3c60047 352 struct irq_desc *desc = irq_to_desc(irq);
1da177e4
LT
353 unsigned long flags;
354
7d94f7ca 355 if (!desc)
c2b5a251
MW
356 return;
357
3876ec9e 358 chip_bus_lock(desc);
239007b8 359 raw_spin_lock_irqsave(&desc->lock, flags);
0a0c5168 360 __disable_irq(desc, irq, false);
239007b8 361 raw_spin_unlock_irqrestore(&desc->lock, flags);
3876ec9e 362 chip_bus_sync_unlock(desc);
1da177e4 363}
1da177e4
LT
364EXPORT_SYMBOL(disable_irq_nosync);
365
366/**
367 * disable_irq - disable an irq and wait for completion
368 * @irq: Interrupt to disable
369 *
370 * Disable the selected interrupt line. Enables and Disables are
371 * nested.
372 * This function waits for any pending IRQ handlers for this interrupt
373 * to complete before returning. If you use this function while
374 * holding a resource the IRQ handler may need you will deadlock.
375 *
376 * This function may be called - with care - from IRQ context.
377 */
378void disable_irq(unsigned int irq)
379{
d3c60047 380 struct irq_desc *desc = irq_to_desc(irq);
1da177e4 381
7d94f7ca 382 if (!desc)
c2b5a251
MW
383 return;
384
1da177e4
LT
385 disable_irq_nosync(irq);
386 if (desc->action)
387 synchronize_irq(irq);
388}
1da177e4
LT
389EXPORT_SYMBOL(disable_irq);
390
0a0c5168 391void __enable_irq(struct irq_desc *desc, unsigned int irq, bool resume)
1adb0850 392{
dc5f219e 393 if (resume) {
c531e836 394 if (!(desc->istate & IRQS_SUSPENDED)) {
dc5f219e
TG
395 if (!desc->action)
396 return;
397 if (!(desc->action->flags & IRQF_FORCE_RESUME))
398 return;
399 /* Pretend that it got disabled ! */
400 desc->depth++;
401 }
c531e836 402 desc->istate &= ~IRQS_SUSPENDED;
dc5f219e 403 }
0a0c5168 404
1adb0850
TG
405 switch (desc->depth) {
406 case 0:
0a0c5168 407 err_out:
b8c512f6 408 WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n", irq);
1adb0850
TG
409 break;
410 case 1: {
c531e836 411 if (desc->istate & IRQS_SUSPENDED)
0a0c5168 412 goto err_out;
1adb0850 413 /* Prevent probing on this irq: */
1ccb4e61 414 irq_settings_set_noprobe(desc);
3aae994f 415 irq_enable(desc);
1adb0850
TG
416 check_irq_resend(desc, irq);
417 /* fall-through */
418 }
419 default:
420 desc->depth--;
421 }
422}
423
1da177e4
LT
424/**
425 * enable_irq - enable handling of an irq
426 * @irq: Interrupt to enable
427 *
428 * Undoes the effect of one call to disable_irq(). If this
429 * matches the last disable, processing of interrupts on this
430 * IRQ line is re-enabled.
431 *
70aedd24 432 * This function may be called from IRQ context only when
6b8ff312 433 * desc->irq_data.chip->bus_lock and desc->chip->bus_sync_unlock are NULL !
1da177e4
LT
434 */
435void enable_irq(unsigned int irq)
436{
d3c60047 437 struct irq_desc *desc = irq_to_desc(irq);
1da177e4
LT
438 unsigned long flags;
439
7d94f7ca 440 if (!desc)
c2b5a251
MW
441 return;
442
50f7c032
TG
443 if (WARN(!desc->irq_data.chip,
444 KERN_ERR "enable_irq before setup/request_irq: irq %u\n", irq))
2656c366
TG
445 return;
446
3876ec9e 447 chip_bus_lock(desc);
239007b8 448 raw_spin_lock_irqsave(&desc->lock, flags);
0a0c5168 449 __enable_irq(desc, irq, false);
239007b8 450 raw_spin_unlock_irqrestore(&desc->lock, flags);
3876ec9e 451 chip_bus_sync_unlock(desc);
1da177e4 452}
1da177e4
LT
453EXPORT_SYMBOL(enable_irq);
454
0c5d1eb7 455static int set_irq_wake_real(unsigned int irq, unsigned int on)
2db87321 456{
08678b08 457 struct irq_desc *desc = irq_to_desc(irq);
2db87321
UKK
458 int ret = -ENXIO;
459
2f7e99bb
TG
460 if (desc->irq_data.chip->irq_set_wake)
461 ret = desc->irq_data.chip->irq_set_wake(&desc->irq_data, on);
2db87321
UKK
462
463 return ret;
464}
465
ba9a2331 466/**
a0cd9ca2 467 * irq_set_irq_wake - control irq power management wakeup
ba9a2331
TG
468 * @irq: interrupt to control
469 * @on: enable/disable power management wakeup
470 *
15a647eb
DB
471 * Enable/disable power management wakeup mode, which is
472 * disabled by default. Enables and disables must match,
473 * just as they match for non-wakeup mode support.
474 *
475 * Wakeup mode lets this IRQ wake the system from sleep
476 * states like "suspend to RAM".
ba9a2331 477 */
a0cd9ca2 478int irq_set_irq_wake(unsigned int irq, unsigned int on)
ba9a2331 479{
08678b08 480 struct irq_desc *desc = irq_to_desc(irq);
ba9a2331 481 unsigned long flags;
2db87321 482 int ret = 0;
ba9a2331 483
15a647eb
DB
484 /* wakeup-capable irqs can be shared between drivers that
485 * don't need to have the same sleep mode behaviors.
486 */
43abe43c 487 chip_bus_lock(desc);
239007b8 488 raw_spin_lock_irqsave(&desc->lock, flags);
15a647eb 489 if (on) {
2db87321
UKK
490 if (desc->wake_depth++ == 0) {
491 ret = set_irq_wake_real(irq, on);
492 if (ret)
493 desc->wake_depth = 0;
494 else
6d2cd17f 495 desc->istate |= IRQS_WAKEUP;
2db87321 496 }
15a647eb
DB
497 } else {
498 if (desc->wake_depth == 0) {
7a2c4770 499 WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
2db87321
UKK
500 } else if (--desc->wake_depth == 0) {
501 ret = set_irq_wake_real(irq, on);
502 if (ret)
503 desc->wake_depth = 1;
504 else
6d2cd17f 505 desc->istate &= ~IRQS_WAKEUP;
2db87321 506 }
15a647eb 507 }
2db87321 508
239007b8 509 raw_spin_unlock_irqrestore(&desc->lock, flags);
43abe43c 510 chip_bus_sync_unlock(desc);
ba9a2331
TG
511 return ret;
512}
a0cd9ca2 513EXPORT_SYMBOL(irq_set_irq_wake);
ba9a2331 514
1da177e4
LT
515/*
516 * Internal function that tells the architecture code whether a
517 * particular irq has been exclusively allocated or is available
518 * for driver use.
519 */
520int can_request_irq(unsigned int irq, unsigned long irqflags)
521{
d3c60047 522 struct irq_desc *desc = irq_to_desc(irq);
1da177e4 523 struct irqaction *action;
cc8c3b78 524 unsigned long flags;
1da177e4 525
7d94f7ca
YL
526 if (!desc)
527 return 0;
528
1ccb4e61 529 if (!irq_settings_can_request(desc))
1da177e4
LT
530 return 0;
531
cc8c3b78 532 raw_spin_lock_irqsave(&desc->lock, flags);
08678b08 533 action = desc->action;
1da177e4 534 if (action)
3cca53b0 535 if (irqflags & action->flags & IRQF_SHARED)
1da177e4
LT
536 action = NULL;
537
cc8c3b78
TG
538 raw_spin_unlock_irqrestore(&desc->lock, flags);
539
1da177e4
LT
540 return !action;
541}
542
6a6de9ef
TG
543void compat_irq_chip_set_default_handler(struct irq_desc *desc)
544{
545 /*
546 * If the architecture still has not overriden
547 * the flow handler then zap the default. This
548 * should catch incorrect flow-type setting.
549 */
550 if (desc->handle_irq == &handle_bad_irq)
551 desc->handle_irq = NULL;
552}
553
0c5d1eb7 554int __irq_set_trigger(struct irq_desc *desc, unsigned int irq,
b2ba2c30 555 unsigned long flags)
82736f4d 556{
6b8ff312 557 struct irq_chip *chip = desc->irq_data.chip;
d4d5e089 558 int ret, unmask = 0;
82736f4d 559
b2ba2c30 560 if (!chip || !chip->irq_set_type) {
82736f4d
UKK
561 /*
562 * IRQF_TRIGGER_* but the PIC does not support multiple
563 * flow-types?
564 */
3ff68a6a 565 pr_debug("No set_type function for IRQ %d (%s)\n", irq,
82736f4d
UKK
566 chip ? (chip->name ? : "unknown") : "unknown");
567 return 0;
568 }
569
876dbd4c 570 flags &= IRQ_TYPE_SENSE_MASK;
d4d5e089
TG
571
572 if (chip->flags & IRQCHIP_SET_TYPE_MASKED) {
573 if (!(desc->istate & IRQS_MASKED))
574 mask_irq(desc);
575 if (!(desc->istate & IRQS_DISABLED))
576 unmask = 1;
577 }
578
f2b662da 579 /* caller masked out all except trigger mode flags */
b2ba2c30 580 ret = chip->irq_set_type(&desc->irq_data, flags);
82736f4d 581
876dbd4c
TG
582 switch (ret) {
583 case IRQ_SET_MASK_OK:
584 irqd_clear(&desc->irq_data, IRQD_TRIGGER_MASK);
585 irqd_set(&desc->irq_data, flags);
586
587 case IRQ_SET_MASK_OK_NOCOPY:
588 flags = irqd_get_trigger_type(&desc->irq_data);
589 irq_settings_set_trigger_mask(desc, flags);
590 irqd_clear(&desc->irq_data, IRQD_LEVEL);
591 irq_settings_clr_level(desc);
592 if (flags & IRQ_TYPE_LEVEL_MASK) {
593 irq_settings_set_level(desc);
594 irqd_set(&desc->irq_data, IRQD_LEVEL);
595 }
46732475 596
6b8ff312
TG
597 if (chip != desc->irq_data.chip)
598 irq_chip_set_defaults(desc->irq_data.chip);
d4d5e089 599 ret = 0;
876dbd4c
TG
600 default:
601 pr_err("setting trigger mode %lu for irq %u failed (%pF)\n",
602 flags, irq, chip->irq_set_type);
0c5d1eb7 603 }
d4d5e089
TG
604 if (unmask)
605 unmask_irq(desc);
82736f4d
UKK
606 return ret;
607}
608
b25c340c
TG
609/*
610 * Default primary interrupt handler for threaded interrupts. Is
611 * assigned as primary handler when request_threaded_irq is called
612 * with handler == NULL. Useful for oneshot interrupts.
613 */
614static irqreturn_t irq_default_primary_handler(int irq, void *dev_id)
615{
616 return IRQ_WAKE_THREAD;
617}
618
399b5da2
TG
619/*
620 * Primary handler for nested threaded interrupts. Should never be
621 * called.
622 */
623static irqreturn_t irq_nested_primary_handler(int irq, void *dev_id)
624{
625 WARN(1, "Primary handler called for nested irq %d\n", irq);
626 return IRQ_NONE;
627}
628
3aa551c9
TG
629static int irq_wait_for_interrupt(struct irqaction *action)
630{
631 while (!kthread_should_stop()) {
632 set_current_state(TASK_INTERRUPTIBLE);
f48fe81e
TG
633
634 if (test_and_clear_bit(IRQTF_RUNTHREAD,
635 &action->thread_flags)) {
3aa551c9
TG
636 __set_current_state(TASK_RUNNING);
637 return 0;
f48fe81e
TG
638 }
639 schedule();
3aa551c9
TG
640 }
641 return -1;
642}
643
b25c340c
TG
644/*
645 * Oneshot interrupts keep the irq line masked until the threaded
646 * handler finished. unmask if the interrupt has not been disabled and
647 * is marked MASKED.
648 */
649static void irq_finalize_oneshot(unsigned int irq, struct irq_desc *desc)
650{
0b1adaa0 651again:
3876ec9e 652 chip_bus_lock(desc);
239007b8 653 raw_spin_lock_irq(&desc->lock);
0b1adaa0
TG
654
655 /*
656 * Implausible though it may be we need to protect us against
657 * the following scenario:
658 *
659 * The thread is faster done than the hard interrupt handler
660 * on the other CPU. If we unmask the irq line then the
661 * interrupt can come in again and masks the line, leaves due
009b4c3b 662 * to IRQS_INPROGRESS and the irq line is masked forever.
0b1adaa0 663 */
009b4c3b 664 if (unlikely(desc->istate & IRQS_INPROGRESS)) {
0b1adaa0 665 raw_spin_unlock_irq(&desc->lock);
3876ec9e 666 chip_bus_sync_unlock(desc);
0b1adaa0
TG
667 cpu_relax();
668 goto again;
669 }
670
6e40262e
TG
671 if (!(desc->istate & IRQS_DISABLED) && (desc->istate & IRQS_MASKED)) {
672 irq_compat_clr_masked(desc);
673 desc->istate &= ~IRQS_MASKED;
0eda58b7 674 desc->irq_data.chip->irq_unmask(&desc->irq_data);
b25c340c 675 }
239007b8 676 raw_spin_unlock_irq(&desc->lock);
3876ec9e 677 chip_bus_sync_unlock(desc);
b25c340c
TG
678}
679
61f38261 680#ifdef CONFIG_SMP
591d2fb0 681/*
d4d5e089 682 * Check whether we need to chasnge the affinity of the interrupt thread.
591d2fb0
TG
683 */
684static void
685irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action)
686{
687 cpumask_var_t mask;
688
689 if (!test_and_clear_bit(IRQTF_AFFINITY, &action->thread_flags))
690 return;
691
692 /*
693 * In case we are out of memory we set IRQTF_AFFINITY again and
694 * try again next time
695 */
696 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
697 set_bit(IRQTF_AFFINITY, &action->thread_flags);
698 return;
699 }
700
239007b8 701 raw_spin_lock_irq(&desc->lock);
6b8ff312 702 cpumask_copy(mask, desc->irq_data.affinity);
239007b8 703 raw_spin_unlock_irq(&desc->lock);
591d2fb0
TG
704
705 set_cpus_allowed_ptr(current, mask);
706 free_cpumask_var(mask);
707}
61f38261
BP
708#else
709static inline void
710irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) { }
711#endif
591d2fb0 712
3aa551c9
TG
713/*
714 * Interrupt handler thread
715 */
716static int irq_thread(void *data)
717{
c9b5f501 718 static const struct sched_param param = {
fe7de49f
KM
719 .sched_priority = MAX_USER_RT_PRIO/2,
720 };
3aa551c9
TG
721 struct irqaction *action = data;
722 struct irq_desc *desc = irq_to_desc(action->irq);
3d67baec 723 int wake, oneshot = desc->istate & IRQS_ONESHOT;
3aa551c9
TG
724
725 sched_setscheduler(current, SCHED_FIFO, &param);
726 current->irqaction = action;
727
728 while (!irq_wait_for_interrupt(action)) {
729
591d2fb0
TG
730 irq_thread_check_affinity(desc, action);
731
3aa551c9
TG
732 atomic_inc(&desc->threads_active);
733
239007b8 734 raw_spin_lock_irq(&desc->lock);
c1594b77 735 if (unlikely(desc->istate & IRQS_DISABLED)) {
3aa551c9
TG
736 /*
737 * CHECKME: We might need a dedicated
738 * IRQ_THREAD_PENDING flag here, which
739 * retriggers the thread in check_irq_resend()
2a0d6fb3 740 * but AFAICT IRQS_PENDING should be fine as it
3aa551c9
TG
741 * retriggers the interrupt itself --- tglx
742 */
2a0d6fb3
TG
743 irq_compat_set_pending(desc);
744 desc->istate |= IRQS_PENDING;
239007b8 745 raw_spin_unlock_irq(&desc->lock);
3aa551c9 746 } else {
239007b8 747 raw_spin_unlock_irq(&desc->lock);
3aa551c9
TG
748
749 action->thread_fn(action->irq, action->dev_id);
b25c340c
TG
750
751 if (oneshot)
752 irq_finalize_oneshot(action->irq, desc);
3aa551c9
TG
753 }
754
755 wake = atomic_dec_and_test(&desc->threads_active);
756
757 if (wake && waitqueue_active(&desc->wait_for_threads))
758 wake_up(&desc->wait_for_threads);
759 }
760
761 /*
762 * Clear irqaction. Otherwise exit_irq_thread() would make
763 * fuzz about an active irq thread going into nirvana.
764 */
765 current->irqaction = NULL;
766 return 0;
767}
768
769/*
770 * Called from do_exit()
771 */
772void exit_irq_thread(void)
773{
774 struct task_struct *tsk = current;
775
776 if (!tsk->irqaction)
777 return;
778
779 printk(KERN_ERR
780 "exiting task \"%s\" (%d) is an active IRQ thread (irq %d)\n",
781 tsk->comm ? tsk->comm : "", tsk->pid, tsk->irqaction->irq);
782
783 /*
784 * Set the THREAD DIED flag to prevent further wakeups of the
785 * soon to be gone threaded handler.
786 */
787 set_bit(IRQTF_DIED, &tsk->irqaction->flags);
788}
789
1da177e4
LT
790/*
791 * Internal function to register an irqaction - typically used to
792 * allocate special interrupts that are part of the architecture.
793 */
d3c60047 794static int
327ec569 795__setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
1da177e4 796{
f17c7545 797 struct irqaction *old, **old_ptr;
8b126b77 798 const char *old_name = NULL;
1da177e4 799 unsigned long flags;
3b8249e7
TG
800 int ret, nested, shared = 0;
801 cpumask_var_t mask;
1da177e4 802
7d94f7ca 803 if (!desc)
c2b5a251
MW
804 return -EINVAL;
805
6b8ff312 806 if (desc->irq_data.chip == &no_irq_chip)
1da177e4
LT
807 return -ENOSYS;
808 /*
809 * Some drivers like serial.c use request_irq() heavily,
810 * so we have to be careful not to interfere with a
811 * running system.
812 */
3cca53b0 813 if (new->flags & IRQF_SAMPLE_RANDOM) {
1da177e4
LT
814 /*
815 * This function might sleep, we want to call it first,
816 * outside of the atomic block.
817 * Yes, this might clear the entropy pool if the wrong
818 * driver is attempted to be loaded, without actually
819 * installing a new handler, but is this really a problem,
820 * only the sysadmin is able to do this.
821 */
822 rand_initialize_irq(irq);
823 }
824
b25c340c
TG
825 /* Oneshot interrupts are not allowed with shared */
826 if ((new->flags & IRQF_ONESHOT) && (new->flags & IRQF_SHARED))
827 return -EINVAL;
828
3aa551c9 829 /*
399b5da2
TG
830 * Check whether the interrupt nests into another interrupt
831 * thread.
832 */
1ccb4e61 833 nested = irq_settings_is_nested_thread(desc);
399b5da2
TG
834 if (nested) {
835 if (!new->thread_fn)
836 return -EINVAL;
837 /*
838 * Replace the primary handler which was provided from
839 * the driver for non nested interrupt handling by the
840 * dummy function which warns when called.
841 */
842 new->handler = irq_nested_primary_handler;
843 }
844
3aa551c9 845 /*
399b5da2
TG
846 * Create a handler thread when a thread function is supplied
847 * and the interrupt does not nest into another interrupt
848 * thread.
3aa551c9 849 */
399b5da2 850 if (new->thread_fn && !nested) {
3aa551c9
TG
851 struct task_struct *t;
852
853 t = kthread_create(irq_thread, new, "irq/%d-%s", irq,
854 new->name);
855 if (IS_ERR(t))
856 return PTR_ERR(t);
857 /*
858 * We keep the reference to the task struct even if
859 * the thread dies to avoid that the interrupt code
860 * references an already freed task_struct.
861 */
862 get_task_struct(t);
863 new->thread = t;
3aa551c9
TG
864 }
865
3b8249e7
TG
866 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
867 ret = -ENOMEM;
868 goto out_thread;
869 }
870
1da177e4
LT
871 /*
872 * The following block of code has to be executed atomically
873 */
239007b8 874 raw_spin_lock_irqsave(&desc->lock, flags);
f17c7545
IM
875 old_ptr = &desc->action;
876 old = *old_ptr;
06fcb0c6 877 if (old) {
e76de9f8
TG
878 /*
879 * Can't share interrupts unless both agree to and are
880 * the same type (level, edge, polarity). So both flag
3cca53b0 881 * fields must have IRQF_SHARED set and the bits which
e76de9f8
TG
882 * set the trigger type must match.
883 */
3cca53b0 884 if (!((old->flags & new->flags) & IRQF_SHARED) ||
8b126b77
AM
885 ((old->flags ^ new->flags) & IRQF_TRIGGER_MASK)) {
886 old_name = old->name;
f5163427 887 goto mismatch;
8b126b77 888 }
f5163427 889
f5163427 890 /* All handlers must agree on per-cpuness */
3cca53b0
TG
891 if ((old->flags & IRQF_PERCPU) !=
892 (new->flags & IRQF_PERCPU))
f5163427 893 goto mismatch;
1da177e4
LT
894
895 /* add new interrupt at end of irq queue */
896 do {
f17c7545
IM
897 old_ptr = &old->next;
898 old = *old_ptr;
1da177e4
LT
899 } while (old);
900 shared = 1;
901 }
902
1da177e4 903 if (!shared) {
6b8ff312 904 irq_chip_set_defaults(desc->irq_data.chip);
e76de9f8 905
3aa551c9
TG
906 init_waitqueue_head(&desc->wait_for_threads);
907
e76de9f8 908 /* Setup the type (level, edge polarity) if configured: */
3cca53b0 909 if (new->flags & IRQF_TRIGGER_MASK) {
f2b662da
DB
910 ret = __irq_set_trigger(desc, irq,
911 new->flags & IRQF_TRIGGER_MASK);
82736f4d 912
3aa551c9 913 if (ret)
3b8249e7 914 goto out_mask;
e76de9f8
TG
915 } else
916 compat_irq_chip_set_default_handler(desc);
6a6de9ef 917
009b4c3b 918 desc->istate &= ~(IRQS_AUTODETECT | IRQS_SPURIOUS_DISABLED | \
163ef309
TG
919 IRQS_INPROGRESS | IRQS_ONESHOT | \
920 IRQS_WAITING);
94d39e1f 921
a005677b
TG
922 if (new->flags & IRQF_PERCPU) {
923 irqd_set(&desc->irq_data, IRQD_PER_CPU);
924 irq_settings_set_per_cpu(desc);
925 }
6a58fb3b 926
b25c340c 927 if (new->flags & IRQF_ONESHOT)
3d67baec 928 desc->istate |= IRQS_ONESHOT;
b25c340c 929
1ccb4e61 930 if (irq_settings_can_autoenable(desc))
46999238
TG
931 irq_startup(desc);
932 else
e76de9f8
TG
933 /* Undo nested disables: */
934 desc->depth = 1;
18404756 935
612e3684 936 /* Exclude IRQ from balancing if requested */
a005677b
TG
937 if (new->flags & IRQF_NOBALANCING) {
938 irq_settings_set_no_balancing(desc);
939 irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
940 }
612e3684 941
18404756 942 /* Set default affinity mask once everything is setup */
3b8249e7 943 setup_affinity(irq, desc, mask);
0c5d1eb7 944
876dbd4c
TG
945 } else if (new->flags & IRQF_TRIGGER_MASK) {
946 unsigned int nmsk = new->flags & IRQF_TRIGGER_MASK;
947 unsigned int omsk = irq_settings_get_trigger_mask(desc);
948
949 if (nmsk != omsk)
950 /* hope the handler works with current trigger mode */
951 pr_warning("IRQ %d uses trigger mode %u; requested %u\n",
952 irq, nmsk, omsk);
1da177e4 953 }
82736f4d 954
69ab8494 955 new->irq = irq;
f17c7545 956 *old_ptr = new;
82736f4d 957
8528b0f1
LT
958 /* Reset broken irq detection when installing new handler */
959 desc->irq_count = 0;
960 desc->irqs_unhandled = 0;
1adb0850
TG
961
962 /*
963 * Check whether we disabled the irq via the spurious handler
964 * before. Reenable it and give it another chance.
965 */
7acdd53e
TG
966 if (shared && (desc->istate & IRQS_SPURIOUS_DISABLED)) {
967 desc->istate &= ~IRQS_SPURIOUS_DISABLED;
0a0c5168 968 __enable_irq(desc, irq, false);
1adb0850
TG
969 }
970
239007b8 971 raw_spin_unlock_irqrestore(&desc->lock, flags);
1da177e4 972
69ab8494
TG
973 /*
974 * Strictly no need to wake it up, but hung_task complains
975 * when no hard interrupt wakes the thread up.
976 */
977 if (new->thread)
978 wake_up_process(new->thread);
979
2c6927a3 980 register_irq_proc(irq, desc);
1da177e4
LT
981 new->dir = NULL;
982 register_handler_proc(irq, new);
983
984 return 0;
f5163427
DS
985
986mismatch:
3f050447 987#ifdef CONFIG_DEBUG_SHIRQ
3cca53b0 988 if (!(new->flags & IRQF_PROBE_SHARED)) {
e8c4b9d0 989 printk(KERN_ERR "IRQ handler type mismatch for IRQ %d\n", irq);
8b126b77
AM
990 if (old_name)
991 printk(KERN_ERR "current handler: %s\n", old_name);
13e87ec6
AM
992 dump_stack();
993 }
3f050447 994#endif
3aa551c9
TG
995 ret = -EBUSY;
996
3b8249e7
TG
997out_mask:
998 free_cpumask_var(mask);
999
3aa551c9 1000out_thread:
239007b8 1001 raw_spin_unlock_irqrestore(&desc->lock, flags);
3aa551c9
TG
1002 if (new->thread) {
1003 struct task_struct *t = new->thread;
1004
1005 new->thread = NULL;
1006 if (likely(!test_bit(IRQTF_DIED, &new->thread_flags)))
1007 kthread_stop(t);
1008 put_task_struct(t);
1009 }
1010 return ret;
1da177e4
LT
1011}
1012
d3c60047
TG
1013/**
1014 * setup_irq - setup an interrupt
1015 * @irq: Interrupt line to setup
1016 * @act: irqaction for the interrupt
1017 *
1018 * Used to statically setup interrupts in the early boot process.
1019 */
1020int setup_irq(unsigned int irq, struct irqaction *act)
1021{
986c011d 1022 int retval;
d3c60047
TG
1023 struct irq_desc *desc = irq_to_desc(irq);
1024
986c011d
DD
1025 chip_bus_lock(desc);
1026 retval = __setup_irq(irq, desc, act);
1027 chip_bus_sync_unlock(desc);
1028
1029 return retval;
d3c60047 1030}
eb53b4e8 1031EXPORT_SYMBOL_GPL(setup_irq);
d3c60047 1032
cbf94f06
MD
1033 /*
1034 * Internal function to unregister an irqaction - used to free
1035 * regular and special interrupts that are part of the architecture.
1da177e4 1036 */
cbf94f06 1037static struct irqaction *__free_irq(unsigned int irq, void *dev_id)
1da177e4 1038{
d3c60047 1039 struct irq_desc *desc = irq_to_desc(irq);
f17c7545 1040 struct irqaction *action, **action_ptr;
1da177e4
LT
1041 unsigned long flags;
1042
ae88a23b 1043 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
7d94f7ca 1044
7d94f7ca 1045 if (!desc)
f21cfb25 1046 return NULL;
1da177e4 1047
239007b8 1048 raw_spin_lock_irqsave(&desc->lock, flags);
ae88a23b
IM
1049
1050 /*
1051 * There can be multiple actions per IRQ descriptor, find the right
1052 * one based on the dev_id:
1053 */
f17c7545 1054 action_ptr = &desc->action;
1da177e4 1055 for (;;) {
f17c7545 1056 action = *action_ptr;
1da177e4 1057
ae88a23b
IM
1058 if (!action) {
1059 WARN(1, "Trying to free already-free IRQ %d\n", irq);
239007b8 1060 raw_spin_unlock_irqrestore(&desc->lock, flags);
1da177e4 1061
f21cfb25 1062 return NULL;
ae88a23b 1063 }
1da177e4 1064
8316e381
IM
1065 if (action->dev_id == dev_id)
1066 break;
f17c7545 1067 action_ptr = &action->next;
ae88a23b 1068 }
dbce706e 1069
ae88a23b 1070 /* Found it - now remove it from the list of entries: */
f17c7545 1071 *action_ptr = action->next;
ae88a23b
IM
1072
1073 /* Currently used only by UML, might disappear one day: */
b77d6adc 1074#ifdef CONFIG_IRQ_RELEASE_METHOD
6b8ff312
TG
1075 if (desc->irq_data.chip->release)
1076 desc->irq_data.chip->release(irq, dev_id);
b77d6adc 1077#endif
dbce706e 1078
ae88a23b 1079 /* If this was the last handler, shut down the IRQ line: */
46999238
TG
1080 if (!desc->action)
1081 irq_shutdown(desc);
3aa551c9 1082
e7a297b0
PWJ
1083#ifdef CONFIG_SMP
1084 /* make sure affinity_hint is cleaned up */
1085 if (WARN_ON_ONCE(desc->affinity_hint))
1086 desc->affinity_hint = NULL;
1087#endif
1088
239007b8 1089 raw_spin_unlock_irqrestore(&desc->lock, flags);
ae88a23b
IM
1090
1091 unregister_handler_proc(irq, action);
1092
1093 /* Make sure it's not being used on another CPU: */
1094 synchronize_irq(irq);
1da177e4 1095
70edcd77 1096#ifdef CONFIG_DEBUG_SHIRQ
ae88a23b
IM
1097 /*
1098 * It's a shared IRQ -- the driver ought to be prepared for an IRQ
1099 * event to happen even now it's being freed, so let's make sure that
1100 * is so by doing an extra call to the handler ....
1101 *
1102 * ( We do this after actually deregistering it, to make sure that a
1103 * 'real' IRQ doesn't run in * parallel with our fake. )
1104 */
1105 if (action->flags & IRQF_SHARED) {
1106 local_irq_save(flags);
1107 action->handler(irq, dev_id);
1108 local_irq_restore(flags);
1da177e4 1109 }
ae88a23b 1110#endif
2d860ad7
LT
1111
1112 if (action->thread) {
1113 if (!test_bit(IRQTF_DIED, &action->thread_flags))
1114 kthread_stop(action->thread);
1115 put_task_struct(action->thread);
1116 }
1117
f21cfb25
MD
1118 return action;
1119}
1120
cbf94f06
MD
1121/**
1122 * remove_irq - free an interrupt
1123 * @irq: Interrupt line to free
1124 * @act: irqaction for the interrupt
1125 *
1126 * Used to remove interrupts statically setup by the early boot process.
1127 */
1128void remove_irq(unsigned int irq, struct irqaction *act)
1129{
1130 __free_irq(irq, act->dev_id);
1131}
eb53b4e8 1132EXPORT_SYMBOL_GPL(remove_irq);
cbf94f06 1133
f21cfb25
MD
1134/**
1135 * free_irq - free an interrupt allocated with request_irq
1136 * @irq: Interrupt line to free
1137 * @dev_id: Device identity to free
1138 *
1139 * Remove an interrupt handler. The handler is removed and if the
1140 * interrupt line is no longer in use by any driver it is disabled.
1141 * On a shared IRQ the caller must ensure the interrupt is disabled
1142 * on the card it drives before calling this function. The function
1143 * does not return until any executing interrupts for this IRQ
1144 * have completed.
1145 *
1146 * This function must not be called from interrupt context.
1147 */
1148void free_irq(unsigned int irq, void *dev_id)
1149{
70aedd24
TG
1150 struct irq_desc *desc = irq_to_desc(irq);
1151
1152 if (!desc)
1153 return;
1154
cd7eab44
BH
1155#ifdef CONFIG_SMP
1156 if (WARN_ON(desc->affinity_notify))
1157 desc->affinity_notify = NULL;
1158#endif
1159
3876ec9e 1160 chip_bus_lock(desc);
cbf94f06 1161 kfree(__free_irq(irq, dev_id));
3876ec9e 1162 chip_bus_sync_unlock(desc);
1da177e4 1163}
1da177e4
LT
1164EXPORT_SYMBOL(free_irq);
1165
1166/**
3aa551c9 1167 * request_threaded_irq - allocate an interrupt line
1da177e4 1168 * @irq: Interrupt line to allocate
3aa551c9
TG
1169 * @handler: Function to be called when the IRQ occurs.
1170 * Primary handler for threaded interrupts
b25c340c
TG
1171 * If NULL and thread_fn != NULL the default
1172 * primary handler is installed
f48fe81e
TG
1173 * @thread_fn: Function called from the irq handler thread
1174 * If NULL, no irq thread is created
1da177e4
LT
1175 * @irqflags: Interrupt type flags
1176 * @devname: An ascii name for the claiming device
1177 * @dev_id: A cookie passed back to the handler function
1178 *
1179 * This call allocates interrupt resources and enables the
1180 * interrupt line and IRQ handling. From the point this
1181 * call is made your handler function may be invoked. Since
1182 * your handler function must clear any interrupt the board
1183 * raises, you must take care both to initialise your hardware
1184 * and to set up the interrupt handler in the right order.
1185 *
3aa551c9
TG
1186 * If you want to set up a threaded irq handler for your device
1187 * then you need to supply @handler and @thread_fn. @handler ist
1188 * still called in hard interrupt context and has to check
1189 * whether the interrupt originates from the device. If yes it
1190 * needs to disable the interrupt on the device and return
39a2eddb 1191 * IRQ_WAKE_THREAD which will wake up the handler thread and run
3aa551c9
TG
1192 * @thread_fn. This split handler design is necessary to support
1193 * shared interrupts.
1194 *
1da177e4
LT
1195 * Dev_id must be globally unique. Normally the address of the
1196 * device data structure is used as the cookie. Since the handler
1197 * receives this value it makes sense to use it.
1198 *
1199 * If your interrupt is shared you must pass a non NULL dev_id
1200 * as this is required when freeing the interrupt.
1201 *
1202 * Flags:
1203 *
3cca53b0 1204 * IRQF_SHARED Interrupt is shared
3cca53b0 1205 * IRQF_SAMPLE_RANDOM The interrupt can be used for entropy
0c5d1eb7 1206 * IRQF_TRIGGER_* Specify active edge(s) or level
1da177e4
LT
1207 *
1208 */
3aa551c9
TG
1209int request_threaded_irq(unsigned int irq, irq_handler_t handler,
1210 irq_handler_t thread_fn, unsigned long irqflags,
1211 const char *devname, void *dev_id)
1da177e4 1212{
06fcb0c6 1213 struct irqaction *action;
08678b08 1214 struct irq_desc *desc;
d3c60047 1215 int retval;
1da177e4
LT
1216
1217 /*
1218 * Sanity-check: shared interrupts must pass in a real dev-ID,
1219 * otherwise we'll have trouble later trying to figure out
1220 * which interrupt is which (messes up the interrupt freeing
1221 * logic etc).
1222 */
3cca53b0 1223 if ((irqflags & IRQF_SHARED) && !dev_id)
1da177e4 1224 return -EINVAL;
7d94f7ca 1225
cb5bc832 1226 desc = irq_to_desc(irq);
7d94f7ca 1227 if (!desc)
1da177e4 1228 return -EINVAL;
7d94f7ca 1229
1ccb4e61 1230 if (!irq_settings_can_request(desc))
6550c775 1231 return -EINVAL;
b25c340c
TG
1232
1233 if (!handler) {
1234 if (!thread_fn)
1235 return -EINVAL;
1236 handler = irq_default_primary_handler;
1237 }
1da177e4 1238
45535732 1239 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1da177e4
LT
1240 if (!action)
1241 return -ENOMEM;
1242
1243 action->handler = handler;
3aa551c9 1244 action->thread_fn = thread_fn;
1da177e4 1245 action->flags = irqflags;
1da177e4 1246 action->name = devname;
1da177e4
LT
1247 action->dev_id = dev_id;
1248
3876ec9e 1249 chip_bus_lock(desc);
d3c60047 1250 retval = __setup_irq(irq, desc, action);
3876ec9e 1251 chip_bus_sync_unlock(desc);
70aedd24 1252
377bf1e4
AV
1253 if (retval)
1254 kfree(action);
1255
6d83f94d 1256#ifdef CONFIG_DEBUG_SHIRQ_FIXME
6ce51c43 1257 if (!retval && (irqflags & IRQF_SHARED)) {
a304e1b8
DW
1258 /*
1259 * It's a shared IRQ -- the driver ought to be prepared for it
1260 * to happen immediately, so let's make sure....
377bf1e4
AV
1261 * We disable the irq to make sure that a 'real' IRQ doesn't
1262 * run in parallel with our fake.
a304e1b8 1263 */
59845b1f 1264 unsigned long flags;
a304e1b8 1265
377bf1e4 1266 disable_irq(irq);
59845b1f 1267 local_irq_save(flags);
377bf1e4 1268
59845b1f 1269 handler(irq, dev_id);
377bf1e4 1270
59845b1f 1271 local_irq_restore(flags);
377bf1e4 1272 enable_irq(irq);
a304e1b8
DW
1273 }
1274#endif
1da177e4
LT
1275 return retval;
1276}
3aa551c9 1277EXPORT_SYMBOL(request_threaded_irq);
ae731f8d
MZ
1278
1279/**
1280 * request_any_context_irq - allocate an interrupt line
1281 * @irq: Interrupt line to allocate
1282 * @handler: Function to be called when the IRQ occurs.
1283 * Threaded handler for threaded interrupts.
1284 * @flags: Interrupt type flags
1285 * @name: An ascii name for the claiming device
1286 * @dev_id: A cookie passed back to the handler function
1287 *
1288 * This call allocates interrupt resources and enables the
1289 * interrupt line and IRQ handling. It selects either a
1290 * hardirq or threaded handling method depending on the
1291 * context.
1292 *
1293 * On failure, it returns a negative value. On success,
1294 * it returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED.
1295 */
1296int request_any_context_irq(unsigned int irq, irq_handler_t handler,
1297 unsigned long flags, const char *name, void *dev_id)
1298{
1299 struct irq_desc *desc = irq_to_desc(irq);
1300 int ret;
1301
1302 if (!desc)
1303 return -EINVAL;
1304
1ccb4e61 1305 if (irq_settings_is_nested_thread(desc)) {
ae731f8d
MZ
1306 ret = request_threaded_irq(irq, NULL, handler,
1307 flags, name, dev_id);
1308 return !ret ? IRQC_IS_NESTED : ret;
1309 }
1310
1311 ret = request_irq(irq, handler, flags, name, dev_id);
1312 return !ret ? IRQC_IS_HARDIRQ : ret;
1313}
1314EXPORT_SYMBOL_GPL(request_any_context_irq);
This page took 0.585824 seconds and 5 git commands to generate.