task_work_add: generic process-context callbacks
[deliverable/linux.git] / kernel / irq / manage.c
CommitLineData
1da177e4
LT
1/*
2 * linux/kernel/irq/manage.c
3 *
a34db9b2
IM
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006 Thomas Gleixner
1da177e4
LT
6 *
7 * This file contains driver APIs to the irq subsystem.
8 */
9
10#include <linux/irq.h>
3aa551c9 11#include <linux/kthread.h>
1da177e4
LT
12#include <linux/module.h>
13#include <linux/random.h>
14#include <linux/interrupt.h>
1aeb272c 15#include <linux/slab.h>
3aa551c9 16#include <linux/sched.h>
1da177e4
LT
17
18#include "internals.h"
19
8d32a307
TG
20#ifdef CONFIG_IRQ_FORCED_THREADING
21__read_mostly bool force_irqthreads;
22
23static int __init setup_forced_irqthreads(char *arg)
24{
25 force_irqthreads = true;
26 return 0;
27}
28early_param("threadirqs", setup_forced_irqthreads);
29#endif
30
1da177e4
LT
31/**
32 * synchronize_irq - wait for pending IRQ handlers (on other CPUs)
1e5d5331 33 * @irq: interrupt number to wait for
1da177e4
LT
34 *
35 * This function waits for any pending IRQ handlers for this interrupt
36 * to complete before returning. If you use this function while
37 * holding a resource the IRQ handler may need you will deadlock.
38 *
39 * This function may be called - with care - from IRQ context.
40 */
41void synchronize_irq(unsigned int irq)
42{
cb5bc832 43 struct irq_desc *desc = irq_to_desc(irq);
32f4125e 44 bool inprogress;
1da177e4 45
7d94f7ca 46 if (!desc)
c2b5a251
MW
47 return;
48
a98ce5c6
HX
49 do {
50 unsigned long flags;
51
52 /*
53 * Wait until we're out of the critical section. This might
54 * give the wrong answer due to the lack of memory barriers.
55 */
32f4125e 56 while (irqd_irq_inprogress(&desc->irq_data))
a98ce5c6
HX
57 cpu_relax();
58
59 /* Ok, that indicated we're done: double-check carefully. */
239007b8 60 raw_spin_lock_irqsave(&desc->lock, flags);
32f4125e 61 inprogress = irqd_irq_inprogress(&desc->irq_data);
239007b8 62 raw_spin_unlock_irqrestore(&desc->lock, flags);
a98ce5c6
HX
63
64 /* Oops, that failed? */
32f4125e 65 } while (inprogress);
3aa551c9
TG
66
67 /*
68 * We made sure that no hardirq handler is running. Now verify
69 * that no threaded handlers are active.
70 */
71 wait_event(desc->wait_for_threads, !atomic_read(&desc->threads_active));
1da177e4 72}
1da177e4
LT
73EXPORT_SYMBOL(synchronize_irq);
74
3aa551c9
TG
75#ifdef CONFIG_SMP
76cpumask_var_t irq_default_affinity;
77
771ee3b0
TG
78/**
79 * irq_can_set_affinity - Check if the affinity of a given irq can be set
80 * @irq: Interrupt to check
81 *
82 */
83int irq_can_set_affinity(unsigned int irq)
84{
08678b08 85 struct irq_desc *desc = irq_to_desc(irq);
771ee3b0 86
bce43032
TG
87 if (!desc || !irqd_can_balance(&desc->irq_data) ||
88 !desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity)
771ee3b0
TG
89 return 0;
90
91 return 1;
92}
93
591d2fb0
TG
94/**
95 * irq_set_thread_affinity - Notify irq threads to adjust affinity
96 * @desc: irq descriptor which has affitnity changed
97 *
98 * We just set IRQTF_AFFINITY and delegate the affinity setting
99 * to the interrupt thread itself. We can not call
100 * set_cpus_allowed_ptr() here as we hold desc->lock and this
101 * code can be called from hard interrupt context.
102 */
103void irq_set_thread_affinity(struct irq_desc *desc)
3aa551c9
TG
104{
105 struct irqaction *action = desc->action;
106
107 while (action) {
108 if (action->thread)
591d2fb0 109 set_bit(IRQTF_AFFINITY, &action->thread_flags);
3aa551c9
TG
110 action = action->next;
111 }
112}
113
1fa46f1f 114#ifdef CONFIG_GENERIC_PENDING_IRQ
0ef5ca1e 115static inline bool irq_can_move_pcntxt(struct irq_data *data)
1fa46f1f 116{
0ef5ca1e 117 return irqd_can_move_in_process_context(data);
1fa46f1f 118}
0ef5ca1e 119static inline bool irq_move_pending(struct irq_data *data)
1fa46f1f 120{
0ef5ca1e 121 return irqd_is_setaffinity_pending(data);
1fa46f1f
TG
122}
123static inline void
124irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask)
125{
126 cpumask_copy(desc->pending_mask, mask);
127}
128static inline void
129irq_get_pending(struct cpumask *mask, struct irq_desc *desc)
130{
131 cpumask_copy(mask, desc->pending_mask);
132}
133#else
0ef5ca1e 134static inline bool irq_can_move_pcntxt(struct irq_data *data) { return true; }
cd22c0e4 135static inline bool irq_move_pending(struct irq_data *data) { return false; }
1fa46f1f
TG
136static inline void
137irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask) { }
138static inline void
139irq_get_pending(struct cpumask *mask, struct irq_desc *desc) { }
140#endif
141
c2d0c555 142int __irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask)
771ee3b0 143{
c2d0c555
DD
144 struct irq_chip *chip = irq_data_get_irq_chip(data);
145 struct irq_desc *desc = irq_data_to_desc(data);
1fa46f1f 146 int ret = 0;
771ee3b0 147
c2d0c555 148 if (!chip || !chip->irq_set_affinity)
771ee3b0
TG
149 return -EINVAL;
150
0ef5ca1e 151 if (irq_can_move_pcntxt(data)) {
c2d0c555 152 ret = chip->irq_set_affinity(data, mask, false);
3b8249e7
TG
153 switch (ret) {
154 case IRQ_SET_MASK_OK:
c2d0c555 155 cpumask_copy(data->affinity, mask);
3b8249e7 156 case IRQ_SET_MASK_OK_NOCOPY:
591d2fb0 157 irq_set_thread_affinity(desc);
3b8249e7 158 ret = 0;
57b150cc 159 }
1fa46f1f 160 } else {
c2d0c555 161 irqd_set_move_pending(data);
1fa46f1f 162 irq_copy_pending(desc, mask);
57b150cc 163 }
1fa46f1f 164
cd7eab44
BH
165 if (desc->affinity_notify) {
166 kref_get(&desc->affinity_notify->kref);
167 schedule_work(&desc->affinity_notify->work);
168 }
c2d0c555
DD
169 irqd_set(data, IRQD_AFFINITY_SET);
170
171 return ret;
172}
173
174/**
175 * irq_set_affinity - Set the irq affinity of a given irq
176 * @irq: Interrupt to set affinity
30398bf6 177 * @mask: cpumask
c2d0c555
DD
178 *
179 */
180int irq_set_affinity(unsigned int irq, const struct cpumask *mask)
181{
182 struct irq_desc *desc = irq_to_desc(irq);
183 unsigned long flags;
184 int ret;
185
186 if (!desc)
187 return -EINVAL;
188
189 raw_spin_lock_irqsave(&desc->lock, flags);
190 ret = __irq_set_affinity_locked(irq_desc_get_irq_data(desc), mask);
239007b8 191 raw_spin_unlock_irqrestore(&desc->lock, flags);
1fa46f1f 192 return ret;
771ee3b0
TG
193}
194
e7a297b0
PWJ
195int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m)
196{
e7a297b0 197 unsigned long flags;
31d9d9b6 198 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
e7a297b0
PWJ
199
200 if (!desc)
201 return -EINVAL;
e7a297b0 202 desc->affinity_hint = m;
02725e74 203 irq_put_desc_unlock(desc, flags);
e7a297b0
PWJ
204 return 0;
205}
206EXPORT_SYMBOL_GPL(irq_set_affinity_hint);
207
cd7eab44
BH
208static void irq_affinity_notify(struct work_struct *work)
209{
210 struct irq_affinity_notify *notify =
211 container_of(work, struct irq_affinity_notify, work);
212 struct irq_desc *desc = irq_to_desc(notify->irq);
213 cpumask_var_t cpumask;
214 unsigned long flags;
215
1fa46f1f 216 if (!desc || !alloc_cpumask_var(&cpumask, GFP_KERNEL))
cd7eab44
BH
217 goto out;
218
219 raw_spin_lock_irqsave(&desc->lock, flags);
0ef5ca1e 220 if (irq_move_pending(&desc->irq_data))
1fa46f1f 221 irq_get_pending(cpumask, desc);
cd7eab44 222 else
1fb0ef31 223 cpumask_copy(cpumask, desc->irq_data.affinity);
cd7eab44
BH
224 raw_spin_unlock_irqrestore(&desc->lock, flags);
225
226 notify->notify(notify, cpumask);
227
228 free_cpumask_var(cpumask);
229out:
230 kref_put(&notify->kref, notify->release);
231}
232
233/**
234 * irq_set_affinity_notifier - control notification of IRQ affinity changes
235 * @irq: Interrupt for which to enable/disable notification
236 * @notify: Context for notification, or %NULL to disable
237 * notification. Function pointers must be initialised;
238 * the other fields will be initialised by this function.
239 *
240 * Must be called in process context. Notification may only be enabled
241 * after the IRQ is allocated and must be disabled before the IRQ is
242 * freed using free_irq().
243 */
244int
245irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify)
246{
247 struct irq_desc *desc = irq_to_desc(irq);
248 struct irq_affinity_notify *old_notify;
249 unsigned long flags;
250
251 /* The release function is promised process context */
252 might_sleep();
253
254 if (!desc)
255 return -EINVAL;
256
257 /* Complete initialisation of *notify */
258 if (notify) {
259 notify->irq = irq;
260 kref_init(&notify->kref);
261 INIT_WORK(&notify->work, irq_affinity_notify);
262 }
263
264 raw_spin_lock_irqsave(&desc->lock, flags);
265 old_notify = desc->affinity_notify;
266 desc->affinity_notify = notify;
267 raw_spin_unlock_irqrestore(&desc->lock, flags);
268
269 if (old_notify)
270 kref_put(&old_notify->kref, old_notify->release);
271
272 return 0;
273}
274EXPORT_SYMBOL_GPL(irq_set_affinity_notifier);
275
18404756
MK
276#ifndef CONFIG_AUTO_IRQ_AFFINITY
277/*
278 * Generic version of the affinity autoselector.
279 */
3b8249e7
TG
280static int
281setup_affinity(unsigned int irq, struct irq_desc *desc, struct cpumask *mask)
18404756 282{
35e857cb 283 struct irq_chip *chip = irq_desc_get_chip(desc);
569bda8d 284 struct cpumask *set = irq_default_affinity;
241fc640 285 int ret, node = desc->irq_data.node;
569bda8d 286
b008207c 287 /* Excludes PER_CPU and NO_BALANCE interrupts */
18404756
MK
288 if (!irq_can_set_affinity(irq))
289 return 0;
290
f6d87f4b
TG
291 /*
292 * Preserve an userspace affinity setup, but make sure that
293 * one of the targets is online.
294 */
2bdd1055 295 if (irqd_has_set(&desc->irq_data, IRQD_AFFINITY_SET)) {
569bda8d
TG
296 if (cpumask_intersects(desc->irq_data.affinity,
297 cpu_online_mask))
298 set = desc->irq_data.affinity;
0c6f8a8b 299 else
2bdd1055 300 irqd_clear(&desc->irq_data, IRQD_AFFINITY_SET);
f6d87f4b 301 }
18404756 302
3b8249e7 303 cpumask_and(mask, cpu_online_mask, set);
241fc640
PB
304 if (node != NUMA_NO_NODE) {
305 const struct cpumask *nodemask = cpumask_of_node(node);
306
307 /* make sure at least one of the cpus in nodemask is online */
308 if (cpumask_intersects(mask, nodemask))
309 cpumask_and(mask, mask, nodemask);
310 }
3b8249e7
TG
311 ret = chip->irq_set_affinity(&desc->irq_data, mask, false);
312 switch (ret) {
313 case IRQ_SET_MASK_OK:
314 cpumask_copy(desc->irq_data.affinity, mask);
315 case IRQ_SET_MASK_OK_NOCOPY:
316 irq_set_thread_affinity(desc);
317 }
18404756
MK
318 return 0;
319}
f6d87f4b 320#else
3b8249e7
TG
321static inline int
322setup_affinity(unsigned int irq, struct irq_desc *d, struct cpumask *mask)
f6d87f4b
TG
323{
324 return irq_select_affinity(irq);
325}
18404756
MK
326#endif
327
f6d87f4b
TG
328/*
329 * Called when affinity is set via /proc/irq
330 */
3b8249e7 331int irq_select_affinity_usr(unsigned int irq, struct cpumask *mask)
f6d87f4b
TG
332{
333 struct irq_desc *desc = irq_to_desc(irq);
334 unsigned long flags;
335 int ret;
336
239007b8 337 raw_spin_lock_irqsave(&desc->lock, flags);
3b8249e7 338 ret = setup_affinity(irq, desc, mask);
239007b8 339 raw_spin_unlock_irqrestore(&desc->lock, flags);
f6d87f4b
TG
340 return ret;
341}
342
343#else
3b8249e7
TG
344static inline int
345setup_affinity(unsigned int irq, struct irq_desc *desc, struct cpumask *mask)
f6d87f4b
TG
346{
347 return 0;
348}
1da177e4
LT
349#endif
350
0a0c5168
RW
351void __disable_irq(struct irq_desc *desc, unsigned int irq, bool suspend)
352{
353 if (suspend) {
685fd0b4 354 if (!desc->action || (desc->action->flags & IRQF_NO_SUSPEND))
0a0c5168 355 return;
c531e836 356 desc->istate |= IRQS_SUSPENDED;
0a0c5168
RW
357 }
358
3aae994f 359 if (!desc->depth++)
87923470 360 irq_disable(desc);
0a0c5168
RW
361}
362
02725e74
TG
363static int __disable_irq_nosync(unsigned int irq)
364{
365 unsigned long flags;
31d9d9b6 366 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
02725e74
TG
367
368 if (!desc)
369 return -EINVAL;
370 __disable_irq(desc, irq, false);
371 irq_put_desc_busunlock(desc, flags);
372 return 0;
373}
374
1da177e4
LT
375/**
376 * disable_irq_nosync - disable an irq without waiting
377 * @irq: Interrupt to disable
378 *
379 * Disable the selected interrupt line. Disables and Enables are
380 * nested.
381 * Unlike disable_irq(), this function does not ensure existing
382 * instances of the IRQ handler have completed before returning.
383 *
384 * This function may be called from IRQ context.
385 */
386void disable_irq_nosync(unsigned int irq)
387{
02725e74 388 __disable_irq_nosync(irq);
1da177e4 389}
1da177e4
LT
390EXPORT_SYMBOL(disable_irq_nosync);
391
392/**
393 * disable_irq - disable an irq and wait for completion
394 * @irq: Interrupt to disable
395 *
396 * Disable the selected interrupt line. Enables and Disables are
397 * nested.
398 * This function waits for any pending IRQ handlers for this interrupt
399 * to complete before returning. If you use this function while
400 * holding a resource the IRQ handler may need you will deadlock.
401 *
402 * This function may be called - with care - from IRQ context.
403 */
404void disable_irq(unsigned int irq)
405{
02725e74 406 if (!__disable_irq_nosync(irq))
1da177e4
LT
407 synchronize_irq(irq);
408}
1da177e4
LT
409EXPORT_SYMBOL(disable_irq);
410
0a0c5168 411void __enable_irq(struct irq_desc *desc, unsigned int irq, bool resume)
1adb0850 412{
dc5f219e 413 if (resume) {
c531e836 414 if (!(desc->istate & IRQS_SUSPENDED)) {
dc5f219e
TG
415 if (!desc->action)
416 return;
417 if (!(desc->action->flags & IRQF_FORCE_RESUME))
418 return;
419 /* Pretend that it got disabled ! */
420 desc->depth++;
421 }
c531e836 422 desc->istate &= ~IRQS_SUSPENDED;
dc5f219e 423 }
0a0c5168 424
1adb0850
TG
425 switch (desc->depth) {
426 case 0:
0a0c5168 427 err_out:
b8c512f6 428 WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n", irq);
1adb0850
TG
429 break;
430 case 1: {
c531e836 431 if (desc->istate & IRQS_SUSPENDED)
0a0c5168 432 goto err_out;
1adb0850 433 /* Prevent probing on this irq: */
1ccb4e61 434 irq_settings_set_noprobe(desc);
3aae994f 435 irq_enable(desc);
1adb0850
TG
436 check_irq_resend(desc, irq);
437 /* fall-through */
438 }
439 default:
440 desc->depth--;
441 }
442}
443
1da177e4
LT
444/**
445 * enable_irq - enable handling of an irq
446 * @irq: Interrupt to enable
447 *
448 * Undoes the effect of one call to disable_irq(). If this
449 * matches the last disable, processing of interrupts on this
450 * IRQ line is re-enabled.
451 *
70aedd24 452 * This function may be called from IRQ context only when
6b8ff312 453 * desc->irq_data.chip->bus_lock and desc->chip->bus_sync_unlock are NULL !
1da177e4
LT
454 */
455void enable_irq(unsigned int irq)
456{
1da177e4 457 unsigned long flags;
31d9d9b6 458 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
1da177e4 459
7d94f7ca 460 if (!desc)
c2b5a251 461 return;
50f7c032
TG
462 if (WARN(!desc->irq_data.chip,
463 KERN_ERR "enable_irq before setup/request_irq: irq %u\n", irq))
02725e74 464 goto out;
2656c366 465
0a0c5168 466 __enable_irq(desc, irq, false);
02725e74
TG
467out:
468 irq_put_desc_busunlock(desc, flags);
1da177e4 469}
1da177e4
LT
470EXPORT_SYMBOL(enable_irq);
471
0c5d1eb7 472static int set_irq_wake_real(unsigned int irq, unsigned int on)
2db87321 473{
08678b08 474 struct irq_desc *desc = irq_to_desc(irq);
2db87321
UKK
475 int ret = -ENXIO;
476
60f96b41
SS
477 if (irq_desc_get_chip(desc)->flags & IRQCHIP_SKIP_SET_WAKE)
478 return 0;
479
2f7e99bb
TG
480 if (desc->irq_data.chip->irq_set_wake)
481 ret = desc->irq_data.chip->irq_set_wake(&desc->irq_data, on);
2db87321
UKK
482
483 return ret;
484}
485
ba9a2331 486/**
a0cd9ca2 487 * irq_set_irq_wake - control irq power management wakeup
ba9a2331
TG
488 * @irq: interrupt to control
489 * @on: enable/disable power management wakeup
490 *
15a647eb
DB
491 * Enable/disable power management wakeup mode, which is
492 * disabled by default. Enables and disables must match,
493 * just as they match for non-wakeup mode support.
494 *
495 * Wakeup mode lets this IRQ wake the system from sleep
496 * states like "suspend to RAM".
ba9a2331 497 */
a0cd9ca2 498int irq_set_irq_wake(unsigned int irq, unsigned int on)
ba9a2331 499{
ba9a2331 500 unsigned long flags;
31d9d9b6 501 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
2db87321 502 int ret = 0;
ba9a2331 503
13863a66
JJ
504 if (!desc)
505 return -EINVAL;
506
15a647eb
DB
507 /* wakeup-capable irqs can be shared between drivers that
508 * don't need to have the same sleep mode behaviors.
509 */
15a647eb 510 if (on) {
2db87321
UKK
511 if (desc->wake_depth++ == 0) {
512 ret = set_irq_wake_real(irq, on);
513 if (ret)
514 desc->wake_depth = 0;
515 else
7f94226f 516 irqd_set(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 517 }
15a647eb
DB
518 } else {
519 if (desc->wake_depth == 0) {
7a2c4770 520 WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
2db87321
UKK
521 } else if (--desc->wake_depth == 0) {
522 ret = set_irq_wake_real(irq, on);
523 if (ret)
524 desc->wake_depth = 1;
525 else
7f94226f 526 irqd_clear(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 527 }
15a647eb 528 }
02725e74 529 irq_put_desc_busunlock(desc, flags);
ba9a2331
TG
530 return ret;
531}
a0cd9ca2 532EXPORT_SYMBOL(irq_set_irq_wake);
ba9a2331 533
1da177e4
LT
534/*
535 * Internal function that tells the architecture code whether a
536 * particular irq has been exclusively allocated or is available
537 * for driver use.
538 */
539int can_request_irq(unsigned int irq, unsigned long irqflags)
540{
cc8c3b78 541 unsigned long flags;
31d9d9b6 542 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
02725e74 543 int canrequest = 0;
1da177e4 544
7d94f7ca
YL
545 if (!desc)
546 return 0;
547
02725e74
TG
548 if (irq_settings_can_request(desc)) {
549 if (desc->action)
550 if (irqflags & desc->action->flags & IRQF_SHARED)
551 canrequest =1;
552 }
553 irq_put_desc_unlock(desc, flags);
554 return canrequest;
1da177e4
LT
555}
556
0c5d1eb7 557int __irq_set_trigger(struct irq_desc *desc, unsigned int irq,
b2ba2c30 558 unsigned long flags)
82736f4d 559{
6b8ff312 560 struct irq_chip *chip = desc->irq_data.chip;
d4d5e089 561 int ret, unmask = 0;
82736f4d 562
b2ba2c30 563 if (!chip || !chip->irq_set_type) {
82736f4d
UKK
564 /*
565 * IRQF_TRIGGER_* but the PIC does not support multiple
566 * flow-types?
567 */
f5d89470
TG
568 pr_debug("genirq: No set_type function for IRQ %d (%s)\n", irq,
569 chip ? (chip->name ? : "unknown") : "unknown");
82736f4d
UKK
570 return 0;
571 }
572
876dbd4c 573 flags &= IRQ_TYPE_SENSE_MASK;
d4d5e089
TG
574
575 if (chip->flags & IRQCHIP_SET_TYPE_MASKED) {
32f4125e 576 if (!irqd_irq_masked(&desc->irq_data))
d4d5e089 577 mask_irq(desc);
32f4125e 578 if (!irqd_irq_disabled(&desc->irq_data))
d4d5e089
TG
579 unmask = 1;
580 }
581
f2b662da 582 /* caller masked out all except trigger mode flags */
b2ba2c30 583 ret = chip->irq_set_type(&desc->irq_data, flags);
82736f4d 584
876dbd4c
TG
585 switch (ret) {
586 case IRQ_SET_MASK_OK:
587 irqd_clear(&desc->irq_data, IRQD_TRIGGER_MASK);
588 irqd_set(&desc->irq_data, flags);
589
590 case IRQ_SET_MASK_OK_NOCOPY:
591 flags = irqd_get_trigger_type(&desc->irq_data);
592 irq_settings_set_trigger_mask(desc, flags);
593 irqd_clear(&desc->irq_data, IRQD_LEVEL);
594 irq_settings_clr_level(desc);
595 if (flags & IRQ_TYPE_LEVEL_MASK) {
596 irq_settings_set_level(desc);
597 irqd_set(&desc->irq_data, IRQD_LEVEL);
598 }
46732475 599
d4d5e089 600 ret = 0;
8fff39e0 601 break;
876dbd4c 602 default:
f5d89470 603 pr_err("genirq: Setting trigger mode %lu for irq %u failed (%pF)\n",
876dbd4c 604 flags, irq, chip->irq_set_type);
0c5d1eb7 605 }
d4d5e089
TG
606 if (unmask)
607 unmask_irq(desc);
82736f4d
UKK
608 return ret;
609}
610
b25c340c
TG
611/*
612 * Default primary interrupt handler for threaded interrupts. Is
613 * assigned as primary handler when request_threaded_irq is called
614 * with handler == NULL. Useful for oneshot interrupts.
615 */
616static irqreturn_t irq_default_primary_handler(int irq, void *dev_id)
617{
618 return IRQ_WAKE_THREAD;
619}
620
399b5da2
TG
621/*
622 * Primary handler for nested threaded interrupts. Should never be
623 * called.
624 */
625static irqreturn_t irq_nested_primary_handler(int irq, void *dev_id)
626{
627 WARN(1, "Primary handler called for nested irq %d\n", irq);
628 return IRQ_NONE;
629}
630
3aa551c9
TG
631static int irq_wait_for_interrupt(struct irqaction *action)
632{
550acb19
IY
633 set_current_state(TASK_INTERRUPTIBLE);
634
3aa551c9 635 while (!kthread_should_stop()) {
f48fe81e
TG
636
637 if (test_and_clear_bit(IRQTF_RUNTHREAD,
638 &action->thread_flags)) {
3aa551c9
TG
639 __set_current_state(TASK_RUNNING);
640 return 0;
f48fe81e
TG
641 }
642 schedule();
550acb19 643 set_current_state(TASK_INTERRUPTIBLE);
3aa551c9 644 }
550acb19 645 __set_current_state(TASK_RUNNING);
3aa551c9
TG
646 return -1;
647}
648
b25c340c
TG
649/*
650 * Oneshot interrupts keep the irq line masked until the threaded
651 * handler finished. unmask if the interrupt has not been disabled and
652 * is marked MASKED.
653 */
b5faba21 654static void irq_finalize_oneshot(struct irq_desc *desc,
f3f79e38 655 struct irqaction *action)
b25c340c 656{
b5faba21
TG
657 if (!(desc->istate & IRQS_ONESHOT))
658 return;
0b1adaa0 659again:
3876ec9e 660 chip_bus_lock(desc);
239007b8 661 raw_spin_lock_irq(&desc->lock);
0b1adaa0
TG
662
663 /*
664 * Implausible though it may be we need to protect us against
665 * the following scenario:
666 *
667 * The thread is faster done than the hard interrupt handler
668 * on the other CPU. If we unmask the irq line then the
669 * interrupt can come in again and masks the line, leaves due
009b4c3b 670 * to IRQS_INPROGRESS and the irq line is masked forever.
b5faba21
TG
671 *
672 * This also serializes the state of shared oneshot handlers
673 * versus "desc->threads_onehsot |= action->thread_mask;" in
674 * irq_wake_thread(). See the comment there which explains the
675 * serialization.
0b1adaa0 676 */
32f4125e 677 if (unlikely(irqd_irq_inprogress(&desc->irq_data))) {
0b1adaa0 678 raw_spin_unlock_irq(&desc->lock);
3876ec9e 679 chip_bus_sync_unlock(desc);
0b1adaa0
TG
680 cpu_relax();
681 goto again;
682 }
683
b5faba21
TG
684 /*
685 * Now check again, whether the thread should run. Otherwise
686 * we would clear the threads_oneshot bit of this thread which
687 * was just set.
688 */
f3f79e38 689 if (test_bit(IRQTF_RUNTHREAD, &action->thread_flags))
b5faba21
TG
690 goto out_unlock;
691
692 desc->threads_oneshot &= ~action->thread_mask;
693
32f4125e
TG
694 if (!desc->threads_oneshot && !irqd_irq_disabled(&desc->irq_data) &&
695 irqd_irq_masked(&desc->irq_data))
696 unmask_irq(desc);
697
b5faba21 698out_unlock:
239007b8 699 raw_spin_unlock_irq(&desc->lock);
3876ec9e 700 chip_bus_sync_unlock(desc);
b25c340c
TG
701}
702
61f38261 703#ifdef CONFIG_SMP
591d2fb0 704/*
d4d5e089 705 * Check whether we need to chasnge the affinity of the interrupt thread.
591d2fb0
TG
706 */
707static void
708irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action)
709{
710 cpumask_var_t mask;
711
712 if (!test_and_clear_bit(IRQTF_AFFINITY, &action->thread_flags))
713 return;
714
715 /*
716 * In case we are out of memory we set IRQTF_AFFINITY again and
717 * try again next time
718 */
719 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
720 set_bit(IRQTF_AFFINITY, &action->thread_flags);
721 return;
722 }
723
239007b8 724 raw_spin_lock_irq(&desc->lock);
6b8ff312 725 cpumask_copy(mask, desc->irq_data.affinity);
239007b8 726 raw_spin_unlock_irq(&desc->lock);
591d2fb0
TG
727
728 set_cpus_allowed_ptr(current, mask);
729 free_cpumask_var(mask);
730}
61f38261
BP
731#else
732static inline void
733irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) { }
734#endif
591d2fb0 735
8d32a307
TG
736/*
737 * Interrupts which are not explicitely requested as threaded
738 * interrupts rely on the implicit bh/preempt disable of the hard irq
739 * context. So we need to disable bh here to avoid deadlocks and other
740 * side effects.
741 */
3a43e05f 742static irqreturn_t
8d32a307
TG
743irq_forced_thread_fn(struct irq_desc *desc, struct irqaction *action)
744{
3a43e05f
SAS
745 irqreturn_t ret;
746
8d32a307 747 local_bh_disable();
3a43e05f 748 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 749 irq_finalize_oneshot(desc, action);
8d32a307 750 local_bh_enable();
3a43e05f 751 return ret;
8d32a307
TG
752}
753
754/*
755 * Interrupts explicitely requested as threaded interupts want to be
756 * preemtible - many of them need to sleep and wait for slow busses to
757 * complete.
758 */
3a43e05f
SAS
759static irqreturn_t irq_thread_fn(struct irq_desc *desc,
760 struct irqaction *action)
8d32a307 761{
3a43e05f
SAS
762 irqreturn_t ret;
763
764 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 765 irq_finalize_oneshot(desc, action);
3a43e05f 766 return ret;
8d32a307
TG
767}
768
7140ea19
IY
769static void wake_threads_waitq(struct irq_desc *desc)
770{
771 if (atomic_dec_and_test(&desc->threads_active) &&
772 waitqueue_active(&desc->wait_for_threads))
773 wake_up(&desc->wait_for_threads);
774}
775
3aa551c9
TG
776/*
777 * Interrupt handler thread
778 */
779static int irq_thread(void *data)
780{
c9b5f501 781 static const struct sched_param param = {
fe7de49f
KM
782 .sched_priority = MAX_USER_RT_PRIO/2,
783 };
3aa551c9
TG
784 struct irqaction *action = data;
785 struct irq_desc *desc = irq_to_desc(action->irq);
3a43e05f
SAS
786 irqreturn_t (*handler_fn)(struct irq_desc *desc,
787 struct irqaction *action);
3aa551c9 788
540b60e2 789 if (force_irqthreads && test_bit(IRQTF_FORCED_THREAD,
8d32a307
TG
790 &action->thread_flags))
791 handler_fn = irq_forced_thread_fn;
792 else
793 handler_fn = irq_thread_fn;
794
3aa551c9 795 sched_setscheduler(current, SCHED_FIFO, &param);
4bcdf1d0 796 current->irq_thread = 1;
3aa551c9
TG
797
798 while (!irq_wait_for_interrupt(action)) {
7140ea19 799 irqreturn_t action_ret;
3aa551c9 800
591d2fb0
TG
801 irq_thread_check_affinity(desc, action);
802
7140ea19
IY
803 action_ret = handler_fn(desc, action);
804 if (!noirqdebug)
805 note_interrupt(action->irq, desc, action_ret);
3aa551c9 806
7140ea19 807 wake_threads_waitq(desc);
3aa551c9
TG
808 }
809
7140ea19
IY
810 /*
811 * This is the regular exit path. __free_irq() is stopping the
812 * thread via kthread_stop() after calling
813 * synchronize_irq(). So neither IRQTF_RUNTHREAD nor the
e04268b0
TG
814 * oneshot mask bit can be set. We cannot verify that as we
815 * cannot touch the oneshot mask at this point anymore as
816 * __setup_irq() might have given out currents thread_mask
817 * again.
7140ea19 818 *
4bcdf1d0 819 * Clear irq_thread. Otherwise exit_irq_thread() would make
3aa551c9
TG
820 * fuzz about an active irq thread going into nirvana.
821 */
4bcdf1d0 822 current->irq_thread = 0;
3aa551c9
TG
823 return 0;
824}
825
826/*
827 * Called from do_exit()
828 */
829void exit_irq_thread(void)
830{
831 struct task_struct *tsk = current;
b5faba21 832 struct irq_desc *desc;
4bcdf1d0 833 struct irqaction *action;
3aa551c9 834
4bcdf1d0 835 if (!tsk->irq_thread)
3aa551c9
TG
836 return;
837
4bcdf1d0
AG
838 action = kthread_data(tsk);
839
f5d89470 840 pr_err("genirq: exiting task \"%s\" (%d) is an active IRQ thread (irq %d)\n",
4bcdf1d0 841 tsk->comm ? tsk->comm : "", tsk->pid, action->irq);
3aa551c9 842
4bcdf1d0 843 desc = irq_to_desc(action->irq);
b5faba21 844
7140ea19
IY
845 /*
846 * If IRQTF_RUNTHREAD is set, we need to decrement
847 * desc->threads_active and wake possible waiters.
848 */
849 if (test_and_clear_bit(IRQTF_RUNTHREAD, &action->thread_flags))
850 wake_threads_waitq(desc);
851
5234ffb9 852 /* Prevent a stale desc->threads_oneshot */
f3f79e38 853 irq_finalize_oneshot(desc, action);
3aa551c9
TG
854}
855
8d32a307
TG
856static void irq_setup_forced_threading(struct irqaction *new)
857{
858 if (!force_irqthreads)
859 return;
860 if (new->flags & (IRQF_NO_THREAD | IRQF_PERCPU | IRQF_ONESHOT))
861 return;
862
863 new->flags |= IRQF_ONESHOT;
864
865 if (!new->thread_fn) {
866 set_bit(IRQTF_FORCED_THREAD, &new->thread_flags);
867 new->thread_fn = new->handler;
868 new->handler = irq_default_primary_handler;
869 }
870}
871
1da177e4
LT
872/*
873 * Internal function to register an irqaction - typically used to
874 * allocate special interrupts that are part of the architecture.
875 */
d3c60047 876static int
327ec569 877__setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
1da177e4 878{
f17c7545 879 struct irqaction *old, **old_ptr;
b5faba21 880 unsigned long flags, thread_mask = 0;
3b8249e7
TG
881 int ret, nested, shared = 0;
882 cpumask_var_t mask;
1da177e4 883
7d94f7ca 884 if (!desc)
c2b5a251
MW
885 return -EINVAL;
886
6b8ff312 887 if (desc->irq_data.chip == &no_irq_chip)
1da177e4 888 return -ENOSYS;
b6873807
SAS
889 if (!try_module_get(desc->owner))
890 return -ENODEV;
1da177e4
LT
891 /*
892 * Some drivers like serial.c use request_irq() heavily,
893 * so we have to be careful not to interfere with a
894 * running system.
895 */
3cca53b0 896 if (new->flags & IRQF_SAMPLE_RANDOM) {
1da177e4
LT
897 /*
898 * This function might sleep, we want to call it first,
899 * outside of the atomic block.
900 * Yes, this might clear the entropy pool if the wrong
901 * driver is attempted to be loaded, without actually
902 * installing a new handler, but is this really a problem,
903 * only the sysadmin is able to do this.
904 */
905 rand_initialize_irq(irq);
906 }
907
3aa551c9 908 /*
399b5da2
TG
909 * Check whether the interrupt nests into another interrupt
910 * thread.
911 */
1ccb4e61 912 nested = irq_settings_is_nested_thread(desc);
399b5da2 913 if (nested) {
b6873807
SAS
914 if (!new->thread_fn) {
915 ret = -EINVAL;
916 goto out_mput;
917 }
399b5da2
TG
918 /*
919 * Replace the primary handler which was provided from
920 * the driver for non nested interrupt handling by the
921 * dummy function which warns when called.
922 */
923 new->handler = irq_nested_primary_handler;
8d32a307 924 } else {
7f1b1244
PM
925 if (irq_settings_can_thread(desc))
926 irq_setup_forced_threading(new);
399b5da2
TG
927 }
928
3aa551c9 929 /*
399b5da2
TG
930 * Create a handler thread when a thread function is supplied
931 * and the interrupt does not nest into another interrupt
932 * thread.
3aa551c9 933 */
399b5da2 934 if (new->thread_fn && !nested) {
3aa551c9
TG
935 struct task_struct *t;
936
937 t = kthread_create(irq_thread, new, "irq/%d-%s", irq,
938 new->name);
b6873807
SAS
939 if (IS_ERR(t)) {
940 ret = PTR_ERR(t);
941 goto out_mput;
942 }
3aa551c9
TG
943 /*
944 * We keep the reference to the task struct even if
945 * the thread dies to avoid that the interrupt code
946 * references an already freed task_struct.
947 */
948 get_task_struct(t);
949 new->thread = t;
3aa551c9
TG
950 }
951
3b8249e7
TG
952 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
953 ret = -ENOMEM;
954 goto out_thread;
955 }
956
1da177e4
LT
957 /*
958 * The following block of code has to be executed atomically
959 */
239007b8 960 raw_spin_lock_irqsave(&desc->lock, flags);
f17c7545
IM
961 old_ptr = &desc->action;
962 old = *old_ptr;
06fcb0c6 963 if (old) {
e76de9f8
TG
964 /*
965 * Can't share interrupts unless both agree to and are
966 * the same type (level, edge, polarity). So both flag
3cca53b0 967 * fields must have IRQF_SHARED set and the bits which
9d591edd
TG
968 * set the trigger type must match. Also all must
969 * agree on ONESHOT.
e76de9f8 970 */
3cca53b0 971 if (!((old->flags & new->flags) & IRQF_SHARED) ||
9d591edd 972 ((old->flags ^ new->flags) & IRQF_TRIGGER_MASK) ||
f5d89470 973 ((old->flags ^ new->flags) & IRQF_ONESHOT))
f5163427
DS
974 goto mismatch;
975
f5163427 976 /* All handlers must agree on per-cpuness */
3cca53b0
TG
977 if ((old->flags & IRQF_PERCPU) !=
978 (new->flags & IRQF_PERCPU))
f5163427 979 goto mismatch;
1da177e4
LT
980
981 /* add new interrupt at end of irq queue */
982 do {
52abb700
TG
983 /*
984 * Or all existing action->thread_mask bits,
985 * so we can find the next zero bit for this
986 * new action.
987 */
b5faba21 988 thread_mask |= old->thread_mask;
f17c7545
IM
989 old_ptr = &old->next;
990 old = *old_ptr;
1da177e4
LT
991 } while (old);
992 shared = 1;
993 }
994
b5faba21 995 /*
52abb700
TG
996 * Setup the thread mask for this irqaction for ONESHOT. For
997 * !ONESHOT irqs the thread mask is 0 so we can avoid a
998 * conditional in irq_wake_thread().
b5faba21 999 */
52abb700
TG
1000 if (new->flags & IRQF_ONESHOT) {
1001 /*
1002 * Unlikely to have 32 resp 64 irqs sharing one line,
1003 * but who knows.
1004 */
1005 if (thread_mask == ~0UL) {
1006 ret = -EBUSY;
1007 goto out_mask;
1008 }
1009 /*
1010 * The thread_mask for the action is or'ed to
1011 * desc->thread_active to indicate that the
1012 * IRQF_ONESHOT thread handler has been woken, but not
1013 * yet finished. The bit is cleared when a thread
1014 * completes. When all threads of a shared interrupt
1015 * line have completed desc->threads_active becomes
1016 * zero and the interrupt line is unmasked. See
1017 * handle.c:irq_wake_thread() for further information.
1018 *
1019 * If no thread is woken by primary (hard irq context)
1020 * interrupt handlers, then desc->threads_active is
1021 * also checked for zero to unmask the irq line in the
1022 * affected hard irq flow handlers
1023 * (handle_[fasteoi|level]_irq).
1024 *
1025 * The new action gets the first zero bit of
1026 * thread_mask assigned. See the loop above which or's
1027 * all existing action->thread_mask bits.
1028 */
1029 new->thread_mask = 1 << ffz(thread_mask);
1c6c6952
TG
1030
1031 } else if (new->handler == irq_default_primary_handler) {
1032 /*
1033 * The interrupt was requested with handler = NULL, so
1034 * we use the default primary handler for it. But it
1035 * does not have the oneshot flag set. In combination
1036 * with level interrupts this is deadly, because the
1037 * default primary handler just wakes the thread, then
1038 * the irq lines is reenabled, but the device still
1039 * has the level irq asserted. Rinse and repeat....
1040 *
1041 * While this works for edge type interrupts, we play
1042 * it safe and reject unconditionally because we can't
1043 * say for sure which type this interrupt really
1044 * has. The type flags are unreliable as the
1045 * underlying chip implementation can override them.
1046 */
1047 pr_err("genirq: Threaded irq requested with handler=NULL and !ONESHOT for irq %d\n",
1048 irq);
1049 ret = -EINVAL;
1050 goto out_mask;
b5faba21 1051 }
b5faba21 1052
1da177e4 1053 if (!shared) {
3aa551c9
TG
1054 init_waitqueue_head(&desc->wait_for_threads);
1055
e76de9f8 1056 /* Setup the type (level, edge polarity) if configured: */
3cca53b0 1057 if (new->flags & IRQF_TRIGGER_MASK) {
f2b662da
DB
1058 ret = __irq_set_trigger(desc, irq,
1059 new->flags & IRQF_TRIGGER_MASK);
82736f4d 1060
3aa551c9 1061 if (ret)
3b8249e7 1062 goto out_mask;
091738a2 1063 }
6a6de9ef 1064
009b4c3b 1065 desc->istate &= ~(IRQS_AUTODETECT | IRQS_SPURIOUS_DISABLED | \
32f4125e
TG
1066 IRQS_ONESHOT | IRQS_WAITING);
1067 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
94d39e1f 1068
a005677b
TG
1069 if (new->flags & IRQF_PERCPU) {
1070 irqd_set(&desc->irq_data, IRQD_PER_CPU);
1071 irq_settings_set_per_cpu(desc);
1072 }
6a58fb3b 1073
b25c340c 1074 if (new->flags & IRQF_ONESHOT)
3d67baec 1075 desc->istate |= IRQS_ONESHOT;
b25c340c 1076
1ccb4e61 1077 if (irq_settings_can_autoenable(desc))
b4bc724e 1078 irq_startup(desc, true);
46999238 1079 else
e76de9f8
TG
1080 /* Undo nested disables: */
1081 desc->depth = 1;
18404756 1082
612e3684 1083 /* Exclude IRQ from balancing if requested */
a005677b
TG
1084 if (new->flags & IRQF_NOBALANCING) {
1085 irq_settings_set_no_balancing(desc);
1086 irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
1087 }
612e3684 1088
18404756 1089 /* Set default affinity mask once everything is setup */
3b8249e7 1090 setup_affinity(irq, desc, mask);
0c5d1eb7 1091
876dbd4c
TG
1092 } else if (new->flags & IRQF_TRIGGER_MASK) {
1093 unsigned int nmsk = new->flags & IRQF_TRIGGER_MASK;
1094 unsigned int omsk = irq_settings_get_trigger_mask(desc);
1095
1096 if (nmsk != omsk)
1097 /* hope the handler works with current trigger mode */
f5d89470 1098 pr_warning("genirq: irq %d uses trigger mode %u; requested %u\n",
876dbd4c 1099 irq, nmsk, omsk);
1da177e4 1100 }
82736f4d 1101
69ab8494 1102 new->irq = irq;
f17c7545 1103 *old_ptr = new;
82736f4d 1104
8528b0f1
LT
1105 /* Reset broken irq detection when installing new handler */
1106 desc->irq_count = 0;
1107 desc->irqs_unhandled = 0;
1adb0850
TG
1108
1109 /*
1110 * Check whether we disabled the irq via the spurious handler
1111 * before. Reenable it and give it another chance.
1112 */
7acdd53e
TG
1113 if (shared && (desc->istate & IRQS_SPURIOUS_DISABLED)) {
1114 desc->istate &= ~IRQS_SPURIOUS_DISABLED;
0a0c5168 1115 __enable_irq(desc, irq, false);
1adb0850
TG
1116 }
1117
239007b8 1118 raw_spin_unlock_irqrestore(&desc->lock, flags);
1da177e4 1119
69ab8494
TG
1120 /*
1121 * Strictly no need to wake it up, but hung_task complains
1122 * when no hard interrupt wakes the thread up.
1123 */
1124 if (new->thread)
1125 wake_up_process(new->thread);
1126
2c6927a3 1127 register_irq_proc(irq, desc);
1da177e4
LT
1128 new->dir = NULL;
1129 register_handler_proc(irq, new);
4f5058c3 1130 free_cpumask_var(mask);
1da177e4
LT
1131
1132 return 0;
f5163427
DS
1133
1134mismatch:
3cca53b0 1135 if (!(new->flags & IRQF_PROBE_SHARED)) {
f5d89470
TG
1136 pr_err("genirq: Flags mismatch irq %d. %08x (%s) vs. %08x (%s)\n",
1137 irq, new->flags, new->name, old->flags, old->name);
1138#ifdef CONFIG_DEBUG_SHIRQ
13e87ec6 1139 dump_stack();
3f050447 1140#endif
f5d89470 1141 }
3aa551c9
TG
1142 ret = -EBUSY;
1143
3b8249e7 1144out_mask:
1c389795 1145 raw_spin_unlock_irqrestore(&desc->lock, flags);
3b8249e7
TG
1146 free_cpumask_var(mask);
1147
3aa551c9 1148out_thread:
3aa551c9
TG
1149 if (new->thread) {
1150 struct task_struct *t = new->thread;
1151
1152 new->thread = NULL;
05d74efa 1153 kthread_stop(t);
3aa551c9
TG
1154 put_task_struct(t);
1155 }
b6873807
SAS
1156out_mput:
1157 module_put(desc->owner);
3aa551c9 1158 return ret;
1da177e4
LT
1159}
1160
d3c60047
TG
1161/**
1162 * setup_irq - setup an interrupt
1163 * @irq: Interrupt line to setup
1164 * @act: irqaction for the interrupt
1165 *
1166 * Used to statically setup interrupts in the early boot process.
1167 */
1168int setup_irq(unsigned int irq, struct irqaction *act)
1169{
986c011d 1170 int retval;
d3c60047
TG
1171 struct irq_desc *desc = irq_to_desc(irq);
1172
31d9d9b6
MZ
1173 if (WARN_ON(irq_settings_is_per_cpu_devid(desc)))
1174 return -EINVAL;
986c011d
DD
1175 chip_bus_lock(desc);
1176 retval = __setup_irq(irq, desc, act);
1177 chip_bus_sync_unlock(desc);
1178
1179 return retval;
d3c60047 1180}
eb53b4e8 1181EXPORT_SYMBOL_GPL(setup_irq);
d3c60047 1182
31d9d9b6 1183/*
cbf94f06
MD
1184 * Internal function to unregister an irqaction - used to free
1185 * regular and special interrupts that are part of the architecture.
1da177e4 1186 */
cbf94f06 1187static struct irqaction *__free_irq(unsigned int irq, void *dev_id)
1da177e4 1188{
d3c60047 1189 struct irq_desc *desc = irq_to_desc(irq);
f17c7545 1190 struct irqaction *action, **action_ptr;
1da177e4
LT
1191 unsigned long flags;
1192
ae88a23b 1193 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
7d94f7ca 1194
7d94f7ca 1195 if (!desc)
f21cfb25 1196 return NULL;
1da177e4 1197
239007b8 1198 raw_spin_lock_irqsave(&desc->lock, flags);
ae88a23b
IM
1199
1200 /*
1201 * There can be multiple actions per IRQ descriptor, find the right
1202 * one based on the dev_id:
1203 */
f17c7545 1204 action_ptr = &desc->action;
1da177e4 1205 for (;;) {
f17c7545 1206 action = *action_ptr;
1da177e4 1207
ae88a23b
IM
1208 if (!action) {
1209 WARN(1, "Trying to free already-free IRQ %d\n", irq);
239007b8 1210 raw_spin_unlock_irqrestore(&desc->lock, flags);
1da177e4 1211
f21cfb25 1212 return NULL;
ae88a23b 1213 }
1da177e4 1214
8316e381
IM
1215 if (action->dev_id == dev_id)
1216 break;
f17c7545 1217 action_ptr = &action->next;
ae88a23b 1218 }
dbce706e 1219
ae88a23b 1220 /* Found it - now remove it from the list of entries: */
f17c7545 1221 *action_ptr = action->next;
ae88a23b 1222
ae88a23b 1223 /* If this was the last handler, shut down the IRQ line: */
46999238
TG
1224 if (!desc->action)
1225 irq_shutdown(desc);
3aa551c9 1226
e7a297b0
PWJ
1227#ifdef CONFIG_SMP
1228 /* make sure affinity_hint is cleaned up */
1229 if (WARN_ON_ONCE(desc->affinity_hint))
1230 desc->affinity_hint = NULL;
1231#endif
1232
239007b8 1233 raw_spin_unlock_irqrestore(&desc->lock, flags);
ae88a23b
IM
1234
1235 unregister_handler_proc(irq, action);
1236
1237 /* Make sure it's not being used on another CPU: */
1238 synchronize_irq(irq);
1da177e4 1239
70edcd77 1240#ifdef CONFIG_DEBUG_SHIRQ
ae88a23b
IM
1241 /*
1242 * It's a shared IRQ -- the driver ought to be prepared for an IRQ
1243 * event to happen even now it's being freed, so let's make sure that
1244 * is so by doing an extra call to the handler ....
1245 *
1246 * ( We do this after actually deregistering it, to make sure that a
1247 * 'real' IRQ doesn't run in * parallel with our fake. )
1248 */
1249 if (action->flags & IRQF_SHARED) {
1250 local_irq_save(flags);
1251 action->handler(irq, dev_id);
1252 local_irq_restore(flags);
1da177e4 1253 }
ae88a23b 1254#endif
2d860ad7
LT
1255
1256 if (action->thread) {
05d74efa 1257 kthread_stop(action->thread);
2d860ad7
LT
1258 put_task_struct(action->thread);
1259 }
1260
b6873807 1261 module_put(desc->owner);
f21cfb25
MD
1262 return action;
1263}
1264
cbf94f06
MD
1265/**
1266 * remove_irq - free an interrupt
1267 * @irq: Interrupt line to free
1268 * @act: irqaction for the interrupt
1269 *
1270 * Used to remove interrupts statically setup by the early boot process.
1271 */
1272void remove_irq(unsigned int irq, struct irqaction *act)
1273{
31d9d9b6
MZ
1274 struct irq_desc *desc = irq_to_desc(irq);
1275
1276 if (desc && !WARN_ON(irq_settings_is_per_cpu_devid(desc)))
1277 __free_irq(irq, act->dev_id);
cbf94f06 1278}
eb53b4e8 1279EXPORT_SYMBOL_GPL(remove_irq);
cbf94f06 1280
f21cfb25
MD
1281/**
1282 * free_irq - free an interrupt allocated with request_irq
1283 * @irq: Interrupt line to free
1284 * @dev_id: Device identity to free
1285 *
1286 * Remove an interrupt handler. The handler is removed and if the
1287 * interrupt line is no longer in use by any driver it is disabled.
1288 * On a shared IRQ the caller must ensure the interrupt is disabled
1289 * on the card it drives before calling this function. The function
1290 * does not return until any executing interrupts for this IRQ
1291 * have completed.
1292 *
1293 * This function must not be called from interrupt context.
1294 */
1295void free_irq(unsigned int irq, void *dev_id)
1296{
70aedd24
TG
1297 struct irq_desc *desc = irq_to_desc(irq);
1298
31d9d9b6 1299 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
70aedd24
TG
1300 return;
1301
cd7eab44
BH
1302#ifdef CONFIG_SMP
1303 if (WARN_ON(desc->affinity_notify))
1304 desc->affinity_notify = NULL;
1305#endif
1306
3876ec9e 1307 chip_bus_lock(desc);
cbf94f06 1308 kfree(__free_irq(irq, dev_id));
3876ec9e 1309 chip_bus_sync_unlock(desc);
1da177e4 1310}
1da177e4
LT
1311EXPORT_SYMBOL(free_irq);
1312
1313/**
3aa551c9 1314 * request_threaded_irq - allocate an interrupt line
1da177e4 1315 * @irq: Interrupt line to allocate
3aa551c9
TG
1316 * @handler: Function to be called when the IRQ occurs.
1317 * Primary handler for threaded interrupts
b25c340c
TG
1318 * If NULL and thread_fn != NULL the default
1319 * primary handler is installed
f48fe81e
TG
1320 * @thread_fn: Function called from the irq handler thread
1321 * If NULL, no irq thread is created
1da177e4
LT
1322 * @irqflags: Interrupt type flags
1323 * @devname: An ascii name for the claiming device
1324 * @dev_id: A cookie passed back to the handler function
1325 *
1326 * This call allocates interrupt resources and enables the
1327 * interrupt line and IRQ handling. From the point this
1328 * call is made your handler function may be invoked. Since
1329 * your handler function must clear any interrupt the board
1330 * raises, you must take care both to initialise your hardware
1331 * and to set up the interrupt handler in the right order.
1332 *
3aa551c9 1333 * If you want to set up a threaded irq handler for your device
6d21af4f 1334 * then you need to supply @handler and @thread_fn. @handler is
3aa551c9
TG
1335 * still called in hard interrupt context and has to check
1336 * whether the interrupt originates from the device. If yes it
1337 * needs to disable the interrupt on the device and return
39a2eddb 1338 * IRQ_WAKE_THREAD which will wake up the handler thread and run
3aa551c9
TG
1339 * @thread_fn. This split handler design is necessary to support
1340 * shared interrupts.
1341 *
1da177e4
LT
1342 * Dev_id must be globally unique. Normally the address of the
1343 * device data structure is used as the cookie. Since the handler
1344 * receives this value it makes sense to use it.
1345 *
1346 * If your interrupt is shared you must pass a non NULL dev_id
1347 * as this is required when freeing the interrupt.
1348 *
1349 * Flags:
1350 *
3cca53b0 1351 * IRQF_SHARED Interrupt is shared
3cca53b0 1352 * IRQF_SAMPLE_RANDOM The interrupt can be used for entropy
0c5d1eb7 1353 * IRQF_TRIGGER_* Specify active edge(s) or level
1da177e4
LT
1354 *
1355 */
3aa551c9
TG
1356int request_threaded_irq(unsigned int irq, irq_handler_t handler,
1357 irq_handler_t thread_fn, unsigned long irqflags,
1358 const char *devname, void *dev_id)
1da177e4 1359{
06fcb0c6 1360 struct irqaction *action;
08678b08 1361 struct irq_desc *desc;
d3c60047 1362 int retval;
1da177e4
LT
1363
1364 /*
1365 * Sanity-check: shared interrupts must pass in a real dev-ID,
1366 * otherwise we'll have trouble later trying to figure out
1367 * which interrupt is which (messes up the interrupt freeing
1368 * logic etc).
1369 */
3cca53b0 1370 if ((irqflags & IRQF_SHARED) && !dev_id)
1da177e4 1371 return -EINVAL;
7d94f7ca 1372
cb5bc832 1373 desc = irq_to_desc(irq);
7d94f7ca 1374 if (!desc)
1da177e4 1375 return -EINVAL;
7d94f7ca 1376
31d9d9b6
MZ
1377 if (!irq_settings_can_request(desc) ||
1378 WARN_ON(irq_settings_is_per_cpu_devid(desc)))
6550c775 1379 return -EINVAL;
b25c340c
TG
1380
1381 if (!handler) {
1382 if (!thread_fn)
1383 return -EINVAL;
1384 handler = irq_default_primary_handler;
1385 }
1da177e4 1386
45535732 1387 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1da177e4
LT
1388 if (!action)
1389 return -ENOMEM;
1390
1391 action->handler = handler;
3aa551c9 1392 action->thread_fn = thread_fn;
1da177e4 1393 action->flags = irqflags;
1da177e4 1394 action->name = devname;
1da177e4
LT
1395 action->dev_id = dev_id;
1396
3876ec9e 1397 chip_bus_lock(desc);
d3c60047 1398 retval = __setup_irq(irq, desc, action);
3876ec9e 1399 chip_bus_sync_unlock(desc);
70aedd24 1400
377bf1e4
AV
1401 if (retval)
1402 kfree(action);
1403
6d83f94d 1404#ifdef CONFIG_DEBUG_SHIRQ_FIXME
6ce51c43 1405 if (!retval && (irqflags & IRQF_SHARED)) {
a304e1b8
DW
1406 /*
1407 * It's a shared IRQ -- the driver ought to be prepared for it
1408 * to happen immediately, so let's make sure....
377bf1e4
AV
1409 * We disable the irq to make sure that a 'real' IRQ doesn't
1410 * run in parallel with our fake.
a304e1b8 1411 */
59845b1f 1412 unsigned long flags;
a304e1b8 1413
377bf1e4 1414 disable_irq(irq);
59845b1f 1415 local_irq_save(flags);
377bf1e4 1416
59845b1f 1417 handler(irq, dev_id);
377bf1e4 1418
59845b1f 1419 local_irq_restore(flags);
377bf1e4 1420 enable_irq(irq);
a304e1b8
DW
1421 }
1422#endif
1da177e4
LT
1423 return retval;
1424}
3aa551c9 1425EXPORT_SYMBOL(request_threaded_irq);
ae731f8d
MZ
1426
1427/**
1428 * request_any_context_irq - allocate an interrupt line
1429 * @irq: Interrupt line to allocate
1430 * @handler: Function to be called when the IRQ occurs.
1431 * Threaded handler for threaded interrupts.
1432 * @flags: Interrupt type flags
1433 * @name: An ascii name for the claiming device
1434 * @dev_id: A cookie passed back to the handler function
1435 *
1436 * This call allocates interrupt resources and enables the
1437 * interrupt line and IRQ handling. It selects either a
1438 * hardirq or threaded handling method depending on the
1439 * context.
1440 *
1441 * On failure, it returns a negative value. On success,
1442 * it returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED.
1443 */
1444int request_any_context_irq(unsigned int irq, irq_handler_t handler,
1445 unsigned long flags, const char *name, void *dev_id)
1446{
1447 struct irq_desc *desc = irq_to_desc(irq);
1448 int ret;
1449
1450 if (!desc)
1451 return -EINVAL;
1452
1ccb4e61 1453 if (irq_settings_is_nested_thread(desc)) {
ae731f8d
MZ
1454 ret = request_threaded_irq(irq, NULL, handler,
1455 flags, name, dev_id);
1456 return !ret ? IRQC_IS_NESTED : ret;
1457 }
1458
1459 ret = request_irq(irq, handler, flags, name, dev_id);
1460 return !ret ? IRQC_IS_HARDIRQ : ret;
1461}
1462EXPORT_SYMBOL_GPL(request_any_context_irq);
31d9d9b6 1463
1e7c5fd2 1464void enable_percpu_irq(unsigned int irq, unsigned int type)
31d9d9b6
MZ
1465{
1466 unsigned int cpu = smp_processor_id();
1467 unsigned long flags;
1468 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1469
1470 if (!desc)
1471 return;
1472
1e7c5fd2
MZ
1473 type &= IRQ_TYPE_SENSE_MASK;
1474 if (type != IRQ_TYPE_NONE) {
1475 int ret;
1476
1477 ret = __irq_set_trigger(desc, irq, type);
1478
1479 if (ret) {
32cffdde 1480 WARN(1, "failed to set type for IRQ%d\n", irq);
1e7c5fd2
MZ
1481 goto out;
1482 }
1483 }
1484
31d9d9b6 1485 irq_percpu_enable(desc, cpu);
1e7c5fd2 1486out:
31d9d9b6
MZ
1487 irq_put_desc_unlock(desc, flags);
1488}
1489
1490void disable_percpu_irq(unsigned int irq)
1491{
1492 unsigned int cpu = smp_processor_id();
1493 unsigned long flags;
1494 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1495
1496 if (!desc)
1497 return;
1498
1499 irq_percpu_disable(desc, cpu);
1500 irq_put_desc_unlock(desc, flags);
1501}
1502
1503/*
1504 * Internal function to unregister a percpu irqaction.
1505 */
1506static struct irqaction *__free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1507{
1508 struct irq_desc *desc = irq_to_desc(irq);
1509 struct irqaction *action;
1510 unsigned long flags;
1511
1512 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
1513
1514 if (!desc)
1515 return NULL;
1516
1517 raw_spin_lock_irqsave(&desc->lock, flags);
1518
1519 action = desc->action;
1520 if (!action || action->percpu_dev_id != dev_id) {
1521 WARN(1, "Trying to free already-free IRQ %d\n", irq);
1522 goto bad;
1523 }
1524
1525 if (!cpumask_empty(desc->percpu_enabled)) {
1526 WARN(1, "percpu IRQ %d still enabled on CPU%d!\n",
1527 irq, cpumask_first(desc->percpu_enabled));
1528 goto bad;
1529 }
1530
1531 /* Found it - now remove it from the list of entries: */
1532 desc->action = NULL;
1533
1534 raw_spin_unlock_irqrestore(&desc->lock, flags);
1535
1536 unregister_handler_proc(irq, action);
1537
1538 module_put(desc->owner);
1539 return action;
1540
1541bad:
1542 raw_spin_unlock_irqrestore(&desc->lock, flags);
1543 return NULL;
1544}
1545
1546/**
1547 * remove_percpu_irq - free a per-cpu interrupt
1548 * @irq: Interrupt line to free
1549 * @act: irqaction for the interrupt
1550 *
1551 * Used to remove interrupts statically setup by the early boot process.
1552 */
1553void remove_percpu_irq(unsigned int irq, struct irqaction *act)
1554{
1555 struct irq_desc *desc = irq_to_desc(irq);
1556
1557 if (desc && irq_settings_is_per_cpu_devid(desc))
1558 __free_percpu_irq(irq, act->percpu_dev_id);
1559}
1560
1561/**
1562 * free_percpu_irq - free an interrupt allocated with request_percpu_irq
1563 * @irq: Interrupt line to free
1564 * @dev_id: Device identity to free
1565 *
1566 * Remove a percpu interrupt handler. The handler is removed, but
1567 * the interrupt line is not disabled. This must be done on each
1568 * CPU before calling this function. The function does not return
1569 * until any executing interrupts for this IRQ have completed.
1570 *
1571 * This function must not be called from interrupt context.
1572 */
1573void free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1574{
1575 struct irq_desc *desc = irq_to_desc(irq);
1576
1577 if (!desc || !irq_settings_is_per_cpu_devid(desc))
1578 return;
1579
1580 chip_bus_lock(desc);
1581 kfree(__free_percpu_irq(irq, dev_id));
1582 chip_bus_sync_unlock(desc);
1583}
1584
1585/**
1586 * setup_percpu_irq - setup a per-cpu interrupt
1587 * @irq: Interrupt line to setup
1588 * @act: irqaction for the interrupt
1589 *
1590 * Used to statically setup per-cpu interrupts in the early boot process.
1591 */
1592int setup_percpu_irq(unsigned int irq, struct irqaction *act)
1593{
1594 struct irq_desc *desc = irq_to_desc(irq);
1595 int retval;
1596
1597 if (!desc || !irq_settings_is_per_cpu_devid(desc))
1598 return -EINVAL;
1599 chip_bus_lock(desc);
1600 retval = __setup_irq(irq, desc, act);
1601 chip_bus_sync_unlock(desc);
1602
1603 return retval;
1604}
1605
1606/**
1607 * request_percpu_irq - allocate a percpu interrupt line
1608 * @irq: Interrupt line to allocate
1609 * @handler: Function to be called when the IRQ occurs.
1610 * @devname: An ascii name for the claiming device
1611 * @dev_id: A percpu cookie passed back to the handler function
1612 *
1613 * This call allocates interrupt resources, but doesn't
1614 * automatically enable the interrupt. It has to be done on each
1615 * CPU using enable_percpu_irq().
1616 *
1617 * Dev_id must be globally unique. It is a per-cpu variable, and
1618 * the handler gets called with the interrupted CPU's instance of
1619 * that variable.
1620 */
1621int request_percpu_irq(unsigned int irq, irq_handler_t handler,
1622 const char *devname, void __percpu *dev_id)
1623{
1624 struct irqaction *action;
1625 struct irq_desc *desc;
1626 int retval;
1627
1628 if (!dev_id)
1629 return -EINVAL;
1630
1631 desc = irq_to_desc(irq);
1632 if (!desc || !irq_settings_can_request(desc) ||
1633 !irq_settings_is_per_cpu_devid(desc))
1634 return -EINVAL;
1635
1636 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1637 if (!action)
1638 return -ENOMEM;
1639
1640 action->handler = handler;
2ed0e645 1641 action->flags = IRQF_PERCPU | IRQF_NO_SUSPEND;
31d9d9b6
MZ
1642 action->name = devname;
1643 action->percpu_dev_id = dev_id;
1644
1645 chip_bus_lock(desc);
1646 retval = __setup_irq(irq, desc, action);
1647 chip_bus_sync_unlock(desc);
1648
1649 if (retval)
1650 kfree(action);
1651
1652 return retval;
1653}
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