ceph: fix dentry reference leak in ceph_encode_fh()
[deliverable/linux.git] / kernel / irq / manage.c
CommitLineData
1da177e4
LT
1/*
2 * linux/kernel/irq/manage.c
3 *
a34db9b2
IM
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006 Thomas Gleixner
1da177e4
LT
6 *
7 * This file contains driver APIs to the irq subsystem.
8 */
9
97fd75b7
AM
10#define pr_fmt(fmt) "genirq: " fmt
11
1da177e4 12#include <linux/irq.h>
3aa551c9 13#include <linux/kthread.h>
1da177e4
LT
14#include <linux/module.h>
15#include <linux/random.h>
16#include <linux/interrupt.h>
1aeb272c 17#include <linux/slab.h>
3aa551c9 18#include <linux/sched.h>
4d1d61a6 19#include <linux/task_work.h>
1da177e4
LT
20
21#include "internals.h"
22
8d32a307
TG
23#ifdef CONFIG_IRQ_FORCED_THREADING
24__read_mostly bool force_irqthreads;
25
26static int __init setup_forced_irqthreads(char *arg)
27{
28 force_irqthreads = true;
29 return 0;
30}
31early_param("threadirqs", setup_forced_irqthreads);
32#endif
33
1da177e4
LT
34/**
35 * synchronize_irq - wait for pending IRQ handlers (on other CPUs)
1e5d5331 36 * @irq: interrupt number to wait for
1da177e4
LT
37 *
38 * This function waits for any pending IRQ handlers for this interrupt
39 * to complete before returning. If you use this function while
40 * holding a resource the IRQ handler may need you will deadlock.
41 *
42 * This function may be called - with care - from IRQ context.
43 */
44void synchronize_irq(unsigned int irq)
45{
cb5bc832 46 struct irq_desc *desc = irq_to_desc(irq);
32f4125e 47 bool inprogress;
1da177e4 48
7d94f7ca 49 if (!desc)
c2b5a251
MW
50 return;
51
a98ce5c6
HX
52 do {
53 unsigned long flags;
54
55 /*
56 * Wait until we're out of the critical section. This might
57 * give the wrong answer due to the lack of memory barriers.
58 */
32f4125e 59 while (irqd_irq_inprogress(&desc->irq_data))
a98ce5c6
HX
60 cpu_relax();
61
62 /* Ok, that indicated we're done: double-check carefully. */
239007b8 63 raw_spin_lock_irqsave(&desc->lock, flags);
32f4125e 64 inprogress = irqd_irq_inprogress(&desc->irq_data);
239007b8 65 raw_spin_unlock_irqrestore(&desc->lock, flags);
a98ce5c6
HX
66
67 /* Oops, that failed? */
32f4125e 68 } while (inprogress);
3aa551c9
TG
69
70 /*
71 * We made sure that no hardirq handler is running. Now verify
72 * that no threaded handlers are active.
73 */
74 wait_event(desc->wait_for_threads, !atomic_read(&desc->threads_active));
1da177e4 75}
1da177e4
LT
76EXPORT_SYMBOL(synchronize_irq);
77
3aa551c9
TG
78#ifdef CONFIG_SMP
79cpumask_var_t irq_default_affinity;
80
771ee3b0
TG
81/**
82 * irq_can_set_affinity - Check if the affinity of a given irq can be set
83 * @irq: Interrupt to check
84 *
85 */
86int irq_can_set_affinity(unsigned int irq)
87{
08678b08 88 struct irq_desc *desc = irq_to_desc(irq);
771ee3b0 89
bce43032
TG
90 if (!desc || !irqd_can_balance(&desc->irq_data) ||
91 !desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity)
771ee3b0
TG
92 return 0;
93
94 return 1;
95}
96
591d2fb0
TG
97/**
98 * irq_set_thread_affinity - Notify irq threads to adjust affinity
99 * @desc: irq descriptor which has affitnity changed
100 *
101 * We just set IRQTF_AFFINITY and delegate the affinity setting
102 * to the interrupt thread itself. We can not call
103 * set_cpus_allowed_ptr() here as we hold desc->lock and this
104 * code can be called from hard interrupt context.
105 */
106void irq_set_thread_affinity(struct irq_desc *desc)
3aa551c9
TG
107{
108 struct irqaction *action = desc->action;
109
110 while (action) {
111 if (action->thread)
591d2fb0 112 set_bit(IRQTF_AFFINITY, &action->thread_flags);
3aa551c9
TG
113 action = action->next;
114 }
115}
116
1fa46f1f 117#ifdef CONFIG_GENERIC_PENDING_IRQ
0ef5ca1e 118static inline bool irq_can_move_pcntxt(struct irq_data *data)
1fa46f1f 119{
0ef5ca1e 120 return irqd_can_move_in_process_context(data);
1fa46f1f 121}
0ef5ca1e 122static inline bool irq_move_pending(struct irq_data *data)
1fa46f1f 123{
0ef5ca1e 124 return irqd_is_setaffinity_pending(data);
1fa46f1f
TG
125}
126static inline void
127irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask)
128{
129 cpumask_copy(desc->pending_mask, mask);
130}
131static inline void
132irq_get_pending(struct cpumask *mask, struct irq_desc *desc)
133{
134 cpumask_copy(mask, desc->pending_mask);
135}
136#else
0ef5ca1e 137static inline bool irq_can_move_pcntxt(struct irq_data *data) { return true; }
cd22c0e4 138static inline bool irq_move_pending(struct irq_data *data) { return false; }
1fa46f1f
TG
139static inline void
140irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask) { }
141static inline void
142irq_get_pending(struct cpumask *mask, struct irq_desc *desc) { }
143#endif
144
818b0f3b
JL
145int irq_do_set_affinity(struct irq_data *data, const struct cpumask *mask,
146 bool force)
147{
148 struct irq_desc *desc = irq_data_to_desc(data);
149 struct irq_chip *chip = irq_data_get_irq_chip(data);
150 int ret;
151
152 ret = chip->irq_set_affinity(data, mask, false);
153 switch (ret) {
154 case IRQ_SET_MASK_OK:
155 cpumask_copy(data->affinity, mask);
156 case IRQ_SET_MASK_OK_NOCOPY:
157 irq_set_thread_affinity(desc);
158 ret = 0;
159 }
160
161 return ret;
162}
163
c2d0c555 164int __irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask)
771ee3b0 165{
c2d0c555
DD
166 struct irq_chip *chip = irq_data_get_irq_chip(data);
167 struct irq_desc *desc = irq_data_to_desc(data);
1fa46f1f 168 int ret = 0;
771ee3b0 169
c2d0c555 170 if (!chip || !chip->irq_set_affinity)
771ee3b0
TG
171 return -EINVAL;
172
0ef5ca1e 173 if (irq_can_move_pcntxt(data)) {
818b0f3b 174 ret = irq_do_set_affinity(data, mask, false);
1fa46f1f 175 } else {
c2d0c555 176 irqd_set_move_pending(data);
1fa46f1f 177 irq_copy_pending(desc, mask);
57b150cc 178 }
1fa46f1f 179
cd7eab44
BH
180 if (desc->affinity_notify) {
181 kref_get(&desc->affinity_notify->kref);
182 schedule_work(&desc->affinity_notify->work);
183 }
c2d0c555
DD
184 irqd_set(data, IRQD_AFFINITY_SET);
185
186 return ret;
187}
188
189/**
190 * irq_set_affinity - Set the irq affinity of a given irq
191 * @irq: Interrupt to set affinity
30398bf6 192 * @mask: cpumask
c2d0c555
DD
193 *
194 */
195int irq_set_affinity(unsigned int irq, const struct cpumask *mask)
196{
197 struct irq_desc *desc = irq_to_desc(irq);
198 unsigned long flags;
199 int ret;
200
201 if (!desc)
202 return -EINVAL;
203
204 raw_spin_lock_irqsave(&desc->lock, flags);
205 ret = __irq_set_affinity_locked(irq_desc_get_irq_data(desc), mask);
239007b8 206 raw_spin_unlock_irqrestore(&desc->lock, flags);
1fa46f1f 207 return ret;
771ee3b0
TG
208}
209
e7a297b0
PWJ
210int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m)
211{
e7a297b0 212 unsigned long flags;
31d9d9b6 213 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
e7a297b0
PWJ
214
215 if (!desc)
216 return -EINVAL;
e7a297b0 217 desc->affinity_hint = m;
02725e74 218 irq_put_desc_unlock(desc, flags);
e7a297b0
PWJ
219 return 0;
220}
221EXPORT_SYMBOL_GPL(irq_set_affinity_hint);
222
cd7eab44
BH
223static void irq_affinity_notify(struct work_struct *work)
224{
225 struct irq_affinity_notify *notify =
226 container_of(work, struct irq_affinity_notify, work);
227 struct irq_desc *desc = irq_to_desc(notify->irq);
228 cpumask_var_t cpumask;
229 unsigned long flags;
230
1fa46f1f 231 if (!desc || !alloc_cpumask_var(&cpumask, GFP_KERNEL))
cd7eab44
BH
232 goto out;
233
234 raw_spin_lock_irqsave(&desc->lock, flags);
0ef5ca1e 235 if (irq_move_pending(&desc->irq_data))
1fa46f1f 236 irq_get_pending(cpumask, desc);
cd7eab44 237 else
1fb0ef31 238 cpumask_copy(cpumask, desc->irq_data.affinity);
cd7eab44
BH
239 raw_spin_unlock_irqrestore(&desc->lock, flags);
240
241 notify->notify(notify, cpumask);
242
243 free_cpumask_var(cpumask);
244out:
245 kref_put(&notify->kref, notify->release);
246}
247
248/**
249 * irq_set_affinity_notifier - control notification of IRQ affinity changes
250 * @irq: Interrupt for which to enable/disable notification
251 * @notify: Context for notification, or %NULL to disable
252 * notification. Function pointers must be initialised;
253 * the other fields will be initialised by this function.
254 *
255 * Must be called in process context. Notification may only be enabled
256 * after the IRQ is allocated and must be disabled before the IRQ is
257 * freed using free_irq().
258 */
259int
260irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify)
261{
262 struct irq_desc *desc = irq_to_desc(irq);
263 struct irq_affinity_notify *old_notify;
264 unsigned long flags;
265
266 /* The release function is promised process context */
267 might_sleep();
268
269 if (!desc)
270 return -EINVAL;
271
272 /* Complete initialisation of *notify */
273 if (notify) {
274 notify->irq = irq;
275 kref_init(&notify->kref);
276 INIT_WORK(&notify->work, irq_affinity_notify);
277 }
278
279 raw_spin_lock_irqsave(&desc->lock, flags);
280 old_notify = desc->affinity_notify;
281 desc->affinity_notify = notify;
282 raw_spin_unlock_irqrestore(&desc->lock, flags);
283
284 if (old_notify)
285 kref_put(&old_notify->kref, old_notify->release);
286
287 return 0;
288}
289EXPORT_SYMBOL_GPL(irq_set_affinity_notifier);
290
18404756
MK
291#ifndef CONFIG_AUTO_IRQ_AFFINITY
292/*
293 * Generic version of the affinity autoselector.
294 */
3b8249e7
TG
295static int
296setup_affinity(unsigned int irq, struct irq_desc *desc, struct cpumask *mask)
18404756 297{
569bda8d 298 struct cpumask *set = irq_default_affinity;
818b0f3b 299 int node = desc->irq_data.node;
569bda8d 300
b008207c 301 /* Excludes PER_CPU and NO_BALANCE interrupts */
18404756
MK
302 if (!irq_can_set_affinity(irq))
303 return 0;
304
f6d87f4b
TG
305 /*
306 * Preserve an userspace affinity setup, but make sure that
307 * one of the targets is online.
308 */
2bdd1055 309 if (irqd_has_set(&desc->irq_data, IRQD_AFFINITY_SET)) {
569bda8d
TG
310 if (cpumask_intersects(desc->irq_data.affinity,
311 cpu_online_mask))
312 set = desc->irq_data.affinity;
0c6f8a8b 313 else
2bdd1055 314 irqd_clear(&desc->irq_data, IRQD_AFFINITY_SET);
f6d87f4b 315 }
18404756 316
3b8249e7 317 cpumask_and(mask, cpu_online_mask, set);
241fc640
PB
318 if (node != NUMA_NO_NODE) {
319 const struct cpumask *nodemask = cpumask_of_node(node);
320
321 /* make sure at least one of the cpus in nodemask is online */
322 if (cpumask_intersects(mask, nodemask))
323 cpumask_and(mask, mask, nodemask);
324 }
818b0f3b 325 irq_do_set_affinity(&desc->irq_data, mask, false);
18404756
MK
326 return 0;
327}
f6d87f4b 328#else
3b8249e7
TG
329static inline int
330setup_affinity(unsigned int irq, struct irq_desc *d, struct cpumask *mask)
f6d87f4b
TG
331{
332 return irq_select_affinity(irq);
333}
18404756
MK
334#endif
335
f6d87f4b
TG
336/*
337 * Called when affinity is set via /proc/irq
338 */
3b8249e7 339int irq_select_affinity_usr(unsigned int irq, struct cpumask *mask)
f6d87f4b
TG
340{
341 struct irq_desc *desc = irq_to_desc(irq);
342 unsigned long flags;
343 int ret;
344
239007b8 345 raw_spin_lock_irqsave(&desc->lock, flags);
3b8249e7 346 ret = setup_affinity(irq, desc, mask);
239007b8 347 raw_spin_unlock_irqrestore(&desc->lock, flags);
f6d87f4b
TG
348 return ret;
349}
350
351#else
3b8249e7
TG
352static inline int
353setup_affinity(unsigned int irq, struct irq_desc *desc, struct cpumask *mask)
f6d87f4b
TG
354{
355 return 0;
356}
1da177e4
LT
357#endif
358
0a0c5168
RW
359void __disable_irq(struct irq_desc *desc, unsigned int irq, bool suspend)
360{
361 if (suspend) {
685fd0b4 362 if (!desc->action || (desc->action->flags & IRQF_NO_SUSPEND))
0a0c5168 363 return;
c531e836 364 desc->istate |= IRQS_SUSPENDED;
0a0c5168
RW
365 }
366
3aae994f 367 if (!desc->depth++)
87923470 368 irq_disable(desc);
0a0c5168
RW
369}
370
02725e74
TG
371static int __disable_irq_nosync(unsigned int irq)
372{
373 unsigned long flags;
31d9d9b6 374 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
02725e74
TG
375
376 if (!desc)
377 return -EINVAL;
378 __disable_irq(desc, irq, false);
379 irq_put_desc_busunlock(desc, flags);
380 return 0;
381}
382
1da177e4
LT
383/**
384 * disable_irq_nosync - disable an irq without waiting
385 * @irq: Interrupt to disable
386 *
387 * Disable the selected interrupt line. Disables and Enables are
388 * nested.
389 * Unlike disable_irq(), this function does not ensure existing
390 * instances of the IRQ handler have completed before returning.
391 *
392 * This function may be called from IRQ context.
393 */
394void disable_irq_nosync(unsigned int irq)
395{
02725e74 396 __disable_irq_nosync(irq);
1da177e4 397}
1da177e4
LT
398EXPORT_SYMBOL(disable_irq_nosync);
399
400/**
401 * disable_irq - disable an irq and wait for completion
402 * @irq: Interrupt to disable
403 *
404 * Disable the selected interrupt line. Enables and Disables are
405 * nested.
406 * This function waits for any pending IRQ handlers for this interrupt
407 * to complete before returning. If you use this function while
408 * holding a resource the IRQ handler may need you will deadlock.
409 *
410 * This function may be called - with care - from IRQ context.
411 */
412void disable_irq(unsigned int irq)
413{
02725e74 414 if (!__disable_irq_nosync(irq))
1da177e4
LT
415 synchronize_irq(irq);
416}
1da177e4
LT
417EXPORT_SYMBOL(disable_irq);
418
0a0c5168 419void __enable_irq(struct irq_desc *desc, unsigned int irq, bool resume)
1adb0850 420{
dc5f219e 421 if (resume) {
c531e836 422 if (!(desc->istate & IRQS_SUSPENDED)) {
dc5f219e
TG
423 if (!desc->action)
424 return;
425 if (!(desc->action->flags & IRQF_FORCE_RESUME))
426 return;
427 /* Pretend that it got disabled ! */
428 desc->depth++;
429 }
c531e836 430 desc->istate &= ~IRQS_SUSPENDED;
dc5f219e 431 }
0a0c5168 432
1adb0850
TG
433 switch (desc->depth) {
434 case 0:
0a0c5168 435 err_out:
b8c512f6 436 WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n", irq);
1adb0850
TG
437 break;
438 case 1: {
c531e836 439 if (desc->istate & IRQS_SUSPENDED)
0a0c5168 440 goto err_out;
1adb0850 441 /* Prevent probing on this irq: */
1ccb4e61 442 irq_settings_set_noprobe(desc);
3aae994f 443 irq_enable(desc);
1adb0850
TG
444 check_irq_resend(desc, irq);
445 /* fall-through */
446 }
447 default:
448 desc->depth--;
449 }
450}
451
1da177e4
LT
452/**
453 * enable_irq - enable handling of an irq
454 * @irq: Interrupt to enable
455 *
456 * Undoes the effect of one call to disable_irq(). If this
457 * matches the last disable, processing of interrupts on this
458 * IRQ line is re-enabled.
459 *
70aedd24 460 * This function may be called from IRQ context only when
6b8ff312 461 * desc->irq_data.chip->bus_lock and desc->chip->bus_sync_unlock are NULL !
1da177e4
LT
462 */
463void enable_irq(unsigned int irq)
464{
1da177e4 465 unsigned long flags;
31d9d9b6 466 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
1da177e4 467
7d94f7ca 468 if (!desc)
c2b5a251 469 return;
50f7c032
TG
470 if (WARN(!desc->irq_data.chip,
471 KERN_ERR "enable_irq before setup/request_irq: irq %u\n", irq))
02725e74 472 goto out;
2656c366 473
0a0c5168 474 __enable_irq(desc, irq, false);
02725e74
TG
475out:
476 irq_put_desc_busunlock(desc, flags);
1da177e4 477}
1da177e4
LT
478EXPORT_SYMBOL(enable_irq);
479
0c5d1eb7 480static int set_irq_wake_real(unsigned int irq, unsigned int on)
2db87321 481{
08678b08 482 struct irq_desc *desc = irq_to_desc(irq);
2db87321
UKK
483 int ret = -ENXIO;
484
60f96b41
SS
485 if (irq_desc_get_chip(desc)->flags & IRQCHIP_SKIP_SET_WAKE)
486 return 0;
487
2f7e99bb
TG
488 if (desc->irq_data.chip->irq_set_wake)
489 ret = desc->irq_data.chip->irq_set_wake(&desc->irq_data, on);
2db87321
UKK
490
491 return ret;
492}
493
ba9a2331 494/**
a0cd9ca2 495 * irq_set_irq_wake - control irq power management wakeup
ba9a2331
TG
496 * @irq: interrupt to control
497 * @on: enable/disable power management wakeup
498 *
15a647eb
DB
499 * Enable/disable power management wakeup mode, which is
500 * disabled by default. Enables and disables must match,
501 * just as they match for non-wakeup mode support.
502 *
503 * Wakeup mode lets this IRQ wake the system from sleep
504 * states like "suspend to RAM".
ba9a2331 505 */
a0cd9ca2 506int irq_set_irq_wake(unsigned int irq, unsigned int on)
ba9a2331 507{
ba9a2331 508 unsigned long flags;
31d9d9b6 509 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
2db87321 510 int ret = 0;
ba9a2331 511
13863a66
JJ
512 if (!desc)
513 return -EINVAL;
514
15a647eb
DB
515 /* wakeup-capable irqs can be shared between drivers that
516 * don't need to have the same sleep mode behaviors.
517 */
15a647eb 518 if (on) {
2db87321
UKK
519 if (desc->wake_depth++ == 0) {
520 ret = set_irq_wake_real(irq, on);
521 if (ret)
522 desc->wake_depth = 0;
523 else
7f94226f 524 irqd_set(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 525 }
15a647eb
DB
526 } else {
527 if (desc->wake_depth == 0) {
7a2c4770 528 WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
2db87321
UKK
529 } else if (--desc->wake_depth == 0) {
530 ret = set_irq_wake_real(irq, on);
531 if (ret)
532 desc->wake_depth = 1;
533 else
7f94226f 534 irqd_clear(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 535 }
15a647eb 536 }
02725e74 537 irq_put_desc_busunlock(desc, flags);
ba9a2331
TG
538 return ret;
539}
a0cd9ca2 540EXPORT_SYMBOL(irq_set_irq_wake);
ba9a2331 541
1da177e4
LT
542/*
543 * Internal function that tells the architecture code whether a
544 * particular irq has been exclusively allocated or is available
545 * for driver use.
546 */
547int can_request_irq(unsigned int irq, unsigned long irqflags)
548{
cc8c3b78 549 unsigned long flags;
31d9d9b6 550 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
02725e74 551 int canrequest = 0;
1da177e4 552
7d94f7ca
YL
553 if (!desc)
554 return 0;
555
02725e74
TG
556 if (irq_settings_can_request(desc)) {
557 if (desc->action)
558 if (irqflags & desc->action->flags & IRQF_SHARED)
559 canrequest =1;
560 }
561 irq_put_desc_unlock(desc, flags);
562 return canrequest;
1da177e4
LT
563}
564
0c5d1eb7 565int __irq_set_trigger(struct irq_desc *desc, unsigned int irq,
b2ba2c30 566 unsigned long flags)
82736f4d 567{
6b8ff312 568 struct irq_chip *chip = desc->irq_data.chip;
d4d5e089 569 int ret, unmask = 0;
82736f4d 570
b2ba2c30 571 if (!chip || !chip->irq_set_type) {
82736f4d
UKK
572 /*
573 * IRQF_TRIGGER_* but the PIC does not support multiple
574 * flow-types?
575 */
97fd75b7 576 pr_debug("No set_type function for IRQ %d (%s)\n", irq,
f5d89470 577 chip ? (chip->name ? : "unknown") : "unknown");
82736f4d
UKK
578 return 0;
579 }
580
876dbd4c 581 flags &= IRQ_TYPE_SENSE_MASK;
d4d5e089
TG
582
583 if (chip->flags & IRQCHIP_SET_TYPE_MASKED) {
32f4125e 584 if (!irqd_irq_masked(&desc->irq_data))
d4d5e089 585 mask_irq(desc);
32f4125e 586 if (!irqd_irq_disabled(&desc->irq_data))
d4d5e089
TG
587 unmask = 1;
588 }
589
f2b662da 590 /* caller masked out all except trigger mode flags */
b2ba2c30 591 ret = chip->irq_set_type(&desc->irq_data, flags);
82736f4d 592
876dbd4c
TG
593 switch (ret) {
594 case IRQ_SET_MASK_OK:
595 irqd_clear(&desc->irq_data, IRQD_TRIGGER_MASK);
596 irqd_set(&desc->irq_data, flags);
597
598 case IRQ_SET_MASK_OK_NOCOPY:
599 flags = irqd_get_trigger_type(&desc->irq_data);
600 irq_settings_set_trigger_mask(desc, flags);
601 irqd_clear(&desc->irq_data, IRQD_LEVEL);
602 irq_settings_clr_level(desc);
603 if (flags & IRQ_TYPE_LEVEL_MASK) {
604 irq_settings_set_level(desc);
605 irqd_set(&desc->irq_data, IRQD_LEVEL);
606 }
46732475 607
d4d5e089 608 ret = 0;
8fff39e0 609 break;
876dbd4c 610 default:
97fd75b7 611 pr_err("Setting trigger mode %lu for irq %u failed (%pF)\n",
876dbd4c 612 flags, irq, chip->irq_set_type);
0c5d1eb7 613 }
d4d5e089
TG
614 if (unmask)
615 unmask_irq(desc);
82736f4d
UKK
616 return ret;
617}
618
293a7a0a
TG
619#ifdef CONFIG_HARDIRQS_SW_RESEND
620int irq_set_parent(int irq, int parent_irq)
621{
622 unsigned long flags;
623 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
624
625 if (!desc)
626 return -EINVAL;
627
628 desc->parent_irq = parent_irq;
629
630 irq_put_desc_unlock(desc, flags);
631 return 0;
632}
633#endif
634
b25c340c
TG
635/*
636 * Default primary interrupt handler for threaded interrupts. Is
637 * assigned as primary handler when request_threaded_irq is called
638 * with handler == NULL. Useful for oneshot interrupts.
639 */
640static irqreturn_t irq_default_primary_handler(int irq, void *dev_id)
641{
642 return IRQ_WAKE_THREAD;
643}
644
399b5da2
TG
645/*
646 * Primary handler for nested threaded interrupts. Should never be
647 * called.
648 */
649static irqreturn_t irq_nested_primary_handler(int irq, void *dev_id)
650{
651 WARN(1, "Primary handler called for nested irq %d\n", irq);
652 return IRQ_NONE;
653}
654
3aa551c9
TG
655static int irq_wait_for_interrupt(struct irqaction *action)
656{
550acb19
IY
657 set_current_state(TASK_INTERRUPTIBLE);
658
3aa551c9 659 while (!kthread_should_stop()) {
f48fe81e
TG
660
661 if (test_and_clear_bit(IRQTF_RUNTHREAD,
662 &action->thread_flags)) {
3aa551c9
TG
663 __set_current_state(TASK_RUNNING);
664 return 0;
f48fe81e
TG
665 }
666 schedule();
550acb19 667 set_current_state(TASK_INTERRUPTIBLE);
3aa551c9 668 }
550acb19 669 __set_current_state(TASK_RUNNING);
3aa551c9
TG
670 return -1;
671}
672
b25c340c
TG
673/*
674 * Oneshot interrupts keep the irq line masked until the threaded
675 * handler finished. unmask if the interrupt has not been disabled and
676 * is marked MASKED.
677 */
b5faba21 678static void irq_finalize_oneshot(struct irq_desc *desc,
f3f79e38 679 struct irqaction *action)
b25c340c 680{
b5faba21
TG
681 if (!(desc->istate & IRQS_ONESHOT))
682 return;
0b1adaa0 683again:
3876ec9e 684 chip_bus_lock(desc);
239007b8 685 raw_spin_lock_irq(&desc->lock);
0b1adaa0
TG
686
687 /*
688 * Implausible though it may be we need to protect us against
689 * the following scenario:
690 *
691 * The thread is faster done than the hard interrupt handler
692 * on the other CPU. If we unmask the irq line then the
693 * interrupt can come in again and masks the line, leaves due
009b4c3b 694 * to IRQS_INPROGRESS and the irq line is masked forever.
b5faba21
TG
695 *
696 * This also serializes the state of shared oneshot handlers
697 * versus "desc->threads_onehsot |= action->thread_mask;" in
698 * irq_wake_thread(). See the comment there which explains the
699 * serialization.
0b1adaa0 700 */
32f4125e 701 if (unlikely(irqd_irq_inprogress(&desc->irq_data))) {
0b1adaa0 702 raw_spin_unlock_irq(&desc->lock);
3876ec9e 703 chip_bus_sync_unlock(desc);
0b1adaa0
TG
704 cpu_relax();
705 goto again;
706 }
707
b5faba21
TG
708 /*
709 * Now check again, whether the thread should run. Otherwise
710 * we would clear the threads_oneshot bit of this thread which
711 * was just set.
712 */
f3f79e38 713 if (test_bit(IRQTF_RUNTHREAD, &action->thread_flags))
b5faba21
TG
714 goto out_unlock;
715
716 desc->threads_oneshot &= ~action->thread_mask;
717
32f4125e
TG
718 if (!desc->threads_oneshot && !irqd_irq_disabled(&desc->irq_data) &&
719 irqd_irq_masked(&desc->irq_data))
720 unmask_irq(desc);
721
b5faba21 722out_unlock:
239007b8 723 raw_spin_unlock_irq(&desc->lock);
3876ec9e 724 chip_bus_sync_unlock(desc);
b25c340c
TG
725}
726
61f38261 727#ifdef CONFIG_SMP
591d2fb0 728/*
d4d5e089 729 * Check whether we need to chasnge the affinity of the interrupt thread.
591d2fb0
TG
730 */
731static void
732irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action)
733{
734 cpumask_var_t mask;
04aa530e 735 bool valid = true;
591d2fb0
TG
736
737 if (!test_and_clear_bit(IRQTF_AFFINITY, &action->thread_flags))
738 return;
739
740 /*
741 * In case we are out of memory we set IRQTF_AFFINITY again and
742 * try again next time
743 */
744 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
745 set_bit(IRQTF_AFFINITY, &action->thread_flags);
746 return;
747 }
748
239007b8 749 raw_spin_lock_irq(&desc->lock);
04aa530e
TG
750 /*
751 * This code is triggered unconditionally. Check the affinity
752 * mask pointer. For CPU_MASK_OFFSTACK=n this is optimized out.
753 */
754 if (desc->irq_data.affinity)
755 cpumask_copy(mask, desc->irq_data.affinity);
756 else
757 valid = false;
239007b8 758 raw_spin_unlock_irq(&desc->lock);
591d2fb0 759
04aa530e
TG
760 if (valid)
761 set_cpus_allowed_ptr(current, mask);
591d2fb0
TG
762 free_cpumask_var(mask);
763}
61f38261
BP
764#else
765static inline void
766irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) { }
767#endif
591d2fb0 768
8d32a307
TG
769/*
770 * Interrupts which are not explicitely requested as threaded
771 * interrupts rely on the implicit bh/preempt disable of the hard irq
772 * context. So we need to disable bh here to avoid deadlocks and other
773 * side effects.
774 */
3a43e05f 775static irqreturn_t
8d32a307
TG
776irq_forced_thread_fn(struct irq_desc *desc, struct irqaction *action)
777{
3a43e05f
SAS
778 irqreturn_t ret;
779
8d32a307 780 local_bh_disable();
3a43e05f 781 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 782 irq_finalize_oneshot(desc, action);
8d32a307 783 local_bh_enable();
3a43e05f 784 return ret;
8d32a307
TG
785}
786
787/*
788 * Interrupts explicitely requested as threaded interupts want to be
789 * preemtible - many of them need to sleep and wait for slow busses to
790 * complete.
791 */
3a43e05f
SAS
792static irqreturn_t irq_thread_fn(struct irq_desc *desc,
793 struct irqaction *action)
8d32a307 794{
3a43e05f
SAS
795 irqreturn_t ret;
796
797 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 798 irq_finalize_oneshot(desc, action);
3a43e05f 799 return ret;
8d32a307
TG
800}
801
7140ea19
IY
802static void wake_threads_waitq(struct irq_desc *desc)
803{
804 if (atomic_dec_and_test(&desc->threads_active) &&
805 waitqueue_active(&desc->wait_for_threads))
806 wake_up(&desc->wait_for_threads);
807}
808
67d12145 809static void irq_thread_dtor(struct callback_head *unused)
4d1d61a6
ON
810{
811 struct task_struct *tsk = current;
812 struct irq_desc *desc;
813 struct irqaction *action;
814
815 if (WARN_ON_ONCE(!(current->flags & PF_EXITING)))
816 return;
817
818 action = kthread_data(tsk);
819
fb21affa 820 pr_err("exiting task \"%s\" (%d) is an active IRQ thread (irq %d)\n",
4d1d61a6
ON
821 tsk->comm ? tsk->comm : "", tsk->pid, action->irq);
822
823
824 desc = irq_to_desc(action->irq);
825 /*
826 * If IRQTF_RUNTHREAD is set, we need to decrement
827 * desc->threads_active and wake possible waiters.
828 */
829 if (test_and_clear_bit(IRQTF_RUNTHREAD, &action->thread_flags))
830 wake_threads_waitq(desc);
831
832 /* Prevent a stale desc->threads_oneshot */
833 irq_finalize_oneshot(desc, action);
834}
835
3aa551c9
TG
836/*
837 * Interrupt handler thread
838 */
839static int irq_thread(void *data)
840{
67d12145 841 struct callback_head on_exit_work;
c9b5f501 842 static const struct sched_param param = {
fe7de49f
KM
843 .sched_priority = MAX_USER_RT_PRIO/2,
844 };
3aa551c9
TG
845 struct irqaction *action = data;
846 struct irq_desc *desc = irq_to_desc(action->irq);
3a43e05f
SAS
847 irqreturn_t (*handler_fn)(struct irq_desc *desc,
848 struct irqaction *action);
3aa551c9 849
540b60e2 850 if (force_irqthreads && test_bit(IRQTF_FORCED_THREAD,
8d32a307
TG
851 &action->thread_flags))
852 handler_fn = irq_forced_thread_fn;
853 else
854 handler_fn = irq_thread_fn;
855
3aa551c9 856 sched_setscheduler(current, SCHED_FIFO, &param);
4d1d61a6 857
41f9d29f 858 init_task_work(&on_exit_work, irq_thread_dtor);
4d1d61a6 859 task_work_add(current, &on_exit_work, false);
3aa551c9 860
f3de44ed
SM
861 irq_thread_check_affinity(desc, action);
862
3aa551c9 863 while (!irq_wait_for_interrupt(action)) {
7140ea19 864 irqreturn_t action_ret;
3aa551c9 865
591d2fb0
TG
866 irq_thread_check_affinity(desc, action);
867
7140ea19
IY
868 action_ret = handler_fn(desc, action);
869 if (!noirqdebug)
870 note_interrupt(action->irq, desc, action_ret);
3aa551c9 871
7140ea19 872 wake_threads_waitq(desc);
3aa551c9
TG
873 }
874
7140ea19
IY
875 /*
876 * This is the regular exit path. __free_irq() is stopping the
877 * thread via kthread_stop() after calling
878 * synchronize_irq(). So neither IRQTF_RUNTHREAD nor the
e04268b0
TG
879 * oneshot mask bit can be set. We cannot verify that as we
880 * cannot touch the oneshot mask at this point anymore as
881 * __setup_irq() might have given out currents thread_mask
882 * again.
3aa551c9 883 */
4d1d61a6 884 task_work_cancel(current, irq_thread_dtor);
3aa551c9
TG
885 return 0;
886}
887
8d32a307
TG
888static void irq_setup_forced_threading(struct irqaction *new)
889{
890 if (!force_irqthreads)
891 return;
892 if (new->flags & (IRQF_NO_THREAD | IRQF_PERCPU | IRQF_ONESHOT))
893 return;
894
895 new->flags |= IRQF_ONESHOT;
896
897 if (!new->thread_fn) {
898 set_bit(IRQTF_FORCED_THREAD, &new->thread_flags);
899 new->thread_fn = new->handler;
900 new->handler = irq_default_primary_handler;
901 }
902}
903
1da177e4
LT
904/*
905 * Internal function to register an irqaction - typically used to
906 * allocate special interrupts that are part of the architecture.
907 */
d3c60047 908static int
327ec569 909__setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
1da177e4 910{
f17c7545 911 struct irqaction *old, **old_ptr;
b5faba21 912 unsigned long flags, thread_mask = 0;
3b8249e7
TG
913 int ret, nested, shared = 0;
914 cpumask_var_t mask;
1da177e4 915
7d94f7ca 916 if (!desc)
c2b5a251
MW
917 return -EINVAL;
918
6b8ff312 919 if (desc->irq_data.chip == &no_irq_chip)
1da177e4 920 return -ENOSYS;
b6873807
SAS
921 if (!try_module_get(desc->owner))
922 return -ENODEV;
1da177e4 923
3aa551c9 924 /*
399b5da2
TG
925 * Check whether the interrupt nests into another interrupt
926 * thread.
927 */
1ccb4e61 928 nested = irq_settings_is_nested_thread(desc);
399b5da2 929 if (nested) {
b6873807
SAS
930 if (!new->thread_fn) {
931 ret = -EINVAL;
932 goto out_mput;
933 }
399b5da2
TG
934 /*
935 * Replace the primary handler which was provided from
936 * the driver for non nested interrupt handling by the
937 * dummy function which warns when called.
938 */
939 new->handler = irq_nested_primary_handler;
8d32a307 940 } else {
7f1b1244
PM
941 if (irq_settings_can_thread(desc))
942 irq_setup_forced_threading(new);
399b5da2
TG
943 }
944
3aa551c9 945 /*
399b5da2
TG
946 * Create a handler thread when a thread function is supplied
947 * and the interrupt does not nest into another interrupt
948 * thread.
3aa551c9 949 */
399b5da2 950 if (new->thread_fn && !nested) {
3aa551c9
TG
951 struct task_struct *t;
952
953 t = kthread_create(irq_thread, new, "irq/%d-%s", irq,
954 new->name);
b6873807
SAS
955 if (IS_ERR(t)) {
956 ret = PTR_ERR(t);
957 goto out_mput;
958 }
3aa551c9
TG
959 /*
960 * We keep the reference to the task struct even if
961 * the thread dies to avoid that the interrupt code
962 * references an already freed task_struct.
963 */
964 get_task_struct(t);
965 new->thread = t;
04aa530e
TG
966 /*
967 * Tell the thread to set its affinity. This is
968 * important for shared interrupt handlers as we do
969 * not invoke setup_affinity() for the secondary
970 * handlers as everything is already set up. Even for
971 * interrupts marked with IRQF_NO_BALANCE this is
972 * correct as we want the thread to move to the cpu(s)
973 * on which the requesting code placed the interrupt.
974 */
975 set_bit(IRQTF_AFFINITY, &new->thread_flags);
3aa551c9
TG
976 }
977
3b8249e7
TG
978 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
979 ret = -ENOMEM;
980 goto out_thread;
981 }
982
dc9b229a
TG
983 /*
984 * Drivers are often written to work w/o knowledge about the
985 * underlying irq chip implementation, so a request for a
986 * threaded irq without a primary hard irq context handler
987 * requires the ONESHOT flag to be set. Some irq chips like
988 * MSI based interrupts are per se one shot safe. Check the
989 * chip flags, so we can avoid the unmask dance at the end of
990 * the threaded handler for those.
991 */
992 if (desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)
993 new->flags &= ~IRQF_ONESHOT;
994
1da177e4
LT
995 /*
996 * The following block of code has to be executed atomically
997 */
239007b8 998 raw_spin_lock_irqsave(&desc->lock, flags);
f17c7545
IM
999 old_ptr = &desc->action;
1000 old = *old_ptr;
06fcb0c6 1001 if (old) {
e76de9f8
TG
1002 /*
1003 * Can't share interrupts unless both agree to and are
1004 * the same type (level, edge, polarity). So both flag
3cca53b0 1005 * fields must have IRQF_SHARED set and the bits which
9d591edd
TG
1006 * set the trigger type must match. Also all must
1007 * agree on ONESHOT.
e76de9f8 1008 */
3cca53b0 1009 if (!((old->flags & new->flags) & IRQF_SHARED) ||
9d591edd 1010 ((old->flags ^ new->flags) & IRQF_TRIGGER_MASK) ||
f5d89470 1011 ((old->flags ^ new->flags) & IRQF_ONESHOT))
f5163427
DS
1012 goto mismatch;
1013
f5163427 1014 /* All handlers must agree on per-cpuness */
3cca53b0
TG
1015 if ((old->flags & IRQF_PERCPU) !=
1016 (new->flags & IRQF_PERCPU))
f5163427 1017 goto mismatch;
1da177e4
LT
1018
1019 /* add new interrupt at end of irq queue */
1020 do {
52abb700
TG
1021 /*
1022 * Or all existing action->thread_mask bits,
1023 * so we can find the next zero bit for this
1024 * new action.
1025 */
b5faba21 1026 thread_mask |= old->thread_mask;
f17c7545
IM
1027 old_ptr = &old->next;
1028 old = *old_ptr;
1da177e4
LT
1029 } while (old);
1030 shared = 1;
1031 }
1032
b5faba21 1033 /*
52abb700
TG
1034 * Setup the thread mask for this irqaction for ONESHOT. For
1035 * !ONESHOT irqs the thread mask is 0 so we can avoid a
1036 * conditional in irq_wake_thread().
b5faba21 1037 */
52abb700
TG
1038 if (new->flags & IRQF_ONESHOT) {
1039 /*
1040 * Unlikely to have 32 resp 64 irqs sharing one line,
1041 * but who knows.
1042 */
1043 if (thread_mask == ~0UL) {
1044 ret = -EBUSY;
1045 goto out_mask;
1046 }
1047 /*
1048 * The thread_mask for the action is or'ed to
1049 * desc->thread_active to indicate that the
1050 * IRQF_ONESHOT thread handler has been woken, but not
1051 * yet finished. The bit is cleared when a thread
1052 * completes. When all threads of a shared interrupt
1053 * line have completed desc->threads_active becomes
1054 * zero and the interrupt line is unmasked. See
1055 * handle.c:irq_wake_thread() for further information.
1056 *
1057 * If no thread is woken by primary (hard irq context)
1058 * interrupt handlers, then desc->threads_active is
1059 * also checked for zero to unmask the irq line in the
1060 * affected hard irq flow handlers
1061 * (handle_[fasteoi|level]_irq).
1062 *
1063 * The new action gets the first zero bit of
1064 * thread_mask assigned. See the loop above which or's
1065 * all existing action->thread_mask bits.
1066 */
1067 new->thread_mask = 1 << ffz(thread_mask);
1c6c6952 1068
dc9b229a
TG
1069 } else if (new->handler == irq_default_primary_handler &&
1070 !(desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)) {
1c6c6952
TG
1071 /*
1072 * The interrupt was requested with handler = NULL, so
1073 * we use the default primary handler for it. But it
1074 * does not have the oneshot flag set. In combination
1075 * with level interrupts this is deadly, because the
1076 * default primary handler just wakes the thread, then
1077 * the irq lines is reenabled, but the device still
1078 * has the level irq asserted. Rinse and repeat....
1079 *
1080 * While this works for edge type interrupts, we play
1081 * it safe and reject unconditionally because we can't
1082 * say for sure which type this interrupt really
1083 * has. The type flags are unreliable as the
1084 * underlying chip implementation can override them.
1085 */
97fd75b7 1086 pr_err("Threaded irq requested with handler=NULL and !ONESHOT for irq %d\n",
1c6c6952
TG
1087 irq);
1088 ret = -EINVAL;
1089 goto out_mask;
b5faba21 1090 }
b5faba21 1091
1da177e4 1092 if (!shared) {
3aa551c9
TG
1093 init_waitqueue_head(&desc->wait_for_threads);
1094
e76de9f8 1095 /* Setup the type (level, edge polarity) if configured: */
3cca53b0 1096 if (new->flags & IRQF_TRIGGER_MASK) {
f2b662da
DB
1097 ret = __irq_set_trigger(desc, irq,
1098 new->flags & IRQF_TRIGGER_MASK);
82736f4d 1099
3aa551c9 1100 if (ret)
3b8249e7 1101 goto out_mask;
091738a2 1102 }
6a6de9ef 1103
009b4c3b 1104 desc->istate &= ~(IRQS_AUTODETECT | IRQS_SPURIOUS_DISABLED | \
32f4125e
TG
1105 IRQS_ONESHOT | IRQS_WAITING);
1106 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
94d39e1f 1107
a005677b
TG
1108 if (new->flags & IRQF_PERCPU) {
1109 irqd_set(&desc->irq_data, IRQD_PER_CPU);
1110 irq_settings_set_per_cpu(desc);
1111 }
6a58fb3b 1112
b25c340c 1113 if (new->flags & IRQF_ONESHOT)
3d67baec 1114 desc->istate |= IRQS_ONESHOT;
b25c340c 1115
1ccb4e61 1116 if (irq_settings_can_autoenable(desc))
b4bc724e 1117 irq_startup(desc, true);
46999238 1118 else
e76de9f8
TG
1119 /* Undo nested disables: */
1120 desc->depth = 1;
18404756 1121
612e3684 1122 /* Exclude IRQ from balancing if requested */
a005677b
TG
1123 if (new->flags & IRQF_NOBALANCING) {
1124 irq_settings_set_no_balancing(desc);
1125 irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
1126 }
612e3684 1127
18404756 1128 /* Set default affinity mask once everything is setup */
3b8249e7 1129 setup_affinity(irq, desc, mask);
0c5d1eb7 1130
876dbd4c
TG
1131 } else if (new->flags & IRQF_TRIGGER_MASK) {
1132 unsigned int nmsk = new->flags & IRQF_TRIGGER_MASK;
1133 unsigned int omsk = irq_settings_get_trigger_mask(desc);
1134
1135 if (nmsk != omsk)
1136 /* hope the handler works with current trigger mode */
97fd75b7 1137 pr_warning("irq %d uses trigger mode %u; requested %u\n",
876dbd4c 1138 irq, nmsk, omsk);
1da177e4 1139 }
82736f4d 1140
69ab8494 1141 new->irq = irq;
f17c7545 1142 *old_ptr = new;
82736f4d 1143
8528b0f1
LT
1144 /* Reset broken irq detection when installing new handler */
1145 desc->irq_count = 0;
1146 desc->irqs_unhandled = 0;
1adb0850
TG
1147
1148 /*
1149 * Check whether we disabled the irq via the spurious handler
1150 * before. Reenable it and give it another chance.
1151 */
7acdd53e
TG
1152 if (shared && (desc->istate & IRQS_SPURIOUS_DISABLED)) {
1153 desc->istate &= ~IRQS_SPURIOUS_DISABLED;
0a0c5168 1154 __enable_irq(desc, irq, false);
1adb0850
TG
1155 }
1156
239007b8 1157 raw_spin_unlock_irqrestore(&desc->lock, flags);
1da177e4 1158
69ab8494
TG
1159 /*
1160 * Strictly no need to wake it up, but hung_task complains
1161 * when no hard interrupt wakes the thread up.
1162 */
1163 if (new->thread)
1164 wake_up_process(new->thread);
1165
2c6927a3 1166 register_irq_proc(irq, desc);
1da177e4
LT
1167 new->dir = NULL;
1168 register_handler_proc(irq, new);
4f5058c3 1169 free_cpumask_var(mask);
1da177e4
LT
1170
1171 return 0;
f5163427
DS
1172
1173mismatch:
3cca53b0 1174 if (!(new->flags & IRQF_PROBE_SHARED)) {
97fd75b7 1175 pr_err("Flags mismatch irq %d. %08x (%s) vs. %08x (%s)\n",
f5d89470
TG
1176 irq, new->flags, new->name, old->flags, old->name);
1177#ifdef CONFIG_DEBUG_SHIRQ
13e87ec6 1178 dump_stack();
3f050447 1179#endif
f5d89470 1180 }
3aa551c9
TG
1181 ret = -EBUSY;
1182
3b8249e7 1183out_mask:
1c389795 1184 raw_spin_unlock_irqrestore(&desc->lock, flags);
3b8249e7
TG
1185 free_cpumask_var(mask);
1186
3aa551c9 1187out_thread:
3aa551c9
TG
1188 if (new->thread) {
1189 struct task_struct *t = new->thread;
1190
1191 new->thread = NULL;
05d74efa 1192 kthread_stop(t);
3aa551c9
TG
1193 put_task_struct(t);
1194 }
b6873807
SAS
1195out_mput:
1196 module_put(desc->owner);
3aa551c9 1197 return ret;
1da177e4
LT
1198}
1199
d3c60047
TG
1200/**
1201 * setup_irq - setup an interrupt
1202 * @irq: Interrupt line to setup
1203 * @act: irqaction for the interrupt
1204 *
1205 * Used to statically setup interrupts in the early boot process.
1206 */
1207int setup_irq(unsigned int irq, struct irqaction *act)
1208{
986c011d 1209 int retval;
d3c60047
TG
1210 struct irq_desc *desc = irq_to_desc(irq);
1211
31d9d9b6
MZ
1212 if (WARN_ON(irq_settings_is_per_cpu_devid(desc)))
1213 return -EINVAL;
986c011d
DD
1214 chip_bus_lock(desc);
1215 retval = __setup_irq(irq, desc, act);
1216 chip_bus_sync_unlock(desc);
1217
1218 return retval;
d3c60047 1219}
eb53b4e8 1220EXPORT_SYMBOL_GPL(setup_irq);
d3c60047 1221
31d9d9b6 1222/*
cbf94f06
MD
1223 * Internal function to unregister an irqaction - used to free
1224 * regular and special interrupts that are part of the architecture.
1da177e4 1225 */
cbf94f06 1226static struct irqaction *__free_irq(unsigned int irq, void *dev_id)
1da177e4 1227{
d3c60047 1228 struct irq_desc *desc = irq_to_desc(irq);
f17c7545 1229 struct irqaction *action, **action_ptr;
1da177e4
LT
1230 unsigned long flags;
1231
ae88a23b 1232 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
7d94f7ca 1233
7d94f7ca 1234 if (!desc)
f21cfb25 1235 return NULL;
1da177e4 1236
239007b8 1237 raw_spin_lock_irqsave(&desc->lock, flags);
ae88a23b
IM
1238
1239 /*
1240 * There can be multiple actions per IRQ descriptor, find the right
1241 * one based on the dev_id:
1242 */
f17c7545 1243 action_ptr = &desc->action;
1da177e4 1244 for (;;) {
f17c7545 1245 action = *action_ptr;
1da177e4 1246
ae88a23b
IM
1247 if (!action) {
1248 WARN(1, "Trying to free already-free IRQ %d\n", irq);
239007b8 1249 raw_spin_unlock_irqrestore(&desc->lock, flags);
1da177e4 1250
f21cfb25 1251 return NULL;
ae88a23b 1252 }
1da177e4 1253
8316e381
IM
1254 if (action->dev_id == dev_id)
1255 break;
f17c7545 1256 action_ptr = &action->next;
ae88a23b 1257 }
dbce706e 1258
ae88a23b 1259 /* Found it - now remove it from the list of entries: */
f17c7545 1260 *action_ptr = action->next;
ae88a23b 1261
ae88a23b 1262 /* If this was the last handler, shut down the IRQ line: */
46999238
TG
1263 if (!desc->action)
1264 irq_shutdown(desc);
3aa551c9 1265
e7a297b0
PWJ
1266#ifdef CONFIG_SMP
1267 /* make sure affinity_hint is cleaned up */
1268 if (WARN_ON_ONCE(desc->affinity_hint))
1269 desc->affinity_hint = NULL;
1270#endif
1271
239007b8 1272 raw_spin_unlock_irqrestore(&desc->lock, flags);
ae88a23b
IM
1273
1274 unregister_handler_proc(irq, action);
1275
1276 /* Make sure it's not being used on another CPU: */
1277 synchronize_irq(irq);
1da177e4 1278
70edcd77 1279#ifdef CONFIG_DEBUG_SHIRQ
ae88a23b
IM
1280 /*
1281 * It's a shared IRQ -- the driver ought to be prepared for an IRQ
1282 * event to happen even now it's being freed, so let's make sure that
1283 * is so by doing an extra call to the handler ....
1284 *
1285 * ( We do this after actually deregistering it, to make sure that a
1286 * 'real' IRQ doesn't run in * parallel with our fake. )
1287 */
1288 if (action->flags & IRQF_SHARED) {
1289 local_irq_save(flags);
1290 action->handler(irq, dev_id);
1291 local_irq_restore(flags);
1da177e4 1292 }
ae88a23b 1293#endif
2d860ad7
LT
1294
1295 if (action->thread) {
05d74efa 1296 kthread_stop(action->thread);
2d860ad7
LT
1297 put_task_struct(action->thread);
1298 }
1299
b6873807 1300 module_put(desc->owner);
f21cfb25
MD
1301 return action;
1302}
1303
cbf94f06
MD
1304/**
1305 * remove_irq - free an interrupt
1306 * @irq: Interrupt line to free
1307 * @act: irqaction for the interrupt
1308 *
1309 * Used to remove interrupts statically setup by the early boot process.
1310 */
1311void remove_irq(unsigned int irq, struct irqaction *act)
1312{
31d9d9b6
MZ
1313 struct irq_desc *desc = irq_to_desc(irq);
1314
1315 if (desc && !WARN_ON(irq_settings_is_per_cpu_devid(desc)))
1316 __free_irq(irq, act->dev_id);
cbf94f06 1317}
eb53b4e8 1318EXPORT_SYMBOL_GPL(remove_irq);
cbf94f06 1319
f21cfb25
MD
1320/**
1321 * free_irq - free an interrupt allocated with request_irq
1322 * @irq: Interrupt line to free
1323 * @dev_id: Device identity to free
1324 *
1325 * Remove an interrupt handler. The handler is removed and if the
1326 * interrupt line is no longer in use by any driver it is disabled.
1327 * On a shared IRQ the caller must ensure the interrupt is disabled
1328 * on the card it drives before calling this function. The function
1329 * does not return until any executing interrupts for this IRQ
1330 * have completed.
1331 *
1332 * This function must not be called from interrupt context.
1333 */
1334void free_irq(unsigned int irq, void *dev_id)
1335{
70aedd24
TG
1336 struct irq_desc *desc = irq_to_desc(irq);
1337
31d9d9b6 1338 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
70aedd24
TG
1339 return;
1340
cd7eab44
BH
1341#ifdef CONFIG_SMP
1342 if (WARN_ON(desc->affinity_notify))
1343 desc->affinity_notify = NULL;
1344#endif
1345
3876ec9e 1346 chip_bus_lock(desc);
cbf94f06 1347 kfree(__free_irq(irq, dev_id));
3876ec9e 1348 chip_bus_sync_unlock(desc);
1da177e4 1349}
1da177e4
LT
1350EXPORT_SYMBOL(free_irq);
1351
1352/**
3aa551c9 1353 * request_threaded_irq - allocate an interrupt line
1da177e4 1354 * @irq: Interrupt line to allocate
3aa551c9
TG
1355 * @handler: Function to be called when the IRQ occurs.
1356 * Primary handler for threaded interrupts
b25c340c
TG
1357 * If NULL and thread_fn != NULL the default
1358 * primary handler is installed
f48fe81e
TG
1359 * @thread_fn: Function called from the irq handler thread
1360 * If NULL, no irq thread is created
1da177e4
LT
1361 * @irqflags: Interrupt type flags
1362 * @devname: An ascii name for the claiming device
1363 * @dev_id: A cookie passed back to the handler function
1364 *
1365 * This call allocates interrupt resources and enables the
1366 * interrupt line and IRQ handling. From the point this
1367 * call is made your handler function may be invoked. Since
1368 * your handler function must clear any interrupt the board
1369 * raises, you must take care both to initialise your hardware
1370 * and to set up the interrupt handler in the right order.
1371 *
3aa551c9 1372 * If you want to set up a threaded irq handler for your device
6d21af4f 1373 * then you need to supply @handler and @thread_fn. @handler is
3aa551c9
TG
1374 * still called in hard interrupt context and has to check
1375 * whether the interrupt originates from the device. If yes it
1376 * needs to disable the interrupt on the device and return
39a2eddb 1377 * IRQ_WAKE_THREAD which will wake up the handler thread and run
3aa551c9
TG
1378 * @thread_fn. This split handler design is necessary to support
1379 * shared interrupts.
1380 *
1da177e4
LT
1381 * Dev_id must be globally unique. Normally the address of the
1382 * device data structure is used as the cookie. Since the handler
1383 * receives this value it makes sense to use it.
1384 *
1385 * If your interrupt is shared you must pass a non NULL dev_id
1386 * as this is required when freeing the interrupt.
1387 *
1388 * Flags:
1389 *
3cca53b0 1390 * IRQF_SHARED Interrupt is shared
0c5d1eb7 1391 * IRQF_TRIGGER_* Specify active edge(s) or level
1da177e4
LT
1392 *
1393 */
3aa551c9
TG
1394int request_threaded_irq(unsigned int irq, irq_handler_t handler,
1395 irq_handler_t thread_fn, unsigned long irqflags,
1396 const char *devname, void *dev_id)
1da177e4 1397{
06fcb0c6 1398 struct irqaction *action;
08678b08 1399 struct irq_desc *desc;
d3c60047 1400 int retval;
1da177e4
LT
1401
1402 /*
1403 * Sanity-check: shared interrupts must pass in a real dev-ID,
1404 * otherwise we'll have trouble later trying to figure out
1405 * which interrupt is which (messes up the interrupt freeing
1406 * logic etc).
1407 */
3cca53b0 1408 if ((irqflags & IRQF_SHARED) && !dev_id)
1da177e4 1409 return -EINVAL;
7d94f7ca 1410
cb5bc832 1411 desc = irq_to_desc(irq);
7d94f7ca 1412 if (!desc)
1da177e4 1413 return -EINVAL;
7d94f7ca 1414
31d9d9b6
MZ
1415 if (!irq_settings_can_request(desc) ||
1416 WARN_ON(irq_settings_is_per_cpu_devid(desc)))
6550c775 1417 return -EINVAL;
b25c340c
TG
1418
1419 if (!handler) {
1420 if (!thread_fn)
1421 return -EINVAL;
1422 handler = irq_default_primary_handler;
1423 }
1da177e4 1424
45535732 1425 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1da177e4
LT
1426 if (!action)
1427 return -ENOMEM;
1428
1429 action->handler = handler;
3aa551c9 1430 action->thread_fn = thread_fn;
1da177e4 1431 action->flags = irqflags;
1da177e4 1432 action->name = devname;
1da177e4
LT
1433 action->dev_id = dev_id;
1434
3876ec9e 1435 chip_bus_lock(desc);
d3c60047 1436 retval = __setup_irq(irq, desc, action);
3876ec9e 1437 chip_bus_sync_unlock(desc);
70aedd24 1438
377bf1e4
AV
1439 if (retval)
1440 kfree(action);
1441
6d83f94d 1442#ifdef CONFIG_DEBUG_SHIRQ_FIXME
6ce51c43 1443 if (!retval && (irqflags & IRQF_SHARED)) {
a304e1b8
DW
1444 /*
1445 * It's a shared IRQ -- the driver ought to be prepared for it
1446 * to happen immediately, so let's make sure....
377bf1e4
AV
1447 * We disable the irq to make sure that a 'real' IRQ doesn't
1448 * run in parallel with our fake.
a304e1b8 1449 */
59845b1f 1450 unsigned long flags;
a304e1b8 1451
377bf1e4 1452 disable_irq(irq);
59845b1f 1453 local_irq_save(flags);
377bf1e4 1454
59845b1f 1455 handler(irq, dev_id);
377bf1e4 1456
59845b1f 1457 local_irq_restore(flags);
377bf1e4 1458 enable_irq(irq);
a304e1b8
DW
1459 }
1460#endif
1da177e4
LT
1461 return retval;
1462}
3aa551c9 1463EXPORT_SYMBOL(request_threaded_irq);
ae731f8d
MZ
1464
1465/**
1466 * request_any_context_irq - allocate an interrupt line
1467 * @irq: Interrupt line to allocate
1468 * @handler: Function to be called when the IRQ occurs.
1469 * Threaded handler for threaded interrupts.
1470 * @flags: Interrupt type flags
1471 * @name: An ascii name for the claiming device
1472 * @dev_id: A cookie passed back to the handler function
1473 *
1474 * This call allocates interrupt resources and enables the
1475 * interrupt line and IRQ handling. It selects either a
1476 * hardirq or threaded handling method depending on the
1477 * context.
1478 *
1479 * On failure, it returns a negative value. On success,
1480 * it returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED.
1481 */
1482int request_any_context_irq(unsigned int irq, irq_handler_t handler,
1483 unsigned long flags, const char *name, void *dev_id)
1484{
1485 struct irq_desc *desc = irq_to_desc(irq);
1486 int ret;
1487
1488 if (!desc)
1489 return -EINVAL;
1490
1ccb4e61 1491 if (irq_settings_is_nested_thread(desc)) {
ae731f8d
MZ
1492 ret = request_threaded_irq(irq, NULL, handler,
1493 flags, name, dev_id);
1494 return !ret ? IRQC_IS_NESTED : ret;
1495 }
1496
1497 ret = request_irq(irq, handler, flags, name, dev_id);
1498 return !ret ? IRQC_IS_HARDIRQ : ret;
1499}
1500EXPORT_SYMBOL_GPL(request_any_context_irq);
31d9d9b6 1501
1e7c5fd2 1502void enable_percpu_irq(unsigned int irq, unsigned int type)
31d9d9b6
MZ
1503{
1504 unsigned int cpu = smp_processor_id();
1505 unsigned long flags;
1506 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1507
1508 if (!desc)
1509 return;
1510
1e7c5fd2
MZ
1511 type &= IRQ_TYPE_SENSE_MASK;
1512 if (type != IRQ_TYPE_NONE) {
1513 int ret;
1514
1515 ret = __irq_set_trigger(desc, irq, type);
1516
1517 if (ret) {
32cffdde 1518 WARN(1, "failed to set type for IRQ%d\n", irq);
1e7c5fd2
MZ
1519 goto out;
1520 }
1521 }
1522
31d9d9b6 1523 irq_percpu_enable(desc, cpu);
1e7c5fd2 1524out:
31d9d9b6
MZ
1525 irq_put_desc_unlock(desc, flags);
1526}
1527
1528void disable_percpu_irq(unsigned int irq)
1529{
1530 unsigned int cpu = smp_processor_id();
1531 unsigned long flags;
1532 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1533
1534 if (!desc)
1535 return;
1536
1537 irq_percpu_disable(desc, cpu);
1538 irq_put_desc_unlock(desc, flags);
1539}
1540
1541/*
1542 * Internal function to unregister a percpu irqaction.
1543 */
1544static struct irqaction *__free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1545{
1546 struct irq_desc *desc = irq_to_desc(irq);
1547 struct irqaction *action;
1548 unsigned long flags;
1549
1550 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
1551
1552 if (!desc)
1553 return NULL;
1554
1555 raw_spin_lock_irqsave(&desc->lock, flags);
1556
1557 action = desc->action;
1558 if (!action || action->percpu_dev_id != dev_id) {
1559 WARN(1, "Trying to free already-free IRQ %d\n", irq);
1560 goto bad;
1561 }
1562
1563 if (!cpumask_empty(desc->percpu_enabled)) {
1564 WARN(1, "percpu IRQ %d still enabled on CPU%d!\n",
1565 irq, cpumask_first(desc->percpu_enabled));
1566 goto bad;
1567 }
1568
1569 /* Found it - now remove it from the list of entries: */
1570 desc->action = NULL;
1571
1572 raw_spin_unlock_irqrestore(&desc->lock, flags);
1573
1574 unregister_handler_proc(irq, action);
1575
1576 module_put(desc->owner);
1577 return action;
1578
1579bad:
1580 raw_spin_unlock_irqrestore(&desc->lock, flags);
1581 return NULL;
1582}
1583
1584/**
1585 * remove_percpu_irq - free a per-cpu interrupt
1586 * @irq: Interrupt line to free
1587 * @act: irqaction for the interrupt
1588 *
1589 * Used to remove interrupts statically setup by the early boot process.
1590 */
1591void remove_percpu_irq(unsigned int irq, struct irqaction *act)
1592{
1593 struct irq_desc *desc = irq_to_desc(irq);
1594
1595 if (desc && irq_settings_is_per_cpu_devid(desc))
1596 __free_percpu_irq(irq, act->percpu_dev_id);
1597}
1598
1599/**
1600 * free_percpu_irq - free an interrupt allocated with request_percpu_irq
1601 * @irq: Interrupt line to free
1602 * @dev_id: Device identity to free
1603 *
1604 * Remove a percpu interrupt handler. The handler is removed, but
1605 * the interrupt line is not disabled. This must be done on each
1606 * CPU before calling this function. The function does not return
1607 * until any executing interrupts for this IRQ have completed.
1608 *
1609 * This function must not be called from interrupt context.
1610 */
1611void free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1612{
1613 struct irq_desc *desc = irq_to_desc(irq);
1614
1615 if (!desc || !irq_settings_is_per_cpu_devid(desc))
1616 return;
1617
1618 chip_bus_lock(desc);
1619 kfree(__free_percpu_irq(irq, dev_id));
1620 chip_bus_sync_unlock(desc);
1621}
1622
1623/**
1624 * setup_percpu_irq - setup a per-cpu interrupt
1625 * @irq: Interrupt line to setup
1626 * @act: irqaction for the interrupt
1627 *
1628 * Used to statically setup per-cpu interrupts in the early boot process.
1629 */
1630int setup_percpu_irq(unsigned int irq, struct irqaction *act)
1631{
1632 struct irq_desc *desc = irq_to_desc(irq);
1633 int retval;
1634
1635 if (!desc || !irq_settings_is_per_cpu_devid(desc))
1636 return -EINVAL;
1637 chip_bus_lock(desc);
1638 retval = __setup_irq(irq, desc, act);
1639 chip_bus_sync_unlock(desc);
1640
1641 return retval;
1642}
1643
1644/**
1645 * request_percpu_irq - allocate a percpu interrupt line
1646 * @irq: Interrupt line to allocate
1647 * @handler: Function to be called when the IRQ occurs.
1648 * @devname: An ascii name for the claiming device
1649 * @dev_id: A percpu cookie passed back to the handler function
1650 *
1651 * This call allocates interrupt resources, but doesn't
1652 * automatically enable the interrupt. It has to be done on each
1653 * CPU using enable_percpu_irq().
1654 *
1655 * Dev_id must be globally unique. It is a per-cpu variable, and
1656 * the handler gets called with the interrupted CPU's instance of
1657 * that variable.
1658 */
1659int request_percpu_irq(unsigned int irq, irq_handler_t handler,
1660 const char *devname, void __percpu *dev_id)
1661{
1662 struct irqaction *action;
1663 struct irq_desc *desc;
1664 int retval;
1665
1666 if (!dev_id)
1667 return -EINVAL;
1668
1669 desc = irq_to_desc(irq);
1670 if (!desc || !irq_settings_can_request(desc) ||
1671 !irq_settings_is_per_cpu_devid(desc))
1672 return -EINVAL;
1673
1674 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1675 if (!action)
1676 return -ENOMEM;
1677
1678 action->handler = handler;
2ed0e645 1679 action->flags = IRQF_PERCPU | IRQF_NO_SUSPEND;
31d9d9b6
MZ
1680 action->name = devname;
1681 action->percpu_dev_id = dev_id;
1682
1683 chip_bus_lock(desc);
1684 retval = __setup_irq(irq, desc, action);
1685 chip_bus_sync_unlock(desc);
1686
1687 if (retval)
1688 kfree(action);
1689
1690 return retval;
1691}
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