Commit | Line | Data |
---|---|---|
c777ac55 | 1 | |
d824e66a | 2 | #include <linux/irq.h> |
c777ac55 AM |
3 | |
4 | void set_pending_irq(unsigned int irq, cpumask_t mask) | |
5 | { | |
34ffdb72 | 6 | struct irq_desc *desc = irq_desc + irq; |
c777ac55 AM |
7 | unsigned long flags; |
8 | ||
9 | spin_lock_irqsave(&desc->lock, flags); | |
a24ceab4 | 10 | desc->status |= IRQ_MOVE_PENDING; |
cd916d31 | 11 | irq_desc[irq].pending_mask = mask; |
c777ac55 AM |
12 | spin_unlock_irqrestore(&desc->lock, flags); |
13 | } | |
14 | ||
e7b946e9 | 15 | void move_masked_irq(int irq) |
c777ac55 | 16 | { |
34ffdb72 | 17 | struct irq_desc *desc = irq_desc + irq; |
c777ac55 | 18 | cpumask_t tmp; |
c777ac55 | 19 | |
a24ceab4 | 20 | if (likely(!(desc->status & IRQ_MOVE_PENDING))) |
c777ac55 AM |
21 | return; |
22 | ||
501f2499 BH |
23 | /* |
24 | * Paranoia: cpu-local interrupts shouldn't be calling in here anyway. | |
25 | */ | |
26 | if (CHECK_IRQ_PER_CPU(desc->status)) { | |
27 | WARN_ON(1); | |
28 | return; | |
29 | } | |
30 | ||
a24ceab4 | 31 | desc->status &= ~IRQ_MOVE_PENDING; |
c777ac55 | 32 | |
cd916d31 | 33 | if (unlikely(cpus_empty(irq_desc[irq].pending_mask))) |
c777ac55 AM |
34 | return; |
35 | ||
d1bef4ed | 36 | if (!desc->chip->set_affinity) |
c777ac55 AM |
37 | return; |
38 | ||
501f2499 BH |
39 | assert_spin_locked(&desc->lock); |
40 | ||
cd916d31 | 41 | cpus_and(tmp, irq_desc[irq].pending_mask, cpu_online_map); |
c777ac55 AM |
42 | |
43 | /* | |
44 | * If there was a valid mask to work with, please | |
45 | * do the disable, re-program, enable sequence. | |
46 | * This is *not* particularly important for level triggered | |
47 | * but in a edge trigger case, we might be setting rte | |
48 | * when an active trigger is comming in. This could | |
49 | * cause some ioapics to mal-function. | |
50 | * Being paranoid i guess! | |
e7b946e9 EB |
51 | * |
52 | * For correct operation this depends on the caller | |
53 | * masking the irqs. | |
c777ac55 | 54 | */ |
89d0cf01 | 55 | if (likely(!cpus_empty(tmp))) { |
d1bef4ed | 56 | desc->chip->set_affinity(irq,tmp); |
c777ac55 | 57 | } |
cd916d31 | 58 | cpus_clear(irq_desc[irq].pending_mask); |
c777ac55 | 59 | } |
e7b946e9 EB |
60 | |
61 | void move_native_irq(int irq) | |
62 | { | |
63 | struct irq_desc *desc = irq_desc + irq; | |
64 | ||
65 | if (likely(!(desc->status & IRQ_MOVE_PENDING))) | |
66 | return; | |
67 | ||
2a786b45 EB |
68 | if (unlikely(desc->status & IRQ_DISABLED)) |
69 | return; | |
e7b946e9 | 70 | |
2a786b45 | 71 | desc->chip->mask(irq); |
e7b946e9 | 72 | move_masked_irq(irq); |
2a786b45 | 73 | desc->chip->unmask(irq); |
e7b946e9 EB |
74 | } |
75 |