Commit | Line | Data |
---|---|---|
c777ac55 | 1 | |
d824e66a | 2 | #include <linux/irq.h> |
57b150cc YL |
3 | #include <linux/interrupt.h> |
4 | ||
5 | #include "internals.h" | |
c777ac55 | 6 | |
e7b946e9 | 7 | void move_masked_irq(int irq) |
c777ac55 | 8 | { |
08678b08 | 9 | struct irq_desc *desc = irq_to_desc(irq); |
c96b3b3c | 10 | struct irq_chip *chip = desc->irq_data.chip; |
c777ac55 | 11 | |
a24ceab4 | 12 | if (likely(!(desc->status & IRQ_MOVE_PENDING))) |
c777ac55 AM |
13 | return; |
14 | ||
501f2499 BH |
15 | /* |
16 | * Paranoia: cpu-local interrupts shouldn't be calling in here anyway. | |
17 | */ | |
18 | if (CHECK_IRQ_PER_CPU(desc->status)) { | |
19 | WARN_ON(1); | |
20 | return; | |
21 | } | |
22 | ||
a24ceab4 | 23 | desc->status &= ~IRQ_MOVE_PENDING; |
c777ac55 | 24 | |
7f7ace0c | 25 | if (unlikely(cpumask_empty(desc->pending_mask))) |
c777ac55 AM |
26 | return; |
27 | ||
c96b3b3c | 28 | if (!chip->irq_set_affinity) |
c777ac55 AM |
29 | return; |
30 | ||
239007b8 | 31 | assert_raw_spin_locked(&desc->lock); |
501f2499 | 32 | |
c777ac55 AM |
33 | /* |
34 | * If there was a valid mask to work with, please | |
35 | * do the disable, re-program, enable sequence. | |
36 | * This is *not* particularly important for level triggered | |
37 | * but in a edge trigger case, we might be setting rte | |
38 | * when an active trigger is comming in. This could | |
39 | * cause some ioapics to mal-function. | |
40 | * Being paranoid i guess! | |
e7b946e9 EB |
41 | * |
42 | * For correct operation this depends on the caller | |
43 | * masking the irqs. | |
c777ac55 | 44 | */ |
7f7ace0c | 45 | if (likely(cpumask_any_and(desc->pending_mask, cpu_online_mask) |
57b150cc | 46 | < nr_cpu_ids)) |
c96b3b3c TG |
47 | if (!chip->irq_set_affinity(&desc->irq_data, |
48 | desc->pending_mask, false)) { | |
6b8ff312 | 49 | cpumask_copy(desc->irq_data.affinity, desc->pending_mask); |
591d2fb0 | 50 | irq_set_thread_affinity(desc); |
57b150cc YL |
51 | } |
52 | ||
7f7ace0c | 53 | cpumask_clear(desc->pending_mask); |
c777ac55 | 54 | } |
e7b946e9 EB |
55 | |
56 | void move_native_irq(int irq) | |
57 | { | |
08678b08 | 58 | struct irq_desc *desc = irq_to_desc(irq); |
f1a06390 | 59 | bool masked; |
e7b946e9 EB |
60 | |
61 | if (likely(!(desc->status & IRQ_MOVE_PENDING))) | |
62 | return; | |
63 | ||
2a786b45 EB |
64 | if (unlikely(desc->status & IRQ_DISABLED)) |
65 | return; | |
e7b946e9 | 66 | |
f1a06390 TG |
67 | /* |
68 | * Be careful vs. already masked interrupts. If this is a | |
69 | * threaded interrupt with ONESHOT set, we can end up with an | |
70 | * interrupt storm. | |
71 | */ | |
72 | masked = desc->status & IRQ_MASKED; | |
73 | if (!masked) | |
74 | desc->irq_data.chip->irq_mask(&desc->irq_data); | |
e7b946e9 | 75 | move_masked_irq(irq); |
f1a06390 TG |
76 | if (!masked) |
77 | desc->irq_data.chip->irq_unmask(&desc->irq_data); | |
e7b946e9 | 78 | } |