[deliverable/linux.git] / kernel / irq / msi.c

/*
 * linux/kernel/irq/msi.c
 *
 * Copyright (C) 2014 Intel Corp.
 * Author: Jiang Liu <jiang.liu@linux.intel.com>
 *
 * This file is licensed under GPLv2.
 *
 * This file contains common code to support Message Signalled Interrupt for
 * PCI compatible and non PCI compatible devices.
 */
#include <linux/types.h>
#include <linux/device.h>
#include <linux/irq.h>
#include <linux/irqdomain.h>
#include <linux/msi.h>

/* Temparory solution for building, will be removed later */
#include <linux/pci.h>

void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
{
	*msg = entry->msg;
}

void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
{
	struct msi_desc *entry = irq_get_msi_desc(irq);

	__get_cached_msi_msg(entry, msg);
}
EXPORT_SYMBOL_GPL(get_cached_msi_msg);

#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
/**
 * msi_domain_set_affinity - Generic affinity setter function for MSI domains
 * @irq_data:	The irq data associated to the interrupt
 * @mask:	The affinity mask to set
 * @force:	Flag to enforce setting (disable online checks)
 *
 * Intended to be used by MSI interrupt controllers which are
 * implemented with hierarchical domains.
 */
int msi_domain_set_affinity(struct irq_data *irq_data,
			    const struct cpumask *mask, bool force)
{
	struct irq_data *parent = irq_data->parent_data;
	struct msi_msg msg;
	int ret;

	ret = parent->chip->irq_set_affinity(parent, mask, force);
	if (ret >= 0 && ret != IRQ_SET_MASK_OK_DONE) {
		BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
		irq_chip_write_msi_msg(irq_data, &msg);
	}

	return ret;
}

static void msi_domain_activate(struct irq_domain *domain,
				struct irq_data *irq_data)
{
	struct msi_msg msg;

	BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
	irq_chip_write_msi_msg(irq_data, &msg);
}

static void msi_domain_deactivate(struct irq_domain *domain,
				  struct irq_data *irq_data)
{
	struct msi_msg msg;

	memset(&msg, 0, sizeof(msg));
	irq_chip_write_msi_msg(irq_data, &msg);
}

static int msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
			    unsigned int nr_irqs, void *arg)
{
	struct msi_domain_info *info = domain->host_data;
	struct msi_domain_ops *ops = info->ops;
	irq_hw_number_t hwirq = ops->get_hwirq(info, arg);
	int i, ret;

	if (irq_find_mapping(domain, hwirq) > 0)
		return -EEXIST;

	ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
	if (ret < 0)
		return ret;

	for (i = 0; i < nr_irqs; i++) {
		ret = ops->msi_init(domain, info, virq + i, hwirq + i, arg);
		if (ret < 0) {
			if (ops->msi_free) {
				for (i--; i > 0; i--)
					ops->msi_free(domain, info, virq + i);
			}
			irq_domain_free_irqs_top(domain, virq, nr_irqs);
			return ret;
		}
	}

	return 0;
}

static void msi_domain_free(struct irq_domain *domain, unsigned int virq,
			    unsigned int nr_irqs)
{
	struct msi_domain_info *info = domain->host_data;
	int i;

	if (info->ops->msi_free) {
		for (i = 0; i < nr_irqs; i++)
			info->ops->msi_free(domain, info, virq + i);
	}
	irq_domain_free_irqs_top(domain, virq, nr_irqs);
}

static struct irq_domain_ops msi_domain_ops = {
	.alloc		= msi_domain_alloc,
	.free		= msi_domain_free,
	.activate	= msi_domain_activate,
	.deactivate	= msi_domain_deactivate,
};

#ifdef GENERIC_MSI_DOMAIN_OPS
static irq_hw_number_t msi_domain_ops_get_hwirq(struct msi_domain_info *info,
						msi_alloc_info_t *arg)
{
	return arg->hwirq;
}

static int msi_domain_ops_prepare(struct irq_domain *domain, struct device *dev,
				  int nvec, msi_alloc_info_t *arg)
{
	memset(arg, 0, sizeof(*arg));
	return 0;
}

static void msi_domain_ops_set_desc(msi_alloc_info_t *arg,
				    struct msi_desc *desc)
{
	arg->desc = desc;
}
#else
#define msi_domain_ops_get_hwirq	NULL
#define msi_domain_ops_prepare		NULL
#define msi_domain_ops_set_desc		NULL
#endif /* !GENERIC_MSI_DOMAIN_OPS */

static int msi_domain_ops_init(struct irq_domain *domain,
			       struct msi_domain_info *info,
			       unsigned int virq, irq_hw_number_t hwirq,
			       msi_alloc_info_t *arg)
{
	irq_domain_set_hwirq_and_chip(domain, virq, hwirq, info->chip,
				      info->chip_data);
	if (info->handler && info->handler_name) {
		__irq_set_handler(virq, info->handler, 0, info->handler_name);
		if (info->handler_data)
			irq_set_handler_data(virq, info->handler_data);
	}
	return 0;
}

static int msi_domain_ops_check(struct irq_domain *domain,
				struct msi_domain_info *info,
				struct device *dev)
{
	return 0;
}

static struct msi_domain_ops msi_domain_ops_default = {
	.get_hwirq	= msi_domain_ops_get_hwirq,
	.msi_init	= msi_domain_ops_init,
	.msi_check	= msi_domain_ops_check,
	.msi_prepare	= msi_domain_ops_prepare,
	.set_desc	= msi_domain_ops_set_desc,
};

static void msi_domain_update_dom_ops(struct msi_domain_info *info)
{
	struct msi_domain_ops *ops = info->ops;

	if (ops == NULL) {
		info->ops = &msi_domain_ops_default;
		return;
	}

	if (ops->get_hwirq == NULL)
		ops->get_hwirq = msi_domain_ops_default.get_hwirq;
	if (ops->msi_init == NULL)
		ops->msi_init = msi_domain_ops_default.msi_init;
	if (ops->msi_check == NULL)
		ops->msi_check = msi_domain_ops_default.msi_check;
	if (ops->msi_prepare == NULL)
		ops->msi_prepare = msi_domain_ops_default.msi_prepare;
	if (ops->set_desc == NULL)
		ops->set_desc = msi_domain_ops_default.set_desc;
}

static void msi_domain_update_chip_ops(struct msi_domain_info *info)
{
	struct irq_chip *chip = info->chip;

	BUG_ON(!chip);
	if (!chip->irq_mask)
		chip->irq_mask = pci_msi_mask_irq;
	if (!chip->irq_unmask)
		chip->irq_unmask = pci_msi_unmask_irq;
	if (!chip->irq_set_affinity)
		chip->irq_set_affinity = msi_domain_set_affinity;
}

/**
 * msi_create_irq_domain - Create a MSI interrupt domain
 * @of_node:	Optional device-tree node of the interrupt controller
 * @info:	MSI domain info
 * @parent:	Parent irq domain
 */
struct irq_domain *msi_create_irq_domain(struct device_node *node,
					 struct msi_domain_info *info,
					 struct irq_domain *parent)
{
	if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
		msi_domain_update_dom_ops(info);
	if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
		msi_domain_update_chip_ops(info);

	return irq_domain_add_hierarchy(parent, 0, 0, node, &msi_domain_ops,
					info);
}

/**
 * msi_domain_alloc_irqs - Allocate interrupts from a MSI interrupt domain
 * @domain:	The domain to allocate from
 * @dev:	Pointer to device struct of the device for which the interrupts
 *		are allocated
 * @nvec:	The number of interrupts to allocate
 *
 * Returns 0 on success or an error code.
 */
int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
			  int nvec)
{
	struct msi_domain_info *info = domain->host_data;
	struct msi_domain_ops *ops = info->ops;
	msi_alloc_info_t arg;
	struct msi_desc *desc;
	int i, ret, virq = -1;

	ret = ops->msi_check(domain, info, dev);
	if (ret == 0)
		ret = ops->msi_prepare(domain, dev, nvec, &arg);
	if (ret)
		return ret;

	for_each_msi_entry(desc, dev) {
		ops->set_desc(&arg, desc);
		if (info->flags & MSI_FLAG_IDENTITY_MAP)
			virq = (int)ops->get_hwirq(info, &arg);
		else
			virq = -1;

		virq = __irq_domain_alloc_irqs(domain, virq, desc->nvec_used,
					       dev_to_node(dev), &arg, false);
		if (virq < 0) {
			ret = -ENOSPC;
			if (ops->handle_error)
				ret = ops->handle_error(domain, desc, ret);
			if (ops->msi_finish)
				ops->msi_finish(&arg, ret);
			return ret;
		}

		for (i = 0; i < desc->nvec_used; i++)
			irq_set_msi_desc_off(virq, i, desc);
	}

	if (ops->msi_finish)
		ops->msi_finish(&arg, 0);

	for_each_msi_entry(desc, dev) {
		if (desc->nvec_used == 1)
			dev_dbg(dev, "irq %d for MSI\n", virq);
		else
			dev_dbg(dev, "irq [%d-%d] for MSI\n",
				virq, virq + desc->nvec_used - 1);
	}

	return 0;
}

/**
 * msi_domain_free_irqs - Free interrupts from a MSI interrupt @domain associated tp @dev
 * @domain:	The domain to managing the interrupts
 * @dev:	Pointer to device struct of the device for which the interrupts
 *		are free
 */
void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev)
{
	struct msi_desc *desc;

	for_each_msi_entry(desc, dev) {
		irq_domain_free_irqs(desc->irq, desc->nvec_used);
		desc->irq = 0;
	}
}

/**
 * msi_get_domain_info - Get the MSI interrupt domain info for @domain
 * @domain:	The interrupt domain to retrieve data from
 *
 * Returns the pointer to the msi_domain_info stored in
 * @domain->host_data.
 */
struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain)
{
	return (struct msi_domain_info *)domain->host_data;
}

#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */
Commit	Line	Data
f3cf8bb0 JL	1	/*
	2	* linux/kernel/irq/msi.c
	3	*
	4	* Copyright (C) 2014 Intel Corp.
	5	* Author: Jiang Liu <jiang.liu@linux.intel.com>
	6	*
	7	* This file is licensed under GPLv2.
	8	*
	9	* This file contains common code to support Message Signalled Interrupt for
	10	* PCI compatible and non PCI compatible devices.
	11	*/
aeeb5965 JL	12	#include <linux/types.h>
aeeb5965 JL	13	#include <linux/device.h>
f3cf8bb0 JL	14	#include <linux/irq.h>
	15	#include <linux/irqdomain.h>
	16	#include <linux/msi.h>
	17
d9109698 JL	18	/* Temparory solution for building, will be removed later */
	19	#include <linux/pci.h>
	20
38b6a1cf JL	21	void __get_cached_msi_msg(struct msi_desc entry, struct msi_msg msg)
	22	{
	23	*msg = entry->msg;
	24	}
	25
	26	void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
	27	{
	28	struct msi_desc *entry = irq_get_msi_desc(irq);
	29
	30	__get_cached_msi_msg(entry, msg);
	31	}
	32	EXPORT_SYMBOL_GPL(get_cached_msi_msg);
	33
f3cf8bb0 JL	34	#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
	35	/**
	36	* msi_domain_set_affinity - Generic affinity setter function for MSI domains
	37	* @irq_data: The irq data associated to the interrupt
	38	* @mask: The affinity mask to set
	39	* @force: Flag to enforce setting (disable online checks)
	40	*
	41	* Intended to be used by MSI interrupt controllers which are
	42	* implemented with hierarchical domains.
	43	*/
	44	int msi_domain_set_affinity(struct irq_data *irq_data,
	45	const struct cpumask *mask, bool force)
	46	{
	47	struct irq_data *parent = irq_data->parent_data;
	48	struct msi_msg msg;
	49	int ret;
	50
	51	ret = parent->chip->irq_set_affinity(parent, mask, force);
	52	if (ret >= 0 && ret != IRQ_SET_MASK_OK_DONE) {
	53	BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
	54	irq_chip_write_msi_msg(irq_data, &msg);
	55	}
	56
	57	return ret;
	58	}
	59
	60	static void msi_domain_activate(struct irq_domain *domain,
	61	struct irq_data *irq_data)
	62	{
	63	struct msi_msg msg;
	64
	65	BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
	66	irq_chip_write_msi_msg(irq_data, &msg);
	67	}
	68
	69	static void msi_domain_deactivate(struct irq_domain *domain,
	70	struct irq_data *irq_data)
	71	{
	72	struct msi_msg msg;
	73
	74	memset(&msg, 0, sizeof(msg));
	75	irq_chip_write_msi_msg(irq_data, &msg);
	76	}
	77
	78	static int msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
	79	unsigned int nr_irqs, void *arg)
	80	{
	81	struct msi_domain_info *info = domain->host_data;
	82	struct msi_domain_ops *ops = info->ops;
	83	irq_hw_number_t hwirq = ops->get_hwirq(info, arg);
	84	int i, ret;
	85
	86	if (irq_find_mapping(domain, hwirq) > 0)
	87	return -EEXIST;
	88
	89	ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
	90	if (ret < 0)
	91	return ret;
	92
	93	for (i = 0; i < nr_irqs; i++) {
	94	ret = ops->msi_init(domain, info, virq + i, hwirq + i, arg);
	95	if (ret < 0) {
	96	if (ops->msi_free) {
	97	for (i--; i > 0; i--)
98	ops->msi_free(domain, info, virq + i);
99	}
100	irq_domain_free_irqs_top(domain, virq, nr_irqs);
101	return ret;
102	}
103	}
104
105	return 0;
106	}
107
108	static void msi_domain_free(struct irq_domain *domain, unsigned int virq,
109	unsigned int nr_irqs)
110	{
111	struct msi_domain_info *info = domain->host_data;
112	int i;
113
114	if (info->ops->msi_free) {
115	for (i = 0; i < nr_irqs; i++)
116	info->ops->msi_free(domain, info, virq + i);
117	}
118	irq_domain_free_irqs_top(domain, virq, nr_irqs);
119	}
120
121	static struct irq_domain_ops msi_domain_ops = {
122	.alloc = msi_domain_alloc,
123	.free = msi_domain_free,
124	.activate = msi_domain_activate,
125	.deactivate = msi_domain_deactivate,
126	};
127
aeeb5965 JL	128	#ifdef GENERIC_MSI_DOMAIN_OPS
	129	static irq_hw_number_t msi_domain_ops_get_hwirq(struct msi_domain_info *info,
	130	msi_alloc_info_t *arg)
	131	{
	132	return arg->hwirq;
	133	}
	134
	135	static int msi_domain_ops_prepare(struct irq_domain domain, struct device dev,
	136	int nvec, msi_alloc_info_t *arg)
	137	{
	138	memset(arg, 0, sizeof(*arg));
	139	return 0;
	140	}
	141
	142	static void msi_domain_ops_set_desc(msi_alloc_info_t *arg,
	143	struct msi_desc *desc)
	144	{
	145	arg->desc = desc;
	146	}
	147	#else
	148	#define msi_domain_ops_get_hwirq NULL
	149	#define msi_domain_ops_prepare NULL
	150	#define msi_domain_ops_set_desc NULL
	151	#endif /* !GENERIC_MSI_DOMAIN_OPS */
	152
	153	static int msi_domain_ops_init(struct irq_domain *domain,
	154	struct msi_domain_info *info,
	155	unsigned int virq, irq_hw_number_t hwirq,
	156	msi_alloc_info_t *arg)
	157	{
	158	irq_domain_set_hwirq_and_chip(domain, virq, hwirq, info->chip,
	159	info->chip_data);
	160	if (info->handler && info->handler_name) {
	161	__irq_set_handler(virq, info->handler, 0, info->handler_name);
	162	if (info->handler_data)
	163	irq_set_handler_data(virq, info->handler_data);
	164	}
	165	return 0;
	166	}
	167
	168	static int msi_domain_ops_check(struct irq_domain *domain,
	169	struct msi_domain_info *info,
	170	struct device *dev)
	171	{
	172	return 0;
	173	}
	174
	175	static struct msi_domain_ops msi_domain_ops_default = {
	176	.get_hwirq = msi_domain_ops_get_hwirq,
	177	.msi_init = msi_domain_ops_init,
	178	.msi_check = msi_domain_ops_check,
	179	.msi_prepare = msi_domain_ops_prepare,
	180	.set_desc = msi_domain_ops_set_desc,
	181	};
	182
	183	static void msi_domain_update_dom_ops(struct msi_domain_info *info)
	184	{
	185	struct msi_domain_ops *ops = info->ops;
	186
	187	if (ops == NULL) {
	188	info->ops = &msi_domain_ops_default;
	189	return;
	190	}
	191
192	if (ops->get_hwirq == NULL)
193	ops->get_hwirq = msi_domain_ops_default.get_hwirq;
194	if (ops->msi_init == NULL)
195	ops->msi_init = msi_domain_ops_default.msi_init;
196	if (ops->msi_check == NULL)
197	ops->msi_check = msi_domain_ops_default.msi_check;
198	if (ops->msi_prepare == NULL)
199	ops->msi_prepare = msi_domain_ops_default.msi_prepare;
200	if (ops->set_desc == NULL)
201	ops->set_desc = msi_domain_ops_default.set_desc;
202	}
203
204	static void msi_domain_update_chip_ops(struct msi_domain_info *info)
205	{
206	struct irq_chip *chip = info->chip;
207
208	BUG_ON(!chip);
209	if (!chip->irq_mask)
210	chip->irq_mask = pci_msi_mask_irq;
211	if (!chip->irq_unmask)
212	chip->irq_unmask = pci_msi_unmask_irq;
213	if (!chip->irq_set_affinity)
214	chip->irq_set_affinity = msi_domain_set_affinity;
215	}
216
f3cf8bb0 JL	217	/**
	218	* msi_create_irq_domain - Create a MSI interrupt domain
	219	* @of_node: Optional device-tree node of the interrupt controller
	220	* @info: MSI domain info
	221	* @parent: Parent irq domain
	222	*/
aeeb5965	223	struct irq_domain msi_create_irq_domain(struct device_node node,
f3cf8bb0 JL	224	struct msi_domain_info *info,
	225	struct irq_domain *parent)
	226	{
aeeb5965 JL	227	if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
	228	msi_domain_update_dom_ops(info);
	229	if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
	230	msi_domain_update_chip_ops(info);
f3cf8bb0	231
aeeb5965 JL	232	return irq_domain_add_hierarchy(parent, 0, 0, node, &msi_domain_ops,
aeeb5965 JL	233	info);
f3cf8bb0 JL	234	}
f3cf8bb0 JL	235
d9109698 JL	236	/**
	237	* msi_domain_alloc_irqs - Allocate interrupts from a MSI interrupt domain
	238	* @domain: The domain to allocate from
	239	* @dev: Pointer to device struct of the device for which the interrupts
	240	* are allocated
	241	* @nvec: The number of interrupts to allocate
	242	*
	243	* Returns 0 on success or an error code.
	244	*/
	245	int msi_domain_alloc_irqs(struct irq_domain domain, struct device dev,
	246	int nvec)
	247	{
	248	struct msi_domain_info *info = domain->host_data;
	249	struct msi_domain_ops *ops = info->ops;
	250	msi_alloc_info_t arg;
	251	struct msi_desc *desc;
	252	int i, ret, virq = -1;
	253
	254	ret = ops->msi_check(domain, info, dev);
	255	if (ret == 0)
	256	ret = ops->msi_prepare(domain, dev, nvec, &arg);
	257	if (ret)
	258	return ret;
	259
	260	for_each_msi_entry(desc, dev) {
	261	ops->set_desc(&arg, desc);
aeeb5965 JL	262	if (info->flags & MSI_FLAG_IDENTITY_MAP)
	263	virq = (int)ops->get_hwirq(info, &arg);
	264	else
	265	virq = -1;
d9109698	266
aeeb5965	267	virq = __irq_domain_alloc_irqs(domain, virq, desc->nvec_used,
d9109698 JL	268	dev_to_node(dev), &arg, false);
	269	if (virq < 0) {
	270	ret = -ENOSPC;
	271	if (ops->handle_error)
	272	ret = ops->handle_error(domain, desc, ret);
	273	if (ops->msi_finish)
	274	ops->msi_finish(&arg, ret);
	275	return ret;
	276	}
	277
	278	for (i = 0; i < desc->nvec_used; i++)
	279	irq_set_msi_desc_off(virq, i, desc);
	280	}
	281
	282	if (ops->msi_finish)
	283	ops->msi_finish(&arg, 0);
	284
	285	for_each_msi_entry(desc, dev) {
	286	if (desc->nvec_used == 1)
	287	dev_dbg(dev, "irq %d for MSI\n", virq);
	288	else
	289	dev_dbg(dev, "irq [%d-%d] for MSI\n",
	290	virq, virq + desc->nvec_used - 1);
	291	}
	292
	293	return 0;
	294	}
	295
	296	/**
	297	* msi_domain_free_irqs - Free interrupts from a MSI interrupt @domain associated tp @dev
	298	* @domain: The domain to managing the interrupts
	299	* @dev: Pointer to device struct of the device for which the interrupts
	300	* are free
	301	*/
	302	void msi_domain_free_irqs(struct irq_domain domain, struct device dev)
	303	{
	304	struct msi_desc *desc;
	305
	306	for_each_msi_entry(desc, dev) {
	307	irq_domain_free_irqs(desc->irq, desc->nvec_used);
	308	desc->irq = 0;
	309	}
	310	}
	311
f3cf8bb0 JL	312	/**
	313	* msi_get_domain_info - Get the MSI interrupt domain info for @domain
	314	* @domain: The interrupt domain to retrieve data from
	315	*
	316	* Returns the pointer to the msi_domain_info stored in
	317	* @domain->host_data.
	318	*/
	319	struct msi_domain_info msi_get_domain_info(struct irq_domain domain)
	320	{
	321	return (struct msi_domain_info *)domain->host_data;
	322	}
	323
	324	#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */