Commit | Line | Data |
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0793a61d TG |
1 | /* |
2 | * Performance counter core code | |
3 | * | |
4 | * Copyright(C) 2008 Thomas Gleixner <tglx@linutronix.de> | |
5 | * Copyright(C) 2008 Red Hat, Inc., Ingo Molnar | |
6 | * | |
7 | * For licencing details see kernel-base/COPYING | |
8 | */ | |
9 | ||
10 | #include <linux/fs.h> | |
11 | #include <linux/cpu.h> | |
12 | #include <linux/smp.h> | |
04289bb9 | 13 | #include <linux/file.h> |
0793a61d TG |
14 | #include <linux/poll.h> |
15 | #include <linux/sysfs.h> | |
16 | #include <linux/ptrace.h> | |
17 | #include <linux/percpu.h> | |
18 | #include <linux/uaccess.h> | |
19 | #include <linux/syscalls.h> | |
20 | #include <linux/anon_inodes.h> | |
aa9c4c0f | 21 | #include <linux/kernel_stat.h> |
0793a61d | 22 | #include <linux/perf_counter.h> |
23a185ca PM |
23 | #include <linux/mm.h> |
24 | #include <linux/vmstat.h> | |
592903cd | 25 | #include <linux/rculist.h> |
0793a61d | 26 | |
4e193bd4 TB |
27 | #include <asm/irq_regs.h> |
28 | ||
0793a61d TG |
29 | /* |
30 | * Each CPU has a list of per CPU counters: | |
31 | */ | |
32 | DEFINE_PER_CPU(struct perf_cpu_context, perf_cpu_context); | |
33 | ||
088e2852 | 34 | int perf_max_counters __read_mostly = 1; |
0793a61d TG |
35 | static int perf_reserved_percpu __read_mostly; |
36 | static int perf_overcommit __read_mostly = 1; | |
37 | ||
38 | /* | |
39 | * Mutex for (sysadmin-configurable) counter reservations: | |
40 | */ | |
41 | static DEFINE_MUTEX(perf_resource_mutex); | |
42 | ||
43 | /* | |
44 | * Architecture provided APIs - weak aliases: | |
45 | */ | |
5c92d124 | 46 | extern __weak const struct hw_perf_counter_ops * |
621a01ea | 47 | hw_perf_counter_init(struct perf_counter *counter) |
0793a61d | 48 | { |
ff6f0541 | 49 | return NULL; |
0793a61d TG |
50 | } |
51 | ||
01b2838c | 52 | u64 __weak hw_perf_save_disable(void) { return 0; } |
01ea1cca | 53 | void __weak hw_perf_restore(u64 ctrl) { barrier(); } |
01d0287f | 54 | void __weak hw_perf_counter_setup(int cpu) { barrier(); } |
3cbed429 PM |
55 | int __weak hw_perf_group_sched_in(struct perf_counter *group_leader, |
56 | struct perf_cpu_context *cpuctx, | |
57 | struct perf_counter_context *ctx, int cpu) | |
58 | { | |
59 | return 0; | |
60 | } | |
0793a61d | 61 | |
4eb96fcf PM |
62 | void __weak perf_counter_print_debug(void) { } |
63 | ||
04289bb9 IM |
64 | static void |
65 | list_add_counter(struct perf_counter *counter, struct perf_counter_context *ctx) | |
66 | { | |
67 | struct perf_counter *group_leader = counter->group_leader; | |
68 | ||
69 | /* | |
70 | * Depending on whether it is a standalone or sibling counter, | |
71 | * add it straight to the context's counter list, or to the group | |
72 | * leader's sibling list: | |
73 | */ | |
74 | if (counter->group_leader == counter) | |
75 | list_add_tail(&counter->list_entry, &ctx->counter_list); | |
76 | else | |
77 | list_add_tail(&counter->list_entry, &group_leader->sibling_list); | |
592903cd PZ |
78 | |
79 | list_add_rcu(&counter->event_entry, &ctx->event_list); | |
04289bb9 IM |
80 | } |
81 | ||
82 | static void | |
83 | list_del_counter(struct perf_counter *counter, struct perf_counter_context *ctx) | |
84 | { | |
85 | struct perf_counter *sibling, *tmp; | |
86 | ||
87 | list_del_init(&counter->list_entry); | |
592903cd | 88 | list_del_rcu(&counter->event_entry); |
04289bb9 | 89 | |
04289bb9 IM |
90 | /* |
91 | * If this was a group counter with sibling counters then | |
92 | * upgrade the siblings to singleton counters by adding them | |
93 | * to the context list directly: | |
94 | */ | |
95 | list_for_each_entry_safe(sibling, tmp, | |
96 | &counter->sibling_list, list_entry) { | |
97 | ||
75564232 | 98 | list_move_tail(&sibling->list_entry, &ctx->counter_list); |
04289bb9 IM |
99 | sibling->group_leader = sibling; |
100 | } | |
101 | } | |
102 | ||
3b6f9e5c PM |
103 | static void |
104 | counter_sched_out(struct perf_counter *counter, | |
105 | struct perf_cpu_context *cpuctx, | |
106 | struct perf_counter_context *ctx) | |
107 | { | |
108 | if (counter->state != PERF_COUNTER_STATE_ACTIVE) | |
109 | return; | |
110 | ||
111 | counter->state = PERF_COUNTER_STATE_INACTIVE; | |
112 | counter->hw_ops->disable(counter); | |
113 | counter->oncpu = -1; | |
114 | ||
115 | if (!is_software_counter(counter)) | |
116 | cpuctx->active_oncpu--; | |
117 | ctx->nr_active--; | |
118 | if (counter->hw_event.exclusive || !cpuctx->active_oncpu) | |
119 | cpuctx->exclusive = 0; | |
120 | } | |
121 | ||
d859e29f PM |
122 | static void |
123 | group_sched_out(struct perf_counter *group_counter, | |
124 | struct perf_cpu_context *cpuctx, | |
125 | struct perf_counter_context *ctx) | |
126 | { | |
127 | struct perf_counter *counter; | |
128 | ||
129 | if (group_counter->state != PERF_COUNTER_STATE_ACTIVE) | |
130 | return; | |
131 | ||
132 | counter_sched_out(group_counter, cpuctx, ctx); | |
133 | ||
134 | /* | |
135 | * Schedule out siblings (if any): | |
136 | */ | |
137 | list_for_each_entry(counter, &group_counter->sibling_list, list_entry) | |
138 | counter_sched_out(counter, cpuctx, ctx); | |
139 | ||
140 | if (group_counter->hw_event.exclusive) | |
141 | cpuctx->exclusive = 0; | |
142 | } | |
143 | ||
0793a61d TG |
144 | /* |
145 | * Cross CPU call to remove a performance counter | |
146 | * | |
147 | * We disable the counter on the hardware level first. After that we | |
148 | * remove it from the context list. | |
149 | */ | |
04289bb9 | 150 | static void __perf_counter_remove_from_context(void *info) |
0793a61d TG |
151 | { |
152 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
153 | struct perf_counter *counter = info; | |
154 | struct perf_counter_context *ctx = counter->ctx; | |
9b51f66d | 155 | unsigned long flags; |
5c92d124 | 156 | u64 perf_flags; |
0793a61d TG |
157 | |
158 | /* | |
159 | * If this is a task context, we need to check whether it is | |
160 | * the current task context of this cpu. If not it has been | |
161 | * scheduled out before the smp call arrived. | |
162 | */ | |
163 | if (ctx->task && cpuctx->task_ctx != ctx) | |
164 | return; | |
165 | ||
aa9c4c0f IM |
166 | curr_rq_lock_irq_save(&flags); |
167 | spin_lock(&ctx->lock); | |
0793a61d | 168 | |
3b6f9e5c PM |
169 | counter_sched_out(counter, cpuctx, ctx); |
170 | ||
171 | counter->task = NULL; | |
0793a61d TG |
172 | ctx->nr_counters--; |
173 | ||
174 | /* | |
175 | * Protect the list operation against NMI by disabling the | |
176 | * counters on a global level. NOP for non NMI based counters. | |
177 | */ | |
01b2838c | 178 | perf_flags = hw_perf_save_disable(); |
04289bb9 | 179 | list_del_counter(counter, ctx); |
01b2838c | 180 | hw_perf_restore(perf_flags); |
0793a61d TG |
181 | |
182 | if (!ctx->task) { | |
183 | /* | |
184 | * Allow more per task counters with respect to the | |
185 | * reservation: | |
186 | */ | |
187 | cpuctx->max_pertask = | |
188 | min(perf_max_counters - ctx->nr_counters, | |
189 | perf_max_counters - perf_reserved_percpu); | |
190 | } | |
191 | ||
aa9c4c0f IM |
192 | spin_unlock(&ctx->lock); |
193 | curr_rq_unlock_irq_restore(&flags); | |
0793a61d TG |
194 | } |
195 | ||
196 | ||
197 | /* | |
198 | * Remove the counter from a task's (or a CPU's) list of counters. | |
199 | * | |
d859e29f | 200 | * Must be called with counter->mutex and ctx->mutex held. |
0793a61d TG |
201 | * |
202 | * CPU counters are removed with a smp call. For task counters we only | |
203 | * call when the task is on a CPU. | |
204 | */ | |
04289bb9 | 205 | static void perf_counter_remove_from_context(struct perf_counter *counter) |
0793a61d TG |
206 | { |
207 | struct perf_counter_context *ctx = counter->ctx; | |
208 | struct task_struct *task = ctx->task; | |
209 | ||
210 | if (!task) { | |
211 | /* | |
212 | * Per cpu counters are removed via an smp call and | |
213 | * the removal is always sucessful. | |
214 | */ | |
215 | smp_call_function_single(counter->cpu, | |
04289bb9 | 216 | __perf_counter_remove_from_context, |
0793a61d TG |
217 | counter, 1); |
218 | return; | |
219 | } | |
220 | ||
221 | retry: | |
04289bb9 | 222 | task_oncpu_function_call(task, __perf_counter_remove_from_context, |
0793a61d TG |
223 | counter); |
224 | ||
225 | spin_lock_irq(&ctx->lock); | |
226 | /* | |
227 | * If the context is active we need to retry the smp call. | |
228 | */ | |
04289bb9 | 229 | if (ctx->nr_active && !list_empty(&counter->list_entry)) { |
0793a61d TG |
230 | spin_unlock_irq(&ctx->lock); |
231 | goto retry; | |
232 | } | |
233 | ||
234 | /* | |
235 | * The lock prevents that this context is scheduled in so we | |
04289bb9 | 236 | * can remove the counter safely, if the call above did not |
0793a61d TG |
237 | * succeed. |
238 | */ | |
04289bb9 | 239 | if (!list_empty(&counter->list_entry)) { |
0793a61d | 240 | ctx->nr_counters--; |
04289bb9 | 241 | list_del_counter(counter, ctx); |
0793a61d TG |
242 | counter->task = NULL; |
243 | } | |
244 | spin_unlock_irq(&ctx->lock); | |
245 | } | |
246 | ||
d859e29f PM |
247 | /* |
248 | * Cross CPU call to disable a performance counter | |
249 | */ | |
250 | static void __perf_counter_disable(void *info) | |
251 | { | |
252 | struct perf_counter *counter = info; | |
253 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
254 | struct perf_counter_context *ctx = counter->ctx; | |
255 | unsigned long flags; | |
256 | ||
257 | /* | |
258 | * If this is a per-task counter, need to check whether this | |
259 | * counter's task is the current task on this cpu. | |
260 | */ | |
261 | if (ctx->task && cpuctx->task_ctx != ctx) | |
262 | return; | |
263 | ||
264 | curr_rq_lock_irq_save(&flags); | |
265 | spin_lock(&ctx->lock); | |
266 | ||
267 | /* | |
268 | * If the counter is on, turn it off. | |
269 | * If it is in error state, leave it in error state. | |
270 | */ | |
271 | if (counter->state >= PERF_COUNTER_STATE_INACTIVE) { | |
272 | if (counter == counter->group_leader) | |
273 | group_sched_out(counter, cpuctx, ctx); | |
274 | else | |
275 | counter_sched_out(counter, cpuctx, ctx); | |
276 | counter->state = PERF_COUNTER_STATE_OFF; | |
277 | } | |
278 | ||
279 | spin_unlock(&ctx->lock); | |
280 | curr_rq_unlock_irq_restore(&flags); | |
281 | } | |
282 | ||
283 | /* | |
284 | * Disable a counter. | |
285 | */ | |
286 | static void perf_counter_disable(struct perf_counter *counter) | |
287 | { | |
288 | struct perf_counter_context *ctx = counter->ctx; | |
289 | struct task_struct *task = ctx->task; | |
290 | ||
291 | if (!task) { | |
292 | /* | |
293 | * Disable the counter on the cpu that it's on | |
294 | */ | |
295 | smp_call_function_single(counter->cpu, __perf_counter_disable, | |
296 | counter, 1); | |
297 | return; | |
298 | } | |
299 | ||
300 | retry: | |
301 | task_oncpu_function_call(task, __perf_counter_disable, counter); | |
302 | ||
303 | spin_lock_irq(&ctx->lock); | |
304 | /* | |
305 | * If the counter is still active, we need to retry the cross-call. | |
306 | */ | |
307 | if (counter->state == PERF_COUNTER_STATE_ACTIVE) { | |
308 | spin_unlock_irq(&ctx->lock); | |
309 | goto retry; | |
310 | } | |
311 | ||
312 | /* | |
313 | * Since we have the lock this context can't be scheduled | |
314 | * in, so we can change the state safely. | |
315 | */ | |
316 | if (counter->state == PERF_COUNTER_STATE_INACTIVE) | |
317 | counter->state = PERF_COUNTER_STATE_OFF; | |
318 | ||
319 | spin_unlock_irq(&ctx->lock); | |
320 | } | |
321 | ||
322 | /* | |
323 | * Disable a counter and all its children. | |
324 | */ | |
325 | static void perf_counter_disable_family(struct perf_counter *counter) | |
326 | { | |
327 | struct perf_counter *child; | |
328 | ||
329 | perf_counter_disable(counter); | |
330 | ||
331 | /* | |
332 | * Lock the mutex to protect the list of children | |
333 | */ | |
334 | mutex_lock(&counter->mutex); | |
335 | list_for_each_entry(child, &counter->child_list, child_list) | |
336 | perf_counter_disable(child); | |
337 | mutex_unlock(&counter->mutex); | |
338 | } | |
339 | ||
235c7fc7 IM |
340 | static int |
341 | counter_sched_in(struct perf_counter *counter, | |
342 | struct perf_cpu_context *cpuctx, | |
343 | struct perf_counter_context *ctx, | |
344 | int cpu) | |
345 | { | |
3b6f9e5c | 346 | if (counter->state <= PERF_COUNTER_STATE_OFF) |
235c7fc7 IM |
347 | return 0; |
348 | ||
349 | counter->state = PERF_COUNTER_STATE_ACTIVE; | |
350 | counter->oncpu = cpu; /* TODO: put 'cpu' into cpuctx->cpu */ | |
351 | /* | |
352 | * The new state must be visible before we turn it on in the hardware: | |
353 | */ | |
354 | smp_wmb(); | |
355 | ||
356 | if (counter->hw_ops->enable(counter)) { | |
357 | counter->state = PERF_COUNTER_STATE_INACTIVE; | |
358 | counter->oncpu = -1; | |
359 | return -EAGAIN; | |
360 | } | |
361 | ||
3b6f9e5c PM |
362 | if (!is_software_counter(counter)) |
363 | cpuctx->active_oncpu++; | |
235c7fc7 IM |
364 | ctx->nr_active++; |
365 | ||
3b6f9e5c PM |
366 | if (counter->hw_event.exclusive) |
367 | cpuctx->exclusive = 1; | |
368 | ||
235c7fc7 IM |
369 | return 0; |
370 | } | |
371 | ||
3b6f9e5c PM |
372 | /* |
373 | * Return 1 for a group consisting entirely of software counters, | |
374 | * 0 if the group contains any hardware counters. | |
375 | */ | |
376 | static int is_software_only_group(struct perf_counter *leader) | |
377 | { | |
378 | struct perf_counter *counter; | |
379 | ||
380 | if (!is_software_counter(leader)) | |
381 | return 0; | |
382 | list_for_each_entry(counter, &leader->sibling_list, list_entry) | |
383 | if (!is_software_counter(counter)) | |
384 | return 0; | |
385 | return 1; | |
386 | } | |
387 | ||
388 | /* | |
389 | * Work out whether we can put this counter group on the CPU now. | |
390 | */ | |
391 | static int group_can_go_on(struct perf_counter *counter, | |
392 | struct perf_cpu_context *cpuctx, | |
393 | int can_add_hw) | |
394 | { | |
395 | /* | |
396 | * Groups consisting entirely of software counters can always go on. | |
397 | */ | |
398 | if (is_software_only_group(counter)) | |
399 | return 1; | |
400 | /* | |
401 | * If an exclusive group is already on, no other hardware | |
402 | * counters can go on. | |
403 | */ | |
404 | if (cpuctx->exclusive) | |
405 | return 0; | |
406 | /* | |
407 | * If this group is exclusive and there are already | |
408 | * counters on the CPU, it can't go on. | |
409 | */ | |
410 | if (counter->hw_event.exclusive && cpuctx->active_oncpu) | |
411 | return 0; | |
412 | /* | |
413 | * Otherwise, try to add it if all previous groups were able | |
414 | * to go on. | |
415 | */ | |
416 | return can_add_hw; | |
417 | } | |
418 | ||
0793a61d | 419 | /* |
235c7fc7 | 420 | * Cross CPU call to install and enable a performance counter |
0793a61d TG |
421 | */ |
422 | static void __perf_install_in_context(void *info) | |
423 | { | |
424 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
425 | struct perf_counter *counter = info; | |
426 | struct perf_counter_context *ctx = counter->ctx; | |
d859e29f | 427 | struct perf_counter *leader = counter->group_leader; |
0793a61d | 428 | int cpu = smp_processor_id(); |
9b51f66d | 429 | unsigned long flags; |
5c92d124 | 430 | u64 perf_flags; |
3b6f9e5c | 431 | int err; |
0793a61d TG |
432 | |
433 | /* | |
434 | * If this is a task context, we need to check whether it is | |
435 | * the current task context of this cpu. If not it has been | |
436 | * scheduled out before the smp call arrived. | |
437 | */ | |
438 | if (ctx->task && cpuctx->task_ctx != ctx) | |
439 | return; | |
440 | ||
aa9c4c0f IM |
441 | curr_rq_lock_irq_save(&flags); |
442 | spin_lock(&ctx->lock); | |
0793a61d TG |
443 | |
444 | /* | |
445 | * Protect the list operation against NMI by disabling the | |
446 | * counters on a global level. NOP for non NMI based counters. | |
447 | */ | |
01b2838c | 448 | perf_flags = hw_perf_save_disable(); |
0793a61d | 449 | |
235c7fc7 | 450 | list_add_counter(counter, ctx); |
0793a61d | 451 | ctx->nr_counters++; |
c07c99b6 | 452 | counter->prev_state = PERF_COUNTER_STATE_OFF; |
0793a61d | 453 | |
d859e29f PM |
454 | /* |
455 | * Don't put the counter on if it is disabled or if | |
456 | * it is in a group and the group isn't on. | |
457 | */ | |
458 | if (counter->state != PERF_COUNTER_STATE_INACTIVE || | |
459 | (leader != counter && leader->state != PERF_COUNTER_STATE_ACTIVE)) | |
460 | goto unlock; | |
461 | ||
3b6f9e5c PM |
462 | /* |
463 | * An exclusive counter can't go on if there are already active | |
464 | * hardware counters, and no hardware counter can go on if there | |
465 | * is already an exclusive counter on. | |
466 | */ | |
d859e29f | 467 | if (!group_can_go_on(counter, cpuctx, 1)) |
3b6f9e5c PM |
468 | err = -EEXIST; |
469 | else | |
470 | err = counter_sched_in(counter, cpuctx, ctx, cpu); | |
471 | ||
d859e29f PM |
472 | if (err) { |
473 | /* | |
474 | * This counter couldn't go on. If it is in a group | |
475 | * then we have to pull the whole group off. | |
476 | * If the counter group is pinned then put it in error state. | |
477 | */ | |
478 | if (leader != counter) | |
479 | group_sched_out(leader, cpuctx, ctx); | |
480 | if (leader->hw_event.pinned) | |
481 | leader->state = PERF_COUNTER_STATE_ERROR; | |
482 | } | |
0793a61d | 483 | |
3b6f9e5c | 484 | if (!err && !ctx->task && cpuctx->max_pertask) |
0793a61d TG |
485 | cpuctx->max_pertask--; |
486 | ||
d859e29f | 487 | unlock: |
235c7fc7 IM |
488 | hw_perf_restore(perf_flags); |
489 | ||
aa9c4c0f IM |
490 | spin_unlock(&ctx->lock); |
491 | curr_rq_unlock_irq_restore(&flags); | |
0793a61d TG |
492 | } |
493 | ||
494 | /* | |
495 | * Attach a performance counter to a context | |
496 | * | |
497 | * First we add the counter to the list with the hardware enable bit | |
498 | * in counter->hw_config cleared. | |
499 | * | |
500 | * If the counter is attached to a task which is on a CPU we use a smp | |
501 | * call to enable it in the task context. The task might have been | |
502 | * scheduled away, but we check this in the smp call again. | |
d859e29f PM |
503 | * |
504 | * Must be called with ctx->mutex held. | |
0793a61d TG |
505 | */ |
506 | static void | |
507 | perf_install_in_context(struct perf_counter_context *ctx, | |
508 | struct perf_counter *counter, | |
509 | int cpu) | |
510 | { | |
511 | struct task_struct *task = ctx->task; | |
512 | ||
0793a61d TG |
513 | if (!task) { |
514 | /* | |
515 | * Per cpu counters are installed via an smp call and | |
516 | * the install is always sucessful. | |
517 | */ | |
518 | smp_call_function_single(cpu, __perf_install_in_context, | |
519 | counter, 1); | |
520 | return; | |
521 | } | |
522 | ||
523 | counter->task = task; | |
524 | retry: | |
525 | task_oncpu_function_call(task, __perf_install_in_context, | |
526 | counter); | |
527 | ||
528 | spin_lock_irq(&ctx->lock); | |
529 | /* | |
0793a61d TG |
530 | * we need to retry the smp call. |
531 | */ | |
d859e29f | 532 | if (ctx->is_active && list_empty(&counter->list_entry)) { |
0793a61d TG |
533 | spin_unlock_irq(&ctx->lock); |
534 | goto retry; | |
535 | } | |
536 | ||
537 | /* | |
538 | * The lock prevents that this context is scheduled in so we | |
539 | * can add the counter safely, if it the call above did not | |
540 | * succeed. | |
541 | */ | |
04289bb9 IM |
542 | if (list_empty(&counter->list_entry)) { |
543 | list_add_counter(counter, ctx); | |
0793a61d TG |
544 | ctx->nr_counters++; |
545 | } | |
546 | spin_unlock_irq(&ctx->lock); | |
547 | } | |
548 | ||
d859e29f PM |
549 | /* |
550 | * Cross CPU call to enable a performance counter | |
551 | */ | |
552 | static void __perf_counter_enable(void *info) | |
04289bb9 | 553 | { |
d859e29f PM |
554 | struct perf_counter *counter = info; |
555 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
556 | struct perf_counter_context *ctx = counter->ctx; | |
557 | struct perf_counter *leader = counter->group_leader; | |
558 | unsigned long flags; | |
559 | int err; | |
04289bb9 | 560 | |
d859e29f PM |
561 | /* |
562 | * If this is a per-task counter, need to check whether this | |
563 | * counter's task is the current task on this cpu. | |
564 | */ | |
565 | if (ctx->task && cpuctx->task_ctx != ctx) | |
3cbed429 PM |
566 | return; |
567 | ||
d859e29f PM |
568 | curr_rq_lock_irq_save(&flags); |
569 | spin_lock(&ctx->lock); | |
570 | ||
c07c99b6 | 571 | counter->prev_state = counter->state; |
d859e29f PM |
572 | if (counter->state >= PERF_COUNTER_STATE_INACTIVE) |
573 | goto unlock; | |
574 | counter->state = PERF_COUNTER_STATE_INACTIVE; | |
04289bb9 IM |
575 | |
576 | /* | |
d859e29f PM |
577 | * If the counter is in a group and isn't the group leader, |
578 | * then don't put it on unless the group is on. | |
04289bb9 | 579 | */ |
d859e29f PM |
580 | if (leader != counter && leader->state != PERF_COUNTER_STATE_ACTIVE) |
581 | goto unlock; | |
3b6f9e5c | 582 | |
d859e29f PM |
583 | if (!group_can_go_on(counter, cpuctx, 1)) |
584 | err = -EEXIST; | |
585 | else | |
586 | err = counter_sched_in(counter, cpuctx, ctx, | |
587 | smp_processor_id()); | |
588 | ||
589 | if (err) { | |
590 | /* | |
591 | * If this counter can't go on and it's part of a | |
592 | * group, then the whole group has to come off. | |
593 | */ | |
594 | if (leader != counter) | |
595 | group_sched_out(leader, cpuctx, ctx); | |
596 | if (leader->hw_event.pinned) | |
597 | leader->state = PERF_COUNTER_STATE_ERROR; | |
598 | } | |
599 | ||
600 | unlock: | |
601 | spin_unlock(&ctx->lock); | |
602 | curr_rq_unlock_irq_restore(&flags); | |
603 | } | |
604 | ||
605 | /* | |
606 | * Enable a counter. | |
607 | */ | |
608 | static void perf_counter_enable(struct perf_counter *counter) | |
609 | { | |
610 | struct perf_counter_context *ctx = counter->ctx; | |
611 | struct task_struct *task = ctx->task; | |
612 | ||
613 | if (!task) { | |
614 | /* | |
615 | * Enable the counter on the cpu that it's on | |
616 | */ | |
617 | smp_call_function_single(counter->cpu, __perf_counter_enable, | |
618 | counter, 1); | |
619 | return; | |
620 | } | |
621 | ||
622 | spin_lock_irq(&ctx->lock); | |
623 | if (counter->state >= PERF_COUNTER_STATE_INACTIVE) | |
624 | goto out; | |
625 | ||
626 | /* | |
627 | * If the counter is in error state, clear that first. | |
628 | * That way, if we see the counter in error state below, we | |
629 | * know that it has gone back into error state, as distinct | |
630 | * from the task having been scheduled away before the | |
631 | * cross-call arrived. | |
632 | */ | |
633 | if (counter->state == PERF_COUNTER_STATE_ERROR) | |
634 | counter->state = PERF_COUNTER_STATE_OFF; | |
635 | ||
636 | retry: | |
637 | spin_unlock_irq(&ctx->lock); | |
638 | task_oncpu_function_call(task, __perf_counter_enable, counter); | |
639 | ||
640 | spin_lock_irq(&ctx->lock); | |
641 | ||
642 | /* | |
643 | * If the context is active and the counter is still off, | |
644 | * we need to retry the cross-call. | |
645 | */ | |
646 | if (ctx->is_active && counter->state == PERF_COUNTER_STATE_OFF) | |
647 | goto retry; | |
648 | ||
649 | /* | |
650 | * Since we have the lock this context can't be scheduled | |
651 | * in, so we can change the state safely. | |
652 | */ | |
653 | if (counter->state == PERF_COUNTER_STATE_OFF) | |
654 | counter->state = PERF_COUNTER_STATE_INACTIVE; | |
655 | out: | |
656 | spin_unlock_irq(&ctx->lock); | |
657 | } | |
658 | ||
659 | /* | |
660 | * Enable a counter and all its children. | |
661 | */ | |
662 | static void perf_counter_enable_family(struct perf_counter *counter) | |
663 | { | |
664 | struct perf_counter *child; | |
665 | ||
666 | perf_counter_enable(counter); | |
667 | ||
668 | /* | |
669 | * Lock the mutex to protect the list of children | |
670 | */ | |
671 | mutex_lock(&counter->mutex); | |
672 | list_for_each_entry(child, &counter->child_list, child_list) | |
673 | perf_counter_enable(child); | |
674 | mutex_unlock(&counter->mutex); | |
04289bb9 IM |
675 | } |
676 | ||
235c7fc7 IM |
677 | void __perf_counter_sched_out(struct perf_counter_context *ctx, |
678 | struct perf_cpu_context *cpuctx) | |
679 | { | |
680 | struct perf_counter *counter; | |
3cbed429 | 681 | u64 flags; |
235c7fc7 | 682 | |
d859e29f PM |
683 | spin_lock(&ctx->lock); |
684 | ctx->is_active = 0; | |
235c7fc7 | 685 | if (likely(!ctx->nr_counters)) |
d859e29f | 686 | goto out; |
235c7fc7 | 687 | |
3cbed429 | 688 | flags = hw_perf_save_disable(); |
235c7fc7 IM |
689 | if (ctx->nr_active) { |
690 | list_for_each_entry(counter, &ctx->counter_list, list_entry) | |
691 | group_sched_out(counter, cpuctx, ctx); | |
692 | } | |
3cbed429 | 693 | hw_perf_restore(flags); |
d859e29f | 694 | out: |
235c7fc7 IM |
695 | spin_unlock(&ctx->lock); |
696 | } | |
697 | ||
0793a61d TG |
698 | /* |
699 | * Called from scheduler to remove the counters of the current task, | |
700 | * with interrupts disabled. | |
701 | * | |
702 | * We stop each counter and update the counter value in counter->count. | |
703 | * | |
7671581f | 704 | * This does not protect us against NMI, but disable() |
0793a61d TG |
705 | * sets the disabled bit in the control field of counter _before_ |
706 | * accessing the counter control register. If a NMI hits, then it will | |
707 | * not restart the counter. | |
708 | */ | |
709 | void perf_counter_task_sched_out(struct task_struct *task, int cpu) | |
710 | { | |
711 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); | |
712 | struct perf_counter_context *ctx = &task->perf_counter_ctx; | |
0793a61d TG |
713 | |
714 | if (likely(!cpuctx->task_ctx)) | |
715 | return; | |
716 | ||
235c7fc7 IM |
717 | __perf_counter_sched_out(ctx, cpuctx); |
718 | ||
0793a61d TG |
719 | cpuctx->task_ctx = NULL; |
720 | } | |
721 | ||
235c7fc7 | 722 | static void perf_counter_cpu_sched_out(struct perf_cpu_context *cpuctx) |
04289bb9 | 723 | { |
235c7fc7 | 724 | __perf_counter_sched_out(&cpuctx->ctx, cpuctx); |
04289bb9 IM |
725 | } |
726 | ||
7995888f | 727 | static int |
04289bb9 IM |
728 | group_sched_in(struct perf_counter *group_counter, |
729 | struct perf_cpu_context *cpuctx, | |
730 | struct perf_counter_context *ctx, | |
731 | int cpu) | |
732 | { | |
95cdd2e7 | 733 | struct perf_counter *counter, *partial_group; |
3cbed429 PM |
734 | int ret; |
735 | ||
736 | if (group_counter->state == PERF_COUNTER_STATE_OFF) | |
737 | return 0; | |
738 | ||
739 | ret = hw_perf_group_sched_in(group_counter, cpuctx, ctx, cpu); | |
740 | if (ret) | |
741 | return ret < 0 ? ret : 0; | |
04289bb9 | 742 | |
c07c99b6 | 743 | group_counter->prev_state = group_counter->state; |
95cdd2e7 IM |
744 | if (counter_sched_in(group_counter, cpuctx, ctx, cpu)) |
745 | return -EAGAIN; | |
04289bb9 IM |
746 | |
747 | /* | |
748 | * Schedule in siblings as one group (if any): | |
749 | */ | |
7995888f | 750 | list_for_each_entry(counter, &group_counter->sibling_list, list_entry) { |
c07c99b6 | 751 | counter->prev_state = counter->state; |
95cdd2e7 IM |
752 | if (counter_sched_in(counter, cpuctx, ctx, cpu)) { |
753 | partial_group = counter; | |
754 | goto group_error; | |
755 | } | |
95cdd2e7 IM |
756 | } |
757 | ||
3cbed429 | 758 | return 0; |
95cdd2e7 IM |
759 | |
760 | group_error: | |
761 | /* | |
762 | * Groups can be scheduled in as one unit only, so undo any | |
763 | * partial group before returning: | |
764 | */ | |
765 | list_for_each_entry(counter, &group_counter->sibling_list, list_entry) { | |
766 | if (counter == partial_group) | |
767 | break; | |
768 | counter_sched_out(counter, cpuctx, ctx); | |
7995888f | 769 | } |
95cdd2e7 | 770 | counter_sched_out(group_counter, cpuctx, ctx); |
7995888f | 771 | |
95cdd2e7 | 772 | return -EAGAIN; |
04289bb9 IM |
773 | } |
774 | ||
235c7fc7 IM |
775 | static void |
776 | __perf_counter_sched_in(struct perf_counter_context *ctx, | |
777 | struct perf_cpu_context *cpuctx, int cpu) | |
0793a61d | 778 | { |
0793a61d | 779 | struct perf_counter *counter; |
3cbed429 | 780 | u64 flags; |
dd0e6ba2 | 781 | int can_add_hw = 1; |
0793a61d | 782 | |
d859e29f PM |
783 | spin_lock(&ctx->lock); |
784 | ctx->is_active = 1; | |
0793a61d | 785 | if (likely(!ctx->nr_counters)) |
d859e29f | 786 | goto out; |
0793a61d | 787 | |
3cbed429 | 788 | flags = hw_perf_save_disable(); |
3b6f9e5c PM |
789 | |
790 | /* | |
791 | * First go through the list and put on any pinned groups | |
792 | * in order to give them the best chance of going on. | |
793 | */ | |
794 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { | |
795 | if (counter->state <= PERF_COUNTER_STATE_OFF || | |
796 | !counter->hw_event.pinned) | |
797 | continue; | |
798 | if (counter->cpu != -1 && counter->cpu != cpu) | |
799 | continue; | |
800 | ||
801 | if (group_can_go_on(counter, cpuctx, 1)) | |
802 | group_sched_in(counter, cpuctx, ctx, cpu); | |
803 | ||
804 | /* | |
805 | * If this pinned group hasn't been scheduled, | |
806 | * put it in error state. | |
807 | */ | |
808 | if (counter->state == PERF_COUNTER_STATE_INACTIVE) | |
809 | counter->state = PERF_COUNTER_STATE_ERROR; | |
810 | } | |
811 | ||
04289bb9 | 812 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { |
3b6f9e5c PM |
813 | /* |
814 | * Ignore counters in OFF or ERROR state, and | |
815 | * ignore pinned counters since we did them already. | |
816 | */ | |
817 | if (counter->state <= PERF_COUNTER_STATE_OFF || | |
818 | counter->hw_event.pinned) | |
819 | continue; | |
820 | ||
04289bb9 IM |
821 | /* |
822 | * Listen to the 'cpu' scheduling filter constraint | |
823 | * of counters: | |
824 | */ | |
0793a61d TG |
825 | if (counter->cpu != -1 && counter->cpu != cpu) |
826 | continue; | |
827 | ||
3b6f9e5c | 828 | if (group_can_go_on(counter, cpuctx, can_add_hw)) { |
dd0e6ba2 PM |
829 | if (group_sched_in(counter, cpuctx, ctx, cpu)) |
830 | can_add_hw = 0; | |
3b6f9e5c | 831 | } |
0793a61d | 832 | } |
3cbed429 | 833 | hw_perf_restore(flags); |
d859e29f | 834 | out: |
0793a61d | 835 | spin_unlock(&ctx->lock); |
235c7fc7 IM |
836 | } |
837 | ||
838 | /* | |
839 | * Called from scheduler to add the counters of the current task | |
840 | * with interrupts disabled. | |
841 | * | |
842 | * We restore the counter value and then enable it. | |
843 | * | |
844 | * This does not protect us against NMI, but enable() | |
845 | * sets the enabled bit in the control field of counter _before_ | |
846 | * accessing the counter control register. If a NMI hits, then it will | |
847 | * keep the counter running. | |
848 | */ | |
849 | void perf_counter_task_sched_in(struct task_struct *task, int cpu) | |
850 | { | |
851 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); | |
852 | struct perf_counter_context *ctx = &task->perf_counter_ctx; | |
04289bb9 | 853 | |
235c7fc7 | 854 | __perf_counter_sched_in(ctx, cpuctx, cpu); |
0793a61d TG |
855 | cpuctx->task_ctx = ctx; |
856 | } | |
857 | ||
235c7fc7 IM |
858 | static void perf_counter_cpu_sched_in(struct perf_cpu_context *cpuctx, int cpu) |
859 | { | |
860 | struct perf_counter_context *ctx = &cpuctx->ctx; | |
861 | ||
862 | __perf_counter_sched_in(ctx, cpuctx, cpu); | |
863 | } | |
864 | ||
1d1c7ddb IM |
865 | int perf_counter_task_disable(void) |
866 | { | |
867 | struct task_struct *curr = current; | |
868 | struct perf_counter_context *ctx = &curr->perf_counter_ctx; | |
869 | struct perf_counter *counter; | |
aa9c4c0f | 870 | unsigned long flags; |
1d1c7ddb IM |
871 | u64 perf_flags; |
872 | int cpu; | |
873 | ||
874 | if (likely(!ctx->nr_counters)) | |
875 | return 0; | |
876 | ||
aa9c4c0f | 877 | curr_rq_lock_irq_save(&flags); |
1d1c7ddb IM |
878 | cpu = smp_processor_id(); |
879 | ||
aa9c4c0f IM |
880 | /* force the update of the task clock: */ |
881 | __task_delta_exec(curr, 1); | |
882 | ||
1d1c7ddb IM |
883 | perf_counter_task_sched_out(curr, cpu); |
884 | ||
885 | spin_lock(&ctx->lock); | |
886 | ||
887 | /* | |
888 | * Disable all the counters: | |
889 | */ | |
890 | perf_flags = hw_perf_save_disable(); | |
891 | ||
3b6f9e5c PM |
892 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { |
893 | if (counter->state != PERF_COUNTER_STATE_ERROR) | |
894 | counter->state = PERF_COUNTER_STATE_OFF; | |
895 | } | |
9b51f66d | 896 | |
1d1c7ddb IM |
897 | hw_perf_restore(perf_flags); |
898 | ||
899 | spin_unlock(&ctx->lock); | |
900 | ||
aa9c4c0f | 901 | curr_rq_unlock_irq_restore(&flags); |
1d1c7ddb IM |
902 | |
903 | return 0; | |
904 | } | |
905 | ||
906 | int perf_counter_task_enable(void) | |
907 | { | |
908 | struct task_struct *curr = current; | |
909 | struct perf_counter_context *ctx = &curr->perf_counter_ctx; | |
910 | struct perf_counter *counter; | |
aa9c4c0f | 911 | unsigned long flags; |
1d1c7ddb IM |
912 | u64 perf_flags; |
913 | int cpu; | |
914 | ||
915 | if (likely(!ctx->nr_counters)) | |
916 | return 0; | |
917 | ||
aa9c4c0f | 918 | curr_rq_lock_irq_save(&flags); |
1d1c7ddb IM |
919 | cpu = smp_processor_id(); |
920 | ||
aa9c4c0f IM |
921 | /* force the update of the task clock: */ |
922 | __task_delta_exec(curr, 1); | |
923 | ||
235c7fc7 IM |
924 | perf_counter_task_sched_out(curr, cpu); |
925 | ||
1d1c7ddb IM |
926 | spin_lock(&ctx->lock); |
927 | ||
928 | /* | |
929 | * Disable all the counters: | |
930 | */ | |
931 | perf_flags = hw_perf_save_disable(); | |
932 | ||
933 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { | |
3b6f9e5c | 934 | if (counter->state > PERF_COUNTER_STATE_OFF) |
1d1c7ddb | 935 | continue; |
6a930700 | 936 | counter->state = PERF_COUNTER_STATE_INACTIVE; |
aa9c4c0f | 937 | counter->hw_event.disabled = 0; |
1d1c7ddb IM |
938 | } |
939 | hw_perf_restore(perf_flags); | |
940 | ||
941 | spin_unlock(&ctx->lock); | |
942 | ||
943 | perf_counter_task_sched_in(curr, cpu); | |
944 | ||
aa9c4c0f | 945 | curr_rq_unlock_irq_restore(&flags); |
1d1c7ddb IM |
946 | |
947 | return 0; | |
948 | } | |
949 | ||
235c7fc7 IM |
950 | /* |
951 | * Round-robin a context's counters: | |
952 | */ | |
953 | static void rotate_ctx(struct perf_counter_context *ctx) | |
0793a61d | 954 | { |
0793a61d | 955 | struct perf_counter *counter; |
5c92d124 | 956 | u64 perf_flags; |
0793a61d | 957 | |
235c7fc7 | 958 | if (!ctx->nr_counters) |
0793a61d TG |
959 | return; |
960 | ||
0793a61d | 961 | spin_lock(&ctx->lock); |
0793a61d | 962 | /* |
04289bb9 | 963 | * Rotate the first entry last (works just fine for group counters too): |
0793a61d | 964 | */ |
01b2838c | 965 | perf_flags = hw_perf_save_disable(); |
04289bb9 | 966 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { |
75564232 | 967 | list_move_tail(&counter->list_entry, &ctx->counter_list); |
0793a61d TG |
968 | break; |
969 | } | |
01b2838c | 970 | hw_perf_restore(perf_flags); |
0793a61d TG |
971 | |
972 | spin_unlock(&ctx->lock); | |
235c7fc7 IM |
973 | } |
974 | ||
975 | void perf_counter_task_tick(struct task_struct *curr, int cpu) | |
976 | { | |
977 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); | |
978 | struct perf_counter_context *ctx = &curr->perf_counter_ctx; | |
979 | const int rotate_percpu = 0; | |
980 | ||
981 | if (rotate_percpu) | |
982 | perf_counter_cpu_sched_out(cpuctx); | |
983 | perf_counter_task_sched_out(curr, cpu); | |
0793a61d | 984 | |
235c7fc7 IM |
985 | if (rotate_percpu) |
986 | rotate_ctx(&cpuctx->ctx); | |
987 | rotate_ctx(ctx); | |
988 | ||
989 | if (rotate_percpu) | |
990 | perf_counter_cpu_sched_in(cpuctx, cpu); | |
0793a61d TG |
991 | perf_counter_task_sched_in(curr, cpu); |
992 | } | |
993 | ||
0793a61d TG |
994 | /* |
995 | * Cross CPU call to read the hardware counter | |
996 | */ | |
7671581f | 997 | static void __read(void *info) |
0793a61d | 998 | { |
621a01ea | 999 | struct perf_counter *counter = info; |
aa9c4c0f | 1000 | unsigned long flags; |
621a01ea | 1001 | |
aa9c4c0f | 1002 | curr_rq_lock_irq_save(&flags); |
7671581f | 1003 | counter->hw_ops->read(counter); |
aa9c4c0f | 1004 | curr_rq_unlock_irq_restore(&flags); |
0793a61d TG |
1005 | } |
1006 | ||
04289bb9 | 1007 | static u64 perf_counter_read(struct perf_counter *counter) |
0793a61d TG |
1008 | { |
1009 | /* | |
1010 | * If counter is enabled and currently active on a CPU, update the | |
1011 | * value in the counter structure: | |
1012 | */ | |
6a930700 | 1013 | if (counter->state == PERF_COUNTER_STATE_ACTIVE) { |
0793a61d | 1014 | smp_call_function_single(counter->oncpu, |
7671581f | 1015 | __read, counter, 1); |
0793a61d TG |
1016 | } |
1017 | ||
ee06094f | 1018 | return atomic64_read(&counter->count); |
0793a61d TG |
1019 | } |
1020 | ||
1021 | /* | |
1022 | * Cross CPU call to switch performance data pointers | |
1023 | */ | |
1024 | static void __perf_switch_irq_data(void *info) | |
1025 | { | |
1026 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
1027 | struct perf_counter *counter = info; | |
1028 | struct perf_counter_context *ctx = counter->ctx; | |
1029 | struct perf_data *oldirqdata = counter->irqdata; | |
1030 | ||
1031 | /* | |
1032 | * If this is a task context, we need to check whether it is | |
1033 | * the current task context of this cpu. If not it has been | |
1034 | * scheduled out before the smp call arrived. | |
1035 | */ | |
1036 | if (ctx->task) { | |
1037 | if (cpuctx->task_ctx != ctx) | |
1038 | return; | |
1039 | spin_lock(&ctx->lock); | |
1040 | } | |
1041 | ||
1042 | /* Change the pointer NMI safe */ | |
1043 | atomic_long_set((atomic_long_t *)&counter->irqdata, | |
1044 | (unsigned long) counter->usrdata); | |
1045 | counter->usrdata = oldirqdata; | |
1046 | ||
1047 | if (ctx->task) | |
1048 | spin_unlock(&ctx->lock); | |
1049 | } | |
1050 | ||
1051 | static struct perf_data *perf_switch_irq_data(struct perf_counter *counter) | |
1052 | { | |
1053 | struct perf_counter_context *ctx = counter->ctx; | |
1054 | struct perf_data *oldirqdata = counter->irqdata; | |
1055 | struct task_struct *task = ctx->task; | |
1056 | ||
1057 | if (!task) { | |
1058 | smp_call_function_single(counter->cpu, | |
1059 | __perf_switch_irq_data, | |
1060 | counter, 1); | |
1061 | return counter->usrdata; | |
1062 | } | |
1063 | ||
1064 | retry: | |
1065 | spin_lock_irq(&ctx->lock); | |
6a930700 | 1066 | if (counter->state != PERF_COUNTER_STATE_ACTIVE) { |
0793a61d TG |
1067 | counter->irqdata = counter->usrdata; |
1068 | counter->usrdata = oldirqdata; | |
1069 | spin_unlock_irq(&ctx->lock); | |
1070 | return oldirqdata; | |
1071 | } | |
1072 | spin_unlock_irq(&ctx->lock); | |
1073 | task_oncpu_function_call(task, __perf_switch_irq_data, counter); | |
1074 | /* Might have failed, because task was scheduled out */ | |
1075 | if (counter->irqdata == oldirqdata) | |
1076 | goto retry; | |
1077 | ||
1078 | return counter->usrdata; | |
1079 | } | |
1080 | ||
1081 | static void put_context(struct perf_counter_context *ctx) | |
1082 | { | |
1083 | if (ctx->task) | |
1084 | put_task_struct(ctx->task); | |
1085 | } | |
1086 | ||
1087 | static struct perf_counter_context *find_get_context(pid_t pid, int cpu) | |
1088 | { | |
1089 | struct perf_cpu_context *cpuctx; | |
1090 | struct perf_counter_context *ctx; | |
1091 | struct task_struct *task; | |
1092 | ||
1093 | /* | |
1094 | * If cpu is not a wildcard then this is a percpu counter: | |
1095 | */ | |
1096 | if (cpu != -1) { | |
1097 | /* Must be root to operate on a CPU counter: */ | |
1098 | if (!capable(CAP_SYS_ADMIN)) | |
1099 | return ERR_PTR(-EACCES); | |
1100 | ||
1101 | if (cpu < 0 || cpu > num_possible_cpus()) | |
1102 | return ERR_PTR(-EINVAL); | |
1103 | ||
1104 | /* | |
1105 | * We could be clever and allow to attach a counter to an | |
1106 | * offline CPU and activate it when the CPU comes up, but | |
1107 | * that's for later. | |
1108 | */ | |
1109 | if (!cpu_isset(cpu, cpu_online_map)) | |
1110 | return ERR_PTR(-ENODEV); | |
1111 | ||
1112 | cpuctx = &per_cpu(perf_cpu_context, cpu); | |
1113 | ctx = &cpuctx->ctx; | |
1114 | ||
0793a61d TG |
1115 | return ctx; |
1116 | } | |
1117 | ||
1118 | rcu_read_lock(); | |
1119 | if (!pid) | |
1120 | task = current; | |
1121 | else | |
1122 | task = find_task_by_vpid(pid); | |
1123 | if (task) | |
1124 | get_task_struct(task); | |
1125 | rcu_read_unlock(); | |
1126 | ||
1127 | if (!task) | |
1128 | return ERR_PTR(-ESRCH); | |
1129 | ||
1130 | ctx = &task->perf_counter_ctx; | |
1131 | ctx->task = task; | |
1132 | ||
1133 | /* Reuse ptrace permission checks for now. */ | |
1134 | if (!ptrace_may_access(task, PTRACE_MODE_READ)) { | |
1135 | put_context(ctx); | |
1136 | return ERR_PTR(-EACCES); | |
1137 | } | |
1138 | ||
1139 | return ctx; | |
1140 | } | |
1141 | ||
592903cd PZ |
1142 | static void free_counter_rcu(struct rcu_head *head) |
1143 | { | |
1144 | struct perf_counter *counter; | |
1145 | ||
1146 | counter = container_of(head, struct perf_counter, rcu_head); | |
1147 | kfree(counter); | |
1148 | } | |
1149 | ||
0793a61d TG |
1150 | /* |
1151 | * Called when the last reference to the file is gone. | |
1152 | */ | |
1153 | static int perf_release(struct inode *inode, struct file *file) | |
1154 | { | |
1155 | struct perf_counter *counter = file->private_data; | |
1156 | struct perf_counter_context *ctx = counter->ctx; | |
1157 | ||
1158 | file->private_data = NULL; | |
1159 | ||
d859e29f | 1160 | mutex_lock(&ctx->mutex); |
0793a61d TG |
1161 | mutex_lock(&counter->mutex); |
1162 | ||
04289bb9 | 1163 | perf_counter_remove_from_context(counter); |
0793a61d TG |
1164 | |
1165 | mutex_unlock(&counter->mutex); | |
d859e29f | 1166 | mutex_unlock(&ctx->mutex); |
0793a61d | 1167 | |
592903cd | 1168 | call_rcu(&counter->rcu_head, free_counter_rcu); |
5af75917 | 1169 | put_context(ctx); |
0793a61d TG |
1170 | |
1171 | return 0; | |
1172 | } | |
1173 | ||
1174 | /* | |
1175 | * Read the performance counter - simple non blocking version for now | |
1176 | */ | |
1177 | static ssize_t | |
1178 | perf_read_hw(struct perf_counter *counter, char __user *buf, size_t count) | |
1179 | { | |
1180 | u64 cntval; | |
1181 | ||
1182 | if (count != sizeof(cntval)) | |
1183 | return -EINVAL; | |
1184 | ||
3b6f9e5c PM |
1185 | /* |
1186 | * Return end-of-file for a read on a counter that is in | |
1187 | * error state (i.e. because it was pinned but it couldn't be | |
1188 | * scheduled on to the CPU at some point). | |
1189 | */ | |
1190 | if (counter->state == PERF_COUNTER_STATE_ERROR) | |
1191 | return 0; | |
1192 | ||
0793a61d | 1193 | mutex_lock(&counter->mutex); |
04289bb9 | 1194 | cntval = perf_counter_read(counter); |
0793a61d TG |
1195 | mutex_unlock(&counter->mutex); |
1196 | ||
1197 | return put_user(cntval, (u64 __user *) buf) ? -EFAULT : sizeof(cntval); | |
1198 | } | |
1199 | ||
1200 | static ssize_t | |
1201 | perf_copy_usrdata(struct perf_data *usrdata, char __user *buf, size_t count) | |
1202 | { | |
1203 | if (!usrdata->len) | |
1204 | return 0; | |
1205 | ||
1206 | count = min(count, (size_t)usrdata->len); | |
1207 | if (copy_to_user(buf, usrdata->data + usrdata->rd_idx, count)) | |
1208 | return -EFAULT; | |
1209 | ||
1210 | /* Adjust the counters */ | |
1211 | usrdata->len -= count; | |
1212 | if (!usrdata->len) | |
1213 | usrdata->rd_idx = 0; | |
1214 | else | |
1215 | usrdata->rd_idx += count; | |
1216 | ||
1217 | return count; | |
1218 | } | |
1219 | ||
1220 | static ssize_t | |
1221 | perf_read_irq_data(struct perf_counter *counter, | |
1222 | char __user *buf, | |
1223 | size_t count, | |
1224 | int nonblocking) | |
1225 | { | |
1226 | struct perf_data *irqdata, *usrdata; | |
1227 | DECLARE_WAITQUEUE(wait, current); | |
3b6f9e5c | 1228 | ssize_t res, res2; |
0793a61d TG |
1229 | |
1230 | irqdata = counter->irqdata; | |
1231 | usrdata = counter->usrdata; | |
1232 | ||
1233 | if (usrdata->len + irqdata->len >= count) | |
1234 | goto read_pending; | |
1235 | ||
1236 | if (nonblocking) | |
1237 | return -EAGAIN; | |
1238 | ||
1239 | spin_lock_irq(&counter->waitq.lock); | |
1240 | __add_wait_queue(&counter->waitq, &wait); | |
1241 | for (;;) { | |
1242 | set_current_state(TASK_INTERRUPTIBLE); | |
1243 | if (usrdata->len + irqdata->len >= count) | |
1244 | break; | |
1245 | ||
1246 | if (signal_pending(current)) | |
1247 | break; | |
1248 | ||
3b6f9e5c PM |
1249 | if (counter->state == PERF_COUNTER_STATE_ERROR) |
1250 | break; | |
1251 | ||
0793a61d TG |
1252 | spin_unlock_irq(&counter->waitq.lock); |
1253 | schedule(); | |
1254 | spin_lock_irq(&counter->waitq.lock); | |
1255 | } | |
1256 | __remove_wait_queue(&counter->waitq, &wait); | |
1257 | __set_current_state(TASK_RUNNING); | |
1258 | spin_unlock_irq(&counter->waitq.lock); | |
1259 | ||
3b6f9e5c PM |
1260 | if (usrdata->len + irqdata->len < count && |
1261 | counter->state != PERF_COUNTER_STATE_ERROR) | |
0793a61d TG |
1262 | return -ERESTARTSYS; |
1263 | read_pending: | |
1264 | mutex_lock(&counter->mutex); | |
1265 | ||
1266 | /* Drain pending data first: */ | |
1267 | res = perf_copy_usrdata(usrdata, buf, count); | |
1268 | if (res < 0 || res == count) | |
1269 | goto out; | |
1270 | ||
1271 | /* Switch irq buffer: */ | |
1272 | usrdata = perf_switch_irq_data(counter); | |
3b6f9e5c PM |
1273 | res2 = perf_copy_usrdata(usrdata, buf + res, count - res); |
1274 | if (res2 < 0) { | |
0793a61d TG |
1275 | if (!res) |
1276 | res = -EFAULT; | |
1277 | } else { | |
3b6f9e5c | 1278 | res += res2; |
0793a61d TG |
1279 | } |
1280 | out: | |
1281 | mutex_unlock(&counter->mutex); | |
1282 | ||
1283 | return res; | |
1284 | } | |
1285 | ||
1286 | static ssize_t | |
1287 | perf_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) | |
1288 | { | |
1289 | struct perf_counter *counter = file->private_data; | |
1290 | ||
9f66a381 | 1291 | switch (counter->hw_event.record_type) { |
0793a61d TG |
1292 | case PERF_RECORD_SIMPLE: |
1293 | return perf_read_hw(counter, buf, count); | |
1294 | ||
1295 | case PERF_RECORD_IRQ: | |
1296 | case PERF_RECORD_GROUP: | |
1297 | return perf_read_irq_data(counter, buf, count, | |
1298 | file->f_flags & O_NONBLOCK); | |
1299 | } | |
1300 | return -EINVAL; | |
1301 | } | |
1302 | ||
1303 | static unsigned int perf_poll(struct file *file, poll_table *wait) | |
1304 | { | |
1305 | struct perf_counter *counter = file->private_data; | |
1306 | unsigned int events = 0; | |
1307 | unsigned long flags; | |
1308 | ||
1309 | poll_wait(file, &counter->waitq, wait); | |
1310 | ||
1311 | spin_lock_irqsave(&counter->waitq.lock, flags); | |
1312 | if (counter->usrdata->len || counter->irqdata->len) | |
1313 | events |= POLLIN; | |
1314 | spin_unlock_irqrestore(&counter->waitq.lock, flags); | |
1315 | ||
1316 | return events; | |
1317 | } | |
1318 | ||
d859e29f PM |
1319 | static long perf_ioctl(struct file *file, unsigned int cmd, unsigned long arg) |
1320 | { | |
1321 | struct perf_counter *counter = file->private_data; | |
1322 | int err = 0; | |
1323 | ||
1324 | switch (cmd) { | |
1325 | case PERF_COUNTER_IOC_ENABLE: | |
1326 | perf_counter_enable_family(counter); | |
1327 | break; | |
1328 | case PERF_COUNTER_IOC_DISABLE: | |
1329 | perf_counter_disable_family(counter); | |
1330 | break; | |
1331 | default: | |
1332 | err = -ENOTTY; | |
1333 | } | |
1334 | return err; | |
1335 | } | |
1336 | ||
0793a61d TG |
1337 | static const struct file_operations perf_fops = { |
1338 | .release = perf_release, | |
1339 | .read = perf_read, | |
1340 | .poll = perf_poll, | |
d859e29f PM |
1341 | .unlocked_ioctl = perf_ioctl, |
1342 | .compat_ioctl = perf_ioctl, | |
0793a61d TG |
1343 | }; |
1344 | ||
15dbf27c PZ |
1345 | /* |
1346 | * Generic software counter infrastructure | |
1347 | */ | |
1348 | ||
1349 | static void perf_swcounter_update(struct perf_counter *counter) | |
1350 | { | |
1351 | struct hw_perf_counter *hwc = &counter->hw; | |
1352 | u64 prev, now; | |
1353 | s64 delta; | |
1354 | ||
1355 | again: | |
1356 | prev = atomic64_read(&hwc->prev_count); | |
1357 | now = atomic64_read(&hwc->count); | |
1358 | if (atomic64_cmpxchg(&hwc->prev_count, prev, now) != prev) | |
1359 | goto again; | |
1360 | ||
1361 | delta = now - prev; | |
1362 | ||
1363 | atomic64_add(delta, &counter->count); | |
1364 | atomic64_sub(delta, &hwc->period_left); | |
1365 | } | |
1366 | ||
1367 | static void perf_swcounter_set_period(struct perf_counter *counter) | |
1368 | { | |
1369 | struct hw_perf_counter *hwc = &counter->hw; | |
1370 | s64 left = atomic64_read(&hwc->period_left); | |
1371 | s64 period = hwc->irq_period; | |
1372 | ||
1373 | if (unlikely(left <= -period)) { | |
1374 | left = period; | |
1375 | atomic64_set(&hwc->period_left, left); | |
1376 | } | |
1377 | ||
1378 | if (unlikely(left <= 0)) { | |
1379 | left += period; | |
1380 | atomic64_add(period, &hwc->period_left); | |
1381 | } | |
1382 | ||
1383 | atomic64_set(&hwc->prev_count, -left); | |
1384 | atomic64_set(&hwc->count, -left); | |
1385 | } | |
1386 | ||
1387 | static void perf_swcounter_save_and_restart(struct perf_counter *counter) | |
1388 | { | |
1389 | perf_swcounter_update(counter); | |
1390 | perf_swcounter_set_period(counter); | |
1391 | } | |
1392 | ||
1393 | static void perf_swcounter_store_irq(struct perf_counter *counter, u64 data) | |
1394 | { | |
1395 | struct perf_data *irqdata = counter->irqdata; | |
1396 | ||
1397 | if (irqdata->len > PERF_DATA_BUFLEN - sizeof(u64)) { | |
1398 | irqdata->overrun++; | |
1399 | } else { | |
1400 | u64 *p = (u64 *) &irqdata->data[irqdata->len]; | |
1401 | ||
1402 | *p = data; | |
1403 | irqdata->len += sizeof(u64); | |
1404 | } | |
1405 | } | |
1406 | ||
1407 | static void perf_swcounter_handle_group(struct perf_counter *sibling) | |
1408 | { | |
1409 | struct perf_counter *counter, *group_leader = sibling->group_leader; | |
1410 | ||
1411 | list_for_each_entry(counter, &group_leader->sibling_list, list_entry) { | |
d6d020e9 | 1412 | counter->hw_ops->read(counter); |
15dbf27c PZ |
1413 | perf_swcounter_store_irq(sibling, counter->hw_event.type); |
1414 | perf_swcounter_store_irq(sibling, atomic64_read(&counter->count)); | |
1415 | } | |
1416 | } | |
1417 | ||
1418 | static void perf_swcounter_interrupt(struct perf_counter *counter, | |
1419 | int nmi, struct pt_regs *regs) | |
1420 | { | |
15dbf27c PZ |
1421 | switch (counter->hw_event.record_type) { |
1422 | case PERF_RECORD_SIMPLE: | |
1423 | break; | |
1424 | ||
1425 | case PERF_RECORD_IRQ: | |
1426 | perf_swcounter_store_irq(counter, instruction_pointer(regs)); | |
1427 | break; | |
1428 | ||
1429 | case PERF_RECORD_GROUP: | |
1430 | perf_swcounter_handle_group(counter); | |
1431 | break; | |
1432 | } | |
1433 | ||
1434 | if (nmi) { | |
1435 | counter->wakeup_pending = 1; | |
1436 | set_tsk_thread_flag(current, TIF_PERF_COUNTERS); | |
1437 | } else | |
1438 | wake_up(&counter->waitq); | |
1439 | } | |
1440 | ||
d6d020e9 PZ |
1441 | static enum hrtimer_restart perf_swcounter_hrtimer(struct hrtimer *hrtimer) |
1442 | { | |
1443 | struct perf_counter *counter; | |
1444 | struct pt_regs *regs; | |
1445 | ||
1446 | counter = container_of(hrtimer, struct perf_counter, hw.hrtimer); | |
1447 | counter->hw_ops->read(counter); | |
1448 | ||
1449 | regs = get_irq_regs(); | |
1450 | /* | |
1451 | * In case we exclude kernel IPs or are somehow not in interrupt | |
1452 | * context, provide the next best thing, the user IP. | |
1453 | */ | |
1454 | if ((counter->hw_event.exclude_kernel || !regs) && | |
1455 | !counter->hw_event.exclude_user) | |
1456 | regs = task_pt_regs(current); | |
1457 | ||
1458 | if (regs) | |
1459 | perf_swcounter_interrupt(counter, 0, regs); | |
1460 | ||
1461 | hrtimer_forward_now(hrtimer, ns_to_ktime(counter->hw.irq_period)); | |
1462 | ||
1463 | return HRTIMER_RESTART; | |
1464 | } | |
1465 | ||
1466 | static void perf_swcounter_overflow(struct perf_counter *counter, | |
1467 | int nmi, struct pt_regs *regs) | |
1468 | { | |
1469 | perf_swcounter_save_and_restart(counter); | |
1470 | perf_swcounter_interrupt(counter, nmi, regs); | |
1471 | } | |
1472 | ||
15dbf27c PZ |
1473 | static int perf_swcounter_match(struct perf_counter *counter, |
1474 | enum hw_event_types event, | |
1475 | struct pt_regs *regs) | |
1476 | { | |
1477 | if (counter->state != PERF_COUNTER_STATE_ACTIVE) | |
1478 | return 0; | |
1479 | ||
1480 | if (counter->hw_event.raw) | |
1481 | return 0; | |
1482 | ||
1483 | if (counter->hw_event.type != event) | |
1484 | return 0; | |
1485 | ||
1486 | if (counter->hw_event.exclude_user && user_mode(regs)) | |
1487 | return 0; | |
1488 | ||
1489 | if (counter->hw_event.exclude_kernel && !user_mode(regs)) | |
1490 | return 0; | |
1491 | ||
1492 | return 1; | |
1493 | } | |
1494 | ||
d6d020e9 PZ |
1495 | static void perf_swcounter_add(struct perf_counter *counter, u64 nr, |
1496 | int nmi, struct pt_regs *regs) | |
1497 | { | |
1498 | int neg = atomic64_add_negative(nr, &counter->hw.count); | |
1499 | if (counter->hw.irq_period && !neg) | |
1500 | perf_swcounter_overflow(counter, nmi, regs); | |
1501 | } | |
1502 | ||
15dbf27c PZ |
1503 | static void perf_swcounter_ctx_event(struct perf_counter_context *ctx, |
1504 | enum hw_event_types event, u64 nr, | |
1505 | int nmi, struct pt_regs *regs) | |
1506 | { | |
1507 | struct perf_counter *counter; | |
15dbf27c | 1508 | |
592903cd | 1509 | if (list_empty(&ctx->event_list)) |
15dbf27c PZ |
1510 | return; |
1511 | ||
592903cd PZ |
1512 | rcu_read_lock(); |
1513 | list_for_each_entry_rcu(counter, &ctx->event_list, event_entry) { | |
d6d020e9 PZ |
1514 | if (perf_swcounter_match(counter, event, regs)) |
1515 | perf_swcounter_add(counter, nr, nmi, regs); | |
15dbf27c | 1516 | } |
592903cd | 1517 | rcu_read_unlock(); |
15dbf27c PZ |
1518 | } |
1519 | ||
1520 | void perf_swcounter_event(enum hw_event_types event, u64 nr, | |
1521 | int nmi, struct pt_regs *regs) | |
1522 | { | |
1523 | struct perf_cpu_context *cpuctx = &get_cpu_var(perf_cpu_context); | |
1524 | ||
1525 | perf_swcounter_ctx_event(&cpuctx->ctx, event, nr, nmi, regs); | |
1526 | if (cpuctx->task_ctx) | |
1527 | perf_swcounter_ctx_event(cpuctx->task_ctx, event, nr, nmi, regs); | |
1528 | ||
1529 | put_cpu_var(perf_cpu_context); | |
1530 | } | |
1531 | ||
1532 | static void perf_swcounter_read(struct perf_counter *counter) | |
1533 | { | |
1534 | perf_swcounter_update(counter); | |
1535 | } | |
1536 | ||
1537 | static int perf_swcounter_enable(struct perf_counter *counter) | |
1538 | { | |
1539 | perf_swcounter_set_period(counter); | |
1540 | return 0; | |
1541 | } | |
1542 | ||
1543 | static void perf_swcounter_disable(struct perf_counter *counter) | |
1544 | { | |
1545 | perf_swcounter_update(counter); | |
1546 | } | |
1547 | ||
ac17dc8e PZ |
1548 | static const struct hw_perf_counter_ops perf_ops_generic = { |
1549 | .enable = perf_swcounter_enable, | |
1550 | .disable = perf_swcounter_disable, | |
1551 | .read = perf_swcounter_read, | |
1552 | }; | |
1553 | ||
15dbf27c PZ |
1554 | /* |
1555 | * Software counter: cpu wall time clock | |
1556 | */ | |
1557 | ||
9abf8a08 PM |
1558 | static void cpu_clock_perf_counter_update(struct perf_counter *counter) |
1559 | { | |
1560 | int cpu = raw_smp_processor_id(); | |
1561 | s64 prev; | |
1562 | u64 now; | |
1563 | ||
1564 | now = cpu_clock(cpu); | |
1565 | prev = atomic64_read(&counter->hw.prev_count); | |
1566 | atomic64_set(&counter->hw.prev_count, now); | |
1567 | atomic64_add(now - prev, &counter->count); | |
1568 | } | |
1569 | ||
d6d020e9 PZ |
1570 | static int cpu_clock_perf_counter_enable(struct perf_counter *counter) |
1571 | { | |
1572 | struct hw_perf_counter *hwc = &counter->hw; | |
1573 | int cpu = raw_smp_processor_id(); | |
1574 | ||
1575 | atomic64_set(&hwc->prev_count, cpu_clock(cpu)); | |
039fc91e PZ |
1576 | hrtimer_init(&hwc->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); |
1577 | hwc->hrtimer.function = perf_swcounter_hrtimer; | |
d6d020e9 | 1578 | if (hwc->irq_period) { |
d6d020e9 PZ |
1579 | __hrtimer_start_range_ns(&hwc->hrtimer, |
1580 | ns_to_ktime(hwc->irq_period), 0, | |
1581 | HRTIMER_MODE_REL, 0); | |
1582 | } | |
1583 | ||
1584 | return 0; | |
1585 | } | |
1586 | ||
5c92d124 IM |
1587 | static void cpu_clock_perf_counter_disable(struct perf_counter *counter) |
1588 | { | |
d6d020e9 | 1589 | hrtimer_cancel(&counter->hw.hrtimer); |
9abf8a08 | 1590 | cpu_clock_perf_counter_update(counter); |
5c92d124 IM |
1591 | } |
1592 | ||
1593 | static void cpu_clock_perf_counter_read(struct perf_counter *counter) | |
1594 | { | |
9abf8a08 | 1595 | cpu_clock_perf_counter_update(counter); |
5c92d124 IM |
1596 | } |
1597 | ||
1598 | static const struct hw_perf_counter_ops perf_ops_cpu_clock = { | |
7671581f IM |
1599 | .enable = cpu_clock_perf_counter_enable, |
1600 | .disable = cpu_clock_perf_counter_disable, | |
1601 | .read = cpu_clock_perf_counter_read, | |
5c92d124 IM |
1602 | }; |
1603 | ||
15dbf27c PZ |
1604 | /* |
1605 | * Software counter: task time clock | |
1606 | */ | |
1607 | ||
aa9c4c0f IM |
1608 | /* |
1609 | * Called from within the scheduler: | |
1610 | */ | |
1611 | static u64 task_clock_perf_counter_val(struct perf_counter *counter, int update) | |
bae43c99 | 1612 | { |
aa9c4c0f IM |
1613 | struct task_struct *curr = counter->task; |
1614 | u64 delta; | |
1615 | ||
aa9c4c0f IM |
1616 | delta = __task_delta_exec(curr, update); |
1617 | ||
1618 | return curr->se.sum_exec_runtime + delta; | |
1619 | } | |
1620 | ||
1621 | static void task_clock_perf_counter_update(struct perf_counter *counter, u64 now) | |
1622 | { | |
1623 | u64 prev; | |
8cb391e8 IM |
1624 | s64 delta; |
1625 | ||
1626 | prev = atomic64_read(&counter->hw.prev_count); | |
8cb391e8 IM |
1627 | |
1628 | atomic64_set(&counter->hw.prev_count, now); | |
1629 | ||
1630 | delta = now - prev; | |
8cb391e8 IM |
1631 | |
1632 | atomic64_add(delta, &counter->count); | |
bae43c99 IM |
1633 | } |
1634 | ||
95cdd2e7 | 1635 | static int task_clock_perf_counter_enable(struct perf_counter *counter) |
8cb391e8 | 1636 | { |
d6d020e9 PZ |
1637 | struct hw_perf_counter *hwc = &counter->hw; |
1638 | ||
1639 | atomic64_set(&hwc->prev_count, task_clock_perf_counter_val(counter, 0)); | |
039fc91e PZ |
1640 | hrtimer_init(&hwc->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); |
1641 | hwc->hrtimer.function = perf_swcounter_hrtimer; | |
d6d020e9 | 1642 | if (hwc->irq_period) { |
d6d020e9 PZ |
1643 | __hrtimer_start_range_ns(&hwc->hrtimer, |
1644 | ns_to_ktime(hwc->irq_period), 0, | |
1645 | HRTIMER_MODE_REL, 0); | |
1646 | } | |
95cdd2e7 IM |
1647 | |
1648 | return 0; | |
8cb391e8 IM |
1649 | } |
1650 | ||
1651 | static void task_clock_perf_counter_disable(struct perf_counter *counter) | |
bae43c99 | 1652 | { |
d6d020e9 PZ |
1653 | hrtimer_cancel(&counter->hw.hrtimer); |
1654 | task_clock_perf_counter_update(counter, | |
1655 | task_clock_perf_counter_val(counter, 0)); | |
1656 | } | |
aa9c4c0f | 1657 | |
d6d020e9 PZ |
1658 | static void task_clock_perf_counter_read(struct perf_counter *counter) |
1659 | { | |
1660 | task_clock_perf_counter_update(counter, | |
1661 | task_clock_perf_counter_val(counter, 1)); | |
bae43c99 IM |
1662 | } |
1663 | ||
1664 | static const struct hw_perf_counter_ops perf_ops_task_clock = { | |
7671581f IM |
1665 | .enable = task_clock_perf_counter_enable, |
1666 | .disable = task_clock_perf_counter_disable, | |
1667 | .read = task_clock_perf_counter_read, | |
bae43c99 IM |
1668 | }; |
1669 | ||
15dbf27c PZ |
1670 | /* |
1671 | * Software counter: context switches | |
1672 | */ | |
1673 | ||
23a185ca | 1674 | static u64 get_context_switches(struct perf_counter *counter) |
5d6a27d8 | 1675 | { |
23a185ca | 1676 | struct task_struct *curr = counter->ctx->task; |
5d6a27d8 | 1677 | |
23a185ca PM |
1678 | if (curr) |
1679 | return curr->nvcsw + curr->nivcsw; | |
1680 | return cpu_nr_switches(smp_processor_id()); | |
5d6a27d8 IM |
1681 | } |
1682 | ||
1683 | static void context_switches_perf_counter_update(struct perf_counter *counter) | |
1684 | { | |
1685 | u64 prev, now; | |
1686 | s64 delta; | |
1687 | ||
1688 | prev = atomic64_read(&counter->hw.prev_count); | |
23a185ca | 1689 | now = get_context_switches(counter); |
5d6a27d8 IM |
1690 | |
1691 | atomic64_set(&counter->hw.prev_count, now); | |
1692 | ||
1693 | delta = now - prev; | |
5d6a27d8 IM |
1694 | |
1695 | atomic64_add(delta, &counter->count); | |
1696 | } | |
1697 | ||
1698 | static void context_switches_perf_counter_read(struct perf_counter *counter) | |
1699 | { | |
1700 | context_switches_perf_counter_update(counter); | |
1701 | } | |
1702 | ||
95cdd2e7 | 1703 | static int context_switches_perf_counter_enable(struct perf_counter *counter) |
5d6a27d8 | 1704 | { |
c07c99b6 PM |
1705 | if (counter->prev_state <= PERF_COUNTER_STATE_OFF) |
1706 | atomic64_set(&counter->hw.prev_count, | |
1707 | get_context_switches(counter)); | |
95cdd2e7 | 1708 | return 0; |
5d6a27d8 IM |
1709 | } |
1710 | ||
1711 | static void context_switches_perf_counter_disable(struct perf_counter *counter) | |
1712 | { | |
1713 | context_switches_perf_counter_update(counter); | |
1714 | } | |
1715 | ||
1716 | static const struct hw_perf_counter_ops perf_ops_context_switches = { | |
7671581f IM |
1717 | .enable = context_switches_perf_counter_enable, |
1718 | .disable = context_switches_perf_counter_disable, | |
1719 | .read = context_switches_perf_counter_read, | |
5d6a27d8 IM |
1720 | }; |
1721 | ||
15dbf27c PZ |
1722 | /* |
1723 | * Software counter: cpu migrations | |
1724 | */ | |
1725 | ||
23a185ca | 1726 | static inline u64 get_cpu_migrations(struct perf_counter *counter) |
6c594c21 | 1727 | { |
23a185ca PM |
1728 | struct task_struct *curr = counter->ctx->task; |
1729 | ||
1730 | if (curr) | |
1731 | return curr->se.nr_migrations; | |
1732 | return cpu_nr_migrations(smp_processor_id()); | |
6c594c21 IM |
1733 | } |
1734 | ||
1735 | static void cpu_migrations_perf_counter_update(struct perf_counter *counter) | |
1736 | { | |
1737 | u64 prev, now; | |
1738 | s64 delta; | |
1739 | ||
1740 | prev = atomic64_read(&counter->hw.prev_count); | |
23a185ca | 1741 | now = get_cpu_migrations(counter); |
6c594c21 IM |
1742 | |
1743 | atomic64_set(&counter->hw.prev_count, now); | |
1744 | ||
1745 | delta = now - prev; | |
6c594c21 IM |
1746 | |
1747 | atomic64_add(delta, &counter->count); | |
1748 | } | |
1749 | ||
1750 | static void cpu_migrations_perf_counter_read(struct perf_counter *counter) | |
1751 | { | |
1752 | cpu_migrations_perf_counter_update(counter); | |
1753 | } | |
1754 | ||
95cdd2e7 | 1755 | static int cpu_migrations_perf_counter_enable(struct perf_counter *counter) |
6c594c21 | 1756 | { |
c07c99b6 PM |
1757 | if (counter->prev_state <= PERF_COUNTER_STATE_OFF) |
1758 | atomic64_set(&counter->hw.prev_count, | |
1759 | get_cpu_migrations(counter)); | |
95cdd2e7 | 1760 | return 0; |
6c594c21 IM |
1761 | } |
1762 | ||
1763 | static void cpu_migrations_perf_counter_disable(struct perf_counter *counter) | |
1764 | { | |
1765 | cpu_migrations_perf_counter_update(counter); | |
1766 | } | |
1767 | ||
1768 | static const struct hw_perf_counter_ops perf_ops_cpu_migrations = { | |
7671581f IM |
1769 | .enable = cpu_migrations_perf_counter_enable, |
1770 | .disable = cpu_migrations_perf_counter_disable, | |
1771 | .read = cpu_migrations_perf_counter_read, | |
6c594c21 IM |
1772 | }; |
1773 | ||
5c92d124 IM |
1774 | static const struct hw_perf_counter_ops * |
1775 | sw_perf_counter_init(struct perf_counter *counter) | |
1776 | { | |
15dbf27c | 1777 | struct perf_counter_hw_event *hw_event = &counter->hw_event; |
5c92d124 | 1778 | const struct hw_perf_counter_ops *hw_ops = NULL; |
15dbf27c | 1779 | struct hw_perf_counter *hwc = &counter->hw; |
5c92d124 | 1780 | |
0475f9ea PM |
1781 | /* |
1782 | * Software counters (currently) can't in general distinguish | |
1783 | * between user, kernel and hypervisor events. | |
1784 | * However, context switches and cpu migrations are considered | |
1785 | * to be kernel events, and page faults are never hypervisor | |
1786 | * events. | |
1787 | */ | |
5c92d124 IM |
1788 | switch (counter->hw_event.type) { |
1789 | case PERF_COUNT_CPU_CLOCK: | |
d6d020e9 PZ |
1790 | hw_ops = &perf_ops_cpu_clock; |
1791 | ||
1792 | if (hw_event->irq_period && hw_event->irq_period < 10000) | |
1793 | hw_event->irq_period = 10000; | |
5c92d124 | 1794 | break; |
bae43c99 | 1795 | case PERF_COUNT_TASK_CLOCK: |
23a185ca PM |
1796 | /* |
1797 | * If the user instantiates this as a per-cpu counter, | |
1798 | * use the cpu_clock counter instead. | |
1799 | */ | |
1800 | if (counter->ctx->task) | |
1801 | hw_ops = &perf_ops_task_clock; | |
1802 | else | |
1803 | hw_ops = &perf_ops_cpu_clock; | |
d6d020e9 PZ |
1804 | |
1805 | if (hw_event->irq_period && hw_event->irq_period < 10000) | |
1806 | hw_event->irq_period = 10000; | |
bae43c99 | 1807 | break; |
e06c61a8 | 1808 | case PERF_COUNT_PAGE_FAULTS: |
ac17dc8e PZ |
1809 | case PERF_COUNT_PAGE_FAULTS_MIN: |
1810 | case PERF_COUNT_PAGE_FAULTS_MAJ: | |
1811 | hw_ops = &perf_ops_generic; | |
e06c61a8 | 1812 | break; |
5d6a27d8 | 1813 | case PERF_COUNT_CONTEXT_SWITCHES: |
0475f9ea PM |
1814 | if (!counter->hw_event.exclude_kernel) |
1815 | hw_ops = &perf_ops_context_switches; | |
5d6a27d8 | 1816 | break; |
6c594c21 | 1817 | case PERF_COUNT_CPU_MIGRATIONS: |
0475f9ea PM |
1818 | if (!counter->hw_event.exclude_kernel) |
1819 | hw_ops = &perf_ops_cpu_migrations; | |
6c594c21 | 1820 | break; |
5c92d124 IM |
1821 | default: |
1822 | break; | |
1823 | } | |
15dbf27c PZ |
1824 | |
1825 | if (hw_ops) | |
1826 | hwc->irq_period = hw_event->irq_period; | |
1827 | ||
5c92d124 IM |
1828 | return hw_ops; |
1829 | } | |
1830 | ||
0793a61d TG |
1831 | /* |
1832 | * Allocate and initialize a counter structure | |
1833 | */ | |
1834 | static struct perf_counter * | |
04289bb9 IM |
1835 | perf_counter_alloc(struct perf_counter_hw_event *hw_event, |
1836 | int cpu, | |
23a185ca | 1837 | struct perf_counter_context *ctx, |
9b51f66d IM |
1838 | struct perf_counter *group_leader, |
1839 | gfp_t gfpflags) | |
0793a61d | 1840 | { |
5c92d124 | 1841 | const struct hw_perf_counter_ops *hw_ops; |
621a01ea | 1842 | struct perf_counter *counter; |
0793a61d | 1843 | |
9b51f66d | 1844 | counter = kzalloc(sizeof(*counter), gfpflags); |
0793a61d TG |
1845 | if (!counter) |
1846 | return NULL; | |
1847 | ||
04289bb9 IM |
1848 | /* |
1849 | * Single counters are their own group leaders, with an | |
1850 | * empty sibling list: | |
1851 | */ | |
1852 | if (!group_leader) | |
1853 | group_leader = counter; | |
1854 | ||
0793a61d | 1855 | mutex_init(&counter->mutex); |
04289bb9 | 1856 | INIT_LIST_HEAD(&counter->list_entry); |
592903cd | 1857 | INIT_LIST_HEAD(&counter->event_entry); |
04289bb9 | 1858 | INIT_LIST_HEAD(&counter->sibling_list); |
0793a61d TG |
1859 | init_waitqueue_head(&counter->waitq); |
1860 | ||
d859e29f PM |
1861 | INIT_LIST_HEAD(&counter->child_list); |
1862 | ||
9f66a381 IM |
1863 | counter->irqdata = &counter->data[0]; |
1864 | counter->usrdata = &counter->data[1]; | |
1865 | counter->cpu = cpu; | |
1866 | counter->hw_event = *hw_event; | |
1867 | counter->wakeup_pending = 0; | |
04289bb9 | 1868 | counter->group_leader = group_leader; |
621a01ea | 1869 | counter->hw_ops = NULL; |
23a185ca | 1870 | counter->ctx = ctx; |
621a01ea | 1871 | |
235c7fc7 | 1872 | counter->state = PERF_COUNTER_STATE_INACTIVE; |
a86ed508 IM |
1873 | if (hw_event->disabled) |
1874 | counter->state = PERF_COUNTER_STATE_OFF; | |
1875 | ||
5c92d124 IM |
1876 | hw_ops = NULL; |
1877 | if (!hw_event->raw && hw_event->type < 0) | |
1878 | hw_ops = sw_perf_counter_init(counter); | |
23a185ca | 1879 | else |
5c92d124 | 1880 | hw_ops = hw_perf_counter_init(counter); |
5c92d124 | 1881 | |
621a01ea IM |
1882 | if (!hw_ops) { |
1883 | kfree(counter); | |
1884 | return NULL; | |
1885 | } | |
1886 | counter->hw_ops = hw_ops; | |
0793a61d TG |
1887 | |
1888 | return counter; | |
1889 | } | |
1890 | ||
1891 | /** | |
2743a5b0 | 1892 | * sys_perf_counter_open - open a performance counter, associate it to a task/cpu |
9f66a381 IM |
1893 | * |
1894 | * @hw_event_uptr: event type attributes for monitoring/sampling | |
0793a61d | 1895 | * @pid: target pid |
9f66a381 IM |
1896 | * @cpu: target cpu |
1897 | * @group_fd: group leader counter fd | |
0793a61d | 1898 | */ |
2743a5b0 | 1899 | SYSCALL_DEFINE5(perf_counter_open, |
f3dfd265 | 1900 | const struct perf_counter_hw_event __user *, hw_event_uptr, |
2743a5b0 | 1901 | pid_t, pid, int, cpu, int, group_fd, unsigned long, flags) |
0793a61d | 1902 | { |
04289bb9 | 1903 | struct perf_counter *counter, *group_leader; |
9f66a381 | 1904 | struct perf_counter_hw_event hw_event; |
04289bb9 | 1905 | struct perf_counter_context *ctx; |
9b51f66d | 1906 | struct file *counter_file = NULL; |
04289bb9 IM |
1907 | struct file *group_file = NULL; |
1908 | int fput_needed = 0; | |
9b51f66d | 1909 | int fput_needed2 = 0; |
0793a61d TG |
1910 | int ret; |
1911 | ||
2743a5b0 PM |
1912 | /* for future expandability... */ |
1913 | if (flags) | |
1914 | return -EINVAL; | |
1915 | ||
9f66a381 | 1916 | if (copy_from_user(&hw_event, hw_event_uptr, sizeof(hw_event)) != 0) |
eab656ae TG |
1917 | return -EFAULT; |
1918 | ||
04289bb9 | 1919 | /* |
ccff286d IM |
1920 | * Get the target context (task or percpu): |
1921 | */ | |
1922 | ctx = find_get_context(pid, cpu); | |
1923 | if (IS_ERR(ctx)) | |
1924 | return PTR_ERR(ctx); | |
1925 | ||
1926 | /* | |
1927 | * Look up the group leader (we will attach this counter to it): | |
04289bb9 IM |
1928 | */ |
1929 | group_leader = NULL; | |
1930 | if (group_fd != -1) { | |
1931 | ret = -EINVAL; | |
1932 | group_file = fget_light(group_fd, &fput_needed); | |
1933 | if (!group_file) | |
ccff286d | 1934 | goto err_put_context; |
04289bb9 | 1935 | if (group_file->f_op != &perf_fops) |
ccff286d | 1936 | goto err_put_context; |
04289bb9 IM |
1937 | |
1938 | group_leader = group_file->private_data; | |
1939 | /* | |
ccff286d IM |
1940 | * Do not allow a recursive hierarchy (this new sibling |
1941 | * becoming part of another group-sibling): | |
1942 | */ | |
1943 | if (group_leader->group_leader != group_leader) | |
1944 | goto err_put_context; | |
1945 | /* | |
1946 | * Do not allow to attach to a group in a different | |
1947 | * task or CPU context: | |
04289bb9 | 1948 | */ |
ccff286d IM |
1949 | if (group_leader->ctx != ctx) |
1950 | goto err_put_context; | |
3b6f9e5c PM |
1951 | /* |
1952 | * Only a group leader can be exclusive or pinned | |
1953 | */ | |
1954 | if (hw_event.exclusive || hw_event.pinned) | |
1955 | goto err_put_context; | |
04289bb9 IM |
1956 | } |
1957 | ||
5c92d124 | 1958 | ret = -EINVAL; |
23a185ca PM |
1959 | counter = perf_counter_alloc(&hw_event, cpu, ctx, group_leader, |
1960 | GFP_KERNEL); | |
0793a61d TG |
1961 | if (!counter) |
1962 | goto err_put_context; | |
1963 | ||
0793a61d TG |
1964 | ret = anon_inode_getfd("[perf_counter]", &perf_fops, counter, 0); |
1965 | if (ret < 0) | |
9b51f66d IM |
1966 | goto err_free_put_context; |
1967 | ||
1968 | counter_file = fget_light(ret, &fput_needed2); | |
1969 | if (!counter_file) | |
1970 | goto err_free_put_context; | |
1971 | ||
1972 | counter->filp = counter_file; | |
d859e29f | 1973 | mutex_lock(&ctx->mutex); |
9b51f66d | 1974 | perf_install_in_context(ctx, counter, cpu); |
d859e29f | 1975 | mutex_unlock(&ctx->mutex); |
9b51f66d IM |
1976 | |
1977 | fput_light(counter_file, fput_needed2); | |
0793a61d | 1978 | |
04289bb9 IM |
1979 | out_fput: |
1980 | fput_light(group_file, fput_needed); | |
1981 | ||
0793a61d TG |
1982 | return ret; |
1983 | ||
9b51f66d | 1984 | err_free_put_context: |
0793a61d TG |
1985 | kfree(counter); |
1986 | ||
1987 | err_put_context: | |
1988 | put_context(ctx); | |
1989 | ||
04289bb9 | 1990 | goto out_fput; |
0793a61d TG |
1991 | } |
1992 | ||
9b51f66d IM |
1993 | /* |
1994 | * Initialize the perf_counter context in a task_struct: | |
1995 | */ | |
1996 | static void | |
1997 | __perf_counter_init_context(struct perf_counter_context *ctx, | |
1998 | struct task_struct *task) | |
1999 | { | |
2000 | memset(ctx, 0, sizeof(*ctx)); | |
2001 | spin_lock_init(&ctx->lock); | |
d859e29f | 2002 | mutex_init(&ctx->mutex); |
9b51f66d | 2003 | INIT_LIST_HEAD(&ctx->counter_list); |
592903cd | 2004 | INIT_LIST_HEAD(&ctx->event_list); |
9b51f66d IM |
2005 | ctx->task = task; |
2006 | } | |
2007 | ||
2008 | /* | |
2009 | * inherit a counter from parent task to child task: | |
2010 | */ | |
d859e29f | 2011 | static struct perf_counter * |
9b51f66d IM |
2012 | inherit_counter(struct perf_counter *parent_counter, |
2013 | struct task_struct *parent, | |
2014 | struct perf_counter_context *parent_ctx, | |
2015 | struct task_struct *child, | |
d859e29f | 2016 | struct perf_counter *group_leader, |
9b51f66d IM |
2017 | struct perf_counter_context *child_ctx) |
2018 | { | |
2019 | struct perf_counter *child_counter; | |
2020 | ||
d859e29f PM |
2021 | /* |
2022 | * Instead of creating recursive hierarchies of counters, | |
2023 | * we link inherited counters back to the original parent, | |
2024 | * which has a filp for sure, which we use as the reference | |
2025 | * count: | |
2026 | */ | |
2027 | if (parent_counter->parent) | |
2028 | parent_counter = parent_counter->parent; | |
2029 | ||
9b51f66d | 2030 | child_counter = perf_counter_alloc(&parent_counter->hw_event, |
23a185ca PM |
2031 | parent_counter->cpu, child_ctx, |
2032 | group_leader, GFP_KERNEL); | |
9b51f66d | 2033 | if (!child_counter) |
d859e29f | 2034 | return NULL; |
9b51f66d IM |
2035 | |
2036 | /* | |
2037 | * Link it up in the child's context: | |
2038 | */ | |
9b51f66d IM |
2039 | child_counter->task = child; |
2040 | list_add_counter(child_counter, child_ctx); | |
2041 | child_ctx->nr_counters++; | |
2042 | ||
2043 | child_counter->parent = parent_counter; | |
9b51f66d IM |
2044 | /* |
2045 | * inherit into child's child as well: | |
2046 | */ | |
2047 | child_counter->hw_event.inherit = 1; | |
2048 | ||
2049 | /* | |
2050 | * Get a reference to the parent filp - we will fput it | |
2051 | * when the child counter exits. This is safe to do because | |
2052 | * we are in the parent and we know that the filp still | |
2053 | * exists and has a nonzero count: | |
2054 | */ | |
2055 | atomic_long_inc(&parent_counter->filp->f_count); | |
2056 | ||
d859e29f PM |
2057 | /* |
2058 | * Link this into the parent counter's child list | |
2059 | */ | |
2060 | mutex_lock(&parent_counter->mutex); | |
2061 | list_add_tail(&child_counter->child_list, &parent_counter->child_list); | |
2062 | ||
2063 | /* | |
2064 | * Make the child state follow the state of the parent counter, | |
2065 | * not its hw_event.disabled bit. We hold the parent's mutex, | |
2066 | * so we won't race with perf_counter_{en,dis}able_family. | |
2067 | */ | |
2068 | if (parent_counter->state >= PERF_COUNTER_STATE_INACTIVE) | |
2069 | child_counter->state = PERF_COUNTER_STATE_INACTIVE; | |
2070 | else | |
2071 | child_counter->state = PERF_COUNTER_STATE_OFF; | |
2072 | ||
2073 | mutex_unlock(&parent_counter->mutex); | |
2074 | ||
2075 | return child_counter; | |
2076 | } | |
2077 | ||
2078 | static int inherit_group(struct perf_counter *parent_counter, | |
2079 | struct task_struct *parent, | |
2080 | struct perf_counter_context *parent_ctx, | |
2081 | struct task_struct *child, | |
2082 | struct perf_counter_context *child_ctx) | |
2083 | { | |
2084 | struct perf_counter *leader; | |
2085 | struct perf_counter *sub; | |
2086 | ||
2087 | leader = inherit_counter(parent_counter, parent, parent_ctx, | |
2088 | child, NULL, child_ctx); | |
2089 | if (!leader) | |
2090 | return -ENOMEM; | |
2091 | list_for_each_entry(sub, &parent_counter->sibling_list, list_entry) { | |
2092 | if (!inherit_counter(sub, parent, parent_ctx, | |
2093 | child, leader, child_ctx)) | |
2094 | return -ENOMEM; | |
2095 | } | |
9b51f66d IM |
2096 | return 0; |
2097 | } | |
2098 | ||
d859e29f PM |
2099 | static void sync_child_counter(struct perf_counter *child_counter, |
2100 | struct perf_counter *parent_counter) | |
2101 | { | |
2102 | u64 parent_val, child_val; | |
2103 | ||
2104 | parent_val = atomic64_read(&parent_counter->count); | |
2105 | child_val = atomic64_read(&child_counter->count); | |
2106 | ||
2107 | /* | |
2108 | * Add back the child's count to the parent's count: | |
2109 | */ | |
2110 | atomic64_add(child_val, &parent_counter->count); | |
2111 | ||
2112 | /* | |
2113 | * Remove this counter from the parent's list | |
2114 | */ | |
2115 | mutex_lock(&parent_counter->mutex); | |
2116 | list_del_init(&child_counter->child_list); | |
2117 | mutex_unlock(&parent_counter->mutex); | |
2118 | ||
2119 | /* | |
2120 | * Release the parent counter, if this was the last | |
2121 | * reference to it. | |
2122 | */ | |
2123 | fput(parent_counter->filp); | |
2124 | } | |
2125 | ||
9b51f66d IM |
2126 | static void |
2127 | __perf_counter_exit_task(struct task_struct *child, | |
2128 | struct perf_counter *child_counter, | |
2129 | struct perf_counter_context *child_ctx) | |
2130 | { | |
2131 | struct perf_counter *parent_counter; | |
d859e29f | 2132 | struct perf_counter *sub, *tmp; |
9b51f66d IM |
2133 | |
2134 | /* | |
235c7fc7 IM |
2135 | * If we do not self-reap then we have to wait for the |
2136 | * child task to unschedule (it will happen for sure), | |
2137 | * so that its counter is at its final count. (This | |
2138 | * condition triggers rarely - child tasks usually get | |
2139 | * off their CPU before the parent has a chance to | |
2140 | * get this far into the reaping action) | |
9b51f66d | 2141 | */ |
235c7fc7 IM |
2142 | if (child != current) { |
2143 | wait_task_inactive(child, 0); | |
2144 | list_del_init(&child_counter->list_entry); | |
2145 | } else { | |
0cc0c027 | 2146 | struct perf_cpu_context *cpuctx; |
235c7fc7 IM |
2147 | unsigned long flags; |
2148 | u64 perf_flags; | |
2149 | ||
2150 | /* | |
2151 | * Disable and unlink this counter. | |
2152 | * | |
2153 | * Be careful about zapping the list - IRQ/NMI context | |
2154 | * could still be processing it: | |
2155 | */ | |
2156 | curr_rq_lock_irq_save(&flags); | |
2157 | perf_flags = hw_perf_save_disable(); | |
0cc0c027 IM |
2158 | |
2159 | cpuctx = &__get_cpu_var(perf_cpu_context); | |
2160 | ||
d859e29f | 2161 | group_sched_out(child_counter, cpuctx, child_ctx); |
0cc0c027 | 2162 | |
235c7fc7 | 2163 | list_del_init(&child_counter->list_entry); |
0cc0c027 | 2164 | |
235c7fc7 | 2165 | child_ctx->nr_counters--; |
9b51f66d | 2166 | |
235c7fc7 IM |
2167 | hw_perf_restore(perf_flags); |
2168 | curr_rq_unlock_irq_restore(&flags); | |
2169 | } | |
9b51f66d IM |
2170 | |
2171 | parent_counter = child_counter->parent; | |
2172 | /* | |
2173 | * It can happen that parent exits first, and has counters | |
2174 | * that are still around due to the child reference. These | |
2175 | * counters need to be zapped - but otherwise linger. | |
2176 | */ | |
d859e29f PM |
2177 | if (parent_counter) { |
2178 | sync_child_counter(child_counter, parent_counter); | |
2179 | list_for_each_entry_safe(sub, tmp, &child_counter->sibling_list, | |
2180 | list_entry) { | |
4bcf349a | 2181 | if (sub->parent) { |
d859e29f | 2182 | sync_child_counter(sub, sub->parent); |
4bcf349a PM |
2183 | kfree(sub); |
2184 | } | |
d859e29f | 2185 | } |
65d37086 | 2186 | kfree(child_counter); |
4bcf349a | 2187 | } |
9b51f66d IM |
2188 | } |
2189 | ||
2190 | /* | |
d859e29f | 2191 | * When a child task exits, feed back counter values to parent counters. |
9b51f66d | 2192 | * |
d859e29f | 2193 | * Note: we may be running in child context, but the PID is not hashed |
9b51f66d IM |
2194 | * anymore so new counters will not be added. |
2195 | */ | |
2196 | void perf_counter_exit_task(struct task_struct *child) | |
2197 | { | |
2198 | struct perf_counter *child_counter, *tmp; | |
2199 | struct perf_counter_context *child_ctx; | |
2200 | ||
2201 | child_ctx = &child->perf_counter_ctx; | |
2202 | ||
2203 | if (likely(!child_ctx->nr_counters)) | |
2204 | return; | |
2205 | ||
2206 | list_for_each_entry_safe(child_counter, tmp, &child_ctx->counter_list, | |
2207 | list_entry) | |
2208 | __perf_counter_exit_task(child, child_counter, child_ctx); | |
2209 | } | |
2210 | ||
2211 | /* | |
2212 | * Initialize the perf_counter context in task_struct | |
2213 | */ | |
2214 | void perf_counter_init_task(struct task_struct *child) | |
2215 | { | |
2216 | struct perf_counter_context *child_ctx, *parent_ctx; | |
d859e29f | 2217 | struct perf_counter *counter; |
9b51f66d | 2218 | struct task_struct *parent = current; |
9b51f66d IM |
2219 | |
2220 | child_ctx = &child->perf_counter_ctx; | |
2221 | parent_ctx = &parent->perf_counter_ctx; | |
2222 | ||
2223 | __perf_counter_init_context(child_ctx, child); | |
2224 | ||
2225 | /* | |
2226 | * This is executed from the parent task context, so inherit | |
2227 | * counters that have been marked for cloning: | |
2228 | */ | |
2229 | ||
2230 | if (likely(!parent_ctx->nr_counters)) | |
2231 | return; | |
2232 | ||
2233 | /* | |
2234 | * Lock the parent list. No need to lock the child - not PID | |
2235 | * hashed yet and not running, so nobody can access it. | |
2236 | */ | |
d859e29f | 2237 | mutex_lock(&parent_ctx->mutex); |
9b51f66d IM |
2238 | |
2239 | /* | |
2240 | * We dont have to disable NMIs - we are only looking at | |
2241 | * the list, not manipulating it: | |
2242 | */ | |
2243 | list_for_each_entry(counter, &parent_ctx->counter_list, list_entry) { | |
d859e29f | 2244 | if (!counter->hw_event.inherit) |
9b51f66d IM |
2245 | continue; |
2246 | ||
d859e29f | 2247 | if (inherit_group(counter, parent, |
9b51f66d IM |
2248 | parent_ctx, child, child_ctx)) |
2249 | break; | |
2250 | } | |
2251 | ||
d859e29f | 2252 | mutex_unlock(&parent_ctx->mutex); |
9b51f66d IM |
2253 | } |
2254 | ||
04289bb9 | 2255 | static void __cpuinit perf_counter_init_cpu(int cpu) |
0793a61d | 2256 | { |
04289bb9 | 2257 | struct perf_cpu_context *cpuctx; |
0793a61d | 2258 | |
04289bb9 IM |
2259 | cpuctx = &per_cpu(perf_cpu_context, cpu); |
2260 | __perf_counter_init_context(&cpuctx->ctx, NULL); | |
0793a61d TG |
2261 | |
2262 | mutex_lock(&perf_resource_mutex); | |
04289bb9 | 2263 | cpuctx->max_pertask = perf_max_counters - perf_reserved_percpu; |
0793a61d | 2264 | mutex_unlock(&perf_resource_mutex); |
04289bb9 | 2265 | |
01d0287f | 2266 | hw_perf_counter_setup(cpu); |
0793a61d TG |
2267 | } |
2268 | ||
2269 | #ifdef CONFIG_HOTPLUG_CPU | |
04289bb9 | 2270 | static void __perf_counter_exit_cpu(void *info) |
0793a61d TG |
2271 | { |
2272 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
2273 | struct perf_counter_context *ctx = &cpuctx->ctx; | |
2274 | struct perf_counter *counter, *tmp; | |
2275 | ||
04289bb9 IM |
2276 | list_for_each_entry_safe(counter, tmp, &ctx->counter_list, list_entry) |
2277 | __perf_counter_remove_from_context(counter); | |
0793a61d | 2278 | } |
04289bb9 | 2279 | static void perf_counter_exit_cpu(int cpu) |
0793a61d | 2280 | { |
d859e29f PM |
2281 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); |
2282 | struct perf_counter_context *ctx = &cpuctx->ctx; | |
2283 | ||
2284 | mutex_lock(&ctx->mutex); | |
04289bb9 | 2285 | smp_call_function_single(cpu, __perf_counter_exit_cpu, NULL, 1); |
d859e29f | 2286 | mutex_unlock(&ctx->mutex); |
0793a61d TG |
2287 | } |
2288 | #else | |
04289bb9 | 2289 | static inline void perf_counter_exit_cpu(int cpu) { } |
0793a61d TG |
2290 | #endif |
2291 | ||
2292 | static int __cpuinit | |
2293 | perf_cpu_notify(struct notifier_block *self, unsigned long action, void *hcpu) | |
2294 | { | |
2295 | unsigned int cpu = (long)hcpu; | |
2296 | ||
2297 | switch (action) { | |
2298 | ||
2299 | case CPU_UP_PREPARE: | |
2300 | case CPU_UP_PREPARE_FROZEN: | |
04289bb9 | 2301 | perf_counter_init_cpu(cpu); |
0793a61d TG |
2302 | break; |
2303 | ||
2304 | case CPU_DOWN_PREPARE: | |
2305 | case CPU_DOWN_PREPARE_FROZEN: | |
04289bb9 | 2306 | perf_counter_exit_cpu(cpu); |
0793a61d TG |
2307 | break; |
2308 | ||
2309 | default: | |
2310 | break; | |
2311 | } | |
2312 | ||
2313 | return NOTIFY_OK; | |
2314 | } | |
2315 | ||
2316 | static struct notifier_block __cpuinitdata perf_cpu_nb = { | |
2317 | .notifier_call = perf_cpu_notify, | |
2318 | }; | |
2319 | ||
2320 | static int __init perf_counter_init(void) | |
2321 | { | |
2322 | perf_cpu_notify(&perf_cpu_nb, (unsigned long)CPU_UP_PREPARE, | |
2323 | (void *)(long)smp_processor_id()); | |
2324 | register_cpu_notifier(&perf_cpu_nb); | |
2325 | ||
2326 | return 0; | |
2327 | } | |
2328 | early_initcall(perf_counter_init); | |
2329 | ||
2330 | static ssize_t perf_show_reserve_percpu(struct sysdev_class *class, char *buf) | |
2331 | { | |
2332 | return sprintf(buf, "%d\n", perf_reserved_percpu); | |
2333 | } | |
2334 | ||
2335 | static ssize_t | |
2336 | perf_set_reserve_percpu(struct sysdev_class *class, | |
2337 | const char *buf, | |
2338 | size_t count) | |
2339 | { | |
2340 | struct perf_cpu_context *cpuctx; | |
2341 | unsigned long val; | |
2342 | int err, cpu, mpt; | |
2343 | ||
2344 | err = strict_strtoul(buf, 10, &val); | |
2345 | if (err) | |
2346 | return err; | |
2347 | if (val > perf_max_counters) | |
2348 | return -EINVAL; | |
2349 | ||
2350 | mutex_lock(&perf_resource_mutex); | |
2351 | perf_reserved_percpu = val; | |
2352 | for_each_online_cpu(cpu) { | |
2353 | cpuctx = &per_cpu(perf_cpu_context, cpu); | |
2354 | spin_lock_irq(&cpuctx->ctx.lock); | |
2355 | mpt = min(perf_max_counters - cpuctx->ctx.nr_counters, | |
2356 | perf_max_counters - perf_reserved_percpu); | |
2357 | cpuctx->max_pertask = mpt; | |
2358 | spin_unlock_irq(&cpuctx->ctx.lock); | |
2359 | } | |
2360 | mutex_unlock(&perf_resource_mutex); | |
2361 | ||
2362 | return count; | |
2363 | } | |
2364 | ||
2365 | static ssize_t perf_show_overcommit(struct sysdev_class *class, char *buf) | |
2366 | { | |
2367 | return sprintf(buf, "%d\n", perf_overcommit); | |
2368 | } | |
2369 | ||
2370 | static ssize_t | |
2371 | perf_set_overcommit(struct sysdev_class *class, const char *buf, size_t count) | |
2372 | { | |
2373 | unsigned long val; | |
2374 | int err; | |
2375 | ||
2376 | err = strict_strtoul(buf, 10, &val); | |
2377 | if (err) | |
2378 | return err; | |
2379 | if (val > 1) | |
2380 | return -EINVAL; | |
2381 | ||
2382 | mutex_lock(&perf_resource_mutex); | |
2383 | perf_overcommit = val; | |
2384 | mutex_unlock(&perf_resource_mutex); | |
2385 | ||
2386 | return count; | |
2387 | } | |
2388 | ||
2389 | static SYSDEV_CLASS_ATTR( | |
2390 | reserve_percpu, | |
2391 | 0644, | |
2392 | perf_show_reserve_percpu, | |
2393 | perf_set_reserve_percpu | |
2394 | ); | |
2395 | ||
2396 | static SYSDEV_CLASS_ATTR( | |
2397 | overcommit, | |
2398 | 0644, | |
2399 | perf_show_overcommit, | |
2400 | perf_set_overcommit | |
2401 | ); | |
2402 | ||
2403 | static struct attribute *perfclass_attrs[] = { | |
2404 | &attr_reserve_percpu.attr, | |
2405 | &attr_overcommit.attr, | |
2406 | NULL | |
2407 | }; | |
2408 | ||
2409 | static struct attribute_group perfclass_attr_group = { | |
2410 | .attrs = perfclass_attrs, | |
2411 | .name = "perf_counters", | |
2412 | }; | |
2413 | ||
2414 | static int __init perf_counter_sysfs_init(void) | |
2415 | { | |
2416 | return sysfs_create_group(&cpu_sysdev_class.kset.kobj, | |
2417 | &perfclass_attr_group); | |
2418 | } | |
2419 | device_initcall(perf_counter_sysfs_init); |