Commit | Line | Data |
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0793a61d TG |
1 | /* |
2 | * Performance counter core code | |
3 | * | |
4 | * Copyright(C) 2008 Thomas Gleixner <tglx@linutronix.de> | |
5 | * Copyright(C) 2008 Red Hat, Inc., Ingo Molnar | |
6 | * | |
7b732a75 PZ |
7 | * |
8 | * For licensing details see kernel-base/COPYING | |
0793a61d TG |
9 | */ |
10 | ||
11 | #include <linux/fs.h> | |
b9cacc7b | 12 | #include <linux/mm.h> |
0793a61d TG |
13 | #include <linux/cpu.h> |
14 | #include <linux/smp.h> | |
04289bb9 | 15 | #include <linux/file.h> |
0793a61d TG |
16 | #include <linux/poll.h> |
17 | #include <linux/sysfs.h> | |
18 | #include <linux/ptrace.h> | |
19 | #include <linux/percpu.h> | |
b9cacc7b PZ |
20 | #include <linux/vmstat.h> |
21 | #include <linux/hardirq.h> | |
22 | #include <linux/rculist.h> | |
0793a61d TG |
23 | #include <linux/uaccess.h> |
24 | #include <linux/syscalls.h> | |
25 | #include <linux/anon_inodes.h> | |
aa9c4c0f | 26 | #include <linux/kernel_stat.h> |
0793a61d | 27 | #include <linux/perf_counter.h> |
0a4a9391 | 28 | #include <linux/dcache.h> |
0793a61d | 29 | |
4e193bd4 TB |
30 | #include <asm/irq_regs.h> |
31 | ||
0793a61d TG |
32 | /* |
33 | * Each CPU has a list of per CPU counters: | |
34 | */ | |
35 | DEFINE_PER_CPU(struct perf_cpu_context, perf_cpu_context); | |
36 | ||
088e2852 | 37 | int perf_max_counters __read_mostly = 1; |
0793a61d TG |
38 | static int perf_reserved_percpu __read_mostly; |
39 | static int perf_overcommit __read_mostly = 1; | |
40 | ||
41 | /* | |
42 | * Mutex for (sysadmin-configurable) counter reservations: | |
43 | */ | |
44 | static DEFINE_MUTEX(perf_resource_mutex); | |
45 | ||
46 | /* | |
47 | * Architecture provided APIs - weak aliases: | |
48 | */ | |
5c92d124 | 49 | extern __weak const struct hw_perf_counter_ops * |
621a01ea | 50 | hw_perf_counter_init(struct perf_counter *counter) |
0793a61d | 51 | { |
ff6f0541 | 52 | return NULL; |
0793a61d TG |
53 | } |
54 | ||
01b2838c | 55 | u64 __weak hw_perf_save_disable(void) { return 0; } |
01ea1cca | 56 | void __weak hw_perf_restore(u64 ctrl) { barrier(); } |
01d0287f | 57 | void __weak hw_perf_counter_setup(int cpu) { barrier(); } |
3cbed429 PM |
58 | int __weak hw_perf_group_sched_in(struct perf_counter *group_leader, |
59 | struct perf_cpu_context *cpuctx, | |
60 | struct perf_counter_context *ctx, int cpu) | |
61 | { | |
62 | return 0; | |
63 | } | |
0793a61d | 64 | |
4eb96fcf PM |
65 | void __weak perf_counter_print_debug(void) { } |
66 | ||
04289bb9 IM |
67 | static void |
68 | list_add_counter(struct perf_counter *counter, struct perf_counter_context *ctx) | |
69 | { | |
70 | struct perf_counter *group_leader = counter->group_leader; | |
71 | ||
72 | /* | |
73 | * Depending on whether it is a standalone or sibling counter, | |
74 | * add it straight to the context's counter list, or to the group | |
75 | * leader's sibling list: | |
76 | */ | |
77 | if (counter->group_leader == counter) | |
78 | list_add_tail(&counter->list_entry, &ctx->counter_list); | |
5c148194 | 79 | else { |
04289bb9 | 80 | list_add_tail(&counter->list_entry, &group_leader->sibling_list); |
5c148194 PZ |
81 | group_leader->nr_siblings++; |
82 | } | |
592903cd PZ |
83 | |
84 | list_add_rcu(&counter->event_entry, &ctx->event_list); | |
04289bb9 IM |
85 | } |
86 | ||
87 | static void | |
88 | list_del_counter(struct perf_counter *counter, struct perf_counter_context *ctx) | |
89 | { | |
90 | struct perf_counter *sibling, *tmp; | |
91 | ||
92 | list_del_init(&counter->list_entry); | |
592903cd | 93 | list_del_rcu(&counter->event_entry); |
04289bb9 | 94 | |
5c148194 PZ |
95 | if (counter->group_leader != counter) |
96 | counter->group_leader->nr_siblings--; | |
97 | ||
04289bb9 IM |
98 | /* |
99 | * If this was a group counter with sibling counters then | |
100 | * upgrade the siblings to singleton counters by adding them | |
101 | * to the context list directly: | |
102 | */ | |
103 | list_for_each_entry_safe(sibling, tmp, | |
104 | &counter->sibling_list, list_entry) { | |
105 | ||
75564232 | 106 | list_move_tail(&sibling->list_entry, &ctx->counter_list); |
04289bb9 IM |
107 | sibling->group_leader = sibling; |
108 | } | |
109 | } | |
110 | ||
3b6f9e5c PM |
111 | static void |
112 | counter_sched_out(struct perf_counter *counter, | |
113 | struct perf_cpu_context *cpuctx, | |
114 | struct perf_counter_context *ctx) | |
115 | { | |
116 | if (counter->state != PERF_COUNTER_STATE_ACTIVE) | |
117 | return; | |
118 | ||
119 | counter->state = PERF_COUNTER_STATE_INACTIVE; | |
4af4998b | 120 | counter->tstamp_stopped = ctx->time; |
3b6f9e5c PM |
121 | counter->hw_ops->disable(counter); |
122 | counter->oncpu = -1; | |
123 | ||
124 | if (!is_software_counter(counter)) | |
125 | cpuctx->active_oncpu--; | |
126 | ctx->nr_active--; | |
127 | if (counter->hw_event.exclusive || !cpuctx->active_oncpu) | |
128 | cpuctx->exclusive = 0; | |
129 | } | |
130 | ||
d859e29f PM |
131 | static void |
132 | group_sched_out(struct perf_counter *group_counter, | |
133 | struct perf_cpu_context *cpuctx, | |
134 | struct perf_counter_context *ctx) | |
135 | { | |
136 | struct perf_counter *counter; | |
137 | ||
138 | if (group_counter->state != PERF_COUNTER_STATE_ACTIVE) | |
139 | return; | |
140 | ||
141 | counter_sched_out(group_counter, cpuctx, ctx); | |
142 | ||
143 | /* | |
144 | * Schedule out siblings (if any): | |
145 | */ | |
146 | list_for_each_entry(counter, &group_counter->sibling_list, list_entry) | |
147 | counter_sched_out(counter, cpuctx, ctx); | |
148 | ||
149 | if (group_counter->hw_event.exclusive) | |
150 | cpuctx->exclusive = 0; | |
151 | } | |
152 | ||
0793a61d TG |
153 | /* |
154 | * Cross CPU call to remove a performance counter | |
155 | * | |
156 | * We disable the counter on the hardware level first. After that we | |
157 | * remove it from the context list. | |
158 | */ | |
04289bb9 | 159 | static void __perf_counter_remove_from_context(void *info) |
0793a61d TG |
160 | { |
161 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
162 | struct perf_counter *counter = info; | |
163 | struct perf_counter_context *ctx = counter->ctx; | |
9b51f66d | 164 | unsigned long flags; |
5c92d124 | 165 | u64 perf_flags; |
0793a61d TG |
166 | |
167 | /* | |
168 | * If this is a task context, we need to check whether it is | |
169 | * the current task context of this cpu. If not it has been | |
170 | * scheduled out before the smp call arrived. | |
171 | */ | |
172 | if (ctx->task && cpuctx->task_ctx != ctx) | |
173 | return; | |
174 | ||
849691a6 | 175 | spin_lock_irqsave(&ctx->lock, flags); |
0793a61d | 176 | |
3b6f9e5c PM |
177 | counter_sched_out(counter, cpuctx, ctx); |
178 | ||
179 | counter->task = NULL; | |
0793a61d TG |
180 | ctx->nr_counters--; |
181 | ||
182 | /* | |
183 | * Protect the list operation against NMI by disabling the | |
184 | * counters on a global level. NOP for non NMI based counters. | |
185 | */ | |
01b2838c | 186 | perf_flags = hw_perf_save_disable(); |
04289bb9 | 187 | list_del_counter(counter, ctx); |
01b2838c | 188 | hw_perf_restore(perf_flags); |
0793a61d TG |
189 | |
190 | if (!ctx->task) { | |
191 | /* | |
192 | * Allow more per task counters with respect to the | |
193 | * reservation: | |
194 | */ | |
195 | cpuctx->max_pertask = | |
196 | min(perf_max_counters - ctx->nr_counters, | |
197 | perf_max_counters - perf_reserved_percpu); | |
198 | } | |
199 | ||
849691a6 | 200 | spin_unlock_irqrestore(&ctx->lock, flags); |
0793a61d TG |
201 | } |
202 | ||
203 | ||
204 | /* | |
205 | * Remove the counter from a task's (or a CPU's) list of counters. | |
206 | * | |
d859e29f | 207 | * Must be called with counter->mutex and ctx->mutex held. |
0793a61d TG |
208 | * |
209 | * CPU counters are removed with a smp call. For task counters we only | |
210 | * call when the task is on a CPU. | |
211 | */ | |
04289bb9 | 212 | static void perf_counter_remove_from_context(struct perf_counter *counter) |
0793a61d TG |
213 | { |
214 | struct perf_counter_context *ctx = counter->ctx; | |
215 | struct task_struct *task = ctx->task; | |
216 | ||
217 | if (!task) { | |
218 | /* | |
219 | * Per cpu counters are removed via an smp call and | |
220 | * the removal is always sucessful. | |
221 | */ | |
222 | smp_call_function_single(counter->cpu, | |
04289bb9 | 223 | __perf_counter_remove_from_context, |
0793a61d TG |
224 | counter, 1); |
225 | return; | |
226 | } | |
227 | ||
228 | retry: | |
04289bb9 | 229 | task_oncpu_function_call(task, __perf_counter_remove_from_context, |
0793a61d TG |
230 | counter); |
231 | ||
232 | spin_lock_irq(&ctx->lock); | |
233 | /* | |
234 | * If the context is active we need to retry the smp call. | |
235 | */ | |
04289bb9 | 236 | if (ctx->nr_active && !list_empty(&counter->list_entry)) { |
0793a61d TG |
237 | spin_unlock_irq(&ctx->lock); |
238 | goto retry; | |
239 | } | |
240 | ||
241 | /* | |
242 | * The lock prevents that this context is scheduled in so we | |
04289bb9 | 243 | * can remove the counter safely, if the call above did not |
0793a61d TG |
244 | * succeed. |
245 | */ | |
04289bb9 | 246 | if (!list_empty(&counter->list_entry)) { |
0793a61d | 247 | ctx->nr_counters--; |
04289bb9 | 248 | list_del_counter(counter, ctx); |
0793a61d TG |
249 | counter->task = NULL; |
250 | } | |
251 | spin_unlock_irq(&ctx->lock); | |
252 | } | |
253 | ||
4af4998b | 254 | static inline u64 perf_clock(void) |
53cfbf59 | 255 | { |
4af4998b | 256 | return cpu_clock(smp_processor_id()); |
53cfbf59 PM |
257 | } |
258 | ||
259 | /* | |
260 | * Update the record of the current time in a context. | |
261 | */ | |
4af4998b | 262 | static void update_context_time(struct perf_counter_context *ctx) |
53cfbf59 | 263 | { |
4af4998b PZ |
264 | u64 now = perf_clock(); |
265 | ||
266 | ctx->time += now - ctx->timestamp; | |
267 | ctx->timestamp = now; | |
53cfbf59 PM |
268 | } |
269 | ||
270 | /* | |
271 | * Update the total_time_enabled and total_time_running fields for a counter. | |
272 | */ | |
273 | static void update_counter_times(struct perf_counter *counter) | |
274 | { | |
275 | struct perf_counter_context *ctx = counter->ctx; | |
276 | u64 run_end; | |
277 | ||
4af4998b PZ |
278 | if (counter->state < PERF_COUNTER_STATE_INACTIVE) |
279 | return; | |
280 | ||
281 | counter->total_time_enabled = ctx->time - counter->tstamp_enabled; | |
282 | ||
283 | if (counter->state == PERF_COUNTER_STATE_INACTIVE) | |
284 | run_end = counter->tstamp_stopped; | |
285 | else | |
286 | run_end = ctx->time; | |
287 | ||
288 | counter->total_time_running = run_end - counter->tstamp_running; | |
53cfbf59 PM |
289 | } |
290 | ||
291 | /* | |
292 | * Update total_time_enabled and total_time_running for all counters in a group. | |
293 | */ | |
294 | static void update_group_times(struct perf_counter *leader) | |
295 | { | |
296 | struct perf_counter *counter; | |
297 | ||
298 | update_counter_times(leader); | |
299 | list_for_each_entry(counter, &leader->sibling_list, list_entry) | |
300 | update_counter_times(counter); | |
301 | } | |
302 | ||
d859e29f PM |
303 | /* |
304 | * Cross CPU call to disable a performance counter | |
305 | */ | |
306 | static void __perf_counter_disable(void *info) | |
307 | { | |
308 | struct perf_counter *counter = info; | |
309 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
310 | struct perf_counter_context *ctx = counter->ctx; | |
311 | unsigned long flags; | |
312 | ||
313 | /* | |
314 | * If this is a per-task counter, need to check whether this | |
315 | * counter's task is the current task on this cpu. | |
316 | */ | |
317 | if (ctx->task && cpuctx->task_ctx != ctx) | |
318 | return; | |
319 | ||
849691a6 | 320 | spin_lock_irqsave(&ctx->lock, flags); |
d859e29f PM |
321 | |
322 | /* | |
323 | * If the counter is on, turn it off. | |
324 | * If it is in error state, leave it in error state. | |
325 | */ | |
326 | if (counter->state >= PERF_COUNTER_STATE_INACTIVE) { | |
4af4998b | 327 | update_context_time(ctx); |
53cfbf59 | 328 | update_counter_times(counter); |
d859e29f PM |
329 | if (counter == counter->group_leader) |
330 | group_sched_out(counter, cpuctx, ctx); | |
331 | else | |
332 | counter_sched_out(counter, cpuctx, ctx); | |
333 | counter->state = PERF_COUNTER_STATE_OFF; | |
334 | } | |
335 | ||
849691a6 | 336 | spin_unlock_irqrestore(&ctx->lock, flags); |
d859e29f PM |
337 | } |
338 | ||
339 | /* | |
340 | * Disable a counter. | |
341 | */ | |
342 | static void perf_counter_disable(struct perf_counter *counter) | |
343 | { | |
344 | struct perf_counter_context *ctx = counter->ctx; | |
345 | struct task_struct *task = ctx->task; | |
346 | ||
347 | if (!task) { | |
348 | /* | |
349 | * Disable the counter on the cpu that it's on | |
350 | */ | |
351 | smp_call_function_single(counter->cpu, __perf_counter_disable, | |
352 | counter, 1); | |
353 | return; | |
354 | } | |
355 | ||
356 | retry: | |
357 | task_oncpu_function_call(task, __perf_counter_disable, counter); | |
358 | ||
359 | spin_lock_irq(&ctx->lock); | |
360 | /* | |
361 | * If the counter is still active, we need to retry the cross-call. | |
362 | */ | |
363 | if (counter->state == PERF_COUNTER_STATE_ACTIVE) { | |
364 | spin_unlock_irq(&ctx->lock); | |
365 | goto retry; | |
366 | } | |
367 | ||
368 | /* | |
369 | * Since we have the lock this context can't be scheduled | |
370 | * in, so we can change the state safely. | |
371 | */ | |
53cfbf59 PM |
372 | if (counter->state == PERF_COUNTER_STATE_INACTIVE) { |
373 | update_counter_times(counter); | |
d859e29f | 374 | counter->state = PERF_COUNTER_STATE_OFF; |
53cfbf59 | 375 | } |
d859e29f PM |
376 | |
377 | spin_unlock_irq(&ctx->lock); | |
378 | } | |
379 | ||
380 | /* | |
381 | * Disable a counter and all its children. | |
382 | */ | |
383 | static void perf_counter_disable_family(struct perf_counter *counter) | |
384 | { | |
385 | struct perf_counter *child; | |
386 | ||
387 | perf_counter_disable(counter); | |
388 | ||
389 | /* | |
390 | * Lock the mutex to protect the list of children | |
391 | */ | |
392 | mutex_lock(&counter->mutex); | |
393 | list_for_each_entry(child, &counter->child_list, child_list) | |
394 | perf_counter_disable(child); | |
395 | mutex_unlock(&counter->mutex); | |
396 | } | |
397 | ||
235c7fc7 IM |
398 | static int |
399 | counter_sched_in(struct perf_counter *counter, | |
400 | struct perf_cpu_context *cpuctx, | |
401 | struct perf_counter_context *ctx, | |
402 | int cpu) | |
403 | { | |
3b6f9e5c | 404 | if (counter->state <= PERF_COUNTER_STATE_OFF) |
235c7fc7 IM |
405 | return 0; |
406 | ||
407 | counter->state = PERF_COUNTER_STATE_ACTIVE; | |
408 | counter->oncpu = cpu; /* TODO: put 'cpu' into cpuctx->cpu */ | |
409 | /* | |
410 | * The new state must be visible before we turn it on in the hardware: | |
411 | */ | |
412 | smp_wmb(); | |
413 | ||
414 | if (counter->hw_ops->enable(counter)) { | |
415 | counter->state = PERF_COUNTER_STATE_INACTIVE; | |
416 | counter->oncpu = -1; | |
417 | return -EAGAIN; | |
418 | } | |
419 | ||
4af4998b | 420 | counter->tstamp_running += ctx->time - counter->tstamp_stopped; |
53cfbf59 | 421 | |
3b6f9e5c PM |
422 | if (!is_software_counter(counter)) |
423 | cpuctx->active_oncpu++; | |
235c7fc7 IM |
424 | ctx->nr_active++; |
425 | ||
3b6f9e5c PM |
426 | if (counter->hw_event.exclusive) |
427 | cpuctx->exclusive = 1; | |
428 | ||
235c7fc7 IM |
429 | return 0; |
430 | } | |
431 | ||
3b6f9e5c PM |
432 | /* |
433 | * Return 1 for a group consisting entirely of software counters, | |
434 | * 0 if the group contains any hardware counters. | |
435 | */ | |
436 | static int is_software_only_group(struct perf_counter *leader) | |
437 | { | |
438 | struct perf_counter *counter; | |
439 | ||
440 | if (!is_software_counter(leader)) | |
441 | return 0; | |
5c148194 | 442 | |
3b6f9e5c PM |
443 | list_for_each_entry(counter, &leader->sibling_list, list_entry) |
444 | if (!is_software_counter(counter)) | |
445 | return 0; | |
5c148194 | 446 | |
3b6f9e5c PM |
447 | return 1; |
448 | } | |
449 | ||
450 | /* | |
451 | * Work out whether we can put this counter group on the CPU now. | |
452 | */ | |
453 | static int group_can_go_on(struct perf_counter *counter, | |
454 | struct perf_cpu_context *cpuctx, | |
455 | int can_add_hw) | |
456 | { | |
457 | /* | |
458 | * Groups consisting entirely of software counters can always go on. | |
459 | */ | |
460 | if (is_software_only_group(counter)) | |
461 | return 1; | |
462 | /* | |
463 | * If an exclusive group is already on, no other hardware | |
464 | * counters can go on. | |
465 | */ | |
466 | if (cpuctx->exclusive) | |
467 | return 0; | |
468 | /* | |
469 | * If this group is exclusive and there are already | |
470 | * counters on the CPU, it can't go on. | |
471 | */ | |
472 | if (counter->hw_event.exclusive && cpuctx->active_oncpu) | |
473 | return 0; | |
474 | /* | |
475 | * Otherwise, try to add it if all previous groups were able | |
476 | * to go on. | |
477 | */ | |
478 | return can_add_hw; | |
479 | } | |
480 | ||
53cfbf59 PM |
481 | static void add_counter_to_ctx(struct perf_counter *counter, |
482 | struct perf_counter_context *ctx) | |
483 | { | |
484 | list_add_counter(counter, ctx); | |
485 | ctx->nr_counters++; | |
486 | counter->prev_state = PERF_COUNTER_STATE_OFF; | |
4af4998b PZ |
487 | counter->tstamp_enabled = ctx->time; |
488 | counter->tstamp_running = ctx->time; | |
489 | counter->tstamp_stopped = ctx->time; | |
53cfbf59 PM |
490 | } |
491 | ||
0793a61d | 492 | /* |
235c7fc7 | 493 | * Cross CPU call to install and enable a performance counter |
0793a61d TG |
494 | */ |
495 | static void __perf_install_in_context(void *info) | |
496 | { | |
497 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
498 | struct perf_counter *counter = info; | |
499 | struct perf_counter_context *ctx = counter->ctx; | |
d859e29f | 500 | struct perf_counter *leader = counter->group_leader; |
0793a61d | 501 | int cpu = smp_processor_id(); |
9b51f66d | 502 | unsigned long flags; |
5c92d124 | 503 | u64 perf_flags; |
3b6f9e5c | 504 | int err; |
0793a61d TG |
505 | |
506 | /* | |
507 | * If this is a task context, we need to check whether it is | |
508 | * the current task context of this cpu. If not it has been | |
509 | * scheduled out before the smp call arrived. | |
510 | */ | |
511 | if (ctx->task && cpuctx->task_ctx != ctx) | |
512 | return; | |
513 | ||
849691a6 | 514 | spin_lock_irqsave(&ctx->lock, flags); |
4af4998b | 515 | update_context_time(ctx); |
0793a61d TG |
516 | |
517 | /* | |
518 | * Protect the list operation against NMI by disabling the | |
519 | * counters on a global level. NOP for non NMI based counters. | |
520 | */ | |
01b2838c | 521 | perf_flags = hw_perf_save_disable(); |
0793a61d | 522 | |
53cfbf59 | 523 | add_counter_to_ctx(counter, ctx); |
0793a61d | 524 | |
d859e29f PM |
525 | /* |
526 | * Don't put the counter on if it is disabled or if | |
527 | * it is in a group and the group isn't on. | |
528 | */ | |
529 | if (counter->state != PERF_COUNTER_STATE_INACTIVE || | |
530 | (leader != counter && leader->state != PERF_COUNTER_STATE_ACTIVE)) | |
531 | goto unlock; | |
532 | ||
3b6f9e5c PM |
533 | /* |
534 | * An exclusive counter can't go on if there are already active | |
535 | * hardware counters, and no hardware counter can go on if there | |
536 | * is already an exclusive counter on. | |
537 | */ | |
d859e29f | 538 | if (!group_can_go_on(counter, cpuctx, 1)) |
3b6f9e5c PM |
539 | err = -EEXIST; |
540 | else | |
541 | err = counter_sched_in(counter, cpuctx, ctx, cpu); | |
542 | ||
d859e29f PM |
543 | if (err) { |
544 | /* | |
545 | * This counter couldn't go on. If it is in a group | |
546 | * then we have to pull the whole group off. | |
547 | * If the counter group is pinned then put it in error state. | |
548 | */ | |
549 | if (leader != counter) | |
550 | group_sched_out(leader, cpuctx, ctx); | |
53cfbf59 PM |
551 | if (leader->hw_event.pinned) { |
552 | update_group_times(leader); | |
d859e29f | 553 | leader->state = PERF_COUNTER_STATE_ERROR; |
53cfbf59 | 554 | } |
d859e29f | 555 | } |
0793a61d | 556 | |
3b6f9e5c | 557 | if (!err && !ctx->task && cpuctx->max_pertask) |
0793a61d TG |
558 | cpuctx->max_pertask--; |
559 | ||
d859e29f | 560 | unlock: |
235c7fc7 IM |
561 | hw_perf_restore(perf_flags); |
562 | ||
849691a6 | 563 | spin_unlock_irqrestore(&ctx->lock, flags); |
0793a61d TG |
564 | } |
565 | ||
566 | /* | |
567 | * Attach a performance counter to a context | |
568 | * | |
569 | * First we add the counter to the list with the hardware enable bit | |
570 | * in counter->hw_config cleared. | |
571 | * | |
572 | * If the counter is attached to a task which is on a CPU we use a smp | |
573 | * call to enable it in the task context. The task might have been | |
574 | * scheduled away, but we check this in the smp call again. | |
d859e29f PM |
575 | * |
576 | * Must be called with ctx->mutex held. | |
0793a61d TG |
577 | */ |
578 | static void | |
579 | perf_install_in_context(struct perf_counter_context *ctx, | |
580 | struct perf_counter *counter, | |
581 | int cpu) | |
582 | { | |
583 | struct task_struct *task = ctx->task; | |
584 | ||
0793a61d TG |
585 | if (!task) { |
586 | /* | |
587 | * Per cpu counters are installed via an smp call and | |
588 | * the install is always sucessful. | |
589 | */ | |
590 | smp_call_function_single(cpu, __perf_install_in_context, | |
591 | counter, 1); | |
592 | return; | |
593 | } | |
594 | ||
595 | counter->task = task; | |
596 | retry: | |
597 | task_oncpu_function_call(task, __perf_install_in_context, | |
598 | counter); | |
599 | ||
600 | spin_lock_irq(&ctx->lock); | |
601 | /* | |
0793a61d TG |
602 | * we need to retry the smp call. |
603 | */ | |
d859e29f | 604 | if (ctx->is_active && list_empty(&counter->list_entry)) { |
0793a61d TG |
605 | spin_unlock_irq(&ctx->lock); |
606 | goto retry; | |
607 | } | |
608 | ||
609 | /* | |
610 | * The lock prevents that this context is scheduled in so we | |
611 | * can add the counter safely, if it the call above did not | |
612 | * succeed. | |
613 | */ | |
53cfbf59 PM |
614 | if (list_empty(&counter->list_entry)) |
615 | add_counter_to_ctx(counter, ctx); | |
0793a61d TG |
616 | spin_unlock_irq(&ctx->lock); |
617 | } | |
618 | ||
d859e29f PM |
619 | /* |
620 | * Cross CPU call to enable a performance counter | |
621 | */ | |
622 | static void __perf_counter_enable(void *info) | |
04289bb9 | 623 | { |
d859e29f PM |
624 | struct perf_counter *counter = info; |
625 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
626 | struct perf_counter_context *ctx = counter->ctx; | |
627 | struct perf_counter *leader = counter->group_leader; | |
628 | unsigned long flags; | |
629 | int err; | |
04289bb9 | 630 | |
d859e29f PM |
631 | /* |
632 | * If this is a per-task counter, need to check whether this | |
633 | * counter's task is the current task on this cpu. | |
634 | */ | |
635 | if (ctx->task && cpuctx->task_ctx != ctx) | |
3cbed429 PM |
636 | return; |
637 | ||
849691a6 | 638 | spin_lock_irqsave(&ctx->lock, flags); |
4af4998b | 639 | update_context_time(ctx); |
d859e29f | 640 | |
c07c99b6 | 641 | counter->prev_state = counter->state; |
d859e29f PM |
642 | if (counter->state >= PERF_COUNTER_STATE_INACTIVE) |
643 | goto unlock; | |
644 | counter->state = PERF_COUNTER_STATE_INACTIVE; | |
4af4998b | 645 | counter->tstamp_enabled = ctx->time - counter->total_time_enabled; |
04289bb9 IM |
646 | |
647 | /* | |
d859e29f PM |
648 | * If the counter is in a group and isn't the group leader, |
649 | * then don't put it on unless the group is on. | |
04289bb9 | 650 | */ |
d859e29f PM |
651 | if (leader != counter && leader->state != PERF_COUNTER_STATE_ACTIVE) |
652 | goto unlock; | |
3b6f9e5c | 653 | |
d859e29f PM |
654 | if (!group_can_go_on(counter, cpuctx, 1)) |
655 | err = -EEXIST; | |
656 | else | |
657 | err = counter_sched_in(counter, cpuctx, ctx, | |
658 | smp_processor_id()); | |
659 | ||
660 | if (err) { | |
661 | /* | |
662 | * If this counter can't go on and it's part of a | |
663 | * group, then the whole group has to come off. | |
664 | */ | |
665 | if (leader != counter) | |
666 | group_sched_out(leader, cpuctx, ctx); | |
53cfbf59 PM |
667 | if (leader->hw_event.pinned) { |
668 | update_group_times(leader); | |
d859e29f | 669 | leader->state = PERF_COUNTER_STATE_ERROR; |
53cfbf59 | 670 | } |
d859e29f PM |
671 | } |
672 | ||
673 | unlock: | |
849691a6 | 674 | spin_unlock_irqrestore(&ctx->lock, flags); |
d859e29f PM |
675 | } |
676 | ||
677 | /* | |
678 | * Enable a counter. | |
679 | */ | |
680 | static void perf_counter_enable(struct perf_counter *counter) | |
681 | { | |
682 | struct perf_counter_context *ctx = counter->ctx; | |
683 | struct task_struct *task = ctx->task; | |
684 | ||
685 | if (!task) { | |
686 | /* | |
687 | * Enable the counter on the cpu that it's on | |
688 | */ | |
689 | smp_call_function_single(counter->cpu, __perf_counter_enable, | |
690 | counter, 1); | |
691 | return; | |
692 | } | |
693 | ||
694 | spin_lock_irq(&ctx->lock); | |
695 | if (counter->state >= PERF_COUNTER_STATE_INACTIVE) | |
696 | goto out; | |
697 | ||
698 | /* | |
699 | * If the counter is in error state, clear that first. | |
700 | * That way, if we see the counter in error state below, we | |
701 | * know that it has gone back into error state, as distinct | |
702 | * from the task having been scheduled away before the | |
703 | * cross-call arrived. | |
704 | */ | |
705 | if (counter->state == PERF_COUNTER_STATE_ERROR) | |
706 | counter->state = PERF_COUNTER_STATE_OFF; | |
707 | ||
708 | retry: | |
709 | spin_unlock_irq(&ctx->lock); | |
710 | task_oncpu_function_call(task, __perf_counter_enable, counter); | |
711 | ||
712 | spin_lock_irq(&ctx->lock); | |
713 | ||
714 | /* | |
715 | * If the context is active and the counter is still off, | |
716 | * we need to retry the cross-call. | |
717 | */ | |
718 | if (ctx->is_active && counter->state == PERF_COUNTER_STATE_OFF) | |
719 | goto retry; | |
720 | ||
721 | /* | |
722 | * Since we have the lock this context can't be scheduled | |
723 | * in, so we can change the state safely. | |
724 | */ | |
53cfbf59 | 725 | if (counter->state == PERF_COUNTER_STATE_OFF) { |
d859e29f | 726 | counter->state = PERF_COUNTER_STATE_INACTIVE; |
4af4998b PZ |
727 | counter->tstamp_enabled = |
728 | ctx->time - counter->total_time_enabled; | |
53cfbf59 | 729 | } |
d859e29f PM |
730 | out: |
731 | spin_unlock_irq(&ctx->lock); | |
732 | } | |
733 | ||
79f14641 PZ |
734 | static void perf_counter_refresh(struct perf_counter *counter, int refresh) |
735 | { | |
736 | atomic_add(refresh, &counter->event_limit); | |
737 | perf_counter_enable(counter); | |
738 | } | |
739 | ||
d859e29f PM |
740 | /* |
741 | * Enable a counter and all its children. | |
742 | */ | |
743 | static void perf_counter_enable_family(struct perf_counter *counter) | |
744 | { | |
745 | struct perf_counter *child; | |
746 | ||
747 | perf_counter_enable(counter); | |
748 | ||
749 | /* | |
750 | * Lock the mutex to protect the list of children | |
751 | */ | |
752 | mutex_lock(&counter->mutex); | |
753 | list_for_each_entry(child, &counter->child_list, child_list) | |
754 | perf_counter_enable(child); | |
755 | mutex_unlock(&counter->mutex); | |
04289bb9 IM |
756 | } |
757 | ||
235c7fc7 IM |
758 | void __perf_counter_sched_out(struct perf_counter_context *ctx, |
759 | struct perf_cpu_context *cpuctx) | |
760 | { | |
761 | struct perf_counter *counter; | |
3cbed429 | 762 | u64 flags; |
235c7fc7 | 763 | |
d859e29f PM |
764 | spin_lock(&ctx->lock); |
765 | ctx->is_active = 0; | |
235c7fc7 | 766 | if (likely(!ctx->nr_counters)) |
d859e29f | 767 | goto out; |
4af4998b | 768 | update_context_time(ctx); |
235c7fc7 | 769 | |
3cbed429 | 770 | flags = hw_perf_save_disable(); |
235c7fc7 IM |
771 | if (ctx->nr_active) { |
772 | list_for_each_entry(counter, &ctx->counter_list, list_entry) | |
773 | group_sched_out(counter, cpuctx, ctx); | |
774 | } | |
3cbed429 | 775 | hw_perf_restore(flags); |
d859e29f | 776 | out: |
235c7fc7 IM |
777 | spin_unlock(&ctx->lock); |
778 | } | |
779 | ||
0793a61d TG |
780 | /* |
781 | * Called from scheduler to remove the counters of the current task, | |
782 | * with interrupts disabled. | |
783 | * | |
784 | * We stop each counter and update the counter value in counter->count. | |
785 | * | |
7671581f | 786 | * This does not protect us against NMI, but disable() |
0793a61d TG |
787 | * sets the disabled bit in the control field of counter _before_ |
788 | * accessing the counter control register. If a NMI hits, then it will | |
789 | * not restart the counter. | |
790 | */ | |
791 | void perf_counter_task_sched_out(struct task_struct *task, int cpu) | |
792 | { | |
793 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); | |
794 | struct perf_counter_context *ctx = &task->perf_counter_ctx; | |
4a0deca6 | 795 | struct pt_regs *regs; |
0793a61d TG |
796 | |
797 | if (likely(!cpuctx->task_ctx)) | |
798 | return; | |
799 | ||
bce379bf PZ |
800 | update_context_time(ctx); |
801 | ||
4a0deca6 | 802 | regs = task_pt_regs(task); |
78f13e95 | 803 | perf_swcounter_event(PERF_COUNT_CONTEXT_SWITCHES, 1, 1, regs, 0); |
235c7fc7 IM |
804 | __perf_counter_sched_out(ctx, cpuctx); |
805 | ||
0793a61d TG |
806 | cpuctx->task_ctx = NULL; |
807 | } | |
808 | ||
235c7fc7 | 809 | static void perf_counter_cpu_sched_out(struct perf_cpu_context *cpuctx) |
04289bb9 | 810 | { |
235c7fc7 | 811 | __perf_counter_sched_out(&cpuctx->ctx, cpuctx); |
04289bb9 IM |
812 | } |
813 | ||
7995888f | 814 | static int |
04289bb9 IM |
815 | group_sched_in(struct perf_counter *group_counter, |
816 | struct perf_cpu_context *cpuctx, | |
817 | struct perf_counter_context *ctx, | |
818 | int cpu) | |
819 | { | |
95cdd2e7 | 820 | struct perf_counter *counter, *partial_group; |
3cbed429 PM |
821 | int ret; |
822 | ||
823 | if (group_counter->state == PERF_COUNTER_STATE_OFF) | |
824 | return 0; | |
825 | ||
826 | ret = hw_perf_group_sched_in(group_counter, cpuctx, ctx, cpu); | |
827 | if (ret) | |
828 | return ret < 0 ? ret : 0; | |
04289bb9 | 829 | |
c07c99b6 | 830 | group_counter->prev_state = group_counter->state; |
95cdd2e7 IM |
831 | if (counter_sched_in(group_counter, cpuctx, ctx, cpu)) |
832 | return -EAGAIN; | |
04289bb9 IM |
833 | |
834 | /* | |
835 | * Schedule in siblings as one group (if any): | |
836 | */ | |
7995888f | 837 | list_for_each_entry(counter, &group_counter->sibling_list, list_entry) { |
c07c99b6 | 838 | counter->prev_state = counter->state; |
95cdd2e7 IM |
839 | if (counter_sched_in(counter, cpuctx, ctx, cpu)) { |
840 | partial_group = counter; | |
841 | goto group_error; | |
842 | } | |
95cdd2e7 IM |
843 | } |
844 | ||
3cbed429 | 845 | return 0; |
95cdd2e7 IM |
846 | |
847 | group_error: | |
848 | /* | |
849 | * Groups can be scheduled in as one unit only, so undo any | |
850 | * partial group before returning: | |
851 | */ | |
852 | list_for_each_entry(counter, &group_counter->sibling_list, list_entry) { | |
853 | if (counter == partial_group) | |
854 | break; | |
855 | counter_sched_out(counter, cpuctx, ctx); | |
7995888f | 856 | } |
95cdd2e7 | 857 | counter_sched_out(group_counter, cpuctx, ctx); |
7995888f | 858 | |
95cdd2e7 | 859 | return -EAGAIN; |
04289bb9 IM |
860 | } |
861 | ||
235c7fc7 IM |
862 | static void |
863 | __perf_counter_sched_in(struct perf_counter_context *ctx, | |
864 | struct perf_cpu_context *cpuctx, int cpu) | |
0793a61d | 865 | { |
0793a61d | 866 | struct perf_counter *counter; |
3cbed429 | 867 | u64 flags; |
dd0e6ba2 | 868 | int can_add_hw = 1; |
0793a61d | 869 | |
d859e29f PM |
870 | spin_lock(&ctx->lock); |
871 | ctx->is_active = 1; | |
0793a61d | 872 | if (likely(!ctx->nr_counters)) |
d859e29f | 873 | goto out; |
0793a61d | 874 | |
4af4998b | 875 | ctx->timestamp = perf_clock(); |
53cfbf59 | 876 | |
3cbed429 | 877 | flags = hw_perf_save_disable(); |
3b6f9e5c PM |
878 | |
879 | /* | |
880 | * First go through the list and put on any pinned groups | |
881 | * in order to give them the best chance of going on. | |
882 | */ | |
883 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { | |
884 | if (counter->state <= PERF_COUNTER_STATE_OFF || | |
885 | !counter->hw_event.pinned) | |
886 | continue; | |
887 | if (counter->cpu != -1 && counter->cpu != cpu) | |
888 | continue; | |
889 | ||
890 | if (group_can_go_on(counter, cpuctx, 1)) | |
891 | group_sched_in(counter, cpuctx, ctx, cpu); | |
892 | ||
893 | /* | |
894 | * If this pinned group hasn't been scheduled, | |
895 | * put it in error state. | |
896 | */ | |
53cfbf59 PM |
897 | if (counter->state == PERF_COUNTER_STATE_INACTIVE) { |
898 | update_group_times(counter); | |
3b6f9e5c | 899 | counter->state = PERF_COUNTER_STATE_ERROR; |
53cfbf59 | 900 | } |
3b6f9e5c PM |
901 | } |
902 | ||
04289bb9 | 903 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { |
3b6f9e5c PM |
904 | /* |
905 | * Ignore counters in OFF or ERROR state, and | |
906 | * ignore pinned counters since we did them already. | |
907 | */ | |
908 | if (counter->state <= PERF_COUNTER_STATE_OFF || | |
909 | counter->hw_event.pinned) | |
910 | continue; | |
911 | ||
04289bb9 IM |
912 | /* |
913 | * Listen to the 'cpu' scheduling filter constraint | |
914 | * of counters: | |
915 | */ | |
0793a61d TG |
916 | if (counter->cpu != -1 && counter->cpu != cpu) |
917 | continue; | |
918 | ||
3b6f9e5c | 919 | if (group_can_go_on(counter, cpuctx, can_add_hw)) { |
dd0e6ba2 PM |
920 | if (group_sched_in(counter, cpuctx, ctx, cpu)) |
921 | can_add_hw = 0; | |
3b6f9e5c | 922 | } |
0793a61d | 923 | } |
3cbed429 | 924 | hw_perf_restore(flags); |
d859e29f | 925 | out: |
0793a61d | 926 | spin_unlock(&ctx->lock); |
235c7fc7 IM |
927 | } |
928 | ||
929 | /* | |
930 | * Called from scheduler to add the counters of the current task | |
931 | * with interrupts disabled. | |
932 | * | |
933 | * We restore the counter value and then enable it. | |
934 | * | |
935 | * This does not protect us against NMI, but enable() | |
936 | * sets the enabled bit in the control field of counter _before_ | |
937 | * accessing the counter control register. If a NMI hits, then it will | |
938 | * keep the counter running. | |
939 | */ | |
940 | void perf_counter_task_sched_in(struct task_struct *task, int cpu) | |
941 | { | |
942 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); | |
943 | struct perf_counter_context *ctx = &task->perf_counter_ctx; | |
04289bb9 | 944 | |
235c7fc7 | 945 | __perf_counter_sched_in(ctx, cpuctx, cpu); |
0793a61d TG |
946 | cpuctx->task_ctx = ctx; |
947 | } | |
948 | ||
235c7fc7 IM |
949 | static void perf_counter_cpu_sched_in(struct perf_cpu_context *cpuctx, int cpu) |
950 | { | |
951 | struct perf_counter_context *ctx = &cpuctx->ctx; | |
952 | ||
953 | __perf_counter_sched_in(ctx, cpuctx, cpu); | |
954 | } | |
955 | ||
1d1c7ddb IM |
956 | int perf_counter_task_disable(void) |
957 | { | |
958 | struct task_struct *curr = current; | |
959 | struct perf_counter_context *ctx = &curr->perf_counter_ctx; | |
960 | struct perf_counter *counter; | |
aa9c4c0f | 961 | unsigned long flags; |
1d1c7ddb IM |
962 | u64 perf_flags; |
963 | int cpu; | |
964 | ||
965 | if (likely(!ctx->nr_counters)) | |
966 | return 0; | |
967 | ||
849691a6 | 968 | local_irq_save(flags); |
1d1c7ddb IM |
969 | cpu = smp_processor_id(); |
970 | ||
971 | perf_counter_task_sched_out(curr, cpu); | |
972 | ||
973 | spin_lock(&ctx->lock); | |
974 | ||
975 | /* | |
976 | * Disable all the counters: | |
977 | */ | |
978 | perf_flags = hw_perf_save_disable(); | |
979 | ||
3b6f9e5c | 980 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { |
53cfbf59 PM |
981 | if (counter->state != PERF_COUNTER_STATE_ERROR) { |
982 | update_group_times(counter); | |
3b6f9e5c | 983 | counter->state = PERF_COUNTER_STATE_OFF; |
53cfbf59 | 984 | } |
3b6f9e5c | 985 | } |
9b51f66d | 986 | |
1d1c7ddb IM |
987 | hw_perf_restore(perf_flags); |
988 | ||
849691a6 | 989 | spin_unlock_irqrestore(&ctx->lock, flags); |
1d1c7ddb IM |
990 | |
991 | return 0; | |
992 | } | |
993 | ||
994 | int perf_counter_task_enable(void) | |
995 | { | |
996 | struct task_struct *curr = current; | |
997 | struct perf_counter_context *ctx = &curr->perf_counter_ctx; | |
998 | struct perf_counter *counter; | |
aa9c4c0f | 999 | unsigned long flags; |
1d1c7ddb IM |
1000 | u64 perf_flags; |
1001 | int cpu; | |
1002 | ||
1003 | if (likely(!ctx->nr_counters)) | |
1004 | return 0; | |
1005 | ||
849691a6 | 1006 | local_irq_save(flags); |
1d1c7ddb IM |
1007 | cpu = smp_processor_id(); |
1008 | ||
235c7fc7 IM |
1009 | perf_counter_task_sched_out(curr, cpu); |
1010 | ||
1d1c7ddb IM |
1011 | spin_lock(&ctx->lock); |
1012 | ||
1013 | /* | |
1014 | * Disable all the counters: | |
1015 | */ | |
1016 | perf_flags = hw_perf_save_disable(); | |
1017 | ||
1018 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { | |
3b6f9e5c | 1019 | if (counter->state > PERF_COUNTER_STATE_OFF) |
1d1c7ddb | 1020 | continue; |
6a930700 | 1021 | counter->state = PERF_COUNTER_STATE_INACTIVE; |
4af4998b PZ |
1022 | counter->tstamp_enabled = |
1023 | ctx->time - counter->total_time_enabled; | |
aa9c4c0f | 1024 | counter->hw_event.disabled = 0; |
1d1c7ddb IM |
1025 | } |
1026 | hw_perf_restore(perf_flags); | |
1027 | ||
1028 | spin_unlock(&ctx->lock); | |
1029 | ||
1030 | perf_counter_task_sched_in(curr, cpu); | |
1031 | ||
849691a6 | 1032 | local_irq_restore(flags); |
1d1c7ddb IM |
1033 | |
1034 | return 0; | |
1035 | } | |
1036 | ||
235c7fc7 IM |
1037 | /* |
1038 | * Round-robin a context's counters: | |
1039 | */ | |
1040 | static void rotate_ctx(struct perf_counter_context *ctx) | |
0793a61d | 1041 | { |
0793a61d | 1042 | struct perf_counter *counter; |
5c92d124 | 1043 | u64 perf_flags; |
0793a61d | 1044 | |
235c7fc7 | 1045 | if (!ctx->nr_counters) |
0793a61d TG |
1046 | return; |
1047 | ||
0793a61d | 1048 | spin_lock(&ctx->lock); |
0793a61d | 1049 | /* |
04289bb9 | 1050 | * Rotate the first entry last (works just fine for group counters too): |
0793a61d | 1051 | */ |
01b2838c | 1052 | perf_flags = hw_perf_save_disable(); |
04289bb9 | 1053 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { |
75564232 | 1054 | list_move_tail(&counter->list_entry, &ctx->counter_list); |
0793a61d TG |
1055 | break; |
1056 | } | |
01b2838c | 1057 | hw_perf_restore(perf_flags); |
0793a61d TG |
1058 | |
1059 | spin_unlock(&ctx->lock); | |
235c7fc7 IM |
1060 | } |
1061 | ||
1062 | void perf_counter_task_tick(struct task_struct *curr, int cpu) | |
1063 | { | |
1064 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); | |
1065 | struct perf_counter_context *ctx = &curr->perf_counter_ctx; | |
1066 | const int rotate_percpu = 0; | |
1067 | ||
1068 | if (rotate_percpu) | |
1069 | perf_counter_cpu_sched_out(cpuctx); | |
1070 | perf_counter_task_sched_out(curr, cpu); | |
0793a61d | 1071 | |
235c7fc7 IM |
1072 | if (rotate_percpu) |
1073 | rotate_ctx(&cpuctx->ctx); | |
1074 | rotate_ctx(ctx); | |
1075 | ||
1076 | if (rotate_percpu) | |
1077 | perf_counter_cpu_sched_in(cpuctx, cpu); | |
0793a61d TG |
1078 | perf_counter_task_sched_in(curr, cpu); |
1079 | } | |
1080 | ||
0793a61d TG |
1081 | /* |
1082 | * Cross CPU call to read the hardware counter | |
1083 | */ | |
7671581f | 1084 | static void __read(void *info) |
0793a61d | 1085 | { |
621a01ea | 1086 | struct perf_counter *counter = info; |
53cfbf59 | 1087 | struct perf_counter_context *ctx = counter->ctx; |
aa9c4c0f | 1088 | unsigned long flags; |
621a01ea | 1089 | |
849691a6 | 1090 | local_irq_save(flags); |
53cfbf59 | 1091 | if (ctx->is_active) |
4af4998b | 1092 | update_context_time(ctx); |
7671581f | 1093 | counter->hw_ops->read(counter); |
53cfbf59 | 1094 | update_counter_times(counter); |
849691a6 | 1095 | local_irq_restore(flags); |
0793a61d TG |
1096 | } |
1097 | ||
04289bb9 | 1098 | static u64 perf_counter_read(struct perf_counter *counter) |
0793a61d TG |
1099 | { |
1100 | /* | |
1101 | * If counter is enabled and currently active on a CPU, update the | |
1102 | * value in the counter structure: | |
1103 | */ | |
6a930700 | 1104 | if (counter->state == PERF_COUNTER_STATE_ACTIVE) { |
0793a61d | 1105 | smp_call_function_single(counter->oncpu, |
7671581f | 1106 | __read, counter, 1); |
53cfbf59 PM |
1107 | } else if (counter->state == PERF_COUNTER_STATE_INACTIVE) { |
1108 | update_counter_times(counter); | |
0793a61d TG |
1109 | } |
1110 | ||
ee06094f | 1111 | return atomic64_read(&counter->count); |
0793a61d TG |
1112 | } |
1113 | ||
0793a61d TG |
1114 | static void put_context(struct perf_counter_context *ctx) |
1115 | { | |
1116 | if (ctx->task) | |
1117 | put_task_struct(ctx->task); | |
1118 | } | |
1119 | ||
1120 | static struct perf_counter_context *find_get_context(pid_t pid, int cpu) | |
1121 | { | |
1122 | struct perf_cpu_context *cpuctx; | |
1123 | struct perf_counter_context *ctx; | |
1124 | struct task_struct *task; | |
1125 | ||
1126 | /* | |
1127 | * If cpu is not a wildcard then this is a percpu counter: | |
1128 | */ | |
1129 | if (cpu != -1) { | |
1130 | /* Must be root to operate on a CPU counter: */ | |
1131 | if (!capable(CAP_SYS_ADMIN)) | |
1132 | return ERR_PTR(-EACCES); | |
1133 | ||
1134 | if (cpu < 0 || cpu > num_possible_cpus()) | |
1135 | return ERR_PTR(-EINVAL); | |
1136 | ||
1137 | /* | |
1138 | * We could be clever and allow to attach a counter to an | |
1139 | * offline CPU and activate it when the CPU comes up, but | |
1140 | * that's for later. | |
1141 | */ | |
1142 | if (!cpu_isset(cpu, cpu_online_map)) | |
1143 | return ERR_PTR(-ENODEV); | |
1144 | ||
1145 | cpuctx = &per_cpu(perf_cpu_context, cpu); | |
1146 | ctx = &cpuctx->ctx; | |
1147 | ||
0793a61d TG |
1148 | return ctx; |
1149 | } | |
1150 | ||
1151 | rcu_read_lock(); | |
1152 | if (!pid) | |
1153 | task = current; | |
1154 | else | |
1155 | task = find_task_by_vpid(pid); | |
1156 | if (task) | |
1157 | get_task_struct(task); | |
1158 | rcu_read_unlock(); | |
1159 | ||
1160 | if (!task) | |
1161 | return ERR_PTR(-ESRCH); | |
1162 | ||
1163 | ctx = &task->perf_counter_ctx; | |
1164 | ctx->task = task; | |
1165 | ||
1166 | /* Reuse ptrace permission checks for now. */ | |
1167 | if (!ptrace_may_access(task, PTRACE_MODE_READ)) { | |
1168 | put_context(ctx); | |
1169 | return ERR_PTR(-EACCES); | |
1170 | } | |
1171 | ||
1172 | return ctx; | |
1173 | } | |
1174 | ||
592903cd PZ |
1175 | static void free_counter_rcu(struct rcu_head *head) |
1176 | { | |
1177 | struct perf_counter *counter; | |
1178 | ||
1179 | counter = container_of(head, struct perf_counter, rcu_head); | |
1180 | kfree(counter); | |
1181 | } | |
1182 | ||
925d519a PZ |
1183 | static void perf_pending_sync(struct perf_counter *counter); |
1184 | ||
f1600952 PZ |
1185 | static void free_counter(struct perf_counter *counter) |
1186 | { | |
925d519a PZ |
1187 | perf_pending_sync(counter); |
1188 | ||
e077df4f PZ |
1189 | if (counter->destroy) |
1190 | counter->destroy(counter); | |
1191 | ||
f1600952 PZ |
1192 | call_rcu(&counter->rcu_head, free_counter_rcu); |
1193 | } | |
1194 | ||
0793a61d TG |
1195 | /* |
1196 | * Called when the last reference to the file is gone. | |
1197 | */ | |
1198 | static int perf_release(struct inode *inode, struct file *file) | |
1199 | { | |
1200 | struct perf_counter *counter = file->private_data; | |
1201 | struct perf_counter_context *ctx = counter->ctx; | |
1202 | ||
1203 | file->private_data = NULL; | |
1204 | ||
d859e29f | 1205 | mutex_lock(&ctx->mutex); |
0793a61d TG |
1206 | mutex_lock(&counter->mutex); |
1207 | ||
04289bb9 | 1208 | perf_counter_remove_from_context(counter); |
0793a61d TG |
1209 | |
1210 | mutex_unlock(&counter->mutex); | |
d859e29f | 1211 | mutex_unlock(&ctx->mutex); |
0793a61d | 1212 | |
f1600952 | 1213 | free_counter(counter); |
5af75917 | 1214 | put_context(ctx); |
0793a61d TG |
1215 | |
1216 | return 0; | |
1217 | } | |
1218 | ||
1219 | /* | |
1220 | * Read the performance counter - simple non blocking version for now | |
1221 | */ | |
1222 | static ssize_t | |
1223 | perf_read_hw(struct perf_counter *counter, char __user *buf, size_t count) | |
1224 | { | |
53cfbf59 PM |
1225 | u64 values[3]; |
1226 | int n; | |
0793a61d | 1227 | |
3b6f9e5c PM |
1228 | /* |
1229 | * Return end-of-file for a read on a counter that is in | |
1230 | * error state (i.e. because it was pinned but it couldn't be | |
1231 | * scheduled on to the CPU at some point). | |
1232 | */ | |
1233 | if (counter->state == PERF_COUNTER_STATE_ERROR) | |
1234 | return 0; | |
1235 | ||
0793a61d | 1236 | mutex_lock(&counter->mutex); |
53cfbf59 PM |
1237 | values[0] = perf_counter_read(counter); |
1238 | n = 1; | |
1239 | if (counter->hw_event.read_format & PERF_FORMAT_TOTAL_TIME_ENABLED) | |
1240 | values[n++] = counter->total_time_enabled + | |
1241 | atomic64_read(&counter->child_total_time_enabled); | |
1242 | if (counter->hw_event.read_format & PERF_FORMAT_TOTAL_TIME_RUNNING) | |
1243 | values[n++] = counter->total_time_running + | |
1244 | atomic64_read(&counter->child_total_time_running); | |
0793a61d TG |
1245 | mutex_unlock(&counter->mutex); |
1246 | ||
53cfbf59 PM |
1247 | if (count < n * sizeof(u64)) |
1248 | return -EINVAL; | |
1249 | count = n * sizeof(u64); | |
1250 | ||
1251 | if (copy_to_user(buf, values, count)) | |
1252 | return -EFAULT; | |
1253 | ||
1254 | return count; | |
0793a61d TG |
1255 | } |
1256 | ||
0793a61d TG |
1257 | static ssize_t |
1258 | perf_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) | |
1259 | { | |
1260 | struct perf_counter *counter = file->private_data; | |
1261 | ||
7b732a75 | 1262 | return perf_read_hw(counter, buf, count); |
0793a61d TG |
1263 | } |
1264 | ||
1265 | static unsigned int perf_poll(struct file *file, poll_table *wait) | |
1266 | { | |
1267 | struct perf_counter *counter = file->private_data; | |
c7138f37 PZ |
1268 | struct perf_mmap_data *data; |
1269 | unsigned int events; | |
1270 | ||
1271 | rcu_read_lock(); | |
1272 | data = rcu_dereference(counter->data); | |
1273 | if (data) | |
1274 | events = atomic_xchg(&data->wakeup, 0); | |
1275 | else | |
1276 | events = POLL_HUP; | |
1277 | rcu_read_unlock(); | |
0793a61d TG |
1278 | |
1279 | poll_wait(file, &counter->waitq, wait); | |
1280 | ||
0793a61d TG |
1281 | return events; |
1282 | } | |
1283 | ||
d859e29f PM |
1284 | static long perf_ioctl(struct file *file, unsigned int cmd, unsigned long arg) |
1285 | { | |
1286 | struct perf_counter *counter = file->private_data; | |
1287 | int err = 0; | |
1288 | ||
1289 | switch (cmd) { | |
1290 | case PERF_COUNTER_IOC_ENABLE: | |
1291 | perf_counter_enable_family(counter); | |
1292 | break; | |
1293 | case PERF_COUNTER_IOC_DISABLE: | |
1294 | perf_counter_disable_family(counter); | |
1295 | break; | |
79f14641 PZ |
1296 | case PERF_COUNTER_IOC_REFRESH: |
1297 | perf_counter_refresh(counter, arg); | |
1298 | break; | |
d859e29f PM |
1299 | default: |
1300 | err = -ENOTTY; | |
1301 | } | |
1302 | return err; | |
1303 | } | |
1304 | ||
38ff667b PZ |
1305 | /* |
1306 | * Callers need to ensure there can be no nesting of this function, otherwise | |
1307 | * the seqlock logic goes bad. We can not serialize this because the arch | |
1308 | * code calls this from NMI context. | |
1309 | */ | |
1310 | void perf_counter_update_userpage(struct perf_counter *counter) | |
37d81828 | 1311 | { |
38ff667b PZ |
1312 | struct perf_mmap_data *data; |
1313 | struct perf_counter_mmap_page *userpg; | |
1314 | ||
1315 | rcu_read_lock(); | |
1316 | data = rcu_dereference(counter->data); | |
1317 | if (!data) | |
1318 | goto unlock; | |
1319 | ||
1320 | userpg = data->user_page; | |
37d81828 | 1321 | |
7b732a75 PZ |
1322 | /* |
1323 | * Disable preemption so as to not let the corresponding user-space | |
1324 | * spin too long if we get preempted. | |
1325 | */ | |
1326 | preempt_disable(); | |
37d81828 | 1327 | ++userpg->lock; |
92f22a38 | 1328 | barrier(); |
37d81828 PM |
1329 | userpg->index = counter->hw.idx; |
1330 | userpg->offset = atomic64_read(&counter->count); | |
1331 | if (counter->state == PERF_COUNTER_STATE_ACTIVE) | |
1332 | userpg->offset -= atomic64_read(&counter->hw.prev_count); | |
7b732a75 | 1333 | |
92f22a38 | 1334 | barrier(); |
37d81828 | 1335 | ++userpg->lock; |
7b732a75 | 1336 | preempt_enable(); |
38ff667b | 1337 | unlock: |
7b732a75 | 1338 | rcu_read_unlock(); |
37d81828 PM |
1339 | } |
1340 | ||
1341 | static int perf_mmap_fault(struct vm_area_struct *vma, struct vm_fault *vmf) | |
1342 | { | |
1343 | struct perf_counter *counter = vma->vm_file->private_data; | |
7b732a75 PZ |
1344 | struct perf_mmap_data *data; |
1345 | int ret = VM_FAULT_SIGBUS; | |
1346 | ||
1347 | rcu_read_lock(); | |
1348 | data = rcu_dereference(counter->data); | |
1349 | if (!data) | |
1350 | goto unlock; | |
1351 | ||
1352 | if (vmf->pgoff == 0) { | |
1353 | vmf->page = virt_to_page(data->user_page); | |
1354 | } else { | |
1355 | int nr = vmf->pgoff - 1; | |
37d81828 | 1356 | |
7b732a75 PZ |
1357 | if ((unsigned)nr > data->nr_pages) |
1358 | goto unlock; | |
37d81828 | 1359 | |
7b732a75 PZ |
1360 | vmf->page = virt_to_page(data->data_pages[nr]); |
1361 | } | |
37d81828 | 1362 | get_page(vmf->page); |
7b732a75 PZ |
1363 | ret = 0; |
1364 | unlock: | |
1365 | rcu_read_unlock(); | |
1366 | ||
1367 | return ret; | |
1368 | } | |
1369 | ||
1370 | static int perf_mmap_data_alloc(struct perf_counter *counter, int nr_pages) | |
1371 | { | |
1372 | struct perf_mmap_data *data; | |
1373 | unsigned long size; | |
1374 | int i; | |
1375 | ||
1376 | WARN_ON(atomic_read(&counter->mmap_count)); | |
1377 | ||
1378 | size = sizeof(struct perf_mmap_data); | |
1379 | size += nr_pages * sizeof(void *); | |
1380 | ||
1381 | data = kzalloc(size, GFP_KERNEL); | |
1382 | if (!data) | |
1383 | goto fail; | |
1384 | ||
1385 | data->user_page = (void *)get_zeroed_page(GFP_KERNEL); | |
1386 | if (!data->user_page) | |
1387 | goto fail_user_page; | |
1388 | ||
1389 | for (i = 0; i < nr_pages; i++) { | |
1390 | data->data_pages[i] = (void *)get_zeroed_page(GFP_KERNEL); | |
1391 | if (!data->data_pages[i]) | |
1392 | goto fail_data_pages; | |
1393 | } | |
1394 | ||
1395 | data->nr_pages = nr_pages; | |
1396 | ||
1397 | rcu_assign_pointer(counter->data, data); | |
1398 | ||
37d81828 | 1399 | return 0; |
7b732a75 PZ |
1400 | |
1401 | fail_data_pages: | |
1402 | for (i--; i >= 0; i--) | |
1403 | free_page((unsigned long)data->data_pages[i]); | |
1404 | ||
1405 | free_page((unsigned long)data->user_page); | |
1406 | ||
1407 | fail_user_page: | |
1408 | kfree(data); | |
1409 | ||
1410 | fail: | |
1411 | return -ENOMEM; | |
1412 | } | |
1413 | ||
1414 | static void __perf_mmap_data_free(struct rcu_head *rcu_head) | |
1415 | { | |
1416 | struct perf_mmap_data *data = container_of(rcu_head, | |
1417 | struct perf_mmap_data, rcu_head); | |
1418 | int i; | |
1419 | ||
1420 | free_page((unsigned long)data->user_page); | |
1421 | for (i = 0; i < data->nr_pages; i++) | |
1422 | free_page((unsigned long)data->data_pages[i]); | |
1423 | kfree(data); | |
1424 | } | |
1425 | ||
1426 | static void perf_mmap_data_free(struct perf_counter *counter) | |
1427 | { | |
1428 | struct perf_mmap_data *data = counter->data; | |
1429 | ||
1430 | WARN_ON(atomic_read(&counter->mmap_count)); | |
1431 | ||
1432 | rcu_assign_pointer(counter->data, NULL); | |
1433 | call_rcu(&data->rcu_head, __perf_mmap_data_free); | |
1434 | } | |
1435 | ||
1436 | static void perf_mmap_open(struct vm_area_struct *vma) | |
1437 | { | |
1438 | struct perf_counter *counter = vma->vm_file->private_data; | |
1439 | ||
1440 | atomic_inc(&counter->mmap_count); | |
1441 | } | |
1442 | ||
1443 | static void perf_mmap_close(struct vm_area_struct *vma) | |
1444 | { | |
1445 | struct perf_counter *counter = vma->vm_file->private_data; | |
1446 | ||
1447 | if (atomic_dec_and_mutex_lock(&counter->mmap_count, | |
1448 | &counter->mmap_mutex)) { | |
ebb3c4c4 | 1449 | vma->vm_mm->locked_vm -= counter->data->nr_pages + 1; |
7b732a75 PZ |
1450 | perf_mmap_data_free(counter); |
1451 | mutex_unlock(&counter->mmap_mutex); | |
1452 | } | |
37d81828 PM |
1453 | } |
1454 | ||
1455 | static struct vm_operations_struct perf_mmap_vmops = { | |
ebb3c4c4 | 1456 | .open = perf_mmap_open, |
7b732a75 | 1457 | .close = perf_mmap_close, |
37d81828 PM |
1458 | .fault = perf_mmap_fault, |
1459 | }; | |
1460 | ||
1461 | static int perf_mmap(struct file *file, struct vm_area_struct *vma) | |
1462 | { | |
1463 | struct perf_counter *counter = file->private_data; | |
7b732a75 PZ |
1464 | unsigned long vma_size; |
1465 | unsigned long nr_pages; | |
1466 | unsigned long locked, lock_limit; | |
1467 | int ret = 0; | |
37d81828 PM |
1468 | |
1469 | if (!(vma->vm_flags & VM_SHARED) || (vma->vm_flags & VM_WRITE)) | |
1470 | return -EINVAL; | |
7b732a75 PZ |
1471 | |
1472 | vma_size = vma->vm_end - vma->vm_start; | |
1473 | nr_pages = (vma_size / PAGE_SIZE) - 1; | |
1474 | ||
7730d865 PZ |
1475 | /* |
1476 | * If we have data pages ensure they're a power-of-two number, so we | |
1477 | * can do bitmasks instead of modulo. | |
1478 | */ | |
1479 | if (nr_pages != 0 && !is_power_of_2(nr_pages)) | |
37d81828 PM |
1480 | return -EINVAL; |
1481 | ||
7b732a75 | 1482 | if (vma_size != PAGE_SIZE * (1 + nr_pages)) |
37d81828 PM |
1483 | return -EINVAL; |
1484 | ||
7b732a75 PZ |
1485 | if (vma->vm_pgoff != 0) |
1486 | return -EINVAL; | |
37d81828 | 1487 | |
ebb3c4c4 PZ |
1488 | mutex_lock(&counter->mmap_mutex); |
1489 | if (atomic_inc_not_zero(&counter->mmap_count)) { | |
1490 | if (nr_pages != counter->data->nr_pages) | |
1491 | ret = -EINVAL; | |
1492 | goto unlock; | |
1493 | } | |
1494 | ||
1495 | locked = vma->vm_mm->locked_vm; | |
1496 | locked += nr_pages + 1; | |
7b732a75 PZ |
1497 | |
1498 | lock_limit = current->signal->rlim[RLIMIT_MEMLOCK].rlim_cur; | |
1499 | lock_limit >>= PAGE_SHIFT; | |
1500 | ||
ebb3c4c4 PZ |
1501 | if ((locked > lock_limit) && !capable(CAP_IPC_LOCK)) { |
1502 | ret = -EPERM; | |
1503 | goto unlock; | |
1504 | } | |
7b732a75 PZ |
1505 | |
1506 | WARN_ON(counter->data); | |
1507 | ret = perf_mmap_data_alloc(counter, nr_pages); | |
ebb3c4c4 PZ |
1508 | if (ret) |
1509 | goto unlock; | |
1510 | ||
1511 | atomic_set(&counter->mmap_count, 1); | |
1512 | vma->vm_mm->locked_vm += nr_pages + 1; | |
1513 | unlock: | |
7b732a75 | 1514 | mutex_unlock(&counter->mmap_mutex); |
37d81828 PM |
1515 | |
1516 | vma->vm_flags &= ~VM_MAYWRITE; | |
1517 | vma->vm_flags |= VM_RESERVED; | |
1518 | vma->vm_ops = &perf_mmap_vmops; | |
7b732a75 PZ |
1519 | |
1520 | return ret; | |
37d81828 PM |
1521 | } |
1522 | ||
3c446b3d PZ |
1523 | static int perf_fasync(int fd, struct file *filp, int on) |
1524 | { | |
1525 | struct perf_counter *counter = filp->private_data; | |
1526 | struct inode *inode = filp->f_path.dentry->d_inode; | |
1527 | int retval; | |
1528 | ||
1529 | mutex_lock(&inode->i_mutex); | |
1530 | retval = fasync_helper(fd, filp, on, &counter->fasync); | |
1531 | mutex_unlock(&inode->i_mutex); | |
1532 | ||
1533 | if (retval < 0) | |
1534 | return retval; | |
1535 | ||
1536 | return 0; | |
1537 | } | |
1538 | ||
0793a61d TG |
1539 | static const struct file_operations perf_fops = { |
1540 | .release = perf_release, | |
1541 | .read = perf_read, | |
1542 | .poll = perf_poll, | |
d859e29f PM |
1543 | .unlocked_ioctl = perf_ioctl, |
1544 | .compat_ioctl = perf_ioctl, | |
37d81828 | 1545 | .mmap = perf_mmap, |
3c446b3d | 1546 | .fasync = perf_fasync, |
0793a61d TG |
1547 | }; |
1548 | ||
925d519a PZ |
1549 | /* |
1550 | * Perf counter wakeup | |
1551 | * | |
1552 | * If there's data, ensure we set the poll() state and publish everything | |
1553 | * to user-space before waking everybody up. | |
1554 | */ | |
1555 | ||
1556 | void perf_counter_wakeup(struct perf_counter *counter) | |
1557 | { | |
1558 | struct perf_mmap_data *data; | |
1559 | ||
1560 | rcu_read_lock(); | |
1561 | data = rcu_dereference(counter->data); | |
1562 | if (data) { | |
3c446b3d | 1563 | atomic_set(&data->wakeup, POLL_IN); |
38ff667b PZ |
1564 | /* |
1565 | * Ensure all data writes are issued before updating the | |
1566 | * user-space data head information. The matching rmb() | |
1567 | * will be in userspace after reading this value. | |
1568 | */ | |
1569 | smp_wmb(); | |
1570 | data->user_page->data_head = atomic_read(&data->head); | |
925d519a PZ |
1571 | } |
1572 | rcu_read_unlock(); | |
1573 | ||
1574 | wake_up_all(&counter->waitq); | |
4c9e2542 PZ |
1575 | |
1576 | if (counter->pending_kill) { | |
1577 | kill_fasync(&counter->fasync, SIGIO, counter->pending_kill); | |
1578 | counter->pending_kill = 0; | |
1579 | } | |
925d519a PZ |
1580 | } |
1581 | ||
1582 | /* | |
1583 | * Pending wakeups | |
1584 | * | |
1585 | * Handle the case where we need to wakeup up from NMI (or rq->lock) context. | |
1586 | * | |
1587 | * The NMI bit means we cannot possibly take locks. Therefore, maintain a | |
1588 | * single linked list and use cmpxchg() to add entries lockless. | |
1589 | */ | |
1590 | ||
79f14641 PZ |
1591 | static void perf_pending_counter(struct perf_pending_entry *entry) |
1592 | { | |
1593 | struct perf_counter *counter = container_of(entry, | |
1594 | struct perf_counter, pending); | |
1595 | ||
1596 | if (counter->pending_disable) { | |
1597 | counter->pending_disable = 0; | |
1598 | perf_counter_disable(counter); | |
1599 | } | |
1600 | ||
1601 | if (counter->pending_wakeup) { | |
1602 | counter->pending_wakeup = 0; | |
1603 | perf_counter_wakeup(counter); | |
1604 | } | |
1605 | } | |
1606 | ||
671dec5d | 1607 | #define PENDING_TAIL ((struct perf_pending_entry *)-1UL) |
925d519a | 1608 | |
671dec5d | 1609 | static DEFINE_PER_CPU(struct perf_pending_entry *, perf_pending_head) = { |
925d519a PZ |
1610 | PENDING_TAIL, |
1611 | }; | |
1612 | ||
671dec5d PZ |
1613 | static void perf_pending_queue(struct perf_pending_entry *entry, |
1614 | void (*func)(struct perf_pending_entry *)) | |
925d519a | 1615 | { |
671dec5d | 1616 | struct perf_pending_entry **head; |
925d519a | 1617 | |
671dec5d | 1618 | if (cmpxchg(&entry->next, NULL, PENDING_TAIL) != NULL) |
925d519a PZ |
1619 | return; |
1620 | ||
671dec5d PZ |
1621 | entry->func = func; |
1622 | ||
1623 | head = &get_cpu_var(perf_pending_head); | |
925d519a PZ |
1624 | |
1625 | do { | |
671dec5d PZ |
1626 | entry->next = *head; |
1627 | } while (cmpxchg(head, entry->next, entry) != entry->next); | |
925d519a PZ |
1628 | |
1629 | set_perf_counter_pending(); | |
1630 | ||
671dec5d | 1631 | put_cpu_var(perf_pending_head); |
925d519a PZ |
1632 | } |
1633 | ||
1634 | static int __perf_pending_run(void) | |
1635 | { | |
671dec5d | 1636 | struct perf_pending_entry *list; |
925d519a PZ |
1637 | int nr = 0; |
1638 | ||
671dec5d | 1639 | list = xchg(&__get_cpu_var(perf_pending_head), PENDING_TAIL); |
925d519a | 1640 | while (list != PENDING_TAIL) { |
671dec5d PZ |
1641 | void (*func)(struct perf_pending_entry *); |
1642 | struct perf_pending_entry *entry = list; | |
925d519a PZ |
1643 | |
1644 | list = list->next; | |
1645 | ||
671dec5d PZ |
1646 | func = entry->func; |
1647 | entry->next = NULL; | |
925d519a PZ |
1648 | /* |
1649 | * Ensure we observe the unqueue before we issue the wakeup, | |
1650 | * so that we won't be waiting forever. | |
1651 | * -- see perf_not_pending(). | |
1652 | */ | |
1653 | smp_wmb(); | |
1654 | ||
671dec5d | 1655 | func(entry); |
925d519a PZ |
1656 | nr++; |
1657 | } | |
1658 | ||
1659 | return nr; | |
1660 | } | |
1661 | ||
1662 | static inline int perf_not_pending(struct perf_counter *counter) | |
1663 | { | |
1664 | /* | |
1665 | * If we flush on whatever cpu we run, there is a chance we don't | |
1666 | * need to wait. | |
1667 | */ | |
1668 | get_cpu(); | |
1669 | __perf_pending_run(); | |
1670 | put_cpu(); | |
1671 | ||
1672 | /* | |
1673 | * Ensure we see the proper queue state before going to sleep | |
1674 | * so that we do not miss the wakeup. -- see perf_pending_handle() | |
1675 | */ | |
1676 | smp_rmb(); | |
671dec5d | 1677 | return counter->pending.next == NULL; |
925d519a PZ |
1678 | } |
1679 | ||
1680 | static void perf_pending_sync(struct perf_counter *counter) | |
1681 | { | |
1682 | wait_event(counter->waitq, perf_not_pending(counter)); | |
1683 | } | |
1684 | ||
1685 | void perf_counter_do_pending(void) | |
1686 | { | |
1687 | __perf_pending_run(); | |
1688 | } | |
1689 | ||
394ee076 PZ |
1690 | /* |
1691 | * Callchain support -- arch specific | |
1692 | */ | |
1693 | ||
9c03d88e | 1694 | __weak struct perf_callchain_entry *perf_callchain(struct pt_regs *regs) |
394ee076 PZ |
1695 | { |
1696 | return NULL; | |
1697 | } | |
1698 | ||
0322cd6e PZ |
1699 | /* |
1700 | * Output | |
1701 | */ | |
1702 | ||
b9cacc7b PZ |
1703 | struct perf_output_handle { |
1704 | struct perf_counter *counter; | |
1705 | struct perf_mmap_data *data; | |
1706 | unsigned int offset; | |
63e35b25 | 1707 | unsigned int head; |
b9cacc7b | 1708 | int wakeup; |
78d613eb | 1709 | int nmi; |
4c9e2542 | 1710 | int overflow; |
b9cacc7b PZ |
1711 | }; |
1712 | ||
78d613eb PZ |
1713 | static inline void __perf_output_wakeup(struct perf_output_handle *handle) |
1714 | { | |
671dec5d | 1715 | if (handle->nmi) { |
79f14641 | 1716 | handle->counter->pending_wakeup = 1; |
671dec5d | 1717 | perf_pending_queue(&handle->counter->pending, |
79f14641 | 1718 | perf_pending_counter); |
671dec5d | 1719 | } else |
78d613eb PZ |
1720 | perf_counter_wakeup(handle->counter); |
1721 | } | |
1722 | ||
b9cacc7b | 1723 | static int perf_output_begin(struct perf_output_handle *handle, |
78d613eb | 1724 | struct perf_counter *counter, unsigned int size, |
4c9e2542 | 1725 | int nmi, int overflow) |
0322cd6e | 1726 | { |
7b732a75 | 1727 | struct perf_mmap_data *data; |
b9cacc7b | 1728 | unsigned int offset, head; |
0322cd6e | 1729 | |
7b732a75 | 1730 | rcu_read_lock(); |
7b732a75 PZ |
1731 | data = rcu_dereference(counter->data); |
1732 | if (!data) | |
1733 | goto out; | |
1734 | ||
4c9e2542 PZ |
1735 | handle->counter = counter; |
1736 | handle->nmi = nmi; | |
1737 | handle->overflow = overflow; | |
78d613eb | 1738 | |
7b732a75 | 1739 | if (!data->nr_pages) |
78d613eb | 1740 | goto fail; |
7b732a75 | 1741 | |
7b732a75 PZ |
1742 | do { |
1743 | offset = head = atomic_read(&data->head); | |
c7138f37 | 1744 | head += size; |
7b732a75 PZ |
1745 | } while (atomic_cmpxchg(&data->head, offset, head) != offset); |
1746 | ||
b9cacc7b PZ |
1747 | handle->data = data; |
1748 | handle->offset = offset; | |
63e35b25 | 1749 | handle->head = head; |
b9cacc7b | 1750 | handle->wakeup = (offset >> PAGE_SHIFT) != (head >> PAGE_SHIFT); |
0322cd6e | 1751 | |
b9cacc7b | 1752 | return 0; |
7b732a75 | 1753 | |
78d613eb PZ |
1754 | fail: |
1755 | __perf_output_wakeup(handle); | |
b9cacc7b PZ |
1756 | out: |
1757 | rcu_read_unlock(); | |
7b732a75 | 1758 | |
b9cacc7b PZ |
1759 | return -ENOSPC; |
1760 | } | |
7b732a75 | 1761 | |
b9cacc7b PZ |
1762 | static void perf_output_copy(struct perf_output_handle *handle, |
1763 | void *buf, unsigned int len) | |
1764 | { | |
1765 | unsigned int pages_mask; | |
1766 | unsigned int offset; | |
1767 | unsigned int size; | |
1768 | void **pages; | |
1769 | ||
1770 | offset = handle->offset; | |
1771 | pages_mask = handle->data->nr_pages - 1; | |
1772 | pages = handle->data->data_pages; | |
1773 | ||
1774 | do { | |
1775 | unsigned int page_offset; | |
1776 | int nr; | |
1777 | ||
1778 | nr = (offset >> PAGE_SHIFT) & pages_mask; | |
1779 | page_offset = offset & (PAGE_SIZE - 1); | |
1780 | size = min_t(unsigned int, PAGE_SIZE - page_offset, len); | |
1781 | ||
1782 | memcpy(pages[nr] + page_offset, buf, size); | |
1783 | ||
1784 | len -= size; | |
1785 | buf += size; | |
1786 | offset += size; | |
1787 | } while (len); | |
1788 | ||
1789 | handle->offset = offset; | |
63e35b25 PZ |
1790 | |
1791 | WARN_ON_ONCE(handle->offset > handle->head); | |
b9cacc7b PZ |
1792 | } |
1793 | ||
5c148194 PZ |
1794 | #define perf_output_put(handle, x) \ |
1795 | perf_output_copy((handle), &(x), sizeof(x)) | |
1796 | ||
78d613eb | 1797 | static void perf_output_end(struct perf_output_handle *handle) |
b9cacc7b | 1798 | { |
c457810a PZ |
1799 | int wakeup_events = handle->counter->hw_event.wakeup_events; |
1800 | ||
4c9e2542 | 1801 | if (handle->overflow && wakeup_events) { |
c457810a PZ |
1802 | int events = atomic_inc_return(&handle->data->events); |
1803 | if (events >= wakeup_events) { | |
1804 | atomic_sub(wakeup_events, &handle->data->events); | |
1805 | __perf_output_wakeup(handle); | |
1806 | } | |
1807 | } else if (handle->wakeup) | |
78d613eb | 1808 | __perf_output_wakeup(handle); |
7b732a75 | 1809 | rcu_read_unlock(); |
b9cacc7b PZ |
1810 | } |
1811 | ||
f6c7d5fe | 1812 | static void perf_counter_output(struct perf_counter *counter, |
78f13e95 | 1813 | int nmi, struct pt_regs *regs, u64 addr) |
7b732a75 | 1814 | { |
5ed00415 | 1815 | int ret; |
8a057d84 | 1816 | u64 record_type = counter->hw_event.record_type; |
5ed00415 PZ |
1817 | struct perf_output_handle handle; |
1818 | struct perf_event_header header; | |
1819 | u64 ip; | |
5c148194 | 1820 | struct { |
ea5d20cf | 1821 | u32 pid, tid; |
5ed00415 | 1822 | } tid_entry; |
8a057d84 PZ |
1823 | struct { |
1824 | u64 event; | |
1825 | u64 counter; | |
1826 | } group_entry; | |
394ee076 PZ |
1827 | struct perf_callchain_entry *callchain = NULL; |
1828 | int callchain_size = 0; | |
339f7c90 | 1829 | u64 time; |
7b732a75 | 1830 | |
6b6e5486 | 1831 | header.type = 0; |
5ed00415 | 1832 | header.size = sizeof(header); |
7b732a75 | 1833 | |
6b6e5486 PZ |
1834 | header.misc = PERF_EVENT_MISC_OVERFLOW; |
1835 | header.misc |= user_mode(regs) ? | |
6fab0192 PZ |
1836 | PERF_EVENT_MISC_USER : PERF_EVENT_MISC_KERNEL; |
1837 | ||
8a057d84 PZ |
1838 | if (record_type & PERF_RECORD_IP) { |
1839 | ip = instruction_pointer(regs); | |
6b6e5486 | 1840 | header.type |= PERF_RECORD_IP; |
8a057d84 PZ |
1841 | header.size += sizeof(ip); |
1842 | } | |
ea5d20cf | 1843 | |
8a057d84 | 1844 | if (record_type & PERF_RECORD_TID) { |
ea5d20cf | 1845 | /* namespace issues */ |
5ed00415 PZ |
1846 | tid_entry.pid = current->group_leader->pid; |
1847 | tid_entry.tid = current->pid; | |
1848 | ||
6b6e5486 | 1849 | header.type |= PERF_RECORD_TID; |
5ed00415 PZ |
1850 | header.size += sizeof(tid_entry); |
1851 | } | |
1852 | ||
4d855457 PZ |
1853 | if (record_type & PERF_RECORD_TIME) { |
1854 | /* | |
1855 | * Maybe do better on x86 and provide cpu_clock_nmi() | |
1856 | */ | |
1857 | time = sched_clock(); | |
1858 | ||
1859 | header.type |= PERF_RECORD_TIME; | |
1860 | header.size += sizeof(u64); | |
1861 | } | |
1862 | ||
78f13e95 PZ |
1863 | if (record_type & PERF_RECORD_ADDR) { |
1864 | header.type |= PERF_RECORD_ADDR; | |
1865 | header.size += sizeof(u64); | |
1866 | } | |
1867 | ||
8a057d84 | 1868 | if (record_type & PERF_RECORD_GROUP) { |
6b6e5486 | 1869 | header.type |= PERF_RECORD_GROUP; |
8a057d84 PZ |
1870 | header.size += sizeof(u64) + |
1871 | counter->nr_siblings * sizeof(group_entry); | |
1872 | } | |
1873 | ||
1874 | if (record_type & PERF_RECORD_CALLCHAIN) { | |
394ee076 PZ |
1875 | callchain = perf_callchain(regs); |
1876 | ||
1877 | if (callchain) { | |
9c03d88e | 1878 | callchain_size = (1 + callchain->nr) * sizeof(u64); |
394ee076 | 1879 | |
6b6e5486 | 1880 | header.type |= PERF_RECORD_CALLCHAIN; |
394ee076 PZ |
1881 | header.size += callchain_size; |
1882 | } | |
1883 | } | |
1884 | ||
4c9e2542 | 1885 | ret = perf_output_begin(&handle, counter, header.size, nmi, 1); |
5ed00415 PZ |
1886 | if (ret) |
1887 | return; | |
ea5d20cf | 1888 | |
5ed00415 | 1889 | perf_output_put(&handle, header); |
5c148194 | 1890 | |
8a057d84 PZ |
1891 | if (record_type & PERF_RECORD_IP) |
1892 | perf_output_put(&handle, ip); | |
5c148194 | 1893 | |
8a057d84 PZ |
1894 | if (record_type & PERF_RECORD_TID) |
1895 | perf_output_put(&handle, tid_entry); | |
5c148194 | 1896 | |
4d855457 PZ |
1897 | if (record_type & PERF_RECORD_TIME) |
1898 | perf_output_put(&handle, time); | |
1899 | ||
78f13e95 PZ |
1900 | if (record_type & PERF_RECORD_ADDR) |
1901 | perf_output_put(&handle, addr); | |
1902 | ||
8a057d84 PZ |
1903 | if (record_type & PERF_RECORD_GROUP) { |
1904 | struct perf_counter *leader, *sub; | |
1905 | u64 nr = counter->nr_siblings; | |
5c148194 | 1906 | |
8a057d84 | 1907 | perf_output_put(&handle, nr); |
0322cd6e | 1908 | |
8a057d84 PZ |
1909 | leader = counter->group_leader; |
1910 | list_for_each_entry(sub, &leader->sibling_list, list_entry) { | |
1911 | if (sub != counter) | |
1912 | sub->hw_ops->read(sub); | |
7b732a75 | 1913 | |
8a057d84 PZ |
1914 | group_entry.event = sub->hw_event.config; |
1915 | group_entry.counter = atomic64_read(&sub->count); | |
7b732a75 | 1916 | |
8a057d84 PZ |
1917 | perf_output_put(&handle, group_entry); |
1918 | } | |
0322cd6e | 1919 | } |
5c148194 | 1920 | |
8a057d84 PZ |
1921 | if (callchain) |
1922 | perf_output_copy(&handle, callchain, callchain_size); | |
0322cd6e | 1923 | |
8a057d84 | 1924 | perf_output_end(&handle); |
0322cd6e PZ |
1925 | } |
1926 | ||
8d1b2d93 PZ |
1927 | /* |
1928 | * comm tracking | |
1929 | */ | |
1930 | ||
1931 | struct perf_comm_event { | |
1932 | struct task_struct *task; | |
1933 | char *comm; | |
1934 | int comm_size; | |
1935 | ||
1936 | struct { | |
1937 | struct perf_event_header header; | |
1938 | ||
1939 | u32 pid; | |
1940 | u32 tid; | |
1941 | } event; | |
1942 | }; | |
1943 | ||
1944 | static void perf_counter_comm_output(struct perf_counter *counter, | |
1945 | struct perf_comm_event *comm_event) | |
1946 | { | |
1947 | struct perf_output_handle handle; | |
1948 | int size = comm_event->event.header.size; | |
1949 | int ret = perf_output_begin(&handle, counter, size, 0, 0); | |
1950 | ||
1951 | if (ret) | |
1952 | return; | |
1953 | ||
1954 | perf_output_put(&handle, comm_event->event); | |
1955 | perf_output_copy(&handle, comm_event->comm, | |
1956 | comm_event->comm_size); | |
1957 | perf_output_end(&handle); | |
1958 | } | |
1959 | ||
1960 | static int perf_counter_comm_match(struct perf_counter *counter, | |
1961 | struct perf_comm_event *comm_event) | |
1962 | { | |
1963 | if (counter->hw_event.comm && | |
1964 | comm_event->event.header.type == PERF_EVENT_COMM) | |
1965 | return 1; | |
1966 | ||
1967 | return 0; | |
1968 | } | |
1969 | ||
1970 | static void perf_counter_comm_ctx(struct perf_counter_context *ctx, | |
1971 | struct perf_comm_event *comm_event) | |
1972 | { | |
1973 | struct perf_counter *counter; | |
1974 | ||
1975 | if (system_state != SYSTEM_RUNNING || list_empty(&ctx->event_list)) | |
1976 | return; | |
1977 | ||
1978 | rcu_read_lock(); | |
1979 | list_for_each_entry_rcu(counter, &ctx->event_list, event_entry) { | |
1980 | if (perf_counter_comm_match(counter, comm_event)) | |
1981 | perf_counter_comm_output(counter, comm_event); | |
1982 | } | |
1983 | rcu_read_unlock(); | |
1984 | } | |
1985 | ||
1986 | static void perf_counter_comm_event(struct perf_comm_event *comm_event) | |
1987 | { | |
1988 | struct perf_cpu_context *cpuctx; | |
1989 | unsigned int size; | |
1990 | char *comm = comm_event->task->comm; | |
1991 | ||
888fcee0 | 1992 | size = ALIGN(strlen(comm)+1, sizeof(u64)); |
8d1b2d93 PZ |
1993 | |
1994 | comm_event->comm = comm; | |
1995 | comm_event->comm_size = size; | |
1996 | ||
1997 | comm_event->event.header.size = sizeof(comm_event->event) + size; | |
1998 | ||
1999 | cpuctx = &get_cpu_var(perf_cpu_context); | |
2000 | perf_counter_comm_ctx(&cpuctx->ctx, comm_event); | |
2001 | put_cpu_var(perf_cpu_context); | |
2002 | ||
2003 | perf_counter_comm_ctx(¤t->perf_counter_ctx, comm_event); | |
2004 | } | |
2005 | ||
2006 | void perf_counter_comm(struct task_struct *task) | |
2007 | { | |
2008 | struct perf_comm_event comm_event = { | |
2009 | .task = task, | |
2010 | .event = { | |
2011 | .header = { .type = PERF_EVENT_COMM, }, | |
2012 | .pid = task->group_leader->pid, | |
2013 | .tid = task->pid, | |
2014 | }, | |
2015 | }; | |
2016 | ||
2017 | perf_counter_comm_event(&comm_event); | |
2018 | } | |
2019 | ||
0a4a9391 PZ |
2020 | /* |
2021 | * mmap tracking | |
2022 | */ | |
2023 | ||
2024 | struct perf_mmap_event { | |
2025 | struct file *file; | |
2026 | char *file_name; | |
2027 | int file_size; | |
2028 | ||
2029 | struct { | |
2030 | struct perf_event_header header; | |
2031 | ||
2032 | u32 pid; | |
2033 | u32 tid; | |
2034 | u64 start; | |
2035 | u64 len; | |
2036 | u64 pgoff; | |
2037 | } event; | |
2038 | }; | |
2039 | ||
2040 | static void perf_counter_mmap_output(struct perf_counter *counter, | |
2041 | struct perf_mmap_event *mmap_event) | |
2042 | { | |
2043 | struct perf_output_handle handle; | |
2044 | int size = mmap_event->event.header.size; | |
4c9e2542 | 2045 | int ret = perf_output_begin(&handle, counter, size, 0, 0); |
0a4a9391 PZ |
2046 | |
2047 | if (ret) | |
2048 | return; | |
2049 | ||
2050 | perf_output_put(&handle, mmap_event->event); | |
2051 | perf_output_copy(&handle, mmap_event->file_name, | |
2052 | mmap_event->file_size); | |
78d613eb | 2053 | perf_output_end(&handle); |
0a4a9391 PZ |
2054 | } |
2055 | ||
2056 | static int perf_counter_mmap_match(struct perf_counter *counter, | |
2057 | struct perf_mmap_event *mmap_event) | |
2058 | { | |
2059 | if (counter->hw_event.mmap && | |
2060 | mmap_event->event.header.type == PERF_EVENT_MMAP) | |
2061 | return 1; | |
2062 | ||
2063 | if (counter->hw_event.munmap && | |
2064 | mmap_event->event.header.type == PERF_EVENT_MUNMAP) | |
2065 | return 1; | |
2066 | ||
2067 | return 0; | |
2068 | } | |
2069 | ||
2070 | static void perf_counter_mmap_ctx(struct perf_counter_context *ctx, | |
2071 | struct perf_mmap_event *mmap_event) | |
2072 | { | |
2073 | struct perf_counter *counter; | |
2074 | ||
2075 | if (system_state != SYSTEM_RUNNING || list_empty(&ctx->event_list)) | |
2076 | return; | |
2077 | ||
2078 | rcu_read_lock(); | |
2079 | list_for_each_entry_rcu(counter, &ctx->event_list, event_entry) { | |
2080 | if (perf_counter_mmap_match(counter, mmap_event)) | |
2081 | perf_counter_mmap_output(counter, mmap_event); | |
2082 | } | |
2083 | rcu_read_unlock(); | |
2084 | } | |
2085 | ||
2086 | static void perf_counter_mmap_event(struct perf_mmap_event *mmap_event) | |
2087 | { | |
2088 | struct perf_cpu_context *cpuctx; | |
2089 | struct file *file = mmap_event->file; | |
2090 | unsigned int size; | |
2091 | char tmp[16]; | |
2092 | char *buf = NULL; | |
2093 | char *name; | |
2094 | ||
2095 | if (file) { | |
2096 | buf = kzalloc(PATH_MAX, GFP_KERNEL); | |
2097 | if (!buf) { | |
2098 | name = strncpy(tmp, "//enomem", sizeof(tmp)); | |
2099 | goto got_name; | |
2100 | } | |
2101 | name = dentry_path(file->f_dentry, buf, PATH_MAX); | |
2102 | if (IS_ERR(name)) { | |
2103 | name = strncpy(tmp, "//toolong", sizeof(tmp)); | |
2104 | goto got_name; | |
2105 | } | |
2106 | } else { | |
2107 | name = strncpy(tmp, "//anon", sizeof(tmp)); | |
2108 | goto got_name; | |
2109 | } | |
2110 | ||
2111 | got_name: | |
888fcee0 | 2112 | size = ALIGN(strlen(name)+1, sizeof(u64)); |
0a4a9391 PZ |
2113 | |
2114 | mmap_event->file_name = name; | |
2115 | mmap_event->file_size = size; | |
2116 | ||
2117 | mmap_event->event.header.size = sizeof(mmap_event->event) + size; | |
2118 | ||
2119 | cpuctx = &get_cpu_var(perf_cpu_context); | |
2120 | perf_counter_mmap_ctx(&cpuctx->ctx, mmap_event); | |
2121 | put_cpu_var(perf_cpu_context); | |
2122 | ||
2123 | perf_counter_mmap_ctx(¤t->perf_counter_ctx, mmap_event); | |
2124 | ||
2125 | kfree(buf); | |
2126 | } | |
2127 | ||
2128 | void perf_counter_mmap(unsigned long addr, unsigned long len, | |
2129 | unsigned long pgoff, struct file *file) | |
2130 | { | |
2131 | struct perf_mmap_event mmap_event = { | |
2132 | .file = file, | |
2133 | .event = { | |
2134 | .header = { .type = PERF_EVENT_MMAP, }, | |
2135 | .pid = current->group_leader->pid, | |
2136 | .tid = current->pid, | |
2137 | .start = addr, | |
2138 | .len = len, | |
2139 | .pgoff = pgoff, | |
2140 | }, | |
2141 | }; | |
2142 | ||
2143 | perf_counter_mmap_event(&mmap_event); | |
2144 | } | |
2145 | ||
2146 | void perf_counter_munmap(unsigned long addr, unsigned long len, | |
2147 | unsigned long pgoff, struct file *file) | |
2148 | { | |
2149 | struct perf_mmap_event mmap_event = { | |
2150 | .file = file, | |
2151 | .event = { | |
2152 | .header = { .type = PERF_EVENT_MUNMAP, }, | |
2153 | .pid = current->group_leader->pid, | |
2154 | .tid = current->pid, | |
2155 | .start = addr, | |
2156 | .len = len, | |
2157 | .pgoff = pgoff, | |
2158 | }, | |
2159 | }; | |
2160 | ||
2161 | perf_counter_mmap_event(&mmap_event); | |
2162 | } | |
2163 | ||
f6c7d5fe PZ |
2164 | /* |
2165 | * Generic counter overflow handling. | |
2166 | */ | |
2167 | ||
2168 | int perf_counter_overflow(struct perf_counter *counter, | |
78f13e95 | 2169 | int nmi, struct pt_regs *regs, u64 addr) |
f6c7d5fe | 2170 | { |
79f14641 PZ |
2171 | int events = atomic_read(&counter->event_limit); |
2172 | int ret = 0; | |
2173 | ||
4c9e2542 | 2174 | counter->pending_kill = POLL_IN; |
79f14641 PZ |
2175 | if (events && atomic_dec_and_test(&counter->event_limit)) { |
2176 | ret = 1; | |
4c9e2542 | 2177 | counter->pending_kill = POLL_HUP; |
79f14641 PZ |
2178 | if (nmi) { |
2179 | counter->pending_disable = 1; | |
2180 | perf_pending_queue(&counter->pending, | |
2181 | perf_pending_counter); | |
2182 | } else | |
2183 | perf_counter_disable(counter); | |
2184 | } | |
2185 | ||
78f13e95 | 2186 | perf_counter_output(counter, nmi, regs, addr); |
79f14641 | 2187 | return ret; |
f6c7d5fe PZ |
2188 | } |
2189 | ||
15dbf27c PZ |
2190 | /* |
2191 | * Generic software counter infrastructure | |
2192 | */ | |
2193 | ||
2194 | static void perf_swcounter_update(struct perf_counter *counter) | |
2195 | { | |
2196 | struct hw_perf_counter *hwc = &counter->hw; | |
2197 | u64 prev, now; | |
2198 | s64 delta; | |
2199 | ||
2200 | again: | |
2201 | prev = atomic64_read(&hwc->prev_count); | |
2202 | now = atomic64_read(&hwc->count); | |
2203 | if (atomic64_cmpxchg(&hwc->prev_count, prev, now) != prev) | |
2204 | goto again; | |
2205 | ||
2206 | delta = now - prev; | |
2207 | ||
2208 | atomic64_add(delta, &counter->count); | |
2209 | atomic64_sub(delta, &hwc->period_left); | |
2210 | } | |
2211 | ||
2212 | static void perf_swcounter_set_period(struct perf_counter *counter) | |
2213 | { | |
2214 | struct hw_perf_counter *hwc = &counter->hw; | |
2215 | s64 left = atomic64_read(&hwc->period_left); | |
2216 | s64 period = hwc->irq_period; | |
2217 | ||
2218 | if (unlikely(left <= -period)) { | |
2219 | left = period; | |
2220 | atomic64_set(&hwc->period_left, left); | |
2221 | } | |
2222 | ||
2223 | if (unlikely(left <= 0)) { | |
2224 | left += period; | |
2225 | atomic64_add(period, &hwc->period_left); | |
2226 | } | |
2227 | ||
2228 | atomic64_set(&hwc->prev_count, -left); | |
2229 | atomic64_set(&hwc->count, -left); | |
2230 | } | |
2231 | ||
d6d020e9 PZ |
2232 | static enum hrtimer_restart perf_swcounter_hrtimer(struct hrtimer *hrtimer) |
2233 | { | |
f6c7d5fe | 2234 | enum hrtimer_restart ret = HRTIMER_RESTART; |
d6d020e9 PZ |
2235 | struct perf_counter *counter; |
2236 | struct pt_regs *regs; | |
2237 | ||
2238 | counter = container_of(hrtimer, struct perf_counter, hw.hrtimer); | |
2239 | counter->hw_ops->read(counter); | |
2240 | ||
2241 | regs = get_irq_regs(); | |
2242 | /* | |
2243 | * In case we exclude kernel IPs or are somehow not in interrupt | |
2244 | * context, provide the next best thing, the user IP. | |
2245 | */ | |
2246 | if ((counter->hw_event.exclude_kernel || !regs) && | |
2247 | !counter->hw_event.exclude_user) | |
2248 | regs = task_pt_regs(current); | |
2249 | ||
f6c7d5fe | 2250 | if (regs) { |
78f13e95 | 2251 | if (perf_counter_overflow(counter, 0, regs, 0)) |
f6c7d5fe PZ |
2252 | ret = HRTIMER_NORESTART; |
2253 | } | |
d6d020e9 PZ |
2254 | |
2255 | hrtimer_forward_now(hrtimer, ns_to_ktime(counter->hw.irq_period)); | |
2256 | ||
f6c7d5fe | 2257 | return ret; |
d6d020e9 PZ |
2258 | } |
2259 | ||
2260 | static void perf_swcounter_overflow(struct perf_counter *counter, | |
78f13e95 | 2261 | int nmi, struct pt_regs *regs, u64 addr) |
d6d020e9 | 2262 | { |
b8e83514 PZ |
2263 | perf_swcounter_update(counter); |
2264 | perf_swcounter_set_period(counter); | |
78f13e95 | 2265 | if (perf_counter_overflow(counter, nmi, regs, addr)) |
f6c7d5fe PZ |
2266 | /* soft-disable the counter */ |
2267 | ; | |
2268 | ||
d6d020e9 PZ |
2269 | } |
2270 | ||
15dbf27c | 2271 | static int perf_swcounter_match(struct perf_counter *counter, |
b8e83514 PZ |
2272 | enum perf_event_types type, |
2273 | u32 event, struct pt_regs *regs) | |
15dbf27c PZ |
2274 | { |
2275 | if (counter->state != PERF_COUNTER_STATE_ACTIVE) | |
2276 | return 0; | |
2277 | ||
f4a2deb4 | 2278 | if (perf_event_raw(&counter->hw_event)) |
b8e83514 PZ |
2279 | return 0; |
2280 | ||
f4a2deb4 | 2281 | if (perf_event_type(&counter->hw_event) != type) |
15dbf27c PZ |
2282 | return 0; |
2283 | ||
f4a2deb4 | 2284 | if (perf_event_id(&counter->hw_event) != event) |
15dbf27c PZ |
2285 | return 0; |
2286 | ||
2287 | if (counter->hw_event.exclude_user && user_mode(regs)) | |
2288 | return 0; | |
2289 | ||
2290 | if (counter->hw_event.exclude_kernel && !user_mode(regs)) | |
2291 | return 0; | |
2292 | ||
2293 | return 1; | |
2294 | } | |
2295 | ||
d6d020e9 | 2296 | static void perf_swcounter_add(struct perf_counter *counter, u64 nr, |
78f13e95 | 2297 | int nmi, struct pt_regs *regs, u64 addr) |
d6d020e9 PZ |
2298 | { |
2299 | int neg = atomic64_add_negative(nr, &counter->hw.count); | |
2300 | if (counter->hw.irq_period && !neg) | |
78f13e95 | 2301 | perf_swcounter_overflow(counter, nmi, regs, addr); |
d6d020e9 PZ |
2302 | } |
2303 | ||
15dbf27c | 2304 | static void perf_swcounter_ctx_event(struct perf_counter_context *ctx, |
b8e83514 | 2305 | enum perf_event_types type, u32 event, |
78f13e95 PZ |
2306 | u64 nr, int nmi, struct pt_regs *regs, |
2307 | u64 addr) | |
15dbf27c PZ |
2308 | { |
2309 | struct perf_counter *counter; | |
15dbf27c | 2310 | |
01ef09d9 | 2311 | if (system_state != SYSTEM_RUNNING || list_empty(&ctx->event_list)) |
15dbf27c PZ |
2312 | return; |
2313 | ||
592903cd PZ |
2314 | rcu_read_lock(); |
2315 | list_for_each_entry_rcu(counter, &ctx->event_list, event_entry) { | |
b8e83514 | 2316 | if (perf_swcounter_match(counter, type, event, regs)) |
78f13e95 | 2317 | perf_swcounter_add(counter, nr, nmi, regs, addr); |
15dbf27c | 2318 | } |
592903cd | 2319 | rcu_read_unlock(); |
15dbf27c PZ |
2320 | } |
2321 | ||
96f6d444 PZ |
2322 | static int *perf_swcounter_recursion_context(struct perf_cpu_context *cpuctx) |
2323 | { | |
2324 | if (in_nmi()) | |
2325 | return &cpuctx->recursion[3]; | |
2326 | ||
2327 | if (in_irq()) | |
2328 | return &cpuctx->recursion[2]; | |
2329 | ||
2330 | if (in_softirq()) | |
2331 | return &cpuctx->recursion[1]; | |
2332 | ||
2333 | return &cpuctx->recursion[0]; | |
2334 | } | |
2335 | ||
b8e83514 | 2336 | static void __perf_swcounter_event(enum perf_event_types type, u32 event, |
78f13e95 PZ |
2337 | u64 nr, int nmi, struct pt_regs *regs, |
2338 | u64 addr) | |
15dbf27c PZ |
2339 | { |
2340 | struct perf_cpu_context *cpuctx = &get_cpu_var(perf_cpu_context); | |
96f6d444 PZ |
2341 | int *recursion = perf_swcounter_recursion_context(cpuctx); |
2342 | ||
2343 | if (*recursion) | |
2344 | goto out; | |
2345 | ||
2346 | (*recursion)++; | |
2347 | barrier(); | |
15dbf27c | 2348 | |
78f13e95 PZ |
2349 | perf_swcounter_ctx_event(&cpuctx->ctx, type, event, |
2350 | nr, nmi, regs, addr); | |
b8e83514 PZ |
2351 | if (cpuctx->task_ctx) { |
2352 | perf_swcounter_ctx_event(cpuctx->task_ctx, type, event, | |
78f13e95 | 2353 | nr, nmi, regs, addr); |
b8e83514 | 2354 | } |
15dbf27c | 2355 | |
96f6d444 PZ |
2356 | barrier(); |
2357 | (*recursion)--; | |
2358 | ||
2359 | out: | |
15dbf27c PZ |
2360 | put_cpu_var(perf_cpu_context); |
2361 | } | |
2362 | ||
78f13e95 PZ |
2363 | void |
2364 | perf_swcounter_event(u32 event, u64 nr, int nmi, struct pt_regs *regs, u64 addr) | |
b8e83514 | 2365 | { |
78f13e95 | 2366 | __perf_swcounter_event(PERF_TYPE_SOFTWARE, event, nr, nmi, regs, addr); |
b8e83514 PZ |
2367 | } |
2368 | ||
15dbf27c PZ |
2369 | static void perf_swcounter_read(struct perf_counter *counter) |
2370 | { | |
2371 | perf_swcounter_update(counter); | |
2372 | } | |
2373 | ||
2374 | static int perf_swcounter_enable(struct perf_counter *counter) | |
2375 | { | |
2376 | perf_swcounter_set_period(counter); | |
2377 | return 0; | |
2378 | } | |
2379 | ||
2380 | static void perf_swcounter_disable(struct perf_counter *counter) | |
2381 | { | |
2382 | perf_swcounter_update(counter); | |
2383 | } | |
2384 | ||
ac17dc8e PZ |
2385 | static const struct hw_perf_counter_ops perf_ops_generic = { |
2386 | .enable = perf_swcounter_enable, | |
2387 | .disable = perf_swcounter_disable, | |
2388 | .read = perf_swcounter_read, | |
2389 | }; | |
2390 | ||
15dbf27c PZ |
2391 | /* |
2392 | * Software counter: cpu wall time clock | |
2393 | */ | |
2394 | ||
9abf8a08 PM |
2395 | static void cpu_clock_perf_counter_update(struct perf_counter *counter) |
2396 | { | |
2397 | int cpu = raw_smp_processor_id(); | |
2398 | s64 prev; | |
2399 | u64 now; | |
2400 | ||
2401 | now = cpu_clock(cpu); | |
2402 | prev = atomic64_read(&counter->hw.prev_count); | |
2403 | atomic64_set(&counter->hw.prev_count, now); | |
2404 | atomic64_add(now - prev, &counter->count); | |
2405 | } | |
2406 | ||
d6d020e9 PZ |
2407 | static int cpu_clock_perf_counter_enable(struct perf_counter *counter) |
2408 | { | |
2409 | struct hw_perf_counter *hwc = &counter->hw; | |
2410 | int cpu = raw_smp_processor_id(); | |
2411 | ||
2412 | atomic64_set(&hwc->prev_count, cpu_clock(cpu)); | |
039fc91e PZ |
2413 | hrtimer_init(&hwc->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); |
2414 | hwc->hrtimer.function = perf_swcounter_hrtimer; | |
d6d020e9 | 2415 | if (hwc->irq_period) { |
d6d020e9 PZ |
2416 | __hrtimer_start_range_ns(&hwc->hrtimer, |
2417 | ns_to_ktime(hwc->irq_period), 0, | |
2418 | HRTIMER_MODE_REL, 0); | |
2419 | } | |
2420 | ||
2421 | return 0; | |
2422 | } | |
2423 | ||
5c92d124 IM |
2424 | static void cpu_clock_perf_counter_disable(struct perf_counter *counter) |
2425 | { | |
d6d020e9 | 2426 | hrtimer_cancel(&counter->hw.hrtimer); |
9abf8a08 | 2427 | cpu_clock_perf_counter_update(counter); |
5c92d124 IM |
2428 | } |
2429 | ||
2430 | static void cpu_clock_perf_counter_read(struct perf_counter *counter) | |
2431 | { | |
9abf8a08 | 2432 | cpu_clock_perf_counter_update(counter); |
5c92d124 IM |
2433 | } |
2434 | ||
2435 | static const struct hw_perf_counter_ops perf_ops_cpu_clock = { | |
7671581f IM |
2436 | .enable = cpu_clock_perf_counter_enable, |
2437 | .disable = cpu_clock_perf_counter_disable, | |
2438 | .read = cpu_clock_perf_counter_read, | |
5c92d124 IM |
2439 | }; |
2440 | ||
15dbf27c PZ |
2441 | /* |
2442 | * Software counter: task time clock | |
2443 | */ | |
2444 | ||
e30e08f6 | 2445 | static void task_clock_perf_counter_update(struct perf_counter *counter, u64 now) |
aa9c4c0f | 2446 | { |
e30e08f6 | 2447 | u64 prev; |
8cb391e8 IM |
2448 | s64 delta; |
2449 | ||
a39d6f25 | 2450 | prev = atomic64_xchg(&counter->hw.prev_count, now); |
8cb391e8 | 2451 | delta = now - prev; |
8cb391e8 | 2452 | atomic64_add(delta, &counter->count); |
bae43c99 IM |
2453 | } |
2454 | ||
95cdd2e7 | 2455 | static int task_clock_perf_counter_enable(struct perf_counter *counter) |
8cb391e8 | 2456 | { |
d6d020e9 | 2457 | struct hw_perf_counter *hwc = &counter->hw; |
a39d6f25 PZ |
2458 | u64 now; |
2459 | ||
a39d6f25 | 2460 | now = counter->ctx->time; |
d6d020e9 | 2461 | |
a39d6f25 | 2462 | atomic64_set(&hwc->prev_count, now); |
039fc91e PZ |
2463 | hrtimer_init(&hwc->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); |
2464 | hwc->hrtimer.function = perf_swcounter_hrtimer; | |
d6d020e9 | 2465 | if (hwc->irq_period) { |
d6d020e9 PZ |
2466 | __hrtimer_start_range_ns(&hwc->hrtimer, |
2467 | ns_to_ktime(hwc->irq_period), 0, | |
2468 | HRTIMER_MODE_REL, 0); | |
2469 | } | |
95cdd2e7 IM |
2470 | |
2471 | return 0; | |
8cb391e8 IM |
2472 | } |
2473 | ||
2474 | static void task_clock_perf_counter_disable(struct perf_counter *counter) | |
bae43c99 | 2475 | { |
d6d020e9 | 2476 | hrtimer_cancel(&counter->hw.hrtimer); |
e30e08f6 PZ |
2477 | task_clock_perf_counter_update(counter, counter->ctx->time); |
2478 | ||
d6d020e9 | 2479 | } |
aa9c4c0f | 2480 | |
d6d020e9 PZ |
2481 | static void task_clock_perf_counter_read(struct perf_counter *counter) |
2482 | { | |
e30e08f6 PZ |
2483 | u64 time; |
2484 | ||
2485 | if (!in_nmi()) { | |
2486 | update_context_time(counter->ctx); | |
2487 | time = counter->ctx->time; | |
2488 | } else { | |
2489 | u64 now = perf_clock(); | |
2490 | u64 delta = now - counter->ctx->timestamp; | |
2491 | time = counter->ctx->time + delta; | |
2492 | } | |
2493 | ||
2494 | task_clock_perf_counter_update(counter, time); | |
bae43c99 IM |
2495 | } |
2496 | ||
2497 | static const struct hw_perf_counter_ops perf_ops_task_clock = { | |
7671581f IM |
2498 | .enable = task_clock_perf_counter_enable, |
2499 | .disable = task_clock_perf_counter_disable, | |
2500 | .read = task_clock_perf_counter_read, | |
bae43c99 IM |
2501 | }; |
2502 | ||
15dbf27c PZ |
2503 | /* |
2504 | * Software counter: cpu migrations | |
2505 | */ | |
2506 | ||
23a185ca | 2507 | static inline u64 get_cpu_migrations(struct perf_counter *counter) |
6c594c21 | 2508 | { |
23a185ca PM |
2509 | struct task_struct *curr = counter->ctx->task; |
2510 | ||
2511 | if (curr) | |
2512 | return curr->se.nr_migrations; | |
2513 | return cpu_nr_migrations(smp_processor_id()); | |
6c594c21 IM |
2514 | } |
2515 | ||
2516 | static void cpu_migrations_perf_counter_update(struct perf_counter *counter) | |
2517 | { | |
2518 | u64 prev, now; | |
2519 | s64 delta; | |
2520 | ||
2521 | prev = atomic64_read(&counter->hw.prev_count); | |
23a185ca | 2522 | now = get_cpu_migrations(counter); |
6c594c21 IM |
2523 | |
2524 | atomic64_set(&counter->hw.prev_count, now); | |
2525 | ||
2526 | delta = now - prev; | |
6c594c21 IM |
2527 | |
2528 | atomic64_add(delta, &counter->count); | |
2529 | } | |
2530 | ||
2531 | static void cpu_migrations_perf_counter_read(struct perf_counter *counter) | |
2532 | { | |
2533 | cpu_migrations_perf_counter_update(counter); | |
2534 | } | |
2535 | ||
95cdd2e7 | 2536 | static int cpu_migrations_perf_counter_enable(struct perf_counter *counter) |
6c594c21 | 2537 | { |
c07c99b6 PM |
2538 | if (counter->prev_state <= PERF_COUNTER_STATE_OFF) |
2539 | atomic64_set(&counter->hw.prev_count, | |
2540 | get_cpu_migrations(counter)); | |
95cdd2e7 | 2541 | return 0; |
6c594c21 IM |
2542 | } |
2543 | ||
2544 | static void cpu_migrations_perf_counter_disable(struct perf_counter *counter) | |
2545 | { | |
2546 | cpu_migrations_perf_counter_update(counter); | |
2547 | } | |
2548 | ||
2549 | static const struct hw_perf_counter_ops perf_ops_cpu_migrations = { | |
7671581f IM |
2550 | .enable = cpu_migrations_perf_counter_enable, |
2551 | .disable = cpu_migrations_perf_counter_disable, | |
2552 | .read = cpu_migrations_perf_counter_read, | |
6c594c21 IM |
2553 | }; |
2554 | ||
e077df4f PZ |
2555 | #ifdef CONFIG_EVENT_PROFILE |
2556 | void perf_tpcounter_event(int event_id) | |
2557 | { | |
b8e83514 PZ |
2558 | struct pt_regs *regs = get_irq_regs(); |
2559 | ||
2560 | if (!regs) | |
2561 | regs = task_pt_regs(current); | |
2562 | ||
78f13e95 | 2563 | __perf_swcounter_event(PERF_TYPE_TRACEPOINT, event_id, 1, 1, regs, 0); |
e077df4f PZ |
2564 | } |
2565 | ||
2566 | extern int ftrace_profile_enable(int); | |
2567 | extern void ftrace_profile_disable(int); | |
2568 | ||
2569 | static void tp_perf_counter_destroy(struct perf_counter *counter) | |
2570 | { | |
f4a2deb4 | 2571 | ftrace_profile_disable(perf_event_id(&counter->hw_event)); |
e077df4f PZ |
2572 | } |
2573 | ||
2574 | static const struct hw_perf_counter_ops * | |
2575 | tp_perf_counter_init(struct perf_counter *counter) | |
2576 | { | |
f4a2deb4 | 2577 | int event_id = perf_event_id(&counter->hw_event); |
e077df4f PZ |
2578 | int ret; |
2579 | ||
2580 | ret = ftrace_profile_enable(event_id); | |
2581 | if (ret) | |
2582 | return NULL; | |
2583 | ||
2584 | counter->destroy = tp_perf_counter_destroy; | |
b8e83514 | 2585 | counter->hw.irq_period = counter->hw_event.irq_period; |
e077df4f PZ |
2586 | |
2587 | return &perf_ops_generic; | |
2588 | } | |
2589 | #else | |
2590 | static const struct hw_perf_counter_ops * | |
2591 | tp_perf_counter_init(struct perf_counter *counter) | |
2592 | { | |
2593 | return NULL; | |
2594 | } | |
2595 | #endif | |
2596 | ||
5c92d124 IM |
2597 | static const struct hw_perf_counter_ops * |
2598 | sw_perf_counter_init(struct perf_counter *counter) | |
2599 | { | |
15dbf27c | 2600 | struct perf_counter_hw_event *hw_event = &counter->hw_event; |
5c92d124 | 2601 | const struct hw_perf_counter_ops *hw_ops = NULL; |
15dbf27c | 2602 | struct hw_perf_counter *hwc = &counter->hw; |
5c92d124 | 2603 | |
0475f9ea PM |
2604 | /* |
2605 | * Software counters (currently) can't in general distinguish | |
2606 | * between user, kernel and hypervisor events. | |
2607 | * However, context switches and cpu migrations are considered | |
2608 | * to be kernel events, and page faults are never hypervisor | |
2609 | * events. | |
2610 | */ | |
f4a2deb4 | 2611 | switch (perf_event_id(&counter->hw_event)) { |
5c92d124 | 2612 | case PERF_COUNT_CPU_CLOCK: |
d6d020e9 PZ |
2613 | hw_ops = &perf_ops_cpu_clock; |
2614 | ||
2615 | if (hw_event->irq_period && hw_event->irq_period < 10000) | |
2616 | hw_event->irq_period = 10000; | |
5c92d124 | 2617 | break; |
bae43c99 | 2618 | case PERF_COUNT_TASK_CLOCK: |
23a185ca PM |
2619 | /* |
2620 | * If the user instantiates this as a per-cpu counter, | |
2621 | * use the cpu_clock counter instead. | |
2622 | */ | |
2623 | if (counter->ctx->task) | |
2624 | hw_ops = &perf_ops_task_clock; | |
2625 | else | |
2626 | hw_ops = &perf_ops_cpu_clock; | |
d6d020e9 PZ |
2627 | |
2628 | if (hw_event->irq_period && hw_event->irq_period < 10000) | |
2629 | hw_event->irq_period = 10000; | |
bae43c99 | 2630 | break; |
e06c61a8 | 2631 | case PERF_COUNT_PAGE_FAULTS: |
ac17dc8e PZ |
2632 | case PERF_COUNT_PAGE_FAULTS_MIN: |
2633 | case PERF_COUNT_PAGE_FAULTS_MAJ: | |
5d6a27d8 | 2634 | case PERF_COUNT_CONTEXT_SWITCHES: |
4a0deca6 | 2635 | hw_ops = &perf_ops_generic; |
5d6a27d8 | 2636 | break; |
6c594c21 | 2637 | case PERF_COUNT_CPU_MIGRATIONS: |
0475f9ea PM |
2638 | if (!counter->hw_event.exclude_kernel) |
2639 | hw_ops = &perf_ops_cpu_migrations; | |
6c594c21 | 2640 | break; |
5c92d124 | 2641 | } |
15dbf27c PZ |
2642 | |
2643 | if (hw_ops) | |
2644 | hwc->irq_period = hw_event->irq_period; | |
2645 | ||
5c92d124 IM |
2646 | return hw_ops; |
2647 | } | |
2648 | ||
0793a61d TG |
2649 | /* |
2650 | * Allocate and initialize a counter structure | |
2651 | */ | |
2652 | static struct perf_counter * | |
04289bb9 IM |
2653 | perf_counter_alloc(struct perf_counter_hw_event *hw_event, |
2654 | int cpu, | |
23a185ca | 2655 | struct perf_counter_context *ctx, |
9b51f66d IM |
2656 | struct perf_counter *group_leader, |
2657 | gfp_t gfpflags) | |
0793a61d | 2658 | { |
5c92d124 | 2659 | const struct hw_perf_counter_ops *hw_ops; |
621a01ea | 2660 | struct perf_counter *counter; |
d5d2bc0d | 2661 | long err; |
0793a61d | 2662 | |
9b51f66d | 2663 | counter = kzalloc(sizeof(*counter), gfpflags); |
0793a61d | 2664 | if (!counter) |
d5d2bc0d | 2665 | return ERR_PTR(-ENOMEM); |
0793a61d | 2666 | |
04289bb9 IM |
2667 | /* |
2668 | * Single counters are their own group leaders, with an | |
2669 | * empty sibling list: | |
2670 | */ | |
2671 | if (!group_leader) | |
2672 | group_leader = counter; | |
2673 | ||
0793a61d | 2674 | mutex_init(&counter->mutex); |
04289bb9 | 2675 | INIT_LIST_HEAD(&counter->list_entry); |
592903cd | 2676 | INIT_LIST_HEAD(&counter->event_entry); |
04289bb9 | 2677 | INIT_LIST_HEAD(&counter->sibling_list); |
0793a61d TG |
2678 | init_waitqueue_head(&counter->waitq); |
2679 | ||
7b732a75 PZ |
2680 | mutex_init(&counter->mmap_mutex); |
2681 | ||
d859e29f PM |
2682 | INIT_LIST_HEAD(&counter->child_list); |
2683 | ||
9f66a381 IM |
2684 | counter->cpu = cpu; |
2685 | counter->hw_event = *hw_event; | |
04289bb9 | 2686 | counter->group_leader = group_leader; |
621a01ea | 2687 | counter->hw_ops = NULL; |
23a185ca | 2688 | counter->ctx = ctx; |
621a01ea | 2689 | |
235c7fc7 | 2690 | counter->state = PERF_COUNTER_STATE_INACTIVE; |
a86ed508 IM |
2691 | if (hw_event->disabled) |
2692 | counter->state = PERF_COUNTER_STATE_OFF; | |
2693 | ||
5c92d124 | 2694 | hw_ops = NULL; |
b8e83514 | 2695 | |
f4a2deb4 | 2696 | if (perf_event_raw(hw_event)) { |
b8e83514 | 2697 | hw_ops = hw_perf_counter_init(counter); |
f4a2deb4 PZ |
2698 | goto done; |
2699 | } | |
2700 | ||
2701 | switch (perf_event_type(hw_event)) { | |
b8e83514 | 2702 | case PERF_TYPE_HARDWARE: |
5c92d124 | 2703 | hw_ops = hw_perf_counter_init(counter); |
b8e83514 PZ |
2704 | break; |
2705 | ||
2706 | case PERF_TYPE_SOFTWARE: | |
2707 | hw_ops = sw_perf_counter_init(counter); | |
2708 | break; | |
2709 | ||
2710 | case PERF_TYPE_TRACEPOINT: | |
2711 | hw_ops = tp_perf_counter_init(counter); | |
2712 | break; | |
2713 | } | |
d5d2bc0d PM |
2714 | done: |
2715 | err = 0; | |
2716 | if (!hw_ops) | |
2717 | err = -EINVAL; | |
2718 | else if (IS_ERR(hw_ops)) | |
2719 | err = PTR_ERR(hw_ops); | |
5c92d124 | 2720 | |
d5d2bc0d | 2721 | if (err) { |
621a01ea | 2722 | kfree(counter); |
d5d2bc0d | 2723 | return ERR_PTR(err); |
621a01ea | 2724 | } |
d5d2bc0d | 2725 | |
621a01ea | 2726 | counter->hw_ops = hw_ops; |
0793a61d TG |
2727 | |
2728 | return counter; | |
2729 | } | |
2730 | ||
2731 | /** | |
2743a5b0 | 2732 | * sys_perf_counter_open - open a performance counter, associate it to a task/cpu |
9f66a381 IM |
2733 | * |
2734 | * @hw_event_uptr: event type attributes for monitoring/sampling | |
0793a61d | 2735 | * @pid: target pid |
9f66a381 IM |
2736 | * @cpu: target cpu |
2737 | * @group_fd: group leader counter fd | |
0793a61d | 2738 | */ |
2743a5b0 | 2739 | SYSCALL_DEFINE5(perf_counter_open, |
f3dfd265 | 2740 | const struct perf_counter_hw_event __user *, hw_event_uptr, |
2743a5b0 | 2741 | pid_t, pid, int, cpu, int, group_fd, unsigned long, flags) |
0793a61d | 2742 | { |
04289bb9 | 2743 | struct perf_counter *counter, *group_leader; |
9f66a381 | 2744 | struct perf_counter_hw_event hw_event; |
04289bb9 | 2745 | struct perf_counter_context *ctx; |
9b51f66d | 2746 | struct file *counter_file = NULL; |
04289bb9 IM |
2747 | struct file *group_file = NULL; |
2748 | int fput_needed = 0; | |
9b51f66d | 2749 | int fput_needed2 = 0; |
0793a61d TG |
2750 | int ret; |
2751 | ||
2743a5b0 PM |
2752 | /* for future expandability... */ |
2753 | if (flags) | |
2754 | return -EINVAL; | |
2755 | ||
9f66a381 | 2756 | if (copy_from_user(&hw_event, hw_event_uptr, sizeof(hw_event)) != 0) |
eab656ae TG |
2757 | return -EFAULT; |
2758 | ||
04289bb9 | 2759 | /* |
ccff286d IM |
2760 | * Get the target context (task or percpu): |
2761 | */ | |
2762 | ctx = find_get_context(pid, cpu); | |
2763 | if (IS_ERR(ctx)) | |
2764 | return PTR_ERR(ctx); | |
2765 | ||
2766 | /* | |
2767 | * Look up the group leader (we will attach this counter to it): | |
04289bb9 IM |
2768 | */ |
2769 | group_leader = NULL; | |
2770 | if (group_fd != -1) { | |
2771 | ret = -EINVAL; | |
2772 | group_file = fget_light(group_fd, &fput_needed); | |
2773 | if (!group_file) | |
ccff286d | 2774 | goto err_put_context; |
04289bb9 | 2775 | if (group_file->f_op != &perf_fops) |
ccff286d | 2776 | goto err_put_context; |
04289bb9 IM |
2777 | |
2778 | group_leader = group_file->private_data; | |
2779 | /* | |
ccff286d IM |
2780 | * Do not allow a recursive hierarchy (this new sibling |
2781 | * becoming part of another group-sibling): | |
2782 | */ | |
2783 | if (group_leader->group_leader != group_leader) | |
2784 | goto err_put_context; | |
2785 | /* | |
2786 | * Do not allow to attach to a group in a different | |
2787 | * task or CPU context: | |
04289bb9 | 2788 | */ |
ccff286d IM |
2789 | if (group_leader->ctx != ctx) |
2790 | goto err_put_context; | |
3b6f9e5c PM |
2791 | /* |
2792 | * Only a group leader can be exclusive or pinned | |
2793 | */ | |
2794 | if (hw_event.exclusive || hw_event.pinned) | |
2795 | goto err_put_context; | |
04289bb9 IM |
2796 | } |
2797 | ||
23a185ca PM |
2798 | counter = perf_counter_alloc(&hw_event, cpu, ctx, group_leader, |
2799 | GFP_KERNEL); | |
d5d2bc0d PM |
2800 | ret = PTR_ERR(counter); |
2801 | if (IS_ERR(counter)) | |
0793a61d TG |
2802 | goto err_put_context; |
2803 | ||
0793a61d TG |
2804 | ret = anon_inode_getfd("[perf_counter]", &perf_fops, counter, 0); |
2805 | if (ret < 0) | |
9b51f66d IM |
2806 | goto err_free_put_context; |
2807 | ||
2808 | counter_file = fget_light(ret, &fput_needed2); | |
2809 | if (!counter_file) | |
2810 | goto err_free_put_context; | |
2811 | ||
2812 | counter->filp = counter_file; | |
d859e29f | 2813 | mutex_lock(&ctx->mutex); |
9b51f66d | 2814 | perf_install_in_context(ctx, counter, cpu); |
d859e29f | 2815 | mutex_unlock(&ctx->mutex); |
9b51f66d IM |
2816 | |
2817 | fput_light(counter_file, fput_needed2); | |
0793a61d | 2818 | |
04289bb9 IM |
2819 | out_fput: |
2820 | fput_light(group_file, fput_needed); | |
2821 | ||
0793a61d TG |
2822 | return ret; |
2823 | ||
9b51f66d | 2824 | err_free_put_context: |
0793a61d TG |
2825 | kfree(counter); |
2826 | ||
2827 | err_put_context: | |
2828 | put_context(ctx); | |
2829 | ||
04289bb9 | 2830 | goto out_fput; |
0793a61d TG |
2831 | } |
2832 | ||
9b51f66d IM |
2833 | /* |
2834 | * Initialize the perf_counter context in a task_struct: | |
2835 | */ | |
2836 | static void | |
2837 | __perf_counter_init_context(struct perf_counter_context *ctx, | |
2838 | struct task_struct *task) | |
2839 | { | |
2840 | memset(ctx, 0, sizeof(*ctx)); | |
2841 | spin_lock_init(&ctx->lock); | |
d859e29f | 2842 | mutex_init(&ctx->mutex); |
9b51f66d | 2843 | INIT_LIST_HEAD(&ctx->counter_list); |
592903cd | 2844 | INIT_LIST_HEAD(&ctx->event_list); |
9b51f66d IM |
2845 | ctx->task = task; |
2846 | } | |
2847 | ||
2848 | /* | |
2849 | * inherit a counter from parent task to child task: | |
2850 | */ | |
d859e29f | 2851 | static struct perf_counter * |
9b51f66d IM |
2852 | inherit_counter(struct perf_counter *parent_counter, |
2853 | struct task_struct *parent, | |
2854 | struct perf_counter_context *parent_ctx, | |
2855 | struct task_struct *child, | |
d859e29f | 2856 | struct perf_counter *group_leader, |
9b51f66d IM |
2857 | struct perf_counter_context *child_ctx) |
2858 | { | |
2859 | struct perf_counter *child_counter; | |
2860 | ||
d859e29f PM |
2861 | /* |
2862 | * Instead of creating recursive hierarchies of counters, | |
2863 | * we link inherited counters back to the original parent, | |
2864 | * which has a filp for sure, which we use as the reference | |
2865 | * count: | |
2866 | */ | |
2867 | if (parent_counter->parent) | |
2868 | parent_counter = parent_counter->parent; | |
2869 | ||
9b51f66d | 2870 | child_counter = perf_counter_alloc(&parent_counter->hw_event, |
23a185ca PM |
2871 | parent_counter->cpu, child_ctx, |
2872 | group_leader, GFP_KERNEL); | |
d5d2bc0d PM |
2873 | if (IS_ERR(child_counter)) |
2874 | return child_counter; | |
9b51f66d IM |
2875 | |
2876 | /* | |
2877 | * Link it up in the child's context: | |
2878 | */ | |
9b51f66d | 2879 | child_counter->task = child; |
53cfbf59 | 2880 | add_counter_to_ctx(child_counter, child_ctx); |
9b51f66d IM |
2881 | |
2882 | child_counter->parent = parent_counter; | |
9b51f66d IM |
2883 | /* |
2884 | * inherit into child's child as well: | |
2885 | */ | |
2886 | child_counter->hw_event.inherit = 1; | |
2887 | ||
2888 | /* | |
2889 | * Get a reference to the parent filp - we will fput it | |
2890 | * when the child counter exits. This is safe to do because | |
2891 | * we are in the parent and we know that the filp still | |
2892 | * exists and has a nonzero count: | |
2893 | */ | |
2894 | atomic_long_inc(&parent_counter->filp->f_count); | |
2895 | ||
d859e29f PM |
2896 | /* |
2897 | * Link this into the parent counter's child list | |
2898 | */ | |
2899 | mutex_lock(&parent_counter->mutex); | |
2900 | list_add_tail(&child_counter->child_list, &parent_counter->child_list); | |
2901 | ||
2902 | /* | |
2903 | * Make the child state follow the state of the parent counter, | |
2904 | * not its hw_event.disabled bit. We hold the parent's mutex, | |
2905 | * so we won't race with perf_counter_{en,dis}able_family. | |
2906 | */ | |
2907 | if (parent_counter->state >= PERF_COUNTER_STATE_INACTIVE) | |
2908 | child_counter->state = PERF_COUNTER_STATE_INACTIVE; | |
2909 | else | |
2910 | child_counter->state = PERF_COUNTER_STATE_OFF; | |
2911 | ||
2912 | mutex_unlock(&parent_counter->mutex); | |
2913 | ||
2914 | return child_counter; | |
2915 | } | |
2916 | ||
2917 | static int inherit_group(struct perf_counter *parent_counter, | |
2918 | struct task_struct *parent, | |
2919 | struct perf_counter_context *parent_ctx, | |
2920 | struct task_struct *child, | |
2921 | struct perf_counter_context *child_ctx) | |
2922 | { | |
2923 | struct perf_counter *leader; | |
2924 | struct perf_counter *sub; | |
d5d2bc0d | 2925 | struct perf_counter *child_ctr; |
d859e29f PM |
2926 | |
2927 | leader = inherit_counter(parent_counter, parent, parent_ctx, | |
2928 | child, NULL, child_ctx); | |
d5d2bc0d PM |
2929 | if (IS_ERR(leader)) |
2930 | return PTR_ERR(leader); | |
d859e29f | 2931 | list_for_each_entry(sub, &parent_counter->sibling_list, list_entry) { |
d5d2bc0d PM |
2932 | child_ctr = inherit_counter(sub, parent, parent_ctx, |
2933 | child, leader, child_ctx); | |
2934 | if (IS_ERR(child_ctr)) | |
2935 | return PTR_ERR(child_ctr); | |
d859e29f | 2936 | } |
9b51f66d IM |
2937 | return 0; |
2938 | } | |
2939 | ||
d859e29f PM |
2940 | static void sync_child_counter(struct perf_counter *child_counter, |
2941 | struct perf_counter *parent_counter) | |
2942 | { | |
2943 | u64 parent_val, child_val; | |
2944 | ||
2945 | parent_val = atomic64_read(&parent_counter->count); | |
2946 | child_val = atomic64_read(&child_counter->count); | |
2947 | ||
2948 | /* | |
2949 | * Add back the child's count to the parent's count: | |
2950 | */ | |
2951 | atomic64_add(child_val, &parent_counter->count); | |
53cfbf59 PM |
2952 | atomic64_add(child_counter->total_time_enabled, |
2953 | &parent_counter->child_total_time_enabled); | |
2954 | atomic64_add(child_counter->total_time_running, | |
2955 | &parent_counter->child_total_time_running); | |
d859e29f PM |
2956 | |
2957 | /* | |
2958 | * Remove this counter from the parent's list | |
2959 | */ | |
2960 | mutex_lock(&parent_counter->mutex); | |
2961 | list_del_init(&child_counter->child_list); | |
2962 | mutex_unlock(&parent_counter->mutex); | |
2963 | ||
2964 | /* | |
2965 | * Release the parent counter, if this was the last | |
2966 | * reference to it. | |
2967 | */ | |
2968 | fput(parent_counter->filp); | |
2969 | } | |
2970 | ||
9b51f66d IM |
2971 | static void |
2972 | __perf_counter_exit_task(struct task_struct *child, | |
2973 | struct perf_counter *child_counter, | |
2974 | struct perf_counter_context *child_ctx) | |
2975 | { | |
2976 | struct perf_counter *parent_counter; | |
d859e29f | 2977 | struct perf_counter *sub, *tmp; |
9b51f66d IM |
2978 | |
2979 | /* | |
235c7fc7 IM |
2980 | * If we do not self-reap then we have to wait for the |
2981 | * child task to unschedule (it will happen for sure), | |
2982 | * so that its counter is at its final count. (This | |
2983 | * condition triggers rarely - child tasks usually get | |
2984 | * off their CPU before the parent has a chance to | |
2985 | * get this far into the reaping action) | |
9b51f66d | 2986 | */ |
235c7fc7 IM |
2987 | if (child != current) { |
2988 | wait_task_inactive(child, 0); | |
2989 | list_del_init(&child_counter->list_entry); | |
53cfbf59 | 2990 | update_counter_times(child_counter); |
235c7fc7 | 2991 | } else { |
0cc0c027 | 2992 | struct perf_cpu_context *cpuctx; |
235c7fc7 IM |
2993 | unsigned long flags; |
2994 | u64 perf_flags; | |
2995 | ||
2996 | /* | |
2997 | * Disable and unlink this counter. | |
2998 | * | |
2999 | * Be careful about zapping the list - IRQ/NMI context | |
3000 | * could still be processing it: | |
3001 | */ | |
849691a6 | 3002 | local_irq_save(flags); |
235c7fc7 | 3003 | perf_flags = hw_perf_save_disable(); |
0cc0c027 IM |
3004 | |
3005 | cpuctx = &__get_cpu_var(perf_cpu_context); | |
3006 | ||
d859e29f | 3007 | group_sched_out(child_counter, cpuctx, child_ctx); |
53cfbf59 | 3008 | update_counter_times(child_counter); |
0cc0c027 | 3009 | |
235c7fc7 | 3010 | list_del_init(&child_counter->list_entry); |
0cc0c027 | 3011 | |
235c7fc7 | 3012 | child_ctx->nr_counters--; |
9b51f66d | 3013 | |
235c7fc7 | 3014 | hw_perf_restore(perf_flags); |
849691a6 | 3015 | local_irq_restore(flags); |
235c7fc7 | 3016 | } |
9b51f66d IM |
3017 | |
3018 | parent_counter = child_counter->parent; | |
3019 | /* | |
3020 | * It can happen that parent exits first, and has counters | |
3021 | * that are still around due to the child reference. These | |
3022 | * counters need to be zapped - but otherwise linger. | |
3023 | */ | |
d859e29f PM |
3024 | if (parent_counter) { |
3025 | sync_child_counter(child_counter, parent_counter); | |
3026 | list_for_each_entry_safe(sub, tmp, &child_counter->sibling_list, | |
3027 | list_entry) { | |
4bcf349a | 3028 | if (sub->parent) { |
d859e29f | 3029 | sync_child_counter(sub, sub->parent); |
f1600952 | 3030 | free_counter(sub); |
4bcf349a | 3031 | } |
d859e29f | 3032 | } |
f1600952 | 3033 | free_counter(child_counter); |
4bcf349a | 3034 | } |
9b51f66d IM |
3035 | } |
3036 | ||
3037 | /* | |
d859e29f | 3038 | * When a child task exits, feed back counter values to parent counters. |
9b51f66d | 3039 | * |
d859e29f | 3040 | * Note: we may be running in child context, but the PID is not hashed |
9b51f66d IM |
3041 | * anymore so new counters will not be added. |
3042 | */ | |
3043 | void perf_counter_exit_task(struct task_struct *child) | |
3044 | { | |
3045 | struct perf_counter *child_counter, *tmp; | |
3046 | struct perf_counter_context *child_ctx; | |
3047 | ||
3048 | child_ctx = &child->perf_counter_ctx; | |
3049 | ||
3050 | if (likely(!child_ctx->nr_counters)) | |
3051 | return; | |
3052 | ||
3053 | list_for_each_entry_safe(child_counter, tmp, &child_ctx->counter_list, | |
3054 | list_entry) | |
3055 | __perf_counter_exit_task(child, child_counter, child_ctx); | |
3056 | } | |
3057 | ||
3058 | /* | |
3059 | * Initialize the perf_counter context in task_struct | |
3060 | */ | |
3061 | void perf_counter_init_task(struct task_struct *child) | |
3062 | { | |
3063 | struct perf_counter_context *child_ctx, *parent_ctx; | |
d859e29f | 3064 | struct perf_counter *counter; |
9b51f66d | 3065 | struct task_struct *parent = current; |
9b51f66d IM |
3066 | |
3067 | child_ctx = &child->perf_counter_ctx; | |
3068 | parent_ctx = &parent->perf_counter_ctx; | |
3069 | ||
3070 | __perf_counter_init_context(child_ctx, child); | |
3071 | ||
3072 | /* | |
3073 | * This is executed from the parent task context, so inherit | |
3074 | * counters that have been marked for cloning: | |
3075 | */ | |
3076 | ||
3077 | if (likely(!parent_ctx->nr_counters)) | |
3078 | return; | |
3079 | ||
3080 | /* | |
3081 | * Lock the parent list. No need to lock the child - not PID | |
3082 | * hashed yet and not running, so nobody can access it. | |
3083 | */ | |
d859e29f | 3084 | mutex_lock(&parent_ctx->mutex); |
9b51f66d IM |
3085 | |
3086 | /* | |
3087 | * We dont have to disable NMIs - we are only looking at | |
3088 | * the list, not manipulating it: | |
3089 | */ | |
3090 | list_for_each_entry(counter, &parent_ctx->counter_list, list_entry) { | |
d859e29f | 3091 | if (!counter->hw_event.inherit) |
9b51f66d IM |
3092 | continue; |
3093 | ||
d859e29f | 3094 | if (inherit_group(counter, parent, |
9b51f66d IM |
3095 | parent_ctx, child, child_ctx)) |
3096 | break; | |
3097 | } | |
3098 | ||
d859e29f | 3099 | mutex_unlock(&parent_ctx->mutex); |
9b51f66d IM |
3100 | } |
3101 | ||
04289bb9 | 3102 | static void __cpuinit perf_counter_init_cpu(int cpu) |
0793a61d | 3103 | { |
04289bb9 | 3104 | struct perf_cpu_context *cpuctx; |
0793a61d | 3105 | |
04289bb9 IM |
3106 | cpuctx = &per_cpu(perf_cpu_context, cpu); |
3107 | __perf_counter_init_context(&cpuctx->ctx, NULL); | |
0793a61d TG |
3108 | |
3109 | mutex_lock(&perf_resource_mutex); | |
04289bb9 | 3110 | cpuctx->max_pertask = perf_max_counters - perf_reserved_percpu; |
0793a61d | 3111 | mutex_unlock(&perf_resource_mutex); |
04289bb9 | 3112 | |
01d0287f | 3113 | hw_perf_counter_setup(cpu); |
0793a61d TG |
3114 | } |
3115 | ||
3116 | #ifdef CONFIG_HOTPLUG_CPU | |
04289bb9 | 3117 | static void __perf_counter_exit_cpu(void *info) |
0793a61d TG |
3118 | { |
3119 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
3120 | struct perf_counter_context *ctx = &cpuctx->ctx; | |
3121 | struct perf_counter *counter, *tmp; | |
3122 | ||
04289bb9 IM |
3123 | list_for_each_entry_safe(counter, tmp, &ctx->counter_list, list_entry) |
3124 | __perf_counter_remove_from_context(counter); | |
0793a61d | 3125 | } |
04289bb9 | 3126 | static void perf_counter_exit_cpu(int cpu) |
0793a61d | 3127 | { |
d859e29f PM |
3128 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); |
3129 | struct perf_counter_context *ctx = &cpuctx->ctx; | |
3130 | ||
3131 | mutex_lock(&ctx->mutex); | |
04289bb9 | 3132 | smp_call_function_single(cpu, __perf_counter_exit_cpu, NULL, 1); |
d859e29f | 3133 | mutex_unlock(&ctx->mutex); |
0793a61d TG |
3134 | } |
3135 | #else | |
04289bb9 | 3136 | static inline void perf_counter_exit_cpu(int cpu) { } |
0793a61d TG |
3137 | #endif |
3138 | ||
3139 | static int __cpuinit | |
3140 | perf_cpu_notify(struct notifier_block *self, unsigned long action, void *hcpu) | |
3141 | { | |
3142 | unsigned int cpu = (long)hcpu; | |
3143 | ||
3144 | switch (action) { | |
3145 | ||
3146 | case CPU_UP_PREPARE: | |
3147 | case CPU_UP_PREPARE_FROZEN: | |
04289bb9 | 3148 | perf_counter_init_cpu(cpu); |
0793a61d TG |
3149 | break; |
3150 | ||
3151 | case CPU_DOWN_PREPARE: | |
3152 | case CPU_DOWN_PREPARE_FROZEN: | |
04289bb9 | 3153 | perf_counter_exit_cpu(cpu); |
0793a61d TG |
3154 | break; |
3155 | ||
3156 | default: | |
3157 | break; | |
3158 | } | |
3159 | ||
3160 | return NOTIFY_OK; | |
3161 | } | |
3162 | ||
3163 | static struct notifier_block __cpuinitdata perf_cpu_nb = { | |
3164 | .notifier_call = perf_cpu_notify, | |
3165 | }; | |
3166 | ||
3167 | static int __init perf_counter_init(void) | |
3168 | { | |
3169 | perf_cpu_notify(&perf_cpu_nb, (unsigned long)CPU_UP_PREPARE, | |
3170 | (void *)(long)smp_processor_id()); | |
3171 | register_cpu_notifier(&perf_cpu_nb); | |
3172 | ||
3173 | return 0; | |
3174 | } | |
3175 | early_initcall(perf_counter_init); | |
3176 | ||
3177 | static ssize_t perf_show_reserve_percpu(struct sysdev_class *class, char *buf) | |
3178 | { | |
3179 | return sprintf(buf, "%d\n", perf_reserved_percpu); | |
3180 | } | |
3181 | ||
3182 | static ssize_t | |
3183 | perf_set_reserve_percpu(struct sysdev_class *class, | |
3184 | const char *buf, | |
3185 | size_t count) | |
3186 | { | |
3187 | struct perf_cpu_context *cpuctx; | |
3188 | unsigned long val; | |
3189 | int err, cpu, mpt; | |
3190 | ||
3191 | err = strict_strtoul(buf, 10, &val); | |
3192 | if (err) | |
3193 | return err; | |
3194 | if (val > perf_max_counters) | |
3195 | return -EINVAL; | |
3196 | ||
3197 | mutex_lock(&perf_resource_mutex); | |
3198 | perf_reserved_percpu = val; | |
3199 | for_each_online_cpu(cpu) { | |
3200 | cpuctx = &per_cpu(perf_cpu_context, cpu); | |
3201 | spin_lock_irq(&cpuctx->ctx.lock); | |
3202 | mpt = min(perf_max_counters - cpuctx->ctx.nr_counters, | |
3203 | perf_max_counters - perf_reserved_percpu); | |
3204 | cpuctx->max_pertask = mpt; | |
3205 | spin_unlock_irq(&cpuctx->ctx.lock); | |
3206 | } | |
3207 | mutex_unlock(&perf_resource_mutex); | |
3208 | ||
3209 | return count; | |
3210 | } | |
3211 | ||
3212 | static ssize_t perf_show_overcommit(struct sysdev_class *class, char *buf) | |
3213 | { | |
3214 | return sprintf(buf, "%d\n", perf_overcommit); | |
3215 | } | |
3216 | ||
3217 | static ssize_t | |
3218 | perf_set_overcommit(struct sysdev_class *class, const char *buf, size_t count) | |
3219 | { | |
3220 | unsigned long val; | |
3221 | int err; | |
3222 | ||
3223 | err = strict_strtoul(buf, 10, &val); | |
3224 | if (err) | |
3225 | return err; | |
3226 | if (val > 1) | |
3227 | return -EINVAL; | |
3228 | ||
3229 | mutex_lock(&perf_resource_mutex); | |
3230 | perf_overcommit = val; | |
3231 | mutex_unlock(&perf_resource_mutex); | |
3232 | ||
3233 | return count; | |
3234 | } | |
3235 | ||
3236 | static SYSDEV_CLASS_ATTR( | |
3237 | reserve_percpu, | |
3238 | 0644, | |
3239 | perf_show_reserve_percpu, | |
3240 | perf_set_reserve_percpu | |
3241 | ); | |
3242 | ||
3243 | static SYSDEV_CLASS_ATTR( | |
3244 | overcommit, | |
3245 | 0644, | |
3246 | perf_show_overcommit, | |
3247 | perf_set_overcommit | |
3248 | ); | |
3249 | ||
3250 | static struct attribute *perfclass_attrs[] = { | |
3251 | &attr_reserve_percpu.attr, | |
3252 | &attr_overcommit.attr, | |
3253 | NULL | |
3254 | }; | |
3255 | ||
3256 | static struct attribute_group perfclass_attr_group = { | |
3257 | .attrs = perfclass_attrs, | |
3258 | .name = "perf_counters", | |
3259 | }; | |
3260 | ||
3261 | static int __init perf_counter_sysfs_init(void) | |
3262 | { | |
3263 | return sysfs_create_group(&cpu_sysdev_class.kset.kobj, | |
3264 | &perfclass_attr_group); | |
3265 | } | |
3266 | device_initcall(perf_counter_sysfs_init); |